xref: /openbmc/linux/drivers/pci/controller/dwc/Kconfig (revision 84b102f5)
1# SPDX-License-Identifier: GPL-2.0
2
3menu "DesignWare PCI Core Support"
4	depends on PCI
5
6config PCIE_DW
7	bool
8
9config PCIE_DW_HOST
10	bool
11	depends on PCI_MSI_IRQ_DOMAIN
12	select PCIE_DW
13
14config PCIE_DW_EP
15	bool
16	depends on PCI_ENDPOINT
17	select PCIE_DW
18
19config PCI_DRA7XX
20	bool
21
22config PCI_DRA7XX_HOST
23	bool "TI DRA7xx PCIe controller Host Mode"
24	depends on SOC_DRA7XX || COMPILE_TEST
25	depends on PCI_MSI_IRQ_DOMAIN
26	depends on OF && HAS_IOMEM && TI_PIPE3
27	select PCIE_DW_HOST
28	select PCI_DRA7XX
29	default y if SOC_DRA7XX
30	help
31	  Enables support for the PCIe controller in the DRA7xx SoC to work in
32	  host mode. There are two instances of PCIe controller in DRA7xx.
33	  This controller can work either as EP or RC. In order to enable
34	  host-specific features PCI_DRA7XX_HOST must be selected and in order
35	  to enable device-specific features PCI_DRA7XX_EP must be selected.
36	  This uses the DesignWare core.
37
38config PCI_DRA7XX_EP
39	bool "TI DRA7xx PCIe controller Endpoint Mode"
40	depends on SOC_DRA7XX || COMPILE_TEST
41	depends on PCI_ENDPOINT
42	depends on OF && HAS_IOMEM && TI_PIPE3
43	select PCIE_DW_EP
44	select PCI_DRA7XX
45	help
46	  Enables support for the PCIe controller in the DRA7xx SoC to work in
47	  endpoint mode. There are two instances of PCIe controller in DRA7xx.
48	  This controller can work either as EP or RC. In order to enable
49	  host-specific features PCI_DRA7XX_HOST must be selected and in order
50	  to enable device-specific features PCI_DRA7XX_EP must be selected.
51	  This uses the DesignWare core.
52
53config PCIE_DW_PLAT
54	bool
55
56config PCIE_DW_PLAT_HOST
57	bool "Platform bus based DesignWare PCIe Controller - Host mode"
58	depends on PCI && PCI_MSI_IRQ_DOMAIN
59	select PCIE_DW_HOST
60	select PCIE_DW_PLAT
61	help
62	  Enables support for the PCIe controller in the Designware IP to
63	  work in host mode. There are two instances of PCIe controller in
64	  Designware IP.
65	  This controller can work either as EP or RC. In order to enable
66	  host-specific features PCIE_DW_PLAT_HOST must be selected and in
67	  order to enable device-specific features PCI_DW_PLAT_EP must be
68	  selected.
69
70config PCIE_DW_PLAT_EP
71	bool "Platform bus based DesignWare PCIe Controller - Endpoint mode"
72	depends on PCI && PCI_MSI_IRQ_DOMAIN
73	depends on PCI_ENDPOINT
74	select PCIE_DW_EP
75	select PCIE_DW_PLAT
76	help
77	  Enables support for the PCIe controller in the Designware IP to
78	  work in endpoint mode. There are two instances of PCIe controller
79	  in Designware IP.
80	  This controller can work either as EP or RC. In order to enable
81	  host-specific features PCIE_DW_PLAT_HOST must be selected and in
82	  order to enable device-specific features PCI_DW_PLAT_EP must be
83	  selected.
84
85config PCI_EXYNOS
86	tristate "Samsung Exynos PCIe controller"
87	depends on ARCH_EXYNOS || COMPILE_TEST
88	depends on PCI_MSI_IRQ_DOMAIN
89	select PCIE_DW_HOST
90	help
91	  Enables support for the PCIe controller in the Samsung Exynos SoCs
92	  to work in host mode. The PCI controller is based on the DesignWare
93	  hardware and therefore the driver re-uses the DesignWare core
94	  functions to implement the driver.
95
96config PCI_IMX6
97	bool "Freescale i.MX6/7/8 PCIe controller"
98	depends on ARCH_MXC || COMPILE_TEST
99	depends on PCI_MSI_IRQ_DOMAIN
100	select PCIE_DW_HOST
101
102config PCIE_SPEAR13XX
103	bool "STMicroelectronics SPEAr PCIe controller"
104	depends on ARCH_SPEAR13XX || COMPILE_TEST
105	depends on PCI_MSI_IRQ_DOMAIN
106	select PCIE_DW_HOST
107	help
108	  Say Y here if you want PCIe support on SPEAr13XX SoCs.
109
110config PCI_KEYSTONE
111	bool
112
113config PCI_KEYSTONE_HOST
114	bool "PCI Keystone Host Mode"
115	depends on ARCH_KEYSTONE || ARCH_K3 || COMPILE_TEST
116	depends on PCI_MSI_IRQ_DOMAIN
117	select PCIE_DW_HOST
118	select PCI_KEYSTONE
119	help
120	  Enables support for the PCIe controller in the Keystone SoC to
121	  work in host mode. The PCI controller on Keystone is based on
122	  DesignWare hardware and therefore the driver re-uses the
123	  DesignWare core functions to implement the driver.
124
125config PCI_KEYSTONE_EP
126	bool "PCI Keystone Endpoint Mode"
127	depends on ARCH_KEYSTONE || ARCH_K3 || COMPILE_TEST
128	depends on PCI_ENDPOINT
129	select PCIE_DW_EP
130	select PCI_KEYSTONE
131	help
132	  Enables support for the PCIe controller in the Keystone SoC to
133	  work in endpoint mode. The PCI controller on Keystone is based
134	  on DesignWare hardware and therefore the driver re-uses the
135	  DesignWare core functions to implement the driver.
136
137config PCI_LAYERSCAPE
138	bool "Freescale Layerscape PCIe controller - Host mode"
139	depends on OF && (ARM || ARCH_LAYERSCAPE || COMPILE_TEST)
140	depends on PCI_MSI_IRQ_DOMAIN
141	select MFD_SYSCON
142	select PCIE_DW_HOST
143	help
144	  Say Y here if you want to enable PCIe controller support on Layerscape
145	  SoCs to work in Host mode.
146	  This controller can work either as EP or RC. The RCW[HOST_AGT_PEX]
147	  determines which PCIe controller works in EP mode and which PCIe
148	  controller works in RC mode.
149
150config PCI_LAYERSCAPE_EP
151	bool "Freescale Layerscape PCIe controller - Endpoint mode"
152	depends on OF && (ARM || ARCH_LAYERSCAPE || COMPILE_TEST)
153	depends on PCI_ENDPOINT
154	select PCIE_DW_EP
155	help
156	  Say Y here if you want to enable PCIe controller support on Layerscape
157	  SoCs to work in Endpoint mode.
158	  This controller can work either as EP or RC. The RCW[HOST_AGT_PEX]
159	  determines which PCIe controller works in EP mode and which PCIe
160	  controller works in RC mode.
161
162config PCI_HISI
163	depends on OF && (ARM64 || COMPILE_TEST)
164	bool "HiSilicon Hip05 and Hip06 SoCs PCIe controllers"
165	depends on PCI_MSI_IRQ_DOMAIN
166	select PCIE_DW_HOST
167	select PCI_HOST_COMMON
168	help
169	  Say Y here if you want PCIe controller support on HiSilicon
170	  Hip05 and Hip06 SoCs
171
172config PCIE_QCOM
173	bool "Qualcomm PCIe controller"
174	depends on OF && (ARCH_QCOM || COMPILE_TEST)
175	depends on PCI_MSI_IRQ_DOMAIN
176	select PCIE_DW_HOST
177	select CRC8
178	help
179	  Say Y here to enable PCIe controller support on Qualcomm SoCs. The
180	  PCIe controller uses the DesignWare core plus Qualcomm-specific
181	  hardware wrappers.
182
183config PCIE_ARMADA_8K
184	bool "Marvell Armada-8K PCIe controller"
185	depends on ARCH_MVEBU || COMPILE_TEST
186	depends on PCI_MSI_IRQ_DOMAIN
187	select PCIE_DW_HOST
188	help
189	  Say Y here if you want to enable PCIe controller support on
190	  Armada-8K SoCs. The PCIe controller on Armada-8K is based on
191	  DesignWare hardware and therefore the driver re-uses the
192	  DesignWare core functions to implement the driver.
193
194config PCIE_ARTPEC6
195	bool
196
197config PCIE_ARTPEC6_HOST
198	bool "Axis ARTPEC-6 PCIe controller Host Mode"
199	depends on MACH_ARTPEC6 || COMPILE_TEST
200	depends on PCI_MSI_IRQ_DOMAIN
201	select PCIE_DW_HOST
202	select PCIE_ARTPEC6
203	help
204	  Enables support for the PCIe controller in the ARTPEC-6 SoC to work in
205	  host mode. This uses the DesignWare core.
206
207config PCIE_ARTPEC6_EP
208	bool "Axis ARTPEC-6 PCIe controller Endpoint Mode"
209	depends on MACH_ARTPEC6 || COMPILE_TEST
210	depends on PCI_ENDPOINT
211	select PCIE_DW_EP
212	select PCIE_ARTPEC6
213	help
214	  Enables support for the PCIe controller in the ARTPEC-6 SoC to work in
215	  endpoint mode. This uses the DesignWare core.
216
217config PCIE_INTEL_GW
218	bool "Intel Gateway PCIe host controller support"
219	depends on OF && (X86 || COMPILE_TEST)
220	depends on PCI_MSI_IRQ_DOMAIN
221	select PCIE_DW_HOST
222	help
223	  Say 'Y' here to enable PCIe Host controller support on Intel
224	  Gateway SoCs.
225	  The PCIe controller uses the DesignWare core plus Intel-specific
226	  hardware wrappers.
227
228config PCIE_KIRIN
229	depends on OF && (ARM64 || COMPILE_TEST)
230	bool "HiSilicon Kirin series SoCs PCIe controllers"
231	depends on PCI_MSI_IRQ_DOMAIN
232	select PCIE_DW_HOST
233	help
234	  Say Y here if you want PCIe controller support
235	  on HiSilicon Kirin series SoCs.
236
237config PCIE_HISI_STB
238	bool "HiSilicon STB SoCs PCIe controllers"
239	depends on ARCH_HISI || COMPILE_TEST
240	depends on PCI_MSI_IRQ_DOMAIN
241	select PCIE_DW_HOST
242	help
243	  Say Y here if you want PCIe controller support on HiSilicon STB SoCs
244
245config PCI_MESON
246	tristate "MESON PCIe controller"
247	depends on PCI_MSI_IRQ_DOMAIN
248	default m if ARCH_MESON
249	select PCIE_DW_HOST
250	help
251	  Say Y here if you want to enable PCI controller support on Amlogic
252	  SoCs. The PCI controller on Amlogic is based on DesignWare hardware
253	  and therefore the driver re-uses the DesignWare core functions to
254	  implement the driver.
255
256config PCIE_TEGRA194
257	tristate
258
259config PCIE_TEGRA194_HOST
260	tristate "NVIDIA Tegra194 (and later) PCIe controller - Host Mode"
261	depends on ARCH_TEGRA_194_SOC || COMPILE_TEST
262	depends on PCI_MSI_IRQ_DOMAIN
263	select PCIE_DW_HOST
264	select PHY_TEGRA194_P2U
265	select PCIE_TEGRA194
266	help
267	  Enables support for the PCIe controller in the NVIDIA Tegra194 SoC to
268	  work in host mode. There are two instances of PCIe controllers in
269	  Tegra194. This controller can work either as EP or RC. In order to
270	  enable host-specific features PCIE_TEGRA194_HOST must be selected and
271	  in order to enable device-specific features PCIE_TEGRA194_EP must be
272	  selected. This uses the DesignWare core.
273
274config PCIE_TEGRA194_EP
275	tristate "NVIDIA Tegra194 (and later) PCIe controller - Endpoint Mode"
276	depends on ARCH_TEGRA_194_SOC || COMPILE_TEST
277	depends on PCI_ENDPOINT
278	select PCIE_DW_EP
279	select PHY_TEGRA194_P2U
280	select PCIE_TEGRA194
281	help
282	  Enables support for the PCIe controller in the NVIDIA Tegra194 SoC to
283	  work in host mode. There are two instances of PCIe controllers in
284	  Tegra194. This controller can work either as EP or RC. In order to
285	  enable host-specific features PCIE_TEGRA194_HOST must be selected and
286	  in order to enable device-specific features PCIE_TEGRA194_EP must be
287	  selected. This uses the DesignWare core.
288
289config PCIE_UNIPHIER
290	bool "Socionext UniPhier PCIe host controllers"
291	depends on ARCH_UNIPHIER || COMPILE_TEST
292	depends on OF && HAS_IOMEM
293	depends on PCI_MSI_IRQ_DOMAIN
294	select PCIE_DW_HOST
295	help
296	  Say Y here if you want PCIe host controller support on UniPhier SoCs.
297	  This driver supports LD20 and PXs3 SoCs.
298
299config PCIE_UNIPHIER_EP
300	bool "Socionext UniPhier PCIe endpoint controllers"
301	depends on ARCH_UNIPHIER || COMPILE_TEST
302	depends on OF && HAS_IOMEM
303	depends on PCI_ENDPOINT
304	select PCIE_DW_EP
305	help
306	  Say Y here if you want PCIe endpoint controller support on
307	  UniPhier SoCs. This driver supports Pro5 SoC.
308
309config PCIE_AL
310	bool "Amazon Annapurna Labs PCIe controller"
311	depends on OF && (ARM64 || COMPILE_TEST)
312	depends on PCI_MSI_IRQ_DOMAIN
313	select PCIE_DW_HOST
314	help
315	  Say Y here to enable support of the Amazon's Annapurna Labs PCIe
316	  controller IP on Amazon SoCs. The PCIe controller uses the DesignWare
317	  core plus Annapurna Labs proprietary hardware wrappers. This is
318	  required only for DT-based platforms. ACPI platforms with the
319	  Annapurna Labs PCIe controller don't need to enable this.
320
321endmenu
322