xref: /openbmc/linux/drivers/pci/controller/dwc/Kconfig (revision 51bc620b)
1# SPDX-License-Identifier: GPL-2.0
2
3menu "DesignWare PCI Core Support"
4	depends on PCI
5
6config PCIE_DW
7	bool
8
9config PCIE_DW_HOST
10        bool
11	depends on PCI_MSI_IRQ_DOMAIN
12        select PCIE_DW
13
14config PCIE_DW_EP
15	bool
16	depends on PCI_ENDPOINT
17	select PCIE_DW
18
19config PCI_DRA7XX
20	bool
21
22config PCI_DRA7XX_HOST
23	bool "TI DRA7xx PCIe controller Host Mode"
24	depends on SOC_DRA7XX || COMPILE_TEST
25	depends on PCI_MSI_IRQ_DOMAIN
26	depends on OF && HAS_IOMEM && TI_PIPE3
27	select PCIE_DW_HOST
28	select PCI_DRA7XX
29	default y
30	help
31	  Enables support for the PCIe controller in the DRA7xx SoC to work in
32	  host mode. There are two instances of PCIe controller in DRA7xx.
33	  This controller can work either as EP or RC. In order to enable
34	  host-specific features PCI_DRA7XX_HOST must be selected and in order
35	  to enable device-specific features PCI_DRA7XX_EP must be selected.
36	  This uses the DesignWare core.
37
38config PCI_DRA7XX_EP
39	bool "TI DRA7xx PCIe controller Endpoint Mode"
40	depends on SOC_DRA7XX || COMPILE_TEST
41	depends on PCI_ENDPOINT
42	depends on OF && HAS_IOMEM && TI_PIPE3
43	select PCIE_DW_EP
44	select PCI_DRA7XX
45	help
46	  Enables support for the PCIe controller in the DRA7xx SoC to work in
47	  endpoint mode. There are two instances of PCIe controller in DRA7xx.
48	  This controller can work either as EP or RC. In order to enable
49	  host-specific features PCI_DRA7XX_HOST must be selected and in order
50	  to enable device-specific features PCI_DRA7XX_EP must be selected.
51	  This uses the DesignWare core.
52
53config PCIE_DW_PLAT
54	bool
55
56config PCIE_DW_PLAT_HOST
57	bool "Platform bus based DesignWare PCIe Controller - Host mode"
58	depends on PCI && PCI_MSI_IRQ_DOMAIN
59	select PCIE_DW_HOST
60	select PCIE_DW_PLAT
61	help
62	  Enables support for the PCIe controller in the Designware IP to
63	  work in host mode. There are two instances of PCIe controller in
64	  Designware IP.
65	  This controller can work either as EP or RC. In order to enable
66	  host-specific features PCIE_DW_PLAT_HOST must be selected and in
67	  order to enable device-specific features PCI_DW_PLAT_EP must be
68	  selected.
69
70config PCIE_DW_PLAT_EP
71	bool "Platform bus based DesignWare PCIe Controller - Endpoint mode"
72	depends on PCI && PCI_MSI_IRQ_DOMAIN
73	depends on PCI_ENDPOINT
74	select PCIE_DW_EP
75	select PCIE_DW_PLAT
76	help
77	  Enables support for the PCIe controller in the Designware IP to
78	  work in endpoint mode. There are two instances of PCIe controller
79	  in Designware IP.
80	  This controller can work either as EP or RC. In order to enable
81	  host-specific features PCIE_DW_PLAT_HOST must be selected and in
82	  order to enable device-specific features PCI_DW_PLAT_EP must be
83	  selected.
84
85config PCI_EXYNOS
86	bool "Samsung Exynos PCIe controller"
87	depends on SOC_EXYNOS5440 || COMPILE_TEST
88	depends on PCI_MSI_IRQ_DOMAIN
89	select PCIE_DW_HOST
90
91config PCI_IMX6
92	bool "Freescale i.MX6/7/8 PCIe controller"
93	depends on ARCH_MXC || COMPILE_TEST
94	depends on PCI_MSI_IRQ_DOMAIN
95	select PCIE_DW_HOST
96
97config PCIE_SPEAR13XX
98	bool "STMicroelectronics SPEAr PCIe controller"
99	depends on ARCH_SPEAR13XX || COMPILE_TEST
100	depends on PCI_MSI_IRQ_DOMAIN
101	select PCIE_DW_HOST
102	help
103	  Say Y here if you want PCIe support on SPEAr13XX SoCs.
104
105config PCI_KEYSTONE
106	bool
107
108config PCI_KEYSTONE_HOST
109	bool "PCI Keystone Host Mode"
110	depends on ARCH_KEYSTONE || ARCH_K3 || ((ARM || ARM64) && COMPILE_TEST)
111	depends on PCI_MSI_IRQ_DOMAIN
112	select PCIE_DW_HOST
113	select PCI_KEYSTONE
114	default y
115	help
116	  Enables support for the PCIe controller in the Keystone SoC to
117	  work in host mode. The PCI controller on Keystone is based on
118	  DesignWare hardware and therefore the driver re-uses the
119	  DesignWare core functions to implement the driver.
120
121config PCI_KEYSTONE_EP
122	bool "PCI Keystone Endpoint Mode"
123	depends on ARCH_KEYSTONE || ARCH_K3 || ((ARM || ARM64) && COMPILE_TEST)
124	depends on PCI_ENDPOINT
125	select PCIE_DW_EP
126	select PCI_KEYSTONE
127	help
128	  Enables support for the PCIe controller in the Keystone SoC to
129	  work in endpoint mode. The PCI controller on Keystone is based
130	  on DesignWare hardware and therefore the driver re-uses the
131	  DesignWare core functions to implement the driver.
132
133config PCI_LAYERSCAPE
134	bool "Freescale Layerscape PCIe controller"
135	depends on OF && (ARM || ARCH_LAYERSCAPE || COMPILE_TEST)
136	depends on PCI_MSI_IRQ_DOMAIN
137	select MFD_SYSCON
138	select PCIE_DW_HOST
139	help
140	  Say Y here if you want PCIe controller support on Layerscape SoCs.
141
142config PCI_HISI
143	depends on OF && (ARM64 || COMPILE_TEST)
144	bool "HiSilicon Hip05 and Hip06 SoCs PCIe controllers"
145	depends on PCI_MSI_IRQ_DOMAIN
146	select PCIE_DW_HOST
147	select PCI_HOST_COMMON
148	help
149	  Say Y here if you want PCIe controller support on HiSilicon
150	  Hip05 and Hip06 SoCs
151
152config PCIE_QCOM
153	bool "Qualcomm PCIe controller"
154	depends on OF && (ARCH_QCOM || COMPILE_TEST)
155	depends on PCI_MSI_IRQ_DOMAIN
156	select PCIE_DW_HOST
157	help
158	  Say Y here to enable PCIe controller support on Qualcomm SoCs. The
159	  PCIe controller uses the DesignWare core plus Qualcomm-specific
160	  hardware wrappers.
161
162config PCIE_ARMADA_8K
163	bool "Marvell Armada-8K PCIe controller"
164	depends on ARCH_MVEBU || COMPILE_TEST
165	depends on PCI_MSI_IRQ_DOMAIN
166	select PCIE_DW_HOST
167	help
168	  Say Y here if you want to enable PCIe controller support on
169	  Armada-8K SoCs. The PCIe controller on Armada-8K is based on
170	  DesignWare hardware and therefore the driver re-uses the
171	  DesignWare core functions to implement the driver.
172
173config PCIE_ARTPEC6
174	bool
175
176config PCIE_ARTPEC6_HOST
177	bool "Axis ARTPEC-6 PCIe controller Host Mode"
178	depends on MACH_ARTPEC6 || COMPILE_TEST
179	depends on PCI_MSI_IRQ_DOMAIN
180	select PCIE_DW_HOST
181	select PCIE_ARTPEC6
182	help
183	  Enables support for the PCIe controller in the ARTPEC-6 SoC to work in
184	  host mode. This uses the DesignWare core.
185
186config PCIE_ARTPEC6_EP
187	bool "Axis ARTPEC-6 PCIe controller Endpoint Mode"
188	depends on MACH_ARTPEC6 || COMPILE_TEST
189	depends on PCI_ENDPOINT
190	select PCIE_DW_EP
191	select PCIE_ARTPEC6
192	help
193	  Enables support for the PCIe controller in the ARTPEC-6 SoC to work in
194	  endpoint mode. This uses the DesignWare core.
195
196config PCIE_KIRIN
197	depends on OF && (ARM64 || COMPILE_TEST)
198	bool "HiSilicon Kirin series SoCs PCIe controllers"
199	depends on PCI_MSI_IRQ_DOMAIN
200	select PCIE_DW_HOST
201	help
202	  Say Y here if you want PCIe controller support
203	  on HiSilicon Kirin series SoCs.
204
205config PCIE_HISI_STB
206	bool "HiSilicon STB SoCs PCIe controllers"
207	depends on ARCH_HISI || COMPILE_TEST
208	depends on PCI_MSI_IRQ_DOMAIN
209	select PCIE_DW_HOST
210	help
211          Say Y here if you want PCIe controller support on HiSilicon STB SoCs
212
213config PCI_MESON
214	bool "MESON PCIe controller"
215	depends on PCI_MSI_IRQ_DOMAIN
216	select PCIE_DW_HOST
217	help
218	  Say Y here if you want to enable PCI controller support on Amlogic
219	  SoCs. The PCI controller on Amlogic is based on DesignWare hardware
220	  and therefore the driver re-uses the DesignWare core functions to
221	  implement the driver.
222
223config PCIE_UNIPHIER
224	bool "Socionext UniPhier PCIe controllers"
225	depends on ARCH_UNIPHIER || COMPILE_TEST
226	depends on OF && HAS_IOMEM
227	depends on PCI_MSI_IRQ_DOMAIN
228	select PCIE_DW_HOST
229	help
230	  Say Y here if you want PCIe controller support on UniPhier SoCs.
231	  This driver supports LD20 and PXs3 SoCs.
232
233endmenu
234