1de80f95cSTom Joseph // SPDX-License-Identifier: GPL-2.0
2de80f95cSTom Joseph /*
3de80f95cSTom Joseph  * Cadence PCIe platform  driver.
4de80f95cSTom Joseph  *
5de80f95cSTom Joseph  * Copyright (c) 2019, Cadence Design Systems
6de80f95cSTom Joseph  * Author: Tom Joseph <tjoseph@cadence.com>
7de80f95cSTom Joseph  */
8de80f95cSTom Joseph #include <linux/kernel.h>
9de80f95cSTom Joseph #include <linux/of_address.h>
10de80f95cSTom Joseph #include <linux/of_pci.h>
11de80f95cSTom Joseph #include <linux/platform_device.h>
12de80f95cSTom Joseph #include <linux/pm_runtime.h>
13de80f95cSTom Joseph #include <linux/of_device.h>
14de80f95cSTom Joseph #include "pcie-cadence.h"
15de80f95cSTom Joseph 
16de80f95cSTom Joseph /**
17de80f95cSTom Joseph  * struct cdns_plat_pcie - private data for this PCIe platform driver
18de80f95cSTom Joseph  * @pcie: Cadence PCIe controller
19de80f95cSTom Joseph  * @is_rc: Set to 1 indicates the PCIe controller mode is Root Complex,
20de80f95cSTom Joseph  *         if 0 it is in Endpoint mode.
21de80f95cSTom Joseph  */
22de80f95cSTom Joseph struct cdns_plat_pcie {
23de80f95cSTom Joseph 	struct cdns_pcie        *pcie;
24de80f95cSTom Joseph 	bool is_rc;
25de80f95cSTom Joseph };
26de80f95cSTom Joseph 
27de80f95cSTom Joseph struct cdns_plat_pcie_of_data {
28de80f95cSTom Joseph 	bool is_rc;
29de80f95cSTom Joseph };
30de80f95cSTom Joseph 
31de80f95cSTom Joseph static const struct of_device_id cdns_plat_pcie_of_match[];
32de80f95cSTom Joseph 
33de80f95cSTom Joseph static int cdns_plat_pcie_probe(struct platform_device *pdev)
34de80f95cSTom Joseph {
35de80f95cSTom Joseph 	const struct cdns_plat_pcie_of_data *data;
36de80f95cSTom Joseph 	struct cdns_plat_pcie *cdns_plat_pcie;
37de80f95cSTom Joseph 	const struct of_device_id *match;
38de80f95cSTom Joseph 	struct device *dev = &pdev->dev;
39de80f95cSTom Joseph 	struct pci_host_bridge *bridge;
40de80f95cSTom Joseph 	struct cdns_pcie_ep *ep;
41de80f95cSTom Joseph 	struct cdns_pcie_rc *rc;
42de80f95cSTom Joseph 	int phy_count;
43de80f95cSTom Joseph 	bool is_rc;
44de80f95cSTom Joseph 	int ret;
45de80f95cSTom Joseph 
46de80f95cSTom Joseph 	match = of_match_device(cdns_plat_pcie_of_match, dev);
47de80f95cSTom Joseph 	if (!match)
48de80f95cSTom Joseph 		return -EINVAL;
49de80f95cSTom Joseph 
50de80f95cSTom Joseph 	data = (struct cdns_plat_pcie_of_data *)match->data;
51de80f95cSTom Joseph 	is_rc = data->is_rc;
52de80f95cSTom Joseph 
53de80f95cSTom Joseph 	pr_debug(" Started %s with is_rc: %d\n", __func__, is_rc);
54de80f95cSTom Joseph 	cdns_plat_pcie = devm_kzalloc(dev, sizeof(*cdns_plat_pcie), GFP_KERNEL);
55de80f95cSTom Joseph 	if (!cdns_plat_pcie)
56de80f95cSTom Joseph 		return -ENOMEM;
57de80f95cSTom Joseph 
58de80f95cSTom Joseph 	platform_set_drvdata(pdev, cdns_plat_pcie);
59de80f95cSTom Joseph 	if (is_rc) {
60de80f95cSTom Joseph 		if (!IS_ENABLED(CONFIG_PCIE_CADENCE_PLAT_HOST))
61de80f95cSTom Joseph 			return -ENODEV;
62de80f95cSTom Joseph 
63de80f95cSTom Joseph 		bridge = devm_pci_alloc_host_bridge(dev, sizeof(*rc));
64de80f95cSTom Joseph 		if (!bridge)
65de80f95cSTom Joseph 			return -ENOMEM;
66de80f95cSTom Joseph 
67de80f95cSTom Joseph 		rc = pci_host_bridge_priv(bridge);
68de80f95cSTom Joseph 		rc->pcie.dev = dev;
69de80f95cSTom Joseph 		cdns_plat_pcie->pcie = &rc->pcie;
70de80f95cSTom Joseph 		cdns_plat_pcie->is_rc = is_rc;
71de80f95cSTom Joseph 
72de80f95cSTom Joseph 		ret = cdns_pcie_init_phy(dev, cdns_plat_pcie->pcie);
73de80f95cSTom Joseph 		if (ret) {
74de80f95cSTom Joseph 			dev_err(dev, "failed to init phy\n");
75de80f95cSTom Joseph 			return ret;
76de80f95cSTom Joseph 		}
77de80f95cSTom Joseph 		pm_runtime_enable(dev);
78de80f95cSTom Joseph 		ret = pm_runtime_get_sync(dev);
79de80f95cSTom Joseph 		if (ret < 0) {
80de80f95cSTom Joseph 			dev_err(dev, "pm_runtime_get_sync() failed\n");
81de80f95cSTom Joseph 			goto err_get_sync;
82de80f95cSTom Joseph 		}
83de80f95cSTom Joseph 
84de80f95cSTom Joseph 		ret = cdns_pcie_host_setup(rc);
85de80f95cSTom Joseph 		if (ret)
86de80f95cSTom Joseph 			goto err_init;
87de80f95cSTom Joseph 	} else {
88de80f95cSTom Joseph 		if (!IS_ENABLED(CONFIG_PCIE_CADENCE_PLAT_EP))
89de80f95cSTom Joseph 			return -ENODEV;
90de80f95cSTom Joseph 
91de80f95cSTom Joseph 		ep = devm_kzalloc(dev, sizeof(*ep), GFP_KERNEL);
92de80f95cSTom Joseph 		if (!ep)
93de80f95cSTom Joseph 			return -ENOMEM;
94de80f95cSTom Joseph 
95de80f95cSTom Joseph 		ep->pcie.dev = dev;
96de80f95cSTom Joseph 		cdns_plat_pcie->pcie = &ep->pcie;
97de80f95cSTom Joseph 		cdns_plat_pcie->is_rc = is_rc;
98de80f95cSTom Joseph 
99de80f95cSTom Joseph 		ret = cdns_pcie_init_phy(dev, cdns_plat_pcie->pcie);
100de80f95cSTom Joseph 		if (ret) {
101de80f95cSTom Joseph 			dev_err(dev, "failed to init phy\n");
102de80f95cSTom Joseph 			return ret;
103de80f95cSTom Joseph 		}
104de80f95cSTom Joseph 
105de80f95cSTom Joseph 		pm_runtime_enable(dev);
106de80f95cSTom Joseph 		ret = pm_runtime_get_sync(dev);
107de80f95cSTom Joseph 		if (ret < 0) {
108de80f95cSTom Joseph 			dev_err(dev, "pm_runtime_get_sync() failed\n");
109de80f95cSTom Joseph 			goto err_get_sync;
110de80f95cSTom Joseph 		}
111de80f95cSTom Joseph 
112de80f95cSTom Joseph 		ret = cdns_pcie_ep_setup(ep);
113de80f95cSTom Joseph 		if (ret)
114de80f95cSTom Joseph 			goto err_init;
115de80f95cSTom Joseph 	}
116de80f95cSTom Joseph 
117de80f95cSTom Joseph  err_init:
118de80f95cSTom Joseph  err_get_sync:
1197a790087SDinghao Liu 	pm_runtime_put_sync(dev);
120de80f95cSTom Joseph 	pm_runtime_disable(dev);
121de80f95cSTom Joseph 	cdns_pcie_disable_phy(cdns_plat_pcie->pcie);
122de80f95cSTom Joseph 	phy_count = cdns_plat_pcie->pcie->phy_count;
123de80f95cSTom Joseph 	while (phy_count--)
124de80f95cSTom Joseph 		device_link_del(cdns_plat_pcie->pcie->link[phy_count]);
125de80f95cSTom Joseph 
126de80f95cSTom Joseph 	return 0;
127de80f95cSTom Joseph }
128de80f95cSTom Joseph 
129de80f95cSTom Joseph static void cdns_plat_pcie_shutdown(struct platform_device *pdev)
130de80f95cSTom Joseph {
131de80f95cSTom Joseph 	struct device *dev = &pdev->dev;
132de80f95cSTom Joseph 	struct cdns_pcie *pcie = dev_get_drvdata(dev);
133de80f95cSTom Joseph 	int ret;
134de80f95cSTom Joseph 
135de80f95cSTom Joseph 	ret = pm_runtime_put_sync(dev);
136de80f95cSTom Joseph 	if (ret < 0)
137de80f95cSTom Joseph 		dev_dbg(dev, "pm_runtime_put_sync failed\n");
138de80f95cSTom Joseph 
139de80f95cSTom Joseph 	pm_runtime_disable(dev);
140de80f95cSTom Joseph 
141de80f95cSTom Joseph 	cdns_pcie_disable_phy(pcie);
142de80f95cSTom Joseph }
143de80f95cSTom Joseph 
144de80f95cSTom Joseph static const struct cdns_plat_pcie_of_data cdns_plat_pcie_host_of_data = {
145de80f95cSTom Joseph 	.is_rc = true,
146de80f95cSTom Joseph };
147de80f95cSTom Joseph 
148de80f95cSTom Joseph static const struct cdns_plat_pcie_of_data cdns_plat_pcie_ep_of_data = {
149de80f95cSTom Joseph 	.is_rc = false,
150de80f95cSTom Joseph };
151de80f95cSTom Joseph 
152de80f95cSTom Joseph static const struct of_device_id cdns_plat_pcie_of_match[] = {
153de80f95cSTom Joseph 	{
154de80f95cSTom Joseph 		.compatible = "cdns,cdns-pcie-host",
155de80f95cSTom Joseph 		.data = &cdns_plat_pcie_host_of_data,
156de80f95cSTom Joseph 	},
157de80f95cSTom Joseph 	{
158de80f95cSTom Joseph 		.compatible = "cdns,cdns-pcie-ep",
159de80f95cSTom Joseph 		.data = &cdns_plat_pcie_ep_of_data,
160de80f95cSTom Joseph 	},
161de80f95cSTom Joseph 	{},
162de80f95cSTom Joseph };
163de80f95cSTom Joseph 
164de80f95cSTom Joseph static struct platform_driver cdns_plat_pcie_driver = {
165de80f95cSTom Joseph 	.driver = {
166de80f95cSTom Joseph 		.name = "cdns-pcie",
167de80f95cSTom Joseph 		.of_match_table = cdns_plat_pcie_of_match,
168de80f95cSTom Joseph 		.pm	= &cdns_pcie_pm_ops,
169de80f95cSTom Joseph 	},
170de80f95cSTom Joseph 	.probe = cdns_plat_pcie_probe,
171de80f95cSTom Joseph 	.shutdown = cdns_plat_pcie_shutdown,
172de80f95cSTom Joseph };
173de80f95cSTom Joseph builtin_platform_driver(cdns_plat_pcie_driver);
174