1# SPDX-License-Identifier: GPL-2.0 2# 3# PCI configuration 4# 5 6# select this to offer the PCI prompt 7config HAVE_PCI 8 bool 9 10# select this to unconditionally force on PCI support 11config FORCE_PCI 12 bool 13 select HAVE_PCI 14 select PCI 15 16menuconfig PCI 17 bool "PCI support" 18 depends on HAVE_PCI 19 help 20 This option enables support for the PCI local bus, including 21 support for PCI-X and the foundations for PCI Express support. 22 Say 'Y' here unless you know what you are doing. 23 24if PCI 25 26config PCI_DOMAINS 27 bool 28 depends on PCI 29 30config PCI_DOMAINS_GENERIC 31 bool 32 select PCI_DOMAINS 33 34config PCI_SYSCALL 35 bool 36 37source "drivers/pci/pcie/Kconfig" 38 39config PCI_MSI 40 bool "Message Signaled Interrupts (MSI and MSI-X)" 41 select GENERIC_MSI_IRQ 42 help 43 This allows device drivers to enable MSI (Message Signaled 44 Interrupts). Message Signaled Interrupts enable a device to 45 generate an interrupt using an inbound Memory Write on its 46 PCI bus instead of asserting a device IRQ pin. 47 48 Use of PCI MSI interrupts can be disabled at kernel boot time 49 by using the 'pci=nomsi' option. This disables MSI for the 50 entire system. 51 52 If you don't know what to do here, say Y. 53 54config PCI_MSI_ARCH_FALLBACKS 55 bool 56 57config PCI_QUIRKS 58 default y 59 bool "Enable PCI quirk workarounds" if EXPERT 60 help 61 This enables workarounds for various PCI chipset bugs/quirks. 62 Disable this only if your target machine is unaffected by PCI 63 quirks. 64 65config PCI_DEBUG 66 bool "PCI Debugging" 67 depends on DEBUG_KERNEL 68 help 69 Say Y here if you want the PCI core to produce a bunch of debug 70 messages to the system log. Select this if you are having a 71 problem with PCI support and want to see more of what is going on. 72 73 When in doubt, say N. 74 75config PCI_REALLOC_ENABLE_AUTO 76 bool "Enable PCI resource re-allocation detection" 77 depends on PCI_IOV 78 help 79 Say Y here if you want the PCI core to detect if PCI resource 80 re-allocation needs to be enabled. You can always use pci=realloc=on 81 or pci=realloc=off to override it. It will automatically 82 re-allocate PCI resources if SR-IOV BARs have not been allocated by 83 the BIOS. 84 85 When in doubt, say N. 86 87config PCI_STUB 88 tristate "PCI Stub driver" 89 help 90 Say Y or M here if you want be able to reserve a PCI device 91 when it is going to be assigned to a guest operating system. 92 93 When in doubt, say N. 94 95config PCI_PF_STUB 96 tristate "PCI PF Stub driver" 97 depends on PCI_IOV 98 help 99 Say Y or M here if you want to enable support for devices that 100 require SR-IOV support, while at the same time the PF (Physical 101 Function) itself is not providing any actual services on the 102 host itself such as storage or networking. 103 104 When in doubt, say N. 105 106config XEN_PCIDEV_FRONTEND 107 tristate "Xen PCI Frontend" 108 depends on XEN_PV 109 select PCI_XEN 110 select XEN_XENBUS_FRONTEND 111 default y 112 help 113 The PCI device frontend driver allows the kernel to import arbitrary 114 PCI devices from a PCI backend to support PCI driver domains. 115 116config PCI_ATS 117 bool 118 119config PCI_DOE 120 bool 121 122config PCI_ECAM 123 bool 124 125config PCI_LOCKLESS_CONFIG 126 bool 127 128config PCI_BRIDGE_EMUL 129 bool 130 131config PCI_IOV 132 bool "PCI IOV support" 133 select PCI_ATS 134 help 135 I/O Virtualization is a PCI feature supported by some devices 136 which allows them to create virtual devices which share their 137 physical resources. 138 139 If unsure, say N. 140 141config PCI_PRI 142 bool "PCI PRI support" 143 select PCI_ATS 144 help 145 PRI is the PCI Page Request Interface. It allows PCI devices that are 146 behind an IOMMU to recover from page faults. 147 148 If unsure, say N. 149 150config PCI_PASID 151 bool "PCI PASID support" 152 select PCI_ATS 153 help 154 Process Address Space Identifiers (PASIDs) can be used by PCI devices 155 to access more than one IO address space at the same time. To make 156 use of this feature an IOMMU is required which also supports PASIDs. 157 Select this option if you have such an IOMMU and want to compile the 158 driver for it into your kernel. 159 160 If unsure, say N. 161 162config PCI_P2PDMA 163 bool "PCI peer-to-peer transfer support" 164 depends on ZONE_DEVICE 165 # 166 # The need for the scatterlist DMA bus address flag means PCI P2PDMA 167 # requires 64bit 168 # 169 depends on 64BIT 170 select GENERIC_ALLOCATOR 171 help 172 Enableѕ drivers to do PCI peer-to-peer transactions to and from 173 BARs that are exposed in other devices that are the part of 174 the hierarchy where peer-to-peer DMA is guaranteed by the PCI 175 specification to work (ie. anything below a single PCI bridge). 176 177 Many PCIe root complexes do not support P2P transactions and 178 it's hard to tell which support it at all, so at this time, 179 P2P DMA transactions must be between devices behind the same root 180 port. 181 182 If unsure, say N. 183 184config PCI_LABEL 185 def_bool y if (DMI || ACPI) 186 select NLS 187 188config PCI_HYPERV 189 tristate "Hyper-V PCI Frontend" 190 depends on ((X86 && X86_64) || ARM64) && HYPERV && PCI_MSI && SYSFS 191 select PCI_HYPERV_INTERFACE 192 help 193 The PCI device frontend driver allows the kernel to import arbitrary 194 PCI devices from a PCI backend to support PCI driver domains. 195 196choice 197 prompt "PCI Express hierarchy optimization setting" 198 default PCIE_BUS_DEFAULT 199 depends on PCI && EXPERT 200 help 201 MPS (Max Payload Size) and MRRS (Max Read Request Size) are PCIe 202 device parameters that affect performance and the ability to 203 support hotplug and peer-to-peer DMA. 204 205 The following choices set the MPS and MRRS optimization strategy 206 at compile-time. The choices are the same as those offered for 207 the kernel command-line parameter 'pci', i.e., 208 'pci=pcie_bus_tune_off', 'pci=pcie_bus_safe', 209 'pci=pcie_bus_perf', and 'pci=pcie_bus_peer2peer'. 210 211 This is a compile-time setting and can be overridden by the above 212 command-line parameters. If unsure, choose PCIE_BUS_DEFAULT. 213 214config PCIE_BUS_TUNE_OFF 215 bool "Tune Off" 216 depends on PCI 217 help 218 Use the BIOS defaults; don't touch MPS at all. This is the same 219 as booting with 'pci=pcie_bus_tune_off'. 220 221config PCIE_BUS_DEFAULT 222 bool "Default" 223 depends on PCI 224 help 225 Default choice; ensure that the MPS matches upstream bridge. 226 227config PCIE_BUS_SAFE 228 bool "Safe" 229 depends on PCI 230 help 231 Use largest MPS that boot-time devices support. If you have a 232 closed system with no possibility of adding new devices, this 233 will use the largest MPS that's supported by all devices. This 234 is the same as booting with 'pci=pcie_bus_safe'. 235 236config PCIE_BUS_PERFORMANCE 237 bool "Performance" 238 depends on PCI 239 help 240 Use MPS and MRRS for best performance. Ensure that a given 241 device's MPS is no larger than its parent MPS, which allows us to 242 keep all switches/bridges to the max MPS supported by their 243 parent. This is the same as booting with 'pci=pcie_bus_perf'. 244 245config PCIE_BUS_PEER2PEER 246 bool "Peer2peer" 247 depends on PCI 248 help 249 Set MPS = 128 for all devices. MPS configuration effected by the 250 other options could cause the MPS on one root port to be 251 different than that of the MPS on another, which may cause 252 hot-added devices or peer-to-peer DMA to fail. Set MPS to the 253 smallest possible value (128B) system-wide to avoid these issues. 254 This is the same as booting with 'pci=pcie_bus_peer2peer'. 255 256endchoice 257 258config VGA_ARB 259 bool "VGA Arbitration" if EXPERT 260 default y 261 depends on (PCI && !S390) 262 help 263 Some "legacy" VGA devices implemented on PCI typically have the same 264 hard-decoded addresses as they did on ISA. When multiple PCI devices 265 are accessed at same time they need some kind of coordination. Please 266 see Documentation/gpu/vgaarbiter.rst for more details. Select this to 267 enable VGA arbiter. 268 269config VGA_ARB_MAX_GPUS 270 int "Maximum number of GPUs" 271 default 16 272 depends on VGA_ARB 273 help 274 Reserves space in the kernel to maintain resource locking for 275 multiple GPUS. The overhead for each GPU is very small. 276 277source "drivers/pci/hotplug/Kconfig" 278source "drivers/pci/controller/Kconfig" 279source "drivers/pci/endpoint/Kconfig" 280source "drivers/pci/switch/Kconfig" 281 282endif 283