xref: /openbmc/linux/drivers/pci/Kconfig (revision 1d38fe6e)
17328c8f4SBjorn Helgaas# SPDX-License-Identifier: GPL-2.0
21da177e4SLinus Torvalds#
31da177e4SLinus Torvalds# PCI configuration
41da177e4SLinus Torvalds#
55f8fc432SBogicevic Sasa
6eb01d42aSChristoph Hellwig# select this to offer the PCI prompt
7eb01d42aSChristoph Hellwigconfig HAVE_PCI
8eb01d42aSChristoph Hellwig	bool
9eb01d42aSChristoph Hellwig
10eb01d42aSChristoph Hellwig# select this to unconditionally force on PCI support
11eb01d42aSChristoph Hellwigconfig FORCE_PCI
12eb01d42aSChristoph Hellwig	bool
13eb01d42aSChristoph Hellwig	select HAVE_PCI
14eb01d42aSChristoph Hellwig	select PCI
15eb01d42aSChristoph Hellwig
16eb01d42aSChristoph Hellwigmenuconfig PCI
17eb01d42aSChristoph Hellwig	bool "PCI support"
18eb01d42aSChristoph Hellwig	depends on HAVE_PCI
19eb01d42aSChristoph Hellwig	help
20eb01d42aSChristoph Hellwig	  This option enables support for the PCI local bus, including
21eb01d42aSChristoph Hellwig	  support for PCI-X and the foundations for PCI Express support.
22eb01d42aSChristoph Hellwig	  Say 'Y' here unless you know what you are doing.
23eb01d42aSChristoph Hellwig
242e8cb2cfSRob Herringif PCI
252e8cb2cfSRob Herring
262eac9c2dSChristoph Hellwigconfig PCI_DOMAINS
272eac9c2dSChristoph Hellwig	bool
282eac9c2dSChristoph Hellwig	depends on PCI
292eac9c2dSChristoph Hellwig
302eac9c2dSChristoph Hellwigconfig PCI_DOMAINS_GENERIC
312eac9c2dSChristoph Hellwig	bool
322eac9c2dSChristoph Hellwig	select PCI_DOMAINS
332eac9c2dSChristoph Hellwig
3420f1b79dSChristoph Hellwigconfig PCI_SYSCALL
3520f1b79dSChristoph Hellwig	bool
3620f1b79dSChristoph Hellwig
375f8fc432SBogicevic Sasasource "drivers/pci/pcie/Kconfig"
385f8fc432SBogicevic Sasa
391da177e4SLinus Torvaldsconfig PCI_MSI
401da177e4SLinus Torvalds	bool "Message Signaled Interrupts (MSI and MSI-X)"
4138b6a1cfSJiang Liu	select GENERIC_MSI_IRQ
421da177e4SLinus Torvalds	help
431da177e4SLinus Torvalds	   This allows device drivers to enable MSI (Message Signaled
441da177e4SLinus Torvalds	   Interrupts).  Message Signaled Interrupts enable a device to
451da177e4SLinus Torvalds	   generate an interrupt using an inbound Memory Write on its
461da177e4SLinus Torvalds	   PCI bus instead of asserting a device IRQ pin.
471da177e4SLinus Torvalds
48309e57dfSMatthew Wilcox	   Use of PCI MSI interrupts can be disabled at kernel boot time
49309e57dfSMatthew Wilcox	   by using the 'pci=nomsi' option.  This disables MSI for the
50309e57dfSMatthew Wilcox	   entire system.
51309e57dfSMatthew Wilcox
523196180aSJesse Barnes	   If you don't know what to do here, say Y.
531da177e4SLinus Torvalds
543878eaefSJiang Liuconfig PCI_MSI_IRQ_DOMAIN
55191d6f91SPalmer Dabbelt	def_bool y
563878eaefSJiang Liu	depends on PCI_MSI
573878eaefSJiang Liu	select GENERIC_MSI_IRQ_DOMAIN
583878eaefSJiang Liu
59077ee78eSThomas Gleixnerconfig PCI_MSI_ARCH_FALLBACKS
60077ee78eSThomas Gleixner	bool
61077ee78eSThomas Gleixner
6203ea2263SRandy Dunlapconfig PCI_QUIRKS
6303ea2263SRandy Dunlap	default y
6403ea2263SRandy Dunlap	bool "Enable PCI quirk workarounds" if EXPERT
6503ea2263SRandy Dunlap	help
6603ea2263SRandy Dunlap	  This enables workarounds for various PCI chipset bugs/quirks.
6703ea2263SRandy Dunlap	  Disable this only if your target machine is unaffected by PCI
6803ea2263SRandy Dunlap	  quirks.
6903ea2263SRandy Dunlap
701da177e4SLinus Torvaldsconfig PCI_DEBUG
711da177e4SLinus Torvalds	bool "PCI Debugging"
722e8cb2cfSRob Herring	depends on DEBUG_KERNEL
731da177e4SLinus Torvalds	help
741da177e4SLinus Torvalds	  Say Y here if you want the PCI core to produce a bunch of debug
751da177e4SLinus Torvalds	  messages to the system log.  Select this if you are having a
761da177e4SLinus Torvalds	  problem with PCI support and want to see more of what is going on.
771da177e4SLinus Torvalds
781da177e4SLinus Torvalds	  When in doubt, say N.
791da177e4SLinus Torvalds
80b07f2ebcSYinghai Luconfig PCI_REALLOC_ENABLE_AUTO
81b07f2ebcSYinghai Lu	bool "Enable PCI resource re-allocation detection"
82ad581f86SSascha El-Sharkawy	depends on PCI_IOV
83b07f2ebcSYinghai Lu	help
84b07f2ebcSYinghai Lu	  Say Y here if you want the PCI core to detect if PCI resource
85b07f2ebcSYinghai Lu	  re-allocation needs to be enabled. You can always use pci=realloc=on
86ad581f86SSascha El-Sharkawy	  or pci=realloc=off to override it.  It will automatically
87ad581f86SSascha El-Sharkawy	  re-allocate PCI resources if SR-IOV BARs have not been allocated by
88ad581f86SSascha El-Sharkawy	  the BIOS.
89b07f2ebcSYinghai Lu
90b07f2ebcSYinghai Lu	  When in doubt, say N.
91b07f2ebcSYinghai Lu
92c70e0d9dSChris Wrightconfig PCI_STUB
93c70e0d9dSChris Wright	tristate "PCI Stub driver"
94c70e0d9dSChris Wright	help
95c70e0d9dSChris Wright	  Say Y or M here if you want be able to reserve a PCI device
96c70e0d9dSChris Wright	  when it is going to be assigned to a guest operating system.
97c70e0d9dSChris Wright
98c70e0d9dSChris Wright	  When in doubt, say N.
99c70e0d9dSChris Wright
100a8ccf8a6SAlexander Duyckconfig PCI_PF_STUB
101a8ccf8a6SAlexander Duyck	tristate "PCI PF Stub driver"
102a8ccf8a6SAlexander Duyck	depends on PCI_IOV
103a8ccf8a6SAlexander Duyck	help
104a8ccf8a6SAlexander Duyck	  Say Y or M here if you want to enable support for devices that
1054a57f58fSRandy Dunlap	  require SR-IOV support, while at the same time the PF (Physical
1064a57f58fSRandy Dunlap	  Function) itself is not providing any actual services on the
1074a57f58fSRandy Dunlap	  host itself such as storage or networking.
108a8ccf8a6SAlexander Duyck
109a8ccf8a6SAlexander Duyck	  When in doubt, say N.
110a8ccf8a6SAlexander Duyck
111956a9202SRyan Wilsonconfig XEN_PCIDEV_FRONTEND
112956a9202SRyan Wilson	tristate "Xen PCI Frontend"
113e243ae95SJan Beulich	depends on XEN_PV
114956a9202SRyan Wilson	select PCI_XEN
115fce263c1SKonrad Rzeszutek Wilk	select XEN_XENBUS_FRONTEND
116956a9202SRyan Wilson	default y
117956a9202SRyan Wilson	help
118956a9202SRyan Wilson	  The PCI device frontend driver allows the kernel to import arbitrary
119956a9202SRyan Wilson	  PCI devices from a PCI backend to support PCI driver domains.
120956a9202SRyan Wilson
121db3c33c6SJoerg Roedelconfig PCI_ATS
122db3c33c6SJoerg Roedel	bool
123db3c33c6SJoerg Roedel
12435ff9477SJayachandran Cconfig PCI_ECAM
12535ff9477SJayachandran C	bool
12635ff9477SJayachandran C
127714fe383SThomas Gleixnerconfig PCI_LOCKLESS_CONFIG
128714fe383SThomas Gleixner	bool
129714fe383SThomas Gleixner
13023a5fba4SThomas Petazzoniconfig PCI_BRIDGE_EMUL
13123a5fba4SThomas Petazzoni	bool
13223a5fba4SThomas Petazzoni
133d1b054daSYu Zhaoconfig PCI_IOV
134d1b054daSYu Zhao	bool "PCI IOV support"
135db3c33c6SJoerg Roedel	select PCI_ATS
136d1b054daSYu Zhao	help
137d1b054daSYu Zhao	  I/O Virtualization is a PCI feature supported by some devices
138d1b054daSYu Zhao	  which allows them to create virtual devices which share their
139d1b054daSYu Zhao	  physical resources.
140d1b054daSYu Zhao
141d1b054daSYu Zhao	  If unsure, say N.
142204d49a5SBjorn Helgaas
143c320b976SJoerg Roedelconfig PCI_PRI
144c320b976SJoerg Roedel	bool "PCI PRI support"
145c320b976SJoerg Roedel	select PCI_ATS
146c320b976SJoerg Roedel	help
147c320b976SJoerg Roedel	  PRI is the PCI Page Request Interface. It allows PCI devices that are
148c320b976SJoerg Roedel	  behind an IOMMU to recover from page faults.
149c320b976SJoerg Roedel
150c320b976SJoerg Roedel	  If unsure, say N.
151c320b976SJoerg Roedel
152086ac11fSJoerg Roedelconfig PCI_PASID
153086ac11fSJoerg Roedel	bool "PCI PASID support"
154086ac11fSJoerg Roedel	select PCI_ATS
155086ac11fSJoerg Roedel	help
156086ac11fSJoerg Roedel	  Process Address Space Identifiers (PASIDs) can be used by PCI devices
157086ac11fSJoerg Roedel	  to access more than one IO address space at the same time. To make
158086ac11fSJoerg Roedel	  use of this feature an IOMMU is required which also supports PASIDs.
159086ac11fSJoerg Roedel	  Select this option if you have such an IOMMU and want to compile the
160086ac11fSJoerg Roedel	  driver for it into your kernel.
161086ac11fSJoerg Roedel
162086ac11fSJoerg Roedel	  If unsure, say N.
163086ac11fSJoerg Roedel
16452916982SLogan Gunthorpeconfig PCI_P2PDMA
16552916982SLogan Gunthorpe	bool "PCI peer-to-peer transfer support"
1662e8cb2cfSRob Herring	depends on ZONE_DEVICE
16752916982SLogan Gunthorpe	select GENERIC_ALLOCATOR
16852916982SLogan Gunthorpe	help
16952916982SLogan Gunthorpe	  Enableѕ drivers to do PCI peer-to-peer transactions to and from
17052916982SLogan Gunthorpe	  BARs that are exposed in other devices that are the part of
17152916982SLogan Gunthorpe	  the hierarchy where peer-to-peer DMA is guaranteed by the PCI
17252916982SLogan Gunthorpe	  specification to work (ie. anything below a single PCI bridge).
17352916982SLogan Gunthorpe
17452916982SLogan Gunthorpe	  Many PCIe root complexes do not support P2P transactions and
17552916982SLogan Gunthorpe	  it's hard to tell which support it at all, so at this time,
176d1bbf38aSBjorn Helgaas	  P2P DMA transactions must be between devices behind the same root
17752916982SLogan Gunthorpe	  port.
17852916982SLogan Gunthorpe
17952916982SLogan Gunthorpe	  If unsure, say N.
18052916982SLogan Gunthorpe
1818a226e00SRandy Dunlapconfig PCI_LABEL
1828a226e00SRandy Dunlap	def_bool y if (DMI || ACPI)
1838a226e00SRandy Dunlap	select NLS
18445361a4fSThomas Petazzoni
1854daace0dSJake Oshinsconfig PCI_HYPERV
1864daace0dSJake Oshins	tristate "Hyper-V PCI Frontend"
187d9932b46SSunil Muthuswamy	depends on ((X86 && X86_64) || ARM64) && HYPERV && PCI_MSI && PCI_MSI_IRQ_DOMAIN && SYSFS
188348dd93eSHaiyang Zhang	select PCI_HYPERV_INTERFACE
1894daace0dSJake Oshins	help
1904daace0dSJake Oshins	  The PCI device frontend driver allows the kernel to import arbitrary
1914daace0dSJake Oshins	  PCI devices from a PCI backend to support PCI driver domains.
1924daace0dSJake Oshins
193b0e85c3cSJim Quinlanchoice
194b0e85c3cSJim Quinlan	prompt "PCI Express hierarchy optimization setting"
195b0e85c3cSJim Quinlan	default PCIE_BUS_DEFAULT
196b0e85c3cSJim Quinlan	depends on PCI && EXPERT
197b0e85c3cSJim Quinlan	help
198b0e85c3cSJim Quinlan	  MPS (Max Payload Size) and MRRS (Max Read Request Size) are PCIe
199b0e85c3cSJim Quinlan	  device parameters that affect performance and the ability to
200b0e85c3cSJim Quinlan	  support hotplug and peer-to-peer DMA.
201b0e85c3cSJim Quinlan
202b0e85c3cSJim Quinlan	  The following choices set the MPS and MRRS optimization strategy
203b0e85c3cSJim Quinlan	  at compile-time.  The choices are the same as those offered for
204b0e85c3cSJim Quinlan	  the kernel command-line parameter 'pci', i.e.,
205b0e85c3cSJim Quinlan	  'pci=pcie_bus_tune_off', 'pci=pcie_bus_safe',
206b0e85c3cSJim Quinlan	  'pci=pcie_bus_perf', and 'pci=pcie_bus_peer2peer'.
207b0e85c3cSJim Quinlan
208b0e85c3cSJim Quinlan	  This is a compile-time setting and can be overridden by the above
209b0e85c3cSJim Quinlan	  command-line parameters.  If unsure, choose PCIE_BUS_DEFAULT.
210b0e85c3cSJim Quinlan
211b0e85c3cSJim Quinlanconfig PCIE_BUS_TUNE_OFF
212b0e85c3cSJim Quinlan	bool "Tune Off"
213b0e85c3cSJim Quinlan	depends on PCI
214b0e85c3cSJim Quinlan	help
215b0e85c3cSJim Quinlan	  Use the BIOS defaults; don't touch MPS at all.  This is the same
216b0e85c3cSJim Quinlan	  as booting with 'pci=pcie_bus_tune_off'.
217b0e85c3cSJim Quinlan
218b0e85c3cSJim Quinlanconfig PCIE_BUS_DEFAULT
219b0e85c3cSJim Quinlan	bool "Default"
220b0e85c3cSJim Quinlan	depends on PCI
221b0e85c3cSJim Quinlan	help
222b0e85c3cSJim Quinlan	  Default choice; ensure that the MPS matches upstream bridge.
223b0e85c3cSJim Quinlan
224b0e85c3cSJim Quinlanconfig PCIE_BUS_SAFE
225b0e85c3cSJim Quinlan	bool "Safe"
226b0e85c3cSJim Quinlan	depends on PCI
227b0e85c3cSJim Quinlan	help
228b0e85c3cSJim Quinlan	  Use largest MPS that boot-time devices support.  If you have a
229b0e85c3cSJim Quinlan	  closed system with no possibility of adding new devices, this
230b0e85c3cSJim Quinlan	  will use the largest MPS that's supported by all devices.  This
231b0e85c3cSJim Quinlan	  is the same as booting with 'pci=pcie_bus_safe'.
232b0e85c3cSJim Quinlan
233b0e85c3cSJim Quinlanconfig PCIE_BUS_PERFORMANCE
234b0e85c3cSJim Quinlan	bool "Performance"
235b0e85c3cSJim Quinlan	depends on PCI
236b0e85c3cSJim Quinlan	help
237b0e85c3cSJim Quinlan	  Use MPS and MRRS for best performance.  Ensure that a given
238b0e85c3cSJim Quinlan	  device's MPS is no larger than its parent MPS, which allows us to
239b0e85c3cSJim Quinlan	  keep all switches/bridges to the max MPS supported by their
240b0e85c3cSJim Quinlan	  parent.  This is the same as booting with 'pci=pcie_bus_perf'.
241b0e85c3cSJim Quinlan
242b0e85c3cSJim Quinlanconfig PCIE_BUS_PEER2PEER
243b0e85c3cSJim Quinlan	bool "Peer2peer"
244b0e85c3cSJim Quinlan	depends on PCI
245b0e85c3cSJim Quinlan	help
246b0e85c3cSJim Quinlan	  Set MPS = 128 for all devices.  MPS configuration effected by the
247b0e85c3cSJim Quinlan	  other options could cause the MPS on one root port to be
248b0e85c3cSJim Quinlan	  different than that of the MPS on another, which may cause
249b0e85c3cSJim Quinlan	  hot-added devices or peer-to-peer DMA to fail.  Set MPS to the
250b0e85c3cSJim Quinlan	  smallest possible value (128B) system-wide to avoid these issues.
251b0e85c3cSJim Quinlan	  This is the same as booting with 'pci=pcie_bus_peer2peer'.
252b0e85c3cSJim Quinlan
253b0e85c3cSJim Quinlanendchoice
254b0e85c3cSJim Quinlan
255*1d38fe6eSBjorn Helgaasconfig VGA_ARB
256*1d38fe6eSBjorn Helgaas	bool "VGA Arbitration" if EXPERT
257*1d38fe6eSBjorn Helgaas	default y
258*1d38fe6eSBjorn Helgaas	depends on (PCI && !S390)
259*1d38fe6eSBjorn Helgaas	help
260*1d38fe6eSBjorn Helgaas	  Some "legacy" VGA devices implemented on PCI typically have the same
261*1d38fe6eSBjorn Helgaas	  hard-decoded addresses as they did on ISA. When multiple PCI devices
262*1d38fe6eSBjorn Helgaas	  are accessed at same time they need some kind of coordination. Please
263*1d38fe6eSBjorn Helgaas	  see Documentation/gpu/vgaarbiter.rst for more details. Select this to
264*1d38fe6eSBjorn Helgaas	  enable VGA arbiter.
265*1d38fe6eSBjorn Helgaas
266*1d38fe6eSBjorn Helgaasconfig VGA_ARB_MAX_GPUS
267*1d38fe6eSBjorn Helgaas	int "Maximum number of GPUs"
268*1d38fe6eSBjorn Helgaas	default 16
269*1d38fe6eSBjorn Helgaas	depends on VGA_ARB
270*1d38fe6eSBjorn Helgaas	help
271*1d38fe6eSBjorn Helgaas	  Reserves space in the kernel to maintain resource locking for
272*1d38fe6eSBjorn Helgaas	  multiple GPUS.  The overhead for each GPU is very small.
273*1d38fe6eSBjorn Helgaas
27430b5b880STero Roponensource "drivers/pci/hotplug/Kconfig"
2756e0832faSShawn Linsource "drivers/pci/controller/Kconfig"
2765e8cb403SKishon Vijay Abraham Isource "drivers/pci/endpoint/Kconfig"
277080b47deSLogan Gunthorpesource "drivers/pci/switch/Kconfig"
2782e8cb2cfSRob Herring
2792e8cb2cfSRob Herringendif
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