1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * Support for common PCI multi-I/O cards (which is most of them) 4 * 5 * Copyright (C) 2001 Tim Waugh <twaugh@redhat.com> 6 * 7 * Multi-function PCI cards are supposed to present separate logical 8 * devices on the bus. A common thing to do seems to be to just use 9 * one logical device with lots of base address registers for both 10 * parallel ports and serial ports. This driver is for dealing with 11 * that. 12 */ 13 14 #include <linux/interrupt.h> 15 #include <linux/module.h> 16 #include <linux/parport.h> 17 #include <linux/parport_pc.h> 18 #include <linux/pci.h> 19 #include <linux/slab.h> 20 #include <linux/types.h> 21 22 #include <linux/8250_pci.h> 23 24 enum parport_pc_pci_cards { 25 titan_110l = 0, 26 titan_210l, 27 netmos_9xx5_combo, 28 netmos_9855, 29 netmos_9855_2p, 30 netmos_9900, 31 netmos_9900_2p, 32 netmos_99xx_1p, 33 avlab_1s1p, 34 avlab_1s2p, 35 avlab_2s1p, 36 siig_1s1p_10x, 37 siig_2s1p_10x, 38 siig_2p1s_20x, 39 siig_1s1p_20x, 40 siig_2s1p_20x, 41 timedia_4078a, 42 timedia_4079h, 43 timedia_4085h, 44 timedia_4088a, 45 timedia_4089a, 46 timedia_4095a, 47 timedia_4096a, 48 timedia_4078u, 49 timedia_4079a, 50 timedia_4085u, 51 timedia_4079r, 52 timedia_4079s, 53 timedia_4079d, 54 timedia_4079e, 55 timedia_4079f, 56 timedia_9079a, 57 timedia_9079b, 58 timedia_9079c, 59 wch_ch353_1s1p, 60 wch_ch353_2s1p, 61 wch_ch382_2s1p, 62 brainboxes_5s1p, 63 sunix_2s1p, 64 }; 65 66 /* each element directly indexed from enum list, above */ 67 struct parport_pc_pci { 68 int numports; 69 struct { /* BAR (base address registers) numbers in the config 70 space header */ 71 int lo; 72 int hi; /* -1 if not there, >6 for offset-method (max 73 BAR is 6) */ 74 } addr[4]; 75 76 /* If set, this is called immediately after pci_enable_device. 77 * If it returns non-zero, no probing will take place and the 78 * ports will not be used. */ 79 int (*preinit_hook) (struct pci_dev *pdev, struct parport_pc_pci *card, 80 int autoirq, int autodma); 81 82 /* If set, this is called after probing for ports. If 'failed' 83 * is non-zero we couldn't use any of the ports. */ 84 void (*postinit_hook) (struct pci_dev *pdev, 85 struct parport_pc_pci *card, int failed); 86 }; 87 88 static int netmos_parallel_init(struct pci_dev *dev, struct parport_pc_pci *par, 89 int autoirq, int autodma) 90 { 91 /* the rule described below doesn't hold for this device */ 92 if (dev->device == PCI_DEVICE_ID_NETMOS_9835 && 93 dev->subsystem_vendor == PCI_VENDOR_ID_IBM && 94 dev->subsystem_device == 0x0299) 95 return -ENODEV; 96 97 if (dev->device == PCI_DEVICE_ID_NETMOS_9912) { 98 par->numports = 1; 99 } else { 100 /* 101 * Netmos uses the subdevice ID to indicate the number of parallel 102 * and serial ports. The form is 0x00PS, where <P> is the number of 103 * parallel ports and <S> is the number of serial ports. 104 */ 105 par->numports = (dev->subsystem_device & 0xf0) >> 4; 106 if (par->numports > ARRAY_SIZE(par->addr)) 107 par->numports = ARRAY_SIZE(par->addr); 108 } 109 110 return 0; 111 } 112 113 static struct parport_pc_pci cards[] = { 114 /* titan_110l */ { 1, { { 3, -1 }, } }, 115 /* titan_210l */ { 1, { { 3, -1 }, } }, 116 /* netmos_9xx5_combo */ { 1, { { 2, -1 }, }, netmos_parallel_init }, 117 /* netmos_9855 */ { 1, { { 0, -1 }, }, netmos_parallel_init }, 118 /* netmos_9855_2p */ { 2, { { 0, -1 }, { 2, -1 }, } }, 119 /* netmos_9900 */ {1, { { 3, 4 }, }, netmos_parallel_init }, 120 /* netmos_9900_2p */ {2, { { 0, 1 }, { 3, 4 }, } }, 121 /* netmos_99xx_1p */ {1, { { 0, 1 }, } }, 122 /* avlab_1s1p */ { 1, { { 1, 2}, } }, 123 /* avlab_1s2p */ { 2, { { 1, 2}, { 3, 4 },} }, 124 /* avlab_2s1p */ { 1, { { 2, 3}, } }, 125 /* siig_1s1p_10x */ { 1, { { 3, 4 }, } }, 126 /* siig_2s1p_10x */ { 1, { { 4, 5 }, } }, 127 /* siig_2p1s_20x */ { 2, { { 1, 2 }, { 3, 4 }, } }, 128 /* siig_1s1p_20x */ { 1, { { 1, 2 }, } }, 129 /* siig_2s1p_20x */ { 1, { { 2, 3 }, } }, 130 /* timedia_4078a */ { 1, { { 2, -1 }, } }, 131 /* timedia_4079h */ { 1, { { 2, 3 }, } }, 132 /* timedia_4085h */ { 2, { { 2, -1 }, { 4, -1 }, } }, 133 /* timedia_4088a */ { 2, { { 2, 3 }, { 4, 5 }, } }, 134 /* timedia_4089a */ { 2, { { 2, 3 }, { 4, 5 }, } }, 135 /* timedia_4095a */ { 2, { { 2, 3 }, { 4, 5 }, } }, 136 /* timedia_4096a */ { 2, { { 2, 3 }, { 4, 5 }, } }, 137 /* timedia_4078u */ { 1, { { 2, -1 }, } }, 138 /* timedia_4079a */ { 1, { { 2, 3 }, } }, 139 /* timedia_4085u */ { 2, { { 2, -1 }, { 4, -1 }, } }, 140 /* timedia_4079r */ { 1, { { 2, 3 }, } }, 141 /* timedia_4079s */ { 1, { { 2, 3 }, } }, 142 /* timedia_4079d */ { 1, { { 2, 3 }, } }, 143 /* timedia_4079e */ { 1, { { 2, 3 }, } }, 144 /* timedia_4079f */ { 1, { { 2, 3 }, } }, 145 /* timedia_9079a */ { 1, { { 2, 3 }, } }, 146 /* timedia_9079b */ { 1, { { 2, 3 }, } }, 147 /* timedia_9079c */ { 1, { { 2, 3 }, } }, 148 /* wch_ch353_1s1p*/ { 1, { { 1, -1}, } }, 149 /* wch_ch353_2s1p*/ { 1, { { 2, -1}, } }, 150 /* wch_ch382_2s1p*/ { 1, { { 2, -1}, } }, 151 /* brainboxes_5s1p */ { 1, { { 3, -1 }, } }, 152 /* sunix_2s1p */ { 1, { { 3, -1 }, } }, 153 }; 154 155 static struct pci_device_id parport_serial_pci_tbl[] = { 156 /* PCI cards */ 157 { PCI_VENDOR_ID_TITAN, PCI_DEVICE_ID_TITAN_110L, 158 PCI_ANY_ID, PCI_ANY_ID, 0, 0, titan_110l }, 159 { PCI_VENDOR_ID_TITAN, PCI_DEVICE_ID_TITAN_210L, 160 PCI_ANY_ID, PCI_ANY_ID, 0, 0, titan_210l }, 161 { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9735, 162 PCI_ANY_ID, PCI_ANY_ID, 0, 0, netmos_9xx5_combo }, 163 { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9745, 164 PCI_ANY_ID, PCI_ANY_ID, 0, 0, netmos_9xx5_combo }, 165 { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9835, 166 PCI_ANY_ID, PCI_ANY_ID, 0, 0, netmos_9xx5_combo }, 167 { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9845, 168 PCI_ANY_ID, PCI_ANY_ID, 0, 0, netmos_9xx5_combo }, 169 { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9855, 170 0x1000, 0x0020, 0, 0, netmos_9855_2p }, 171 { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9855, 172 0x1000, 0x0022, 0, 0, netmos_9855_2p }, 173 { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9855, 174 PCI_ANY_ID, PCI_ANY_ID, 0, 0, netmos_9855 }, 175 { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9900, 176 0xA000, 0x3011, 0, 0, netmos_9900 }, 177 { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9900, 178 0xA000, 0x3012, 0, 0, netmos_9900 }, 179 { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9900, 180 0xA000, 0x3020, 0, 0, netmos_9900_2p }, 181 { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9912, 182 0xA000, 0x2000, 0, 0, netmos_99xx_1p }, 183 /* PCI_VENDOR_ID_AVLAB/Intek21 has another bunch of cards ...*/ 184 { PCI_VENDOR_ID_AFAVLAB, 0x2110, 185 PCI_ANY_ID, PCI_ANY_ID, 0, 0, avlab_1s1p }, 186 { PCI_VENDOR_ID_AFAVLAB, 0x2111, 187 PCI_ANY_ID, PCI_ANY_ID, 0, 0, avlab_1s1p }, 188 { PCI_VENDOR_ID_AFAVLAB, 0x2112, 189 PCI_ANY_ID, PCI_ANY_ID, 0, 0, avlab_1s1p }, 190 { PCI_VENDOR_ID_AFAVLAB, 0x2140, 191 PCI_ANY_ID, PCI_ANY_ID, 0, 0, avlab_1s2p }, 192 { PCI_VENDOR_ID_AFAVLAB, 0x2141, 193 PCI_ANY_ID, PCI_ANY_ID, 0, 0, avlab_1s2p }, 194 { PCI_VENDOR_ID_AFAVLAB, 0x2142, 195 PCI_ANY_ID, PCI_ANY_ID, 0, 0, avlab_1s2p }, 196 { PCI_VENDOR_ID_AFAVLAB, 0x2160, 197 PCI_ANY_ID, PCI_ANY_ID, 0, 0, avlab_2s1p }, 198 { PCI_VENDOR_ID_AFAVLAB, 0x2161, 199 PCI_ANY_ID, PCI_ANY_ID, 0, 0, avlab_2s1p }, 200 { PCI_VENDOR_ID_AFAVLAB, 0x2162, 201 PCI_ANY_ID, PCI_ANY_ID, 0, 0, avlab_2s1p }, 202 { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_1S1P_10x_550, 203 PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_1s1p_10x }, 204 { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_1S1P_10x_650, 205 PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_1s1p_10x }, 206 { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_1S1P_10x_850, 207 PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_1s1p_10x }, 208 { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_2S1P_10x_550, 209 PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_2s1p_10x }, 210 { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_2S1P_10x_650, 211 PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_2s1p_10x }, 212 { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_2S1P_10x_850, 213 PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_2s1p_10x }, 214 { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_2P1S_20x_550, 215 PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_2p1s_20x }, 216 { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_2P1S_20x_650, 217 PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_2p1s_20x }, 218 { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_2P1S_20x_850, 219 PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_2p1s_20x }, 220 { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_1S1P_20x_550, 221 PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_2s1p_20x }, 222 { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_1S1P_20x_650, 223 PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_1s1p_20x }, 224 { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_1S1P_20x_850, 225 PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_1s1p_20x }, 226 { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_2S1P_20x_550, 227 PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_2s1p_20x }, 228 { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_2S1P_20x_650, 229 PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_2s1p_20x }, 230 { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_2S1P_20x_850, 231 PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_2s1p_20x }, 232 /* PCI_VENDOR_ID_TIMEDIA/SUNIX has many differing cards ...*/ 233 { 0x1409, 0x7168, 0x1409, 0x4078, 0, 0, timedia_4078a }, 234 { 0x1409, 0x7168, 0x1409, 0x4079, 0, 0, timedia_4079h }, 235 { 0x1409, 0x7168, 0x1409, 0x4085, 0, 0, timedia_4085h }, 236 { 0x1409, 0x7168, 0x1409, 0x4088, 0, 0, timedia_4088a }, 237 { 0x1409, 0x7168, 0x1409, 0x4089, 0, 0, timedia_4089a }, 238 { 0x1409, 0x7168, 0x1409, 0x4095, 0, 0, timedia_4095a }, 239 { 0x1409, 0x7168, 0x1409, 0x4096, 0, 0, timedia_4096a }, 240 { 0x1409, 0x7168, 0x1409, 0x5078, 0, 0, timedia_4078u }, 241 { 0x1409, 0x7168, 0x1409, 0x5079, 0, 0, timedia_4079a }, 242 { 0x1409, 0x7168, 0x1409, 0x5085, 0, 0, timedia_4085u }, 243 { 0x1409, 0x7168, 0x1409, 0x6079, 0, 0, timedia_4079r }, 244 { 0x1409, 0x7168, 0x1409, 0x7079, 0, 0, timedia_4079s }, 245 { 0x1409, 0x7168, 0x1409, 0x8079, 0, 0, timedia_4079d }, 246 { 0x1409, 0x7168, 0x1409, 0x9079, 0, 0, timedia_4079e }, 247 { 0x1409, 0x7168, 0x1409, 0xa079, 0, 0, timedia_4079f }, 248 { 0x1409, 0x7168, 0x1409, 0xb079, 0, 0, timedia_9079a }, 249 { 0x1409, 0x7168, 0x1409, 0xc079, 0, 0, timedia_9079b }, 250 { 0x1409, 0x7168, 0x1409, 0xd079, 0, 0, timedia_9079c }, 251 252 /* WCH CARDS */ 253 { 0x4348, 0x5053, PCI_ANY_ID, PCI_ANY_ID, 0, 0, wch_ch353_1s1p}, 254 { 0x4348, 0x7053, 0x4348, 0x3253, 0, 0, wch_ch353_2s1p}, 255 { 0x1c00, 0x3250, 0x1c00, 0x3250, 0, 0, wch_ch382_2s1p}, 256 257 /* BrainBoxes PX272/PX306 MIO card */ 258 { PCI_VENDOR_ID_INTASHIELD, 0x4100, 259 PCI_ANY_ID, PCI_ANY_ID, 0, 0, brainboxes_5s1p }, 260 261 /* 262 * More SUNIX variations. At least one of these has part number 263 * '5079A but subdevice 0x102. That board reports 0x0708 as 264 * its PCI Class. 265 */ 266 { PCI_VENDOR_ID_SUNIX, PCI_DEVICE_ID_SUNIX_1999, PCI_VENDOR_ID_SUNIX, 267 0x0102, 0, 0, sunix_2s1p }, 268 269 { 0, } /* terminate list */ 270 }; 271 MODULE_DEVICE_TABLE(pci,parport_serial_pci_tbl); 272 273 /* 274 * This table describes the serial "geometry" of these boards. Any 275 * quirks for these can be found in drivers/serial/8250_pci.c 276 * 277 * Cards not tested are marked n/t 278 * If you have one of these cards and it works for you, please tell me.. 279 */ 280 static struct pciserial_board pci_parport_serial_boards[] = { 281 [titan_110l] = { 282 .flags = FL_BASE1 | FL_BASE_BARS, 283 .num_ports = 1, 284 .base_baud = 921600, 285 .uart_offset = 8, 286 }, 287 [titan_210l] = { 288 .flags = FL_BASE1 | FL_BASE_BARS, 289 .num_ports = 2, 290 .base_baud = 921600, 291 .uart_offset = 8, 292 }, 293 [netmos_9xx5_combo] = { 294 .flags = FL_BASE0 | FL_BASE_BARS, 295 .num_ports = 1, 296 .base_baud = 115200, 297 .uart_offset = 8, 298 }, 299 [netmos_9855] = { 300 .flags = FL_BASE2 | FL_BASE_BARS, 301 .num_ports = 1, 302 .base_baud = 115200, 303 .uart_offset = 8, 304 }, 305 [netmos_9855_2p] = { 306 .flags = FL_BASE4 | FL_BASE_BARS, 307 .num_ports = 1, 308 .base_baud = 115200, 309 .uart_offset = 8, 310 }, 311 [netmos_9900] = { /* n/t */ 312 .flags = FL_BASE0 | FL_BASE_BARS, 313 .num_ports = 1, 314 .base_baud = 115200, 315 .uart_offset = 8, 316 }, 317 [netmos_9900_2p] = { /* parallel only */ /* n/t */ 318 .flags = FL_BASE0, 319 .num_ports = 0, 320 .base_baud = 115200, 321 .uart_offset = 8, 322 }, 323 [netmos_99xx_1p] = { /* parallel only */ /* n/t */ 324 .flags = FL_BASE0, 325 .num_ports = 0, 326 .base_baud = 115200, 327 .uart_offset = 8, 328 }, 329 [avlab_1s1p] = { /* n/t */ 330 .flags = FL_BASE0 | FL_BASE_BARS, 331 .num_ports = 1, 332 .base_baud = 115200, 333 .uart_offset = 8, 334 }, 335 [avlab_1s2p] = { /* n/t */ 336 .flags = FL_BASE0 | FL_BASE_BARS, 337 .num_ports = 1, 338 .base_baud = 115200, 339 .uart_offset = 8, 340 }, 341 [avlab_2s1p] = { /* n/t */ 342 .flags = FL_BASE0 | FL_BASE_BARS, 343 .num_ports = 2, 344 .base_baud = 115200, 345 .uart_offset = 8, 346 }, 347 [siig_1s1p_10x] = { 348 .flags = FL_BASE2, 349 .num_ports = 1, 350 .base_baud = 460800, 351 .uart_offset = 8, 352 }, 353 [siig_2s1p_10x] = { 354 .flags = FL_BASE2, 355 .num_ports = 1, 356 .base_baud = 921600, 357 .uart_offset = 8, 358 }, 359 [siig_2p1s_20x] = { 360 .flags = FL_BASE0, 361 .num_ports = 1, 362 .base_baud = 921600, 363 .uart_offset = 8, 364 }, 365 [siig_1s1p_20x] = { 366 .flags = FL_BASE0, 367 .num_ports = 1, 368 .base_baud = 921600, 369 .uart_offset = 8, 370 }, 371 [siig_2s1p_20x] = { 372 .flags = FL_BASE0, 373 .num_ports = 1, 374 .base_baud = 921600, 375 .uart_offset = 8, 376 }, 377 [timedia_4078a] = { 378 .flags = FL_BASE0|FL_BASE_BARS, 379 .num_ports = 1, 380 .base_baud = 921600, 381 .uart_offset = 8, 382 }, 383 [timedia_4079h] = { 384 .flags = FL_BASE0|FL_BASE_BARS, 385 .num_ports = 1, 386 .base_baud = 921600, 387 .uart_offset = 8, 388 }, 389 [timedia_4085h] = { 390 .flags = FL_BASE0|FL_BASE_BARS, 391 .num_ports = 1, 392 .base_baud = 921600, 393 .uart_offset = 8, 394 }, 395 [timedia_4088a] = { 396 .flags = FL_BASE0|FL_BASE_BARS, 397 .num_ports = 1, 398 .base_baud = 921600, 399 .uart_offset = 8, 400 }, 401 [timedia_4089a] = { 402 .flags = FL_BASE0|FL_BASE_BARS, 403 .num_ports = 1, 404 .base_baud = 921600, 405 .uart_offset = 8, 406 }, 407 [timedia_4095a] = { 408 .flags = FL_BASE0|FL_BASE_BARS, 409 .num_ports = 1, 410 .base_baud = 921600, 411 .uart_offset = 8, 412 }, 413 [timedia_4096a] = { 414 .flags = FL_BASE0|FL_BASE_BARS, 415 .num_ports = 1, 416 .base_baud = 921600, 417 .uart_offset = 8, 418 }, 419 [timedia_4078u] = { 420 .flags = FL_BASE0|FL_BASE_BARS, 421 .num_ports = 1, 422 .base_baud = 921600, 423 .uart_offset = 8, 424 }, 425 [timedia_4079a] = { 426 .flags = FL_BASE0|FL_BASE_BARS, 427 .num_ports = 1, 428 .base_baud = 921600, 429 .uart_offset = 8, 430 }, 431 [timedia_4085u] = { 432 .flags = FL_BASE0|FL_BASE_BARS, 433 .num_ports = 1, 434 .base_baud = 921600, 435 .uart_offset = 8, 436 }, 437 [timedia_4079r] = { 438 .flags = FL_BASE0|FL_BASE_BARS, 439 .num_ports = 1, 440 .base_baud = 921600, 441 .uart_offset = 8, 442 }, 443 [timedia_4079s] = { 444 .flags = FL_BASE0|FL_BASE_BARS, 445 .num_ports = 1, 446 .base_baud = 921600, 447 .uart_offset = 8, 448 }, 449 [timedia_4079d] = { 450 .flags = FL_BASE0|FL_BASE_BARS, 451 .num_ports = 1, 452 .base_baud = 921600, 453 .uart_offset = 8, 454 }, 455 [timedia_4079e] = { 456 .flags = FL_BASE0|FL_BASE_BARS, 457 .num_ports = 1, 458 .base_baud = 921600, 459 .uart_offset = 8, 460 }, 461 [timedia_4079f] = { 462 .flags = FL_BASE0|FL_BASE_BARS, 463 .num_ports = 1, 464 .base_baud = 921600, 465 .uart_offset = 8, 466 }, 467 [timedia_9079a] = { 468 .flags = FL_BASE0|FL_BASE_BARS, 469 .num_ports = 1, 470 .base_baud = 921600, 471 .uart_offset = 8, 472 }, 473 [timedia_9079b] = { 474 .flags = FL_BASE0|FL_BASE_BARS, 475 .num_ports = 1, 476 .base_baud = 921600, 477 .uart_offset = 8, 478 }, 479 [timedia_9079c] = { 480 .flags = FL_BASE0|FL_BASE_BARS, 481 .num_ports = 1, 482 .base_baud = 921600, 483 .uart_offset = 8, 484 }, 485 [wch_ch353_1s1p] = { 486 .flags = FL_BASE0|FL_BASE_BARS, 487 .num_ports = 1, 488 .base_baud = 115200, 489 .uart_offset = 8, 490 }, 491 [wch_ch353_2s1p] = { 492 .flags = FL_BASE0|FL_BASE_BARS, 493 .num_ports = 2, 494 .base_baud = 115200, 495 .uart_offset = 8, 496 }, 497 [wch_ch382_2s1p] = { 498 .flags = FL_BASE0, 499 .num_ports = 2, 500 .base_baud = 115200, 501 .uart_offset = 8, 502 .first_offset = 0xC0, 503 }, 504 [brainboxes_5s1p] = { 505 .flags = FL_BASE2, 506 .num_ports = 5, 507 .base_baud = 921600, 508 .uart_offset = 8, 509 }, 510 [sunix_2s1p] = { 511 .flags = FL_BASE0|FL_BASE_BARS, 512 .num_ports = 2, 513 .base_baud = 921600, 514 .uart_offset = 8, 515 }, 516 }; 517 518 struct parport_serial_private { 519 struct serial_private *serial; 520 int num_par; 521 struct parport *port[PARPORT_MAX]; 522 struct parport_pc_pci par; 523 }; 524 525 /* Register the serial port(s) of a PCI card. */ 526 static int serial_register(struct pci_dev *dev, const struct pci_device_id *id) 527 { 528 struct parport_serial_private *priv = pci_get_drvdata (dev); 529 struct pciserial_board *board; 530 struct serial_private *serial; 531 532 board = &pci_parport_serial_boards[id->driver_data]; 533 if (board->num_ports == 0) 534 return 0; 535 536 serial = pciserial_init_ports(dev, board); 537 if (IS_ERR(serial)) 538 return PTR_ERR(serial); 539 540 priv->serial = serial; 541 return 0; 542 } 543 544 /* Register the parallel port(s) of a PCI card. */ 545 static int parport_register(struct pci_dev *dev, const struct pci_device_id *id) 546 { 547 struct parport_pc_pci *card; 548 struct parport_serial_private *priv = pci_get_drvdata (dev); 549 int n, success = 0; 550 551 priv->par = cards[id->driver_data]; 552 card = &priv->par; 553 if (card->preinit_hook && 554 card->preinit_hook (dev, card, PARPORT_IRQ_NONE, PARPORT_DMA_NONE)) 555 return -ENODEV; 556 557 for (n = 0; n < card->numports; n++) { 558 struct parport *port; 559 int lo = card->addr[n].lo; 560 int hi = card->addr[n].hi; 561 unsigned long io_lo, io_hi; 562 int irq; 563 564 if (priv->num_par == ARRAY_SIZE (priv->port)) { 565 dev_warn(&dev->dev, 566 "only %zu parallel ports supported (%d reported)\n", 567 ARRAY_SIZE(priv->port), card->numports); 568 break; 569 } 570 571 io_lo = pci_resource_start (dev, lo); 572 io_hi = 0; 573 if ((hi >= 0) && (hi <= 6)) 574 io_hi = pci_resource_start (dev, hi); 575 else if (hi > 6) 576 io_lo += hi; /* Reinterpret the meaning of 577 "hi" as an offset (see SYBA 578 def.) */ 579 /* TODO: test if sharing interrupts works */ 580 irq = dev->irq; 581 if (irq == IRQ_NONE) { 582 dev_dbg(&dev->dev, 583 "PCI parallel port detected: I/O at %#lx(%#lx)\n", 584 io_lo, io_hi); 585 irq = PARPORT_IRQ_NONE; 586 } else { 587 dev_dbg(&dev->dev, 588 "PCI parallel port detected: I/O at %#lx(%#lx), IRQ %d\n", 589 io_lo, io_hi, irq); 590 } 591 port = parport_pc_probe_port (io_lo, io_hi, irq, 592 PARPORT_DMA_NONE, &dev->dev, IRQF_SHARED); 593 if (port) { 594 priv->port[priv->num_par++] = port; 595 success = 1; 596 } 597 } 598 599 if (card->postinit_hook) 600 card->postinit_hook (dev, card, !success); 601 602 return 0; 603 } 604 605 static int parport_serial_pci_probe(struct pci_dev *dev, 606 const struct pci_device_id *id) 607 { 608 struct parport_serial_private *priv; 609 int err; 610 611 priv = devm_kzalloc(&dev->dev, sizeof(*priv), GFP_KERNEL); 612 if (!priv) 613 return -ENOMEM; 614 615 pci_set_drvdata (dev, priv); 616 617 err = pcim_enable_device(dev); 618 if (err) 619 return err; 620 621 err = parport_register(dev, id); 622 if (err) 623 return err; 624 625 err = serial_register(dev, id); 626 if (err) { 627 int i; 628 for (i = 0; i < priv->num_par; i++) 629 parport_pc_unregister_port (priv->port[i]); 630 return err; 631 } 632 633 return 0; 634 } 635 636 static void parport_serial_pci_remove(struct pci_dev *dev) 637 { 638 struct parport_serial_private *priv = pci_get_drvdata (dev); 639 int i; 640 641 // Serial ports 642 if (priv->serial) 643 pciserial_remove_ports(priv->serial); 644 645 // Parallel ports 646 for (i = 0; i < priv->num_par; i++) 647 parport_pc_unregister_port (priv->port[i]); 648 649 return; 650 } 651 652 static int __maybe_unused parport_serial_pci_suspend(struct device *dev) 653 { 654 struct pci_dev *pdev = to_pci_dev(dev); 655 struct parport_serial_private *priv = pci_get_drvdata(pdev); 656 657 if (priv->serial) 658 pciserial_suspend_ports(priv->serial); 659 660 /* FIXME: What about parport? */ 661 return 0; 662 } 663 664 static int __maybe_unused parport_serial_pci_resume(struct device *dev) 665 { 666 struct pci_dev *pdev = to_pci_dev(dev); 667 struct parport_serial_private *priv = pci_get_drvdata(pdev); 668 669 if (priv->serial) 670 pciserial_resume_ports(priv->serial); 671 672 /* FIXME: What about parport? */ 673 return 0; 674 } 675 676 static SIMPLE_DEV_PM_OPS(parport_serial_pm_ops, 677 parport_serial_pci_suspend, parport_serial_pci_resume); 678 679 static struct pci_driver parport_serial_pci_driver = { 680 .name = "parport_serial", 681 .id_table = parport_serial_pci_tbl, 682 .probe = parport_serial_pci_probe, 683 .remove = parport_serial_pci_remove, 684 .driver = { 685 .pm = &parport_serial_pm_ops, 686 }, 687 }; 688 module_pci_driver(parport_serial_pci_driver); 689 690 MODULE_AUTHOR("Tim Waugh <twaugh@redhat.com>"); 691 MODULE_DESCRIPTION("Driver for common parallel+serial multi-I/O PCI cards"); 692 MODULE_LICENSE("GPL"); 693