1 /*
2  * Support for common PCI multi-I/O cards (which is most of them)
3  *
4  * Copyright (C) 2001  Tim Waugh <twaugh@redhat.com>
5  *
6  * This program is free software; you can redistribute it and/or
7  * modify it under the terms of the GNU General Public License
8  * as published by the Free Software Foundation; either version
9  * 2 of the License, or (at your option) any later version.
10  *
11  *
12  * Multi-function PCI cards are supposed to present separate logical
13  * devices on the bus.  A common thing to do seems to be to just use
14  * one logical device with lots of base address registers for both
15  * parallel ports and serial ports.  This driver is for dealing with
16  * that.
17  *
18  */
19 
20 #include <linux/types.h>
21 #include <linux/module.h>
22 #include <linux/init.h>
23 #include <linux/slab.h>
24 #include <linux/pci.h>
25 #include <linux/interrupt.h>
26 #include <linux/parport.h>
27 #include <linux/parport_pc.h>
28 #include <linux/8250_pci.h>
29 
30 enum parport_pc_pci_cards {
31 	titan_110l = 0,
32 	titan_210l,
33 	netmos_9xx5_combo,
34 	netmos_9855,
35 	netmos_9855_2p,
36 	netmos_9900,
37 	netmos_9900_2p,
38 	netmos_99xx_1p,
39 	avlab_1s1p,
40 	avlab_1s2p,
41 	avlab_2s1p,
42 	siig_1s1p_10x,
43 	siig_2s1p_10x,
44 	siig_2p1s_20x,
45 	siig_1s1p_20x,
46 	siig_2s1p_20x,
47 	timedia_4078a,
48 	timedia_4079h,
49 	timedia_4085h,
50 	timedia_4088a,
51 	timedia_4089a,
52 	timedia_4095a,
53 	timedia_4096a,
54 	timedia_4078u,
55 	timedia_4079a,
56 	timedia_4085u,
57 	timedia_4079r,
58 	timedia_4079s,
59 	timedia_4079d,
60 	timedia_4079e,
61 	timedia_4079f,
62 	timedia_9079a,
63 	timedia_9079b,
64 	timedia_9079c,
65 	wch_ch353_2s1p,
66 };
67 
68 /* each element directly indexed from enum list, above */
69 struct parport_pc_pci {
70 	int numports;
71 	struct { /* BAR (base address registers) numbers in the config
72                     space header */
73 		int lo;
74 		int hi; /* -1 if not there, >6 for offset-method (max
75                            BAR is 6) */
76 	} addr[4];
77 
78 	/* If set, this is called immediately after pci_enable_device.
79 	 * If it returns non-zero, no probing will take place and the
80 	 * ports will not be used. */
81 	int (*preinit_hook) (struct pci_dev *pdev, struct parport_pc_pci *card,
82 				int autoirq, int autodma);
83 
84 	/* If set, this is called after probing for ports.  If 'failed'
85 	 * is non-zero we couldn't use any of the ports. */
86 	void (*postinit_hook) (struct pci_dev *pdev,
87 				struct parport_pc_pci *card, int failed);
88 };
89 
90 static int __devinit netmos_parallel_init(struct pci_dev *dev, struct parport_pc_pci *par, int autoirq, int autodma)
91 {
92 	/* the rule described below doesn't hold for this device */
93 	if (dev->device == PCI_DEVICE_ID_NETMOS_9835 &&
94 			dev->subsystem_vendor == PCI_VENDOR_ID_IBM &&
95 			dev->subsystem_device == 0x0299)
96 		return -ENODEV;
97 
98 	if (dev->device == PCI_DEVICE_ID_NETMOS_9912) {
99 		par->numports = 1;
100 	} else {
101 		/*
102 		 * Netmos uses the subdevice ID to indicate the number of parallel
103 		 * and serial ports.  The form is 0x00PS, where <P> is the number of
104 		 * parallel ports and <S> is the number of serial ports.
105 		 */
106 		par->numports = (dev->subsystem_device & 0xf0) >> 4;
107 		if (par->numports > ARRAY_SIZE(par->addr))
108 			par->numports = ARRAY_SIZE(par->addr);
109 	}
110 
111 	return 0;
112 }
113 
114 static struct parport_pc_pci cards[] __devinitdata = {
115 	/* titan_110l */		{ 1, { { 3, -1 }, } },
116 	/* titan_210l */		{ 1, { { 3, -1 }, } },
117 	/* netmos_9xx5_combo */		{ 1, { { 2, -1 }, }, netmos_parallel_init },
118 	/* netmos_9855 */		{ 1, { { 0, -1 }, }, netmos_parallel_init },
119 	/* netmos_9855_2p */		{ 2, { { 0, -1 }, { 2, -1 }, } },
120 	/* netmos_9900 */		{1, { { 3, 4 }, }, netmos_parallel_init },
121 	/* netmos_9900_2p */		{2, { { 0, 1 }, { 3, 4 }, } },
122 	/* netmos_99xx_1p */		{1, { { 0, 1 }, } },
123 	/* avlab_1s1p     */		{ 1, { { 1, 2}, } },
124 	/* avlab_1s2p     */		{ 2, { { 1, 2}, { 3, 4 },} },
125 	/* avlab_2s1p     */		{ 1, { { 2, 3}, } },
126 	/* siig_1s1p_10x */		{ 1, { { 3, 4 }, } },
127 	/* siig_2s1p_10x */		{ 1, { { 4, 5 }, } },
128 	/* siig_2p1s_20x */		{ 2, { { 1, 2 }, { 3, 4 }, } },
129 	/* siig_1s1p_20x */		{ 1, { { 1, 2 }, } },
130 	/* siig_2s1p_20x */		{ 1, { { 2, 3 }, } },
131 	/* timedia_4078a */		{ 1, { { 2, -1 }, } },
132 	/* timedia_4079h */             { 1, { { 2, 3 }, } },
133 	/* timedia_4085h */             { 2, { { 2, -1 }, { 4, -1 }, } },
134 	/* timedia_4088a */             { 2, { { 2, 3 }, { 4, 5 }, } },
135 	/* timedia_4089a */             { 2, { { 2, 3 }, { 4, 5 }, } },
136 	/* timedia_4095a */             { 2, { { 2, 3 }, { 4, 5 }, } },
137 	/* timedia_4096a */             { 2, { { 2, 3 }, { 4, 5 }, } },
138 	/* timedia_4078u */             { 1, { { 2, -1 }, } },
139 	/* timedia_4079a */             { 1, { { 2, 3 }, } },
140 	/* timedia_4085u */             { 2, { { 2, -1 }, { 4, -1 }, } },
141 	/* timedia_4079r */             { 1, { { 2, 3 }, } },
142 	/* timedia_4079s */             { 1, { { 2, 3 }, } },
143 	/* timedia_4079d */             { 1, { { 2, 3 }, } },
144 	/* timedia_4079e */             { 1, { { 2, 3 }, } },
145 	/* timedia_4079f */             { 1, { { 2, 3 }, } },
146 	/* timedia_9079a */             { 1, { { 2, 3 }, } },
147 	/* timedia_9079b */             { 1, { { 2, 3 }, } },
148 	/* timedia_9079c */             { 1, { { 2, 3 }, } },
149 	/* wch_ch353_2s1p*/             { 1, { { 2, -1}, } },
150 };
151 
152 static struct pci_device_id parport_serial_pci_tbl[] = {
153 	/* PCI cards */
154 	{ PCI_VENDOR_ID_TITAN, PCI_DEVICE_ID_TITAN_110L,
155 	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, titan_110l },
156 	{ PCI_VENDOR_ID_TITAN, PCI_DEVICE_ID_TITAN_210L,
157 	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, titan_210l },
158 	{ PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9735,
159 	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, netmos_9xx5_combo },
160 	{ PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9745,
161 	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, netmos_9xx5_combo },
162 	{ PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9835,
163 	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, netmos_9xx5_combo },
164 	{ PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9845,
165 	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, netmos_9xx5_combo },
166 	{ PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9855,
167 	  0x1000, 0x0020, 0, 0, netmos_9855_2p },
168 	{ PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9855,
169 	  0x1000, 0x0022, 0, 0, netmos_9855_2p },
170 	{ PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9855,
171 	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, netmos_9855 },
172 	{ PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9900,
173 	  0xA000, 0x3011, 0, 0, netmos_9900 },
174 	{ PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9900,
175 	  0xA000, 0x3012, 0, 0, netmos_9900 },
176 	{ PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9900,
177 	  0xA000, 0x3020, 0, 0, netmos_9900_2p },
178 	{ PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9912,
179 	  0xA000, 0x2000, 0, 0, netmos_99xx_1p },
180 	/* PCI_VENDOR_ID_AVLAB/Intek21 has another bunch of cards ...*/
181 	{ PCI_VENDOR_ID_AFAVLAB, 0x2110,
182 	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, avlab_1s1p },
183 	{ PCI_VENDOR_ID_AFAVLAB, 0x2111,
184 	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, avlab_1s1p },
185 	{ PCI_VENDOR_ID_AFAVLAB, 0x2112,
186 	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, avlab_1s1p },
187 	{ PCI_VENDOR_ID_AFAVLAB, 0x2140,
188 	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, avlab_1s2p },
189 	{ PCI_VENDOR_ID_AFAVLAB, 0x2141,
190 	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, avlab_1s2p },
191 	{ PCI_VENDOR_ID_AFAVLAB, 0x2142,
192 	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, avlab_1s2p },
193 	{ PCI_VENDOR_ID_AFAVLAB, 0x2160,
194 	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, avlab_2s1p },
195 	{ PCI_VENDOR_ID_AFAVLAB, 0x2161,
196 	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, avlab_2s1p },
197 	{ PCI_VENDOR_ID_AFAVLAB, 0x2162,
198 	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, avlab_2s1p },
199 	{ PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_1S1P_10x_550,
200 	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_1s1p_10x },
201 	{ PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_1S1P_10x_650,
202 	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_1s1p_10x },
203 	{ PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_1S1P_10x_850,
204 	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_1s1p_10x },
205 	{ PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_2S1P_10x_550,
206 	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_2s1p_10x },
207 	{ PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_2S1P_10x_650,
208 	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_2s1p_10x },
209 	{ PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_2S1P_10x_850,
210 	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_2s1p_10x },
211 	{ PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_2P1S_20x_550,
212 	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_2p1s_20x },
213 	{ PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_2P1S_20x_650,
214 	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_2p1s_20x },
215 	{ PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_2P1S_20x_850,
216 	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_2p1s_20x },
217 	{ PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_1S1P_20x_550,
218 	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_2s1p_20x },
219 	{ PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_1S1P_20x_650,
220 	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_1s1p_20x },
221 	{ PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_1S1P_20x_850,
222 	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_1s1p_20x },
223 	{ PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_2S1P_20x_550,
224 	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_2s1p_20x },
225 	{ PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_2S1P_20x_650,
226 	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_2s1p_20x },
227 	{ PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_2S1P_20x_850,
228 	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_2s1p_20x },
229 	/* PCI_VENDOR_ID_TIMEDIA/SUNIX has many differing cards ...*/
230 	{ 0x1409, 0x7168, 0x1409, 0x4078, 0, 0, timedia_4078a },
231 	{ 0x1409, 0x7168, 0x1409, 0x4079, 0, 0, timedia_4079h },
232 	{ 0x1409, 0x7168, 0x1409, 0x4085, 0, 0, timedia_4085h },
233 	{ 0x1409, 0x7168, 0x1409, 0x4088, 0, 0, timedia_4088a },
234 	{ 0x1409, 0x7168, 0x1409, 0x4089, 0, 0, timedia_4089a },
235 	{ 0x1409, 0x7168, 0x1409, 0x4095, 0, 0, timedia_4095a },
236 	{ 0x1409, 0x7168, 0x1409, 0x4096, 0, 0, timedia_4096a },
237 	{ 0x1409, 0x7168, 0x1409, 0x5078, 0, 0, timedia_4078u },
238 	{ 0x1409, 0x7168, 0x1409, 0x5079, 0, 0, timedia_4079a },
239 	{ 0x1409, 0x7168, 0x1409, 0x5085, 0, 0, timedia_4085u },
240 	{ 0x1409, 0x7168, 0x1409, 0x6079, 0, 0, timedia_4079r },
241 	{ 0x1409, 0x7168, 0x1409, 0x7079, 0, 0, timedia_4079s },
242 	{ 0x1409, 0x7168, 0x1409, 0x8079, 0, 0, timedia_4079d },
243 	{ 0x1409, 0x7168, 0x1409, 0x9079, 0, 0, timedia_4079e },
244 	{ 0x1409, 0x7168, 0x1409, 0xa079, 0, 0, timedia_4079f },
245 	{ 0x1409, 0x7168, 0x1409, 0xb079, 0, 0, timedia_9079a },
246 	{ 0x1409, 0x7168, 0x1409, 0xc079, 0, 0, timedia_9079b },
247 	{ 0x1409, 0x7168, 0x1409, 0xd079, 0, 0, timedia_9079c },
248 	/* WCH CARDS */
249 	{ 0x4348, 0x7053, 0x4348, 0x3253, 0, 0, wch_ch353_2s1p},
250 	{ 0, } /* terminate list */
251 };
252 MODULE_DEVICE_TABLE(pci,parport_serial_pci_tbl);
253 
254 /*
255  * This table describes the serial "geometry" of these boards.  Any
256  * quirks for these can be found in drivers/serial/8250_pci.c
257  *
258  * Cards not tested are marked n/t
259  * If you have one of these cards and it works for you, please tell me..
260  */
261 static struct pciserial_board pci_parport_serial_boards[] __devinitdata = {
262 	[titan_110l] = {
263 		.flags		= FL_BASE1 | FL_BASE_BARS,
264 		.num_ports	= 1,
265 		.base_baud	= 921600,
266 		.uart_offset	= 8,
267 	},
268 	[titan_210l] = {
269 		.flags		= FL_BASE1 | FL_BASE_BARS,
270 		.num_ports	= 2,
271 		.base_baud	= 921600,
272 		.uart_offset	= 8,
273 	},
274 	[netmos_9xx5_combo] = {
275 		.flags		= FL_BASE0 | FL_BASE_BARS,
276 		.num_ports	= 1,
277 		.base_baud	= 115200,
278 		.uart_offset	= 8,
279 	},
280 	[netmos_9855] = {
281 		.flags		= FL_BASE2 | FL_BASE_BARS,
282 		.num_ports	= 1,
283 		.base_baud	= 115200,
284 		.uart_offset	= 8,
285 	},
286 	[netmos_9855_2p] = {
287 		.flags		= FL_BASE4 | FL_BASE_BARS,
288 		.num_ports	= 1,
289 		.base_baud	= 115200,
290 		.uart_offset	= 8,
291 	},
292 	[netmos_9900] = { /* n/t */
293 		.flags		= FL_BASE0 | FL_BASE_BARS,
294 		.num_ports	= 1,
295 		.base_baud	= 115200,
296 		.uart_offset	= 8,
297 	},
298 	[netmos_9900_2p] = { /* parallel only */ /* n/t */
299 		.flags		= FL_BASE0,
300 		.num_ports	= 0,
301 		.base_baud	= 115200,
302 		.uart_offset	= 8,
303 	},
304 	[netmos_99xx_1p] = { /* parallel only */ /* n/t */
305 		.flags		= FL_BASE0,
306 		.num_ports	= 0,
307 		.base_baud	= 115200,
308 		.uart_offset	= 8,
309 	},
310 	[avlab_1s1p] = { /* n/t */
311 		.flags		= FL_BASE0 | FL_BASE_BARS,
312 		.num_ports	= 1,
313 		.base_baud	= 115200,
314 		.uart_offset	= 8,
315 	},
316 	[avlab_1s2p] = { /* n/t */
317 		.flags		= FL_BASE0 | FL_BASE_BARS,
318 		.num_ports	= 1,
319 		.base_baud	= 115200,
320 		.uart_offset	= 8,
321 	},
322 	[avlab_2s1p] = { /* n/t */
323 		.flags		= FL_BASE0 | FL_BASE_BARS,
324 		.num_ports	= 2,
325 		.base_baud	= 115200,
326 		.uart_offset	= 8,
327 	},
328 	[siig_1s1p_10x] = {
329 		.flags		= FL_BASE2,
330 		.num_ports	= 1,
331 		.base_baud	= 460800,
332 		.uart_offset	= 8,
333 	},
334 	[siig_2s1p_10x] = {
335 		.flags		= FL_BASE2,
336 		.num_ports	= 1,
337 		.base_baud	= 921600,
338 		.uart_offset	= 8,
339 	},
340 	[siig_2p1s_20x] = {
341 		.flags		= FL_BASE0,
342 		.num_ports	= 1,
343 		.base_baud	= 921600,
344 		.uart_offset	= 8,
345 	},
346 	[siig_1s1p_20x] = {
347 		.flags		= FL_BASE0,
348 		.num_ports	= 1,
349 		.base_baud	= 921600,
350 		.uart_offset	= 8,
351 	},
352 	[siig_2s1p_20x] = {
353 		.flags		= FL_BASE0,
354 		.num_ports	= 1,
355 		.base_baud	= 921600,
356 		.uart_offset	= 8,
357 	},
358 	[timedia_4078a] = {
359 		.flags		= FL_BASE0|FL_BASE_BARS,
360 		.num_ports	= 1,
361 		.base_baud	= 921600,
362 		.uart_offset	= 8,
363 	},
364 	[timedia_4079h] = {
365 		.flags		= FL_BASE0|FL_BASE_BARS,
366 		.num_ports	= 1,
367 		.base_baud	= 921600,
368 		.uart_offset	= 8,
369 	},
370 	[timedia_4085h] = {
371 		.flags		= FL_BASE0|FL_BASE_BARS,
372 		.num_ports	= 1,
373 		.base_baud	= 921600,
374 		.uart_offset	= 8,
375 	},
376 	[timedia_4088a] = {
377 		.flags		= FL_BASE0|FL_BASE_BARS,
378 		.num_ports	= 1,
379 		.base_baud	= 921600,
380 		.uart_offset	= 8,
381 	},
382 	[timedia_4089a] = {
383 		.flags		= FL_BASE0|FL_BASE_BARS,
384 		.num_ports	= 1,
385 		.base_baud	= 921600,
386 		.uart_offset	= 8,
387 	},
388 	[timedia_4095a] = {
389 		.flags		= FL_BASE0|FL_BASE_BARS,
390 		.num_ports	= 1,
391 		.base_baud	= 921600,
392 		.uart_offset	= 8,
393 	},
394 	[timedia_4096a] = {
395 		.flags		= FL_BASE0|FL_BASE_BARS,
396 		.num_ports	= 1,
397 		.base_baud	= 921600,
398 		.uart_offset	= 8,
399 	},
400 	[timedia_4078u] = {
401 		.flags		= FL_BASE0|FL_BASE_BARS,
402 		.num_ports	= 1,
403 		.base_baud	= 921600,
404 		.uart_offset	= 8,
405 	},
406 	[timedia_4079a] = {
407 		.flags		= FL_BASE0|FL_BASE_BARS,
408 		.num_ports	= 1,
409 		.base_baud	= 921600,
410 		.uart_offset	= 8,
411 	},
412 	[timedia_4085u] = {
413 		.flags		= FL_BASE0|FL_BASE_BARS,
414 		.num_ports	= 1,
415 		.base_baud	= 921600,
416 		.uart_offset	= 8,
417 	},
418 	[timedia_4079r] = {
419 		.flags		= FL_BASE0|FL_BASE_BARS,
420 		.num_ports	= 1,
421 		.base_baud	= 921600,
422 		.uart_offset	= 8,
423 	},
424 	[timedia_4079s] = {
425 		.flags		= FL_BASE0|FL_BASE_BARS,
426 		.num_ports	= 1,
427 		.base_baud	= 921600,
428 		.uart_offset	= 8,
429 	},
430 	[timedia_4079d] = {
431 		.flags		= FL_BASE0|FL_BASE_BARS,
432 		.num_ports	= 1,
433 		.base_baud	= 921600,
434 		.uart_offset	= 8,
435 	},
436 	[timedia_4079e] = {
437 		.flags		= FL_BASE0|FL_BASE_BARS,
438 		.num_ports	= 1,
439 		.base_baud	= 921600,
440 		.uart_offset	= 8,
441 	},
442 	[timedia_4079f] = {
443 		.flags		= FL_BASE0|FL_BASE_BARS,
444 		.num_ports	= 1,
445 		.base_baud	= 921600,
446 		.uart_offset	= 8,
447 	},
448 	[timedia_9079a] = {
449 		.flags		= FL_BASE0|FL_BASE_BARS,
450 		.num_ports	= 1,
451 		.base_baud	= 921600,
452 		.uart_offset	= 8,
453 	},
454 	[timedia_9079b] = {
455 		.flags		= FL_BASE0|FL_BASE_BARS,
456 		.num_ports	= 1,
457 		.base_baud	= 921600,
458 		.uart_offset	= 8,
459 	},
460 	[timedia_9079c] = {
461 		.flags		= FL_BASE0|FL_BASE_BARS,
462 		.num_ports	= 1,
463 		.base_baud	= 921600,
464 		.uart_offset	= 8,
465 	},
466 	[wch_ch353_2s1p] = {
467 		.flags          = FL_BASE0|FL_BASE_BARS,
468 		.num_ports      = 2,
469 		.base_baud      = 115200,
470 		.uart_offset    = 8,
471 	},
472 };
473 
474 struct parport_serial_private {
475 	struct serial_private	*serial;
476 	int num_par;
477 	struct parport *port[PARPORT_MAX];
478 	struct parport_pc_pci par;
479 };
480 
481 /* Register the serial port(s) of a PCI card. */
482 static int __devinit serial_register (struct pci_dev *dev,
483 				      const struct pci_device_id *id)
484 {
485 	struct parport_serial_private *priv = pci_get_drvdata (dev);
486 	struct pciserial_board *board;
487 	struct serial_private *serial;
488 
489 	board = &pci_parport_serial_boards[id->driver_data];
490 
491 	if (board->num_ports == 0)
492 		return 0;
493 
494 	serial = pciserial_init_ports(dev, board);
495 
496 	if (IS_ERR(serial))
497 		return PTR_ERR(serial);
498 
499 	priv->serial = serial;
500 	return 0;
501 }
502 
503 /* Register the parallel port(s) of a PCI card. */
504 static int __devinit parport_register (struct pci_dev *dev,
505 				       const struct pci_device_id *id)
506 {
507 	struct parport_pc_pci *card;
508 	struct parport_serial_private *priv = pci_get_drvdata (dev);
509 	int n, success = 0;
510 
511 	priv->par = cards[id->driver_data];
512 	card = &priv->par;
513 	if (card->preinit_hook &&
514 	    card->preinit_hook (dev, card, PARPORT_IRQ_NONE, PARPORT_DMA_NONE))
515 		return -ENODEV;
516 
517 	for (n = 0; n < card->numports; n++) {
518 		struct parport *port;
519 		int lo = card->addr[n].lo;
520 		int hi = card->addr[n].hi;
521 		unsigned long io_lo, io_hi;
522 		int irq;
523 
524 		if (priv->num_par == ARRAY_SIZE (priv->port)) {
525 			printk (KERN_WARNING
526 				"parport_serial: %s: only %zu parallel ports "
527 				"supported (%d reported)\n", pci_name (dev),
528 				ARRAY_SIZE(priv->port), card->numports);
529 			break;
530 		}
531 
532 		io_lo = pci_resource_start (dev, lo);
533 		io_hi = 0;
534 		if ((hi >= 0) && (hi <= 6))
535 			io_hi = pci_resource_start (dev, hi);
536 		else if (hi > 6)
537 			io_lo += hi; /* Reinterpret the meaning of
538                                         "hi" as an offset (see SYBA
539                                         def.) */
540 		/* TODO: test if sharing interrupts works */
541 		irq = dev->irq;
542 		if (irq == IRQ_NONE) {
543 			dev_dbg(&dev->dev,
544 			"PCI parallel port detected: I/O at %#lx(%#lx)\n",
545 				io_lo, io_hi);
546 			irq = PARPORT_IRQ_NONE;
547 		} else {
548 			dev_dbg(&dev->dev,
549 		"PCI parallel port detected: I/O at %#lx(%#lx), IRQ %d\n",
550 				io_lo, io_hi, irq);
551 		}
552 		port = parport_pc_probe_port (io_lo, io_hi, irq,
553 			      PARPORT_DMA_NONE, &dev->dev, IRQF_SHARED);
554 		if (port) {
555 			priv->port[priv->num_par++] = port;
556 			success = 1;
557 		}
558 	}
559 
560 	if (card->postinit_hook)
561 		card->postinit_hook (dev, card, !success);
562 
563 	return 0;
564 }
565 
566 static int __devinit parport_serial_pci_probe (struct pci_dev *dev,
567 					       const struct pci_device_id *id)
568 {
569 	struct parport_serial_private *priv;
570 	int err;
571 
572 	priv = kzalloc (sizeof *priv, GFP_KERNEL);
573 	if (!priv)
574 		return -ENOMEM;
575 	pci_set_drvdata (dev, priv);
576 
577 	err = pci_enable_device (dev);
578 	if (err) {
579 		pci_set_drvdata (dev, NULL);
580 		kfree (priv);
581 		return err;
582 	}
583 
584 	if (parport_register (dev, id)) {
585 		pci_set_drvdata (dev, NULL);
586 		kfree (priv);
587 		return -ENODEV;
588 	}
589 
590 	if (serial_register (dev, id)) {
591 		int i;
592 		for (i = 0; i < priv->num_par; i++)
593 			parport_pc_unregister_port (priv->port[i]);
594 		pci_set_drvdata (dev, NULL);
595 		kfree (priv);
596 		return -ENODEV;
597 	}
598 
599 	return 0;
600 }
601 
602 static void __devexit parport_serial_pci_remove (struct pci_dev *dev)
603 {
604 	struct parport_serial_private *priv = pci_get_drvdata (dev);
605 	int i;
606 
607 	pci_set_drvdata(dev, NULL);
608 
609 	// Serial ports
610 	if (priv->serial)
611 		pciserial_remove_ports(priv->serial);
612 
613 	// Parallel ports
614 	for (i = 0; i < priv->num_par; i++)
615 		parport_pc_unregister_port (priv->port[i]);
616 
617 	kfree (priv);
618 	return;
619 }
620 
621 #ifdef CONFIG_PM
622 static int parport_serial_pci_suspend(struct pci_dev *dev, pm_message_t state)
623 {
624 	struct parport_serial_private *priv = pci_get_drvdata(dev);
625 
626 	if (priv->serial)
627 		pciserial_suspend_ports(priv->serial);
628 
629 	/* FIXME: What about parport? */
630 
631 	pci_save_state(dev);
632 	pci_set_power_state(dev, pci_choose_state(dev, state));
633 	return 0;
634 }
635 
636 static int parport_serial_pci_resume(struct pci_dev *dev)
637 {
638 	struct parport_serial_private *priv = pci_get_drvdata(dev);
639 	int err;
640 
641 	pci_set_power_state(dev, PCI_D0);
642 	pci_restore_state(dev);
643 
644 	/*
645 	 * The device may have been disabled.  Re-enable it.
646 	 */
647 	err = pci_enable_device(dev);
648 	if (err) {
649 		printk(KERN_ERR "parport_serial: %s: error enabling "
650 			"device for resume (%d)\n", pci_name(dev), err);
651 		return err;
652 	}
653 
654 	if (priv->serial)
655 		pciserial_resume_ports(priv->serial);
656 
657 	/* FIXME: What about parport? */
658 
659 	return 0;
660 }
661 #endif
662 
663 static struct pci_driver parport_serial_pci_driver = {
664 	.name		= "parport_serial",
665 	.id_table	= parport_serial_pci_tbl,
666 	.probe		= parport_serial_pci_probe,
667 	.remove		= __devexit_p(parport_serial_pci_remove),
668 #ifdef CONFIG_PM
669 	.suspend	= parport_serial_pci_suspend,
670 	.resume		= parport_serial_pci_resume,
671 #endif
672 };
673 
674 
675 static int __init parport_serial_init (void)
676 {
677 	return pci_register_driver (&parport_serial_pci_driver);
678 }
679 
680 static void __exit parport_serial_exit (void)
681 {
682 	pci_unregister_driver (&parport_serial_pci_driver);
683 	return;
684 }
685 
686 MODULE_AUTHOR("Tim Waugh <twaugh@redhat.com>");
687 MODULE_DESCRIPTION("Driver for common parallel+serial multi-I/O PCI cards");
688 MODULE_LICENSE("GPL");
689 
690 module_init(parport_serial_init);
691 module_exit(parport_serial_exit);
692