1 // SPDX-License-Identifier: GPL-2.0 2 #define pr_fmt(fmt) "OF: " fmt 3 4 #include <linux/device.h> 5 #include <linux/fwnode.h> 6 #include <linux/io.h> 7 #include <linux/ioport.h> 8 #include <linux/logic_pio.h> 9 #include <linux/module.h> 10 #include <linux/of_address.h> 11 #include <linux/pci.h> 12 #include <linux/pci_regs.h> 13 #include <linux/sizes.h> 14 #include <linux/slab.h> 15 #include <linux/string.h> 16 #include <linux/dma-direct.h> /* for bus_dma_region */ 17 18 #include "of_private.h" 19 20 /* Max address size we deal with */ 21 #define OF_MAX_ADDR_CELLS 4 22 #define OF_CHECK_ADDR_COUNT(na) ((na) > 0 && (na) <= OF_MAX_ADDR_CELLS) 23 #define OF_CHECK_COUNTS(na, ns) (OF_CHECK_ADDR_COUNT(na) && (ns) > 0) 24 25 static struct of_bus *of_match_bus(struct device_node *np); 26 static int __of_address_to_resource(struct device_node *dev, int index, 27 int bar_no, struct resource *r); 28 static bool of_mmio_is_nonposted(struct device_node *np); 29 30 /* Debug utility */ 31 #ifdef DEBUG 32 static void of_dump_addr(const char *s, const __be32 *addr, int na) 33 { 34 pr_debug("%s", s); 35 while (na--) 36 pr_cont(" %08x", be32_to_cpu(*(addr++))); 37 pr_cont("\n"); 38 } 39 #else 40 static void of_dump_addr(const char *s, const __be32 *addr, int na) { } 41 #endif 42 43 /* Callbacks for bus specific translators */ 44 struct of_bus { 45 const char *name; 46 const char *addresses; 47 int (*match)(struct device_node *parent); 48 void (*count_cells)(struct device_node *child, 49 int *addrc, int *sizec); 50 u64 (*map)(__be32 *addr, const __be32 *range, 51 int na, int ns, int pna); 52 int (*translate)(__be32 *addr, u64 offset, int na); 53 bool has_flags; 54 unsigned int (*get_flags)(const __be32 *addr); 55 }; 56 57 /* 58 * Default translator (generic bus) 59 */ 60 61 static void of_bus_default_count_cells(struct device_node *dev, 62 int *addrc, int *sizec) 63 { 64 if (addrc) 65 *addrc = of_n_addr_cells(dev); 66 if (sizec) 67 *sizec = of_n_size_cells(dev); 68 } 69 70 static u64 of_bus_default_map(__be32 *addr, const __be32 *range, 71 int na, int ns, int pna) 72 { 73 u64 cp, s, da; 74 75 cp = of_read_number(range, na); 76 s = of_read_number(range + na + pna, ns); 77 da = of_read_number(addr, na); 78 79 pr_debug("default map, cp=%llx, s=%llx, da=%llx\n", cp, s, da); 80 81 if (da < cp || da >= (cp + s)) 82 return OF_BAD_ADDR; 83 return da - cp; 84 } 85 86 static int of_bus_default_translate(__be32 *addr, u64 offset, int na) 87 { 88 u64 a = of_read_number(addr, na); 89 memset(addr, 0, na * 4); 90 a += offset; 91 if (na > 1) 92 addr[na - 2] = cpu_to_be32(a >> 32); 93 addr[na - 1] = cpu_to_be32(a & 0xffffffffu); 94 95 return 0; 96 } 97 98 static unsigned int of_bus_default_get_flags(const __be32 *addr) 99 { 100 return IORESOURCE_MEM; 101 } 102 103 #ifdef CONFIG_PCI 104 static unsigned int of_bus_pci_get_flags(const __be32 *addr) 105 { 106 unsigned int flags = 0; 107 u32 w = be32_to_cpup(addr); 108 109 if (!IS_ENABLED(CONFIG_PCI)) 110 return 0; 111 112 switch((w >> 24) & 0x03) { 113 case 0x01: 114 flags |= IORESOURCE_IO; 115 break; 116 case 0x02: /* 32 bits */ 117 flags |= IORESOURCE_MEM; 118 break; 119 120 case 0x03: /* 64 bits */ 121 flags |= IORESOURCE_MEM | IORESOURCE_MEM_64; 122 break; 123 } 124 if (w & 0x40000000) 125 flags |= IORESOURCE_PREFETCH; 126 return flags; 127 } 128 129 /* 130 * PCI bus specific translator 131 */ 132 133 static bool of_node_is_pcie(struct device_node *np) 134 { 135 bool is_pcie = of_node_name_eq(np, "pcie"); 136 137 if (is_pcie) 138 pr_warn_once("%pOF: Missing device_type\n", np); 139 140 return is_pcie; 141 } 142 143 static int of_bus_pci_match(struct device_node *np) 144 { 145 /* 146 * "pciex" is PCI Express 147 * "vci" is for the /chaos bridge on 1st-gen PCI powermacs 148 * "ht" is hypertransport 149 * 150 * If none of the device_type match, and that the node name is 151 * "pcie", accept the device as PCI (with a warning). 152 */ 153 return of_node_is_type(np, "pci") || of_node_is_type(np, "pciex") || 154 of_node_is_type(np, "vci") || of_node_is_type(np, "ht") || 155 of_node_is_pcie(np); 156 } 157 158 static void of_bus_pci_count_cells(struct device_node *np, 159 int *addrc, int *sizec) 160 { 161 if (addrc) 162 *addrc = 3; 163 if (sizec) 164 *sizec = 2; 165 } 166 167 static u64 of_bus_pci_map(__be32 *addr, const __be32 *range, int na, int ns, 168 int pna) 169 { 170 u64 cp, s, da; 171 unsigned int af, rf; 172 173 af = of_bus_pci_get_flags(addr); 174 rf = of_bus_pci_get_flags(range); 175 176 /* Check address type match */ 177 if ((af ^ rf) & (IORESOURCE_MEM | IORESOURCE_IO)) 178 return OF_BAD_ADDR; 179 180 /* Read address values, skipping high cell */ 181 cp = of_read_number(range + 1, na - 1); 182 s = of_read_number(range + na + pna, ns); 183 da = of_read_number(addr + 1, na - 1); 184 185 pr_debug("PCI map, cp=%llx, s=%llx, da=%llx\n", cp, s, da); 186 187 if (da < cp || da >= (cp + s)) 188 return OF_BAD_ADDR; 189 return da - cp; 190 } 191 192 static int of_bus_pci_translate(__be32 *addr, u64 offset, int na) 193 { 194 return of_bus_default_translate(addr + 1, offset, na - 1); 195 } 196 #endif /* CONFIG_PCI */ 197 198 int of_pci_address_to_resource(struct device_node *dev, int bar, 199 struct resource *r) 200 { 201 202 if (!IS_ENABLED(CONFIG_PCI)) 203 return -ENOSYS; 204 205 return __of_address_to_resource(dev, -1, bar, r); 206 } 207 EXPORT_SYMBOL_GPL(of_pci_address_to_resource); 208 209 /* 210 * of_pci_range_to_resource - Create a resource from an of_pci_range 211 * @range: the PCI range that describes the resource 212 * @np: device node where the range belongs to 213 * @res: pointer to a valid resource that will be updated to 214 * reflect the values contained in the range. 215 * 216 * Returns EINVAL if the range cannot be converted to resource. 217 * 218 * Note that if the range is an IO range, the resource will be converted 219 * using pci_address_to_pio() which can fail if it is called too early or 220 * if the range cannot be matched to any host bridge IO space (our case here). 221 * To guard against that we try to register the IO range first. 222 * If that fails we know that pci_address_to_pio() will do too. 223 */ 224 int of_pci_range_to_resource(struct of_pci_range *range, 225 struct device_node *np, struct resource *res) 226 { 227 int err; 228 res->flags = range->flags; 229 res->parent = res->child = res->sibling = NULL; 230 res->name = np->full_name; 231 232 if (!IS_ENABLED(CONFIG_PCI)) 233 return -ENOSYS; 234 235 if (res->flags & IORESOURCE_IO) { 236 unsigned long port; 237 err = pci_register_io_range(&np->fwnode, range->cpu_addr, 238 range->size); 239 if (err) 240 goto invalid_range; 241 port = pci_address_to_pio(range->cpu_addr); 242 if (port == (unsigned long)-1) { 243 err = -EINVAL; 244 goto invalid_range; 245 } 246 res->start = port; 247 } else { 248 if ((sizeof(resource_size_t) < 8) && 249 upper_32_bits(range->cpu_addr)) { 250 err = -EINVAL; 251 goto invalid_range; 252 } 253 254 res->start = range->cpu_addr; 255 } 256 res->end = res->start + range->size - 1; 257 return 0; 258 259 invalid_range: 260 res->start = (resource_size_t)OF_BAD_ADDR; 261 res->end = (resource_size_t)OF_BAD_ADDR; 262 return err; 263 } 264 EXPORT_SYMBOL(of_pci_range_to_resource); 265 266 /* 267 * ISA bus specific translator 268 */ 269 270 static int of_bus_isa_match(struct device_node *np) 271 { 272 return of_node_name_eq(np, "isa"); 273 } 274 275 static void of_bus_isa_count_cells(struct device_node *child, 276 int *addrc, int *sizec) 277 { 278 if (addrc) 279 *addrc = 2; 280 if (sizec) 281 *sizec = 1; 282 } 283 284 static u64 of_bus_isa_map(__be32 *addr, const __be32 *range, int na, int ns, 285 int pna) 286 { 287 u64 cp, s, da; 288 289 /* Check address type match */ 290 if ((addr[0] ^ range[0]) & cpu_to_be32(1)) 291 return OF_BAD_ADDR; 292 293 /* Read address values, skipping high cell */ 294 cp = of_read_number(range + 1, na - 1); 295 s = of_read_number(range + na + pna, ns); 296 da = of_read_number(addr + 1, na - 1); 297 298 pr_debug("ISA map, cp=%llx, s=%llx, da=%llx\n", cp, s, da); 299 300 if (da < cp || da >= (cp + s)) 301 return OF_BAD_ADDR; 302 return da - cp; 303 } 304 305 static int of_bus_isa_translate(__be32 *addr, u64 offset, int na) 306 { 307 return of_bus_default_translate(addr + 1, offset, na - 1); 308 } 309 310 static unsigned int of_bus_isa_get_flags(const __be32 *addr) 311 { 312 unsigned int flags = 0; 313 u32 w = be32_to_cpup(addr); 314 315 if (w & 1) 316 flags |= IORESOURCE_IO; 317 else 318 flags |= IORESOURCE_MEM; 319 return flags; 320 } 321 322 /* 323 * Array of bus specific translators 324 */ 325 326 static struct of_bus of_busses[] = { 327 #ifdef CONFIG_PCI 328 /* PCI */ 329 { 330 .name = "pci", 331 .addresses = "assigned-addresses", 332 .match = of_bus_pci_match, 333 .count_cells = of_bus_pci_count_cells, 334 .map = of_bus_pci_map, 335 .translate = of_bus_pci_translate, 336 .has_flags = true, 337 .get_flags = of_bus_pci_get_flags, 338 }, 339 #endif /* CONFIG_PCI */ 340 /* ISA */ 341 { 342 .name = "isa", 343 .addresses = "reg", 344 .match = of_bus_isa_match, 345 .count_cells = of_bus_isa_count_cells, 346 .map = of_bus_isa_map, 347 .translate = of_bus_isa_translate, 348 .has_flags = true, 349 .get_flags = of_bus_isa_get_flags, 350 }, 351 /* Default */ 352 { 353 .name = "default", 354 .addresses = "reg", 355 .match = NULL, 356 .count_cells = of_bus_default_count_cells, 357 .map = of_bus_default_map, 358 .translate = of_bus_default_translate, 359 .get_flags = of_bus_default_get_flags, 360 }, 361 }; 362 363 static struct of_bus *of_match_bus(struct device_node *np) 364 { 365 int i; 366 367 for (i = 0; i < ARRAY_SIZE(of_busses); i++) 368 if (!of_busses[i].match || of_busses[i].match(np)) 369 return &of_busses[i]; 370 BUG(); 371 return NULL; 372 } 373 374 static int of_empty_ranges_quirk(struct device_node *np) 375 { 376 if (IS_ENABLED(CONFIG_PPC)) { 377 /* To save cycles, we cache the result for global "Mac" setting */ 378 static int quirk_state = -1; 379 380 /* PA-SEMI sdc DT bug */ 381 if (of_device_is_compatible(np, "1682m-sdc")) 382 return true; 383 384 /* Make quirk cached */ 385 if (quirk_state < 0) 386 quirk_state = 387 of_machine_is_compatible("Power Macintosh") || 388 of_machine_is_compatible("MacRISC"); 389 return quirk_state; 390 } 391 return false; 392 } 393 394 static int of_translate_one(struct device_node *parent, struct of_bus *bus, 395 struct of_bus *pbus, __be32 *addr, 396 int na, int ns, int pna, const char *rprop) 397 { 398 const __be32 *ranges; 399 unsigned int rlen; 400 int rone; 401 u64 offset = OF_BAD_ADDR; 402 403 /* 404 * Normally, an absence of a "ranges" property means we are 405 * crossing a non-translatable boundary, and thus the addresses 406 * below the current cannot be converted to CPU physical ones. 407 * Unfortunately, while this is very clear in the spec, it's not 408 * what Apple understood, and they do have things like /uni-n or 409 * /ht nodes with no "ranges" property and a lot of perfectly 410 * useable mapped devices below them. Thus we treat the absence of 411 * "ranges" as equivalent to an empty "ranges" property which means 412 * a 1:1 translation at that level. It's up to the caller not to try 413 * to translate addresses that aren't supposed to be translated in 414 * the first place. --BenH. 415 * 416 * As far as we know, this damage only exists on Apple machines, so 417 * This code is only enabled on powerpc. --gcl 418 * 419 * This quirk also applies for 'dma-ranges' which frequently exist in 420 * child nodes without 'dma-ranges' in the parent nodes. --RobH 421 */ 422 ranges = of_get_property(parent, rprop, &rlen); 423 if (ranges == NULL && !of_empty_ranges_quirk(parent) && 424 strcmp(rprop, "dma-ranges")) { 425 pr_debug("no ranges; cannot translate\n"); 426 return 1; 427 } 428 if (ranges == NULL || rlen == 0) { 429 offset = of_read_number(addr, na); 430 memset(addr, 0, pna * 4); 431 pr_debug("empty ranges; 1:1 translation\n"); 432 goto finish; 433 } 434 435 pr_debug("walking ranges...\n"); 436 437 /* Now walk through the ranges */ 438 rlen /= 4; 439 rone = na + pna + ns; 440 for (; rlen >= rone; rlen -= rone, ranges += rone) { 441 offset = bus->map(addr, ranges, na, ns, pna); 442 if (offset != OF_BAD_ADDR) 443 break; 444 } 445 if (offset == OF_BAD_ADDR) { 446 pr_debug("not found !\n"); 447 return 1; 448 } 449 memcpy(addr, ranges + na, 4 * pna); 450 451 finish: 452 of_dump_addr("parent translation for:", addr, pna); 453 pr_debug("with offset: %llx\n", offset); 454 455 /* Translate it into parent bus space */ 456 return pbus->translate(addr, offset, pna); 457 } 458 459 /* 460 * Translate an address from the device-tree into a CPU physical address, 461 * this walks up the tree and applies the various bus mappings on the 462 * way. 463 * 464 * Note: We consider that crossing any level with #size-cells == 0 to mean 465 * that translation is impossible (that is we are not dealing with a value 466 * that can be mapped to a cpu physical address). This is not really specified 467 * that way, but this is traditionally the way IBM at least do things 468 * 469 * Whenever the translation fails, the *host pointer will be set to the 470 * device that had registered logical PIO mapping, and the return code is 471 * relative to that node. 472 */ 473 static u64 __of_translate_address(struct device_node *dev, 474 struct device_node *(*get_parent)(const struct device_node *), 475 const __be32 *in_addr, const char *rprop, 476 struct device_node **host) 477 { 478 struct device_node *parent = NULL; 479 struct of_bus *bus, *pbus; 480 __be32 addr[OF_MAX_ADDR_CELLS]; 481 int na, ns, pna, pns; 482 u64 result = OF_BAD_ADDR; 483 484 pr_debug("** translation for device %pOF **\n", dev); 485 486 /* Increase refcount at current level */ 487 of_node_get(dev); 488 489 *host = NULL; 490 /* Get parent & match bus type */ 491 parent = get_parent(dev); 492 if (parent == NULL) 493 goto bail; 494 bus = of_match_bus(parent); 495 496 /* Count address cells & copy address locally */ 497 bus->count_cells(dev, &na, &ns); 498 if (!OF_CHECK_COUNTS(na, ns)) { 499 pr_debug("Bad cell count for %pOF\n", dev); 500 goto bail; 501 } 502 memcpy(addr, in_addr, na * 4); 503 504 pr_debug("bus is %s (na=%d, ns=%d) on %pOF\n", 505 bus->name, na, ns, parent); 506 of_dump_addr("translating address:", addr, na); 507 508 /* Translate */ 509 for (;;) { 510 struct logic_pio_hwaddr *iorange; 511 512 /* Switch to parent bus */ 513 of_node_put(dev); 514 dev = parent; 515 parent = get_parent(dev); 516 517 /* If root, we have finished */ 518 if (parent == NULL) { 519 pr_debug("reached root node\n"); 520 result = of_read_number(addr, na); 521 break; 522 } 523 524 /* 525 * For indirectIO device which has no ranges property, get 526 * the address from reg directly. 527 */ 528 iorange = find_io_range_by_fwnode(&dev->fwnode); 529 if (iorange && (iorange->flags != LOGIC_PIO_CPU_MMIO)) { 530 result = of_read_number(addr + 1, na - 1); 531 pr_debug("indirectIO matched(%pOF) 0x%llx\n", 532 dev, result); 533 *host = of_node_get(dev); 534 break; 535 } 536 537 /* Get new parent bus and counts */ 538 pbus = of_match_bus(parent); 539 pbus->count_cells(dev, &pna, &pns); 540 if (!OF_CHECK_COUNTS(pna, pns)) { 541 pr_err("Bad cell count for %pOF\n", dev); 542 break; 543 } 544 545 pr_debug("parent bus is %s (na=%d, ns=%d) on %pOF\n", 546 pbus->name, pna, pns, parent); 547 548 /* Apply bus translation */ 549 if (of_translate_one(dev, bus, pbus, addr, na, ns, pna, rprop)) 550 break; 551 552 /* Complete the move up one level */ 553 na = pna; 554 ns = pns; 555 bus = pbus; 556 557 of_dump_addr("one level translation:", addr, na); 558 } 559 bail: 560 of_node_put(parent); 561 of_node_put(dev); 562 563 return result; 564 } 565 566 u64 of_translate_address(struct device_node *dev, const __be32 *in_addr) 567 { 568 struct device_node *host; 569 u64 ret; 570 571 ret = __of_translate_address(dev, of_get_parent, 572 in_addr, "ranges", &host); 573 if (host) { 574 of_node_put(host); 575 return OF_BAD_ADDR; 576 } 577 578 return ret; 579 } 580 EXPORT_SYMBOL(of_translate_address); 581 582 #ifdef CONFIG_HAS_DMA 583 struct device_node *__of_get_dma_parent(const struct device_node *np) 584 { 585 struct of_phandle_args args; 586 int ret, index; 587 588 index = of_property_match_string(np, "interconnect-names", "dma-mem"); 589 if (index < 0) 590 return of_get_parent(np); 591 592 ret = of_parse_phandle_with_args(np, "interconnects", 593 "#interconnect-cells", 594 index, &args); 595 if (ret < 0) 596 return of_get_parent(np); 597 598 return of_node_get(args.np); 599 } 600 #endif 601 602 static struct device_node *of_get_next_dma_parent(struct device_node *np) 603 { 604 struct device_node *parent; 605 606 parent = __of_get_dma_parent(np); 607 of_node_put(np); 608 609 return parent; 610 } 611 612 u64 of_translate_dma_address(struct device_node *dev, const __be32 *in_addr) 613 { 614 struct device_node *host; 615 u64 ret; 616 617 ret = __of_translate_address(dev, __of_get_dma_parent, 618 in_addr, "dma-ranges", &host); 619 620 if (host) { 621 of_node_put(host); 622 return OF_BAD_ADDR; 623 } 624 625 return ret; 626 } 627 EXPORT_SYMBOL(of_translate_dma_address); 628 629 /** 630 * of_translate_dma_region - Translate device tree address and size tuple 631 * @dev: device tree node for which to translate 632 * @prop: pointer into array of cells 633 * @start: return value for the start of the DMA range 634 * @length: return value for the length of the DMA range 635 * 636 * Returns a pointer to the cell immediately following the translated DMA region. 637 */ 638 const __be32 *of_translate_dma_region(struct device_node *dev, const __be32 *prop, 639 phys_addr_t *start, size_t *length) 640 { 641 struct device_node *parent; 642 u64 address, size; 643 int na, ns; 644 645 parent = __of_get_dma_parent(dev); 646 if (!parent) 647 return NULL; 648 649 na = of_bus_n_addr_cells(parent); 650 ns = of_bus_n_size_cells(parent); 651 652 of_node_put(parent); 653 654 address = of_translate_dma_address(dev, prop); 655 if (address == OF_BAD_ADDR) 656 return NULL; 657 658 size = of_read_number(prop + na, ns); 659 660 if (start) 661 *start = address; 662 663 if (length) 664 *length = size; 665 666 return prop + na + ns; 667 } 668 EXPORT_SYMBOL(of_translate_dma_region); 669 670 const __be32 *__of_get_address(struct device_node *dev, int index, int bar_no, 671 u64 *size, unsigned int *flags) 672 { 673 const __be32 *prop; 674 unsigned int psize; 675 struct device_node *parent; 676 struct of_bus *bus; 677 int onesize, i, na, ns; 678 679 /* Get parent & match bus type */ 680 parent = of_get_parent(dev); 681 if (parent == NULL) 682 return NULL; 683 bus = of_match_bus(parent); 684 if (strcmp(bus->name, "pci") && (bar_no >= 0)) { 685 of_node_put(parent); 686 return NULL; 687 } 688 bus->count_cells(dev, &na, &ns); 689 of_node_put(parent); 690 if (!OF_CHECK_ADDR_COUNT(na)) 691 return NULL; 692 693 /* Get "reg" or "assigned-addresses" property */ 694 prop = of_get_property(dev, bus->addresses, &psize); 695 if (prop == NULL) 696 return NULL; 697 psize /= 4; 698 699 onesize = na + ns; 700 for (i = 0; psize >= onesize; psize -= onesize, prop += onesize, i++) { 701 u32 val = be32_to_cpu(prop[0]); 702 /* PCI bus matches on BAR number instead of index */ 703 if (((bar_no >= 0) && ((val & 0xff) == ((bar_no * 4) + PCI_BASE_ADDRESS_0))) || 704 ((index >= 0) && (i == index))) { 705 if (size) 706 *size = of_read_number(prop + na, ns); 707 if (flags) 708 *flags = bus->get_flags(prop); 709 return prop; 710 } 711 } 712 return NULL; 713 } 714 EXPORT_SYMBOL(__of_get_address); 715 716 static int parser_init(struct of_pci_range_parser *parser, 717 struct device_node *node, const char *name) 718 { 719 int rlen; 720 721 parser->node = node; 722 parser->pna = of_n_addr_cells(node); 723 parser->na = of_bus_n_addr_cells(node); 724 parser->ns = of_bus_n_size_cells(node); 725 parser->dma = !strcmp(name, "dma-ranges"); 726 parser->bus = of_match_bus(node); 727 728 parser->range = of_get_property(node, name, &rlen); 729 if (parser->range == NULL) 730 return -ENOENT; 731 732 parser->end = parser->range + rlen / sizeof(__be32); 733 734 return 0; 735 } 736 737 int of_pci_range_parser_init(struct of_pci_range_parser *parser, 738 struct device_node *node) 739 { 740 return parser_init(parser, node, "ranges"); 741 } 742 EXPORT_SYMBOL_GPL(of_pci_range_parser_init); 743 744 int of_pci_dma_range_parser_init(struct of_pci_range_parser *parser, 745 struct device_node *node) 746 { 747 return parser_init(parser, node, "dma-ranges"); 748 } 749 EXPORT_SYMBOL_GPL(of_pci_dma_range_parser_init); 750 #define of_dma_range_parser_init of_pci_dma_range_parser_init 751 752 struct of_pci_range *of_pci_range_parser_one(struct of_pci_range_parser *parser, 753 struct of_pci_range *range) 754 { 755 int na = parser->na; 756 int ns = parser->ns; 757 int np = parser->pna + na + ns; 758 int busflag_na = 0; 759 760 if (!range) 761 return NULL; 762 763 if (!parser->range || parser->range + np > parser->end) 764 return NULL; 765 766 range->flags = parser->bus->get_flags(parser->range); 767 768 /* A extra cell for resource flags */ 769 if (parser->bus->has_flags) 770 busflag_na = 1; 771 772 range->bus_addr = of_read_number(parser->range + busflag_na, na - busflag_na); 773 774 if (parser->dma) 775 range->cpu_addr = of_translate_dma_address(parser->node, 776 parser->range + na); 777 else 778 range->cpu_addr = of_translate_address(parser->node, 779 parser->range + na); 780 range->size = of_read_number(parser->range + parser->pna + na, ns); 781 782 parser->range += np; 783 784 /* Now consume following elements while they are contiguous */ 785 while (parser->range + np <= parser->end) { 786 u32 flags = 0; 787 u64 bus_addr, cpu_addr, size; 788 789 flags = parser->bus->get_flags(parser->range); 790 bus_addr = of_read_number(parser->range + busflag_na, na - busflag_na); 791 if (parser->dma) 792 cpu_addr = of_translate_dma_address(parser->node, 793 parser->range + na); 794 else 795 cpu_addr = of_translate_address(parser->node, 796 parser->range + na); 797 size = of_read_number(parser->range + parser->pna + na, ns); 798 799 if (flags != range->flags) 800 break; 801 if (bus_addr != range->bus_addr + range->size || 802 cpu_addr != range->cpu_addr + range->size) 803 break; 804 805 range->size += size; 806 parser->range += np; 807 } 808 809 return range; 810 } 811 EXPORT_SYMBOL_GPL(of_pci_range_parser_one); 812 813 static u64 of_translate_ioport(struct device_node *dev, const __be32 *in_addr, 814 u64 size) 815 { 816 u64 taddr; 817 unsigned long port; 818 struct device_node *host; 819 820 taddr = __of_translate_address(dev, of_get_parent, 821 in_addr, "ranges", &host); 822 if (host) { 823 /* host-specific port access */ 824 port = logic_pio_trans_hwaddr(&host->fwnode, taddr, size); 825 of_node_put(host); 826 } else { 827 /* memory-mapped I/O range */ 828 port = pci_address_to_pio(taddr); 829 } 830 831 if (port == (unsigned long)-1) 832 return OF_BAD_ADDR; 833 834 return port; 835 } 836 837 static int __of_address_to_resource(struct device_node *dev, int index, int bar_no, 838 struct resource *r) 839 { 840 u64 taddr; 841 const __be32 *addrp; 842 u64 size; 843 unsigned int flags; 844 const char *name = NULL; 845 846 addrp = __of_get_address(dev, index, bar_no, &size, &flags); 847 if (addrp == NULL) 848 return -EINVAL; 849 850 /* Get optional "reg-names" property to add a name to a resource */ 851 if (index >= 0) 852 of_property_read_string_index(dev, "reg-names", index, &name); 853 854 if (flags & IORESOURCE_MEM) 855 taddr = of_translate_address(dev, addrp); 856 else if (flags & IORESOURCE_IO) 857 taddr = of_translate_ioport(dev, addrp, size); 858 else 859 return -EINVAL; 860 861 if (taddr == OF_BAD_ADDR) 862 return -EINVAL; 863 memset(r, 0, sizeof(struct resource)); 864 865 if (of_mmio_is_nonposted(dev)) 866 flags |= IORESOURCE_MEM_NONPOSTED; 867 868 r->start = taddr; 869 r->end = taddr + size - 1; 870 r->flags = flags; 871 r->name = name ? name : dev->full_name; 872 873 return 0; 874 } 875 876 /** 877 * of_address_to_resource - Translate device tree address and return as resource 878 * @dev: Caller's Device Node 879 * @index: Index into the array 880 * @r: Pointer to resource array 881 * 882 * Note that if your address is a PIO address, the conversion will fail if 883 * the physical address can't be internally converted to an IO token with 884 * pci_address_to_pio(), that is because it's either called too early or it 885 * can't be matched to any host bridge IO space 886 */ 887 int of_address_to_resource(struct device_node *dev, int index, 888 struct resource *r) 889 { 890 return __of_address_to_resource(dev, index, -1, r); 891 } 892 EXPORT_SYMBOL_GPL(of_address_to_resource); 893 894 /** 895 * of_iomap - Maps the memory mapped IO for a given device_node 896 * @np: the device whose io range will be mapped 897 * @index: index of the io range 898 * 899 * Returns a pointer to the mapped memory 900 */ 901 void __iomem *of_iomap(struct device_node *np, int index) 902 { 903 struct resource res; 904 905 if (of_address_to_resource(np, index, &res)) 906 return NULL; 907 908 if (res.flags & IORESOURCE_MEM_NONPOSTED) 909 return ioremap_np(res.start, resource_size(&res)); 910 else 911 return ioremap(res.start, resource_size(&res)); 912 } 913 EXPORT_SYMBOL(of_iomap); 914 915 /* 916 * of_io_request_and_map - Requests a resource and maps the memory mapped IO 917 * for a given device_node 918 * @device: the device whose io range will be mapped 919 * @index: index of the io range 920 * @name: name "override" for the memory region request or NULL 921 * 922 * Returns a pointer to the requested and mapped memory or an ERR_PTR() encoded 923 * error code on failure. Usage example: 924 * 925 * base = of_io_request_and_map(node, 0, "foo"); 926 * if (IS_ERR(base)) 927 * return PTR_ERR(base); 928 */ 929 void __iomem *of_io_request_and_map(struct device_node *np, int index, 930 const char *name) 931 { 932 struct resource res; 933 void __iomem *mem; 934 935 if (of_address_to_resource(np, index, &res)) 936 return IOMEM_ERR_PTR(-EINVAL); 937 938 if (!name) 939 name = res.name; 940 if (!request_mem_region(res.start, resource_size(&res), name)) 941 return IOMEM_ERR_PTR(-EBUSY); 942 943 if (res.flags & IORESOURCE_MEM_NONPOSTED) 944 mem = ioremap_np(res.start, resource_size(&res)); 945 else 946 mem = ioremap(res.start, resource_size(&res)); 947 948 if (!mem) { 949 release_mem_region(res.start, resource_size(&res)); 950 return IOMEM_ERR_PTR(-ENOMEM); 951 } 952 953 return mem; 954 } 955 EXPORT_SYMBOL(of_io_request_and_map); 956 957 #ifdef CONFIG_HAS_DMA 958 /** 959 * of_dma_get_range - Get DMA range info and put it into a map array 960 * @np: device node to get DMA range info 961 * @map: dma range structure to return 962 * 963 * Look in bottom up direction for the first "dma-ranges" property 964 * and parse it. Put the information into a DMA offset map array. 965 * 966 * dma-ranges format: 967 * DMA addr (dma_addr) : naddr cells 968 * CPU addr (phys_addr_t) : pna cells 969 * size : nsize cells 970 * 971 * It returns -ENODEV if "dma-ranges" property was not found for this 972 * device in the DT. 973 */ 974 int of_dma_get_range(struct device_node *np, const struct bus_dma_region **map) 975 { 976 struct device_node *node = of_node_get(np); 977 const __be32 *ranges = NULL; 978 bool found_dma_ranges = false; 979 struct of_range_parser parser; 980 struct of_range range; 981 struct bus_dma_region *r; 982 int len, num_ranges = 0; 983 int ret = 0; 984 985 while (node) { 986 ranges = of_get_property(node, "dma-ranges", &len); 987 988 /* Ignore empty ranges, they imply no translation required */ 989 if (ranges && len > 0) 990 break; 991 992 /* Once we find 'dma-ranges', then a missing one is an error */ 993 if (found_dma_ranges && !ranges) { 994 ret = -ENODEV; 995 goto out; 996 } 997 found_dma_ranges = true; 998 999 node = of_get_next_dma_parent(node); 1000 } 1001 1002 if (!node || !ranges) { 1003 pr_debug("no dma-ranges found for node(%pOF)\n", np); 1004 ret = -ENODEV; 1005 goto out; 1006 } 1007 1008 of_dma_range_parser_init(&parser, node); 1009 for_each_of_range(&parser, &range) { 1010 if (range.cpu_addr == OF_BAD_ADDR) { 1011 pr_err("translation of DMA address(%llx) to CPU address failed node(%pOF)\n", 1012 range.bus_addr, node); 1013 continue; 1014 } 1015 num_ranges++; 1016 } 1017 1018 if (!num_ranges) { 1019 ret = -EINVAL; 1020 goto out; 1021 } 1022 1023 r = kcalloc(num_ranges + 1, sizeof(*r), GFP_KERNEL); 1024 if (!r) { 1025 ret = -ENOMEM; 1026 goto out; 1027 } 1028 1029 /* 1030 * Record all info in the generic DMA ranges array for struct device, 1031 * returning an error if we don't find any parsable ranges. 1032 */ 1033 *map = r; 1034 of_dma_range_parser_init(&parser, node); 1035 for_each_of_range(&parser, &range) { 1036 pr_debug("dma_addr(%llx) cpu_addr(%llx) size(%llx)\n", 1037 range.bus_addr, range.cpu_addr, range.size); 1038 if (range.cpu_addr == OF_BAD_ADDR) 1039 continue; 1040 r->cpu_start = range.cpu_addr; 1041 r->dma_start = range.bus_addr; 1042 r->size = range.size; 1043 r->offset = range.cpu_addr - range.bus_addr; 1044 r++; 1045 } 1046 out: 1047 of_node_put(node); 1048 return ret; 1049 } 1050 #endif /* CONFIG_HAS_DMA */ 1051 1052 /** 1053 * of_dma_get_max_cpu_address - Gets highest CPU address suitable for DMA 1054 * @np: The node to start searching from or NULL to start from the root 1055 * 1056 * Gets the highest CPU physical address that is addressable by all DMA masters 1057 * in the sub-tree pointed by np, or the whole tree if NULL is passed. If no 1058 * DMA constrained device is found, it returns PHYS_ADDR_MAX. 1059 */ 1060 phys_addr_t __init of_dma_get_max_cpu_address(struct device_node *np) 1061 { 1062 phys_addr_t max_cpu_addr = PHYS_ADDR_MAX; 1063 struct of_range_parser parser; 1064 phys_addr_t subtree_max_addr; 1065 struct device_node *child; 1066 struct of_range range; 1067 const __be32 *ranges; 1068 u64 cpu_end = 0; 1069 int len; 1070 1071 if (!np) 1072 np = of_root; 1073 1074 ranges = of_get_property(np, "dma-ranges", &len); 1075 if (ranges && len) { 1076 of_dma_range_parser_init(&parser, np); 1077 for_each_of_range(&parser, &range) 1078 if (range.cpu_addr + range.size > cpu_end) 1079 cpu_end = range.cpu_addr + range.size - 1; 1080 1081 if (max_cpu_addr > cpu_end) 1082 max_cpu_addr = cpu_end; 1083 } 1084 1085 for_each_available_child_of_node(np, child) { 1086 subtree_max_addr = of_dma_get_max_cpu_address(child); 1087 if (max_cpu_addr > subtree_max_addr) 1088 max_cpu_addr = subtree_max_addr; 1089 } 1090 1091 return max_cpu_addr; 1092 } 1093 1094 /** 1095 * of_dma_is_coherent - Check if device is coherent 1096 * @np: device node 1097 * 1098 * It returns true if "dma-coherent" property was found 1099 * for this device in the DT, or if DMA is coherent by 1100 * default for OF devices on the current platform and no 1101 * "dma-noncoherent" property was found for this device. 1102 */ 1103 bool of_dma_is_coherent(struct device_node *np) 1104 { 1105 struct device_node *node; 1106 bool is_coherent = IS_ENABLED(CONFIG_OF_DMA_DEFAULT_COHERENT); 1107 1108 node = of_node_get(np); 1109 1110 while (node) { 1111 if (of_property_read_bool(node, "dma-coherent")) { 1112 is_coherent = true; 1113 break; 1114 } 1115 if (of_property_read_bool(node, "dma-noncoherent")) { 1116 is_coherent = false; 1117 break; 1118 } 1119 node = of_get_next_dma_parent(node); 1120 } 1121 of_node_put(node); 1122 return is_coherent; 1123 } 1124 EXPORT_SYMBOL_GPL(of_dma_is_coherent); 1125 1126 /** 1127 * of_mmio_is_nonposted - Check if device uses non-posted MMIO 1128 * @np: device node 1129 * 1130 * Returns true if the "nonposted-mmio" property was found for 1131 * the device's bus. 1132 * 1133 * This is currently only enabled on builds that support Apple ARM devices, as 1134 * an optimization. 1135 */ 1136 static bool of_mmio_is_nonposted(struct device_node *np) 1137 { 1138 struct device_node *parent; 1139 bool nonposted; 1140 1141 if (!IS_ENABLED(CONFIG_ARCH_APPLE)) 1142 return false; 1143 1144 parent = of_get_parent(np); 1145 if (!parent) 1146 return false; 1147 1148 nonposted = of_property_read_bool(parent, "nonposted-mmio"); 1149 1150 of_node_put(parent); 1151 return nonposted; 1152 } 1153