1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * NVMe over Fabrics RDMA target. 4 * Copyright (c) 2015-2016 HGST, a Western Digital Company. 5 */ 6 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 7 #include <linux/atomic.h> 8 #include <linux/ctype.h> 9 #include <linux/delay.h> 10 #include <linux/err.h> 11 #include <linux/init.h> 12 #include <linux/module.h> 13 #include <linux/nvme.h> 14 #include <linux/slab.h> 15 #include <linux/string.h> 16 #include <linux/wait.h> 17 #include <linux/inet.h> 18 #include <asm/unaligned.h> 19 20 #include <rdma/ib_verbs.h> 21 #include <rdma/rdma_cm.h> 22 #include <rdma/rw.h> 23 24 #include <linux/nvme-rdma.h> 25 #include "nvmet.h" 26 27 /* 28 * We allow at least 1 page, up to 4 SGEs, and up to 16KB of inline data 29 */ 30 #define NVMET_RDMA_DEFAULT_INLINE_DATA_SIZE PAGE_SIZE 31 #define NVMET_RDMA_MAX_INLINE_SGE 4 32 #define NVMET_RDMA_MAX_INLINE_DATA_SIZE max_t(int, SZ_16K, PAGE_SIZE) 33 34 /* Assume mpsmin == device_page_size == 4KB */ 35 #define NVMET_RDMA_MAX_MDTS 8 36 #define NVMET_RDMA_MAX_METADATA_MDTS 5 37 38 struct nvmet_rdma_srq; 39 40 struct nvmet_rdma_cmd { 41 struct ib_sge sge[NVMET_RDMA_MAX_INLINE_SGE + 1]; 42 struct ib_cqe cqe; 43 struct ib_recv_wr wr; 44 struct scatterlist inline_sg[NVMET_RDMA_MAX_INLINE_SGE]; 45 struct nvme_command *nvme_cmd; 46 struct nvmet_rdma_queue *queue; 47 struct nvmet_rdma_srq *nsrq; 48 }; 49 50 enum { 51 NVMET_RDMA_REQ_INLINE_DATA = (1 << 0), 52 NVMET_RDMA_REQ_INVALIDATE_RKEY = (1 << 1), 53 }; 54 55 struct nvmet_rdma_rsp { 56 struct ib_sge send_sge; 57 struct ib_cqe send_cqe; 58 struct ib_send_wr send_wr; 59 60 struct nvmet_rdma_cmd *cmd; 61 struct nvmet_rdma_queue *queue; 62 63 struct ib_cqe read_cqe; 64 struct ib_cqe write_cqe; 65 struct rdma_rw_ctx rw; 66 67 struct nvmet_req req; 68 69 bool allocated; 70 u8 n_rdma; 71 u32 flags; 72 u32 invalidate_rkey; 73 74 struct list_head wait_list; 75 struct list_head free_list; 76 }; 77 78 enum nvmet_rdma_queue_state { 79 NVMET_RDMA_Q_CONNECTING, 80 NVMET_RDMA_Q_LIVE, 81 NVMET_RDMA_Q_DISCONNECTING, 82 }; 83 84 struct nvmet_rdma_queue { 85 struct rdma_cm_id *cm_id; 86 struct ib_qp *qp; 87 struct nvmet_port *port; 88 struct ib_cq *cq; 89 atomic_t sq_wr_avail; 90 struct nvmet_rdma_device *dev; 91 struct nvmet_rdma_srq *nsrq; 92 spinlock_t state_lock; 93 enum nvmet_rdma_queue_state state; 94 struct nvmet_cq nvme_cq; 95 struct nvmet_sq nvme_sq; 96 97 struct nvmet_rdma_rsp *rsps; 98 struct list_head free_rsps; 99 spinlock_t rsps_lock; 100 struct nvmet_rdma_cmd *cmds; 101 102 struct work_struct release_work; 103 struct list_head rsp_wait_list; 104 struct list_head rsp_wr_wait_list; 105 spinlock_t rsp_wr_wait_lock; 106 107 int idx; 108 int host_qid; 109 int comp_vector; 110 int recv_queue_size; 111 int send_queue_size; 112 113 struct list_head queue_list; 114 }; 115 116 struct nvmet_rdma_port { 117 struct nvmet_port *nport; 118 struct sockaddr_storage addr; 119 struct rdma_cm_id *cm_id; 120 struct delayed_work repair_work; 121 }; 122 123 struct nvmet_rdma_srq { 124 struct ib_srq *srq; 125 struct nvmet_rdma_cmd *cmds; 126 struct nvmet_rdma_device *ndev; 127 }; 128 129 struct nvmet_rdma_device { 130 struct ib_device *device; 131 struct ib_pd *pd; 132 struct nvmet_rdma_srq **srqs; 133 int srq_count; 134 size_t srq_size; 135 struct kref ref; 136 struct list_head entry; 137 int inline_data_size; 138 int inline_page_count; 139 }; 140 141 static bool nvmet_rdma_use_srq; 142 module_param_named(use_srq, nvmet_rdma_use_srq, bool, 0444); 143 MODULE_PARM_DESC(use_srq, "Use shared receive queue."); 144 145 static int srq_size_set(const char *val, const struct kernel_param *kp); 146 static const struct kernel_param_ops srq_size_ops = { 147 .set = srq_size_set, 148 .get = param_get_int, 149 }; 150 151 static int nvmet_rdma_srq_size = 1024; 152 module_param_cb(srq_size, &srq_size_ops, &nvmet_rdma_srq_size, 0644); 153 MODULE_PARM_DESC(srq_size, "set Shared Receive Queue (SRQ) size, should >= 256 (default: 1024)"); 154 155 static DEFINE_IDA(nvmet_rdma_queue_ida); 156 static LIST_HEAD(nvmet_rdma_queue_list); 157 static DEFINE_MUTEX(nvmet_rdma_queue_mutex); 158 159 static LIST_HEAD(device_list); 160 static DEFINE_MUTEX(device_list_mutex); 161 162 static bool nvmet_rdma_execute_command(struct nvmet_rdma_rsp *rsp); 163 static void nvmet_rdma_send_done(struct ib_cq *cq, struct ib_wc *wc); 164 static void nvmet_rdma_recv_done(struct ib_cq *cq, struct ib_wc *wc); 165 static void nvmet_rdma_read_data_done(struct ib_cq *cq, struct ib_wc *wc); 166 static void nvmet_rdma_write_data_done(struct ib_cq *cq, struct ib_wc *wc); 167 static void nvmet_rdma_qp_event(struct ib_event *event, void *priv); 168 static void nvmet_rdma_queue_disconnect(struct nvmet_rdma_queue *queue); 169 static void nvmet_rdma_free_rsp(struct nvmet_rdma_device *ndev, 170 struct nvmet_rdma_rsp *r); 171 static int nvmet_rdma_alloc_rsp(struct nvmet_rdma_device *ndev, 172 struct nvmet_rdma_rsp *r); 173 174 static const struct nvmet_fabrics_ops nvmet_rdma_ops; 175 176 static int srq_size_set(const char *val, const struct kernel_param *kp) 177 { 178 int n = 0, ret; 179 180 ret = kstrtoint(val, 10, &n); 181 if (ret != 0 || n < 256) 182 return -EINVAL; 183 184 return param_set_int(val, kp); 185 } 186 187 static int num_pages(int len) 188 { 189 return 1 + (((len - 1) & PAGE_MASK) >> PAGE_SHIFT); 190 } 191 192 static inline bool nvmet_rdma_need_data_in(struct nvmet_rdma_rsp *rsp) 193 { 194 return nvme_is_write(rsp->req.cmd) && 195 rsp->req.transfer_len && 196 !(rsp->flags & NVMET_RDMA_REQ_INLINE_DATA); 197 } 198 199 static inline bool nvmet_rdma_need_data_out(struct nvmet_rdma_rsp *rsp) 200 { 201 return !nvme_is_write(rsp->req.cmd) && 202 rsp->req.transfer_len && 203 !rsp->req.cqe->status && 204 !(rsp->flags & NVMET_RDMA_REQ_INLINE_DATA); 205 } 206 207 static inline struct nvmet_rdma_rsp * 208 nvmet_rdma_get_rsp(struct nvmet_rdma_queue *queue) 209 { 210 struct nvmet_rdma_rsp *rsp; 211 unsigned long flags; 212 213 spin_lock_irqsave(&queue->rsps_lock, flags); 214 rsp = list_first_entry_or_null(&queue->free_rsps, 215 struct nvmet_rdma_rsp, free_list); 216 if (likely(rsp)) 217 list_del(&rsp->free_list); 218 spin_unlock_irqrestore(&queue->rsps_lock, flags); 219 220 if (unlikely(!rsp)) { 221 int ret; 222 223 rsp = kzalloc(sizeof(*rsp), GFP_KERNEL); 224 if (unlikely(!rsp)) 225 return NULL; 226 ret = nvmet_rdma_alloc_rsp(queue->dev, rsp); 227 if (unlikely(ret)) { 228 kfree(rsp); 229 return NULL; 230 } 231 232 rsp->allocated = true; 233 } 234 235 return rsp; 236 } 237 238 static inline void 239 nvmet_rdma_put_rsp(struct nvmet_rdma_rsp *rsp) 240 { 241 unsigned long flags; 242 243 if (unlikely(rsp->allocated)) { 244 nvmet_rdma_free_rsp(rsp->queue->dev, rsp); 245 kfree(rsp); 246 return; 247 } 248 249 spin_lock_irqsave(&rsp->queue->rsps_lock, flags); 250 list_add_tail(&rsp->free_list, &rsp->queue->free_rsps); 251 spin_unlock_irqrestore(&rsp->queue->rsps_lock, flags); 252 } 253 254 static void nvmet_rdma_free_inline_pages(struct nvmet_rdma_device *ndev, 255 struct nvmet_rdma_cmd *c) 256 { 257 struct scatterlist *sg; 258 struct ib_sge *sge; 259 int i; 260 261 if (!ndev->inline_data_size) 262 return; 263 264 sg = c->inline_sg; 265 sge = &c->sge[1]; 266 267 for (i = 0; i < ndev->inline_page_count; i++, sg++, sge++) { 268 if (sge->length) 269 ib_dma_unmap_page(ndev->device, sge->addr, 270 sge->length, DMA_FROM_DEVICE); 271 if (sg_page(sg)) 272 __free_page(sg_page(sg)); 273 } 274 } 275 276 static int nvmet_rdma_alloc_inline_pages(struct nvmet_rdma_device *ndev, 277 struct nvmet_rdma_cmd *c) 278 { 279 struct scatterlist *sg; 280 struct ib_sge *sge; 281 struct page *pg; 282 int len; 283 int i; 284 285 if (!ndev->inline_data_size) 286 return 0; 287 288 sg = c->inline_sg; 289 sg_init_table(sg, ndev->inline_page_count); 290 sge = &c->sge[1]; 291 len = ndev->inline_data_size; 292 293 for (i = 0; i < ndev->inline_page_count; i++, sg++, sge++) { 294 pg = alloc_page(GFP_KERNEL); 295 if (!pg) 296 goto out_err; 297 sg_assign_page(sg, pg); 298 sge->addr = ib_dma_map_page(ndev->device, 299 pg, 0, PAGE_SIZE, DMA_FROM_DEVICE); 300 if (ib_dma_mapping_error(ndev->device, sge->addr)) 301 goto out_err; 302 sge->length = min_t(int, len, PAGE_SIZE); 303 sge->lkey = ndev->pd->local_dma_lkey; 304 len -= sge->length; 305 } 306 307 return 0; 308 out_err: 309 for (; i >= 0; i--, sg--, sge--) { 310 if (sge->length) 311 ib_dma_unmap_page(ndev->device, sge->addr, 312 sge->length, DMA_FROM_DEVICE); 313 if (sg_page(sg)) 314 __free_page(sg_page(sg)); 315 } 316 return -ENOMEM; 317 } 318 319 static int nvmet_rdma_alloc_cmd(struct nvmet_rdma_device *ndev, 320 struct nvmet_rdma_cmd *c, bool admin) 321 { 322 /* NVMe command / RDMA RECV */ 323 c->nvme_cmd = kmalloc(sizeof(*c->nvme_cmd), GFP_KERNEL); 324 if (!c->nvme_cmd) 325 goto out; 326 327 c->sge[0].addr = ib_dma_map_single(ndev->device, c->nvme_cmd, 328 sizeof(*c->nvme_cmd), DMA_FROM_DEVICE); 329 if (ib_dma_mapping_error(ndev->device, c->sge[0].addr)) 330 goto out_free_cmd; 331 332 c->sge[0].length = sizeof(*c->nvme_cmd); 333 c->sge[0].lkey = ndev->pd->local_dma_lkey; 334 335 if (!admin && nvmet_rdma_alloc_inline_pages(ndev, c)) 336 goto out_unmap_cmd; 337 338 c->cqe.done = nvmet_rdma_recv_done; 339 340 c->wr.wr_cqe = &c->cqe; 341 c->wr.sg_list = c->sge; 342 c->wr.num_sge = admin ? 1 : ndev->inline_page_count + 1; 343 344 return 0; 345 346 out_unmap_cmd: 347 ib_dma_unmap_single(ndev->device, c->sge[0].addr, 348 sizeof(*c->nvme_cmd), DMA_FROM_DEVICE); 349 out_free_cmd: 350 kfree(c->nvme_cmd); 351 352 out: 353 return -ENOMEM; 354 } 355 356 static void nvmet_rdma_free_cmd(struct nvmet_rdma_device *ndev, 357 struct nvmet_rdma_cmd *c, bool admin) 358 { 359 if (!admin) 360 nvmet_rdma_free_inline_pages(ndev, c); 361 ib_dma_unmap_single(ndev->device, c->sge[0].addr, 362 sizeof(*c->nvme_cmd), DMA_FROM_DEVICE); 363 kfree(c->nvme_cmd); 364 } 365 366 static struct nvmet_rdma_cmd * 367 nvmet_rdma_alloc_cmds(struct nvmet_rdma_device *ndev, 368 int nr_cmds, bool admin) 369 { 370 struct nvmet_rdma_cmd *cmds; 371 int ret = -EINVAL, i; 372 373 cmds = kcalloc(nr_cmds, sizeof(struct nvmet_rdma_cmd), GFP_KERNEL); 374 if (!cmds) 375 goto out; 376 377 for (i = 0; i < nr_cmds; i++) { 378 ret = nvmet_rdma_alloc_cmd(ndev, cmds + i, admin); 379 if (ret) 380 goto out_free; 381 } 382 383 return cmds; 384 385 out_free: 386 while (--i >= 0) 387 nvmet_rdma_free_cmd(ndev, cmds + i, admin); 388 kfree(cmds); 389 out: 390 return ERR_PTR(ret); 391 } 392 393 static void nvmet_rdma_free_cmds(struct nvmet_rdma_device *ndev, 394 struct nvmet_rdma_cmd *cmds, int nr_cmds, bool admin) 395 { 396 int i; 397 398 for (i = 0; i < nr_cmds; i++) 399 nvmet_rdma_free_cmd(ndev, cmds + i, admin); 400 kfree(cmds); 401 } 402 403 static int nvmet_rdma_alloc_rsp(struct nvmet_rdma_device *ndev, 404 struct nvmet_rdma_rsp *r) 405 { 406 /* NVMe CQE / RDMA SEND */ 407 r->req.cqe = kmalloc(sizeof(*r->req.cqe), GFP_KERNEL); 408 if (!r->req.cqe) 409 goto out; 410 411 r->send_sge.addr = ib_dma_map_single(ndev->device, r->req.cqe, 412 sizeof(*r->req.cqe), DMA_TO_DEVICE); 413 if (ib_dma_mapping_error(ndev->device, r->send_sge.addr)) 414 goto out_free_rsp; 415 416 r->req.p2p_client = &ndev->device->dev; 417 r->send_sge.length = sizeof(*r->req.cqe); 418 r->send_sge.lkey = ndev->pd->local_dma_lkey; 419 420 r->send_cqe.done = nvmet_rdma_send_done; 421 422 r->send_wr.wr_cqe = &r->send_cqe; 423 r->send_wr.sg_list = &r->send_sge; 424 r->send_wr.num_sge = 1; 425 r->send_wr.send_flags = IB_SEND_SIGNALED; 426 427 /* Data In / RDMA READ */ 428 r->read_cqe.done = nvmet_rdma_read_data_done; 429 /* Data Out / RDMA WRITE */ 430 r->write_cqe.done = nvmet_rdma_write_data_done; 431 432 return 0; 433 434 out_free_rsp: 435 kfree(r->req.cqe); 436 out: 437 return -ENOMEM; 438 } 439 440 static void nvmet_rdma_free_rsp(struct nvmet_rdma_device *ndev, 441 struct nvmet_rdma_rsp *r) 442 { 443 ib_dma_unmap_single(ndev->device, r->send_sge.addr, 444 sizeof(*r->req.cqe), DMA_TO_DEVICE); 445 kfree(r->req.cqe); 446 } 447 448 static int 449 nvmet_rdma_alloc_rsps(struct nvmet_rdma_queue *queue) 450 { 451 struct nvmet_rdma_device *ndev = queue->dev; 452 int nr_rsps = queue->recv_queue_size * 2; 453 int ret = -EINVAL, i; 454 455 queue->rsps = kcalloc(nr_rsps, sizeof(struct nvmet_rdma_rsp), 456 GFP_KERNEL); 457 if (!queue->rsps) 458 goto out; 459 460 for (i = 0; i < nr_rsps; i++) { 461 struct nvmet_rdma_rsp *rsp = &queue->rsps[i]; 462 463 ret = nvmet_rdma_alloc_rsp(ndev, rsp); 464 if (ret) 465 goto out_free; 466 467 list_add_tail(&rsp->free_list, &queue->free_rsps); 468 } 469 470 return 0; 471 472 out_free: 473 while (--i >= 0) { 474 struct nvmet_rdma_rsp *rsp = &queue->rsps[i]; 475 476 list_del(&rsp->free_list); 477 nvmet_rdma_free_rsp(ndev, rsp); 478 } 479 kfree(queue->rsps); 480 out: 481 return ret; 482 } 483 484 static void nvmet_rdma_free_rsps(struct nvmet_rdma_queue *queue) 485 { 486 struct nvmet_rdma_device *ndev = queue->dev; 487 int i, nr_rsps = queue->recv_queue_size * 2; 488 489 for (i = 0; i < nr_rsps; i++) { 490 struct nvmet_rdma_rsp *rsp = &queue->rsps[i]; 491 492 list_del(&rsp->free_list); 493 nvmet_rdma_free_rsp(ndev, rsp); 494 } 495 kfree(queue->rsps); 496 } 497 498 static int nvmet_rdma_post_recv(struct nvmet_rdma_device *ndev, 499 struct nvmet_rdma_cmd *cmd) 500 { 501 int ret; 502 503 ib_dma_sync_single_for_device(ndev->device, 504 cmd->sge[0].addr, cmd->sge[0].length, 505 DMA_FROM_DEVICE); 506 507 if (cmd->nsrq) 508 ret = ib_post_srq_recv(cmd->nsrq->srq, &cmd->wr, NULL); 509 else 510 ret = ib_post_recv(cmd->queue->qp, &cmd->wr, NULL); 511 512 if (unlikely(ret)) 513 pr_err("post_recv cmd failed\n"); 514 515 return ret; 516 } 517 518 static void nvmet_rdma_process_wr_wait_list(struct nvmet_rdma_queue *queue) 519 { 520 spin_lock(&queue->rsp_wr_wait_lock); 521 while (!list_empty(&queue->rsp_wr_wait_list)) { 522 struct nvmet_rdma_rsp *rsp; 523 bool ret; 524 525 rsp = list_entry(queue->rsp_wr_wait_list.next, 526 struct nvmet_rdma_rsp, wait_list); 527 list_del(&rsp->wait_list); 528 529 spin_unlock(&queue->rsp_wr_wait_lock); 530 ret = nvmet_rdma_execute_command(rsp); 531 spin_lock(&queue->rsp_wr_wait_lock); 532 533 if (!ret) { 534 list_add(&rsp->wait_list, &queue->rsp_wr_wait_list); 535 break; 536 } 537 } 538 spin_unlock(&queue->rsp_wr_wait_lock); 539 } 540 541 static u16 nvmet_rdma_check_pi_status(struct ib_mr *sig_mr) 542 { 543 struct ib_mr_status mr_status; 544 int ret; 545 u16 status = 0; 546 547 ret = ib_check_mr_status(sig_mr, IB_MR_CHECK_SIG_STATUS, &mr_status); 548 if (ret) { 549 pr_err("ib_check_mr_status failed, ret %d\n", ret); 550 return NVME_SC_INVALID_PI; 551 } 552 553 if (mr_status.fail_status & IB_MR_CHECK_SIG_STATUS) { 554 switch (mr_status.sig_err.err_type) { 555 case IB_SIG_BAD_GUARD: 556 status = NVME_SC_GUARD_CHECK; 557 break; 558 case IB_SIG_BAD_REFTAG: 559 status = NVME_SC_REFTAG_CHECK; 560 break; 561 case IB_SIG_BAD_APPTAG: 562 status = NVME_SC_APPTAG_CHECK; 563 break; 564 } 565 pr_err("PI error found type %d expected 0x%x vs actual 0x%x\n", 566 mr_status.sig_err.err_type, 567 mr_status.sig_err.expected, 568 mr_status.sig_err.actual); 569 } 570 571 return status; 572 } 573 574 static void nvmet_rdma_set_sig_domain(struct blk_integrity *bi, 575 struct nvme_command *cmd, struct ib_sig_domain *domain, 576 u16 control, u8 pi_type) 577 { 578 domain->sig_type = IB_SIG_TYPE_T10_DIF; 579 domain->sig.dif.bg_type = IB_T10DIF_CRC; 580 domain->sig.dif.pi_interval = 1 << bi->interval_exp; 581 domain->sig.dif.ref_tag = le32_to_cpu(cmd->rw.reftag); 582 if (control & NVME_RW_PRINFO_PRCHK_REF) 583 domain->sig.dif.ref_remap = true; 584 585 domain->sig.dif.app_tag = le16_to_cpu(cmd->rw.apptag); 586 domain->sig.dif.apptag_check_mask = le16_to_cpu(cmd->rw.appmask); 587 domain->sig.dif.app_escape = true; 588 if (pi_type == NVME_NS_DPS_PI_TYPE3) 589 domain->sig.dif.ref_escape = true; 590 } 591 592 static void nvmet_rdma_set_sig_attrs(struct nvmet_req *req, 593 struct ib_sig_attrs *sig_attrs) 594 { 595 struct nvme_command *cmd = req->cmd; 596 u16 control = le16_to_cpu(cmd->rw.control); 597 u8 pi_type = req->ns->pi_type; 598 struct blk_integrity *bi; 599 600 bi = bdev_get_integrity(req->ns->bdev); 601 602 memset(sig_attrs, 0, sizeof(*sig_attrs)); 603 604 if (control & NVME_RW_PRINFO_PRACT) { 605 /* for WRITE_INSERT/READ_STRIP no wire domain */ 606 sig_attrs->wire.sig_type = IB_SIG_TYPE_NONE; 607 nvmet_rdma_set_sig_domain(bi, cmd, &sig_attrs->mem, control, 608 pi_type); 609 /* Clear the PRACT bit since HCA will generate/verify the PI */ 610 control &= ~NVME_RW_PRINFO_PRACT; 611 cmd->rw.control = cpu_to_le16(control); 612 /* PI is added by the HW */ 613 req->transfer_len += req->metadata_len; 614 } else { 615 /* for WRITE_PASS/READ_PASS both wire/memory domains exist */ 616 nvmet_rdma_set_sig_domain(bi, cmd, &sig_attrs->wire, control, 617 pi_type); 618 nvmet_rdma_set_sig_domain(bi, cmd, &sig_attrs->mem, control, 619 pi_type); 620 } 621 622 if (control & NVME_RW_PRINFO_PRCHK_REF) 623 sig_attrs->check_mask |= IB_SIG_CHECK_REFTAG; 624 if (control & NVME_RW_PRINFO_PRCHK_GUARD) 625 sig_attrs->check_mask |= IB_SIG_CHECK_GUARD; 626 if (control & NVME_RW_PRINFO_PRCHK_APP) 627 sig_attrs->check_mask |= IB_SIG_CHECK_APPTAG; 628 } 629 630 static int nvmet_rdma_rw_ctx_init(struct nvmet_rdma_rsp *rsp, u64 addr, u32 key, 631 struct ib_sig_attrs *sig_attrs) 632 { 633 struct rdma_cm_id *cm_id = rsp->queue->cm_id; 634 struct nvmet_req *req = &rsp->req; 635 int ret; 636 637 if (req->metadata_len) 638 ret = rdma_rw_ctx_signature_init(&rsp->rw, cm_id->qp, 639 cm_id->port_num, req->sg, req->sg_cnt, 640 req->metadata_sg, req->metadata_sg_cnt, sig_attrs, 641 addr, key, nvmet_data_dir(req)); 642 else 643 ret = rdma_rw_ctx_init(&rsp->rw, cm_id->qp, cm_id->port_num, 644 req->sg, req->sg_cnt, 0, addr, key, 645 nvmet_data_dir(req)); 646 647 return ret; 648 } 649 650 static void nvmet_rdma_rw_ctx_destroy(struct nvmet_rdma_rsp *rsp) 651 { 652 struct rdma_cm_id *cm_id = rsp->queue->cm_id; 653 struct nvmet_req *req = &rsp->req; 654 655 if (req->metadata_len) 656 rdma_rw_ctx_destroy_signature(&rsp->rw, cm_id->qp, 657 cm_id->port_num, req->sg, req->sg_cnt, 658 req->metadata_sg, req->metadata_sg_cnt, 659 nvmet_data_dir(req)); 660 else 661 rdma_rw_ctx_destroy(&rsp->rw, cm_id->qp, cm_id->port_num, 662 req->sg, req->sg_cnt, nvmet_data_dir(req)); 663 } 664 665 static void nvmet_rdma_release_rsp(struct nvmet_rdma_rsp *rsp) 666 { 667 struct nvmet_rdma_queue *queue = rsp->queue; 668 669 atomic_add(1 + rsp->n_rdma, &queue->sq_wr_avail); 670 671 if (rsp->n_rdma) 672 nvmet_rdma_rw_ctx_destroy(rsp); 673 674 if (rsp->req.sg != rsp->cmd->inline_sg) 675 nvmet_req_free_sgls(&rsp->req); 676 677 if (unlikely(!list_empty_careful(&queue->rsp_wr_wait_list))) 678 nvmet_rdma_process_wr_wait_list(queue); 679 680 nvmet_rdma_put_rsp(rsp); 681 } 682 683 static void nvmet_rdma_error_comp(struct nvmet_rdma_queue *queue) 684 { 685 if (queue->nvme_sq.ctrl) { 686 nvmet_ctrl_fatal_error(queue->nvme_sq.ctrl); 687 } else { 688 /* 689 * we didn't setup the controller yet in case 690 * of admin connect error, just disconnect and 691 * cleanup the queue 692 */ 693 nvmet_rdma_queue_disconnect(queue); 694 } 695 } 696 697 static void nvmet_rdma_send_done(struct ib_cq *cq, struct ib_wc *wc) 698 { 699 struct nvmet_rdma_rsp *rsp = 700 container_of(wc->wr_cqe, struct nvmet_rdma_rsp, send_cqe); 701 struct nvmet_rdma_queue *queue = cq->cq_context; 702 703 nvmet_rdma_release_rsp(rsp); 704 705 if (unlikely(wc->status != IB_WC_SUCCESS && 706 wc->status != IB_WC_WR_FLUSH_ERR)) { 707 pr_err("SEND for CQE 0x%p failed with status %s (%d).\n", 708 wc->wr_cqe, ib_wc_status_msg(wc->status), wc->status); 709 nvmet_rdma_error_comp(queue); 710 } 711 } 712 713 static void nvmet_rdma_queue_response(struct nvmet_req *req) 714 { 715 struct nvmet_rdma_rsp *rsp = 716 container_of(req, struct nvmet_rdma_rsp, req); 717 struct rdma_cm_id *cm_id = rsp->queue->cm_id; 718 struct ib_send_wr *first_wr; 719 720 if (rsp->flags & NVMET_RDMA_REQ_INVALIDATE_RKEY) { 721 rsp->send_wr.opcode = IB_WR_SEND_WITH_INV; 722 rsp->send_wr.ex.invalidate_rkey = rsp->invalidate_rkey; 723 } else { 724 rsp->send_wr.opcode = IB_WR_SEND; 725 } 726 727 if (nvmet_rdma_need_data_out(rsp)) { 728 if (rsp->req.metadata_len) 729 first_wr = rdma_rw_ctx_wrs(&rsp->rw, cm_id->qp, 730 cm_id->port_num, &rsp->write_cqe, NULL); 731 else 732 first_wr = rdma_rw_ctx_wrs(&rsp->rw, cm_id->qp, 733 cm_id->port_num, NULL, &rsp->send_wr); 734 } else { 735 first_wr = &rsp->send_wr; 736 } 737 738 nvmet_rdma_post_recv(rsp->queue->dev, rsp->cmd); 739 740 ib_dma_sync_single_for_device(rsp->queue->dev->device, 741 rsp->send_sge.addr, rsp->send_sge.length, 742 DMA_TO_DEVICE); 743 744 if (unlikely(ib_post_send(cm_id->qp, first_wr, NULL))) { 745 pr_err("sending cmd response failed\n"); 746 nvmet_rdma_release_rsp(rsp); 747 } 748 } 749 750 static void nvmet_rdma_read_data_done(struct ib_cq *cq, struct ib_wc *wc) 751 { 752 struct nvmet_rdma_rsp *rsp = 753 container_of(wc->wr_cqe, struct nvmet_rdma_rsp, read_cqe); 754 struct nvmet_rdma_queue *queue = cq->cq_context; 755 u16 status = 0; 756 757 WARN_ON(rsp->n_rdma <= 0); 758 atomic_add(rsp->n_rdma, &queue->sq_wr_avail); 759 rsp->n_rdma = 0; 760 761 if (unlikely(wc->status != IB_WC_SUCCESS)) { 762 nvmet_rdma_rw_ctx_destroy(rsp); 763 nvmet_req_uninit(&rsp->req); 764 nvmet_rdma_release_rsp(rsp); 765 if (wc->status != IB_WC_WR_FLUSH_ERR) { 766 pr_info("RDMA READ for CQE 0x%p failed with status %s (%d).\n", 767 wc->wr_cqe, ib_wc_status_msg(wc->status), wc->status); 768 nvmet_rdma_error_comp(queue); 769 } 770 return; 771 } 772 773 if (rsp->req.metadata_len) 774 status = nvmet_rdma_check_pi_status(rsp->rw.reg->mr); 775 nvmet_rdma_rw_ctx_destroy(rsp); 776 777 if (unlikely(status)) 778 nvmet_req_complete(&rsp->req, status); 779 else 780 rsp->req.execute(&rsp->req); 781 } 782 783 static void nvmet_rdma_write_data_done(struct ib_cq *cq, struct ib_wc *wc) 784 { 785 struct nvmet_rdma_rsp *rsp = 786 container_of(wc->wr_cqe, struct nvmet_rdma_rsp, write_cqe); 787 struct nvmet_rdma_queue *queue = cq->cq_context; 788 struct rdma_cm_id *cm_id = rsp->queue->cm_id; 789 u16 status; 790 791 if (!IS_ENABLED(CONFIG_BLK_DEV_INTEGRITY)) 792 return; 793 794 WARN_ON(rsp->n_rdma <= 0); 795 atomic_add(rsp->n_rdma, &queue->sq_wr_avail); 796 rsp->n_rdma = 0; 797 798 if (unlikely(wc->status != IB_WC_SUCCESS)) { 799 nvmet_rdma_rw_ctx_destroy(rsp); 800 nvmet_req_uninit(&rsp->req); 801 nvmet_rdma_release_rsp(rsp); 802 if (wc->status != IB_WC_WR_FLUSH_ERR) { 803 pr_info("RDMA WRITE for CQE 0x%p failed with status %s (%d).\n", 804 wc->wr_cqe, ib_wc_status_msg(wc->status), 805 wc->status); 806 nvmet_rdma_error_comp(queue); 807 } 808 return; 809 } 810 811 /* 812 * Upon RDMA completion check the signature status 813 * - if succeeded send good NVMe response 814 * - if failed send bad NVMe response with appropriate error 815 */ 816 status = nvmet_rdma_check_pi_status(rsp->rw.reg->mr); 817 if (unlikely(status)) 818 rsp->req.cqe->status = cpu_to_le16(status << 1); 819 nvmet_rdma_rw_ctx_destroy(rsp); 820 821 if (unlikely(ib_post_send(cm_id->qp, &rsp->send_wr, NULL))) { 822 pr_err("sending cmd response failed\n"); 823 nvmet_rdma_release_rsp(rsp); 824 } 825 } 826 827 static void nvmet_rdma_use_inline_sg(struct nvmet_rdma_rsp *rsp, u32 len, 828 u64 off) 829 { 830 int sg_count = num_pages(len); 831 struct scatterlist *sg; 832 int i; 833 834 sg = rsp->cmd->inline_sg; 835 for (i = 0; i < sg_count; i++, sg++) { 836 if (i < sg_count - 1) 837 sg_unmark_end(sg); 838 else 839 sg_mark_end(sg); 840 sg->offset = off; 841 sg->length = min_t(int, len, PAGE_SIZE - off); 842 len -= sg->length; 843 if (!i) 844 off = 0; 845 } 846 847 rsp->req.sg = rsp->cmd->inline_sg; 848 rsp->req.sg_cnt = sg_count; 849 } 850 851 static u16 nvmet_rdma_map_sgl_inline(struct nvmet_rdma_rsp *rsp) 852 { 853 struct nvme_sgl_desc *sgl = &rsp->req.cmd->common.dptr.sgl; 854 u64 off = le64_to_cpu(sgl->addr); 855 u32 len = le32_to_cpu(sgl->length); 856 857 if (!nvme_is_write(rsp->req.cmd)) { 858 rsp->req.error_loc = 859 offsetof(struct nvme_common_command, opcode); 860 return NVME_SC_INVALID_FIELD | NVME_SC_DNR; 861 } 862 863 if (off + len > rsp->queue->dev->inline_data_size) { 864 pr_err("invalid inline data offset!\n"); 865 return NVME_SC_SGL_INVALID_OFFSET | NVME_SC_DNR; 866 } 867 868 /* no data command? */ 869 if (!len) 870 return 0; 871 872 nvmet_rdma_use_inline_sg(rsp, len, off); 873 rsp->flags |= NVMET_RDMA_REQ_INLINE_DATA; 874 rsp->req.transfer_len += len; 875 return 0; 876 } 877 878 static u16 nvmet_rdma_map_sgl_keyed(struct nvmet_rdma_rsp *rsp, 879 struct nvme_keyed_sgl_desc *sgl, bool invalidate) 880 { 881 u64 addr = le64_to_cpu(sgl->addr); 882 u32 key = get_unaligned_le32(sgl->key); 883 struct ib_sig_attrs sig_attrs; 884 int ret; 885 886 rsp->req.transfer_len = get_unaligned_le24(sgl->length); 887 888 /* no data command? */ 889 if (!rsp->req.transfer_len) 890 return 0; 891 892 if (rsp->req.metadata_len) 893 nvmet_rdma_set_sig_attrs(&rsp->req, &sig_attrs); 894 895 ret = nvmet_req_alloc_sgls(&rsp->req); 896 if (unlikely(ret < 0)) 897 goto error_out; 898 899 ret = nvmet_rdma_rw_ctx_init(rsp, addr, key, &sig_attrs); 900 if (unlikely(ret < 0)) 901 goto error_out; 902 rsp->n_rdma += ret; 903 904 if (invalidate) { 905 rsp->invalidate_rkey = key; 906 rsp->flags |= NVMET_RDMA_REQ_INVALIDATE_RKEY; 907 } 908 909 return 0; 910 911 error_out: 912 rsp->req.transfer_len = 0; 913 return NVME_SC_INTERNAL; 914 } 915 916 static u16 nvmet_rdma_map_sgl(struct nvmet_rdma_rsp *rsp) 917 { 918 struct nvme_keyed_sgl_desc *sgl = &rsp->req.cmd->common.dptr.ksgl; 919 920 switch (sgl->type >> 4) { 921 case NVME_SGL_FMT_DATA_DESC: 922 switch (sgl->type & 0xf) { 923 case NVME_SGL_FMT_OFFSET: 924 return nvmet_rdma_map_sgl_inline(rsp); 925 default: 926 pr_err("invalid SGL subtype: %#x\n", sgl->type); 927 rsp->req.error_loc = 928 offsetof(struct nvme_common_command, dptr); 929 return NVME_SC_INVALID_FIELD | NVME_SC_DNR; 930 } 931 case NVME_KEY_SGL_FMT_DATA_DESC: 932 switch (sgl->type & 0xf) { 933 case NVME_SGL_FMT_ADDRESS | NVME_SGL_FMT_INVALIDATE: 934 return nvmet_rdma_map_sgl_keyed(rsp, sgl, true); 935 case NVME_SGL_FMT_ADDRESS: 936 return nvmet_rdma_map_sgl_keyed(rsp, sgl, false); 937 default: 938 pr_err("invalid SGL subtype: %#x\n", sgl->type); 939 rsp->req.error_loc = 940 offsetof(struct nvme_common_command, dptr); 941 return NVME_SC_INVALID_FIELD | NVME_SC_DNR; 942 } 943 default: 944 pr_err("invalid SGL type: %#x\n", sgl->type); 945 rsp->req.error_loc = offsetof(struct nvme_common_command, dptr); 946 return NVME_SC_SGL_INVALID_TYPE | NVME_SC_DNR; 947 } 948 } 949 950 static bool nvmet_rdma_execute_command(struct nvmet_rdma_rsp *rsp) 951 { 952 struct nvmet_rdma_queue *queue = rsp->queue; 953 954 if (unlikely(atomic_sub_return(1 + rsp->n_rdma, 955 &queue->sq_wr_avail) < 0)) { 956 pr_debug("IB send queue full (needed %d): queue %u cntlid %u\n", 957 1 + rsp->n_rdma, queue->idx, 958 queue->nvme_sq.ctrl->cntlid); 959 atomic_add(1 + rsp->n_rdma, &queue->sq_wr_avail); 960 return false; 961 } 962 963 if (nvmet_rdma_need_data_in(rsp)) { 964 if (rdma_rw_ctx_post(&rsp->rw, queue->qp, 965 queue->cm_id->port_num, &rsp->read_cqe, NULL)) 966 nvmet_req_complete(&rsp->req, NVME_SC_DATA_XFER_ERROR); 967 } else { 968 rsp->req.execute(&rsp->req); 969 } 970 971 return true; 972 } 973 974 static void nvmet_rdma_handle_command(struct nvmet_rdma_queue *queue, 975 struct nvmet_rdma_rsp *cmd) 976 { 977 u16 status; 978 979 ib_dma_sync_single_for_cpu(queue->dev->device, 980 cmd->cmd->sge[0].addr, cmd->cmd->sge[0].length, 981 DMA_FROM_DEVICE); 982 ib_dma_sync_single_for_cpu(queue->dev->device, 983 cmd->send_sge.addr, cmd->send_sge.length, 984 DMA_TO_DEVICE); 985 986 if (!nvmet_req_init(&cmd->req, &queue->nvme_cq, 987 &queue->nvme_sq, &nvmet_rdma_ops)) 988 return; 989 990 status = nvmet_rdma_map_sgl(cmd); 991 if (status) 992 goto out_err; 993 994 if (unlikely(!nvmet_rdma_execute_command(cmd))) { 995 spin_lock(&queue->rsp_wr_wait_lock); 996 list_add_tail(&cmd->wait_list, &queue->rsp_wr_wait_list); 997 spin_unlock(&queue->rsp_wr_wait_lock); 998 } 999 1000 return; 1001 1002 out_err: 1003 nvmet_req_complete(&cmd->req, status); 1004 } 1005 1006 static void nvmet_rdma_recv_done(struct ib_cq *cq, struct ib_wc *wc) 1007 { 1008 struct nvmet_rdma_cmd *cmd = 1009 container_of(wc->wr_cqe, struct nvmet_rdma_cmd, cqe); 1010 struct nvmet_rdma_queue *queue = cq->cq_context; 1011 struct nvmet_rdma_rsp *rsp; 1012 1013 if (unlikely(wc->status != IB_WC_SUCCESS)) { 1014 if (wc->status != IB_WC_WR_FLUSH_ERR) { 1015 pr_err("RECV for CQE 0x%p failed with status %s (%d)\n", 1016 wc->wr_cqe, ib_wc_status_msg(wc->status), 1017 wc->status); 1018 nvmet_rdma_error_comp(queue); 1019 } 1020 return; 1021 } 1022 1023 if (unlikely(wc->byte_len < sizeof(struct nvme_command))) { 1024 pr_err("Ctrl Fatal Error: capsule size less than 64 bytes\n"); 1025 nvmet_rdma_error_comp(queue); 1026 return; 1027 } 1028 1029 cmd->queue = queue; 1030 rsp = nvmet_rdma_get_rsp(queue); 1031 if (unlikely(!rsp)) { 1032 /* 1033 * we get here only under memory pressure, 1034 * silently drop and have the host retry 1035 * as we can't even fail it. 1036 */ 1037 nvmet_rdma_post_recv(queue->dev, cmd); 1038 return; 1039 } 1040 rsp->queue = queue; 1041 rsp->cmd = cmd; 1042 rsp->flags = 0; 1043 rsp->req.cmd = cmd->nvme_cmd; 1044 rsp->req.port = queue->port; 1045 rsp->n_rdma = 0; 1046 1047 if (unlikely(queue->state != NVMET_RDMA_Q_LIVE)) { 1048 unsigned long flags; 1049 1050 spin_lock_irqsave(&queue->state_lock, flags); 1051 if (queue->state == NVMET_RDMA_Q_CONNECTING) 1052 list_add_tail(&rsp->wait_list, &queue->rsp_wait_list); 1053 else 1054 nvmet_rdma_put_rsp(rsp); 1055 spin_unlock_irqrestore(&queue->state_lock, flags); 1056 return; 1057 } 1058 1059 nvmet_rdma_handle_command(queue, rsp); 1060 } 1061 1062 static void nvmet_rdma_destroy_srq(struct nvmet_rdma_srq *nsrq) 1063 { 1064 nvmet_rdma_free_cmds(nsrq->ndev, nsrq->cmds, nsrq->ndev->srq_size, 1065 false); 1066 ib_destroy_srq(nsrq->srq); 1067 1068 kfree(nsrq); 1069 } 1070 1071 static void nvmet_rdma_destroy_srqs(struct nvmet_rdma_device *ndev) 1072 { 1073 int i; 1074 1075 if (!ndev->srqs) 1076 return; 1077 1078 for (i = 0; i < ndev->srq_count; i++) 1079 nvmet_rdma_destroy_srq(ndev->srqs[i]); 1080 1081 kfree(ndev->srqs); 1082 } 1083 1084 static struct nvmet_rdma_srq * 1085 nvmet_rdma_init_srq(struct nvmet_rdma_device *ndev) 1086 { 1087 struct ib_srq_init_attr srq_attr = { NULL, }; 1088 size_t srq_size = ndev->srq_size; 1089 struct nvmet_rdma_srq *nsrq; 1090 struct ib_srq *srq; 1091 int ret, i; 1092 1093 nsrq = kzalloc(sizeof(*nsrq), GFP_KERNEL); 1094 if (!nsrq) 1095 return ERR_PTR(-ENOMEM); 1096 1097 srq_attr.attr.max_wr = srq_size; 1098 srq_attr.attr.max_sge = 1 + ndev->inline_page_count; 1099 srq_attr.attr.srq_limit = 0; 1100 srq_attr.srq_type = IB_SRQT_BASIC; 1101 srq = ib_create_srq(ndev->pd, &srq_attr); 1102 if (IS_ERR(srq)) { 1103 ret = PTR_ERR(srq); 1104 goto out_free; 1105 } 1106 1107 nsrq->cmds = nvmet_rdma_alloc_cmds(ndev, srq_size, false); 1108 if (IS_ERR(nsrq->cmds)) { 1109 ret = PTR_ERR(nsrq->cmds); 1110 goto out_destroy_srq; 1111 } 1112 1113 nsrq->srq = srq; 1114 nsrq->ndev = ndev; 1115 1116 for (i = 0; i < srq_size; i++) { 1117 nsrq->cmds[i].nsrq = nsrq; 1118 ret = nvmet_rdma_post_recv(ndev, &nsrq->cmds[i]); 1119 if (ret) 1120 goto out_free_cmds; 1121 } 1122 1123 return nsrq; 1124 1125 out_free_cmds: 1126 nvmet_rdma_free_cmds(ndev, nsrq->cmds, srq_size, false); 1127 out_destroy_srq: 1128 ib_destroy_srq(srq); 1129 out_free: 1130 kfree(nsrq); 1131 return ERR_PTR(ret); 1132 } 1133 1134 static int nvmet_rdma_init_srqs(struct nvmet_rdma_device *ndev) 1135 { 1136 int i, ret; 1137 1138 if (!ndev->device->attrs.max_srq_wr || !ndev->device->attrs.max_srq) { 1139 /* 1140 * If SRQs aren't supported we just go ahead and use normal 1141 * non-shared receive queues. 1142 */ 1143 pr_info("SRQ requested but not supported.\n"); 1144 return 0; 1145 } 1146 1147 ndev->srq_size = min(ndev->device->attrs.max_srq_wr, 1148 nvmet_rdma_srq_size); 1149 ndev->srq_count = min(ndev->device->num_comp_vectors, 1150 ndev->device->attrs.max_srq); 1151 1152 ndev->srqs = kcalloc(ndev->srq_count, sizeof(*ndev->srqs), GFP_KERNEL); 1153 if (!ndev->srqs) 1154 return -ENOMEM; 1155 1156 for (i = 0; i < ndev->srq_count; i++) { 1157 ndev->srqs[i] = nvmet_rdma_init_srq(ndev); 1158 if (IS_ERR(ndev->srqs[i])) { 1159 ret = PTR_ERR(ndev->srqs[i]); 1160 goto err_srq; 1161 } 1162 } 1163 1164 return 0; 1165 1166 err_srq: 1167 while (--i >= 0) 1168 nvmet_rdma_destroy_srq(ndev->srqs[i]); 1169 kfree(ndev->srqs); 1170 return ret; 1171 } 1172 1173 static void nvmet_rdma_free_dev(struct kref *ref) 1174 { 1175 struct nvmet_rdma_device *ndev = 1176 container_of(ref, struct nvmet_rdma_device, ref); 1177 1178 mutex_lock(&device_list_mutex); 1179 list_del(&ndev->entry); 1180 mutex_unlock(&device_list_mutex); 1181 1182 nvmet_rdma_destroy_srqs(ndev); 1183 ib_dealloc_pd(ndev->pd); 1184 1185 kfree(ndev); 1186 } 1187 1188 static struct nvmet_rdma_device * 1189 nvmet_rdma_find_get_device(struct rdma_cm_id *cm_id) 1190 { 1191 struct nvmet_rdma_port *port = cm_id->context; 1192 struct nvmet_port *nport = port->nport; 1193 struct nvmet_rdma_device *ndev; 1194 int inline_page_count; 1195 int inline_sge_count; 1196 int ret; 1197 1198 mutex_lock(&device_list_mutex); 1199 list_for_each_entry(ndev, &device_list, entry) { 1200 if (ndev->device->node_guid == cm_id->device->node_guid && 1201 kref_get_unless_zero(&ndev->ref)) 1202 goto out_unlock; 1203 } 1204 1205 ndev = kzalloc(sizeof(*ndev), GFP_KERNEL); 1206 if (!ndev) 1207 goto out_err; 1208 1209 inline_page_count = num_pages(nport->inline_data_size); 1210 inline_sge_count = max(cm_id->device->attrs.max_sge_rd, 1211 cm_id->device->attrs.max_recv_sge) - 1; 1212 if (inline_page_count > inline_sge_count) { 1213 pr_warn("inline_data_size %d cannot be supported by device %s. Reducing to %lu.\n", 1214 nport->inline_data_size, cm_id->device->name, 1215 inline_sge_count * PAGE_SIZE); 1216 nport->inline_data_size = inline_sge_count * PAGE_SIZE; 1217 inline_page_count = inline_sge_count; 1218 } 1219 ndev->inline_data_size = nport->inline_data_size; 1220 ndev->inline_page_count = inline_page_count; 1221 ndev->device = cm_id->device; 1222 kref_init(&ndev->ref); 1223 1224 ndev->pd = ib_alloc_pd(ndev->device, 0); 1225 if (IS_ERR(ndev->pd)) 1226 goto out_free_dev; 1227 1228 if (nvmet_rdma_use_srq) { 1229 ret = nvmet_rdma_init_srqs(ndev); 1230 if (ret) 1231 goto out_free_pd; 1232 } 1233 1234 list_add(&ndev->entry, &device_list); 1235 out_unlock: 1236 mutex_unlock(&device_list_mutex); 1237 pr_debug("added %s.\n", ndev->device->name); 1238 return ndev; 1239 1240 out_free_pd: 1241 ib_dealloc_pd(ndev->pd); 1242 out_free_dev: 1243 kfree(ndev); 1244 out_err: 1245 mutex_unlock(&device_list_mutex); 1246 return NULL; 1247 } 1248 1249 static int nvmet_rdma_create_queue_ib(struct nvmet_rdma_queue *queue) 1250 { 1251 struct ib_qp_init_attr qp_attr; 1252 struct nvmet_rdma_device *ndev = queue->dev; 1253 int nr_cqe, ret, i, factor; 1254 1255 /* 1256 * Reserve CQ slots for RECV + RDMA_READ/RDMA_WRITE + RDMA_SEND. 1257 */ 1258 nr_cqe = queue->recv_queue_size + 2 * queue->send_queue_size; 1259 1260 queue->cq = ib_alloc_cq(ndev->device, queue, 1261 nr_cqe + 1, queue->comp_vector, 1262 IB_POLL_WORKQUEUE); 1263 if (IS_ERR(queue->cq)) { 1264 ret = PTR_ERR(queue->cq); 1265 pr_err("failed to create CQ cqe= %d ret= %d\n", 1266 nr_cqe + 1, ret); 1267 goto out; 1268 } 1269 1270 memset(&qp_attr, 0, sizeof(qp_attr)); 1271 qp_attr.qp_context = queue; 1272 qp_attr.event_handler = nvmet_rdma_qp_event; 1273 qp_attr.send_cq = queue->cq; 1274 qp_attr.recv_cq = queue->cq; 1275 qp_attr.sq_sig_type = IB_SIGNAL_REQ_WR; 1276 qp_attr.qp_type = IB_QPT_RC; 1277 /* +1 for drain */ 1278 qp_attr.cap.max_send_wr = queue->send_queue_size + 1; 1279 factor = rdma_rw_mr_factor(ndev->device, queue->cm_id->port_num, 1280 1 << NVMET_RDMA_MAX_MDTS); 1281 qp_attr.cap.max_rdma_ctxs = queue->send_queue_size * factor; 1282 qp_attr.cap.max_send_sge = max(ndev->device->attrs.max_sge_rd, 1283 ndev->device->attrs.max_send_sge); 1284 1285 if (queue->nsrq) { 1286 qp_attr.srq = queue->nsrq->srq; 1287 } else { 1288 /* +1 for drain */ 1289 qp_attr.cap.max_recv_wr = 1 + queue->recv_queue_size; 1290 qp_attr.cap.max_recv_sge = 1 + ndev->inline_page_count; 1291 } 1292 1293 if (queue->port->pi_enable && queue->host_qid) 1294 qp_attr.create_flags |= IB_QP_CREATE_INTEGRITY_EN; 1295 1296 ret = rdma_create_qp(queue->cm_id, ndev->pd, &qp_attr); 1297 if (ret) { 1298 pr_err("failed to create_qp ret= %d\n", ret); 1299 goto err_destroy_cq; 1300 } 1301 queue->qp = queue->cm_id->qp; 1302 1303 atomic_set(&queue->sq_wr_avail, qp_attr.cap.max_send_wr); 1304 1305 pr_debug("%s: max_cqe= %d max_sge= %d sq_size = %d cm_id= %p\n", 1306 __func__, queue->cq->cqe, qp_attr.cap.max_send_sge, 1307 qp_attr.cap.max_send_wr, queue->cm_id); 1308 1309 if (!queue->nsrq) { 1310 for (i = 0; i < queue->recv_queue_size; i++) { 1311 queue->cmds[i].queue = queue; 1312 ret = nvmet_rdma_post_recv(ndev, &queue->cmds[i]); 1313 if (ret) 1314 goto err_destroy_qp; 1315 } 1316 } 1317 1318 out: 1319 return ret; 1320 1321 err_destroy_qp: 1322 rdma_destroy_qp(queue->cm_id); 1323 err_destroy_cq: 1324 ib_free_cq(queue->cq); 1325 goto out; 1326 } 1327 1328 static void nvmet_rdma_destroy_queue_ib(struct nvmet_rdma_queue *queue) 1329 { 1330 ib_drain_qp(queue->qp); 1331 if (queue->cm_id) 1332 rdma_destroy_id(queue->cm_id); 1333 ib_destroy_qp(queue->qp); 1334 ib_free_cq(queue->cq); 1335 } 1336 1337 static void nvmet_rdma_free_queue(struct nvmet_rdma_queue *queue) 1338 { 1339 pr_debug("freeing queue %d\n", queue->idx); 1340 1341 nvmet_sq_destroy(&queue->nvme_sq); 1342 1343 nvmet_rdma_destroy_queue_ib(queue); 1344 if (!queue->nsrq) { 1345 nvmet_rdma_free_cmds(queue->dev, queue->cmds, 1346 queue->recv_queue_size, 1347 !queue->host_qid); 1348 } 1349 nvmet_rdma_free_rsps(queue); 1350 ida_simple_remove(&nvmet_rdma_queue_ida, queue->idx); 1351 kfree(queue); 1352 } 1353 1354 static void nvmet_rdma_release_queue_work(struct work_struct *w) 1355 { 1356 struct nvmet_rdma_queue *queue = 1357 container_of(w, struct nvmet_rdma_queue, release_work); 1358 struct nvmet_rdma_device *dev = queue->dev; 1359 1360 nvmet_rdma_free_queue(queue); 1361 1362 kref_put(&dev->ref, nvmet_rdma_free_dev); 1363 } 1364 1365 static int 1366 nvmet_rdma_parse_cm_connect_req(struct rdma_conn_param *conn, 1367 struct nvmet_rdma_queue *queue) 1368 { 1369 struct nvme_rdma_cm_req *req; 1370 1371 req = (struct nvme_rdma_cm_req *)conn->private_data; 1372 if (!req || conn->private_data_len == 0) 1373 return NVME_RDMA_CM_INVALID_LEN; 1374 1375 if (le16_to_cpu(req->recfmt) != NVME_RDMA_CM_FMT_1_0) 1376 return NVME_RDMA_CM_INVALID_RECFMT; 1377 1378 queue->host_qid = le16_to_cpu(req->qid); 1379 1380 /* 1381 * req->hsqsize corresponds to our recv queue size plus 1 1382 * req->hrqsize corresponds to our send queue size 1383 */ 1384 queue->recv_queue_size = le16_to_cpu(req->hsqsize) + 1; 1385 queue->send_queue_size = le16_to_cpu(req->hrqsize); 1386 1387 if (!queue->host_qid && queue->recv_queue_size > NVME_AQ_DEPTH) 1388 return NVME_RDMA_CM_INVALID_HSQSIZE; 1389 1390 /* XXX: Should we enforce some kind of max for IO queues? */ 1391 1392 return 0; 1393 } 1394 1395 static int nvmet_rdma_cm_reject(struct rdma_cm_id *cm_id, 1396 enum nvme_rdma_cm_status status) 1397 { 1398 struct nvme_rdma_cm_rej rej; 1399 1400 pr_debug("rejecting connect request: status %d (%s)\n", 1401 status, nvme_rdma_cm_msg(status)); 1402 1403 rej.recfmt = cpu_to_le16(NVME_RDMA_CM_FMT_1_0); 1404 rej.sts = cpu_to_le16(status); 1405 1406 return rdma_reject(cm_id, (void *)&rej, sizeof(rej)); 1407 } 1408 1409 static struct nvmet_rdma_queue * 1410 nvmet_rdma_alloc_queue(struct nvmet_rdma_device *ndev, 1411 struct rdma_cm_id *cm_id, 1412 struct rdma_cm_event *event) 1413 { 1414 struct nvmet_rdma_port *port = cm_id->context; 1415 struct nvmet_rdma_queue *queue; 1416 int ret; 1417 1418 queue = kzalloc(sizeof(*queue), GFP_KERNEL); 1419 if (!queue) { 1420 ret = NVME_RDMA_CM_NO_RSC; 1421 goto out_reject; 1422 } 1423 1424 ret = nvmet_sq_init(&queue->nvme_sq); 1425 if (ret) { 1426 ret = NVME_RDMA_CM_NO_RSC; 1427 goto out_free_queue; 1428 } 1429 1430 ret = nvmet_rdma_parse_cm_connect_req(&event->param.conn, queue); 1431 if (ret) 1432 goto out_destroy_sq; 1433 1434 /* 1435 * Schedules the actual release because calling rdma_destroy_id from 1436 * inside a CM callback would trigger a deadlock. (great API design..) 1437 */ 1438 INIT_WORK(&queue->release_work, nvmet_rdma_release_queue_work); 1439 queue->dev = ndev; 1440 queue->cm_id = cm_id; 1441 queue->port = port->nport; 1442 1443 spin_lock_init(&queue->state_lock); 1444 queue->state = NVMET_RDMA_Q_CONNECTING; 1445 INIT_LIST_HEAD(&queue->rsp_wait_list); 1446 INIT_LIST_HEAD(&queue->rsp_wr_wait_list); 1447 spin_lock_init(&queue->rsp_wr_wait_lock); 1448 INIT_LIST_HEAD(&queue->free_rsps); 1449 spin_lock_init(&queue->rsps_lock); 1450 INIT_LIST_HEAD(&queue->queue_list); 1451 1452 queue->idx = ida_simple_get(&nvmet_rdma_queue_ida, 0, 0, GFP_KERNEL); 1453 if (queue->idx < 0) { 1454 ret = NVME_RDMA_CM_NO_RSC; 1455 goto out_destroy_sq; 1456 } 1457 1458 /* 1459 * Spread the io queues across completion vectors, 1460 * but still keep all admin queues on vector 0. 1461 */ 1462 queue->comp_vector = !queue->host_qid ? 0 : 1463 queue->idx % ndev->device->num_comp_vectors; 1464 1465 1466 ret = nvmet_rdma_alloc_rsps(queue); 1467 if (ret) { 1468 ret = NVME_RDMA_CM_NO_RSC; 1469 goto out_ida_remove; 1470 } 1471 1472 if (ndev->srqs) { 1473 queue->nsrq = ndev->srqs[queue->comp_vector % ndev->srq_count]; 1474 } else { 1475 queue->cmds = nvmet_rdma_alloc_cmds(ndev, 1476 queue->recv_queue_size, 1477 !queue->host_qid); 1478 if (IS_ERR(queue->cmds)) { 1479 ret = NVME_RDMA_CM_NO_RSC; 1480 goto out_free_responses; 1481 } 1482 } 1483 1484 ret = nvmet_rdma_create_queue_ib(queue); 1485 if (ret) { 1486 pr_err("%s: creating RDMA queue failed (%d).\n", 1487 __func__, ret); 1488 ret = NVME_RDMA_CM_NO_RSC; 1489 goto out_free_cmds; 1490 } 1491 1492 return queue; 1493 1494 out_free_cmds: 1495 if (!queue->nsrq) { 1496 nvmet_rdma_free_cmds(queue->dev, queue->cmds, 1497 queue->recv_queue_size, 1498 !queue->host_qid); 1499 } 1500 out_free_responses: 1501 nvmet_rdma_free_rsps(queue); 1502 out_ida_remove: 1503 ida_simple_remove(&nvmet_rdma_queue_ida, queue->idx); 1504 out_destroy_sq: 1505 nvmet_sq_destroy(&queue->nvme_sq); 1506 out_free_queue: 1507 kfree(queue); 1508 out_reject: 1509 nvmet_rdma_cm_reject(cm_id, ret); 1510 return NULL; 1511 } 1512 1513 static void nvmet_rdma_qp_event(struct ib_event *event, void *priv) 1514 { 1515 struct nvmet_rdma_queue *queue = priv; 1516 1517 switch (event->event) { 1518 case IB_EVENT_COMM_EST: 1519 rdma_notify(queue->cm_id, event->event); 1520 break; 1521 case IB_EVENT_QP_LAST_WQE_REACHED: 1522 pr_debug("received last WQE reached event for queue=0x%p\n", 1523 queue); 1524 break; 1525 default: 1526 pr_err("received IB QP event: %s (%d)\n", 1527 ib_event_msg(event->event), event->event); 1528 break; 1529 } 1530 } 1531 1532 static int nvmet_rdma_cm_accept(struct rdma_cm_id *cm_id, 1533 struct nvmet_rdma_queue *queue, 1534 struct rdma_conn_param *p) 1535 { 1536 struct rdma_conn_param param = { }; 1537 struct nvme_rdma_cm_rep priv = { }; 1538 int ret = -ENOMEM; 1539 1540 param.rnr_retry_count = 7; 1541 param.flow_control = 1; 1542 param.initiator_depth = min_t(u8, p->initiator_depth, 1543 queue->dev->device->attrs.max_qp_init_rd_atom); 1544 param.private_data = &priv; 1545 param.private_data_len = sizeof(priv); 1546 priv.recfmt = cpu_to_le16(NVME_RDMA_CM_FMT_1_0); 1547 priv.crqsize = cpu_to_le16(queue->recv_queue_size); 1548 1549 ret = rdma_accept(cm_id, ¶m); 1550 if (ret) 1551 pr_err("rdma_accept failed (error code = %d)\n", ret); 1552 1553 return ret; 1554 } 1555 1556 static int nvmet_rdma_queue_connect(struct rdma_cm_id *cm_id, 1557 struct rdma_cm_event *event) 1558 { 1559 struct nvmet_rdma_device *ndev; 1560 struct nvmet_rdma_queue *queue; 1561 int ret = -EINVAL; 1562 1563 ndev = nvmet_rdma_find_get_device(cm_id); 1564 if (!ndev) { 1565 nvmet_rdma_cm_reject(cm_id, NVME_RDMA_CM_NO_RSC); 1566 return -ECONNREFUSED; 1567 } 1568 1569 queue = nvmet_rdma_alloc_queue(ndev, cm_id, event); 1570 if (!queue) { 1571 ret = -ENOMEM; 1572 goto put_device; 1573 } 1574 1575 if (queue->host_qid == 0) { 1576 /* Let inflight controller teardown complete */ 1577 flush_scheduled_work(); 1578 } 1579 1580 ret = nvmet_rdma_cm_accept(cm_id, queue, &event->param.conn); 1581 if (ret) { 1582 /* 1583 * Don't destroy the cm_id in free path, as we implicitly 1584 * destroy the cm_id here with non-zero ret code. 1585 */ 1586 queue->cm_id = NULL; 1587 goto free_queue; 1588 } 1589 1590 mutex_lock(&nvmet_rdma_queue_mutex); 1591 list_add_tail(&queue->queue_list, &nvmet_rdma_queue_list); 1592 mutex_unlock(&nvmet_rdma_queue_mutex); 1593 1594 return 0; 1595 1596 free_queue: 1597 nvmet_rdma_free_queue(queue); 1598 put_device: 1599 kref_put(&ndev->ref, nvmet_rdma_free_dev); 1600 1601 return ret; 1602 } 1603 1604 static void nvmet_rdma_queue_established(struct nvmet_rdma_queue *queue) 1605 { 1606 unsigned long flags; 1607 1608 spin_lock_irqsave(&queue->state_lock, flags); 1609 if (queue->state != NVMET_RDMA_Q_CONNECTING) { 1610 pr_warn("trying to establish a connected queue\n"); 1611 goto out_unlock; 1612 } 1613 queue->state = NVMET_RDMA_Q_LIVE; 1614 1615 while (!list_empty(&queue->rsp_wait_list)) { 1616 struct nvmet_rdma_rsp *cmd; 1617 1618 cmd = list_first_entry(&queue->rsp_wait_list, 1619 struct nvmet_rdma_rsp, wait_list); 1620 list_del(&cmd->wait_list); 1621 1622 spin_unlock_irqrestore(&queue->state_lock, flags); 1623 nvmet_rdma_handle_command(queue, cmd); 1624 spin_lock_irqsave(&queue->state_lock, flags); 1625 } 1626 1627 out_unlock: 1628 spin_unlock_irqrestore(&queue->state_lock, flags); 1629 } 1630 1631 static void __nvmet_rdma_queue_disconnect(struct nvmet_rdma_queue *queue) 1632 { 1633 bool disconnect = false; 1634 unsigned long flags; 1635 1636 pr_debug("cm_id= %p queue->state= %d\n", queue->cm_id, queue->state); 1637 1638 spin_lock_irqsave(&queue->state_lock, flags); 1639 switch (queue->state) { 1640 case NVMET_RDMA_Q_CONNECTING: 1641 case NVMET_RDMA_Q_LIVE: 1642 queue->state = NVMET_RDMA_Q_DISCONNECTING; 1643 disconnect = true; 1644 break; 1645 case NVMET_RDMA_Q_DISCONNECTING: 1646 break; 1647 } 1648 spin_unlock_irqrestore(&queue->state_lock, flags); 1649 1650 if (disconnect) { 1651 rdma_disconnect(queue->cm_id); 1652 schedule_work(&queue->release_work); 1653 } 1654 } 1655 1656 static void nvmet_rdma_queue_disconnect(struct nvmet_rdma_queue *queue) 1657 { 1658 bool disconnect = false; 1659 1660 mutex_lock(&nvmet_rdma_queue_mutex); 1661 if (!list_empty(&queue->queue_list)) { 1662 list_del_init(&queue->queue_list); 1663 disconnect = true; 1664 } 1665 mutex_unlock(&nvmet_rdma_queue_mutex); 1666 1667 if (disconnect) 1668 __nvmet_rdma_queue_disconnect(queue); 1669 } 1670 1671 static void nvmet_rdma_queue_connect_fail(struct rdma_cm_id *cm_id, 1672 struct nvmet_rdma_queue *queue) 1673 { 1674 WARN_ON_ONCE(queue->state != NVMET_RDMA_Q_CONNECTING); 1675 1676 mutex_lock(&nvmet_rdma_queue_mutex); 1677 if (!list_empty(&queue->queue_list)) 1678 list_del_init(&queue->queue_list); 1679 mutex_unlock(&nvmet_rdma_queue_mutex); 1680 1681 pr_err("failed to connect queue %d\n", queue->idx); 1682 schedule_work(&queue->release_work); 1683 } 1684 1685 /** 1686 * nvme_rdma_device_removal() - Handle RDMA device removal 1687 * @cm_id: rdma_cm id, used for nvmet port 1688 * @queue: nvmet rdma queue (cm id qp_context) 1689 * 1690 * DEVICE_REMOVAL event notifies us that the RDMA device is about 1691 * to unplug. Note that this event can be generated on a normal 1692 * queue cm_id and/or a device bound listener cm_id (where in this 1693 * case queue will be null). 1694 * 1695 * We registered an ib_client to handle device removal for queues, 1696 * so we only need to handle the listening port cm_ids. In this case 1697 * we nullify the priv to prevent double cm_id destruction and destroying 1698 * the cm_id implicitely by returning a non-zero rc to the callout. 1699 */ 1700 static int nvmet_rdma_device_removal(struct rdma_cm_id *cm_id, 1701 struct nvmet_rdma_queue *queue) 1702 { 1703 struct nvmet_rdma_port *port; 1704 1705 if (queue) { 1706 /* 1707 * This is a queue cm_id. we have registered 1708 * an ib_client to handle queues removal 1709 * so don't interfear and just return. 1710 */ 1711 return 0; 1712 } 1713 1714 port = cm_id->context; 1715 1716 /* 1717 * This is a listener cm_id. Make sure that 1718 * future remove_port won't invoke a double 1719 * cm_id destroy. use atomic xchg to make sure 1720 * we don't compete with remove_port. 1721 */ 1722 if (xchg(&port->cm_id, NULL) != cm_id) 1723 return 0; 1724 1725 /* 1726 * We need to return 1 so that the core will destroy 1727 * it's own ID. What a great API design.. 1728 */ 1729 return 1; 1730 } 1731 1732 static int nvmet_rdma_cm_handler(struct rdma_cm_id *cm_id, 1733 struct rdma_cm_event *event) 1734 { 1735 struct nvmet_rdma_queue *queue = NULL; 1736 int ret = 0; 1737 1738 if (cm_id->qp) 1739 queue = cm_id->qp->qp_context; 1740 1741 pr_debug("%s (%d): status %d id %p\n", 1742 rdma_event_msg(event->event), event->event, 1743 event->status, cm_id); 1744 1745 switch (event->event) { 1746 case RDMA_CM_EVENT_CONNECT_REQUEST: 1747 ret = nvmet_rdma_queue_connect(cm_id, event); 1748 break; 1749 case RDMA_CM_EVENT_ESTABLISHED: 1750 nvmet_rdma_queue_established(queue); 1751 break; 1752 case RDMA_CM_EVENT_ADDR_CHANGE: 1753 if (!queue) { 1754 struct nvmet_rdma_port *port = cm_id->context; 1755 1756 schedule_delayed_work(&port->repair_work, 0); 1757 break; 1758 } 1759 /* FALLTHROUGH */ 1760 case RDMA_CM_EVENT_DISCONNECTED: 1761 case RDMA_CM_EVENT_TIMEWAIT_EXIT: 1762 nvmet_rdma_queue_disconnect(queue); 1763 break; 1764 case RDMA_CM_EVENT_DEVICE_REMOVAL: 1765 ret = nvmet_rdma_device_removal(cm_id, queue); 1766 break; 1767 case RDMA_CM_EVENT_REJECTED: 1768 pr_debug("Connection rejected: %s\n", 1769 rdma_reject_msg(cm_id, event->status)); 1770 /* FALLTHROUGH */ 1771 case RDMA_CM_EVENT_UNREACHABLE: 1772 case RDMA_CM_EVENT_CONNECT_ERROR: 1773 nvmet_rdma_queue_connect_fail(cm_id, queue); 1774 break; 1775 default: 1776 pr_err("received unrecognized RDMA CM event %d\n", 1777 event->event); 1778 break; 1779 } 1780 1781 return ret; 1782 } 1783 1784 static void nvmet_rdma_delete_ctrl(struct nvmet_ctrl *ctrl) 1785 { 1786 struct nvmet_rdma_queue *queue; 1787 1788 restart: 1789 mutex_lock(&nvmet_rdma_queue_mutex); 1790 list_for_each_entry(queue, &nvmet_rdma_queue_list, queue_list) { 1791 if (queue->nvme_sq.ctrl == ctrl) { 1792 list_del_init(&queue->queue_list); 1793 mutex_unlock(&nvmet_rdma_queue_mutex); 1794 1795 __nvmet_rdma_queue_disconnect(queue); 1796 goto restart; 1797 } 1798 } 1799 mutex_unlock(&nvmet_rdma_queue_mutex); 1800 } 1801 1802 static void nvmet_rdma_disable_port(struct nvmet_rdma_port *port) 1803 { 1804 struct rdma_cm_id *cm_id = xchg(&port->cm_id, NULL); 1805 1806 if (cm_id) 1807 rdma_destroy_id(cm_id); 1808 } 1809 1810 static int nvmet_rdma_enable_port(struct nvmet_rdma_port *port) 1811 { 1812 struct sockaddr *addr = (struct sockaddr *)&port->addr; 1813 struct rdma_cm_id *cm_id; 1814 int ret; 1815 1816 cm_id = rdma_create_id(&init_net, nvmet_rdma_cm_handler, port, 1817 RDMA_PS_TCP, IB_QPT_RC); 1818 if (IS_ERR(cm_id)) { 1819 pr_err("CM ID creation failed\n"); 1820 return PTR_ERR(cm_id); 1821 } 1822 1823 /* 1824 * Allow both IPv4 and IPv6 sockets to bind a single port 1825 * at the same time. 1826 */ 1827 ret = rdma_set_afonly(cm_id, 1); 1828 if (ret) { 1829 pr_err("rdma_set_afonly failed (%d)\n", ret); 1830 goto out_destroy_id; 1831 } 1832 1833 ret = rdma_bind_addr(cm_id, addr); 1834 if (ret) { 1835 pr_err("binding CM ID to %pISpcs failed (%d)\n", addr, ret); 1836 goto out_destroy_id; 1837 } 1838 1839 ret = rdma_listen(cm_id, 128); 1840 if (ret) { 1841 pr_err("listening to %pISpcs failed (%d)\n", addr, ret); 1842 goto out_destroy_id; 1843 } 1844 1845 if (port->nport->pi_enable && 1846 !(cm_id->device->attrs.device_cap_flags & 1847 IB_DEVICE_INTEGRITY_HANDOVER)) { 1848 pr_err("T10-PI is not supported for %pISpcs\n", addr); 1849 ret = -EINVAL; 1850 goto out_destroy_id; 1851 } 1852 1853 port->cm_id = cm_id; 1854 return 0; 1855 1856 out_destroy_id: 1857 rdma_destroy_id(cm_id); 1858 return ret; 1859 } 1860 1861 static void nvmet_rdma_repair_port_work(struct work_struct *w) 1862 { 1863 struct nvmet_rdma_port *port = container_of(to_delayed_work(w), 1864 struct nvmet_rdma_port, repair_work); 1865 int ret; 1866 1867 nvmet_rdma_disable_port(port); 1868 ret = nvmet_rdma_enable_port(port); 1869 if (ret) 1870 schedule_delayed_work(&port->repair_work, 5 * HZ); 1871 } 1872 1873 static int nvmet_rdma_add_port(struct nvmet_port *nport) 1874 { 1875 struct nvmet_rdma_port *port; 1876 __kernel_sa_family_t af; 1877 int ret; 1878 1879 port = kzalloc(sizeof(*port), GFP_KERNEL); 1880 if (!port) 1881 return -ENOMEM; 1882 1883 nport->priv = port; 1884 port->nport = nport; 1885 INIT_DELAYED_WORK(&port->repair_work, nvmet_rdma_repair_port_work); 1886 1887 switch (nport->disc_addr.adrfam) { 1888 case NVMF_ADDR_FAMILY_IP4: 1889 af = AF_INET; 1890 break; 1891 case NVMF_ADDR_FAMILY_IP6: 1892 af = AF_INET6; 1893 break; 1894 default: 1895 pr_err("address family %d not supported\n", 1896 nport->disc_addr.adrfam); 1897 ret = -EINVAL; 1898 goto out_free_port; 1899 } 1900 1901 if (nport->inline_data_size < 0) { 1902 nport->inline_data_size = NVMET_RDMA_DEFAULT_INLINE_DATA_SIZE; 1903 } else if (nport->inline_data_size > NVMET_RDMA_MAX_INLINE_DATA_SIZE) { 1904 pr_warn("inline_data_size %u is too large, reducing to %u\n", 1905 nport->inline_data_size, 1906 NVMET_RDMA_MAX_INLINE_DATA_SIZE); 1907 nport->inline_data_size = NVMET_RDMA_MAX_INLINE_DATA_SIZE; 1908 } 1909 1910 ret = inet_pton_with_scope(&init_net, af, nport->disc_addr.traddr, 1911 nport->disc_addr.trsvcid, &port->addr); 1912 if (ret) { 1913 pr_err("malformed ip/port passed: %s:%s\n", 1914 nport->disc_addr.traddr, nport->disc_addr.trsvcid); 1915 goto out_free_port; 1916 } 1917 1918 ret = nvmet_rdma_enable_port(port); 1919 if (ret) 1920 goto out_free_port; 1921 1922 pr_info("enabling port %d (%pISpcs)\n", 1923 le16_to_cpu(nport->disc_addr.portid), 1924 (struct sockaddr *)&port->addr); 1925 1926 return 0; 1927 1928 out_free_port: 1929 kfree(port); 1930 return ret; 1931 } 1932 1933 static void nvmet_rdma_remove_port(struct nvmet_port *nport) 1934 { 1935 struct nvmet_rdma_port *port = nport->priv; 1936 1937 cancel_delayed_work_sync(&port->repair_work); 1938 nvmet_rdma_disable_port(port); 1939 kfree(port); 1940 } 1941 1942 static void nvmet_rdma_disc_port_addr(struct nvmet_req *req, 1943 struct nvmet_port *nport, char *traddr) 1944 { 1945 struct nvmet_rdma_port *port = nport->priv; 1946 struct rdma_cm_id *cm_id = port->cm_id; 1947 1948 if (inet_addr_is_any((struct sockaddr *)&cm_id->route.addr.src_addr)) { 1949 struct nvmet_rdma_rsp *rsp = 1950 container_of(req, struct nvmet_rdma_rsp, req); 1951 struct rdma_cm_id *req_cm_id = rsp->queue->cm_id; 1952 struct sockaddr *addr = (void *)&req_cm_id->route.addr.src_addr; 1953 1954 sprintf(traddr, "%pISc", addr); 1955 } else { 1956 memcpy(traddr, nport->disc_addr.traddr, NVMF_TRADDR_SIZE); 1957 } 1958 } 1959 1960 static u8 nvmet_rdma_get_mdts(const struct nvmet_ctrl *ctrl) 1961 { 1962 if (ctrl->pi_support) 1963 return NVMET_RDMA_MAX_METADATA_MDTS; 1964 return NVMET_RDMA_MAX_MDTS; 1965 } 1966 1967 static const struct nvmet_fabrics_ops nvmet_rdma_ops = { 1968 .owner = THIS_MODULE, 1969 .type = NVMF_TRTYPE_RDMA, 1970 .msdbd = 1, 1971 .has_keyed_sgls = 1, 1972 .metadata_support = 1, 1973 .add_port = nvmet_rdma_add_port, 1974 .remove_port = nvmet_rdma_remove_port, 1975 .queue_response = nvmet_rdma_queue_response, 1976 .delete_ctrl = nvmet_rdma_delete_ctrl, 1977 .disc_traddr = nvmet_rdma_disc_port_addr, 1978 .get_mdts = nvmet_rdma_get_mdts, 1979 }; 1980 1981 static void nvmet_rdma_remove_one(struct ib_device *ib_device, void *client_data) 1982 { 1983 struct nvmet_rdma_queue *queue, *tmp; 1984 struct nvmet_rdma_device *ndev; 1985 bool found = false; 1986 1987 mutex_lock(&device_list_mutex); 1988 list_for_each_entry(ndev, &device_list, entry) { 1989 if (ndev->device == ib_device) { 1990 found = true; 1991 break; 1992 } 1993 } 1994 mutex_unlock(&device_list_mutex); 1995 1996 if (!found) 1997 return; 1998 1999 /* 2000 * IB Device that is used by nvmet controllers is being removed, 2001 * delete all queues using this device. 2002 */ 2003 mutex_lock(&nvmet_rdma_queue_mutex); 2004 list_for_each_entry_safe(queue, tmp, &nvmet_rdma_queue_list, 2005 queue_list) { 2006 if (queue->dev->device != ib_device) 2007 continue; 2008 2009 pr_info("Removing queue %d\n", queue->idx); 2010 list_del_init(&queue->queue_list); 2011 __nvmet_rdma_queue_disconnect(queue); 2012 } 2013 mutex_unlock(&nvmet_rdma_queue_mutex); 2014 2015 flush_scheduled_work(); 2016 } 2017 2018 static struct ib_client nvmet_rdma_ib_client = { 2019 .name = "nvmet_rdma", 2020 .remove = nvmet_rdma_remove_one 2021 }; 2022 2023 static int __init nvmet_rdma_init(void) 2024 { 2025 int ret; 2026 2027 ret = ib_register_client(&nvmet_rdma_ib_client); 2028 if (ret) 2029 return ret; 2030 2031 ret = nvmet_register_transport(&nvmet_rdma_ops); 2032 if (ret) 2033 goto err_ib_client; 2034 2035 return 0; 2036 2037 err_ib_client: 2038 ib_unregister_client(&nvmet_rdma_ib_client); 2039 return ret; 2040 } 2041 2042 static void __exit nvmet_rdma_exit(void) 2043 { 2044 nvmet_unregister_transport(&nvmet_rdma_ops); 2045 ib_unregister_client(&nvmet_rdma_ib_client); 2046 WARN_ON_ONCE(!list_empty(&nvmet_rdma_queue_list)); 2047 ida_destroy(&nvmet_rdma_queue_ida); 2048 } 2049 2050 module_init(nvmet_rdma_init); 2051 module_exit(nvmet_rdma_exit); 2052 2053 MODULE_LICENSE("GPL v2"); 2054 MODULE_ALIAS("nvmet-transport-1"); /* 1 == NVMF_TRTYPE_RDMA */ 2055