1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * NVMe I/O command implementation. 4 * Copyright (c) 2015-2016 HGST, a Western Digital Company. 5 */ 6 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 7 #include <linux/blkdev.h> 8 #include <linux/module.h> 9 #include "nvmet.h" 10 11 void nvmet_bdev_set_limits(struct block_device *bdev, struct nvme_id_ns *id) 12 { 13 const struct queue_limits *ql = &bdev_get_queue(bdev)->limits; 14 /* Number of logical blocks per physical block. */ 15 const u32 lpp = ql->physical_block_size / ql->logical_block_size; 16 /* Logical blocks per physical block, 0's based. */ 17 const __le16 lpp0b = to0based(lpp); 18 19 /* 20 * For NVMe 1.2 and later, bit 1 indicates that the fields NAWUN, 21 * NAWUPF, and NACWU are defined for this namespace and should be 22 * used by the host for this namespace instead of the AWUN, AWUPF, 23 * and ACWU fields in the Identify Controller data structure. If 24 * any of these fields are zero that means that the corresponding 25 * field from the identify controller data structure should be used. 26 */ 27 id->nsfeat |= 1 << 1; 28 id->nawun = lpp0b; 29 id->nawupf = lpp0b; 30 id->nacwu = lpp0b; 31 32 /* 33 * Bit 4 indicates that the fields NPWG, NPWA, NPDG, NPDA, and 34 * NOWS are defined for this namespace and should be used by 35 * the host for I/O optimization. 36 */ 37 id->nsfeat |= 1 << 4; 38 /* NPWG = Namespace Preferred Write Granularity. 0's based */ 39 id->npwg = lpp0b; 40 /* NPWA = Namespace Preferred Write Alignment. 0's based */ 41 id->npwa = id->npwg; 42 /* NPDG = Namespace Preferred Deallocate Granularity. 0's based */ 43 id->npdg = to0based(ql->discard_granularity / ql->logical_block_size); 44 /* NPDG = Namespace Preferred Deallocate Alignment */ 45 id->npda = id->npdg; 46 /* NOWS = Namespace Optimal Write Size */ 47 id->nows = to0based(ql->io_opt / ql->logical_block_size); 48 } 49 50 int nvmet_bdev_ns_enable(struct nvmet_ns *ns) 51 { 52 int ret; 53 54 ns->bdev = blkdev_get_by_path(ns->device_path, 55 FMODE_READ | FMODE_WRITE, NULL); 56 if (IS_ERR(ns->bdev)) { 57 ret = PTR_ERR(ns->bdev); 58 if (ret != -ENOTBLK) { 59 pr_err("failed to open block device %s: (%ld)\n", 60 ns->device_path, PTR_ERR(ns->bdev)); 61 } 62 ns->bdev = NULL; 63 return ret; 64 } 65 ns->size = i_size_read(ns->bdev->bd_inode); 66 ns->blksize_shift = blksize_bits(bdev_logical_block_size(ns->bdev)); 67 return 0; 68 } 69 70 void nvmet_bdev_ns_disable(struct nvmet_ns *ns) 71 { 72 if (ns->bdev) { 73 blkdev_put(ns->bdev, FMODE_WRITE | FMODE_READ); 74 ns->bdev = NULL; 75 } 76 } 77 78 static u16 blk_to_nvme_status(struct nvmet_req *req, blk_status_t blk_sts) 79 { 80 u16 status = NVME_SC_SUCCESS; 81 82 if (likely(blk_sts == BLK_STS_OK)) 83 return status; 84 /* 85 * Right now there exists M : 1 mapping between block layer error 86 * to the NVMe status code (see nvme_error_status()). For consistency, 87 * when we reverse map we use most appropriate NVMe Status code from 88 * the group of the NVMe staus codes used in the nvme_error_status(). 89 */ 90 switch (blk_sts) { 91 case BLK_STS_NOSPC: 92 status = NVME_SC_CAP_EXCEEDED | NVME_SC_DNR; 93 req->error_loc = offsetof(struct nvme_rw_command, length); 94 break; 95 case BLK_STS_TARGET: 96 status = NVME_SC_LBA_RANGE | NVME_SC_DNR; 97 req->error_loc = offsetof(struct nvme_rw_command, slba); 98 break; 99 case BLK_STS_NOTSUPP: 100 req->error_loc = offsetof(struct nvme_common_command, opcode); 101 switch (req->cmd->common.opcode) { 102 case nvme_cmd_dsm: 103 case nvme_cmd_write_zeroes: 104 status = NVME_SC_ONCS_NOT_SUPPORTED | NVME_SC_DNR; 105 break; 106 default: 107 status = NVME_SC_INVALID_OPCODE | NVME_SC_DNR; 108 } 109 break; 110 case BLK_STS_MEDIUM: 111 status = NVME_SC_ACCESS_DENIED; 112 req->error_loc = offsetof(struct nvme_rw_command, nsid); 113 break; 114 case BLK_STS_IOERR: 115 /* fallthru */ 116 default: 117 status = NVME_SC_INTERNAL | NVME_SC_DNR; 118 req->error_loc = offsetof(struct nvme_common_command, opcode); 119 } 120 121 switch (req->cmd->common.opcode) { 122 case nvme_cmd_read: 123 case nvme_cmd_write: 124 req->error_slba = le64_to_cpu(req->cmd->rw.slba); 125 break; 126 case nvme_cmd_write_zeroes: 127 req->error_slba = 128 le64_to_cpu(req->cmd->write_zeroes.slba); 129 break; 130 default: 131 req->error_slba = 0; 132 } 133 return status; 134 } 135 136 static void nvmet_bio_done(struct bio *bio) 137 { 138 struct nvmet_req *req = bio->bi_private; 139 140 nvmet_req_complete(req, blk_to_nvme_status(req, bio->bi_status)); 141 if (bio != &req->b.inline_bio) 142 bio_put(bio); 143 } 144 145 static void nvmet_bdev_execute_rw(struct nvmet_req *req) 146 { 147 int sg_cnt = req->sg_cnt; 148 struct bio *bio; 149 struct scatterlist *sg; 150 struct blk_plug plug; 151 sector_t sector; 152 int op, i; 153 154 if (!nvmet_check_data_len(req, nvmet_rw_len(req))) 155 return; 156 157 if (!req->sg_cnt) { 158 nvmet_req_complete(req, 0); 159 return; 160 } 161 162 if (req->cmd->rw.opcode == nvme_cmd_write) { 163 op = REQ_OP_WRITE | REQ_SYNC | REQ_IDLE; 164 if (req->cmd->rw.control & cpu_to_le16(NVME_RW_FUA)) 165 op |= REQ_FUA; 166 } else { 167 op = REQ_OP_READ; 168 } 169 170 if (is_pci_p2pdma_page(sg_page(req->sg))) 171 op |= REQ_NOMERGE; 172 173 sector = le64_to_cpu(req->cmd->rw.slba); 174 sector <<= (req->ns->blksize_shift - 9); 175 176 if (req->transfer_len <= NVMET_MAX_INLINE_DATA_LEN) { 177 bio = &req->b.inline_bio; 178 bio_init(bio, req->inline_bvec, ARRAY_SIZE(req->inline_bvec)); 179 } else { 180 bio = bio_alloc(GFP_KERNEL, min(sg_cnt, BIO_MAX_PAGES)); 181 } 182 bio_set_dev(bio, req->ns->bdev); 183 bio->bi_iter.bi_sector = sector; 184 bio->bi_private = req; 185 bio->bi_end_io = nvmet_bio_done; 186 bio->bi_opf = op; 187 188 blk_start_plug(&plug); 189 for_each_sg(req->sg, sg, req->sg_cnt, i) { 190 while (bio_add_page(bio, sg_page(sg), sg->length, sg->offset) 191 != sg->length) { 192 struct bio *prev = bio; 193 194 bio = bio_alloc(GFP_KERNEL, min(sg_cnt, BIO_MAX_PAGES)); 195 bio_set_dev(bio, req->ns->bdev); 196 bio->bi_iter.bi_sector = sector; 197 bio->bi_opf = op; 198 199 bio_chain(bio, prev); 200 submit_bio(prev); 201 } 202 203 sector += sg->length >> 9; 204 sg_cnt--; 205 } 206 207 submit_bio(bio); 208 blk_finish_plug(&plug); 209 } 210 211 static void nvmet_bdev_execute_flush(struct nvmet_req *req) 212 { 213 struct bio *bio = &req->b.inline_bio; 214 215 if (!nvmet_check_data_len(req, 0)) 216 return; 217 218 bio_init(bio, req->inline_bvec, ARRAY_SIZE(req->inline_bvec)); 219 bio_set_dev(bio, req->ns->bdev); 220 bio->bi_private = req; 221 bio->bi_end_io = nvmet_bio_done; 222 bio->bi_opf = REQ_OP_WRITE | REQ_PREFLUSH; 223 224 submit_bio(bio); 225 } 226 227 u16 nvmet_bdev_flush(struct nvmet_req *req) 228 { 229 if (blkdev_issue_flush(req->ns->bdev, GFP_KERNEL, NULL)) 230 return NVME_SC_INTERNAL | NVME_SC_DNR; 231 return 0; 232 } 233 234 static u16 nvmet_bdev_discard_range(struct nvmet_req *req, 235 struct nvme_dsm_range *range, struct bio **bio) 236 { 237 struct nvmet_ns *ns = req->ns; 238 int ret; 239 240 ret = __blkdev_issue_discard(ns->bdev, 241 le64_to_cpu(range->slba) << (ns->blksize_shift - 9), 242 le32_to_cpu(range->nlb) << (ns->blksize_shift - 9), 243 GFP_KERNEL, 0, bio); 244 if (ret && ret != -EOPNOTSUPP) { 245 req->error_slba = le64_to_cpu(range->slba); 246 return errno_to_nvme_status(req, ret); 247 } 248 return NVME_SC_SUCCESS; 249 } 250 251 static void nvmet_bdev_execute_discard(struct nvmet_req *req) 252 { 253 struct nvme_dsm_range range; 254 struct bio *bio = NULL; 255 int i; 256 u16 status; 257 258 for (i = 0; i <= le32_to_cpu(req->cmd->dsm.nr); i++) { 259 status = nvmet_copy_from_sgl(req, i * sizeof(range), &range, 260 sizeof(range)); 261 if (status) 262 break; 263 264 status = nvmet_bdev_discard_range(req, &range, &bio); 265 if (status) 266 break; 267 } 268 269 if (bio) { 270 bio->bi_private = req; 271 bio->bi_end_io = nvmet_bio_done; 272 if (status) 273 bio_io_error(bio); 274 else 275 submit_bio(bio); 276 } else { 277 nvmet_req_complete(req, status); 278 } 279 } 280 281 static void nvmet_bdev_execute_dsm(struct nvmet_req *req) 282 { 283 if (!nvmet_check_data_len_lte(req, nvmet_dsm_len(req))) 284 return; 285 286 switch (le32_to_cpu(req->cmd->dsm.attributes)) { 287 case NVME_DSMGMT_AD: 288 nvmet_bdev_execute_discard(req); 289 return; 290 case NVME_DSMGMT_IDR: 291 case NVME_DSMGMT_IDW: 292 default: 293 /* Not supported yet */ 294 nvmet_req_complete(req, 0); 295 return; 296 } 297 } 298 299 static void nvmet_bdev_execute_write_zeroes(struct nvmet_req *req) 300 { 301 struct nvme_write_zeroes_cmd *write_zeroes = &req->cmd->write_zeroes; 302 struct bio *bio = NULL; 303 sector_t sector; 304 sector_t nr_sector; 305 int ret; 306 307 if (!nvmet_check_data_len(req, 0)) 308 return; 309 310 sector = le64_to_cpu(write_zeroes->slba) << 311 (req->ns->blksize_shift - 9); 312 nr_sector = (((sector_t)le16_to_cpu(write_zeroes->length) + 1) << 313 (req->ns->blksize_shift - 9)); 314 315 ret = __blkdev_issue_zeroout(req->ns->bdev, sector, nr_sector, 316 GFP_KERNEL, &bio, 0); 317 if (bio) { 318 bio->bi_private = req; 319 bio->bi_end_io = nvmet_bio_done; 320 submit_bio(bio); 321 } else { 322 nvmet_req_complete(req, errno_to_nvme_status(req, ret)); 323 } 324 } 325 326 u16 nvmet_bdev_parse_io_cmd(struct nvmet_req *req) 327 { 328 struct nvme_command *cmd = req->cmd; 329 330 switch (cmd->common.opcode) { 331 case nvme_cmd_read: 332 case nvme_cmd_write: 333 req->execute = nvmet_bdev_execute_rw; 334 return 0; 335 case nvme_cmd_flush: 336 req->execute = nvmet_bdev_execute_flush; 337 return 0; 338 case nvme_cmd_dsm: 339 req->execute = nvmet_bdev_execute_dsm; 340 return 0; 341 case nvme_cmd_write_zeroes: 342 req->execute = nvmet_bdev_execute_write_zeroes; 343 return 0; 344 default: 345 pr_err("unhandled cmd %d on qid %d\n", cmd->common.opcode, 346 req->sq->qid); 347 req->error_loc = offsetof(struct nvme_common_command, opcode); 348 return NVME_SC_INVALID_OPCODE | NVME_SC_DNR; 349 } 350 } 351