1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * NVMe admin command implementation. 4 * Copyright (c) 2015-2016 HGST, a Western Digital Company. 5 */ 6 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 7 #include <linux/module.h> 8 #include <linux/rculist.h> 9 #include <linux/part_stat.h> 10 11 #include <generated/utsrelease.h> 12 #include <asm/unaligned.h> 13 #include "nvmet.h" 14 15 u32 nvmet_get_log_page_len(struct nvme_command *cmd) 16 { 17 u32 len = le16_to_cpu(cmd->get_log_page.numdu); 18 19 len <<= 16; 20 len += le16_to_cpu(cmd->get_log_page.numdl); 21 /* NUMD is a 0's based value */ 22 len += 1; 23 len *= sizeof(u32); 24 25 return len; 26 } 27 28 static u32 nvmet_feat_data_len(struct nvmet_req *req, u32 cdw10) 29 { 30 switch (cdw10 & 0xff) { 31 case NVME_FEAT_HOST_ID: 32 return sizeof(req->sq->ctrl->hostid); 33 default: 34 return 0; 35 } 36 } 37 38 u64 nvmet_get_log_page_offset(struct nvme_command *cmd) 39 { 40 return le64_to_cpu(cmd->get_log_page.lpo); 41 } 42 43 static void nvmet_execute_get_log_page_noop(struct nvmet_req *req) 44 { 45 nvmet_req_complete(req, nvmet_zero_sgl(req, 0, req->transfer_len)); 46 } 47 48 static void nvmet_execute_get_log_page_error(struct nvmet_req *req) 49 { 50 struct nvmet_ctrl *ctrl = req->sq->ctrl; 51 unsigned long flags; 52 off_t offset = 0; 53 u64 slot; 54 u64 i; 55 56 spin_lock_irqsave(&ctrl->error_lock, flags); 57 slot = ctrl->err_counter % NVMET_ERROR_LOG_SLOTS; 58 59 for (i = 0; i < NVMET_ERROR_LOG_SLOTS; i++) { 60 if (nvmet_copy_to_sgl(req, offset, &ctrl->slots[slot], 61 sizeof(struct nvme_error_slot))) 62 break; 63 64 if (slot == 0) 65 slot = NVMET_ERROR_LOG_SLOTS - 1; 66 else 67 slot--; 68 offset += sizeof(struct nvme_error_slot); 69 } 70 spin_unlock_irqrestore(&ctrl->error_lock, flags); 71 nvmet_req_complete(req, 0); 72 } 73 74 static u16 nvmet_get_smart_log_nsid(struct nvmet_req *req, 75 struct nvme_smart_log *slog) 76 { 77 u64 host_reads, host_writes, data_units_read, data_units_written; 78 u16 status; 79 80 status = nvmet_req_find_ns(req); 81 if (status) 82 return status; 83 84 /* we don't have the right data for file backed ns */ 85 if (!req->ns->bdev) 86 return NVME_SC_SUCCESS; 87 88 host_reads = part_stat_read(req->ns->bdev, ios[READ]); 89 data_units_read = 90 DIV_ROUND_UP(part_stat_read(req->ns->bdev, sectors[READ]), 1000); 91 host_writes = part_stat_read(req->ns->bdev, ios[WRITE]); 92 data_units_written = 93 DIV_ROUND_UP(part_stat_read(req->ns->bdev, sectors[WRITE]), 1000); 94 95 put_unaligned_le64(host_reads, &slog->host_reads[0]); 96 put_unaligned_le64(data_units_read, &slog->data_units_read[0]); 97 put_unaligned_le64(host_writes, &slog->host_writes[0]); 98 put_unaligned_le64(data_units_written, &slog->data_units_written[0]); 99 100 return NVME_SC_SUCCESS; 101 } 102 103 static u16 nvmet_get_smart_log_all(struct nvmet_req *req, 104 struct nvme_smart_log *slog) 105 { 106 u64 host_reads = 0, host_writes = 0; 107 u64 data_units_read = 0, data_units_written = 0; 108 struct nvmet_ns *ns; 109 struct nvmet_ctrl *ctrl; 110 unsigned long idx; 111 112 ctrl = req->sq->ctrl; 113 xa_for_each(&ctrl->subsys->namespaces, idx, ns) { 114 /* we don't have the right data for file backed ns */ 115 if (!ns->bdev) 116 continue; 117 host_reads += part_stat_read(ns->bdev, ios[READ]); 118 data_units_read += DIV_ROUND_UP( 119 part_stat_read(ns->bdev, sectors[READ]), 1000); 120 host_writes += part_stat_read(ns->bdev, ios[WRITE]); 121 data_units_written += DIV_ROUND_UP( 122 part_stat_read(ns->bdev, sectors[WRITE]), 1000); 123 } 124 125 put_unaligned_le64(host_reads, &slog->host_reads[0]); 126 put_unaligned_le64(data_units_read, &slog->data_units_read[0]); 127 put_unaligned_le64(host_writes, &slog->host_writes[0]); 128 put_unaligned_le64(data_units_written, &slog->data_units_written[0]); 129 130 return NVME_SC_SUCCESS; 131 } 132 133 static void nvmet_execute_get_log_page_smart(struct nvmet_req *req) 134 { 135 struct nvme_smart_log *log; 136 u16 status = NVME_SC_INTERNAL; 137 unsigned long flags; 138 139 if (req->transfer_len != sizeof(*log)) 140 goto out; 141 142 log = kzalloc(sizeof(*log), GFP_KERNEL); 143 if (!log) 144 goto out; 145 146 if (req->cmd->get_log_page.nsid == cpu_to_le32(NVME_NSID_ALL)) 147 status = nvmet_get_smart_log_all(req, log); 148 else 149 status = nvmet_get_smart_log_nsid(req, log); 150 if (status) 151 goto out_free_log; 152 153 spin_lock_irqsave(&req->sq->ctrl->error_lock, flags); 154 put_unaligned_le64(req->sq->ctrl->err_counter, 155 &log->num_err_log_entries); 156 spin_unlock_irqrestore(&req->sq->ctrl->error_lock, flags); 157 158 status = nvmet_copy_to_sgl(req, 0, log, sizeof(*log)); 159 out_free_log: 160 kfree(log); 161 out: 162 nvmet_req_complete(req, status); 163 } 164 165 static void nvmet_get_cmd_effects_nvm(struct nvme_effects_log *log) 166 { 167 log->acs[nvme_admin_get_log_page] = cpu_to_le32(1 << 0); 168 log->acs[nvme_admin_identify] = cpu_to_le32(1 << 0); 169 log->acs[nvme_admin_abort_cmd] = cpu_to_le32(1 << 0); 170 log->acs[nvme_admin_set_features] = cpu_to_le32(1 << 0); 171 log->acs[nvme_admin_get_features] = cpu_to_le32(1 << 0); 172 log->acs[nvme_admin_async_event] = cpu_to_le32(1 << 0); 173 log->acs[nvme_admin_keep_alive] = cpu_to_le32(1 << 0); 174 175 log->iocs[nvme_cmd_read] = cpu_to_le32(1 << 0); 176 log->iocs[nvme_cmd_write] = cpu_to_le32(1 << 0); 177 log->iocs[nvme_cmd_flush] = cpu_to_le32(1 << 0); 178 log->iocs[nvme_cmd_dsm] = cpu_to_le32(1 << 0); 179 log->iocs[nvme_cmd_write_zeroes] = cpu_to_le32(1 << 0); 180 } 181 182 static void nvmet_get_cmd_effects_zns(struct nvme_effects_log *log) 183 { 184 log->iocs[nvme_cmd_zone_append] = cpu_to_le32(1 << 0); 185 log->iocs[nvme_cmd_zone_mgmt_send] = cpu_to_le32(1 << 0); 186 log->iocs[nvme_cmd_zone_mgmt_recv] = cpu_to_le32(1 << 0); 187 } 188 189 static void nvmet_execute_get_log_cmd_effects_ns(struct nvmet_req *req) 190 { 191 struct nvme_effects_log *log; 192 u16 status = NVME_SC_SUCCESS; 193 194 log = kzalloc(sizeof(*log), GFP_KERNEL); 195 if (!log) { 196 status = NVME_SC_INTERNAL; 197 goto out; 198 } 199 200 switch (req->cmd->get_log_page.csi) { 201 case NVME_CSI_NVM: 202 nvmet_get_cmd_effects_nvm(log); 203 break; 204 case NVME_CSI_ZNS: 205 if (!IS_ENABLED(CONFIG_BLK_DEV_ZONED)) { 206 status = NVME_SC_INVALID_IO_CMD_SET; 207 goto free; 208 } 209 nvmet_get_cmd_effects_nvm(log); 210 nvmet_get_cmd_effects_zns(log); 211 break; 212 default: 213 status = NVME_SC_INVALID_LOG_PAGE; 214 goto free; 215 } 216 217 status = nvmet_copy_to_sgl(req, 0, log, sizeof(*log)); 218 free: 219 kfree(log); 220 out: 221 nvmet_req_complete(req, status); 222 } 223 224 static void nvmet_execute_get_log_changed_ns(struct nvmet_req *req) 225 { 226 struct nvmet_ctrl *ctrl = req->sq->ctrl; 227 u16 status = NVME_SC_INTERNAL; 228 size_t len; 229 230 if (req->transfer_len != NVME_MAX_CHANGED_NAMESPACES * sizeof(__le32)) 231 goto out; 232 233 mutex_lock(&ctrl->lock); 234 if (ctrl->nr_changed_ns == U32_MAX) 235 len = sizeof(__le32); 236 else 237 len = ctrl->nr_changed_ns * sizeof(__le32); 238 status = nvmet_copy_to_sgl(req, 0, ctrl->changed_ns_list, len); 239 if (!status) 240 status = nvmet_zero_sgl(req, len, req->transfer_len - len); 241 ctrl->nr_changed_ns = 0; 242 nvmet_clear_aen_bit(req, NVME_AEN_BIT_NS_ATTR); 243 mutex_unlock(&ctrl->lock); 244 out: 245 nvmet_req_complete(req, status); 246 } 247 248 static u32 nvmet_format_ana_group(struct nvmet_req *req, u32 grpid, 249 struct nvme_ana_group_desc *desc) 250 { 251 struct nvmet_ctrl *ctrl = req->sq->ctrl; 252 struct nvmet_ns *ns; 253 unsigned long idx; 254 u32 count = 0; 255 256 if (!(req->cmd->get_log_page.lsp & NVME_ANA_LOG_RGO)) { 257 xa_for_each(&ctrl->subsys->namespaces, idx, ns) 258 if (ns->anagrpid == grpid) 259 desc->nsids[count++] = cpu_to_le32(ns->nsid); 260 } 261 262 desc->grpid = cpu_to_le32(grpid); 263 desc->nnsids = cpu_to_le32(count); 264 desc->chgcnt = cpu_to_le64(nvmet_ana_chgcnt); 265 desc->state = req->port->ana_state[grpid]; 266 memset(desc->rsvd17, 0, sizeof(desc->rsvd17)); 267 return struct_size(desc, nsids, count); 268 } 269 270 static void nvmet_execute_get_log_page_ana(struct nvmet_req *req) 271 { 272 struct nvme_ana_rsp_hdr hdr = { 0, }; 273 struct nvme_ana_group_desc *desc; 274 size_t offset = sizeof(struct nvme_ana_rsp_hdr); /* start beyond hdr */ 275 size_t len; 276 u32 grpid; 277 u16 ngrps = 0; 278 u16 status; 279 280 status = NVME_SC_INTERNAL; 281 desc = kmalloc(struct_size(desc, nsids, NVMET_MAX_NAMESPACES), 282 GFP_KERNEL); 283 if (!desc) 284 goto out; 285 286 down_read(&nvmet_ana_sem); 287 for (grpid = 1; grpid <= NVMET_MAX_ANAGRPS; grpid++) { 288 if (!nvmet_ana_group_enabled[grpid]) 289 continue; 290 len = nvmet_format_ana_group(req, grpid, desc); 291 status = nvmet_copy_to_sgl(req, offset, desc, len); 292 if (status) 293 break; 294 offset += len; 295 ngrps++; 296 } 297 for ( ; grpid <= NVMET_MAX_ANAGRPS; grpid++) { 298 if (nvmet_ana_group_enabled[grpid]) 299 ngrps++; 300 } 301 302 hdr.chgcnt = cpu_to_le64(nvmet_ana_chgcnt); 303 hdr.ngrps = cpu_to_le16(ngrps); 304 nvmet_clear_aen_bit(req, NVME_AEN_BIT_ANA_CHANGE); 305 up_read(&nvmet_ana_sem); 306 307 kfree(desc); 308 309 /* copy the header last once we know the number of groups */ 310 status = nvmet_copy_to_sgl(req, 0, &hdr, sizeof(hdr)); 311 out: 312 nvmet_req_complete(req, status); 313 } 314 315 static void nvmet_execute_get_log_page(struct nvmet_req *req) 316 { 317 if (!nvmet_check_transfer_len(req, nvmet_get_log_page_len(req->cmd))) 318 return; 319 320 switch (req->cmd->get_log_page.lid) { 321 case NVME_LOG_ERROR: 322 return nvmet_execute_get_log_page_error(req); 323 case NVME_LOG_SMART: 324 return nvmet_execute_get_log_page_smart(req); 325 case NVME_LOG_FW_SLOT: 326 /* 327 * We only support a single firmware slot which always is 328 * active, so we can zero out the whole firmware slot log and 329 * still claim to fully implement this mandatory log page. 330 */ 331 return nvmet_execute_get_log_page_noop(req); 332 case NVME_LOG_CHANGED_NS: 333 return nvmet_execute_get_log_changed_ns(req); 334 case NVME_LOG_CMD_EFFECTS: 335 return nvmet_execute_get_log_cmd_effects_ns(req); 336 case NVME_LOG_ANA: 337 return nvmet_execute_get_log_page_ana(req); 338 } 339 pr_debug("unhandled lid %d on qid %d\n", 340 req->cmd->get_log_page.lid, req->sq->qid); 341 req->error_loc = offsetof(struct nvme_get_log_page_command, lid); 342 nvmet_req_complete(req, NVME_SC_INVALID_FIELD | NVME_SC_DNR); 343 } 344 345 static void nvmet_execute_identify_ctrl(struct nvmet_req *req) 346 { 347 struct nvmet_ctrl *ctrl = req->sq->ctrl; 348 struct nvmet_subsys *subsys = ctrl->subsys; 349 struct nvme_id_ctrl *id; 350 u32 cmd_capsule_size; 351 u16 status = 0; 352 353 if (!subsys->subsys_discovered) { 354 mutex_lock(&subsys->lock); 355 subsys->subsys_discovered = true; 356 mutex_unlock(&subsys->lock); 357 } 358 359 id = kzalloc(sizeof(*id), GFP_KERNEL); 360 if (!id) { 361 status = NVME_SC_INTERNAL; 362 goto out; 363 } 364 365 /* XXX: figure out how to assign real vendors IDs. */ 366 id->vid = 0; 367 id->ssvid = 0; 368 369 memcpy(id->sn, ctrl->subsys->serial, NVMET_SN_MAX_SIZE); 370 memcpy_and_pad(id->mn, sizeof(id->mn), subsys->model_number, 371 strlen(subsys->model_number), ' '); 372 memcpy_and_pad(id->fr, sizeof(id->fr), 373 subsys->firmware_rev, strlen(subsys->firmware_rev), ' '); 374 375 put_unaligned_le24(subsys->ieee_oui, id->ieee); 376 377 id->rab = 6; 378 379 if (nvmet_is_disc_subsys(ctrl->subsys)) 380 id->cntrltype = NVME_CTRL_DISC; 381 else 382 id->cntrltype = NVME_CTRL_IO; 383 384 /* we support multiple ports, multiples hosts and ANA: */ 385 id->cmic = NVME_CTRL_CMIC_MULTI_PORT | NVME_CTRL_CMIC_MULTI_CTRL | 386 NVME_CTRL_CMIC_ANA; 387 388 /* Limit MDTS according to transport capability */ 389 if (ctrl->ops->get_mdts) 390 id->mdts = ctrl->ops->get_mdts(ctrl); 391 else 392 id->mdts = 0; 393 394 id->cntlid = cpu_to_le16(ctrl->cntlid); 395 id->ver = cpu_to_le32(ctrl->subsys->ver); 396 397 /* XXX: figure out what to do about RTD3R/RTD3 */ 398 id->oaes = cpu_to_le32(NVMET_AEN_CFG_OPTIONAL); 399 id->ctratt = cpu_to_le32(NVME_CTRL_ATTR_HID_128_BIT | 400 NVME_CTRL_ATTR_TBKAS); 401 402 id->oacs = 0; 403 404 /* 405 * We don't really have a practical limit on the number of abort 406 * comands. But we don't do anything useful for abort either, so 407 * no point in allowing more abort commands than the spec requires. 408 */ 409 id->acl = 3; 410 411 id->aerl = NVMET_ASYNC_EVENTS - 1; 412 413 /* first slot is read-only, only one slot supported */ 414 id->frmw = (1 << 0) | (1 << 1); 415 id->lpa = (1 << 0) | (1 << 1) | (1 << 2); 416 id->elpe = NVMET_ERROR_LOG_SLOTS - 1; 417 id->npss = 0; 418 419 /* We support keep-alive timeout in granularity of seconds */ 420 id->kas = cpu_to_le16(NVMET_KAS); 421 422 id->sqes = (0x6 << 4) | 0x6; 423 id->cqes = (0x4 << 4) | 0x4; 424 425 /* no enforcement soft-limit for maxcmd - pick arbitrary high value */ 426 id->maxcmd = cpu_to_le16(NVMET_MAX_CMD); 427 428 id->nn = cpu_to_le32(NVMET_MAX_NAMESPACES); 429 id->mnan = cpu_to_le32(NVMET_MAX_NAMESPACES); 430 id->oncs = cpu_to_le16(NVME_CTRL_ONCS_DSM | 431 NVME_CTRL_ONCS_WRITE_ZEROES); 432 433 /* XXX: don't report vwc if the underlying device is write through */ 434 id->vwc = NVME_CTRL_VWC_PRESENT; 435 436 /* 437 * We can't support atomic writes bigger than a LBA without support 438 * from the backend device. 439 */ 440 id->awun = 0; 441 id->awupf = 0; 442 443 id->sgls = cpu_to_le32(1 << 0); /* we always support SGLs */ 444 if (ctrl->ops->flags & NVMF_KEYED_SGLS) 445 id->sgls |= cpu_to_le32(1 << 2); 446 if (req->port->inline_data_size) 447 id->sgls |= cpu_to_le32(1 << 20); 448 449 strscpy(id->subnqn, ctrl->subsys->subsysnqn, sizeof(id->subnqn)); 450 451 /* 452 * Max command capsule size is sqe + in-capsule data size. 453 * Disable in-capsule data for Metadata capable controllers. 454 */ 455 cmd_capsule_size = sizeof(struct nvme_command); 456 if (!ctrl->pi_support) 457 cmd_capsule_size += req->port->inline_data_size; 458 id->ioccsz = cpu_to_le32(cmd_capsule_size / 16); 459 460 /* Max response capsule size is cqe */ 461 id->iorcsz = cpu_to_le32(sizeof(struct nvme_completion) / 16); 462 463 id->msdbd = ctrl->ops->msdbd; 464 465 id->anacap = (1 << 0) | (1 << 1) | (1 << 2) | (1 << 3) | (1 << 4); 466 id->anatt = 10; /* random value */ 467 id->anagrpmax = cpu_to_le32(NVMET_MAX_ANAGRPS); 468 id->nanagrpid = cpu_to_le32(NVMET_MAX_ANAGRPS); 469 470 /* 471 * Meh, we don't really support any power state. Fake up the same 472 * values that qemu does. 473 */ 474 id->psd[0].max_power = cpu_to_le16(0x9c4); 475 id->psd[0].entry_lat = cpu_to_le32(0x10); 476 id->psd[0].exit_lat = cpu_to_le32(0x4); 477 478 id->nwpc = 1 << 0; /* write protect and no write protect */ 479 480 status = nvmet_copy_to_sgl(req, 0, id, sizeof(*id)); 481 482 kfree(id); 483 out: 484 nvmet_req_complete(req, status); 485 } 486 487 static void nvmet_execute_identify_ns(struct nvmet_req *req) 488 { 489 struct nvme_id_ns *id; 490 u16 status; 491 492 if (le32_to_cpu(req->cmd->identify.nsid) == NVME_NSID_ALL) { 493 req->error_loc = offsetof(struct nvme_identify, nsid); 494 status = NVME_SC_INVALID_NS | NVME_SC_DNR; 495 goto out; 496 } 497 498 id = kzalloc(sizeof(*id), GFP_KERNEL); 499 if (!id) { 500 status = NVME_SC_INTERNAL; 501 goto out; 502 } 503 504 /* return an all zeroed buffer if we can't find an active namespace */ 505 status = nvmet_req_find_ns(req); 506 if (status) { 507 status = 0; 508 goto done; 509 } 510 511 if (nvmet_ns_revalidate(req->ns)) { 512 mutex_lock(&req->ns->subsys->lock); 513 nvmet_ns_changed(req->ns->subsys, req->ns->nsid); 514 mutex_unlock(&req->ns->subsys->lock); 515 } 516 517 /* 518 * nuse = ncap = nsze isn't always true, but we have no way to find 519 * that out from the underlying device. 520 */ 521 id->ncap = id->nsze = 522 cpu_to_le64(req->ns->size >> req->ns->blksize_shift); 523 switch (req->port->ana_state[req->ns->anagrpid]) { 524 case NVME_ANA_INACCESSIBLE: 525 case NVME_ANA_PERSISTENT_LOSS: 526 break; 527 default: 528 id->nuse = id->nsze; 529 break; 530 } 531 532 if (req->ns->bdev) 533 nvmet_bdev_set_limits(req->ns->bdev, id); 534 535 /* 536 * We just provide a single LBA format that matches what the 537 * underlying device reports. 538 */ 539 id->nlbaf = 0; 540 id->flbas = 0; 541 542 /* 543 * Our namespace might always be shared. Not just with other 544 * controllers, but also with any other user of the block device. 545 */ 546 id->nmic = NVME_NS_NMIC_SHARED; 547 id->anagrpid = cpu_to_le32(req->ns->anagrpid); 548 549 memcpy(&id->nguid, &req->ns->nguid, sizeof(id->nguid)); 550 551 id->lbaf[0].ds = req->ns->blksize_shift; 552 553 if (req->sq->ctrl->pi_support && nvmet_ns_has_pi(req->ns)) { 554 id->dpc = NVME_NS_DPC_PI_FIRST | NVME_NS_DPC_PI_LAST | 555 NVME_NS_DPC_PI_TYPE1 | NVME_NS_DPC_PI_TYPE2 | 556 NVME_NS_DPC_PI_TYPE3; 557 id->mc = NVME_MC_EXTENDED_LBA; 558 id->dps = req->ns->pi_type; 559 id->flbas = NVME_NS_FLBAS_META_EXT; 560 id->lbaf[0].ms = cpu_to_le16(req->ns->metadata_size); 561 } 562 563 if (req->ns->readonly) 564 id->nsattr |= NVME_NS_ATTR_RO; 565 done: 566 if (!status) 567 status = nvmet_copy_to_sgl(req, 0, id, sizeof(*id)); 568 569 kfree(id); 570 out: 571 nvmet_req_complete(req, status); 572 } 573 574 static void nvmet_execute_identify_nslist(struct nvmet_req *req) 575 { 576 static const int buf_size = NVME_IDENTIFY_DATA_SIZE; 577 struct nvmet_ctrl *ctrl = req->sq->ctrl; 578 struct nvmet_ns *ns; 579 unsigned long idx; 580 u32 min_nsid = le32_to_cpu(req->cmd->identify.nsid); 581 __le32 *list; 582 u16 status = 0; 583 int i = 0; 584 585 list = kzalloc(buf_size, GFP_KERNEL); 586 if (!list) { 587 status = NVME_SC_INTERNAL; 588 goto out; 589 } 590 591 xa_for_each(&ctrl->subsys->namespaces, idx, ns) { 592 if (ns->nsid <= min_nsid) 593 continue; 594 list[i++] = cpu_to_le32(ns->nsid); 595 if (i == buf_size / sizeof(__le32)) 596 break; 597 } 598 599 status = nvmet_copy_to_sgl(req, 0, list, buf_size); 600 601 kfree(list); 602 out: 603 nvmet_req_complete(req, status); 604 } 605 606 static u16 nvmet_copy_ns_identifier(struct nvmet_req *req, u8 type, u8 len, 607 void *id, off_t *off) 608 { 609 struct nvme_ns_id_desc desc = { 610 .nidt = type, 611 .nidl = len, 612 }; 613 u16 status; 614 615 status = nvmet_copy_to_sgl(req, *off, &desc, sizeof(desc)); 616 if (status) 617 return status; 618 *off += sizeof(desc); 619 620 status = nvmet_copy_to_sgl(req, *off, id, len); 621 if (status) 622 return status; 623 *off += len; 624 625 return 0; 626 } 627 628 static void nvmet_execute_identify_desclist(struct nvmet_req *req) 629 { 630 off_t off = 0; 631 u16 status; 632 633 status = nvmet_req_find_ns(req); 634 if (status) 635 goto out; 636 637 if (memchr_inv(&req->ns->uuid, 0, sizeof(req->ns->uuid))) { 638 status = nvmet_copy_ns_identifier(req, NVME_NIDT_UUID, 639 NVME_NIDT_UUID_LEN, 640 &req->ns->uuid, &off); 641 if (status) 642 goto out; 643 } 644 if (memchr_inv(req->ns->nguid, 0, sizeof(req->ns->nguid))) { 645 status = nvmet_copy_ns_identifier(req, NVME_NIDT_NGUID, 646 NVME_NIDT_NGUID_LEN, 647 &req->ns->nguid, &off); 648 if (status) 649 goto out; 650 } 651 652 status = nvmet_copy_ns_identifier(req, NVME_NIDT_CSI, 653 NVME_NIDT_CSI_LEN, 654 &req->ns->csi, &off); 655 if (status) 656 goto out; 657 658 if (sg_zero_buffer(req->sg, req->sg_cnt, NVME_IDENTIFY_DATA_SIZE - off, 659 off) != NVME_IDENTIFY_DATA_SIZE - off) 660 status = NVME_SC_INTERNAL | NVME_SC_DNR; 661 662 out: 663 nvmet_req_complete(req, status); 664 } 665 666 static bool nvmet_handle_identify_desclist(struct nvmet_req *req) 667 { 668 switch (req->cmd->identify.csi) { 669 case NVME_CSI_NVM: 670 nvmet_execute_identify_desclist(req); 671 return true; 672 case NVME_CSI_ZNS: 673 if (IS_ENABLED(CONFIG_BLK_DEV_ZONED)) { 674 nvmet_execute_identify_desclist(req); 675 return true; 676 } 677 return false; 678 default: 679 return false; 680 } 681 } 682 683 static void nvmet_execute_identify(struct nvmet_req *req) 684 { 685 if (!nvmet_check_transfer_len(req, NVME_IDENTIFY_DATA_SIZE)) 686 return; 687 688 switch (req->cmd->identify.cns) { 689 case NVME_ID_CNS_NS: 690 switch (req->cmd->identify.csi) { 691 case NVME_CSI_NVM: 692 return nvmet_execute_identify_ns(req); 693 default: 694 break; 695 } 696 break; 697 case NVME_ID_CNS_CS_NS: 698 if (IS_ENABLED(CONFIG_BLK_DEV_ZONED)) { 699 switch (req->cmd->identify.csi) { 700 case NVME_CSI_ZNS: 701 return nvmet_execute_identify_cns_cs_ns(req); 702 default: 703 break; 704 } 705 } 706 break; 707 case NVME_ID_CNS_CTRL: 708 switch (req->cmd->identify.csi) { 709 case NVME_CSI_NVM: 710 return nvmet_execute_identify_ctrl(req); 711 } 712 break; 713 case NVME_ID_CNS_CS_CTRL: 714 if (IS_ENABLED(CONFIG_BLK_DEV_ZONED)) { 715 switch (req->cmd->identify.csi) { 716 case NVME_CSI_ZNS: 717 return nvmet_execute_identify_cns_cs_ctrl(req); 718 default: 719 break; 720 } 721 } 722 break; 723 case NVME_ID_CNS_NS_ACTIVE_LIST: 724 switch (req->cmd->identify.csi) { 725 case NVME_CSI_NVM: 726 return nvmet_execute_identify_nslist(req); 727 default: 728 break; 729 } 730 break; 731 case NVME_ID_CNS_NS_DESC_LIST: 732 if (nvmet_handle_identify_desclist(req) == true) 733 return; 734 break; 735 } 736 737 nvmet_req_cns_error_complete(req); 738 } 739 740 /* 741 * A "minimum viable" abort implementation: the command is mandatory in the 742 * spec, but we are not required to do any useful work. We couldn't really 743 * do a useful abort, so don't bother even with waiting for the command 744 * to be exectuted and return immediately telling the command to abort 745 * wasn't found. 746 */ 747 static void nvmet_execute_abort(struct nvmet_req *req) 748 { 749 if (!nvmet_check_transfer_len(req, 0)) 750 return; 751 nvmet_set_result(req, 1); 752 nvmet_req_complete(req, 0); 753 } 754 755 static u16 nvmet_write_protect_flush_sync(struct nvmet_req *req) 756 { 757 u16 status; 758 759 if (req->ns->file) 760 status = nvmet_file_flush(req); 761 else 762 status = nvmet_bdev_flush(req); 763 764 if (status) 765 pr_err("write protect flush failed nsid: %u\n", req->ns->nsid); 766 return status; 767 } 768 769 static u16 nvmet_set_feat_write_protect(struct nvmet_req *req) 770 { 771 u32 write_protect = le32_to_cpu(req->cmd->common.cdw11); 772 struct nvmet_subsys *subsys = nvmet_req_subsys(req); 773 u16 status; 774 775 status = nvmet_req_find_ns(req); 776 if (status) 777 return status; 778 779 mutex_lock(&subsys->lock); 780 switch (write_protect) { 781 case NVME_NS_WRITE_PROTECT: 782 req->ns->readonly = true; 783 status = nvmet_write_protect_flush_sync(req); 784 if (status) 785 req->ns->readonly = false; 786 break; 787 case NVME_NS_NO_WRITE_PROTECT: 788 req->ns->readonly = false; 789 status = 0; 790 break; 791 default: 792 break; 793 } 794 795 if (!status) 796 nvmet_ns_changed(subsys, req->ns->nsid); 797 mutex_unlock(&subsys->lock); 798 return status; 799 } 800 801 u16 nvmet_set_feat_kato(struct nvmet_req *req) 802 { 803 u32 val32 = le32_to_cpu(req->cmd->common.cdw11); 804 805 nvmet_stop_keep_alive_timer(req->sq->ctrl); 806 req->sq->ctrl->kato = DIV_ROUND_UP(val32, 1000); 807 nvmet_start_keep_alive_timer(req->sq->ctrl); 808 809 nvmet_set_result(req, req->sq->ctrl->kato); 810 811 return 0; 812 } 813 814 u16 nvmet_set_feat_async_event(struct nvmet_req *req, u32 mask) 815 { 816 u32 val32 = le32_to_cpu(req->cmd->common.cdw11); 817 818 if (val32 & ~mask) { 819 req->error_loc = offsetof(struct nvme_common_command, cdw11); 820 return NVME_SC_INVALID_FIELD | NVME_SC_DNR; 821 } 822 823 WRITE_ONCE(req->sq->ctrl->aen_enabled, val32); 824 nvmet_set_result(req, val32); 825 826 return 0; 827 } 828 829 void nvmet_execute_set_features(struct nvmet_req *req) 830 { 831 struct nvmet_subsys *subsys = nvmet_req_subsys(req); 832 u32 cdw10 = le32_to_cpu(req->cmd->common.cdw10); 833 u32 cdw11 = le32_to_cpu(req->cmd->common.cdw11); 834 u16 status = 0; 835 u16 nsqr; 836 u16 ncqr; 837 838 if (!nvmet_check_transfer_len(req, 0)) 839 return; 840 841 switch (cdw10 & 0xff) { 842 case NVME_FEAT_NUM_QUEUES: 843 ncqr = (cdw11 >> 16) & 0xffff; 844 nsqr = cdw11 & 0xffff; 845 if (ncqr == 0xffff || nsqr == 0xffff) { 846 status = NVME_SC_INVALID_FIELD | NVME_SC_DNR; 847 break; 848 } 849 nvmet_set_result(req, 850 (subsys->max_qid - 1) | ((subsys->max_qid - 1) << 16)); 851 break; 852 case NVME_FEAT_KATO: 853 status = nvmet_set_feat_kato(req); 854 break; 855 case NVME_FEAT_ASYNC_EVENT: 856 status = nvmet_set_feat_async_event(req, NVMET_AEN_CFG_ALL); 857 break; 858 case NVME_FEAT_HOST_ID: 859 status = NVME_SC_CMD_SEQ_ERROR | NVME_SC_DNR; 860 break; 861 case NVME_FEAT_WRITE_PROTECT: 862 status = nvmet_set_feat_write_protect(req); 863 break; 864 default: 865 req->error_loc = offsetof(struct nvme_common_command, cdw10); 866 status = NVME_SC_INVALID_FIELD | NVME_SC_DNR; 867 break; 868 } 869 870 nvmet_req_complete(req, status); 871 } 872 873 static u16 nvmet_get_feat_write_protect(struct nvmet_req *req) 874 { 875 struct nvmet_subsys *subsys = nvmet_req_subsys(req); 876 u32 result; 877 878 result = nvmet_req_find_ns(req); 879 if (result) 880 return result; 881 882 mutex_lock(&subsys->lock); 883 if (req->ns->readonly == true) 884 result = NVME_NS_WRITE_PROTECT; 885 else 886 result = NVME_NS_NO_WRITE_PROTECT; 887 nvmet_set_result(req, result); 888 mutex_unlock(&subsys->lock); 889 890 return 0; 891 } 892 893 void nvmet_get_feat_kato(struct nvmet_req *req) 894 { 895 nvmet_set_result(req, req->sq->ctrl->kato * 1000); 896 } 897 898 void nvmet_get_feat_async_event(struct nvmet_req *req) 899 { 900 nvmet_set_result(req, READ_ONCE(req->sq->ctrl->aen_enabled)); 901 } 902 903 void nvmet_execute_get_features(struct nvmet_req *req) 904 { 905 struct nvmet_subsys *subsys = nvmet_req_subsys(req); 906 u32 cdw10 = le32_to_cpu(req->cmd->common.cdw10); 907 u16 status = 0; 908 909 if (!nvmet_check_transfer_len(req, nvmet_feat_data_len(req, cdw10))) 910 return; 911 912 switch (cdw10 & 0xff) { 913 /* 914 * These features are mandatory in the spec, but we don't 915 * have a useful way to implement them. We'll eventually 916 * need to come up with some fake values for these. 917 */ 918 #if 0 919 case NVME_FEAT_ARBITRATION: 920 break; 921 case NVME_FEAT_POWER_MGMT: 922 break; 923 case NVME_FEAT_TEMP_THRESH: 924 break; 925 case NVME_FEAT_ERR_RECOVERY: 926 break; 927 case NVME_FEAT_IRQ_COALESCE: 928 break; 929 case NVME_FEAT_IRQ_CONFIG: 930 break; 931 case NVME_FEAT_WRITE_ATOMIC: 932 break; 933 #endif 934 case NVME_FEAT_ASYNC_EVENT: 935 nvmet_get_feat_async_event(req); 936 break; 937 case NVME_FEAT_VOLATILE_WC: 938 nvmet_set_result(req, 1); 939 break; 940 case NVME_FEAT_NUM_QUEUES: 941 nvmet_set_result(req, 942 (subsys->max_qid-1) | ((subsys->max_qid-1) << 16)); 943 break; 944 case NVME_FEAT_KATO: 945 nvmet_get_feat_kato(req); 946 break; 947 case NVME_FEAT_HOST_ID: 948 /* need 128-bit host identifier flag */ 949 if (!(req->cmd->common.cdw11 & cpu_to_le32(1 << 0))) { 950 req->error_loc = 951 offsetof(struct nvme_common_command, cdw11); 952 status = NVME_SC_INVALID_FIELD | NVME_SC_DNR; 953 break; 954 } 955 956 status = nvmet_copy_to_sgl(req, 0, &req->sq->ctrl->hostid, 957 sizeof(req->sq->ctrl->hostid)); 958 break; 959 case NVME_FEAT_WRITE_PROTECT: 960 status = nvmet_get_feat_write_protect(req); 961 break; 962 default: 963 req->error_loc = 964 offsetof(struct nvme_common_command, cdw10); 965 status = NVME_SC_INVALID_FIELD | NVME_SC_DNR; 966 break; 967 } 968 969 nvmet_req_complete(req, status); 970 } 971 972 void nvmet_execute_async_event(struct nvmet_req *req) 973 { 974 struct nvmet_ctrl *ctrl = req->sq->ctrl; 975 976 if (!nvmet_check_transfer_len(req, 0)) 977 return; 978 979 mutex_lock(&ctrl->lock); 980 if (ctrl->nr_async_event_cmds >= NVMET_ASYNC_EVENTS) { 981 mutex_unlock(&ctrl->lock); 982 nvmet_req_complete(req, NVME_SC_ASYNC_LIMIT | NVME_SC_DNR); 983 return; 984 } 985 ctrl->async_event_cmds[ctrl->nr_async_event_cmds++] = req; 986 mutex_unlock(&ctrl->lock); 987 988 queue_work(nvmet_wq, &ctrl->async_event_work); 989 } 990 991 void nvmet_execute_keep_alive(struct nvmet_req *req) 992 { 993 struct nvmet_ctrl *ctrl = req->sq->ctrl; 994 u16 status = 0; 995 996 if (!nvmet_check_transfer_len(req, 0)) 997 return; 998 999 if (!ctrl->kato) { 1000 status = NVME_SC_KA_TIMEOUT_INVALID; 1001 goto out; 1002 } 1003 1004 pr_debug("ctrl %d update keep-alive timer for %d secs\n", 1005 ctrl->cntlid, ctrl->kato); 1006 mod_delayed_work(system_wq, &ctrl->ka_work, ctrl->kato * HZ); 1007 out: 1008 nvmet_req_complete(req, status); 1009 } 1010 1011 u16 nvmet_parse_admin_cmd(struct nvmet_req *req) 1012 { 1013 struct nvme_command *cmd = req->cmd; 1014 u16 ret; 1015 1016 if (nvme_is_fabrics(cmd)) 1017 return nvmet_parse_fabrics_admin_cmd(req); 1018 if (unlikely(!nvmet_check_auth_status(req))) 1019 return NVME_SC_AUTH_REQUIRED | NVME_SC_DNR; 1020 if (nvmet_is_disc_subsys(nvmet_req_subsys(req))) 1021 return nvmet_parse_discovery_cmd(req); 1022 1023 ret = nvmet_check_ctrl_status(req); 1024 if (unlikely(ret)) 1025 return ret; 1026 1027 if (nvmet_is_passthru_req(req)) 1028 return nvmet_parse_passthru_admin_cmd(req); 1029 1030 switch (cmd->common.opcode) { 1031 case nvme_admin_get_log_page: 1032 req->execute = nvmet_execute_get_log_page; 1033 return 0; 1034 case nvme_admin_identify: 1035 req->execute = nvmet_execute_identify; 1036 return 0; 1037 case nvme_admin_abort_cmd: 1038 req->execute = nvmet_execute_abort; 1039 return 0; 1040 case nvme_admin_set_features: 1041 req->execute = nvmet_execute_set_features; 1042 return 0; 1043 case nvme_admin_get_features: 1044 req->execute = nvmet_execute_get_features; 1045 return 0; 1046 case nvme_admin_async_event: 1047 req->execute = nvmet_execute_async_event; 1048 return 0; 1049 case nvme_admin_keep_alive: 1050 req->execute = nvmet_execute_keep_alive; 1051 return 0; 1052 default: 1053 return nvmet_report_invalid_opcode(req); 1054 } 1055 } 1056