1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * NVMe over Fabrics RDMA host code. 4 * Copyright (c) 2015-2016 HGST, a Western Digital Company. 5 */ 6 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 7 #include <linux/module.h> 8 #include <linux/init.h> 9 #include <linux/slab.h> 10 #include <rdma/mr_pool.h> 11 #include <linux/err.h> 12 #include <linux/string.h> 13 #include <linux/atomic.h> 14 #include <linux/blk-mq.h> 15 #include <linux/blk-mq-rdma.h> 16 #include <linux/types.h> 17 #include <linux/list.h> 18 #include <linux/mutex.h> 19 #include <linux/scatterlist.h> 20 #include <linux/nvme.h> 21 #include <asm/unaligned.h> 22 23 #include <rdma/ib_verbs.h> 24 #include <rdma/rdma_cm.h> 25 #include <linux/nvme-rdma.h> 26 27 #include "nvme.h" 28 #include "fabrics.h" 29 30 31 #define NVME_RDMA_CONNECT_TIMEOUT_MS 3000 /* 3 second */ 32 33 #define NVME_RDMA_MAX_SEGMENTS 256 34 35 #define NVME_RDMA_MAX_INLINE_SEGMENTS 4 36 37 #define NVME_RDMA_DATA_SGL_SIZE \ 38 (sizeof(struct scatterlist) * NVME_INLINE_SG_CNT) 39 #define NVME_RDMA_METADATA_SGL_SIZE \ 40 (sizeof(struct scatterlist) * NVME_INLINE_METADATA_SG_CNT) 41 42 struct nvme_rdma_device { 43 struct ib_device *dev; 44 struct ib_pd *pd; 45 struct kref ref; 46 struct list_head entry; 47 unsigned int num_inline_segments; 48 }; 49 50 struct nvme_rdma_qe { 51 struct ib_cqe cqe; 52 void *data; 53 u64 dma; 54 }; 55 56 struct nvme_rdma_sgl { 57 int nents; 58 struct sg_table sg_table; 59 }; 60 61 struct nvme_rdma_queue; 62 struct nvme_rdma_request { 63 struct nvme_request req; 64 struct ib_mr *mr; 65 struct nvme_rdma_qe sqe; 66 union nvme_result result; 67 __le16 status; 68 refcount_t ref; 69 struct ib_sge sge[1 + NVME_RDMA_MAX_INLINE_SEGMENTS]; 70 u32 num_sge; 71 struct ib_reg_wr reg_wr; 72 struct ib_cqe reg_cqe; 73 struct nvme_rdma_queue *queue; 74 struct nvme_rdma_sgl data_sgl; 75 struct nvme_rdma_sgl *metadata_sgl; 76 bool use_sig_mr; 77 }; 78 79 enum nvme_rdma_queue_flags { 80 NVME_RDMA_Q_ALLOCATED = 0, 81 NVME_RDMA_Q_LIVE = 1, 82 NVME_RDMA_Q_TR_READY = 2, 83 }; 84 85 struct nvme_rdma_queue { 86 struct nvme_rdma_qe *rsp_ring; 87 int queue_size; 88 size_t cmnd_capsule_len; 89 struct nvme_rdma_ctrl *ctrl; 90 struct nvme_rdma_device *device; 91 struct ib_cq *ib_cq; 92 struct ib_qp *qp; 93 94 unsigned long flags; 95 struct rdma_cm_id *cm_id; 96 int cm_error; 97 struct completion cm_done; 98 bool pi_support; 99 int cq_size; 100 struct mutex queue_lock; 101 }; 102 103 struct nvme_rdma_ctrl { 104 /* read only in the hot path */ 105 struct nvme_rdma_queue *queues; 106 107 /* other member variables */ 108 struct blk_mq_tag_set tag_set; 109 struct work_struct err_work; 110 111 struct nvme_rdma_qe async_event_sqe; 112 113 struct delayed_work reconnect_work; 114 115 struct list_head list; 116 117 struct blk_mq_tag_set admin_tag_set; 118 struct nvme_rdma_device *device; 119 120 u32 max_fr_pages; 121 122 struct sockaddr_storage addr; 123 struct sockaddr_storage src_addr; 124 125 struct nvme_ctrl ctrl; 126 bool use_inline_data; 127 u32 io_queues[HCTX_MAX_TYPES]; 128 }; 129 130 static inline struct nvme_rdma_ctrl *to_rdma_ctrl(struct nvme_ctrl *ctrl) 131 { 132 return container_of(ctrl, struct nvme_rdma_ctrl, ctrl); 133 } 134 135 static LIST_HEAD(device_list); 136 static DEFINE_MUTEX(device_list_mutex); 137 138 static LIST_HEAD(nvme_rdma_ctrl_list); 139 static DEFINE_MUTEX(nvme_rdma_ctrl_mutex); 140 141 /* 142 * Disabling this option makes small I/O goes faster, but is fundamentally 143 * unsafe. With it turned off we will have to register a global rkey that 144 * allows read and write access to all physical memory. 145 */ 146 static bool register_always = true; 147 module_param(register_always, bool, 0444); 148 MODULE_PARM_DESC(register_always, 149 "Use memory registration even for contiguous memory regions"); 150 151 static int nvme_rdma_cm_handler(struct rdma_cm_id *cm_id, 152 struct rdma_cm_event *event); 153 static void nvme_rdma_recv_done(struct ib_cq *cq, struct ib_wc *wc); 154 static void nvme_rdma_complete_rq(struct request *rq); 155 156 static const struct blk_mq_ops nvme_rdma_mq_ops; 157 static const struct blk_mq_ops nvme_rdma_admin_mq_ops; 158 159 static inline int nvme_rdma_queue_idx(struct nvme_rdma_queue *queue) 160 { 161 return queue - queue->ctrl->queues; 162 } 163 164 static bool nvme_rdma_poll_queue(struct nvme_rdma_queue *queue) 165 { 166 return nvme_rdma_queue_idx(queue) > 167 queue->ctrl->io_queues[HCTX_TYPE_DEFAULT] + 168 queue->ctrl->io_queues[HCTX_TYPE_READ]; 169 } 170 171 static inline size_t nvme_rdma_inline_data_size(struct nvme_rdma_queue *queue) 172 { 173 return queue->cmnd_capsule_len - sizeof(struct nvme_command); 174 } 175 176 static void nvme_rdma_free_qe(struct ib_device *ibdev, struct nvme_rdma_qe *qe, 177 size_t capsule_size, enum dma_data_direction dir) 178 { 179 ib_dma_unmap_single(ibdev, qe->dma, capsule_size, dir); 180 kfree(qe->data); 181 } 182 183 static int nvme_rdma_alloc_qe(struct ib_device *ibdev, struct nvme_rdma_qe *qe, 184 size_t capsule_size, enum dma_data_direction dir) 185 { 186 qe->data = kzalloc(capsule_size, GFP_KERNEL); 187 if (!qe->data) 188 return -ENOMEM; 189 190 qe->dma = ib_dma_map_single(ibdev, qe->data, capsule_size, dir); 191 if (ib_dma_mapping_error(ibdev, qe->dma)) { 192 kfree(qe->data); 193 qe->data = NULL; 194 return -ENOMEM; 195 } 196 197 return 0; 198 } 199 200 static void nvme_rdma_free_ring(struct ib_device *ibdev, 201 struct nvme_rdma_qe *ring, size_t ib_queue_size, 202 size_t capsule_size, enum dma_data_direction dir) 203 { 204 int i; 205 206 for (i = 0; i < ib_queue_size; i++) 207 nvme_rdma_free_qe(ibdev, &ring[i], capsule_size, dir); 208 kfree(ring); 209 } 210 211 static struct nvme_rdma_qe *nvme_rdma_alloc_ring(struct ib_device *ibdev, 212 size_t ib_queue_size, size_t capsule_size, 213 enum dma_data_direction dir) 214 { 215 struct nvme_rdma_qe *ring; 216 int i; 217 218 ring = kcalloc(ib_queue_size, sizeof(struct nvme_rdma_qe), GFP_KERNEL); 219 if (!ring) 220 return NULL; 221 222 /* 223 * Bind the CQEs (post recv buffers) DMA mapping to the RDMA queue 224 * lifetime. It's safe, since any chage in the underlying RDMA device 225 * will issue error recovery and queue re-creation. 226 */ 227 for (i = 0; i < ib_queue_size; i++) { 228 if (nvme_rdma_alloc_qe(ibdev, &ring[i], capsule_size, dir)) 229 goto out_free_ring; 230 } 231 232 return ring; 233 234 out_free_ring: 235 nvme_rdma_free_ring(ibdev, ring, i, capsule_size, dir); 236 return NULL; 237 } 238 239 static void nvme_rdma_qp_event(struct ib_event *event, void *context) 240 { 241 pr_debug("QP event %s (%d)\n", 242 ib_event_msg(event->event), event->event); 243 244 } 245 246 static int nvme_rdma_wait_for_cm(struct nvme_rdma_queue *queue) 247 { 248 int ret; 249 250 ret = wait_for_completion_interruptible_timeout(&queue->cm_done, 251 msecs_to_jiffies(NVME_RDMA_CONNECT_TIMEOUT_MS) + 1); 252 if (ret < 0) 253 return ret; 254 if (ret == 0) 255 return -ETIMEDOUT; 256 WARN_ON_ONCE(queue->cm_error > 0); 257 return queue->cm_error; 258 } 259 260 static int nvme_rdma_create_qp(struct nvme_rdma_queue *queue, const int factor) 261 { 262 struct nvme_rdma_device *dev = queue->device; 263 struct ib_qp_init_attr init_attr; 264 int ret; 265 266 memset(&init_attr, 0, sizeof(init_attr)); 267 init_attr.event_handler = nvme_rdma_qp_event; 268 /* +1 for drain */ 269 init_attr.cap.max_send_wr = factor * queue->queue_size + 1; 270 /* +1 for drain */ 271 init_attr.cap.max_recv_wr = queue->queue_size + 1; 272 init_attr.cap.max_recv_sge = 1; 273 init_attr.cap.max_send_sge = 1 + dev->num_inline_segments; 274 init_attr.sq_sig_type = IB_SIGNAL_REQ_WR; 275 init_attr.qp_type = IB_QPT_RC; 276 init_attr.send_cq = queue->ib_cq; 277 init_attr.recv_cq = queue->ib_cq; 278 if (queue->pi_support) 279 init_attr.create_flags |= IB_QP_CREATE_INTEGRITY_EN; 280 init_attr.qp_context = queue; 281 282 ret = rdma_create_qp(queue->cm_id, dev->pd, &init_attr); 283 284 queue->qp = queue->cm_id->qp; 285 return ret; 286 } 287 288 static void nvme_rdma_exit_request(struct blk_mq_tag_set *set, 289 struct request *rq, unsigned int hctx_idx) 290 { 291 struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); 292 293 kfree(req->sqe.data); 294 } 295 296 static int nvme_rdma_init_request(struct blk_mq_tag_set *set, 297 struct request *rq, unsigned int hctx_idx, 298 unsigned int numa_node) 299 { 300 struct nvme_rdma_ctrl *ctrl = set->driver_data; 301 struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); 302 int queue_idx = (set == &ctrl->tag_set) ? hctx_idx + 1 : 0; 303 struct nvme_rdma_queue *queue = &ctrl->queues[queue_idx]; 304 305 nvme_req(rq)->ctrl = &ctrl->ctrl; 306 req->sqe.data = kzalloc(sizeof(struct nvme_command), GFP_KERNEL); 307 if (!req->sqe.data) 308 return -ENOMEM; 309 310 /* metadata nvme_rdma_sgl struct is located after command's data SGL */ 311 if (queue->pi_support) 312 req->metadata_sgl = (void *)nvme_req(rq) + 313 sizeof(struct nvme_rdma_request) + 314 NVME_RDMA_DATA_SGL_SIZE; 315 316 req->queue = queue; 317 318 return 0; 319 } 320 321 static int nvme_rdma_init_hctx(struct blk_mq_hw_ctx *hctx, void *data, 322 unsigned int hctx_idx) 323 { 324 struct nvme_rdma_ctrl *ctrl = data; 325 struct nvme_rdma_queue *queue = &ctrl->queues[hctx_idx + 1]; 326 327 BUG_ON(hctx_idx >= ctrl->ctrl.queue_count); 328 329 hctx->driver_data = queue; 330 return 0; 331 } 332 333 static int nvme_rdma_init_admin_hctx(struct blk_mq_hw_ctx *hctx, void *data, 334 unsigned int hctx_idx) 335 { 336 struct nvme_rdma_ctrl *ctrl = data; 337 struct nvme_rdma_queue *queue = &ctrl->queues[0]; 338 339 BUG_ON(hctx_idx != 0); 340 341 hctx->driver_data = queue; 342 return 0; 343 } 344 345 static void nvme_rdma_free_dev(struct kref *ref) 346 { 347 struct nvme_rdma_device *ndev = 348 container_of(ref, struct nvme_rdma_device, ref); 349 350 mutex_lock(&device_list_mutex); 351 list_del(&ndev->entry); 352 mutex_unlock(&device_list_mutex); 353 354 ib_dealloc_pd(ndev->pd); 355 kfree(ndev); 356 } 357 358 static void nvme_rdma_dev_put(struct nvme_rdma_device *dev) 359 { 360 kref_put(&dev->ref, nvme_rdma_free_dev); 361 } 362 363 static int nvme_rdma_dev_get(struct nvme_rdma_device *dev) 364 { 365 return kref_get_unless_zero(&dev->ref); 366 } 367 368 static struct nvme_rdma_device * 369 nvme_rdma_find_get_device(struct rdma_cm_id *cm_id) 370 { 371 struct nvme_rdma_device *ndev; 372 373 mutex_lock(&device_list_mutex); 374 list_for_each_entry(ndev, &device_list, entry) { 375 if (ndev->dev->node_guid == cm_id->device->node_guid && 376 nvme_rdma_dev_get(ndev)) 377 goto out_unlock; 378 } 379 380 ndev = kzalloc(sizeof(*ndev), GFP_KERNEL); 381 if (!ndev) 382 goto out_err; 383 384 ndev->dev = cm_id->device; 385 kref_init(&ndev->ref); 386 387 ndev->pd = ib_alloc_pd(ndev->dev, 388 register_always ? 0 : IB_PD_UNSAFE_GLOBAL_RKEY); 389 if (IS_ERR(ndev->pd)) 390 goto out_free_dev; 391 392 if (!(ndev->dev->attrs.device_cap_flags & 393 IB_DEVICE_MEM_MGT_EXTENSIONS)) { 394 dev_err(&ndev->dev->dev, 395 "Memory registrations not supported.\n"); 396 goto out_free_pd; 397 } 398 399 ndev->num_inline_segments = min(NVME_RDMA_MAX_INLINE_SEGMENTS, 400 ndev->dev->attrs.max_send_sge - 1); 401 list_add(&ndev->entry, &device_list); 402 out_unlock: 403 mutex_unlock(&device_list_mutex); 404 return ndev; 405 406 out_free_pd: 407 ib_dealloc_pd(ndev->pd); 408 out_free_dev: 409 kfree(ndev); 410 out_err: 411 mutex_unlock(&device_list_mutex); 412 return NULL; 413 } 414 415 static void nvme_rdma_free_cq(struct nvme_rdma_queue *queue) 416 { 417 if (nvme_rdma_poll_queue(queue)) 418 ib_free_cq(queue->ib_cq); 419 else 420 ib_cq_pool_put(queue->ib_cq, queue->cq_size); 421 } 422 423 static void nvme_rdma_destroy_queue_ib(struct nvme_rdma_queue *queue) 424 { 425 struct nvme_rdma_device *dev; 426 struct ib_device *ibdev; 427 428 if (!test_and_clear_bit(NVME_RDMA_Q_TR_READY, &queue->flags)) 429 return; 430 431 dev = queue->device; 432 ibdev = dev->dev; 433 434 if (queue->pi_support) 435 ib_mr_pool_destroy(queue->qp, &queue->qp->sig_mrs); 436 ib_mr_pool_destroy(queue->qp, &queue->qp->rdma_mrs); 437 438 /* 439 * The cm_id object might have been destroyed during RDMA connection 440 * establishment error flow to avoid getting other cma events, thus 441 * the destruction of the QP shouldn't use rdma_cm API. 442 */ 443 ib_destroy_qp(queue->qp); 444 nvme_rdma_free_cq(queue); 445 446 nvme_rdma_free_ring(ibdev, queue->rsp_ring, queue->queue_size, 447 sizeof(struct nvme_completion), DMA_FROM_DEVICE); 448 449 nvme_rdma_dev_put(dev); 450 } 451 452 static int nvme_rdma_get_max_fr_pages(struct ib_device *ibdev, bool pi_support) 453 { 454 u32 max_page_list_len; 455 456 if (pi_support) 457 max_page_list_len = ibdev->attrs.max_pi_fast_reg_page_list_len; 458 else 459 max_page_list_len = ibdev->attrs.max_fast_reg_page_list_len; 460 461 return min_t(u32, NVME_RDMA_MAX_SEGMENTS, max_page_list_len - 1); 462 } 463 464 static int nvme_rdma_create_cq(struct ib_device *ibdev, 465 struct nvme_rdma_queue *queue) 466 { 467 int ret, comp_vector, idx = nvme_rdma_queue_idx(queue); 468 enum ib_poll_context poll_ctx; 469 470 /* 471 * Spread I/O queues completion vectors according their queue index. 472 * Admin queues can always go on completion vector 0. 473 */ 474 comp_vector = (idx == 0 ? idx : idx - 1) % ibdev->num_comp_vectors; 475 476 /* Polling queues need direct cq polling context */ 477 if (nvme_rdma_poll_queue(queue)) { 478 poll_ctx = IB_POLL_DIRECT; 479 queue->ib_cq = ib_alloc_cq(ibdev, queue, queue->cq_size, 480 comp_vector, poll_ctx); 481 } else { 482 poll_ctx = IB_POLL_SOFTIRQ; 483 queue->ib_cq = ib_cq_pool_get(ibdev, queue->cq_size, 484 comp_vector, poll_ctx); 485 } 486 487 if (IS_ERR(queue->ib_cq)) { 488 ret = PTR_ERR(queue->ib_cq); 489 return ret; 490 } 491 492 return 0; 493 } 494 495 static int nvme_rdma_create_queue_ib(struct nvme_rdma_queue *queue) 496 { 497 struct ib_device *ibdev; 498 const int send_wr_factor = 3; /* MR, SEND, INV */ 499 const int cq_factor = send_wr_factor + 1; /* + RECV */ 500 int ret, pages_per_mr; 501 502 queue->device = nvme_rdma_find_get_device(queue->cm_id); 503 if (!queue->device) { 504 dev_err(queue->cm_id->device->dev.parent, 505 "no client data found!\n"); 506 return -ECONNREFUSED; 507 } 508 ibdev = queue->device->dev; 509 510 /* +1 for ib_stop_cq */ 511 queue->cq_size = cq_factor * queue->queue_size + 1; 512 513 ret = nvme_rdma_create_cq(ibdev, queue); 514 if (ret) 515 goto out_put_dev; 516 517 ret = nvme_rdma_create_qp(queue, send_wr_factor); 518 if (ret) 519 goto out_destroy_ib_cq; 520 521 queue->rsp_ring = nvme_rdma_alloc_ring(ibdev, queue->queue_size, 522 sizeof(struct nvme_completion), DMA_FROM_DEVICE); 523 if (!queue->rsp_ring) { 524 ret = -ENOMEM; 525 goto out_destroy_qp; 526 } 527 528 /* 529 * Currently we don't use SG_GAPS MR's so if the first entry is 530 * misaligned we'll end up using two entries for a single data page, 531 * so one additional entry is required. 532 */ 533 pages_per_mr = nvme_rdma_get_max_fr_pages(ibdev, queue->pi_support) + 1; 534 ret = ib_mr_pool_init(queue->qp, &queue->qp->rdma_mrs, 535 queue->queue_size, 536 IB_MR_TYPE_MEM_REG, 537 pages_per_mr, 0); 538 if (ret) { 539 dev_err(queue->ctrl->ctrl.device, 540 "failed to initialize MR pool sized %d for QID %d\n", 541 queue->queue_size, nvme_rdma_queue_idx(queue)); 542 goto out_destroy_ring; 543 } 544 545 if (queue->pi_support) { 546 ret = ib_mr_pool_init(queue->qp, &queue->qp->sig_mrs, 547 queue->queue_size, IB_MR_TYPE_INTEGRITY, 548 pages_per_mr, pages_per_mr); 549 if (ret) { 550 dev_err(queue->ctrl->ctrl.device, 551 "failed to initialize PI MR pool sized %d for QID %d\n", 552 queue->queue_size, nvme_rdma_queue_idx(queue)); 553 goto out_destroy_mr_pool; 554 } 555 } 556 557 set_bit(NVME_RDMA_Q_TR_READY, &queue->flags); 558 559 return 0; 560 561 out_destroy_mr_pool: 562 ib_mr_pool_destroy(queue->qp, &queue->qp->rdma_mrs); 563 out_destroy_ring: 564 nvme_rdma_free_ring(ibdev, queue->rsp_ring, queue->queue_size, 565 sizeof(struct nvme_completion), DMA_FROM_DEVICE); 566 out_destroy_qp: 567 rdma_destroy_qp(queue->cm_id); 568 out_destroy_ib_cq: 569 nvme_rdma_free_cq(queue); 570 out_put_dev: 571 nvme_rdma_dev_put(queue->device); 572 return ret; 573 } 574 575 static int nvme_rdma_alloc_queue(struct nvme_rdma_ctrl *ctrl, 576 int idx, size_t queue_size) 577 { 578 struct nvme_rdma_queue *queue; 579 struct sockaddr *src_addr = NULL; 580 int ret; 581 582 queue = &ctrl->queues[idx]; 583 mutex_init(&queue->queue_lock); 584 queue->ctrl = ctrl; 585 if (idx && ctrl->ctrl.max_integrity_segments) 586 queue->pi_support = true; 587 else 588 queue->pi_support = false; 589 init_completion(&queue->cm_done); 590 591 if (idx > 0) 592 queue->cmnd_capsule_len = ctrl->ctrl.ioccsz * 16; 593 else 594 queue->cmnd_capsule_len = sizeof(struct nvme_command); 595 596 queue->queue_size = queue_size; 597 598 queue->cm_id = rdma_create_id(&init_net, nvme_rdma_cm_handler, queue, 599 RDMA_PS_TCP, IB_QPT_RC); 600 if (IS_ERR(queue->cm_id)) { 601 dev_info(ctrl->ctrl.device, 602 "failed to create CM ID: %ld\n", PTR_ERR(queue->cm_id)); 603 ret = PTR_ERR(queue->cm_id); 604 goto out_destroy_mutex; 605 } 606 607 if (ctrl->ctrl.opts->mask & NVMF_OPT_HOST_TRADDR) 608 src_addr = (struct sockaddr *)&ctrl->src_addr; 609 610 queue->cm_error = -ETIMEDOUT; 611 ret = rdma_resolve_addr(queue->cm_id, src_addr, 612 (struct sockaddr *)&ctrl->addr, 613 NVME_RDMA_CONNECT_TIMEOUT_MS); 614 if (ret) { 615 dev_info(ctrl->ctrl.device, 616 "rdma_resolve_addr failed (%d).\n", ret); 617 goto out_destroy_cm_id; 618 } 619 620 ret = nvme_rdma_wait_for_cm(queue); 621 if (ret) { 622 dev_info(ctrl->ctrl.device, 623 "rdma connection establishment failed (%d)\n", ret); 624 goto out_destroy_cm_id; 625 } 626 627 set_bit(NVME_RDMA_Q_ALLOCATED, &queue->flags); 628 629 return 0; 630 631 out_destroy_cm_id: 632 rdma_destroy_id(queue->cm_id); 633 nvme_rdma_destroy_queue_ib(queue); 634 out_destroy_mutex: 635 mutex_destroy(&queue->queue_lock); 636 return ret; 637 } 638 639 static void __nvme_rdma_stop_queue(struct nvme_rdma_queue *queue) 640 { 641 rdma_disconnect(queue->cm_id); 642 ib_drain_qp(queue->qp); 643 } 644 645 static void nvme_rdma_stop_queue(struct nvme_rdma_queue *queue) 646 { 647 mutex_lock(&queue->queue_lock); 648 if (test_and_clear_bit(NVME_RDMA_Q_LIVE, &queue->flags)) 649 __nvme_rdma_stop_queue(queue); 650 mutex_unlock(&queue->queue_lock); 651 } 652 653 static void nvme_rdma_free_queue(struct nvme_rdma_queue *queue) 654 { 655 if (!test_and_clear_bit(NVME_RDMA_Q_ALLOCATED, &queue->flags)) 656 return; 657 658 nvme_rdma_destroy_queue_ib(queue); 659 rdma_destroy_id(queue->cm_id); 660 mutex_destroy(&queue->queue_lock); 661 } 662 663 static void nvme_rdma_free_io_queues(struct nvme_rdma_ctrl *ctrl) 664 { 665 int i; 666 667 for (i = 1; i < ctrl->ctrl.queue_count; i++) 668 nvme_rdma_free_queue(&ctrl->queues[i]); 669 } 670 671 static void nvme_rdma_stop_io_queues(struct nvme_rdma_ctrl *ctrl) 672 { 673 int i; 674 675 for (i = 1; i < ctrl->ctrl.queue_count; i++) 676 nvme_rdma_stop_queue(&ctrl->queues[i]); 677 } 678 679 static int nvme_rdma_start_queue(struct nvme_rdma_ctrl *ctrl, int idx) 680 { 681 struct nvme_rdma_queue *queue = &ctrl->queues[idx]; 682 bool poll = nvme_rdma_poll_queue(queue); 683 int ret; 684 685 if (idx) 686 ret = nvmf_connect_io_queue(&ctrl->ctrl, idx, poll); 687 else 688 ret = nvmf_connect_admin_queue(&ctrl->ctrl); 689 690 if (!ret) { 691 set_bit(NVME_RDMA_Q_LIVE, &queue->flags); 692 } else { 693 if (test_bit(NVME_RDMA_Q_ALLOCATED, &queue->flags)) 694 __nvme_rdma_stop_queue(queue); 695 dev_info(ctrl->ctrl.device, 696 "failed to connect queue: %d ret=%d\n", idx, ret); 697 } 698 return ret; 699 } 700 701 static int nvme_rdma_start_io_queues(struct nvme_rdma_ctrl *ctrl) 702 { 703 int i, ret = 0; 704 705 for (i = 1; i < ctrl->ctrl.queue_count; i++) { 706 ret = nvme_rdma_start_queue(ctrl, i); 707 if (ret) 708 goto out_stop_queues; 709 } 710 711 return 0; 712 713 out_stop_queues: 714 for (i--; i >= 1; i--) 715 nvme_rdma_stop_queue(&ctrl->queues[i]); 716 return ret; 717 } 718 719 static int nvme_rdma_alloc_io_queues(struct nvme_rdma_ctrl *ctrl) 720 { 721 struct nvmf_ctrl_options *opts = ctrl->ctrl.opts; 722 struct ib_device *ibdev = ctrl->device->dev; 723 unsigned int nr_io_queues, nr_default_queues; 724 unsigned int nr_read_queues, nr_poll_queues; 725 int i, ret; 726 727 nr_read_queues = min_t(unsigned int, ibdev->num_comp_vectors, 728 min(opts->nr_io_queues, num_online_cpus())); 729 nr_default_queues = min_t(unsigned int, ibdev->num_comp_vectors, 730 min(opts->nr_write_queues, num_online_cpus())); 731 nr_poll_queues = min(opts->nr_poll_queues, num_online_cpus()); 732 nr_io_queues = nr_read_queues + nr_default_queues + nr_poll_queues; 733 734 ret = nvme_set_queue_count(&ctrl->ctrl, &nr_io_queues); 735 if (ret) 736 return ret; 737 738 ctrl->ctrl.queue_count = nr_io_queues + 1; 739 if (ctrl->ctrl.queue_count < 2) { 740 dev_err(ctrl->ctrl.device, 741 "unable to set any I/O queues\n"); 742 return -ENOMEM; 743 } 744 745 dev_info(ctrl->ctrl.device, 746 "creating %d I/O queues.\n", nr_io_queues); 747 748 if (opts->nr_write_queues && nr_read_queues < nr_io_queues) { 749 /* 750 * separate read/write queues 751 * hand out dedicated default queues only after we have 752 * sufficient read queues. 753 */ 754 ctrl->io_queues[HCTX_TYPE_READ] = nr_read_queues; 755 nr_io_queues -= ctrl->io_queues[HCTX_TYPE_READ]; 756 ctrl->io_queues[HCTX_TYPE_DEFAULT] = 757 min(nr_default_queues, nr_io_queues); 758 nr_io_queues -= ctrl->io_queues[HCTX_TYPE_DEFAULT]; 759 } else { 760 /* 761 * shared read/write queues 762 * either no write queues were requested, or we don't have 763 * sufficient queue count to have dedicated default queues. 764 */ 765 ctrl->io_queues[HCTX_TYPE_DEFAULT] = 766 min(nr_read_queues, nr_io_queues); 767 nr_io_queues -= ctrl->io_queues[HCTX_TYPE_DEFAULT]; 768 } 769 770 if (opts->nr_poll_queues && nr_io_queues) { 771 /* map dedicated poll queues only if we have queues left */ 772 ctrl->io_queues[HCTX_TYPE_POLL] = 773 min(nr_poll_queues, nr_io_queues); 774 } 775 776 for (i = 1; i < ctrl->ctrl.queue_count; i++) { 777 ret = nvme_rdma_alloc_queue(ctrl, i, 778 ctrl->ctrl.sqsize + 1); 779 if (ret) 780 goto out_free_queues; 781 } 782 783 return 0; 784 785 out_free_queues: 786 for (i--; i >= 1; i--) 787 nvme_rdma_free_queue(&ctrl->queues[i]); 788 789 return ret; 790 } 791 792 static struct blk_mq_tag_set *nvme_rdma_alloc_tagset(struct nvme_ctrl *nctrl, 793 bool admin) 794 { 795 struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(nctrl); 796 struct blk_mq_tag_set *set; 797 int ret; 798 799 if (admin) { 800 set = &ctrl->admin_tag_set; 801 memset(set, 0, sizeof(*set)); 802 set->ops = &nvme_rdma_admin_mq_ops; 803 set->queue_depth = NVME_AQ_MQ_TAG_DEPTH; 804 set->reserved_tags = NVMF_RESERVED_TAGS; 805 set->numa_node = nctrl->numa_node; 806 set->cmd_size = sizeof(struct nvme_rdma_request) + 807 NVME_RDMA_DATA_SGL_SIZE; 808 set->driver_data = ctrl; 809 set->nr_hw_queues = 1; 810 set->timeout = NVME_ADMIN_TIMEOUT; 811 set->flags = BLK_MQ_F_NO_SCHED; 812 } else { 813 set = &ctrl->tag_set; 814 memset(set, 0, sizeof(*set)); 815 set->ops = &nvme_rdma_mq_ops; 816 set->queue_depth = nctrl->sqsize + 1; 817 set->reserved_tags = NVMF_RESERVED_TAGS; 818 set->numa_node = nctrl->numa_node; 819 set->flags = BLK_MQ_F_SHOULD_MERGE; 820 set->cmd_size = sizeof(struct nvme_rdma_request) + 821 NVME_RDMA_DATA_SGL_SIZE; 822 if (nctrl->max_integrity_segments) 823 set->cmd_size += sizeof(struct nvme_rdma_sgl) + 824 NVME_RDMA_METADATA_SGL_SIZE; 825 set->driver_data = ctrl; 826 set->nr_hw_queues = nctrl->queue_count - 1; 827 set->timeout = NVME_IO_TIMEOUT; 828 set->nr_maps = nctrl->opts->nr_poll_queues ? HCTX_MAX_TYPES : 2; 829 } 830 831 ret = blk_mq_alloc_tag_set(set); 832 if (ret) 833 return ERR_PTR(ret); 834 835 return set; 836 } 837 838 static void nvme_rdma_destroy_admin_queue(struct nvme_rdma_ctrl *ctrl, 839 bool remove) 840 { 841 if (remove) { 842 blk_cleanup_queue(ctrl->ctrl.admin_q); 843 blk_cleanup_queue(ctrl->ctrl.fabrics_q); 844 blk_mq_free_tag_set(ctrl->ctrl.admin_tagset); 845 } 846 if (ctrl->async_event_sqe.data) { 847 cancel_work_sync(&ctrl->ctrl.async_event_work); 848 nvme_rdma_free_qe(ctrl->device->dev, &ctrl->async_event_sqe, 849 sizeof(struct nvme_command), DMA_TO_DEVICE); 850 ctrl->async_event_sqe.data = NULL; 851 } 852 nvme_rdma_free_queue(&ctrl->queues[0]); 853 } 854 855 static int nvme_rdma_configure_admin_queue(struct nvme_rdma_ctrl *ctrl, 856 bool new) 857 { 858 bool pi_capable = false; 859 int error; 860 861 error = nvme_rdma_alloc_queue(ctrl, 0, NVME_AQ_DEPTH); 862 if (error) 863 return error; 864 865 ctrl->device = ctrl->queues[0].device; 866 ctrl->ctrl.numa_node = ibdev_to_node(ctrl->device->dev); 867 868 /* T10-PI support */ 869 if (ctrl->device->dev->attrs.device_cap_flags & 870 IB_DEVICE_INTEGRITY_HANDOVER) 871 pi_capable = true; 872 873 ctrl->max_fr_pages = nvme_rdma_get_max_fr_pages(ctrl->device->dev, 874 pi_capable); 875 876 /* 877 * Bind the async event SQE DMA mapping to the admin queue lifetime. 878 * It's safe, since any chage in the underlying RDMA device will issue 879 * error recovery and queue re-creation. 880 */ 881 error = nvme_rdma_alloc_qe(ctrl->device->dev, &ctrl->async_event_sqe, 882 sizeof(struct nvme_command), DMA_TO_DEVICE); 883 if (error) 884 goto out_free_queue; 885 886 if (new) { 887 ctrl->ctrl.admin_tagset = nvme_rdma_alloc_tagset(&ctrl->ctrl, true); 888 if (IS_ERR(ctrl->ctrl.admin_tagset)) { 889 error = PTR_ERR(ctrl->ctrl.admin_tagset); 890 goto out_free_async_qe; 891 } 892 893 ctrl->ctrl.fabrics_q = blk_mq_init_queue(&ctrl->admin_tag_set); 894 if (IS_ERR(ctrl->ctrl.fabrics_q)) { 895 error = PTR_ERR(ctrl->ctrl.fabrics_q); 896 goto out_free_tagset; 897 } 898 899 ctrl->ctrl.admin_q = blk_mq_init_queue(&ctrl->admin_tag_set); 900 if (IS_ERR(ctrl->ctrl.admin_q)) { 901 error = PTR_ERR(ctrl->ctrl.admin_q); 902 goto out_cleanup_fabrics_q; 903 } 904 } 905 906 error = nvme_rdma_start_queue(ctrl, 0); 907 if (error) 908 goto out_cleanup_queue; 909 910 error = nvme_enable_ctrl(&ctrl->ctrl); 911 if (error) 912 goto out_stop_queue; 913 914 ctrl->ctrl.max_segments = ctrl->max_fr_pages; 915 ctrl->ctrl.max_hw_sectors = ctrl->max_fr_pages << (ilog2(SZ_4K) - 9); 916 if (pi_capable) 917 ctrl->ctrl.max_integrity_segments = ctrl->max_fr_pages; 918 else 919 ctrl->ctrl.max_integrity_segments = 0; 920 921 blk_mq_unquiesce_queue(ctrl->ctrl.admin_q); 922 923 error = nvme_init_identify(&ctrl->ctrl); 924 if (error) 925 goto out_quiesce_queue; 926 927 return 0; 928 929 out_quiesce_queue: 930 blk_mq_quiesce_queue(ctrl->ctrl.admin_q); 931 blk_sync_queue(ctrl->ctrl.admin_q); 932 out_stop_queue: 933 nvme_rdma_stop_queue(&ctrl->queues[0]); 934 nvme_cancel_admin_tagset(&ctrl->ctrl); 935 out_cleanup_queue: 936 if (new) 937 blk_cleanup_queue(ctrl->ctrl.admin_q); 938 out_cleanup_fabrics_q: 939 if (new) 940 blk_cleanup_queue(ctrl->ctrl.fabrics_q); 941 out_free_tagset: 942 if (new) 943 blk_mq_free_tag_set(ctrl->ctrl.admin_tagset); 944 out_free_async_qe: 945 if (ctrl->async_event_sqe.data) { 946 nvme_rdma_free_qe(ctrl->device->dev, &ctrl->async_event_sqe, 947 sizeof(struct nvme_command), DMA_TO_DEVICE); 948 ctrl->async_event_sqe.data = NULL; 949 } 950 out_free_queue: 951 nvme_rdma_free_queue(&ctrl->queues[0]); 952 return error; 953 } 954 955 static void nvme_rdma_destroy_io_queues(struct nvme_rdma_ctrl *ctrl, 956 bool remove) 957 { 958 if (remove) { 959 blk_cleanup_queue(ctrl->ctrl.connect_q); 960 blk_mq_free_tag_set(ctrl->ctrl.tagset); 961 } 962 nvme_rdma_free_io_queues(ctrl); 963 } 964 965 static int nvme_rdma_configure_io_queues(struct nvme_rdma_ctrl *ctrl, bool new) 966 { 967 int ret; 968 969 ret = nvme_rdma_alloc_io_queues(ctrl); 970 if (ret) 971 return ret; 972 973 if (new) { 974 ctrl->ctrl.tagset = nvme_rdma_alloc_tagset(&ctrl->ctrl, false); 975 if (IS_ERR(ctrl->ctrl.tagset)) { 976 ret = PTR_ERR(ctrl->ctrl.tagset); 977 goto out_free_io_queues; 978 } 979 980 ctrl->ctrl.connect_q = blk_mq_init_queue(&ctrl->tag_set); 981 if (IS_ERR(ctrl->ctrl.connect_q)) { 982 ret = PTR_ERR(ctrl->ctrl.connect_q); 983 goto out_free_tag_set; 984 } 985 } 986 987 ret = nvme_rdma_start_io_queues(ctrl); 988 if (ret) 989 goto out_cleanup_connect_q; 990 991 if (!new) { 992 nvme_start_queues(&ctrl->ctrl); 993 if (!nvme_wait_freeze_timeout(&ctrl->ctrl, NVME_IO_TIMEOUT)) { 994 /* 995 * If we timed out waiting for freeze we are likely to 996 * be stuck. Fail the controller initialization just 997 * to be safe. 998 */ 999 ret = -ENODEV; 1000 goto out_wait_freeze_timed_out; 1001 } 1002 blk_mq_update_nr_hw_queues(ctrl->ctrl.tagset, 1003 ctrl->ctrl.queue_count - 1); 1004 nvme_unfreeze(&ctrl->ctrl); 1005 } 1006 1007 return 0; 1008 1009 out_wait_freeze_timed_out: 1010 nvme_stop_queues(&ctrl->ctrl); 1011 nvme_sync_io_queues(&ctrl->ctrl); 1012 nvme_rdma_stop_io_queues(ctrl); 1013 out_cleanup_connect_q: 1014 nvme_cancel_tagset(&ctrl->ctrl); 1015 if (new) 1016 blk_cleanup_queue(ctrl->ctrl.connect_q); 1017 out_free_tag_set: 1018 if (new) 1019 blk_mq_free_tag_set(ctrl->ctrl.tagset); 1020 out_free_io_queues: 1021 nvme_rdma_free_io_queues(ctrl); 1022 return ret; 1023 } 1024 1025 static void nvme_rdma_teardown_admin_queue(struct nvme_rdma_ctrl *ctrl, 1026 bool remove) 1027 { 1028 blk_mq_quiesce_queue(ctrl->ctrl.admin_q); 1029 blk_sync_queue(ctrl->ctrl.admin_q); 1030 nvme_rdma_stop_queue(&ctrl->queues[0]); 1031 nvme_cancel_admin_tagset(&ctrl->ctrl); 1032 if (remove) 1033 blk_mq_unquiesce_queue(ctrl->ctrl.admin_q); 1034 nvme_rdma_destroy_admin_queue(ctrl, remove); 1035 } 1036 1037 static void nvme_rdma_teardown_io_queues(struct nvme_rdma_ctrl *ctrl, 1038 bool remove) 1039 { 1040 if (ctrl->ctrl.queue_count > 1) { 1041 nvme_start_freeze(&ctrl->ctrl); 1042 nvme_stop_queues(&ctrl->ctrl); 1043 nvme_sync_io_queues(&ctrl->ctrl); 1044 nvme_rdma_stop_io_queues(ctrl); 1045 nvme_cancel_tagset(&ctrl->ctrl); 1046 if (remove) 1047 nvme_start_queues(&ctrl->ctrl); 1048 nvme_rdma_destroy_io_queues(ctrl, remove); 1049 } 1050 } 1051 1052 static void nvme_rdma_free_ctrl(struct nvme_ctrl *nctrl) 1053 { 1054 struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(nctrl); 1055 1056 if (list_empty(&ctrl->list)) 1057 goto free_ctrl; 1058 1059 mutex_lock(&nvme_rdma_ctrl_mutex); 1060 list_del(&ctrl->list); 1061 mutex_unlock(&nvme_rdma_ctrl_mutex); 1062 1063 nvmf_free_options(nctrl->opts); 1064 free_ctrl: 1065 kfree(ctrl->queues); 1066 kfree(ctrl); 1067 } 1068 1069 static void nvme_rdma_reconnect_or_remove(struct nvme_rdma_ctrl *ctrl) 1070 { 1071 /* If we are resetting/deleting then do nothing */ 1072 if (ctrl->ctrl.state != NVME_CTRL_CONNECTING) { 1073 WARN_ON_ONCE(ctrl->ctrl.state == NVME_CTRL_NEW || 1074 ctrl->ctrl.state == NVME_CTRL_LIVE); 1075 return; 1076 } 1077 1078 if (nvmf_should_reconnect(&ctrl->ctrl)) { 1079 dev_info(ctrl->ctrl.device, "Reconnecting in %d seconds...\n", 1080 ctrl->ctrl.opts->reconnect_delay); 1081 queue_delayed_work(nvme_wq, &ctrl->reconnect_work, 1082 ctrl->ctrl.opts->reconnect_delay * HZ); 1083 } else { 1084 nvme_delete_ctrl(&ctrl->ctrl); 1085 } 1086 } 1087 1088 static int nvme_rdma_setup_ctrl(struct nvme_rdma_ctrl *ctrl, bool new) 1089 { 1090 int ret = -EINVAL; 1091 bool changed; 1092 1093 ret = nvme_rdma_configure_admin_queue(ctrl, new); 1094 if (ret) 1095 return ret; 1096 1097 if (ctrl->ctrl.icdoff) { 1098 dev_err(ctrl->ctrl.device, "icdoff is not supported!\n"); 1099 goto destroy_admin; 1100 } 1101 1102 if (!(ctrl->ctrl.sgls & (1 << 2))) { 1103 dev_err(ctrl->ctrl.device, 1104 "Mandatory keyed sgls are not supported!\n"); 1105 goto destroy_admin; 1106 } 1107 1108 if (ctrl->ctrl.opts->queue_size > ctrl->ctrl.sqsize + 1) { 1109 dev_warn(ctrl->ctrl.device, 1110 "queue_size %zu > ctrl sqsize %u, clamping down\n", 1111 ctrl->ctrl.opts->queue_size, ctrl->ctrl.sqsize + 1); 1112 } 1113 1114 if (ctrl->ctrl.sqsize + 1 > ctrl->ctrl.maxcmd) { 1115 dev_warn(ctrl->ctrl.device, 1116 "sqsize %u > ctrl maxcmd %u, clamping down\n", 1117 ctrl->ctrl.sqsize + 1, ctrl->ctrl.maxcmd); 1118 ctrl->ctrl.sqsize = ctrl->ctrl.maxcmd - 1; 1119 } 1120 1121 if (ctrl->ctrl.sgls & (1 << 20)) 1122 ctrl->use_inline_data = true; 1123 1124 if (ctrl->ctrl.queue_count > 1) { 1125 ret = nvme_rdma_configure_io_queues(ctrl, new); 1126 if (ret) 1127 goto destroy_admin; 1128 } 1129 1130 changed = nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_LIVE); 1131 if (!changed) { 1132 /* 1133 * state change failure is ok if we started ctrl delete, 1134 * unless we're during creation of a new controller to 1135 * avoid races with teardown flow. 1136 */ 1137 WARN_ON_ONCE(ctrl->ctrl.state != NVME_CTRL_DELETING && 1138 ctrl->ctrl.state != NVME_CTRL_DELETING_NOIO); 1139 WARN_ON_ONCE(new); 1140 ret = -EINVAL; 1141 goto destroy_io; 1142 } 1143 1144 nvme_start_ctrl(&ctrl->ctrl); 1145 return 0; 1146 1147 destroy_io: 1148 if (ctrl->ctrl.queue_count > 1) { 1149 nvme_stop_queues(&ctrl->ctrl); 1150 nvme_sync_io_queues(&ctrl->ctrl); 1151 nvme_rdma_stop_io_queues(ctrl); 1152 nvme_cancel_tagset(&ctrl->ctrl); 1153 nvme_rdma_destroy_io_queues(ctrl, new); 1154 } 1155 destroy_admin: 1156 blk_mq_quiesce_queue(ctrl->ctrl.admin_q); 1157 blk_sync_queue(ctrl->ctrl.admin_q); 1158 nvme_rdma_stop_queue(&ctrl->queues[0]); 1159 nvme_cancel_admin_tagset(&ctrl->ctrl); 1160 nvme_rdma_destroy_admin_queue(ctrl, new); 1161 return ret; 1162 } 1163 1164 static void nvme_rdma_reconnect_ctrl_work(struct work_struct *work) 1165 { 1166 struct nvme_rdma_ctrl *ctrl = container_of(to_delayed_work(work), 1167 struct nvme_rdma_ctrl, reconnect_work); 1168 1169 ++ctrl->ctrl.nr_reconnects; 1170 1171 if (nvme_rdma_setup_ctrl(ctrl, false)) 1172 goto requeue; 1173 1174 dev_info(ctrl->ctrl.device, "Successfully reconnected (%d attempts)\n", 1175 ctrl->ctrl.nr_reconnects); 1176 1177 ctrl->ctrl.nr_reconnects = 0; 1178 1179 return; 1180 1181 requeue: 1182 dev_info(ctrl->ctrl.device, "Failed reconnect attempt %d\n", 1183 ctrl->ctrl.nr_reconnects); 1184 nvme_rdma_reconnect_or_remove(ctrl); 1185 } 1186 1187 static void nvme_rdma_error_recovery_work(struct work_struct *work) 1188 { 1189 struct nvme_rdma_ctrl *ctrl = container_of(work, 1190 struct nvme_rdma_ctrl, err_work); 1191 1192 nvme_stop_keep_alive(&ctrl->ctrl); 1193 nvme_rdma_teardown_io_queues(ctrl, false); 1194 nvme_start_queues(&ctrl->ctrl); 1195 nvme_rdma_teardown_admin_queue(ctrl, false); 1196 blk_mq_unquiesce_queue(ctrl->ctrl.admin_q); 1197 1198 if (!nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_CONNECTING)) { 1199 /* state change failure is ok if we started ctrl delete */ 1200 WARN_ON_ONCE(ctrl->ctrl.state != NVME_CTRL_DELETING && 1201 ctrl->ctrl.state != NVME_CTRL_DELETING_NOIO); 1202 return; 1203 } 1204 1205 nvme_rdma_reconnect_or_remove(ctrl); 1206 } 1207 1208 static void nvme_rdma_error_recovery(struct nvme_rdma_ctrl *ctrl) 1209 { 1210 if (!nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_RESETTING)) 1211 return; 1212 1213 dev_warn(ctrl->ctrl.device, "starting error recovery\n"); 1214 queue_work(nvme_reset_wq, &ctrl->err_work); 1215 } 1216 1217 static void nvme_rdma_end_request(struct nvme_rdma_request *req) 1218 { 1219 struct request *rq = blk_mq_rq_from_pdu(req); 1220 1221 if (!refcount_dec_and_test(&req->ref)) 1222 return; 1223 if (!nvme_try_complete_req(rq, req->status, req->result)) 1224 nvme_rdma_complete_rq(rq); 1225 } 1226 1227 static void nvme_rdma_wr_error(struct ib_cq *cq, struct ib_wc *wc, 1228 const char *op) 1229 { 1230 struct nvme_rdma_queue *queue = wc->qp->qp_context; 1231 struct nvme_rdma_ctrl *ctrl = queue->ctrl; 1232 1233 if (ctrl->ctrl.state == NVME_CTRL_LIVE) 1234 dev_info(ctrl->ctrl.device, 1235 "%s for CQE 0x%p failed with status %s (%d)\n", 1236 op, wc->wr_cqe, 1237 ib_wc_status_msg(wc->status), wc->status); 1238 nvme_rdma_error_recovery(ctrl); 1239 } 1240 1241 static void nvme_rdma_memreg_done(struct ib_cq *cq, struct ib_wc *wc) 1242 { 1243 if (unlikely(wc->status != IB_WC_SUCCESS)) 1244 nvme_rdma_wr_error(cq, wc, "MEMREG"); 1245 } 1246 1247 static void nvme_rdma_inv_rkey_done(struct ib_cq *cq, struct ib_wc *wc) 1248 { 1249 struct nvme_rdma_request *req = 1250 container_of(wc->wr_cqe, struct nvme_rdma_request, reg_cqe); 1251 1252 if (unlikely(wc->status != IB_WC_SUCCESS)) 1253 nvme_rdma_wr_error(cq, wc, "LOCAL_INV"); 1254 else 1255 nvme_rdma_end_request(req); 1256 } 1257 1258 static int nvme_rdma_inv_rkey(struct nvme_rdma_queue *queue, 1259 struct nvme_rdma_request *req) 1260 { 1261 struct ib_send_wr wr = { 1262 .opcode = IB_WR_LOCAL_INV, 1263 .next = NULL, 1264 .num_sge = 0, 1265 .send_flags = IB_SEND_SIGNALED, 1266 .ex.invalidate_rkey = req->mr->rkey, 1267 }; 1268 1269 req->reg_cqe.done = nvme_rdma_inv_rkey_done; 1270 wr.wr_cqe = &req->reg_cqe; 1271 1272 return ib_post_send(queue->qp, &wr, NULL); 1273 } 1274 1275 static void nvme_rdma_unmap_data(struct nvme_rdma_queue *queue, 1276 struct request *rq) 1277 { 1278 struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); 1279 struct nvme_rdma_device *dev = queue->device; 1280 struct ib_device *ibdev = dev->dev; 1281 struct list_head *pool = &queue->qp->rdma_mrs; 1282 1283 if (!blk_rq_nr_phys_segments(rq)) 1284 return; 1285 1286 if (blk_integrity_rq(rq)) { 1287 ib_dma_unmap_sg(ibdev, req->metadata_sgl->sg_table.sgl, 1288 req->metadata_sgl->nents, rq_dma_dir(rq)); 1289 sg_free_table_chained(&req->metadata_sgl->sg_table, 1290 NVME_INLINE_METADATA_SG_CNT); 1291 } 1292 1293 if (req->use_sig_mr) 1294 pool = &queue->qp->sig_mrs; 1295 1296 if (req->mr) { 1297 ib_mr_pool_put(queue->qp, pool, req->mr); 1298 req->mr = NULL; 1299 } 1300 1301 ib_dma_unmap_sg(ibdev, req->data_sgl.sg_table.sgl, req->data_sgl.nents, 1302 rq_dma_dir(rq)); 1303 sg_free_table_chained(&req->data_sgl.sg_table, NVME_INLINE_SG_CNT); 1304 } 1305 1306 static int nvme_rdma_set_sg_null(struct nvme_command *c) 1307 { 1308 struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl; 1309 1310 sg->addr = 0; 1311 put_unaligned_le24(0, sg->length); 1312 put_unaligned_le32(0, sg->key); 1313 sg->type = NVME_KEY_SGL_FMT_DATA_DESC << 4; 1314 return 0; 1315 } 1316 1317 static int nvme_rdma_map_sg_inline(struct nvme_rdma_queue *queue, 1318 struct nvme_rdma_request *req, struct nvme_command *c, 1319 int count) 1320 { 1321 struct nvme_sgl_desc *sg = &c->common.dptr.sgl; 1322 struct scatterlist *sgl = req->data_sgl.sg_table.sgl; 1323 struct ib_sge *sge = &req->sge[1]; 1324 u32 len = 0; 1325 int i; 1326 1327 for (i = 0; i < count; i++, sgl++, sge++) { 1328 sge->addr = sg_dma_address(sgl); 1329 sge->length = sg_dma_len(sgl); 1330 sge->lkey = queue->device->pd->local_dma_lkey; 1331 len += sge->length; 1332 } 1333 1334 sg->addr = cpu_to_le64(queue->ctrl->ctrl.icdoff); 1335 sg->length = cpu_to_le32(len); 1336 sg->type = (NVME_SGL_FMT_DATA_DESC << 4) | NVME_SGL_FMT_OFFSET; 1337 1338 req->num_sge += count; 1339 return 0; 1340 } 1341 1342 static int nvme_rdma_map_sg_single(struct nvme_rdma_queue *queue, 1343 struct nvme_rdma_request *req, struct nvme_command *c) 1344 { 1345 struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl; 1346 1347 sg->addr = cpu_to_le64(sg_dma_address(req->data_sgl.sg_table.sgl)); 1348 put_unaligned_le24(sg_dma_len(req->data_sgl.sg_table.sgl), sg->length); 1349 put_unaligned_le32(queue->device->pd->unsafe_global_rkey, sg->key); 1350 sg->type = NVME_KEY_SGL_FMT_DATA_DESC << 4; 1351 return 0; 1352 } 1353 1354 static int nvme_rdma_map_sg_fr(struct nvme_rdma_queue *queue, 1355 struct nvme_rdma_request *req, struct nvme_command *c, 1356 int count) 1357 { 1358 struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl; 1359 int nr; 1360 1361 req->mr = ib_mr_pool_get(queue->qp, &queue->qp->rdma_mrs); 1362 if (WARN_ON_ONCE(!req->mr)) 1363 return -EAGAIN; 1364 1365 /* 1366 * Align the MR to a 4K page size to match the ctrl page size and 1367 * the block virtual boundary. 1368 */ 1369 nr = ib_map_mr_sg(req->mr, req->data_sgl.sg_table.sgl, count, NULL, 1370 SZ_4K); 1371 if (unlikely(nr < count)) { 1372 ib_mr_pool_put(queue->qp, &queue->qp->rdma_mrs, req->mr); 1373 req->mr = NULL; 1374 if (nr < 0) 1375 return nr; 1376 return -EINVAL; 1377 } 1378 1379 ib_update_fast_reg_key(req->mr, ib_inc_rkey(req->mr->rkey)); 1380 1381 req->reg_cqe.done = nvme_rdma_memreg_done; 1382 memset(&req->reg_wr, 0, sizeof(req->reg_wr)); 1383 req->reg_wr.wr.opcode = IB_WR_REG_MR; 1384 req->reg_wr.wr.wr_cqe = &req->reg_cqe; 1385 req->reg_wr.wr.num_sge = 0; 1386 req->reg_wr.mr = req->mr; 1387 req->reg_wr.key = req->mr->rkey; 1388 req->reg_wr.access = IB_ACCESS_LOCAL_WRITE | 1389 IB_ACCESS_REMOTE_READ | 1390 IB_ACCESS_REMOTE_WRITE; 1391 1392 sg->addr = cpu_to_le64(req->mr->iova); 1393 put_unaligned_le24(req->mr->length, sg->length); 1394 put_unaligned_le32(req->mr->rkey, sg->key); 1395 sg->type = (NVME_KEY_SGL_FMT_DATA_DESC << 4) | 1396 NVME_SGL_FMT_INVALIDATE; 1397 1398 return 0; 1399 } 1400 1401 static void nvme_rdma_set_sig_domain(struct blk_integrity *bi, 1402 struct nvme_command *cmd, struct ib_sig_domain *domain, 1403 u16 control, u8 pi_type) 1404 { 1405 domain->sig_type = IB_SIG_TYPE_T10_DIF; 1406 domain->sig.dif.bg_type = IB_T10DIF_CRC; 1407 domain->sig.dif.pi_interval = 1 << bi->interval_exp; 1408 domain->sig.dif.ref_tag = le32_to_cpu(cmd->rw.reftag); 1409 if (control & NVME_RW_PRINFO_PRCHK_REF) 1410 domain->sig.dif.ref_remap = true; 1411 1412 domain->sig.dif.app_tag = le16_to_cpu(cmd->rw.apptag); 1413 domain->sig.dif.apptag_check_mask = le16_to_cpu(cmd->rw.appmask); 1414 domain->sig.dif.app_escape = true; 1415 if (pi_type == NVME_NS_DPS_PI_TYPE3) 1416 domain->sig.dif.ref_escape = true; 1417 } 1418 1419 static void nvme_rdma_set_sig_attrs(struct blk_integrity *bi, 1420 struct nvme_command *cmd, struct ib_sig_attrs *sig_attrs, 1421 u8 pi_type) 1422 { 1423 u16 control = le16_to_cpu(cmd->rw.control); 1424 1425 memset(sig_attrs, 0, sizeof(*sig_attrs)); 1426 if (control & NVME_RW_PRINFO_PRACT) { 1427 /* for WRITE_INSERT/READ_STRIP no memory domain */ 1428 sig_attrs->mem.sig_type = IB_SIG_TYPE_NONE; 1429 nvme_rdma_set_sig_domain(bi, cmd, &sig_attrs->wire, control, 1430 pi_type); 1431 /* Clear the PRACT bit since HCA will generate/verify the PI */ 1432 control &= ~NVME_RW_PRINFO_PRACT; 1433 cmd->rw.control = cpu_to_le16(control); 1434 } else { 1435 /* for WRITE_PASS/READ_PASS both wire/memory domains exist */ 1436 nvme_rdma_set_sig_domain(bi, cmd, &sig_attrs->wire, control, 1437 pi_type); 1438 nvme_rdma_set_sig_domain(bi, cmd, &sig_attrs->mem, control, 1439 pi_type); 1440 } 1441 } 1442 1443 static void nvme_rdma_set_prot_checks(struct nvme_command *cmd, u8 *mask) 1444 { 1445 *mask = 0; 1446 if (le16_to_cpu(cmd->rw.control) & NVME_RW_PRINFO_PRCHK_REF) 1447 *mask |= IB_SIG_CHECK_REFTAG; 1448 if (le16_to_cpu(cmd->rw.control) & NVME_RW_PRINFO_PRCHK_GUARD) 1449 *mask |= IB_SIG_CHECK_GUARD; 1450 } 1451 1452 static void nvme_rdma_sig_done(struct ib_cq *cq, struct ib_wc *wc) 1453 { 1454 if (unlikely(wc->status != IB_WC_SUCCESS)) 1455 nvme_rdma_wr_error(cq, wc, "SIG"); 1456 } 1457 1458 static int nvme_rdma_map_sg_pi(struct nvme_rdma_queue *queue, 1459 struct nvme_rdma_request *req, struct nvme_command *c, 1460 int count, int pi_count) 1461 { 1462 struct nvme_rdma_sgl *sgl = &req->data_sgl; 1463 struct ib_reg_wr *wr = &req->reg_wr; 1464 struct request *rq = blk_mq_rq_from_pdu(req); 1465 struct nvme_ns *ns = rq->q->queuedata; 1466 struct bio *bio = rq->bio; 1467 struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl; 1468 int nr; 1469 1470 req->mr = ib_mr_pool_get(queue->qp, &queue->qp->sig_mrs); 1471 if (WARN_ON_ONCE(!req->mr)) 1472 return -EAGAIN; 1473 1474 nr = ib_map_mr_sg_pi(req->mr, sgl->sg_table.sgl, count, NULL, 1475 req->metadata_sgl->sg_table.sgl, pi_count, NULL, 1476 SZ_4K); 1477 if (unlikely(nr)) 1478 goto mr_put; 1479 1480 nvme_rdma_set_sig_attrs(blk_get_integrity(bio->bi_bdev->bd_disk), c, 1481 req->mr->sig_attrs, ns->pi_type); 1482 nvme_rdma_set_prot_checks(c, &req->mr->sig_attrs->check_mask); 1483 1484 ib_update_fast_reg_key(req->mr, ib_inc_rkey(req->mr->rkey)); 1485 1486 req->reg_cqe.done = nvme_rdma_sig_done; 1487 memset(wr, 0, sizeof(*wr)); 1488 wr->wr.opcode = IB_WR_REG_MR_INTEGRITY; 1489 wr->wr.wr_cqe = &req->reg_cqe; 1490 wr->wr.num_sge = 0; 1491 wr->wr.send_flags = 0; 1492 wr->mr = req->mr; 1493 wr->key = req->mr->rkey; 1494 wr->access = IB_ACCESS_LOCAL_WRITE | 1495 IB_ACCESS_REMOTE_READ | 1496 IB_ACCESS_REMOTE_WRITE; 1497 1498 sg->addr = cpu_to_le64(req->mr->iova); 1499 put_unaligned_le24(req->mr->length, sg->length); 1500 put_unaligned_le32(req->mr->rkey, sg->key); 1501 sg->type = NVME_KEY_SGL_FMT_DATA_DESC << 4; 1502 1503 return 0; 1504 1505 mr_put: 1506 ib_mr_pool_put(queue->qp, &queue->qp->sig_mrs, req->mr); 1507 req->mr = NULL; 1508 if (nr < 0) 1509 return nr; 1510 return -EINVAL; 1511 } 1512 1513 static int nvme_rdma_map_data(struct nvme_rdma_queue *queue, 1514 struct request *rq, struct nvme_command *c) 1515 { 1516 struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); 1517 struct nvme_rdma_device *dev = queue->device; 1518 struct ib_device *ibdev = dev->dev; 1519 int pi_count = 0; 1520 int count, ret; 1521 1522 req->num_sge = 1; 1523 refcount_set(&req->ref, 2); /* send and recv completions */ 1524 1525 c->common.flags |= NVME_CMD_SGL_METABUF; 1526 1527 if (!blk_rq_nr_phys_segments(rq)) 1528 return nvme_rdma_set_sg_null(c); 1529 1530 req->data_sgl.sg_table.sgl = (struct scatterlist *)(req + 1); 1531 ret = sg_alloc_table_chained(&req->data_sgl.sg_table, 1532 blk_rq_nr_phys_segments(rq), req->data_sgl.sg_table.sgl, 1533 NVME_INLINE_SG_CNT); 1534 if (ret) 1535 return -ENOMEM; 1536 1537 req->data_sgl.nents = blk_rq_map_sg(rq->q, rq, 1538 req->data_sgl.sg_table.sgl); 1539 1540 count = ib_dma_map_sg(ibdev, req->data_sgl.sg_table.sgl, 1541 req->data_sgl.nents, rq_dma_dir(rq)); 1542 if (unlikely(count <= 0)) { 1543 ret = -EIO; 1544 goto out_free_table; 1545 } 1546 1547 if (blk_integrity_rq(rq)) { 1548 req->metadata_sgl->sg_table.sgl = 1549 (struct scatterlist *)(req->metadata_sgl + 1); 1550 ret = sg_alloc_table_chained(&req->metadata_sgl->sg_table, 1551 blk_rq_count_integrity_sg(rq->q, rq->bio), 1552 req->metadata_sgl->sg_table.sgl, 1553 NVME_INLINE_METADATA_SG_CNT); 1554 if (unlikely(ret)) { 1555 ret = -ENOMEM; 1556 goto out_unmap_sg; 1557 } 1558 1559 req->metadata_sgl->nents = blk_rq_map_integrity_sg(rq->q, 1560 rq->bio, req->metadata_sgl->sg_table.sgl); 1561 pi_count = ib_dma_map_sg(ibdev, 1562 req->metadata_sgl->sg_table.sgl, 1563 req->metadata_sgl->nents, 1564 rq_dma_dir(rq)); 1565 if (unlikely(pi_count <= 0)) { 1566 ret = -EIO; 1567 goto out_free_pi_table; 1568 } 1569 } 1570 1571 if (req->use_sig_mr) { 1572 ret = nvme_rdma_map_sg_pi(queue, req, c, count, pi_count); 1573 goto out; 1574 } 1575 1576 if (count <= dev->num_inline_segments) { 1577 if (rq_data_dir(rq) == WRITE && nvme_rdma_queue_idx(queue) && 1578 queue->ctrl->use_inline_data && 1579 blk_rq_payload_bytes(rq) <= 1580 nvme_rdma_inline_data_size(queue)) { 1581 ret = nvme_rdma_map_sg_inline(queue, req, c, count); 1582 goto out; 1583 } 1584 1585 if (count == 1 && dev->pd->flags & IB_PD_UNSAFE_GLOBAL_RKEY) { 1586 ret = nvme_rdma_map_sg_single(queue, req, c); 1587 goto out; 1588 } 1589 } 1590 1591 ret = nvme_rdma_map_sg_fr(queue, req, c, count); 1592 out: 1593 if (unlikely(ret)) 1594 goto out_unmap_pi_sg; 1595 1596 return 0; 1597 1598 out_unmap_pi_sg: 1599 if (blk_integrity_rq(rq)) 1600 ib_dma_unmap_sg(ibdev, req->metadata_sgl->sg_table.sgl, 1601 req->metadata_sgl->nents, rq_dma_dir(rq)); 1602 out_free_pi_table: 1603 if (blk_integrity_rq(rq)) 1604 sg_free_table_chained(&req->metadata_sgl->sg_table, 1605 NVME_INLINE_METADATA_SG_CNT); 1606 out_unmap_sg: 1607 ib_dma_unmap_sg(ibdev, req->data_sgl.sg_table.sgl, req->data_sgl.nents, 1608 rq_dma_dir(rq)); 1609 out_free_table: 1610 sg_free_table_chained(&req->data_sgl.sg_table, NVME_INLINE_SG_CNT); 1611 return ret; 1612 } 1613 1614 static void nvme_rdma_send_done(struct ib_cq *cq, struct ib_wc *wc) 1615 { 1616 struct nvme_rdma_qe *qe = 1617 container_of(wc->wr_cqe, struct nvme_rdma_qe, cqe); 1618 struct nvme_rdma_request *req = 1619 container_of(qe, struct nvme_rdma_request, sqe); 1620 1621 if (unlikely(wc->status != IB_WC_SUCCESS)) 1622 nvme_rdma_wr_error(cq, wc, "SEND"); 1623 else 1624 nvme_rdma_end_request(req); 1625 } 1626 1627 static int nvme_rdma_post_send(struct nvme_rdma_queue *queue, 1628 struct nvme_rdma_qe *qe, struct ib_sge *sge, u32 num_sge, 1629 struct ib_send_wr *first) 1630 { 1631 struct ib_send_wr wr; 1632 int ret; 1633 1634 sge->addr = qe->dma; 1635 sge->length = sizeof(struct nvme_command); 1636 sge->lkey = queue->device->pd->local_dma_lkey; 1637 1638 wr.next = NULL; 1639 wr.wr_cqe = &qe->cqe; 1640 wr.sg_list = sge; 1641 wr.num_sge = num_sge; 1642 wr.opcode = IB_WR_SEND; 1643 wr.send_flags = IB_SEND_SIGNALED; 1644 1645 if (first) 1646 first->next = ≀ 1647 else 1648 first = ≀ 1649 1650 ret = ib_post_send(queue->qp, first, NULL); 1651 if (unlikely(ret)) { 1652 dev_err(queue->ctrl->ctrl.device, 1653 "%s failed with error code %d\n", __func__, ret); 1654 } 1655 return ret; 1656 } 1657 1658 static int nvme_rdma_post_recv(struct nvme_rdma_queue *queue, 1659 struct nvme_rdma_qe *qe) 1660 { 1661 struct ib_recv_wr wr; 1662 struct ib_sge list; 1663 int ret; 1664 1665 list.addr = qe->dma; 1666 list.length = sizeof(struct nvme_completion); 1667 list.lkey = queue->device->pd->local_dma_lkey; 1668 1669 qe->cqe.done = nvme_rdma_recv_done; 1670 1671 wr.next = NULL; 1672 wr.wr_cqe = &qe->cqe; 1673 wr.sg_list = &list; 1674 wr.num_sge = 1; 1675 1676 ret = ib_post_recv(queue->qp, &wr, NULL); 1677 if (unlikely(ret)) { 1678 dev_err(queue->ctrl->ctrl.device, 1679 "%s failed with error code %d\n", __func__, ret); 1680 } 1681 return ret; 1682 } 1683 1684 static struct blk_mq_tags *nvme_rdma_tagset(struct nvme_rdma_queue *queue) 1685 { 1686 u32 queue_idx = nvme_rdma_queue_idx(queue); 1687 1688 if (queue_idx == 0) 1689 return queue->ctrl->admin_tag_set.tags[queue_idx]; 1690 return queue->ctrl->tag_set.tags[queue_idx - 1]; 1691 } 1692 1693 static void nvme_rdma_async_done(struct ib_cq *cq, struct ib_wc *wc) 1694 { 1695 if (unlikely(wc->status != IB_WC_SUCCESS)) 1696 nvme_rdma_wr_error(cq, wc, "ASYNC"); 1697 } 1698 1699 static void nvme_rdma_submit_async_event(struct nvme_ctrl *arg) 1700 { 1701 struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(arg); 1702 struct nvme_rdma_queue *queue = &ctrl->queues[0]; 1703 struct ib_device *dev = queue->device->dev; 1704 struct nvme_rdma_qe *sqe = &ctrl->async_event_sqe; 1705 struct nvme_command *cmd = sqe->data; 1706 struct ib_sge sge; 1707 int ret; 1708 1709 ib_dma_sync_single_for_cpu(dev, sqe->dma, sizeof(*cmd), DMA_TO_DEVICE); 1710 1711 memset(cmd, 0, sizeof(*cmd)); 1712 cmd->common.opcode = nvme_admin_async_event; 1713 cmd->common.command_id = NVME_AQ_BLK_MQ_DEPTH; 1714 cmd->common.flags |= NVME_CMD_SGL_METABUF; 1715 nvme_rdma_set_sg_null(cmd); 1716 1717 sqe->cqe.done = nvme_rdma_async_done; 1718 1719 ib_dma_sync_single_for_device(dev, sqe->dma, sizeof(*cmd), 1720 DMA_TO_DEVICE); 1721 1722 ret = nvme_rdma_post_send(queue, sqe, &sge, 1, NULL); 1723 WARN_ON_ONCE(ret); 1724 } 1725 1726 static void nvme_rdma_process_nvme_rsp(struct nvme_rdma_queue *queue, 1727 struct nvme_completion *cqe, struct ib_wc *wc) 1728 { 1729 struct request *rq; 1730 struct nvme_rdma_request *req; 1731 1732 rq = blk_mq_tag_to_rq(nvme_rdma_tagset(queue), cqe->command_id); 1733 if (!rq) { 1734 dev_err(queue->ctrl->ctrl.device, 1735 "tag 0x%x on QP %#x not found\n", 1736 cqe->command_id, queue->qp->qp_num); 1737 nvme_rdma_error_recovery(queue->ctrl); 1738 return; 1739 } 1740 req = blk_mq_rq_to_pdu(rq); 1741 1742 req->status = cqe->status; 1743 req->result = cqe->result; 1744 1745 if (wc->wc_flags & IB_WC_WITH_INVALIDATE) { 1746 if (unlikely(!req->mr || 1747 wc->ex.invalidate_rkey != req->mr->rkey)) { 1748 dev_err(queue->ctrl->ctrl.device, 1749 "Bogus remote invalidation for rkey %#x\n", 1750 req->mr ? req->mr->rkey : 0); 1751 nvme_rdma_error_recovery(queue->ctrl); 1752 } 1753 } else if (req->mr) { 1754 int ret; 1755 1756 ret = nvme_rdma_inv_rkey(queue, req); 1757 if (unlikely(ret < 0)) { 1758 dev_err(queue->ctrl->ctrl.device, 1759 "Queueing INV WR for rkey %#x failed (%d)\n", 1760 req->mr->rkey, ret); 1761 nvme_rdma_error_recovery(queue->ctrl); 1762 } 1763 /* the local invalidation completion will end the request */ 1764 return; 1765 } 1766 1767 nvme_rdma_end_request(req); 1768 } 1769 1770 static void nvme_rdma_recv_done(struct ib_cq *cq, struct ib_wc *wc) 1771 { 1772 struct nvme_rdma_qe *qe = 1773 container_of(wc->wr_cqe, struct nvme_rdma_qe, cqe); 1774 struct nvme_rdma_queue *queue = wc->qp->qp_context; 1775 struct ib_device *ibdev = queue->device->dev; 1776 struct nvme_completion *cqe = qe->data; 1777 const size_t len = sizeof(struct nvme_completion); 1778 1779 if (unlikely(wc->status != IB_WC_SUCCESS)) { 1780 nvme_rdma_wr_error(cq, wc, "RECV"); 1781 return; 1782 } 1783 1784 /* sanity checking for received data length */ 1785 if (unlikely(wc->byte_len < len)) { 1786 dev_err(queue->ctrl->ctrl.device, 1787 "Unexpected nvme completion length(%d)\n", wc->byte_len); 1788 nvme_rdma_error_recovery(queue->ctrl); 1789 return; 1790 } 1791 1792 ib_dma_sync_single_for_cpu(ibdev, qe->dma, len, DMA_FROM_DEVICE); 1793 /* 1794 * AEN requests are special as they don't time out and can 1795 * survive any kind of queue freeze and often don't respond to 1796 * aborts. We don't even bother to allocate a struct request 1797 * for them but rather special case them here. 1798 */ 1799 if (unlikely(nvme_is_aen_req(nvme_rdma_queue_idx(queue), 1800 cqe->command_id))) 1801 nvme_complete_async_event(&queue->ctrl->ctrl, cqe->status, 1802 &cqe->result); 1803 else 1804 nvme_rdma_process_nvme_rsp(queue, cqe, wc); 1805 ib_dma_sync_single_for_device(ibdev, qe->dma, len, DMA_FROM_DEVICE); 1806 1807 nvme_rdma_post_recv(queue, qe); 1808 } 1809 1810 static int nvme_rdma_conn_established(struct nvme_rdma_queue *queue) 1811 { 1812 int ret, i; 1813 1814 for (i = 0; i < queue->queue_size; i++) { 1815 ret = nvme_rdma_post_recv(queue, &queue->rsp_ring[i]); 1816 if (ret) 1817 goto out_destroy_queue_ib; 1818 } 1819 1820 return 0; 1821 1822 out_destroy_queue_ib: 1823 nvme_rdma_destroy_queue_ib(queue); 1824 return ret; 1825 } 1826 1827 static int nvme_rdma_conn_rejected(struct nvme_rdma_queue *queue, 1828 struct rdma_cm_event *ev) 1829 { 1830 struct rdma_cm_id *cm_id = queue->cm_id; 1831 int status = ev->status; 1832 const char *rej_msg; 1833 const struct nvme_rdma_cm_rej *rej_data; 1834 u8 rej_data_len; 1835 1836 rej_msg = rdma_reject_msg(cm_id, status); 1837 rej_data = rdma_consumer_reject_data(cm_id, ev, &rej_data_len); 1838 1839 if (rej_data && rej_data_len >= sizeof(u16)) { 1840 u16 sts = le16_to_cpu(rej_data->sts); 1841 1842 dev_err(queue->ctrl->ctrl.device, 1843 "Connect rejected: status %d (%s) nvme status %d (%s).\n", 1844 status, rej_msg, sts, nvme_rdma_cm_msg(sts)); 1845 } else { 1846 dev_err(queue->ctrl->ctrl.device, 1847 "Connect rejected: status %d (%s).\n", status, rej_msg); 1848 } 1849 1850 return -ECONNRESET; 1851 } 1852 1853 static int nvme_rdma_addr_resolved(struct nvme_rdma_queue *queue) 1854 { 1855 struct nvme_ctrl *ctrl = &queue->ctrl->ctrl; 1856 int ret; 1857 1858 ret = nvme_rdma_create_queue_ib(queue); 1859 if (ret) 1860 return ret; 1861 1862 if (ctrl->opts->tos >= 0) 1863 rdma_set_service_type(queue->cm_id, ctrl->opts->tos); 1864 ret = rdma_resolve_route(queue->cm_id, NVME_RDMA_CONNECT_TIMEOUT_MS); 1865 if (ret) { 1866 dev_err(ctrl->device, "rdma_resolve_route failed (%d).\n", 1867 queue->cm_error); 1868 goto out_destroy_queue; 1869 } 1870 1871 return 0; 1872 1873 out_destroy_queue: 1874 nvme_rdma_destroy_queue_ib(queue); 1875 return ret; 1876 } 1877 1878 static int nvme_rdma_route_resolved(struct nvme_rdma_queue *queue) 1879 { 1880 struct nvme_rdma_ctrl *ctrl = queue->ctrl; 1881 struct rdma_conn_param param = { }; 1882 struct nvme_rdma_cm_req priv = { }; 1883 int ret; 1884 1885 param.qp_num = queue->qp->qp_num; 1886 param.flow_control = 1; 1887 1888 param.responder_resources = queue->device->dev->attrs.max_qp_rd_atom; 1889 /* maximum retry count */ 1890 param.retry_count = 7; 1891 param.rnr_retry_count = 7; 1892 param.private_data = &priv; 1893 param.private_data_len = sizeof(priv); 1894 1895 priv.recfmt = cpu_to_le16(NVME_RDMA_CM_FMT_1_0); 1896 priv.qid = cpu_to_le16(nvme_rdma_queue_idx(queue)); 1897 /* 1898 * set the admin queue depth to the minimum size 1899 * specified by the Fabrics standard. 1900 */ 1901 if (priv.qid == 0) { 1902 priv.hrqsize = cpu_to_le16(NVME_AQ_DEPTH); 1903 priv.hsqsize = cpu_to_le16(NVME_AQ_DEPTH - 1); 1904 } else { 1905 /* 1906 * current interpretation of the fabrics spec 1907 * is at minimum you make hrqsize sqsize+1, or a 1908 * 1's based representation of sqsize. 1909 */ 1910 priv.hrqsize = cpu_to_le16(queue->queue_size); 1911 priv.hsqsize = cpu_to_le16(queue->ctrl->ctrl.sqsize); 1912 } 1913 1914 ret = rdma_connect_locked(queue->cm_id, ¶m); 1915 if (ret) { 1916 dev_err(ctrl->ctrl.device, 1917 "rdma_connect_locked failed (%d).\n", ret); 1918 goto out_destroy_queue_ib; 1919 } 1920 1921 return 0; 1922 1923 out_destroy_queue_ib: 1924 nvme_rdma_destroy_queue_ib(queue); 1925 return ret; 1926 } 1927 1928 static int nvme_rdma_cm_handler(struct rdma_cm_id *cm_id, 1929 struct rdma_cm_event *ev) 1930 { 1931 struct nvme_rdma_queue *queue = cm_id->context; 1932 int cm_error = 0; 1933 1934 dev_dbg(queue->ctrl->ctrl.device, "%s (%d): status %d id %p\n", 1935 rdma_event_msg(ev->event), ev->event, 1936 ev->status, cm_id); 1937 1938 switch (ev->event) { 1939 case RDMA_CM_EVENT_ADDR_RESOLVED: 1940 cm_error = nvme_rdma_addr_resolved(queue); 1941 break; 1942 case RDMA_CM_EVENT_ROUTE_RESOLVED: 1943 cm_error = nvme_rdma_route_resolved(queue); 1944 break; 1945 case RDMA_CM_EVENT_ESTABLISHED: 1946 queue->cm_error = nvme_rdma_conn_established(queue); 1947 /* complete cm_done regardless of success/failure */ 1948 complete(&queue->cm_done); 1949 return 0; 1950 case RDMA_CM_EVENT_REJECTED: 1951 cm_error = nvme_rdma_conn_rejected(queue, ev); 1952 break; 1953 case RDMA_CM_EVENT_ROUTE_ERROR: 1954 case RDMA_CM_EVENT_CONNECT_ERROR: 1955 case RDMA_CM_EVENT_UNREACHABLE: 1956 nvme_rdma_destroy_queue_ib(queue); 1957 fallthrough; 1958 case RDMA_CM_EVENT_ADDR_ERROR: 1959 dev_dbg(queue->ctrl->ctrl.device, 1960 "CM error event %d\n", ev->event); 1961 cm_error = -ECONNRESET; 1962 break; 1963 case RDMA_CM_EVENT_DISCONNECTED: 1964 case RDMA_CM_EVENT_ADDR_CHANGE: 1965 case RDMA_CM_EVENT_TIMEWAIT_EXIT: 1966 dev_dbg(queue->ctrl->ctrl.device, 1967 "disconnect received - connection closed\n"); 1968 nvme_rdma_error_recovery(queue->ctrl); 1969 break; 1970 case RDMA_CM_EVENT_DEVICE_REMOVAL: 1971 /* device removal is handled via the ib_client API */ 1972 break; 1973 default: 1974 dev_err(queue->ctrl->ctrl.device, 1975 "Unexpected RDMA CM event (%d)\n", ev->event); 1976 nvme_rdma_error_recovery(queue->ctrl); 1977 break; 1978 } 1979 1980 if (cm_error) { 1981 queue->cm_error = cm_error; 1982 complete(&queue->cm_done); 1983 } 1984 1985 return 0; 1986 } 1987 1988 static void nvme_rdma_complete_timed_out(struct request *rq) 1989 { 1990 struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); 1991 struct nvme_rdma_queue *queue = req->queue; 1992 1993 nvme_rdma_stop_queue(queue); 1994 if (blk_mq_request_started(rq) && !blk_mq_request_completed(rq)) { 1995 nvme_req(rq)->status = NVME_SC_HOST_ABORTED_CMD; 1996 blk_mq_complete_request(rq); 1997 } 1998 } 1999 2000 static enum blk_eh_timer_return 2001 nvme_rdma_timeout(struct request *rq, bool reserved) 2002 { 2003 struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); 2004 struct nvme_rdma_queue *queue = req->queue; 2005 struct nvme_rdma_ctrl *ctrl = queue->ctrl; 2006 2007 dev_warn(ctrl->ctrl.device, "I/O %d QID %d timeout\n", 2008 rq->tag, nvme_rdma_queue_idx(queue)); 2009 2010 if (ctrl->ctrl.state != NVME_CTRL_LIVE) { 2011 /* 2012 * If we are resetting, connecting or deleting we should 2013 * complete immediately because we may block controller 2014 * teardown or setup sequence 2015 * - ctrl disable/shutdown fabrics requests 2016 * - connect requests 2017 * - initialization admin requests 2018 * - I/O requests that entered after unquiescing and 2019 * the controller stopped responding 2020 * 2021 * All other requests should be cancelled by the error 2022 * recovery work, so it's fine that we fail it here. 2023 */ 2024 nvme_rdma_complete_timed_out(rq); 2025 return BLK_EH_DONE; 2026 } 2027 2028 /* 2029 * LIVE state should trigger the normal error recovery which will 2030 * handle completing this request. 2031 */ 2032 nvme_rdma_error_recovery(ctrl); 2033 return BLK_EH_RESET_TIMER; 2034 } 2035 2036 static blk_status_t nvme_rdma_queue_rq(struct blk_mq_hw_ctx *hctx, 2037 const struct blk_mq_queue_data *bd) 2038 { 2039 struct nvme_ns *ns = hctx->queue->queuedata; 2040 struct nvme_rdma_queue *queue = hctx->driver_data; 2041 struct request *rq = bd->rq; 2042 struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); 2043 struct nvme_rdma_qe *sqe = &req->sqe; 2044 struct nvme_command *c = sqe->data; 2045 struct ib_device *dev; 2046 bool queue_ready = test_bit(NVME_RDMA_Q_LIVE, &queue->flags); 2047 blk_status_t ret; 2048 int err; 2049 2050 WARN_ON_ONCE(rq->tag < 0); 2051 2052 if (!nvmf_check_ready(&queue->ctrl->ctrl, rq, queue_ready)) 2053 return nvmf_fail_nonready_command(&queue->ctrl->ctrl, rq); 2054 2055 dev = queue->device->dev; 2056 2057 req->sqe.dma = ib_dma_map_single(dev, req->sqe.data, 2058 sizeof(struct nvme_command), 2059 DMA_TO_DEVICE); 2060 err = ib_dma_mapping_error(dev, req->sqe.dma); 2061 if (unlikely(err)) 2062 return BLK_STS_RESOURCE; 2063 2064 ib_dma_sync_single_for_cpu(dev, sqe->dma, 2065 sizeof(struct nvme_command), DMA_TO_DEVICE); 2066 2067 ret = nvme_setup_cmd(ns, rq, c); 2068 if (ret) 2069 goto unmap_qe; 2070 2071 blk_mq_start_request(rq); 2072 2073 if (IS_ENABLED(CONFIG_BLK_DEV_INTEGRITY) && 2074 queue->pi_support && 2075 (c->common.opcode == nvme_cmd_write || 2076 c->common.opcode == nvme_cmd_read) && 2077 nvme_ns_has_pi(ns)) 2078 req->use_sig_mr = true; 2079 else 2080 req->use_sig_mr = false; 2081 2082 err = nvme_rdma_map_data(queue, rq, c); 2083 if (unlikely(err < 0)) { 2084 dev_err(queue->ctrl->ctrl.device, 2085 "Failed to map data (%d)\n", err); 2086 goto err; 2087 } 2088 2089 sqe->cqe.done = nvme_rdma_send_done; 2090 2091 ib_dma_sync_single_for_device(dev, sqe->dma, 2092 sizeof(struct nvme_command), DMA_TO_DEVICE); 2093 2094 err = nvme_rdma_post_send(queue, sqe, req->sge, req->num_sge, 2095 req->mr ? &req->reg_wr.wr : NULL); 2096 if (unlikely(err)) 2097 goto err_unmap; 2098 2099 return BLK_STS_OK; 2100 2101 err_unmap: 2102 nvme_rdma_unmap_data(queue, rq); 2103 err: 2104 if (err == -EIO) 2105 ret = nvme_host_path_error(rq); 2106 else if (err == -ENOMEM || err == -EAGAIN) 2107 ret = BLK_STS_RESOURCE; 2108 else 2109 ret = BLK_STS_IOERR; 2110 nvme_cleanup_cmd(rq); 2111 unmap_qe: 2112 ib_dma_unmap_single(dev, req->sqe.dma, sizeof(struct nvme_command), 2113 DMA_TO_DEVICE); 2114 return ret; 2115 } 2116 2117 static int nvme_rdma_poll(struct blk_mq_hw_ctx *hctx) 2118 { 2119 struct nvme_rdma_queue *queue = hctx->driver_data; 2120 2121 return ib_process_cq_direct(queue->ib_cq, -1); 2122 } 2123 2124 static void nvme_rdma_check_pi_status(struct nvme_rdma_request *req) 2125 { 2126 struct request *rq = blk_mq_rq_from_pdu(req); 2127 struct ib_mr_status mr_status; 2128 int ret; 2129 2130 ret = ib_check_mr_status(req->mr, IB_MR_CHECK_SIG_STATUS, &mr_status); 2131 if (ret) { 2132 pr_err("ib_check_mr_status failed, ret %d\n", ret); 2133 nvme_req(rq)->status = NVME_SC_INVALID_PI; 2134 return; 2135 } 2136 2137 if (mr_status.fail_status & IB_MR_CHECK_SIG_STATUS) { 2138 switch (mr_status.sig_err.err_type) { 2139 case IB_SIG_BAD_GUARD: 2140 nvme_req(rq)->status = NVME_SC_GUARD_CHECK; 2141 break; 2142 case IB_SIG_BAD_REFTAG: 2143 nvme_req(rq)->status = NVME_SC_REFTAG_CHECK; 2144 break; 2145 case IB_SIG_BAD_APPTAG: 2146 nvme_req(rq)->status = NVME_SC_APPTAG_CHECK; 2147 break; 2148 } 2149 pr_err("PI error found type %d expected 0x%x vs actual 0x%x\n", 2150 mr_status.sig_err.err_type, mr_status.sig_err.expected, 2151 mr_status.sig_err.actual); 2152 } 2153 } 2154 2155 static void nvme_rdma_complete_rq(struct request *rq) 2156 { 2157 struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); 2158 struct nvme_rdma_queue *queue = req->queue; 2159 struct ib_device *ibdev = queue->device->dev; 2160 2161 if (req->use_sig_mr) 2162 nvme_rdma_check_pi_status(req); 2163 2164 nvme_rdma_unmap_data(queue, rq); 2165 ib_dma_unmap_single(ibdev, req->sqe.dma, sizeof(struct nvme_command), 2166 DMA_TO_DEVICE); 2167 nvme_complete_rq(rq); 2168 } 2169 2170 static int nvme_rdma_map_queues(struct blk_mq_tag_set *set) 2171 { 2172 struct nvme_rdma_ctrl *ctrl = set->driver_data; 2173 struct nvmf_ctrl_options *opts = ctrl->ctrl.opts; 2174 2175 if (opts->nr_write_queues && ctrl->io_queues[HCTX_TYPE_READ]) { 2176 /* separate read/write queues */ 2177 set->map[HCTX_TYPE_DEFAULT].nr_queues = 2178 ctrl->io_queues[HCTX_TYPE_DEFAULT]; 2179 set->map[HCTX_TYPE_DEFAULT].queue_offset = 0; 2180 set->map[HCTX_TYPE_READ].nr_queues = 2181 ctrl->io_queues[HCTX_TYPE_READ]; 2182 set->map[HCTX_TYPE_READ].queue_offset = 2183 ctrl->io_queues[HCTX_TYPE_DEFAULT]; 2184 } else { 2185 /* shared read/write queues */ 2186 set->map[HCTX_TYPE_DEFAULT].nr_queues = 2187 ctrl->io_queues[HCTX_TYPE_DEFAULT]; 2188 set->map[HCTX_TYPE_DEFAULT].queue_offset = 0; 2189 set->map[HCTX_TYPE_READ].nr_queues = 2190 ctrl->io_queues[HCTX_TYPE_DEFAULT]; 2191 set->map[HCTX_TYPE_READ].queue_offset = 0; 2192 } 2193 blk_mq_rdma_map_queues(&set->map[HCTX_TYPE_DEFAULT], 2194 ctrl->device->dev, 0); 2195 blk_mq_rdma_map_queues(&set->map[HCTX_TYPE_READ], 2196 ctrl->device->dev, 0); 2197 2198 if (opts->nr_poll_queues && ctrl->io_queues[HCTX_TYPE_POLL]) { 2199 /* map dedicated poll queues only if we have queues left */ 2200 set->map[HCTX_TYPE_POLL].nr_queues = 2201 ctrl->io_queues[HCTX_TYPE_POLL]; 2202 set->map[HCTX_TYPE_POLL].queue_offset = 2203 ctrl->io_queues[HCTX_TYPE_DEFAULT] + 2204 ctrl->io_queues[HCTX_TYPE_READ]; 2205 blk_mq_map_queues(&set->map[HCTX_TYPE_POLL]); 2206 } 2207 2208 dev_info(ctrl->ctrl.device, 2209 "mapped %d/%d/%d default/read/poll queues.\n", 2210 ctrl->io_queues[HCTX_TYPE_DEFAULT], 2211 ctrl->io_queues[HCTX_TYPE_READ], 2212 ctrl->io_queues[HCTX_TYPE_POLL]); 2213 2214 return 0; 2215 } 2216 2217 static const struct blk_mq_ops nvme_rdma_mq_ops = { 2218 .queue_rq = nvme_rdma_queue_rq, 2219 .complete = nvme_rdma_complete_rq, 2220 .init_request = nvme_rdma_init_request, 2221 .exit_request = nvme_rdma_exit_request, 2222 .init_hctx = nvme_rdma_init_hctx, 2223 .timeout = nvme_rdma_timeout, 2224 .map_queues = nvme_rdma_map_queues, 2225 .poll = nvme_rdma_poll, 2226 }; 2227 2228 static const struct blk_mq_ops nvme_rdma_admin_mq_ops = { 2229 .queue_rq = nvme_rdma_queue_rq, 2230 .complete = nvme_rdma_complete_rq, 2231 .init_request = nvme_rdma_init_request, 2232 .exit_request = nvme_rdma_exit_request, 2233 .init_hctx = nvme_rdma_init_admin_hctx, 2234 .timeout = nvme_rdma_timeout, 2235 }; 2236 2237 static void nvme_rdma_shutdown_ctrl(struct nvme_rdma_ctrl *ctrl, bool shutdown) 2238 { 2239 cancel_work_sync(&ctrl->err_work); 2240 cancel_delayed_work_sync(&ctrl->reconnect_work); 2241 2242 nvme_rdma_teardown_io_queues(ctrl, shutdown); 2243 blk_mq_quiesce_queue(ctrl->ctrl.admin_q); 2244 if (shutdown) 2245 nvme_shutdown_ctrl(&ctrl->ctrl); 2246 else 2247 nvme_disable_ctrl(&ctrl->ctrl); 2248 nvme_rdma_teardown_admin_queue(ctrl, shutdown); 2249 } 2250 2251 static void nvme_rdma_delete_ctrl(struct nvme_ctrl *ctrl) 2252 { 2253 nvme_rdma_shutdown_ctrl(to_rdma_ctrl(ctrl), true); 2254 } 2255 2256 static void nvme_rdma_reset_ctrl_work(struct work_struct *work) 2257 { 2258 struct nvme_rdma_ctrl *ctrl = 2259 container_of(work, struct nvme_rdma_ctrl, ctrl.reset_work); 2260 2261 nvme_stop_ctrl(&ctrl->ctrl); 2262 nvme_rdma_shutdown_ctrl(ctrl, false); 2263 2264 if (!nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_CONNECTING)) { 2265 /* state change failure should never happen */ 2266 WARN_ON_ONCE(1); 2267 return; 2268 } 2269 2270 if (nvme_rdma_setup_ctrl(ctrl, false)) 2271 goto out_fail; 2272 2273 return; 2274 2275 out_fail: 2276 ++ctrl->ctrl.nr_reconnects; 2277 nvme_rdma_reconnect_or_remove(ctrl); 2278 } 2279 2280 static const struct nvme_ctrl_ops nvme_rdma_ctrl_ops = { 2281 .name = "rdma", 2282 .module = THIS_MODULE, 2283 .flags = NVME_F_FABRICS | NVME_F_METADATA_SUPPORTED, 2284 .reg_read32 = nvmf_reg_read32, 2285 .reg_read64 = nvmf_reg_read64, 2286 .reg_write32 = nvmf_reg_write32, 2287 .free_ctrl = nvme_rdma_free_ctrl, 2288 .submit_async_event = nvme_rdma_submit_async_event, 2289 .delete_ctrl = nvme_rdma_delete_ctrl, 2290 .get_address = nvmf_get_address, 2291 }; 2292 2293 /* 2294 * Fails a connection request if it matches an existing controller 2295 * (association) with the same tuple: 2296 * <Host NQN, Host ID, local address, remote address, remote port, SUBSYS NQN> 2297 * 2298 * if local address is not specified in the request, it will match an 2299 * existing controller with all the other parameters the same and no 2300 * local port address specified as well. 2301 * 2302 * The ports don't need to be compared as they are intrinsically 2303 * already matched by the port pointers supplied. 2304 */ 2305 static bool 2306 nvme_rdma_existing_controller(struct nvmf_ctrl_options *opts) 2307 { 2308 struct nvme_rdma_ctrl *ctrl; 2309 bool found = false; 2310 2311 mutex_lock(&nvme_rdma_ctrl_mutex); 2312 list_for_each_entry(ctrl, &nvme_rdma_ctrl_list, list) { 2313 found = nvmf_ip_options_match(&ctrl->ctrl, opts); 2314 if (found) 2315 break; 2316 } 2317 mutex_unlock(&nvme_rdma_ctrl_mutex); 2318 2319 return found; 2320 } 2321 2322 static struct nvme_ctrl *nvme_rdma_create_ctrl(struct device *dev, 2323 struct nvmf_ctrl_options *opts) 2324 { 2325 struct nvme_rdma_ctrl *ctrl; 2326 int ret; 2327 bool changed; 2328 2329 ctrl = kzalloc(sizeof(*ctrl), GFP_KERNEL); 2330 if (!ctrl) 2331 return ERR_PTR(-ENOMEM); 2332 ctrl->ctrl.opts = opts; 2333 INIT_LIST_HEAD(&ctrl->list); 2334 2335 if (!(opts->mask & NVMF_OPT_TRSVCID)) { 2336 opts->trsvcid = 2337 kstrdup(__stringify(NVME_RDMA_IP_PORT), GFP_KERNEL); 2338 if (!opts->trsvcid) { 2339 ret = -ENOMEM; 2340 goto out_free_ctrl; 2341 } 2342 opts->mask |= NVMF_OPT_TRSVCID; 2343 } 2344 2345 ret = inet_pton_with_scope(&init_net, AF_UNSPEC, 2346 opts->traddr, opts->trsvcid, &ctrl->addr); 2347 if (ret) { 2348 pr_err("malformed address passed: %s:%s\n", 2349 opts->traddr, opts->trsvcid); 2350 goto out_free_ctrl; 2351 } 2352 2353 if (opts->mask & NVMF_OPT_HOST_TRADDR) { 2354 ret = inet_pton_with_scope(&init_net, AF_UNSPEC, 2355 opts->host_traddr, NULL, &ctrl->src_addr); 2356 if (ret) { 2357 pr_err("malformed src address passed: %s\n", 2358 opts->host_traddr); 2359 goto out_free_ctrl; 2360 } 2361 } 2362 2363 if (!opts->duplicate_connect && nvme_rdma_existing_controller(opts)) { 2364 ret = -EALREADY; 2365 goto out_free_ctrl; 2366 } 2367 2368 INIT_DELAYED_WORK(&ctrl->reconnect_work, 2369 nvme_rdma_reconnect_ctrl_work); 2370 INIT_WORK(&ctrl->err_work, nvme_rdma_error_recovery_work); 2371 INIT_WORK(&ctrl->ctrl.reset_work, nvme_rdma_reset_ctrl_work); 2372 2373 ctrl->ctrl.queue_count = opts->nr_io_queues + opts->nr_write_queues + 2374 opts->nr_poll_queues + 1; 2375 ctrl->ctrl.sqsize = opts->queue_size - 1; 2376 ctrl->ctrl.kato = opts->kato; 2377 2378 ret = -ENOMEM; 2379 ctrl->queues = kcalloc(ctrl->ctrl.queue_count, sizeof(*ctrl->queues), 2380 GFP_KERNEL); 2381 if (!ctrl->queues) 2382 goto out_free_ctrl; 2383 2384 ret = nvme_init_ctrl(&ctrl->ctrl, dev, &nvme_rdma_ctrl_ops, 2385 0 /* no quirks, we're perfect! */); 2386 if (ret) 2387 goto out_kfree_queues; 2388 2389 changed = nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_CONNECTING); 2390 WARN_ON_ONCE(!changed); 2391 2392 ret = nvme_rdma_setup_ctrl(ctrl, true); 2393 if (ret) 2394 goto out_uninit_ctrl; 2395 2396 dev_info(ctrl->ctrl.device, "new ctrl: NQN \"%s\", addr %pISpcs\n", 2397 ctrl->ctrl.opts->subsysnqn, &ctrl->addr); 2398 2399 mutex_lock(&nvme_rdma_ctrl_mutex); 2400 list_add_tail(&ctrl->list, &nvme_rdma_ctrl_list); 2401 mutex_unlock(&nvme_rdma_ctrl_mutex); 2402 2403 return &ctrl->ctrl; 2404 2405 out_uninit_ctrl: 2406 nvme_uninit_ctrl(&ctrl->ctrl); 2407 nvme_put_ctrl(&ctrl->ctrl); 2408 if (ret > 0) 2409 ret = -EIO; 2410 return ERR_PTR(ret); 2411 out_kfree_queues: 2412 kfree(ctrl->queues); 2413 out_free_ctrl: 2414 kfree(ctrl); 2415 return ERR_PTR(ret); 2416 } 2417 2418 static struct nvmf_transport_ops nvme_rdma_transport = { 2419 .name = "rdma", 2420 .module = THIS_MODULE, 2421 .required_opts = NVMF_OPT_TRADDR, 2422 .allowed_opts = NVMF_OPT_TRSVCID | NVMF_OPT_RECONNECT_DELAY | 2423 NVMF_OPT_HOST_TRADDR | NVMF_OPT_CTRL_LOSS_TMO | 2424 NVMF_OPT_NR_WRITE_QUEUES | NVMF_OPT_NR_POLL_QUEUES | 2425 NVMF_OPT_TOS, 2426 .create_ctrl = nvme_rdma_create_ctrl, 2427 }; 2428 2429 static void nvme_rdma_remove_one(struct ib_device *ib_device, void *client_data) 2430 { 2431 struct nvme_rdma_ctrl *ctrl; 2432 struct nvme_rdma_device *ndev; 2433 bool found = false; 2434 2435 mutex_lock(&device_list_mutex); 2436 list_for_each_entry(ndev, &device_list, entry) { 2437 if (ndev->dev == ib_device) { 2438 found = true; 2439 break; 2440 } 2441 } 2442 mutex_unlock(&device_list_mutex); 2443 2444 if (!found) 2445 return; 2446 2447 /* Delete all controllers using this device */ 2448 mutex_lock(&nvme_rdma_ctrl_mutex); 2449 list_for_each_entry(ctrl, &nvme_rdma_ctrl_list, list) { 2450 if (ctrl->device->dev != ib_device) 2451 continue; 2452 nvme_delete_ctrl(&ctrl->ctrl); 2453 } 2454 mutex_unlock(&nvme_rdma_ctrl_mutex); 2455 2456 flush_workqueue(nvme_delete_wq); 2457 } 2458 2459 static struct ib_client nvme_rdma_ib_client = { 2460 .name = "nvme_rdma", 2461 .remove = nvme_rdma_remove_one 2462 }; 2463 2464 static int __init nvme_rdma_init_module(void) 2465 { 2466 int ret; 2467 2468 ret = ib_register_client(&nvme_rdma_ib_client); 2469 if (ret) 2470 return ret; 2471 2472 ret = nvmf_register_transport(&nvme_rdma_transport); 2473 if (ret) 2474 goto err_unreg_client; 2475 2476 return 0; 2477 2478 err_unreg_client: 2479 ib_unregister_client(&nvme_rdma_ib_client); 2480 return ret; 2481 } 2482 2483 static void __exit nvme_rdma_cleanup_module(void) 2484 { 2485 struct nvme_rdma_ctrl *ctrl; 2486 2487 nvmf_unregister_transport(&nvme_rdma_transport); 2488 ib_unregister_client(&nvme_rdma_ib_client); 2489 2490 mutex_lock(&nvme_rdma_ctrl_mutex); 2491 list_for_each_entry(ctrl, &nvme_rdma_ctrl_list, list) 2492 nvme_delete_ctrl(&ctrl->ctrl); 2493 mutex_unlock(&nvme_rdma_ctrl_mutex); 2494 flush_workqueue(nvme_delete_wq); 2495 } 2496 2497 module_init(nvme_rdma_init_module); 2498 module_exit(nvme_rdma_cleanup_module); 2499 2500 MODULE_LICENSE("GPL v2"); 2501