1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * NVMe over Fabrics RDMA host code. 4 * Copyright (c) 2015-2016 HGST, a Western Digital Company. 5 */ 6 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 7 #include <linux/module.h> 8 #include <linux/init.h> 9 #include <linux/slab.h> 10 #include <rdma/mr_pool.h> 11 #include <linux/err.h> 12 #include <linux/string.h> 13 #include <linux/atomic.h> 14 #include <linux/blk-mq.h> 15 #include <linux/blk-mq-rdma.h> 16 #include <linux/blk-integrity.h> 17 #include <linux/types.h> 18 #include <linux/list.h> 19 #include <linux/mutex.h> 20 #include <linux/scatterlist.h> 21 #include <linux/nvme.h> 22 #include <asm/unaligned.h> 23 24 #include <rdma/ib_verbs.h> 25 #include <rdma/rdma_cm.h> 26 #include <linux/nvme-rdma.h> 27 28 #include "nvme.h" 29 #include "fabrics.h" 30 31 32 #define NVME_RDMA_CONNECT_TIMEOUT_MS 3000 /* 3 second */ 33 34 #define NVME_RDMA_MAX_SEGMENTS 256 35 36 #define NVME_RDMA_MAX_INLINE_SEGMENTS 4 37 38 #define NVME_RDMA_DATA_SGL_SIZE \ 39 (sizeof(struct scatterlist) * NVME_INLINE_SG_CNT) 40 #define NVME_RDMA_METADATA_SGL_SIZE \ 41 (sizeof(struct scatterlist) * NVME_INLINE_METADATA_SG_CNT) 42 43 struct nvme_rdma_device { 44 struct ib_device *dev; 45 struct ib_pd *pd; 46 struct kref ref; 47 struct list_head entry; 48 unsigned int num_inline_segments; 49 }; 50 51 struct nvme_rdma_qe { 52 struct ib_cqe cqe; 53 void *data; 54 u64 dma; 55 }; 56 57 struct nvme_rdma_sgl { 58 int nents; 59 struct sg_table sg_table; 60 }; 61 62 struct nvme_rdma_queue; 63 struct nvme_rdma_request { 64 struct nvme_request req; 65 struct ib_mr *mr; 66 struct nvme_rdma_qe sqe; 67 union nvme_result result; 68 __le16 status; 69 refcount_t ref; 70 struct ib_sge sge[1 + NVME_RDMA_MAX_INLINE_SEGMENTS]; 71 u32 num_sge; 72 struct ib_reg_wr reg_wr; 73 struct ib_cqe reg_cqe; 74 struct nvme_rdma_queue *queue; 75 struct nvme_rdma_sgl data_sgl; 76 struct nvme_rdma_sgl *metadata_sgl; 77 bool use_sig_mr; 78 }; 79 80 enum nvme_rdma_queue_flags { 81 NVME_RDMA_Q_ALLOCATED = 0, 82 NVME_RDMA_Q_LIVE = 1, 83 NVME_RDMA_Q_TR_READY = 2, 84 }; 85 86 struct nvme_rdma_queue { 87 struct nvme_rdma_qe *rsp_ring; 88 int queue_size; 89 size_t cmnd_capsule_len; 90 struct nvme_rdma_ctrl *ctrl; 91 struct nvme_rdma_device *device; 92 struct ib_cq *ib_cq; 93 struct ib_qp *qp; 94 95 unsigned long flags; 96 struct rdma_cm_id *cm_id; 97 int cm_error; 98 struct completion cm_done; 99 bool pi_support; 100 int cq_size; 101 struct mutex queue_lock; 102 }; 103 104 struct nvme_rdma_ctrl { 105 /* read only in the hot path */ 106 struct nvme_rdma_queue *queues; 107 108 /* other member variables */ 109 struct blk_mq_tag_set tag_set; 110 struct work_struct err_work; 111 112 struct nvme_rdma_qe async_event_sqe; 113 114 struct delayed_work reconnect_work; 115 116 struct list_head list; 117 118 struct blk_mq_tag_set admin_tag_set; 119 struct nvme_rdma_device *device; 120 121 u32 max_fr_pages; 122 123 struct sockaddr_storage addr; 124 struct sockaddr_storage src_addr; 125 126 struct nvme_ctrl ctrl; 127 bool use_inline_data; 128 u32 io_queues[HCTX_MAX_TYPES]; 129 }; 130 131 static inline struct nvme_rdma_ctrl *to_rdma_ctrl(struct nvme_ctrl *ctrl) 132 { 133 return container_of(ctrl, struct nvme_rdma_ctrl, ctrl); 134 } 135 136 static LIST_HEAD(device_list); 137 static DEFINE_MUTEX(device_list_mutex); 138 139 static LIST_HEAD(nvme_rdma_ctrl_list); 140 static DEFINE_MUTEX(nvme_rdma_ctrl_mutex); 141 142 /* 143 * Disabling this option makes small I/O goes faster, but is fundamentally 144 * unsafe. With it turned off we will have to register a global rkey that 145 * allows read and write access to all physical memory. 146 */ 147 static bool register_always = true; 148 module_param(register_always, bool, 0444); 149 MODULE_PARM_DESC(register_always, 150 "Use memory registration even for contiguous memory regions"); 151 152 static int nvme_rdma_cm_handler(struct rdma_cm_id *cm_id, 153 struct rdma_cm_event *event); 154 static void nvme_rdma_recv_done(struct ib_cq *cq, struct ib_wc *wc); 155 static void nvme_rdma_complete_rq(struct request *rq); 156 157 static const struct blk_mq_ops nvme_rdma_mq_ops; 158 static const struct blk_mq_ops nvme_rdma_admin_mq_ops; 159 160 static inline int nvme_rdma_queue_idx(struct nvme_rdma_queue *queue) 161 { 162 return queue - queue->ctrl->queues; 163 } 164 165 static bool nvme_rdma_poll_queue(struct nvme_rdma_queue *queue) 166 { 167 return nvme_rdma_queue_idx(queue) > 168 queue->ctrl->io_queues[HCTX_TYPE_DEFAULT] + 169 queue->ctrl->io_queues[HCTX_TYPE_READ]; 170 } 171 172 static inline size_t nvme_rdma_inline_data_size(struct nvme_rdma_queue *queue) 173 { 174 return queue->cmnd_capsule_len - sizeof(struct nvme_command); 175 } 176 177 static void nvme_rdma_free_qe(struct ib_device *ibdev, struct nvme_rdma_qe *qe, 178 size_t capsule_size, enum dma_data_direction dir) 179 { 180 ib_dma_unmap_single(ibdev, qe->dma, capsule_size, dir); 181 kfree(qe->data); 182 } 183 184 static int nvme_rdma_alloc_qe(struct ib_device *ibdev, struct nvme_rdma_qe *qe, 185 size_t capsule_size, enum dma_data_direction dir) 186 { 187 qe->data = kzalloc(capsule_size, GFP_KERNEL); 188 if (!qe->data) 189 return -ENOMEM; 190 191 qe->dma = ib_dma_map_single(ibdev, qe->data, capsule_size, dir); 192 if (ib_dma_mapping_error(ibdev, qe->dma)) { 193 kfree(qe->data); 194 qe->data = NULL; 195 return -ENOMEM; 196 } 197 198 return 0; 199 } 200 201 static void nvme_rdma_free_ring(struct ib_device *ibdev, 202 struct nvme_rdma_qe *ring, size_t ib_queue_size, 203 size_t capsule_size, enum dma_data_direction dir) 204 { 205 int i; 206 207 for (i = 0; i < ib_queue_size; i++) 208 nvme_rdma_free_qe(ibdev, &ring[i], capsule_size, dir); 209 kfree(ring); 210 } 211 212 static struct nvme_rdma_qe *nvme_rdma_alloc_ring(struct ib_device *ibdev, 213 size_t ib_queue_size, size_t capsule_size, 214 enum dma_data_direction dir) 215 { 216 struct nvme_rdma_qe *ring; 217 int i; 218 219 ring = kcalloc(ib_queue_size, sizeof(struct nvme_rdma_qe), GFP_KERNEL); 220 if (!ring) 221 return NULL; 222 223 /* 224 * Bind the CQEs (post recv buffers) DMA mapping to the RDMA queue 225 * lifetime. It's safe, since any chage in the underlying RDMA device 226 * will issue error recovery and queue re-creation. 227 */ 228 for (i = 0; i < ib_queue_size; i++) { 229 if (nvme_rdma_alloc_qe(ibdev, &ring[i], capsule_size, dir)) 230 goto out_free_ring; 231 } 232 233 return ring; 234 235 out_free_ring: 236 nvme_rdma_free_ring(ibdev, ring, i, capsule_size, dir); 237 return NULL; 238 } 239 240 static void nvme_rdma_qp_event(struct ib_event *event, void *context) 241 { 242 pr_debug("QP event %s (%d)\n", 243 ib_event_msg(event->event), event->event); 244 245 } 246 247 static int nvme_rdma_wait_for_cm(struct nvme_rdma_queue *queue) 248 { 249 int ret; 250 251 ret = wait_for_completion_interruptible_timeout(&queue->cm_done, 252 msecs_to_jiffies(NVME_RDMA_CONNECT_TIMEOUT_MS) + 1); 253 if (ret < 0) 254 return ret; 255 if (ret == 0) 256 return -ETIMEDOUT; 257 WARN_ON_ONCE(queue->cm_error > 0); 258 return queue->cm_error; 259 } 260 261 static int nvme_rdma_create_qp(struct nvme_rdma_queue *queue, const int factor) 262 { 263 struct nvme_rdma_device *dev = queue->device; 264 struct ib_qp_init_attr init_attr; 265 int ret; 266 267 memset(&init_attr, 0, sizeof(init_attr)); 268 init_attr.event_handler = nvme_rdma_qp_event; 269 /* +1 for drain */ 270 init_attr.cap.max_send_wr = factor * queue->queue_size + 1; 271 /* +1 for drain */ 272 init_attr.cap.max_recv_wr = queue->queue_size + 1; 273 init_attr.cap.max_recv_sge = 1; 274 init_attr.cap.max_send_sge = 1 + dev->num_inline_segments; 275 init_attr.sq_sig_type = IB_SIGNAL_REQ_WR; 276 init_attr.qp_type = IB_QPT_RC; 277 init_attr.send_cq = queue->ib_cq; 278 init_attr.recv_cq = queue->ib_cq; 279 if (queue->pi_support) 280 init_attr.create_flags |= IB_QP_CREATE_INTEGRITY_EN; 281 init_attr.qp_context = queue; 282 283 ret = rdma_create_qp(queue->cm_id, dev->pd, &init_attr); 284 285 queue->qp = queue->cm_id->qp; 286 return ret; 287 } 288 289 static void nvme_rdma_exit_request(struct blk_mq_tag_set *set, 290 struct request *rq, unsigned int hctx_idx) 291 { 292 struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); 293 294 kfree(req->sqe.data); 295 } 296 297 static int nvme_rdma_init_request(struct blk_mq_tag_set *set, 298 struct request *rq, unsigned int hctx_idx, 299 unsigned int numa_node) 300 { 301 struct nvme_rdma_ctrl *ctrl = set->driver_data; 302 struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); 303 int queue_idx = (set == &ctrl->tag_set) ? hctx_idx + 1 : 0; 304 struct nvme_rdma_queue *queue = &ctrl->queues[queue_idx]; 305 306 nvme_req(rq)->ctrl = &ctrl->ctrl; 307 req->sqe.data = kzalloc(sizeof(struct nvme_command), GFP_KERNEL); 308 if (!req->sqe.data) 309 return -ENOMEM; 310 311 /* metadata nvme_rdma_sgl struct is located after command's data SGL */ 312 if (queue->pi_support) 313 req->metadata_sgl = (void *)nvme_req(rq) + 314 sizeof(struct nvme_rdma_request) + 315 NVME_RDMA_DATA_SGL_SIZE; 316 317 req->queue = queue; 318 nvme_req(rq)->cmd = req->sqe.data; 319 320 return 0; 321 } 322 323 static int nvme_rdma_init_hctx(struct blk_mq_hw_ctx *hctx, void *data, 324 unsigned int hctx_idx) 325 { 326 struct nvme_rdma_ctrl *ctrl = data; 327 struct nvme_rdma_queue *queue = &ctrl->queues[hctx_idx + 1]; 328 329 BUG_ON(hctx_idx >= ctrl->ctrl.queue_count); 330 331 hctx->driver_data = queue; 332 return 0; 333 } 334 335 static int nvme_rdma_init_admin_hctx(struct blk_mq_hw_ctx *hctx, void *data, 336 unsigned int hctx_idx) 337 { 338 struct nvme_rdma_ctrl *ctrl = data; 339 struct nvme_rdma_queue *queue = &ctrl->queues[0]; 340 341 BUG_ON(hctx_idx != 0); 342 343 hctx->driver_data = queue; 344 return 0; 345 } 346 347 static void nvme_rdma_free_dev(struct kref *ref) 348 { 349 struct nvme_rdma_device *ndev = 350 container_of(ref, struct nvme_rdma_device, ref); 351 352 mutex_lock(&device_list_mutex); 353 list_del(&ndev->entry); 354 mutex_unlock(&device_list_mutex); 355 356 ib_dealloc_pd(ndev->pd); 357 kfree(ndev); 358 } 359 360 static void nvme_rdma_dev_put(struct nvme_rdma_device *dev) 361 { 362 kref_put(&dev->ref, nvme_rdma_free_dev); 363 } 364 365 static int nvme_rdma_dev_get(struct nvme_rdma_device *dev) 366 { 367 return kref_get_unless_zero(&dev->ref); 368 } 369 370 static struct nvme_rdma_device * 371 nvme_rdma_find_get_device(struct rdma_cm_id *cm_id) 372 { 373 struct nvme_rdma_device *ndev; 374 375 mutex_lock(&device_list_mutex); 376 list_for_each_entry(ndev, &device_list, entry) { 377 if (ndev->dev->node_guid == cm_id->device->node_guid && 378 nvme_rdma_dev_get(ndev)) 379 goto out_unlock; 380 } 381 382 ndev = kzalloc(sizeof(*ndev), GFP_KERNEL); 383 if (!ndev) 384 goto out_err; 385 386 ndev->dev = cm_id->device; 387 kref_init(&ndev->ref); 388 389 ndev->pd = ib_alloc_pd(ndev->dev, 390 register_always ? 0 : IB_PD_UNSAFE_GLOBAL_RKEY); 391 if (IS_ERR(ndev->pd)) 392 goto out_free_dev; 393 394 if (!(ndev->dev->attrs.device_cap_flags & 395 IB_DEVICE_MEM_MGT_EXTENSIONS)) { 396 dev_err(&ndev->dev->dev, 397 "Memory registrations not supported.\n"); 398 goto out_free_pd; 399 } 400 401 ndev->num_inline_segments = min(NVME_RDMA_MAX_INLINE_SEGMENTS, 402 ndev->dev->attrs.max_send_sge - 1); 403 list_add(&ndev->entry, &device_list); 404 out_unlock: 405 mutex_unlock(&device_list_mutex); 406 return ndev; 407 408 out_free_pd: 409 ib_dealloc_pd(ndev->pd); 410 out_free_dev: 411 kfree(ndev); 412 out_err: 413 mutex_unlock(&device_list_mutex); 414 return NULL; 415 } 416 417 static void nvme_rdma_free_cq(struct nvme_rdma_queue *queue) 418 { 419 if (nvme_rdma_poll_queue(queue)) 420 ib_free_cq(queue->ib_cq); 421 else 422 ib_cq_pool_put(queue->ib_cq, queue->cq_size); 423 } 424 425 static void nvme_rdma_destroy_queue_ib(struct nvme_rdma_queue *queue) 426 { 427 struct nvme_rdma_device *dev; 428 struct ib_device *ibdev; 429 430 if (!test_and_clear_bit(NVME_RDMA_Q_TR_READY, &queue->flags)) 431 return; 432 433 dev = queue->device; 434 ibdev = dev->dev; 435 436 if (queue->pi_support) 437 ib_mr_pool_destroy(queue->qp, &queue->qp->sig_mrs); 438 ib_mr_pool_destroy(queue->qp, &queue->qp->rdma_mrs); 439 440 /* 441 * The cm_id object might have been destroyed during RDMA connection 442 * establishment error flow to avoid getting other cma events, thus 443 * the destruction of the QP shouldn't use rdma_cm API. 444 */ 445 ib_destroy_qp(queue->qp); 446 nvme_rdma_free_cq(queue); 447 448 nvme_rdma_free_ring(ibdev, queue->rsp_ring, queue->queue_size, 449 sizeof(struct nvme_completion), DMA_FROM_DEVICE); 450 451 nvme_rdma_dev_put(dev); 452 } 453 454 static int nvme_rdma_get_max_fr_pages(struct ib_device *ibdev, bool pi_support) 455 { 456 u32 max_page_list_len; 457 458 if (pi_support) 459 max_page_list_len = ibdev->attrs.max_pi_fast_reg_page_list_len; 460 else 461 max_page_list_len = ibdev->attrs.max_fast_reg_page_list_len; 462 463 return min_t(u32, NVME_RDMA_MAX_SEGMENTS, max_page_list_len - 1); 464 } 465 466 static int nvme_rdma_create_cq(struct ib_device *ibdev, 467 struct nvme_rdma_queue *queue) 468 { 469 int ret, comp_vector, idx = nvme_rdma_queue_idx(queue); 470 enum ib_poll_context poll_ctx; 471 472 /* 473 * Spread I/O queues completion vectors according their queue index. 474 * Admin queues can always go on completion vector 0. 475 */ 476 comp_vector = (idx == 0 ? idx : idx - 1) % ibdev->num_comp_vectors; 477 478 /* Polling queues need direct cq polling context */ 479 if (nvme_rdma_poll_queue(queue)) { 480 poll_ctx = IB_POLL_DIRECT; 481 queue->ib_cq = ib_alloc_cq(ibdev, queue, queue->cq_size, 482 comp_vector, poll_ctx); 483 } else { 484 poll_ctx = IB_POLL_SOFTIRQ; 485 queue->ib_cq = ib_cq_pool_get(ibdev, queue->cq_size, 486 comp_vector, poll_ctx); 487 } 488 489 if (IS_ERR(queue->ib_cq)) { 490 ret = PTR_ERR(queue->ib_cq); 491 return ret; 492 } 493 494 return 0; 495 } 496 497 static int nvme_rdma_create_queue_ib(struct nvme_rdma_queue *queue) 498 { 499 struct ib_device *ibdev; 500 const int send_wr_factor = 3; /* MR, SEND, INV */ 501 const int cq_factor = send_wr_factor + 1; /* + RECV */ 502 int ret, pages_per_mr; 503 504 queue->device = nvme_rdma_find_get_device(queue->cm_id); 505 if (!queue->device) { 506 dev_err(queue->cm_id->device->dev.parent, 507 "no client data found!\n"); 508 return -ECONNREFUSED; 509 } 510 ibdev = queue->device->dev; 511 512 /* +1 for ib_stop_cq */ 513 queue->cq_size = cq_factor * queue->queue_size + 1; 514 515 ret = nvme_rdma_create_cq(ibdev, queue); 516 if (ret) 517 goto out_put_dev; 518 519 ret = nvme_rdma_create_qp(queue, send_wr_factor); 520 if (ret) 521 goto out_destroy_ib_cq; 522 523 queue->rsp_ring = nvme_rdma_alloc_ring(ibdev, queue->queue_size, 524 sizeof(struct nvme_completion), DMA_FROM_DEVICE); 525 if (!queue->rsp_ring) { 526 ret = -ENOMEM; 527 goto out_destroy_qp; 528 } 529 530 /* 531 * Currently we don't use SG_GAPS MR's so if the first entry is 532 * misaligned we'll end up using two entries for a single data page, 533 * so one additional entry is required. 534 */ 535 pages_per_mr = nvme_rdma_get_max_fr_pages(ibdev, queue->pi_support) + 1; 536 ret = ib_mr_pool_init(queue->qp, &queue->qp->rdma_mrs, 537 queue->queue_size, 538 IB_MR_TYPE_MEM_REG, 539 pages_per_mr, 0); 540 if (ret) { 541 dev_err(queue->ctrl->ctrl.device, 542 "failed to initialize MR pool sized %d for QID %d\n", 543 queue->queue_size, nvme_rdma_queue_idx(queue)); 544 goto out_destroy_ring; 545 } 546 547 if (queue->pi_support) { 548 ret = ib_mr_pool_init(queue->qp, &queue->qp->sig_mrs, 549 queue->queue_size, IB_MR_TYPE_INTEGRITY, 550 pages_per_mr, pages_per_mr); 551 if (ret) { 552 dev_err(queue->ctrl->ctrl.device, 553 "failed to initialize PI MR pool sized %d for QID %d\n", 554 queue->queue_size, nvme_rdma_queue_idx(queue)); 555 goto out_destroy_mr_pool; 556 } 557 } 558 559 set_bit(NVME_RDMA_Q_TR_READY, &queue->flags); 560 561 return 0; 562 563 out_destroy_mr_pool: 564 ib_mr_pool_destroy(queue->qp, &queue->qp->rdma_mrs); 565 out_destroy_ring: 566 nvme_rdma_free_ring(ibdev, queue->rsp_ring, queue->queue_size, 567 sizeof(struct nvme_completion), DMA_FROM_DEVICE); 568 out_destroy_qp: 569 rdma_destroy_qp(queue->cm_id); 570 out_destroy_ib_cq: 571 nvme_rdma_free_cq(queue); 572 out_put_dev: 573 nvme_rdma_dev_put(queue->device); 574 return ret; 575 } 576 577 static int nvme_rdma_alloc_queue(struct nvme_rdma_ctrl *ctrl, 578 int idx, size_t queue_size) 579 { 580 struct nvme_rdma_queue *queue; 581 struct sockaddr *src_addr = NULL; 582 int ret; 583 584 queue = &ctrl->queues[idx]; 585 mutex_init(&queue->queue_lock); 586 queue->ctrl = ctrl; 587 if (idx && ctrl->ctrl.max_integrity_segments) 588 queue->pi_support = true; 589 else 590 queue->pi_support = false; 591 init_completion(&queue->cm_done); 592 593 if (idx > 0) 594 queue->cmnd_capsule_len = ctrl->ctrl.ioccsz * 16; 595 else 596 queue->cmnd_capsule_len = sizeof(struct nvme_command); 597 598 queue->queue_size = queue_size; 599 600 queue->cm_id = rdma_create_id(&init_net, nvme_rdma_cm_handler, queue, 601 RDMA_PS_TCP, IB_QPT_RC); 602 if (IS_ERR(queue->cm_id)) { 603 dev_info(ctrl->ctrl.device, 604 "failed to create CM ID: %ld\n", PTR_ERR(queue->cm_id)); 605 ret = PTR_ERR(queue->cm_id); 606 goto out_destroy_mutex; 607 } 608 609 if (ctrl->ctrl.opts->mask & NVMF_OPT_HOST_TRADDR) 610 src_addr = (struct sockaddr *)&ctrl->src_addr; 611 612 queue->cm_error = -ETIMEDOUT; 613 ret = rdma_resolve_addr(queue->cm_id, src_addr, 614 (struct sockaddr *)&ctrl->addr, 615 NVME_RDMA_CONNECT_TIMEOUT_MS); 616 if (ret) { 617 dev_info(ctrl->ctrl.device, 618 "rdma_resolve_addr failed (%d).\n", ret); 619 goto out_destroy_cm_id; 620 } 621 622 ret = nvme_rdma_wait_for_cm(queue); 623 if (ret) { 624 dev_info(ctrl->ctrl.device, 625 "rdma connection establishment failed (%d)\n", ret); 626 goto out_destroy_cm_id; 627 } 628 629 set_bit(NVME_RDMA_Q_ALLOCATED, &queue->flags); 630 631 return 0; 632 633 out_destroy_cm_id: 634 rdma_destroy_id(queue->cm_id); 635 nvme_rdma_destroy_queue_ib(queue); 636 out_destroy_mutex: 637 mutex_destroy(&queue->queue_lock); 638 return ret; 639 } 640 641 static void __nvme_rdma_stop_queue(struct nvme_rdma_queue *queue) 642 { 643 rdma_disconnect(queue->cm_id); 644 ib_drain_qp(queue->qp); 645 } 646 647 static void nvme_rdma_stop_queue(struct nvme_rdma_queue *queue) 648 { 649 mutex_lock(&queue->queue_lock); 650 if (test_and_clear_bit(NVME_RDMA_Q_LIVE, &queue->flags)) 651 __nvme_rdma_stop_queue(queue); 652 mutex_unlock(&queue->queue_lock); 653 } 654 655 static void nvme_rdma_free_queue(struct nvme_rdma_queue *queue) 656 { 657 if (!test_and_clear_bit(NVME_RDMA_Q_ALLOCATED, &queue->flags)) 658 return; 659 660 rdma_destroy_id(queue->cm_id); 661 nvme_rdma_destroy_queue_ib(queue); 662 mutex_destroy(&queue->queue_lock); 663 } 664 665 static void nvme_rdma_free_io_queues(struct nvme_rdma_ctrl *ctrl) 666 { 667 int i; 668 669 for (i = 1; i < ctrl->ctrl.queue_count; i++) 670 nvme_rdma_free_queue(&ctrl->queues[i]); 671 } 672 673 static void nvme_rdma_stop_io_queues(struct nvme_rdma_ctrl *ctrl) 674 { 675 int i; 676 677 for (i = 1; i < ctrl->ctrl.queue_count; i++) 678 nvme_rdma_stop_queue(&ctrl->queues[i]); 679 } 680 681 static int nvme_rdma_start_queue(struct nvme_rdma_ctrl *ctrl, int idx) 682 { 683 struct nvme_rdma_queue *queue = &ctrl->queues[idx]; 684 int ret; 685 686 if (idx) 687 ret = nvmf_connect_io_queue(&ctrl->ctrl, idx); 688 else 689 ret = nvmf_connect_admin_queue(&ctrl->ctrl); 690 691 if (!ret) { 692 set_bit(NVME_RDMA_Q_LIVE, &queue->flags); 693 } else { 694 if (test_bit(NVME_RDMA_Q_ALLOCATED, &queue->flags)) 695 __nvme_rdma_stop_queue(queue); 696 dev_info(ctrl->ctrl.device, 697 "failed to connect queue: %d ret=%d\n", idx, ret); 698 } 699 return ret; 700 } 701 702 static int nvme_rdma_start_io_queues(struct nvme_rdma_ctrl *ctrl) 703 { 704 int i, ret = 0; 705 706 for (i = 1; i < ctrl->ctrl.queue_count; i++) { 707 ret = nvme_rdma_start_queue(ctrl, i); 708 if (ret) 709 goto out_stop_queues; 710 } 711 712 return 0; 713 714 out_stop_queues: 715 for (i--; i >= 1; i--) 716 nvme_rdma_stop_queue(&ctrl->queues[i]); 717 return ret; 718 } 719 720 static int nvme_rdma_alloc_io_queues(struct nvme_rdma_ctrl *ctrl) 721 { 722 struct nvmf_ctrl_options *opts = ctrl->ctrl.opts; 723 struct ib_device *ibdev = ctrl->device->dev; 724 unsigned int nr_io_queues, nr_default_queues; 725 unsigned int nr_read_queues, nr_poll_queues; 726 int i, ret; 727 728 nr_read_queues = min_t(unsigned int, ibdev->num_comp_vectors, 729 min(opts->nr_io_queues, num_online_cpus())); 730 nr_default_queues = min_t(unsigned int, ibdev->num_comp_vectors, 731 min(opts->nr_write_queues, num_online_cpus())); 732 nr_poll_queues = min(opts->nr_poll_queues, num_online_cpus()); 733 nr_io_queues = nr_read_queues + nr_default_queues + nr_poll_queues; 734 735 ret = nvme_set_queue_count(&ctrl->ctrl, &nr_io_queues); 736 if (ret) 737 return ret; 738 739 if (nr_io_queues == 0) { 740 dev_err(ctrl->ctrl.device, 741 "unable to set any I/O queues\n"); 742 return -ENOMEM; 743 } 744 745 ctrl->ctrl.queue_count = nr_io_queues + 1; 746 dev_info(ctrl->ctrl.device, 747 "creating %d I/O queues.\n", nr_io_queues); 748 749 if (opts->nr_write_queues && nr_read_queues < nr_io_queues) { 750 /* 751 * separate read/write queues 752 * hand out dedicated default queues only after we have 753 * sufficient read queues. 754 */ 755 ctrl->io_queues[HCTX_TYPE_READ] = nr_read_queues; 756 nr_io_queues -= ctrl->io_queues[HCTX_TYPE_READ]; 757 ctrl->io_queues[HCTX_TYPE_DEFAULT] = 758 min(nr_default_queues, nr_io_queues); 759 nr_io_queues -= ctrl->io_queues[HCTX_TYPE_DEFAULT]; 760 } else { 761 /* 762 * shared read/write queues 763 * either no write queues were requested, or we don't have 764 * sufficient queue count to have dedicated default queues. 765 */ 766 ctrl->io_queues[HCTX_TYPE_DEFAULT] = 767 min(nr_read_queues, nr_io_queues); 768 nr_io_queues -= ctrl->io_queues[HCTX_TYPE_DEFAULT]; 769 } 770 771 if (opts->nr_poll_queues && nr_io_queues) { 772 /* map dedicated poll queues only if we have queues left */ 773 ctrl->io_queues[HCTX_TYPE_POLL] = 774 min(nr_poll_queues, nr_io_queues); 775 } 776 777 for (i = 1; i < ctrl->ctrl.queue_count; i++) { 778 ret = nvme_rdma_alloc_queue(ctrl, i, 779 ctrl->ctrl.sqsize + 1); 780 if (ret) 781 goto out_free_queues; 782 } 783 784 return 0; 785 786 out_free_queues: 787 for (i--; i >= 1; i--) 788 nvme_rdma_free_queue(&ctrl->queues[i]); 789 790 return ret; 791 } 792 793 static struct blk_mq_tag_set *nvme_rdma_alloc_tagset(struct nvme_ctrl *nctrl, 794 bool admin) 795 { 796 struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(nctrl); 797 struct blk_mq_tag_set *set; 798 int ret; 799 800 if (admin) { 801 set = &ctrl->admin_tag_set; 802 memset(set, 0, sizeof(*set)); 803 set->ops = &nvme_rdma_admin_mq_ops; 804 set->queue_depth = NVME_AQ_MQ_TAG_DEPTH; 805 set->reserved_tags = NVMF_RESERVED_TAGS; 806 set->numa_node = nctrl->numa_node; 807 set->cmd_size = sizeof(struct nvme_rdma_request) + 808 NVME_RDMA_DATA_SGL_SIZE; 809 set->driver_data = ctrl; 810 set->nr_hw_queues = 1; 811 set->timeout = NVME_ADMIN_TIMEOUT; 812 set->flags = BLK_MQ_F_NO_SCHED; 813 } else { 814 set = &ctrl->tag_set; 815 memset(set, 0, sizeof(*set)); 816 set->ops = &nvme_rdma_mq_ops; 817 set->queue_depth = nctrl->sqsize + 1; 818 set->reserved_tags = NVMF_RESERVED_TAGS; 819 set->numa_node = nctrl->numa_node; 820 set->flags = BLK_MQ_F_SHOULD_MERGE; 821 set->cmd_size = sizeof(struct nvme_rdma_request) + 822 NVME_RDMA_DATA_SGL_SIZE; 823 if (nctrl->max_integrity_segments) 824 set->cmd_size += sizeof(struct nvme_rdma_sgl) + 825 NVME_RDMA_METADATA_SGL_SIZE; 826 set->driver_data = ctrl; 827 set->nr_hw_queues = nctrl->queue_count - 1; 828 set->timeout = NVME_IO_TIMEOUT; 829 set->nr_maps = nctrl->opts->nr_poll_queues ? HCTX_MAX_TYPES : 2; 830 } 831 832 ret = blk_mq_alloc_tag_set(set); 833 if (ret) 834 return ERR_PTR(ret); 835 836 return set; 837 } 838 839 static void nvme_rdma_destroy_admin_queue(struct nvme_rdma_ctrl *ctrl, 840 bool remove) 841 { 842 if (remove) { 843 blk_cleanup_queue(ctrl->ctrl.admin_q); 844 blk_cleanup_queue(ctrl->ctrl.fabrics_q); 845 blk_mq_free_tag_set(ctrl->ctrl.admin_tagset); 846 } 847 if (ctrl->async_event_sqe.data) { 848 cancel_work_sync(&ctrl->ctrl.async_event_work); 849 nvme_rdma_free_qe(ctrl->device->dev, &ctrl->async_event_sqe, 850 sizeof(struct nvme_command), DMA_TO_DEVICE); 851 ctrl->async_event_sqe.data = NULL; 852 } 853 nvme_rdma_free_queue(&ctrl->queues[0]); 854 } 855 856 static int nvme_rdma_configure_admin_queue(struct nvme_rdma_ctrl *ctrl, 857 bool new) 858 { 859 bool pi_capable = false; 860 int error; 861 862 error = nvme_rdma_alloc_queue(ctrl, 0, NVME_AQ_DEPTH); 863 if (error) 864 return error; 865 866 ctrl->device = ctrl->queues[0].device; 867 ctrl->ctrl.numa_node = ibdev_to_node(ctrl->device->dev); 868 869 /* T10-PI support */ 870 if (ctrl->device->dev->attrs.device_cap_flags & 871 IB_DEVICE_INTEGRITY_HANDOVER) 872 pi_capable = true; 873 874 ctrl->max_fr_pages = nvme_rdma_get_max_fr_pages(ctrl->device->dev, 875 pi_capable); 876 877 /* 878 * Bind the async event SQE DMA mapping to the admin queue lifetime. 879 * It's safe, since any chage in the underlying RDMA device will issue 880 * error recovery and queue re-creation. 881 */ 882 error = nvme_rdma_alloc_qe(ctrl->device->dev, &ctrl->async_event_sqe, 883 sizeof(struct nvme_command), DMA_TO_DEVICE); 884 if (error) 885 goto out_free_queue; 886 887 if (new) { 888 ctrl->ctrl.admin_tagset = nvme_rdma_alloc_tagset(&ctrl->ctrl, true); 889 if (IS_ERR(ctrl->ctrl.admin_tagset)) { 890 error = PTR_ERR(ctrl->ctrl.admin_tagset); 891 goto out_free_async_qe; 892 } 893 894 ctrl->ctrl.fabrics_q = blk_mq_init_queue(&ctrl->admin_tag_set); 895 if (IS_ERR(ctrl->ctrl.fabrics_q)) { 896 error = PTR_ERR(ctrl->ctrl.fabrics_q); 897 goto out_free_tagset; 898 } 899 900 ctrl->ctrl.admin_q = blk_mq_init_queue(&ctrl->admin_tag_set); 901 if (IS_ERR(ctrl->ctrl.admin_q)) { 902 error = PTR_ERR(ctrl->ctrl.admin_q); 903 goto out_cleanup_fabrics_q; 904 } 905 } 906 907 error = nvme_rdma_start_queue(ctrl, 0); 908 if (error) 909 goto out_cleanup_queue; 910 911 error = nvme_enable_ctrl(&ctrl->ctrl); 912 if (error) 913 goto out_stop_queue; 914 915 ctrl->ctrl.max_segments = ctrl->max_fr_pages; 916 ctrl->ctrl.max_hw_sectors = ctrl->max_fr_pages << (ilog2(SZ_4K) - 9); 917 if (pi_capable) 918 ctrl->ctrl.max_integrity_segments = ctrl->max_fr_pages; 919 else 920 ctrl->ctrl.max_integrity_segments = 0; 921 922 nvme_start_admin_queue(&ctrl->ctrl); 923 924 error = nvme_init_ctrl_finish(&ctrl->ctrl); 925 if (error) 926 goto out_quiesce_queue; 927 928 return 0; 929 930 out_quiesce_queue: 931 nvme_stop_admin_queue(&ctrl->ctrl); 932 blk_sync_queue(ctrl->ctrl.admin_q); 933 out_stop_queue: 934 nvme_rdma_stop_queue(&ctrl->queues[0]); 935 nvme_cancel_admin_tagset(&ctrl->ctrl); 936 out_cleanup_queue: 937 if (new) 938 blk_cleanup_queue(ctrl->ctrl.admin_q); 939 out_cleanup_fabrics_q: 940 if (new) 941 blk_cleanup_queue(ctrl->ctrl.fabrics_q); 942 out_free_tagset: 943 if (new) 944 blk_mq_free_tag_set(ctrl->ctrl.admin_tagset); 945 out_free_async_qe: 946 if (ctrl->async_event_sqe.data) { 947 nvme_rdma_free_qe(ctrl->device->dev, &ctrl->async_event_sqe, 948 sizeof(struct nvme_command), DMA_TO_DEVICE); 949 ctrl->async_event_sqe.data = NULL; 950 } 951 out_free_queue: 952 nvme_rdma_free_queue(&ctrl->queues[0]); 953 return error; 954 } 955 956 static void nvme_rdma_destroy_io_queues(struct nvme_rdma_ctrl *ctrl, 957 bool remove) 958 { 959 if (remove) { 960 blk_cleanup_queue(ctrl->ctrl.connect_q); 961 blk_mq_free_tag_set(ctrl->ctrl.tagset); 962 } 963 nvme_rdma_free_io_queues(ctrl); 964 } 965 966 static int nvme_rdma_configure_io_queues(struct nvme_rdma_ctrl *ctrl, bool new) 967 { 968 int ret; 969 970 ret = nvme_rdma_alloc_io_queues(ctrl); 971 if (ret) 972 return ret; 973 974 if (new) { 975 ctrl->ctrl.tagset = nvme_rdma_alloc_tagset(&ctrl->ctrl, false); 976 if (IS_ERR(ctrl->ctrl.tagset)) { 977 ret = PTR_ERR(ctrl->ctrl.tagset); 978 goto out_free_io_queues; 979 } 980 981 ctrl->ctrl.connect_q = blk_mq_init_queue(&ctrl->tag_set); 982 if (IS_ERR(ctrl->ctrl.connect_q)) { 983 ret = PTR_ERR(ctrl->ctrl.connect_q); 984 goto out_free_tag_set; 985 } 986 } 987 988 ret = nvme_rdma_start_io_queues(ctrl); 989 if (ret) 990 goto out_cleanup_connect_q; 991 992 if (!new) { 993 nvme_start_queues(&ctrl->ctrl); 994 if (!nvme_wait_freeze_timeout(&ctrl->ctrl, NVME_IO_TIMEOUT)) { 995 /* 996 * If we timed out waiting for freeze we are likely to 997 * be stuck. Fail the controller initialization just 998 * to be safe. 999 */ 1000 ret = -ENODEV; 1001 goto out_wait_freeze_timed_out; 1002 } 1003 blk_mq_update_nr_hw_queues(ctrl->ctrl.tagset, 1004 ctrl->ctrl.queue_count - 1); 1005 nvme_unfreeze(&ctrl->ctrl); 1006 } 1007 1008 return 0; 1009 1010 out_wait_freeze_timed_out: 1011 nvme_stop_queues(&ctrl->ctrl); 1012 nvme_sync_io_queues(&ctrl->ctrl); 1013 nvme_rdma_stop_io_queues(ctrl); 1014 out_cleanup_connect_q: 1015 nvme_cancel_tagset(&ctrl->ctrl); 1016 if (new) 1017 blk_cleanup_queue(ctrl->ctrl.connect_q); 1018 out_free_tag_set: 1019 if (new) 1020 blk_mq_free_tag_set(ctrl->ctrl.tagset); 1021 out_free_io_queues: 1022 nvme_rdma_free_io_queues(ctrl); 1023 return ret; 1024 } 1025 1026 static void nvme_rdma_teardown_admin_queue(struct nvme_rdma_ctrl *ctrl, 1027 bool remove) 1028 { 1029 nvme_stop_admin_queue(&ctrl->ctrl); 1030 blk_sync_queue(ctrl->ctrl.admin_q); 1031 nvme_rdma_stop_queue(&ctrl->queues[0]); 1032 nvme_cancel_admin_tagset(&ctrl->ctrl); 1033 if (remove) 1034 nvme_start_admin_queue(&ctrl->ctrl); 1035 nvme_rdma_destroy_admin_queue(ctrl, remove); 1036 } 1037 1038 static void nvme_rdma_teardown_io_queues(struct nvme_rdma_ctrl *ctrl, 1039 bool remove) 1040 { 1041 if (ctrl->ctrl.queue_count > 1) { 1042 nvme_start_freeze(&ctrl->ctrl); 1043 nvme_stop_queues(&ctrl->ctrl); 1044 nvme_sync_io_queues(&ctrl->ctrl); 1045 nvme_rdma_stop_io_queues(ctrl); 1046 nvme_cancel_tagset(&ctrl->ctrl); 1047 if (remove) 1048 nvme_start_queues(&ctrl->ctrl); 1049 nvme_rdma_destroy_io_queues(ctrl, remove); 1050 } 1051 } 1052 1053 static void nvme_rdma_free_ctrl(struct nvme_ctrl *nctrl) 1054 { 1055 struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(nctrl); 1056 1057 if (list_empty(&ctrl->list)) 1058 goto free_ctrl; 1059 1060 mutex_lock(&nvme_rdma_ctrl_mutex); 1061 list_del(&ctrl->list); 1062 mutex_unlock(&nvme_rdma_ctrl_mutex); 1063 1064 nvmf_free_options(nctrl->opts); 1065 free_ctrl: 1066 kfree(ctrl->queues); 1067 kfree(ctrl); 1068 } 1069 1070 static void nvme_rdma_reconnect_or_remove(struct nvme_rdma_ctrl *ctrl) 1071 { 1072 /* If we are resetting/deleting then do nothing */ 1073 if (ctrl->ctrl.state != NVME_CTRL_CONNECTING) { 1074 WARN_ON_ONCE(ctrl->ctrl.state == NVME_CTRL_NEW || 1075 ctrl->ctrl.state == NVME_CTRL_LIVE); 1076 return; 1077 } 1078 1079 if (nvmf_should_reconnect(&ctrl->ctrl)) { 1080 dev_info(ctrl->ctrl.device, "Reconnecting in %d seconds...\n", 1081 ctrl->ctrl.opts->reconnect_delay); 1082 queue_delayed_work(nvme_wq, &ctrl->reconnect_work, 1083 ctrl->ctrl.opts->reconnect_delay * HZ); 1084 } else { 1085 nvme_delete_ctrl(&ctrl->ctrl); 1086 } 1087 } 1088 1089 static int nvme_rdma_setup_ctrl(struct nvme_rdma_ctrl *ctrl, bool new) 1090 { 1091 int ret; 1092 bool changed; 1093 1094 ret = nvme_rdma_configure_admin_queue(ctrl, new); 1095 if (ret) 1096 return ret; 1097 1098 if (ctrl->ctrl.icdoff) { 1099 ret = -EOPNOTSUPP; 1100 dev_err(ctrl->ctrl.device, "icdoff is not supported!\n"); 1101 goto destroy_admin; 1102 } 1103 1104 if (!(ctrl->ctrl.sgls & (1 << 2))) { 1105 ret = -EOPNOTSUPP; 1106 dev_err(ctrl->ctrl.device, 1107 "Mandatory keyed sgls are not supported!\n"); 1108 goto destroy_admin; 1109 } 1110 1111 if (ctrl->ctrl.opts->queue_size > ctrl->ctrl.sqsize + 1) { 1112 dev_warn(ctrl->ctrl.device, 1113 "queue_size %zu > ctrl sqsize %u, clamping down\n", 1114 ctrl->ctrl.opts->queue_size, ctrl->ctrl.sqsize + 1); 1115 } 1116 1117 if (ctrl->ctrl.sqsize + 1 > NVME_RDMA_MAX_QUEUE_SIZE) { 1118 dev_warn(ctrl->ctrl.device, 1119 "ctrl sqsize %u > max queue size %u, clamping down\n", 1120 ctrl->ctrl.sqsize + 1, NVME_RDMA_MAX_QUEUE_SIZE); 1121 ctrl->ctrl.sqsize = NVME_RDMA_MAX_QUEUE_SIZE - 1; 1122 } 1123 1124 if (ctrl->ctrl.sqsize + 1 > ctrl->ctrl.maxcmd) { 1125 dev_warn(ctrl->ctrl.device, 1126 "sqsize %u > ctrl maxcmd %u, clamping down\n", 1127 ctrl->ctrl.sqsize + 1, ctrl->ctrl.maxcmd); 1128 ctrl->ctrl.sqsize = ctrl->ctrl.maxcmd - 1; 1129 } 1130 1131 if (ctrl->ctrl.sgls & (1 << 20)) 1132 ctrl->use_inline_data = true; 1133 1134 if (ctrl->ctrl.queue_count > 1) { 1135 ret = nvme_rdma_configure_io_queues(ctrl, new); 1136 if (ret) 1137 goto destroy_admin; 1138 } 1139 1140 changed = nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_LIVE); 1141 if (!changed) { 1142 /* 1143 * state change failure is ok if we started ctrl delete, 1144 * unless we're during creation of a new controller to 1145 * avoid races with teardown flow. 1146 */ 1147 WARN_ON_ONCE(ctrl->ctrl.state != NVME_CTRL_DELETING && 1148 ctrl->ctrl.state != NVME_CTRL_DELETING_NOIO); 1149 WARN_ON_ONCE(new); 1150 ret = -EINVAL; 1151 goto destroy_io; 1152 } 1153 1154 nvme_start_ctrl(&ctrl->ctrl); 1155 return 0; 1156 1157 destroy_io: 1158 if (ctrl->ctrl.queue_count > 1) { 1159 nvme_stop_queues(&ctrl->ctrl); 1160 nvme_sync_io_queues(&ctrl->ctrl); 1161 nvme_rdma_stop_io_queues(ctrl); 1162 nvme_cancel_tagset(&ctrl->ctrl); 1163 nvme_rdma_destroy_io_queues(ctrl, new); 1164 } 1165 destroy_admin: 1166 nvme_stop_admin_queue(&ctrl->ctrl); 1167 blk_sync_queue(ctrl->ctrl.admin_q); 1168 nvme_rdma_stop_queue(&ctrl->queues[0]); 1169 nvme_cancel_admin_tagset(&ctrl->ctrl); 1170 nvme_rdma_destroy_admin_queue(ctrl, new); 1171 return ret; 1172 } 1173 1174 static void nvme_rdma_reconnect_ctrl_work(struct work_struct *work) 1175 { 1176 struct nvme_rdma_ctrl *ctrl = container_of(to_delayed_work(work), 1177 struct nvme_rdma_ctrl, reconnect_work); 1178 1179 ++ctrl->ctrl.nr_reconnects; 1180 1181 if (nvme_rdma_setup_ctrl(ctrl, false)) 1182 goto requeue; 1183 1184 dev_info(ctrl->ctrl.device, "Successfully reconnected (%d attempts)\n", 1185 ctrl->ctrl.nr_reconnects); 1186 1187 ctrl->ctrl.nr_reconnects = 0; 1188 1189 return; 1190 1191 requeue: 1192 dev_info(ctrl->ctrl.device, "Failed reconnect attempt %d\n", 1193 ctrl->ctrl.nr_reconnects); 1194 nvme_rdma_reconnect_or_remove(ctrl); 1195 } 1196 1197 static void nvme_rdma_error_recovery_work(struct work_struct *work) 1198 { 1199 struct nvme_rdma_ctrl *ctrl = container_of(work, 1200 struct nvme_rdma_ctrl, err_work); 1201 1202 nvme_stop_keep_alive(&ctrl->ctrl); 1203 nvme_rdma_teardown_io_queues(ctrl, false); 1204 nvme_start_queues(&ctrl->ctrl); 1205 nvme_rdma_teardown_admin_queue(ctrl, false); 1206 nvme_start_admin_queue(&ctrl->ctrl); 1207 1208 if (!nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_CONNECTING)) { 1209 /* state change failure is ok if we started ctrl delete */ 1210 WARN_ON_ONCE(ctrl->ctrl.state != NVME_CTRL_DELETING && 1211 ctrl->ctrl.state != NVME_CTRL_DELETING_NOIO); 1212 return; 1213 } 1214 1215 nvme_rdma_reconnect_or_remove(ctrl); 1216 } 1217 1218 static void nvme_rdma_error_recovery(struct nvme_rdma_ctrl *ctrl) 1219 { 1220 if (!nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_RESETTING)) 1221 return; 1222 1223 dev_warn(ctrl->ctrl.device, "starting error recovery\n"); 1224 queue_work(nvme_reset_wq, &ctrl->err_work); 1225 } 1226 1227 static void nvme_rdma_end_request(struct nvme_rdma_request *req) 1228 { 1229 struct request *rq = blk_mq_rq_from_pdu(req); 1230 1231 if (!refcount_dec_and_test(&req->ref)) 1232 return; 1233 if (!nvme_try_complete_req(rq, req->status, req->result)) 1234 nvme_rdma_complete_rq(rq); 1235 } 1236 1237 static void nvme_rdma_wr_error(struct ib_cq *cq, struct ib_wc *wc, 1238 const char *op) 1239 { 1240 struct nvme_rdma_queue *queue = wc->qp->qp_context; 1241 struct nvme_rdma_ctrl *ctrl = queue->ctrl; 1242 1243 if (ctrl->ctrl.state == NVME_CTRL_LIVE) 1244 dev_info(ctrl->ctrl.device, 1245 "%s for CQE 0x%p failed with status %s (%d)\n", 1246 op, wc->wr_cqe, 1247 ib_wc_status_msg(wc->status), wc->status); 1248 nvme_rdma_error_recovery(ctrl); 1249 } 1250 1251 static void nvme_rdma_memreg_done(struct ib_cq *cq, struct ib_wc *wc) 1252 { 1253 if (unlikely(wc->status != IB_WC_SUCCESS)) 1254 nvme_rdma_wr_error(cq, wc, "MEMREG"); 1255 } 1256 1257 static void nvme_rdma_inv_rkey_done(struct ib_cq *cq, struct ib_wc *wc) 1258 { 1259 struct nvme_rdma_request *req = 1260 container_of(wc->wr_cqe, struct nvme_rdma_request, reg_cqe); 1261 1262 if (unlikely(wc->status != IB_WC_SUCCESS)) 1263 nvme_rdma_wr_error(cq, wc, "LOCAL_INV"); 1264 else 1265 nvme_rdma_end_request(req); 1266 } 1267 1268 static int nvme_rdma_inv_rkey(struct nvme_rdma_queue *queue, 1269 struct nvme_rdma_request *req) 1270 { 1271 struct ib_send_wr wr = { 1272 .opcode = IB_WR_LOCAL_INV, 1273 .next = NULL, 1274 .num_sge = 0, 1275 .send_flags = IB_SEND_SIGNALED, 1276 .ex.invalidate_rkey = req->mr->rkey, 1277 }; 1278 1279 req->reg_cqe.done = nvme_rdma_inv_rkey_done; 1280 wr.wr_cqe = &req->reg_cqe; 1281 1282 return ib_post_send(queue->qp, &wr, NULL); 1283 } 1284 1285 static void nvme_rdma_unmap_data(struct nvme_rdma_queue *queue, 1286 struct request *rq) 1287 { 1288 struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); 1289 struct nvme_rdma_device *dev = queue->device; 1290 struct ib_device *ibdev = dev->dev; 1291 struct list_head *pool = &queue->qp->rdma_mrs; 1292 1293 if (!blk_rq_nr_phys_segments(rq)) 1294 return; 1295 1296 if (blk_integrity_rq(rq)) { 1297 ib_dma_unmap_sg(ibdev, req->metadata_sgl->sg_table.sgl, 1298 req->metadata_sgl->nents, rq_dma_dir(rq)); 1299 sg_free_table_chained(&req->metadata_sgl->sg_table, 1300 NVME_INLINE_METADATA_SG_CNT); 1301 } 1302 1303 if (req->use_sig_mr) 1304 pool = &queue->qp->sig_mrs; 1305 1306 if (req->mr) { 1307 ib_mr_pool_put(queue->qp, pool, req->mr); 1308 req->mr = NULL; 1309 } 1310 1311 ib_dma_unmap_sg(ibdev, req->data_sgl.sg_table.sgl, req->data_sgl.nents, 1312 rq_dma_dir(rq)); 1313 sg_free_table_chained(&req->data_sgl.sg_table, NVME_INLINE_SG_CNT); 1314 } 1315 1316 static int nvme_rdma_set_sg_null(struct nvme_command *c) 1317 { 1318 struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl; 1319 1320 sg->addr = 0; 1321 put_unaligned_le24(0, sg->length); 1322 put_unaligned_le32(0, sg->key); 1323 sg->type = NVME_KEY_SGL_FMT_DATA_DESC << 4; 1324 return 0; 1325 } 1326 1327 static int nvme_rdma_map_sg_inline(struct nvme_rdma_queue *queue, 1328 struct nvme_rdma_request *req, struct nvme_command *c, 1329 int count) 1330 { 1331 struct nvme_sgl_desc *sg = &c->common.dptr.sgl; 1332 struct ib_sge *sge = &req->sge[1]; 1333 struct scatterlist *sgl; 1334 u32 len = 0; 1335 int i; 1336 1337 for_each_sg(req->data_sgl.sg_table.sgl, sgl, count, i) { 1338 sge->addr = sg_dma_address(sgl); 1339 sge->length = sg_dma_len(sgl); 1340 sge->lkey = queue->device->pd->local_dma_lkey; 1341 len += sge->length; 1342 sge++; 1343 } 1344 1345 sg->addr = cpu_to_le64(queue->ctrl->ctrl.icdoff); 1346 sg->length = cpu_to_le32(len); 1347 sg->type = (NVME_SGL_FMT_DATA_DESC << 4) | NVME_SGL_FMT_OFFSET; 1348 1349 req->num_sge += count; 1350 return 0; 1351 } 1352 1353 static int nvme_rdma_map_sg_single(struct nvme_rdma_queue *queue, 1354 struct nvme_rdma_request *req, struct nvme_command *c) 1355 { 1356 struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl; 1357 1358 sg->addr = cpu_to_le64(sg_dma_address(req->data_sgl.sg_table.sgl)); 1359 put_unaligned_le24(sg_dma_len(req->data_sgl.sg_table.sgl), sg->length); 1360 put_unaligned_le32(queue->device->pd->unsafe_global_rkey, sg->key); 1361 sg->type = NVME_KEY_SGL_FMT_DATA_DESC << 4; 1362 return 0; 1363 } 1364 1365 static int nvme_rdma_map_sg_fr(struct nvme_rdma_queue *queue, 1366 struct nvme_rdma_request *req, struct nvme_command *c, 1367 int count) 1368 { 1369 struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl; 1370 int nr; 1371 1372 req->mr = ib_mr_pool_get(queue->qp, &queue->qp->rdma_mrs); 1373 if (WARN_ON_ONCE(!req->mr)) 1374 return -EAGAIN; 1375 1376 /* 1377 * Align the MR to a 4K page size to match the ctrl page size and 1378 * the block virtual boundary. 1379 */ 1380 nr = ib_map_mr_sg(req->mr, req->data_sgl.sg_table.sgl, count, NULL, 1381 SZ_4K); 1382 if (unlikely(nr < count)) { 1383 ib_mr_pool_put(queue->qp, &queue->qp->rdma_mrs, req->mr); 1384 req->mr = NULL; 1385 if (nr < 0) 1386 return nr; 1387 return -EINVAL; 1388 } 1389 1390 ib_update_fast_reg_key(req->mr, ib_inc_rkey(req->mr->rkey)); 1391 1392 req->reg_cqe.done = nvme_rdma_memreg_done; 1393 memset(&req->reg_wr, 0, sizeof(req->reg_wr)); 1394 req->reg_wr.wr.opcode = IB_WR_REG_MR; 1395 req->reg_wr.wr.wr_cqe = &req->reg_cqe; 1396 req->reg_wr.wr.num_sge = 0; 1397 req->reg_wr.mr = req->mr; 1398 req->reg_wr.key = req->mr->rkey; 1399 req->reg_wr.access = IB_ACCESS_LOCAL_WRITE | 1400 IB_ACCESS_REMOTE_READ | 1401 IB_ACCESS_REMOTE_WRITE; 1402 1403 sg->addr = cpu_to_le64(req->mr->iova); 1404 put_unaligned_le24(req->mr->length, sg->length); 1405 put_unaligned_le32(req->mr->rkey, sg->key); 1406 sg->type = (NVME_KEY_SGL_FMT_DATA_DESC << 4) | 1407 NVME_SGL_FMT_INVALIDATE; 1408 1409 return 0; 1410 } 1411 1412 static void nvme_rdma_set_sig_domain(struct blk_integrity *bi, 1413 struct nvme_command *cmd, struct ib_sig_domain *domain, 1414 u16 control, u8 pi_type) 1415 { 1416 domain->sig_type = IB_SIG_TYPE_T10_DIF; 1417 domain->sig.dif.bg_type = IB_T10DIF_CRC; 1418 domain->sig.dif.pi_interval = 1 << bi->interval_exp; 1419 domain->sig.dif.ref_tag = le32_to_cpu(cmd->rw.reftag); 1420 if (control & NVME_RW_PRINFO_PRCHK_REF) 1421 domain->sig.dif.ref_remap = true; 1422 1423 domain->sig.dif.app_tag = le16_to_cpu(cmd->rw.apptag); 1424 domain->sig.dif.apptag_check_mask = le16_to_cpu(cmd->rw.appmask); 1425 domain->sig.dif.app_escape = true; 1426 if (pi_type == NVME_NS_DPS_PI_TYPE3) 1427 domain->sig.dif.ref_escape = true; 1428 } 1429 1430 static void nvme_rdma_set_sig_attrs(struct blk_integrity *bi, 1431 struct nvme_command *cmd, struct ib_sig_attrs *sig_attrs, 1432 u8 pi_type) 1433 { 1434 u16 control = le16_to_cpu(cmd->rw.control); 1435 1436 memset(sig_attrs, 0, sizeof(*sig_attrs)); 1437 if (control & NVME_RW_PRINFO_PRACT) { 1438 /* for WRITE_INSERT/READ_STRIP no memory domain */ 1439 sig_attrs->mem.sig_type = IB_SIG_TYPE_NONE; 1440 nvme_rdma_set_sig_domain(bi, cmd, &sig_attrs->wire, control, 1441 pi_type); 1442 /* Clear the PRACT bit since HCA will generate/verify the PI */ 1443 control &= ~NVME_RW_PRINFO_PRACT; 1444 cmd->rw.control = cpu_to_le16(control); 1445 } else { 1446 /* for WRITE_PASS/READ_PASS both wire/memory domains exist */ 1447 nvme_rdma_set_sig_domain(bi, cmd, &sig_attrs->wire, control, 1448 pi_type); 1449 nvme_rdma_set_sig_domain(bi, cmd, &sig_attrs->mem, control, 1450 pi_type); 1451 } 1452 } 1453 1454 static void nvme_rdma_set_prot_checks(struct nvme_command *cmd, u8 *mask) 1455 { 1456 *mask = 0; 1457 if (le16_to_cpu(cmd->rw.control) & NVME_RW_PRINFO_PRCHK_REF) 1458 *mask |= IB_SIG_CHECK_REFTAG; 1459 if (le16_to_cpu(cmd->rw.control) & NVME_RW_PRINFO_PRCHK_GUARD) 1460 *mask |= IB_SIG_CHECK_GUARD; 1461 } 1462 1463 static void nvme_rdma_sig_done(struct ib_cq *cq, struct ib_wc *wc) 1464 { 1465 if (unlikely(wc->status != IB_WC_SUCCESS)) 1466 nvme_rdma_wr_error(cq, wc, "SIG"); 1467 } 1468 1469 static int nvme_rdma_map_sg_pi(struct nvme_rdma_queue *queue, 1470 struct nvme_rdma_request *req, struct nvme_command *c, 1471 int count, int pi_count) 1472 { 1473 struct nvme_rdma_sgl *sgl = &req->data_sgl; 1474 struct ib_reg_wr *wr = &req->reg_wr; 1475 struct request *rq = blk_mq_rq_from_pdu(req); 1476 struct nvme_ns *ns = rq->q->queuedata; 1477 struct bio *bio = rq->bio; 1478 struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl; 1479 int nr; 1480 1481 req->mr = ib_mr_pool_get(queue->qp, &queue->qp->sig_mrs); 1482 if (WARN_ON_ONCE(!req->mr)) 1483 return -EAGAIN; 1484 1485 nr = ib_map_mr_sg_pi(req->mr, sgl->sg_table.sgl, count, NULL, 1486 req->metadata_sgl->sg_table.sgl, pi_count, NULL, 1487 SZ_4K); 1488 if (unlikely(nr)) 1489 goto mr_put; 1490 1491 nvme_rdma_set_sig_attrs(blk_get_integrity(bio->bi_bdev->bd_disk), c, 1492 req->mr->sig_attrs, ns->pi_type); 1493 nvme_rdma_set_prot_checks(c, &req->mr->sig_attrs->check_mask); 1494 1495 ib_update_fast_reg_key(req->mr, ib_inc_rkey(req->mr->rkey)); 1496 1497 req->reg_cqe.done = nvme_rdma_sig_done; 1498 memset(wr, 0, sizeof(*wr)); 1499 wr->wr.opcode = IB_WR_REG_MR_INTEGRITY; 1500 wr->wr.wr_cqe = &req->reg_cqe; 1501 wr->wr.num_sge = 0; 1502 wr->wr.send_flags = 0; 1503 wr->mr = req->mr; 1504 wr->key = req->mr->rkey; 1505 wr->access = IB_ACCESS_LOCAL_WRITE | 1506 IB_ACCESS_REMOTE_READ | 1507 IB_ACCESS_REMOTE_WRITE; 1508 1509 sg->addr = cpu_to_le64(req->mr->iova); 1510 put_unaligned_le24(req->mr->length, sg->length); 1511 put_unaligned_le32(req->mr->rkey, sg->key); 1512 sg->type = NVME_KEY_SGL_FMT_DATA_DESC << 4; 1513 1514 return 0; 1515 1516 mr_put: 1517 ib_mr_pool_put(queue->qp, &queue->qp->sig_mrs, req->mr); 1518 req->mr = NULL; 1519 if (nr < 0) 1520 return nr; 1521 return -EINVAL; 1522 } 1523 1524 static int nvme_rdma_map_data(struct nvme_rdma_queue *queue, 1525 struct request *rq, struct nvme_command *c) 1526 { 1527 struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); 1528 struct nvme_rdma_device *dev = queue->device; 1529 struct ib_device *ibdev = dev->dev; 1530 int pi_count = 0; 1531 int count, ret; 1532 1533 req->num_sge = 1; 1534 refcount_set(&req->ref, 2); /* send and recv completions */ 1535 1536 c->common.flags |= NVME_CMD_SGL_METABUF; 1537 1538 if (!blk_rq_nr_phys_segments(rq)) 1539 return nvme_rdma_set_sg_null(c); 1540 1541 req->data_sgl.sg_table.sgl = (struct scatterlist *)(req + 1); 1542 ret = sg_alloc_table_chained(&req->data_sgl.sg_table, 1543 blk_rq_nr_phys_segments(rq), req->data_sgl.sg_table.sgl, 1544 NVME_INLINE_SG_CNT); 1545 if (ret) 1546 return -ENOMEM; 1547 1548 req->data_sgl.nents = blk_rq_map_sg(rq->q, rq, 1549 req->data_sgl.sg_table.sgl); 1550 1551 count = ib_dma_map_sg(ibdev, req->data_sgl.sg_table.sgl, 1552 req->data_sgl.nents, rq_dma_dir(rq)); 1553 if (unlikely(count <= 0)) { 1554 ret = -EIO; 1555 goto out_free_table; 1556 } 1557 1558 if (blk_integrity_rq(rq)) { 1559 req->metadata_sgl->sg_table.sgl = 1560 (struct scatterlist *)(req->metadata_sgl + 1); 1561 ret = sg_alloc_table_chained(&req->metadata_sgl->sg_table, 1562 blk_rq_count_integrity_sg(rq->q, rq->bio), 1563 req->metadata_sgl->sg_table.sgl, 1564 NVME_INLINE_METADATA_SG_CNT); 1565 if (unlikely(ret)) { 1566 ret = -ENOMEM; 1567 goto out_unmap_sg; 1568 } 1569 1570 req->metadata_sgl->nents = blk_rq_map_integrity_sg(rq->q, 1571 rq->bio, req->metadata_sgl->sg_table.sgl); 1572 pi_count = ib_dma_map_sg(ibdev, 1573 req->metadata_sgl->sg_table.sgl, 1574 req->metadata_sgl->nents, 1575 rq_dma_dir(rq)); 1576 if (unlikely(pi_count <= 0)) { 1577 ret = -EIO; 1578 goto out_free_pi_table; 1579 } 1580 } 1581 1582 if (req->use_sig_mr) { 1583 ret = nvme_rdma_map_sg_pi(queue, req, c, count, pi_count); 1584 goto out; 1585 } 1586 1587 if (count <= dev->num_inline_segments) { 1588 if (rq_data_dir(rq) == WRITE && nvme_rdma_queue_idx(queue) && 1589 queue->ctrl->use_inline_data && 1590 blk_rq_payload_bytes(rq) <= 1591 nvme_rdma_inline_data_size(queue)) { 1592 ret = nvme_rdma_map_sg_inline(queue, req, c, count); 1593 goto out; 1594 } 1595 1596 if (count == 1 && dev->pd->flags & IB_PD_UNSAFE_GLOBAL_RKEY) { 1597 ret = nvme_rdma_map_sg_single(queue, req, c); 1598 goto out; 1599 } 1600 } 1601 1602 ret = nvme_rdma_map_sg_fr(queue, req, c, count); 1603 out: 1604 if (unlikely(ret)) 1605 goto out_unmap_pi_sg; 1606 1607 return 0; 1608 1609 out_unmap_pi_sg: 1610 if (blk_integrity_rq(rq)) 1611 ib_dma_unmap_sg(ibdev, req->metadata_sgl->sg_table.sgl, 1612 req->metadata_sgl->nents, rq_dma_dir(rq)); 1613 out_free_pi_table: 1614 if (blk_integrity_rq(rq)) 1615 sg_free_table_chained(&req->metadata_sgl->sg_table, 1616 NVME_INLINE_METADATA_SG_CNT); 1617 out_unmap_sg: 1618 ib_dma_unmap_sg(ibdev, req->data_sgl.sg_table.sgl, req->data_sgl.nents, 1619 rq_dma_dir(rq)); 1620 out_free_table: 1621 sg_free_table_chained(&req->data_sgl.sg_table, NVME_INLINE_SG_CNT); 1622 return ret; 1623 } 1624 1625 static void nvme_rdma_send_done(struct ib_cq *cq, struct ib_wc *wc) 1626 { 1627 struct nvme_rdma_qe *qe = 1628 container_of(wc->wr_cqe, struct nvme_rdma_qe, cqe); 1629 struct nvme_rdma_request *req = 1630 container_of(qe, struct nvme_rdma_request, sqe); 1631 1632 if (unlikely(wc->status != IB_WC_SUCCESS)) 1633 nvme_rdma_wr_error(cq, wc, "SEND"); 1634 else 1635 nvme_rdma_end_request(req); 1636 } 1637 1638 static int nvme_rdma_post_send(struct nvme_rdma_queue *queue, 1639 struct nvme_rdma_qe *qe, struct ib_sge *sge, u32 num_sge, 1640 struct ib_send_wr *first) 1641 { 1642 struct ib_send_wr wr; 1643 int ret; 1644 1645 sge->addr = qe->dma; 1646 sge->length = sizeof(struct nvme_command); 1647 sge->lkey = queue->device->pd->local_dma_lkey; 1648 1649 wr.next = NULL; 1650 wr.wr_cqe = &qe->cqe; 1651 wr.sg_list = sge; 1652 wr.num_sge = num_sge; 1653 wr.opcode = IB_WR_SEND; 1654 wr.send_flags = IB_SEND_SIGNALED; 1655 1656 if (first) 1657 first->next = ≀ 1658 else 1659 first = ≀ 1660 1661 ret = ib_post_send(queue->qp, first, NULL); 1662 if (unlikely(ret)) { 1663 dev_err(queue->ctrl->ctrl.device, 1664 "%s failed with error code %d\n", __func__, ret); 1665 } 1666 return ret; 1667 } 1668 1669 static int nvme_rdma_post_recv(struct nvme_rdma_queue *queue, 1670 struct nvme_rdma_qe *qe) 1671 { 1672 struct ib_recv_wr wr; 1673 struct ib_sge list; 1674 int ret; 1675 1676 list.addr = qe->dma; 1677 list.length = sizeof(struct nvme_completion); 1678 list.lkey = queue->device->pd->local_dma_lkey; 1679 1680 qe->cqe.done = nvme_rdma_recv_done; 1681 1682 wr.next = NULL; 1683 wr.wr_cqe = &qe->cqe; 1684 wr.sg_list = &list; 1685 wr.num_sge = 1; 1686 1687 ret = ib_post_recv(queue->qp, &wr, NULL); 1688 if (unlikely(ret)) { 1689 dev_err(queue->ctrl->ctrl.device, 1690 "%s failed with error code %d\n", __func__, ret); 1691 } 1692 return ret; 1693 } 1694 1695 static struct blk_mq_tags *nvme_rdma_tagset(struct nvme_rdma_queue *queue) 1696 { 1697 u32 queue_idx = nvme_rdma_queue_idx(queue); 1698 1699 if (queue_idx == 0) 1700 return queue->ctrl->admin_tag_set.tags[queue_idx]; 1701 return queue->ctrl->tag_set.tags[queue_idx - 1]; 1702 } 1703 1704 static void nvme_rdma_async_done(struct ib_cq *cq, struct ib_wc *wc) 1705 { 1706 if (unlikely(wc->status != IB_WC_SUCCESS)) 1707 nvme_rdma_wr_error(cq, wc, "ASYNC"); 1708 } 1709 1710 static void nvme_rdma_submit_async_event(struct nvme_ctrl *arg) 1711 { 1712 struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(arg); 1713 struct nvme_rdma_queue *queue = &ctrl->queues[0]; 1714 struct ib_device *dev = queue->device->dev; 1715 struct nvme_rdma_qe *sqe = &ctrl->async_event_sqe; 1716 struct nvme_command *cmd = sqe->data; 1717 struct ib_sge sge; 1718 int ret; 1719 1720 ib_dma_sync_single_for_cpu(dev, sqe->dma, sizeof(*cmd), DMA_TO_DEVICE); 1721 1722 memset(cmd, 0, sizeof(*cmd)); 1723 cmd->common.opcode = nvme_admin_async_event; 1724 cmd->common.command_id = NVME_AQ_BLK_MQ_DEPTH; 1725 cmd->common.flags |= NVME_CMD_SGL_METABUF; 1726 nvme_rdma_set_sg_null(cmd); 1727 1728 sqe->cqe.done = nvme_rdma_async_done; 1729 1730 ib_dma_sync_single_for_device(dev, sqe->dma, sizeof(*cmd), 1731 DMA_TO_DEVICE); 1732 1733 ret = nvme_rdma_post_send(queue, sqe, &sge, 1, NULL); 1734 WARN_ON_ONCE(ret); 1735 } 1736 1737 static void nvme_rdma_process_nvme_rsp(struct nvme_rdma_queue *queue, 1738 struct nvme_completion *cqe, struct ib_wc *wc) 1739 { 1740 struct request *rq; 1741 struct nvme_rdma_request *req; 1742 1743 rq = nvme_find_rq(nvme_rdma_tagset(queue), cqe->command_id); 1744 if (!rq) { 1745 dev_err(queue->ctrl->ctrl.device, 1746 "got bad command_id %#x on QP %#x\n", 1747 cqe->command_id, queue->qp->qp_num); 1748 nvme_rdma_error_recovery(queue->ctrl); 1749 return; 1750 } 1751 req = blk_mq_rq_to_pdu(rq); 1752 1753 req->status = cqe->status; 1754 req->result = cqe->result; 1755 1756 if (wc->wc_flags & IB_WC_WITH_INVALIDATE) { 1757 if (unlikely(!req->mr || 1758 wc->ex.invalidate_rkey != req->mr->rkey)) { 1759 dev_err(queue->ctrl->ctrl.device, 1760 "Bogus remote invalidation for rkey %#x\n", 1761 req->mr ? req->mr->rkey : 0); 1762 nvme_rdma_error_recovery(queue->ctrl); 1763 } 1764 } else if (req->mr) { 1765 int ret; 1766 1767 ret = nvme_rdma_inv_rkey(queue, req); 1768 if (unlikely(ret < 0)) { 1769 dev_err(queue->ctrl->ctrl.device, 1770 "Queueing INV WR for rkey %#x failed (%d)\n", 1771 req->mr->rkey, ret); 1772 nvme_rdma_error_recovery(queue->ctrl); 1773 } 1774 /* the local invalidation completion will end the request */ 1775 return; 1776 } 1777 1778 nvme_rdma_end_request(req); 1779 } 1780 1781 static void nvme_rdma_recv_done(struct ib_cq *cq, struct ib_wc *wc) 1782 { 1783 struct nvme_rdma_qe *qe = 1784 container_of(wc->wr_cqe, struct nvme_rdma_qe, cqe); 1785 struct nvme_rdma_queue *queue = wc->qp->qp_context; 1786 struct ib_device *ibdev = queue->device->dev; 1787 struct nvme_completion *cqe = qe->data; 1788 const size_t len = sizeof(struct nvme_completion); 1789 1790 if (unlikely(wc->status != IB_WC_SUCCESS)) { 1791 nvme_rdma_wr_error(cq, wc, "RECV"); 1792 return; 1793 } 1794 1795 /* sanity checking for received data length */ 1796 if (unlikely(wc->byte_len < len)) { 1797 dev_err(queue->ctrl->ctrl.device, 1798 "Unexpected nvme completion length(%d)\n", wc->byte_len); 1799 nvme_rdma_error_recovery(queue->ctrl); 1800 return; 1801 } 1802 1803 ib_dma_sync_single_for_cpu(ibdev, qe->dma, len, DMA_FROM_DEVICE); 1804 /* 1805 * AEN requests are special as they don't time out and can 1806 * survive any kind of queue freeze and often don't respond to 1807 * aborts. We don't even bother to allocate a struct request 1808 * for them but rather special case them here. 1809 */ 1810 if (unlikely(nvme_is_aen_req(nvme_rdma_queue_idx(queue), 1811 cqe->command_id))) 1812 nvme_complete_async_event(&queue->ctrl->ctrl, cqe->status, 1813 &cqe->result); 1814 else 1815 nvme_rdma_process_nvme_rsp(queue, cqe, wc); 1816 ib_dma_sync_single_for_device(ibdev, qe->dma, len, DMA_FROM_DEVICE); 1817 1818 nvme_rdma_post_recv(queue, qe); 1819 } 1820 1821 static int nvme_rdma_conn_established(struct nvme_rdma_queue *queue) 1822 { 1823 int ret, i; 1824 1825 for (i = 0; i < queue->queue_size; i++) { 1826 ret = nvme_rdma_post_recv(queue, &queue->rsp_ring[i]); 1827 if (ret) 1828 return ret; 1829 } 1830 1831 return 0; 1832 } 1833 1834 static int nvme_rdma_conn_rejected(struct nvme_rdma_queue *queue, 1835 struct rdma_cm_event *ev) 1836 { 1837 struct rdma_cm_id *cm_id = queue->cm_id; 1838 int status = ev->status; 1839 const char *rej_msg; 1840 const struct nvme_rdma_cm_rej *rej_data; 1841 u8 rej_data_len; 1842 1843 rej_msg = rdma_reject_msg(cm_id, status); 1844 rej_data = rdma_consumer_reject_data(cm_id, ev, &rej_data_len); 1845 1846 if (rej_data && rej_data_len >= sizeof(u16)) { 1847 u16 sts = le16_to_cpu(rej_data->sts); 1848 1849 dev_err(queue->ctrl->ctrl.device, 1850 "Connect rejected: status %d (%s) nvme status %d (%s).\n", 1851 status, rej_msg, sts, nvme_rdma_cm_msg(sts)); 1852 } else { 1853 dev_err(queue->ctrl->ctrl.device, 1854 "Connect rejected: status %d (%s).\n", status, rej_msg); 1855 } 1856 1857 return -ECONNRESET; 1858 } 1859 1860 static int nvme_rdma_addr_resolved(struct nvme_rdma_queue *queue) 1861 { 1862 struct nvme_ctrl *ctrl = &queue->ctrl->ctrl; 1863 int ret; 1864 1865 ret = nvme_rdma_create_queue_ib(queue); 1866 if (ret) 1867 return ret; 1868 1869 if (ctrl->opts->tos >= 0) 1870 rdma_set_service_type(queue->cm_id, ctrl->opts->tos); 1871 ret = rdma_resolve_route(queue->cm_id, NVME_RDMA_CONNECT_TIMEOUT_MS); 1872 if (ret) { 1873 dev_err(ctrl->device, "rdma_resolve_route failed (%d).\n", 1874 queue->cm_error); 1875 goto out_destroy_queue; 1876 } 1877 1878 return 0; 1879 1880 out_destroy_queue: 1881 nvme_rdma_destroy_queue_ib(queue); 1882 return ret; 1883 } 1884 1885 static int nvme_rdma_route_resolved(struct nvme_rdma_queue *queue) 1886 { 1887 struct nvme_rdma_ctrl *ctrl = queue->ctrl; 1888 struct rdma_conn_param param = { }; 1889 struct nvme_rdma_cm_req priv = { }; 1890 int ret; 1891 1892 param.qp_num = queue->qp->qp_num; 1893 param.flow_control = 1; 1894 1895 param.responder_resources = queue->device->dev->attrs.max_qp_rd_atom; 1896 /* maximum retry count */ 1897 param.retry_count = 7; 1898 param.rnr_retry_count = 7; 1899 param.private_data = &priv; 1900 param.private_data_len = sizeof(priv); 1901 1902 priv.recfmt = cpu_to_le16(NVME_RDMA_CM_FMT_1_0); 1903 priv.qid = cpu_to_le16(nvme_rdma_queue_idx(queue)); 1904 /* 1905 * set the admin queue depth to the minimum size 1906 * specified by the Fabrics standard. 1907 */ 1908 if (priv.qid == 0) { 1909 priv.hrqsize = cpu_to_le16(NVME_AQ_DEPTH); 1910 priv.hsqsize = cpu_to_le16(NVME_AQ_DEPTH - 1); 1911 } else { 1912 /* 1913 * current interpretation of the fabrics spec 1914 * is at minimum you make hrqsize sqsize+1, or a 1915 * 1's based representation of sqsize. 1916 */ 1917 priv.hrqsize = cpu_to_le16(queue->queue_size); 1918 priv.hsqsize = cpu_to_le16(queue->ctrl->ctrl.sqsize); 1919 } 1920 1921 ret = rdma_connect_locked(queue->cm_id, ¶m); 1922 if (ret) { 1923 dev_err(ctrl->ctrl.device, 1924 "rdma_connect_locked failed (%d).\n", ret); 1925 return ret; 1926 } 1927 1928 return 0; 1929 } 1930 1931 static int nvme_rdma_cm_handler(struct rdma_cm_id *cm_id, 1932 struct rdma_cm_event *ev) 1933 { 1934 struct nvme_rdma_queue *queue = cm_id->context; 1935 int cm_error = 0; 1936 1937 dev_dbg(queue->ctrl->ctrl.device, "%s (%d): status %d id %p\n", 1938 rdma_event_msg(ev->event), ev->event, 1939 ev->status, cm_id); 1940 1941 switch (ev->event) { 1942 case RDMA_CM_EVENT_ADDR_RESOLVED: 1943 cm_error = nvme_rdma_addr_resolved(queue); 1944 break; 1945 case RDMA_CM_EVENT_ROUTE_RESOLVED: 1946 cm_error = nvme_rdma_route_resolved(queue); 1947 break; 1948 case RDMA_CM_EVENT_ESTABLISHED: 1949 queue->cm_error = nvme_rdma_conn_established(queue); 1950 /* complete cm_done regardless of success/failure */ 1951 complete(&queue->cm_done); 1952 return 0; 1953 case RDMA_CM_EVENT_REJECTED: 1954 cm_error = nvme_rdma_conn_rejected(queue, ev); 1955 break; 1956 case RDMA_CM_EVENT_ROUTE_ERROR: 1957 case RDMA_CM_EVENT_CONNECT_ERROR: 1958 case RDMA_CM_EVENT_UNREACHABLE: 1959 case RDMA_CM_EVENT_ADDR_ERROR: 1960 dev_dbg(queue->ctrl->ctrl.device, 1961 "CM error event %d\n", ev->event); 1962 cm_error = -ECONNRESET; 1963 break; 1964 case RDMA_CM_EVENT_DISCONNECTED: 1965 case RDMA_CM_EVENT_ADDR_CHANGE: 1966 case RDMA_CM_EVENT_TIMEWAIT_EXIT: 1967 dev_dbg(queue->ctrl->ctrl.device, 1968 "disconnect received - connection closed\n"); 1969 nvme_rdma_error_recovery(queue->ctrl); 1970 break; 1971 case RDMA_CM_EVENT_DEVICE_REMOVAL: 1972 /* device removal is handled via the ib_client API */ 1973 break; 1974 default: 1975 dev_err(queue->ctrl->ctrl.device, 1976 "Unexpected RDMA CM event (%d)\n", ev->event); 1977 nvme_rdma_error_recovery(queue->ctrl); 1978 break; 1979 } 1980 1981 if (cm_error) { 1982 queue->cm_error = cm_error; 1983 complete(&queue->cm_done); 1984 } 1985 1986 return 0; 1987 } 1988 1989 static void nvme_rdma_complete_timed_out(struct request *rq) 1990 { 1991 struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); 1992 struct nvme_rdma_queue *queue = req->queue; 1993 1994 nvme_rdma_stop_queue(queue); 1995 if (blk_mq_request_started(rq) && !blk_mq_request_completed(rq)) { 1996 nvme_req(rq)->status = NVME_SC_HOST_ABORTED_CMD; 1997 blk_mq_complete_request(rq); 1998 } 1999 } 2000 2001 static enum blk_eh_timer_return 2002 nvme_rdma_timeout(struct request *rq, bool reserved) 2003 { 2004 struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); 2005 struct nvme_rdma_queue *queue = req->queue; 2006 struct nvme_rdma_ctrl *ctrl = queue->ctrl; 2007 2008 dev_warn(ctrl->ctrl.device, "I/O %d QID %d timeout\n", 2009 rq->tag, nvme_rdma_queue_idx(queue)); 2010 2011 if (ctrl->ctrl.state != NVME_CTRL_LIVE) { 2012 /* 2013 * If we are resetting, connecting or deleting we should 2014 * complete immediately because we may block controller 2015 * teardown or setup sequence 2016 * - ctrl disable/shutdown fabrics requests 2017 * - connect requests 2018 * - initialization admin requests 2019 * - I/O requests that entered after unquiescing and 2020 * the controller stopped responding 2021 * 2022 * All other requests should be cancelled by the error 2023 * recovery work, so it's fine that we fail it here. 2024 */ 2025 nvme_rdma_complete_timed_out(rq); 2026 return BLK_EH_DONE; 2027 } 2028 2029 /* 2030 * LIVE state should trigger the normal error recovery which will 2031 * handle completing this request. 2032 */ 2033 nvme_rdma_error_recovery(ctrl); 2034 return BLK_EH_RESET_TIMER; 2035 } 2036 2037 static blk_status_t nvme_rdma_queue_rq(struct blk_mq_hw_ctx *hctx, 2038 const struct blk_mq_queue_data *bd) 2039 { 2040 struct nvme_ns *ns = hctx->queue->queuedata; 2041 struct nvme_rdma_queue *queue = hctx->driver_data; 2042 struct request *rq = bd->rq; 2043 struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); 2044 struct nvme_rdma_qe *sqe = &req->sqe; 2045 struct nvme_command *c = nvme_req(rq)->cmd; 2046 struct ib_device *dev; 2047 bool queue_ready = test_bit(NVME_RDMA_Q_LIVE, &queue->flags); 2048 blk_status_t ret; 2049 int err; 2050 2051 WARN_ON_ONCE(rq->tag < 0); 2052 2053 if (!nvme_check_ready(&queue->ctrl->ctrl, rq, queue_ready)) 2054 return nvme_fail_nonready_command(&queue->ctrl->ctrl, rq); 2055 2056 dev = queue->device->dev; 2057 2058 req->sqe.dma = ib_dma_map_single(dev, req->sqe.data, 2059 sizeof(struct nvme_command), 2060 DMA_TO_DEVICE); 2061 err = ib_dma_mapping_error(dev, req->sqe.dma); 2062 if (unlikely(err)) 2063 return BLK_STS_RESOURCE; 2064 2065 ib_dma_sync_single_for_cpu(dev, sqe->dma, 2066 sizeof(struct nvme_command), DMA_TO_DEVICE); 2067 2068 ret = nvme_setup_cmd(ns, rq); 2069 if (ret) 2070 goto unmap_qe; 2071 2072 blk_mq_start_request(rq); 2073 2074 if (IS_ENABLED(CONFIG_BLK_DEV_INTEGRITY) && 2075 queue->pi_support && 2076 (c->common.opcode == nvme_cmd_write || 2077 c->common.opcode == nvme_cmd_read) && 2078 nvme_ns_has_pi(ns)) 2079 req->use_sig_mr = true; 2080 else 2081 req->use_sig_mr = false; 2082 2083 err = nvme_rdma_map_data(queue, rq, c); 2084 if (unlikely(err < 0)) { 2085 dev_err(queue->ctrl->ctrl.device, 2086 "Failed to map data (%d)\n", err); 2087 goto err; 2088 } 2089 2090 sqe->cqe.done = nvme_rdma_send_done; 2091 2092 ib_dma_sync_single_for_device(dev, sqe->dma, 2093 sizeof(struct nvme_command), DMA_TO_DEVICE); 2094 2095 err = nvme_rdma_post_send(queue, sqe, req->sge, req->num_sge, 2096 req->mr ? &req->reg_wr.wr : NULL); 2097 if (unlikely(err)) 2098 goto err_unmap; 2099 2100 return BLK_STS_OK; 2101 2102 err_unmap: 2103 nvme_rdma_unmap_data(queue, rq); 2104 err: 2105 if (err == -EIO) 2106 ret = nvme_host_path_error(rq); 2107 else if (err == -ENOMEM || err == -EAGAIN) 2108 ret = BLK_STS_RESOURCE; 2109 else 2110 ret = BLK_STS_IOERR; 2111 nvme_cleanup_cmd(rq); 2112 unmap_qe: 2113 ib_dma_unmap_single(dev, req->sqe.dma, sizeof(struct nvme_command), 2114 DMA_TO_DEVICE); 2115 return ret; 2116 } 2117 2118 static int nvme_rdma_poll(struct blk_mq_hw_ctx *hctx, struct io_comp_batch *iob) 2119 { 2120 struct nvme_rdma_queue *queue = hctx->driver_data; 2121 2122 return ib_process_cq_direct(queue->ib_cq, -1); 2123 } 2124 2125 static void nvme_rdma_check_pi_status(struct nvme_rdma_request *req) 2126 { 2127 struct request *rq = blk_mq_rq_from_pdu(req); 2128 struct ib_mr_status mr_status; 2129 int ret; 2130 2131 ret = ib_check_mr_status(req->mr, IB_MR_CHECK_SIG_STATUS, &mr_status); 2132 if (ret) { 2133 pr_err("ib_check_mr_status failed, ret %d\n", ret); 2134 nvme_req(rq)->status = NVME_SC_INVALID_PI; 2135 return; 2136 } 2137 2138 if (mr_status.fail_status & IB_MR_CHECK_SIG_STATUS) { 2139 switch (mr_status.sig_err.err_type) { 2140 case IB_SIG_BAD_GUARD: 2141 nvme_req(rq)->status = NVME_SC_GUARD_CHECK; 2142 break; 2143 case IB_SIG_BAD_REFTAG: 2144 nvme_req(rq)->status = NVME_SC_REFTAG_CHECK; 2145 break; 2146 case IB_SIG_BAD_APPTAG: 2147 nvme_req(rq)->status = NVME_SC_APPTAG_CHECK; 2148 break; 2149 } 2150 pr_err("PI error found type %d expected 0x%x vs actual 0x%x\n", 2151 mr_status.sig_err.err_type, mr_status.sig_err.expected, 2152 mr_status.sig_err.actual); 2153 } 2154 } 2155 2156 static void nvme_rdma_complete_rq(struct request *rq) 2157 { 2158 struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); 2159 struct nvme_rdma_queue *queue = req->queue; 2160 struct ib_device *ibdev = queue->device->dev; 2161 2162 if (req->use_sig_mr) 2163 nvme_rdma_check_pi_status(req); 2164 2165 nvme_rdma_unmap_data(queue, rq); 2166 ib_dma_unmap_single(ibdev, req->sqe.dma, sizeof(struct nvme_command), 2167 DMA_TO_DEVICE); 2168 nvme_complete_rq(rq); 2169 } 2170 2171 static int nvme_rdma_map_queues(struct blk_mq_tag_set *set) 2172 { 2173 struct nvme_rdma_ctrl *ctrl = set->driver_data; 2174 struct nvmf_ctrl_options *opts = ctrl->ctrl.opts; 2175 2176 if (opts->nr_write_queues && ctrl->io_queues[HCTX_TYPE_READ]) { 2177 /* separate read/write queues */ 2178 set->map[HCTX_TYPE_DEFAULT].nr_queues = 2179 ctrl->io_queues[HCTX_TYPE_DEFAULT]; 2180 set->map[HCTX_TYPE_DEFAULT].queue_offset = 0; 2181 set->map[HCTX_TYPE_READ].nr_queues = 2182 ctrl->io_queues[HCTX_TYPE_READ]; 2183 set->map[HCTX_TYPE_READ].queue_offset = 2184 ctrl->io_queues[HCTX_TYPE_DEFAULT]; 2185 } else { 2186 /* shared read/write queues */ 2187 set->map[HCTX_TYPE_DEFAULT].nr_queues = 2188 ctrl->io_queues[HCTX_TYPE_DEFAULT]; 2189 set->map[HCTX_TYPE_DEFAULT].queue_offset = 0; 2190 set->map[HCTX_TYPE_READ].nr_queues = 2191 ctrl->io_queues[HCTX_TYPE_DEFAULT]; 2192 set->map[HCTX_TYPE_READ].queue_offset = 0; 2193 } 2194 blk_mq_rdma_map_queues(&set->map[HCTX_TYPE_DEFAULT], 2195 ctrl->device->dev, 0); 2196 blk_mq_rdma_map_queues(&set->map[HCTX_TYPE_READ], 2197 ctrl->device->dev, 0); 2198 2199 if (opts->nr_poll_queues && ctrl->io_queues[HCTX_TYPE_POLL]) { 2200 /* map dedicated poll queues only if we have queues left */ 2201 set->map[HCTX_TYPE_POLL].nr_queues = 2202 ctrl->io_queues[HCTX_TYPE_POLL]; 2203 set->map[HCTX_TYPE_POLL].queue_offset = 2204 ctrl->io_queues[HCTX_TYPE_DEFAULT] + 2205 ctrl->io_queues[HCTX_TYPE_READ]; 2206 blk_mq_map_queues(&set->map[HCTX_TYPE_POLL]); 2207 } 2208 2209 dev_info(ctrl->ctrl.device, 2210 "mapped %d/%d/%d default/read/poll queues.\n", 2211 ctrl->io_queues[HCTX_TYPE_DEFAULT], 2212 ctrl->io_queues[HCTX_TYPE_READ], 2213 ctrl->io_queues[HCTX_TYPE_POLL]); 2214 2215 return 0; 2216 } 2217 2218 static const struct blk_mq_ops nvme_rdma_mq_ops = { 2219 .queue_rq = nvme_rdma_queue_rq, 2220 .complete = nvme_rdma_complete_rq, 2221 .init_request = nvme_rdma_init_request, 2222 .exit_request = nvme_rdma_exit_request, 2223 .init_hctx = nvme_rdma_init_hctx, 2224 .timeout = nvme_rdma_timeout, 2225 .map_queues = nvme_rdma_map_queues, 2226 .poll = nvme_rdma_poll, 2227 }; 2228 2229 static const struct blk_mq_ops nvme_rdma_admin_mq_ops = { 2230 .queue_rq = nvme_rdma_queue_rq, 2231 .complete = nvme_rdma_complete_rq, 2232 .init_request = nvme_rdma_init_request, 2233 .exit_request = nvme_rdma_exit_request, 2234 .init_hctx = nvme_rdma_init_admin_hctx, 2235 .timeout = nvme_rdma_timeout, 2236 }; 2237 2238 static void nvme_rdma_shutdown_ctrl(struct nvme_rdma_ctrl *ctrl, bool shutdown) 2239 { 2240 cancel_work_sync(&ctrl->err_work); 2241 cancel_delayed_work_sync(&ctrl->reconnect_work); 2242 2243 nvme_rdma_teardown_io_queues(ctrl, shutdown); 2244 nvme_stop_admin_queue(&ctrl->ctrl); 2245 if (shutdown) 2246 nvme_shutdown_ctrl(&ctrl->ctrl); 2247 else 2248 nvme_disable_ctrl(&ctrl->ctrl); 2249 nvme_rdma_teardown_admin_queue(ctrl, shutdown); 2250 } 2251 2252 static void nvme_rdma_delete_ctrl(struct nvme_ctrl *ctrl) 2253 { 2254 nvme_rdma_shutdown_ctrl(to_rdma_ctrl(ctrl), true); 2255 } 2256 2257 static void nvme_rdma_reset_ctrl_work(struct work_struct *work) 2258 { 2259 struct nvme_rdma_ctrl *ctrl = 2260 container_of(work, struct nvme_rdma_ctrl, ctrl.reset_work); 2261 2262 nvme_stop_ctrl(&ctrl->ctrl); 2263 nvme_rdma_shutdown_ctrl(ctrl, false); 2264 2265 if (!nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_CONNECTING)) { 2266 /* state change failure should never happen */ 2267 WARN_ON_ONCE(1); 2268 return; 2269 } 2270 2271 if (nvme_rdma_setup_ctrl(ctrl, false)) 2272 goto out_fail; 2273 2274 return; 2275 2276 out_fail: 2277 ++ctrl->ctrl.nr_reconnects; 2278 nvme_rdma_reconnect_or_remove(ctrl); 2279 } 2280 2281 static const struct nvme_ctrl_ops nvme_rdma_ctrl_ops = { 2282 .name = "rdma", 2283 .module = THIS_MODULE, 2284 .flags = NVME_F_FABRICS | NVME_F_METADATA_SUPPORTED, 2285 .reg_read32 = nvmf_reg_read32, 2286 .reg_read64 = nvmf_reg_read64, 2287 .reg_write32 = nvmf_reg_write32, 2288 .free_ctrl = nvme_rdma_free_ctrl, 2289 .submit_async_event = nvme_rdma_submit_async_event, 2290 .delete_ctrl = nvme_rdma_delete_ctrl, 2291 .get_address = nvmf_get_address, 2292 }; 2293 2294 /* 2295 * Fails a connection request if it matches an existing controller 2296 * (association) with the same tuple: 2297 * <Host NQN, Host ID, local address, remote address, remote port, SUBSYS NQN> 2298 * 2299 * if local address is not specified in the request, it will match an 2300 * existing controller with all the other parameters the same and no 2301 * local port address specified as well. 2302 * 2303 * The ports don't need to be compared as they are intrinsically 2304 * already matched by the port pointers supplied. 2305 */ 2306 static bool 2307 nvme_rdma_existing_controller(struct nvmf_ctrl_options *opts) 2308 { 2309 struct nvme_rdma_ctrl *ctrl; 2310 bool found = false; 2311 2312 mutex_lock(&nvme_rdma_ctrl_mutex); 2313 list_for_each_entry(ctrl, &nvme_rdma_ctrl_list, list) { 2314 found = nvmf_ip_options_match(&ctrl->ctrl, opts); 2315 if (found) 2316 break; 2317 } 2318 mutex_unlock(&nvme_rdma_ctrl_mutex); 2319 2320 return found; 2321 } 2322 2323 static struct nvme_ctrl *nvme_rdma_create_ctrl(struct device *dev, 2324 struct nvmf_ctrl_options *opts) 2325 { 2326 struct nvme_rdma_ctrl *ctrl; 2327 int ret; 2328 bool changed; 2329 2330 ctrl = kzalloc(sizeof(*ctrl), GFP_KERNEL); 2331 if (!ctrl) 2332 return ERR_PTR(-ENOMEM); 2333 ctrl->ctrl.opts = opts; 2334 INIT_LIST_HEAD(&ctrl->list); 2335 2336 if (!(opts->mask & NVMF_OPT_TRSVCID)) { 2337 opts->trsvcid = 2338 kstrdup(__stringify(NVME_RDMA_IP_PORT), GFP_KERNEL); 2339 if (!opts->trsvcid) { 2340 ret = -ENOMEM; 2341 goto out_free_ctrl; 2342 } 2343 opts->mask |= NVMF_OPT_TRSVCID; 2344 } 2345 2346 ret = inet_pton_with_scope(&init_net, AF_UNSPEC, 2347 opts->traddr, opts->trsvcid, &ctrl->addr); 2348 if (ret) { 2349 pr_err("malformed address passed: %s:%s\n", 2350 opts->traddr, opts->trsvcid); 2351 goto out_free_ctrl; 2352 } 2353 2354 if (opts->mask & NVMF_OPT_HOST_TRADDR) { 2355 ret = inet_pton_with_scope(&init_net, AF_UNSPEC, 2356 opts->host_traddr, NULL, &ctrl->src_addr); 2357 if (ret) { 2358 pr_err("malformed src address passed: %s\n", 2359 opts->host_traddr); 2360 goto out_free_ctrl; 2361 } 2362 } 2363 2364 if (!opts->duplicate_connect && nvme_rdma_existing_controller(opts)) { 2365 ret = -EALREADY; 2366 goto out_free_ctrl; 2367 } 2368 2369 INIT_DELAYED_WORK(&ctrl->reconnect_work, 2370 nvme_rdma_reconnect_ctrl_work); 2371 INIT_WORK(&ctrl->err_work, nvme_rdma_error_recovery_work); 2372 INIT_WORK(&ctrl->ctrl.reset_work, nvme_rdma_reset_ctrl_work); 2373 2374 ctrl->ctrl.queue_count = opts->nr_io_queues + opts->nr_write_queues + 2375 opts->nr_poll_queues + 1; 2376 ctrl->ctrl.sqsize = opts->queue_size - 1; 2377 ctrl->ctrl.kato = opts->kato; 2378 2379 ret = -ENOMEM; 2380 ctrl->queues = kcalloc(ctrl->ctrl.queue_count, sizeof(*ctrl->queues), 2381 GFP_KERNEL); 2382 if (!ctrl->queues) 2383 goto out_free_ctrl; 2384 2385 ret = nvme_init_ctrl(&ctrl->ctrl, dev, &nvme_rdma_ctrl_ops, 2386 0 /* no quirks, we're perfect! */); 2387 if (ret) 2388 goto out_kfree_queues; 2389 2390 changed = nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_CONNECTING); 2391 WARN_ON_ONCE(!changed); 2392 2393 ret = nvme_rdma_setup_ctrl(ctrl, true); 2394 if (ret) 2395 goto out_uninit_ctrl; 2396 2397 dev_info(ctrl->ctrl.device, "new ctrl: NQN \"%s\", addr %pISpcs\n", 2398 nvmf_ctrl_subsysnqn(&ctrl->ctrl), &ctrl->addr); 2399 2400 mutex_lock(&nvme_rdma_ctrl_mutex); 2401 list_add_tail(&ctrl->list, &nvme_rdma_ctrl_list); 2402 mutex_unlock(&nvme_rdma_ctrl_mutex); 2403 2404 return &ctrl->ctrl; 2405 2406 out_uninit_ctrl: 2407 nvme_uninit_ctrl(&ctrl->ctrl); 2408 nvme_put_ctrl(&ctrl->ctrl); 2409 if (ret > 0) 2410 ret = -EIO; 2411 return ERR_PTR(ret); 2412 out_kfree_queues: 2413 kfree(ctrl->queues); 2414 out_free_ctrl: 2415 kfree(ctrl); 2416 return ERR_PTR(ret); 2417 } 2418 2419 static struct nvmf_transport_ops nvme_rdma_transport = { 2420 .name = "rdma", 2421 .module = THIS_MODULE, 2422 .required_opts = NVMF_OPT_TRADDR, 2423 .allowed_opts = NVMF_OPT_TRSVCID | NVMF_OPT_RECONNECT_DELAY | 2424 NVMF_OPT_HOST_TRADDR | NVMF_OPT_CTRL_LOSS_TMO | 2425 NVMF_OPT_NR_WRITE_QUEUES | NVMF_OPT_NR_POLL_QUEUES | 2426 NVMF_OPT_TOS, 2427 .create_ctrl = nvme_rdma_create_ctrl, 2428 }; 2429 2430 static void nvme_rdma_remove_one(struct ib_device *ib_device, void *client_data) 2431 { 2432 struct nvme_rdma_ctrl *ctrl; 2433 struct nvme_rdma_device *ndev; 2434 bool found = false; 2435 2436 mutex_lock(&device_list_mutex); 2437 list_for_each_entry(ndev, &device_list, entry) { 2438 if (ndev->dev == ib_device) { 2439 found = true; 2440 break; 2441 } 2442 } 2443 mutex_unlock(&device_list_mutex); 2444 2445 if (!found) 2446 return; 2447 2448 /* Delete all controllers using this device */ 2449 mutex_lock(&nvme_rdma_ctrl_mutex); 2450 list_for_each_entry(ctrl, &nvme_rdma_ctrl_list, list) { 2451 if (ctrl->device->dev != ib_device) 2452 continue; 2453 nvme_delete_ctrl(&ctrl->ctrl); 2454 } 2455 mutex_unlock(&nvme_rdma_ctrl_mutex); 2456 2457 flush_workqueue(nvme_delete_wq); 2458 } 2459 2460 static struct ib_client nvme_rdma_ib_client = { 2461 .name = "nvme_rdma", 2462 .remove = nvme_rdma_remove_one 2463 }; 2464 2465 static int __init nvme_rdma_init_module(void) 2466 { 2467 int ret; 2468 2469 ret = ib_register_client(&nvme_rdma_ib_client); 2470 if (ret) 2471 return ret; 2472 2473 ret = nvmf_register_transport(&nvme_rdma_transport); 2474 if (ret) 2475 goto err_unreg_client; 2476 2477 return 0; 2478 2479 err_unreg_client: 2480 ib_unregister_client(&nvme_rdma_ib_client); 2481 return ret; 2482 } 2483 2484 static void __exit nvme_rdma_cleanup_module(void) 2485 { 2486 struct nvme_rdma_ctrl *ctrl; 2487 2488 nvmf_unregister_transport(&nvme_rdma_transport); 2489 ib_unregister_client(&nvme_rdma_ib_client); 2490 2491 mutex_lock(&nvme_rdma_ctrl_mutex); 2492 list_for_each_entry(ctrl, &nvme_rdma_ctrl_list, list) 2493 nvme_delete_ctrl(&ctrl->ctrl); 2494 mutex_unlock(&nvme_rdma_ctrl_mutex); 2495 flush_workqueue(nvme_delete_wq); 2496 } 2497 2498 module_init(nvme_rdma_init_module); 2499 module_exit(nvme_rdma_cleanup_module); 2500 2501 MODULE_LICENSE("GPL v2"); 2502