1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * NVMe over Fabrics RDMA host code. 4 * Copyright (c) 2015-2016 HGST, a Western Digital Company. 5 */ 6 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 7 #include <linux/module.h> 8 #include <linux/init.h> 9 #include <linux/slab.h> 10 #include <rdma/mr_pool.h> 11 #include <linux/err.h> 12 #include <linux/string.h> 13 #include <linux/atomic.h> 14 #include <linux/blk-mq.h> 15 #include <linux/blk-mq-rdma.h> 16 #include <linux/types.h> 17 #include <linux/list.h> 18 #include <linux/mutex.h> 19 #include <linux/scatterlist.h> 20 #include <linux/nvme.h> 21 #include <asm/unaligned.h> 22 23 #include <rdma/ib_verbs.h> 24 #include <rdma/rdma_cm.h> 25 #include <linux/nvme-rdma.h> 26 27 #include "nvme.h" 28 #include "fabrics.h" 29 30 31 #define NVME_RDMA_CONNECT_TIMEOUT_MS 3000 /* 3 second */ 32 33 #define NVME_RDMA_MAX_SEGMENTS 256 34 35 #define NVME_RDMA_MAX_INLINE_SEGMENTS 4 36 37 #define NVME_RDMA_DATA_SGL_SIZE \ 38 (sizeof(struct scatterlist) * NVME_INLINE_SG_CNT) 39 #define NVME_RDMA_METADATA_SGL_SIZE \ 40 (sizeof(struct scatterlist) * NVME_INLINE_METADATA_SG_CNT) 41 42 struct nvme_rdma_device { 43 struct ib_device *dev; 44 struct ib_pd *pd; 45 struct kref ref; 46 struct list_head entry; 47 unsigned int num_inline_segments; 48 }; 49 50 struct nvme_rdma_qe { 51 struct ib_cqe cqe; 52 void *data; 53 u64 dma; 54 }; 55 56 struct nvme_rdma_sgl { 57 int nents; 58 struct sg_table sg_table; 59 }; 60 61 struct nvme_rdma_queue; 62 struct nvme_rdma_request { 63 struct nvme_request req; 64 struct ib_mr *mr; 65 struct nvme_rdma_qe sqe; 66 union nvme_result result; 67 __le16 status; 68 refcount_t ref; 69 struct ib_sge sge[1 + NVME_RDMA_MAX_INLINE_SEGMENTS]; 70 u32 num_sge; 71 struct ib_reg_wr reg_wr; 72 struct ib_cqe reg_cqe; 73 struct nvme_rdma_queue *queue; 74 struct nvme_rdma_sgl data_sgl; 75 struct nvme_rdma_sgl *metadata_sgl; 76 bool use_sig_mr; 77 }; 78 79 enum nvme_rdma_queue_flags { 80 NVME_RDMA_Q_ALLOCATED = 0, 81 NVME_RDMA_Q_LIVE = 1, 82 NVME_RDMA_Q_TR_READY = 2, 83 }; 84 85 struct nvme_rdma_queue { 86 struct nvme_rdma_qe *rsp_ring; 87 int queue_size; 88 size_t cmnd_capsule_len; 89 struct nvme_rdma_ctrl *ctrl; 90 struct nvme_rdma_device *device; 91 struct ib_cq *ib_cq; 92 struct ib_qp *qp; 93 94 unsigned long flags; 95 struct rdma_cm_id *cm_id; 96 int cm_error; 97 struct completion cm_done; 98 bool pi_support; 99 }; 100 101 struct nvme_rdma_ctrl { 102 /* read only in the hot path */ 103 struct nvme_rdma_queue *queues; 104 105 /* other member variables */ 106 struct blk_mq_tag_set tag_set; 107 struct work_struct err_work; 108 109 struct nvme_rdma_qe async_event_sqe; 110 111 struct delayed_work reconnect_work; 112 113 struct list_head list; 114 115 struct blk_mq_tag_set admin_tag_set; 116 struct nvme_rdma_device *device; 117 118 u32 max_fr_pages; 119 120 struct sockaddr_storage addr; 121 struct sockaddr_storage src_addr; 122 123 struct nvme_ctrl ctrl; 124 bool use_inline_data; 125 u32 io_queues[HCTX_MAX_TYPES]; 126 }; 127 128 static inline struct nvme_rdma_ctrl *to_rdma_ctrl(struct nvme_ctrl *ctrl) 129 { 130 return container_of(ctrl, struct nvme_rdma_ctrl, ctrl); 131 } 132 133 static LIST_HEAD(device_list); 134 static DEFINE_MUTEX(device_list_mutex); 135 136 static LIST_HEAD(nvme_rdma_ctrl_list); 137 static DEFINE_MUTEX(nvme_rdma_ctrl_mutex); 138 139 /* 140 * Disabling this option makes small I/O goes faster, but is fundamentally 141 * unsafe. With it turned off we will have to register a global rkey that 142 * allows read and write access to all physical memory. 143 */ 144 static bool register_always = true; 145 module_param(register_always, bool, 0444); 146 MODULE_PARM_DESC(register_always, 147 "Use memory registration even for contiguous memory regions"); 148 149 static int nvme_rdma_cm_handler(struct rdma_cm_id *cm_id, 150 struct rdma_cm_event *event); 151 static void nvme_rdma_recv_done(struct ib_cq *cq, struct ib_wc *wc); 152 static void nvme_rdma_complete_rq(struct request *rq); 153 154 static const struct blk_mq_ops nvme_rdma_mq_ops; 155 static const struct blk_mq_ops nvme_rdma_admin_mq_ops; 156 157 static inline int nvme_rdma_queue_idx(struct nvme_rdma_queue *queue) 158 { 159 return queue - queue->ctrl->queues; 160 } 161 162 static bool nvme_rdma_poll_queue(struct nvme_rdma_queue *queue) 163 { 164 return nvme_rdma_queue_idx(queue) > 165 queue->ctrl->io_queues[HCTX_TYPE_DEFAULT] + 166 queue->ctrl->io_queues[HCTX_TYPE_READ]; 167 } 168 169 static inline size_t nvme_rdma_inline_data_size(struct nvme_rdma_queue *queue) 170 { 171 return queue->cmnd_capsule_len - sizeof(struct nvme_command); 172 } 173 174 static void nvme_rdma_free_qe(struct ib_device *ibdev, struct nvme_rdma_qe *qe, 175 size_t capsule_size, enum dma_data_direction dir) 176 { 177 ib_dma_unmap_single(ibdev, qe->dma, capsule_size, dir); 178 kfree(qe->data); 179 } 180 181 static int nvme_rdma_alloc_qe(struct ib_device *ibdev, struct nvme_rdma_qe *qe, 182 size_t capsule_size, enum dma_data_direction dir) 183 { 184 qe->data = kzalloc(capsule_size, GFP_KERNEL); 185 if (!qe->data) 186 return -ENOMEM; 187 188 qe->dma = ib_dma_map_single(ibdev, qe->data, capsule_size, dir); 189 if (ib_dma_mapping_error(ibdev, qe->dma)) { 190 kfree(qe->data); 191 qe->data = NULL; 192 return -ENOMEM; 193 } 194 195 return 0; 196 } 197 198 static void nvme_rdma_free_ring(struct ib_device *ibdev, 199 struct nvme_rdma_qe *ring, size_t ib_queue_size, 200 size_t capsule_size, enum dma_data_direction dir) 201 { 202 int i; 203 204 for (i = 0; i < ib_queue_size; i++) 205 nvme_rdma_free_qe(ibdev, &ring[i], capsule_size, dir); 206 kfree(ring); 207 } 208 209 static struct nvme_rdma_qe *nvme_rdma_alloc_ring(struct ib_device *ibdev, 210 size_t ib_queue_size, size_t capsule_size, 211 enum dma_data_direction dir) 212 { 213 struct nvme_rdma_qe *ring; 214 int i; 215 216 ring = kcalloc(ib_queue_size, sizeof(struct nvme_rdma_qe), GFP_KERNEL); 217 if (!ring) 218 return NULL; 219 220 /* 221 * Bind the CQEs (post recv buffers) DMA mapping to the RDMA queue 222 * lifetime. It's safe, since any chage in the underlying RDMA device 223 * will issue error recovery and queue re-creation. 224 */ 225 for (i = 0; i < ib_queue_size; i++) { 226 if (nvme_rdma_alloc_qe(ibdev, &ring[i], capsule_size, dir)) 227 goto out_free_ring; 228 } 229 230 return ring; 231 232 out_free_ring: 233 nvme_rdma_free_ring(ibdev, ring, i, capsule_size, dir); 234 return NULL; 235 } 236 237 static void nvme_rdma_qp_event(struct ib_event *event, void *context) 238 { 239 pr_debug("QP event %s (%d)\n", 240 ib_event_msg(event->event), event->event); 241 242 } 243 244 static int nvme_rdma_wait_for_cm(struct nvme_rdma_queue *queue) 245 { 246 int ret; 247 248 ret = wait_for_completion_interruptible_timeout(&queue->cm_done, 249 msecs_to_jiffies(NVME_RDMA_CONNECT_TIMEOUT_MS) + 1); 250 if (ret < 0) 251 return ret; 252 if (ret == 0) 253 return -ETIMEDOUT; 254 WARN_ON_ONCE(queue->cm_error > 0); 255 return queue->cm_error; 256 } 257 258 static int nvme_rdma_create_qp(struct nvme_rdma_queue *queue, const int factor) 259 { 260 struct nvme_rdma_device *dev = queue->device; 261 struct ib_qp_init_attr init_attr; 262 int ret; 263 264 memset(&init_attr, 0, sizeof(init_attr)); 265 init_attr.event_handler = nvme_rdma_qp_event; 266 /* +1 for drain */ 267 init_attr.cap.max_send_wr = factor * queue->queue_size + 1; 268 /* +1 for drain */ 269 init_attr.cap.max_recv_wr = queue->queue_size + 1; 270 init_attr.cap.max_recv_sge = 1; 271 init_attr.cap.max_send_sge = 1 + dev->num_inline_segments; 272 init_attr.sq_sig_type = IB_SIGNAL_REQ_WR; 273 init_attr.qp_type = IB_QPT_RC; 274 init_attr.send_cq = queue->ib_cq; 275 init_attr.recv_cq = queue->ib_cq; 276 if (queue->pi_support) 277 init_attr.create_flags |= IB_QP_CREATE_INTEGRITY_EN; 278 279 ret = rdma_create_qp(queue->cm_id, dev->pd, &init_attr); 280 281 queue->qp = queue->cm_id->qp; 282 return ret; 283 } 284 285 static void nvme_rdma_exit_request(struct blk_mq_tag_set *set, 286 struct request *rq, unsigned int hctx_idx) 287 { 288 struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); 289 290 kfree(req->sqe.data); 291 } 292 293 static int nvme_rdma_init_request(struct blk_mq_tag_set *set, 294 struct request *rq, unsigned int hctx_idx, 295 unsigned int numa_node) 296 { 297 struct nvme_rdma_ctrl *ctrl = set->driver_data; 298 struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); 299 int queue_idx = (set == &ctrl->tag_set) ? hctx_idx + 1 : 0; 300 struct nvme_rdma_queue *queue = &ctrl->queues[queue_idx]; 301 302 nvme_req(rq)->ctrl = &ctrl->ctrl; 303 req->sqe.data = kzalloc(sizeof(struct nvme_command), GFP_KERNEL); 304 if (!req->sqe.data) 305 return -ENOMEM; 306 307 /* metadata nvme_rdma_sgl struct is located after command's data SGL */ 308 if (queue->pi_support) 309 req->metadata_sgl = (void *)nvme_req(rq) + 310 sizeof(struct nvme_rdma_request) + 311 NVME_RDMA_DATA_SGL_SIZE; 312 313 req->queue = queue; 314 315 return 0; 316 } 317 318 static int nvme_rdma_init_hctx(struct blk_mq_hw_ctx *hctx, void *data, 319 unsigned int hctx_idx) 320 { 321 struct nvme_rdma_ctrl *ctrl = data; 322 struct nvme_rdma_queue *queue = &ctrl->queues[hctx_idx + 1]; 323 324 BUG_ON(hctx_idx >= ctrl->ctrl.queue_count); 325 326 hctx->driver_data = queue; 327 return 0; 328 } 329 330 static int nvme_rdma_init_admin_hctx(struct blk_mq_hw_ctx *hctx, void *data, 331 unsigned int hctx_idx) 332 { 333 struct nvme_rdma_ctrl *ctrl = data; 334 struct nvme_rdma_queue *queue = &ctrl->queues[0]; 335 336 BUG_ON(hctx_idx != 0); 337 338 hctx->driver_data = queue; 339 return 0; 340 } 341 342 static void nvme_rdma_free_dev(struct kref *ref) 343 { 344 struct nvme_rdma_device *ndev = 345 container_of(ref, struct nvme_rdma_device, ref); 346 347 mutex_lock(&device_list_mutex); 348 list_del(&ndev->entry); 349 mutex_unlock(&device_list_mutex); 350 351 ib_dealloc_pd(ndev->pd); 352 kfree(ndev); 353 } 354 355 static void nvme_rdma_dev_put(struct nvme_rdma_device *dev) 356 { 357 kref_put(&dev->ref, nvme_rdma_free_dev); 358 } 359 360 static int nvme_rdma_dev_get(struct nvme_rdma_device *dev) 361 { 362 return kref_get_unless_zero(&dev->ref); 363 } 364 365 static struct nvme_rdma_device * 366 nvme_rdma_find_get_device(struct rdma_cm_id *cm_id) 367 { 368 struct nvme_rdma_device *ndev; 369 370 mutex_lock(&device_list_mutex); 371 list_for_each_entry(ndev, &device_list, entry) { 372 if (ndev->dev->node_guid == cm_id->device->node_guid && 373 nvme_rdma_dev_get(ndev)) 374 goto out_unlock; 375 } 376 377 ndev = kzalloc(sizeof(*ndev), GFP_KERNEL); 378 if (!ndev) 379 goto out_err; 380 381 ndev->dev = cm_id->device; 382 kref_init(&ndev->ref); 383 384 ndev->pd = ib_alloc_pd(ndev->dev, 385 register_always ? 0 : IB_PD_UNSAFE_GLOBAL_RKEY); 386 if (IS_ERR(ndev->pd)) 387 goto out_free_dev; 388 389 if (!(ndev->dev->attrs.device_cap_flags & 390 IB_DEVICE_MEM_MGT_EXTENSIONS)) { 391 dev_err(&ndev->dev->dev, 392 "Memory registrations not supported.\n"); 393 goto out_free_pd; 394 } 395 396 ndev->num_inline_segments = min(NVME_RDMA_MAX_INLINE_SEGMENTS, 397 ndev->dev->attrs.max_send_sge - 1); 398 list_add(&ndev->entry, &device_list); 399 out_unlock: 400 mutex_unlock(&device_list_mutex); 401 return ndev; 402 403 out_free_pd: 404 ib_dealloc_pd(ndev->pd); 405 out_free_dev: 406 kfree(ndev); 407 out_err: 408 mutex_unlock(&device_list_mutex); 409 return NULL; 410 } 411 412 static void nvme_rdma_destroy_queue_ib(struct nvme_rdma_queue *queue) 413 { 414 struct nvme_rdma_device *dev; 415 struct ib_device *ibdev; 416 417 if (!test_and_clear_bit(NVME_RDMA_Q_TR_READY, &queue->flags)) 418 return; 419 420 dev = queue->device; 421 ibdev = dev->dev; 422 423 if (queue->pi_support) 424 ib_mr_pool_destroy(queue->qp, &queue->qp->sig_mrs); 425 ib_mr_pool_destroy(queue->qp, &queue->qp->rdma_mrs); 426 427 /* 428 * The cm_id object might have been destroyed during RDMA connection 429 * establishment error flow to avoid getting other cma events, thus 430 * the destruction of the QP shouldn't use rdma_cm API. 431 */ 432 ib_destroy_qp(queue->qp); 433 ib_free_cq(queue->ib_cq); 434 435 nvme_rdma_free_ring(ibdev, queue->rsp_ring, queue->queue_size, 436 sizeof(struct nvme_completion), DMA_FROM_DEVICE); 437 438 nvme_rdma_dev_put(dev); 439 } 440 441 static int nvme_rdma_get_max_fr_pages(struct ib_device *ibdev, bool pi_support) 442 { 443 u32 max_page_list_len; 444 445 if (pi_support) 446 max_page_list_len = ibdev->attrs.max_pi_fast_reg_page_list_len; 447 else 448 max_page_list_len = ibdev->attrs.max_fast_reg_page_list_len; 449 450 return min_t(u32, NVME_RDMA_MAX_SEGMENTS, max_page_list_len - 1); 451 } 452 453 static int nvme_rdma_create_queue_ib(struct nvme_rdma_queue *queue) 454 { 455 struct ib_device *ibdev; 456 const int send_wr_factor = 3; /* MR, SEND, INV */ 457 const int cq_factor = send_wr_factor + 1; /* + RECV */ 458 int comp_vector, idx = nvme_rdma_queue_idx(queue); 459 enum ib_poll_context poll_ctx; 460 int ret, pages_per_mr; 461 462 queue->device = nvme_rdma_find_get_device(queue->cm_id); 463 if (!queue->device) { 464 dev_err(queue->cm_id->device->dev.parent, 465 "no client data found!\n"); 466 return -ECONNREFUSED; 467 } 468 ibdev = queue->device->dev; 469 470 /* 471 * Spread I/O queues completion vectors according their queue index. 472 * Admin queues can always go on completion vector 0. 473 */ 474 comp_vector = (idx == 0 ? idx : idx - 1) % ibdev->num_comp_vectors; 475 476 /* Polling queues need direct cq polling context */ 477 if (nvme_rdma_poll_queue(queue)) 478 poll_ctx = IB_POLL_DIRECT; 479 else 480 poll_ctx = IB_POLL_SOFTIRQ; 481 482 /* +1 for ib_stop_cq */ 483 queue->ib_cq = ib_alloc_cq(ibdev, queue, 484 cq_factor * queue->queue_size + 1, 485 comp_vector, poll_ctx); 486 if (IS_ERR(queue->ib_cq)) { 487 ret = PTR_ERR(queue->ib_cq); 488 goto out_put_dev; 489 } 490 491 ret = nvme_rdma_create_qp(queue, send_wr_factor); 492 if (ret) 493 goto out_destroy_ib_cq; 494 495 queue->rsp_ring = nvme_rdma_alloc_ring(ibdev, queue->queue_size, 496 sizeof(struct nvme_completion), DMA_FROM_DEVICE); 497 if (!queue->rsp_ring) { 498 ret = -ENOMEM; 499 goto out_destroy_qp; 500 } 501 502 /* 503 * Currently we don't use SG_GAPS MR's so if the first entry is 504 * misaligned we'll end up using two entries for a single data page, 505 * so one additional entry is required. 506 */ 507 pages_per_mr = nvme_rdma_get_max_fr_pages(ibdev, queue->pi_support) + 1; 508 ret = ib_mr_pool_init(queue->qp, &queue->qp->rdma_mrs, 509 queue->queue_size, 510 IB_MR_TYPE_MEM_REG, 511 pages_per_mr, 0); 512 if (ret) { 513 dev_err(queue->ctrl->ctrl.device, 514 "failed to initialize MR pool sized %d for QID %d\n", 515 queue->queue_size, idx); 516 goto out_destroy_ring; 517 } 518 519 if (queue->pi_support) { 520 ret = ib_mr_pool_init(queue->qp, &queue->qp->sig_mrs, 521 queue->queue_size, IB_MR_TYPE_INTEGRITY, 522 pages_per_mr, pages_per_mr); 523 if (ret) { 524 dev_err(queue->ctrl->ctrl.device, 525 "failed to initialize PI MR pool sized %d for QID %d\n", 526 queue->queue_size, idx); 527 goto out_destroy_mr_pool; 528 } 529 } 530 531 set_bit(NVME_RDMA_Q_TR_READY, &queue->flags); 532 533 return 0; 534 535 out_destroy_mr_pool: 536 ib_mr_pool_destroy(queue->qp, &queue->qp->rdma_mrs); 537 out_destroy_ring: 538 nvme_rdma_free_ring(ibdev, queue->rsp_ring, queue->queue_size, 539 sizeof(struct nvme_completion), DMA_FROM_DEVICE); 540 out_destroy_qp: 541 rdma_destroy_qp(queue->cm_id); 542 out_destroy_ib_cq: 543 ib_free_cq(queue->ib_cq); 544 out_put_dev: 545 nvme_rdma_dev_put(queue->device); 546 return ret; 547 } 548 549 static int nvme_rdma_alloc_queue(struct nvme_rdma_ctrl *ctrl, 550 int idx, size_t queue_size) 551 { 552 struct nvme_rdma_queue *queue; 553 struct sockaddr *src_addr = NULL; 554 int ret; 555 556 queue = &ctrl->queues[idx]; 557 queue->ctrl = ctrl; 558 if (idx && ctrl->ctrl.max_integrity_segments) 559 queue->pi_support = true; 560 else 561 queue->pi_support = false; 562 init_completion(&queue->cm_done); 563 564 if (idx > 0) 565 queue->cmnd_capsule_len = ctrl->ctrl.ioccsz * 16; 566 else 567 queue->cmnd_capsule_len = sizeof(struct nvme_command); 568 569 queue->queue_size = queue_size; 570 571 queue->cm_id = rdma_create_id(&init_net, nvme_rdma_cm_handler, queue, 572 RDMA_PS_TCP, IB_QPT_RC); 573 if (IS_ERR(queue->cm_id)) { 574 dev_info(ctrl->ctrl.device, 575 "failed to create CM ID: %ld\n", PTR_ERR(queue->cm_id)); 576 return PTR_ERR(queue->cm_id); 577 } 578 579 if (ctrl->ctrl.opts->mask & NVMF_OPT_HOST_TRADDR) 580 src_addr = (struct sockaddr *)&ctrl->src_addr; 581 582 queue->cm_error = -ETIMEDOUT; 583 ret = rdma_resolve_addr(queue->cm_id, src_addr, 584 (struct sockaddr *)&ctrl->addr, 585 NVME_RDMA_CONNECT_TIMEOUT_MS); 586 if (ret) { 587 dev_info(ctrl->ctrl.device, 588 "rdma_resolve_addr failed (%d).\n", ret); 589 goto out_destroy_cm_id; 590 } 591 592 ret = nvme_rdma_wait_for_cm(queue); 593 if (ret) { 594 dev_info(ctrl->ctrl.device, 595 "rdma connection establishment failed (%d)\n", ret); 596 goto out_destroy_cm_id; 597 } 598 599 set_bit(NVME_RDMA_Q_ALLOCATED, &queue->flags); 600 601 return 0; 602 603 out_destroy_cm_id: 604 rdma_destroy_id(queue->cm_id); 605 nvme_rdma_destroy_queue_ib(queue); 606 return ret; 607 } 608 609 static void __nvme_rdma_stop_queue(struct nvme_rdma_queue *queue) 610 { 611 rdma_disconnect(queue->cm_id); 612 ib_drain_qp(queue->qp); 613 } 614 615 static void nvme_rdma_stop_queue(struct nvme_rdma_queue *queue) 616 { 617 if (!test_and_clear_bit(NVME_RDMA_Q_LIVE, &queue->flags)) 618 return; 619 __nvme_rdma_stop_queue(queue); 620 } 621 622 static void nvme_rdma_free_queue(struct nvme_rdma_queue *queue) 623 { 624 if (!test_and_clear_bit(NVME_RDMA_Q_ALLOCATED, &queue->flags)) 625 return; 626 627 nvme_rdma_destroy_queue_ib(queue); 628 rdma_destroy_id(queue->cm_id); 629 } 630 631 static void nvme_rdma_free_io_queues(struct nvme_rdma_ctrl *ctrl) 632 { 633 int i; 634 635 for (i = 1; i < ctrl->ctrl.queue_count; i++) 636 nvme_rdma_free_queue(&ctrl->queues[i]); 637 } 638 639 static void nvme_rdma_stop_io_queues(struct nvme_rdma_ctrl *ctrl) 640 { 641 int i; 642 643 for (i = 1; i < ctrl->ctrl.queue_count; i++) 644 nvme_rdma_stop_queue(&ctrl->queues[i]); 645 } 646 647 static int nvme_rdma_start_queue(struct nvme_rdma_ctrl *ctrl, int idx) 648 { 649 struct nvme_rdma_queue *queue = &ctrl->queues[idx]; 650 bool poll = nvme_rdma_poll_queue(queue); 651 int ret; 652 653 if (idx) 654 ret = nvmf_connect_io_queue(&ctrl->ctrl, idx, poll); 655 else 656 ret = nvmf_connect_admin_queue(&ctrl->ctrl); 657 658 if (!ret) { 659 set_bit(NVME_RDMA_Q_LIVE, &queue->flags); 660 } else { 661 if (test_bit(NVME_RDMA_Q_ALLOCATED, &queue->flags)) 662 __nvme_rdma_stop_queue(queue); 663 dev_info(ctrl->ctrl.device, 664 "failed to connect queue: %d ret=%d\n", idx, ret); 665 } 666 return ret; 667 } 668 669 static int nvme_rdma_start_io_queues(struct nvme_rdma_ctrl *ctrl) 670 { 671 int i, ret = 0; 672 673 for (i = 1; i < ctrl->ctrl.queue_count; i++) { 674 ret = nvme_rdma_start_queue(ctrl, i); 675 if (ret) 676 goto out_stop_queues; 677 } 678 679 return 0; 680 681 out_stop_queues: 682 for (i--; i >= 1; i--) 683 nvme_rdma_stop_queue(&ctrl->queues[i]); 684 return ret; 685 } 686 687 static int nvme_rdma_alloc_io_queues(struct nvme_rdma_ctrl *ctrl) 688 { 689 struct nvmf_ctrl_options *opts = ctrl->ctrl.opts; 690 struct ib_device *ibdev = ctrl->device->dev; 691 unsigned int nr_io_queues, nr_default_queues; 692 unsigned int nr_read_queues, nr_poll_queues; 693 int i, ret; 694 695 nr_read_queues = min_t(unsigned int, ibdev->num_comp_vectors, 696 min(opts->nr_io_queues, num_online_cpus())); 697 nr_default_queues = min_t(unsigned int, ibdev->num_comp_vectors, 698 min(opts->nr_write_queues, num_online_cpus())); 699 nr_poll_queues = min(opts->nr_poll_queues, num_online_cpus()); 700 nr_io_queues = nr_read_queues + nr_default_queues + nr_poll_queues; 701 702 ret = nvme_set_queue_count(&ctrl->ctrl, &nr_io_queues); 703 if (ret) 704 return ret; 705 706 ctrl->ctrl.queue_count = nr_io_queues + 1; 707 if (ctrl->ctrl.queue_count < 2) 708 return 0; 709 710 dev_info(ctrl->ctrl.device, 711 "creating %d I/O queues.\n", nr_io_queues); 712 713 if (opts->nr_write_queues && nr_read_queues < nr_io_queues) { 714 /* 715 * separate read/write queues 716 * hand out dedicated default queues only after we have 717 * sufficient read queues. 718 */ 719 ctrl->io_queues[HCTX_TYPE_READ] = nr_read_queues; 720 nr_io_queues -= ctrl->io_queues[HCTX_TYPE_READ]; 721 ctrl->io_queues[HCTX_TYPE_DEFAULT] = 722 min(nr_default_queues, nr_io_queues); 723 nr_io_queues -= ctrl->io_queues[HCTX_TYPE_DEFAULT]; 724 } else { 725 /* 726 * shared read/write queues 727 * either no write queues were requested, or we don't have 728 * sufficient queue count to have dedicated default queues. 729 */ 730 ctrl->io_queues[HCTX_TYPE_DEFAULT] = 731 min(nr_read_queues, nr_io_queues); 732 nr_io_queues -= ctrl->io_queues[HCTX_TYPE_DEFAULT]; 733 } 734 735 if (opts->nr_poll_queues && nr_io_queues) { 736 /* map dedicated poll queues only if we have queues left */ 737 ctrl->io_queues[HCTX_TYPE_POLL] = 738 min(nr_poll_queues, nr_io_queues); 739 } 740 741 for (i = 1; i < ctrl->ctrl.queue_count; i++) { 742 ret = nvme_rdma_alloc_queue(ctrl, i, 743 ctrl->ctrl.sqsize + 1); 744 if (ret) 745 goto out_free_queues; 746 } 747 748 return 0; 749 750 out_free_queues: 751 for (i--; i >= 1; i--) 752 nvme_rdma_free_queue(&ctrl->queues[i]); 753 754 return ret; 755 } 756 757 static struct blk_mq_tag_set *nvme_rdma_alloc_tagset(struct nvme_ctrl *nctrl, 758 bool admin) 759 { 760 struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(nctrl); 761 struct blk_mq_tag_set *set; 762 int ret; 763 764 if (admin) { 765 set = &ctrl->admin_tag_set; 766 memset(set, 0, sizeof(*set)); 767 set->ops = &nvme_rdma_admin_mq_ops; 768 set->queue_depth = NVME_AQ_MQ_TAG_DEPTH; 769 set->reserved_tags = 2; /* connect + keep-alive */ 770 set->numa_node = nctrl->numa_node; 771 set->cmd_size = sizeof(struct nvme_rdma_request) + 772 NVME_RDMA_DATA_SGL_SIZE; 773 set->driver_data = ctrl; 774 set->nr_hw_queues = 1; 775 set->timeout = ADMIN_TIMEOUT; 776 set->flags = BLK_MQ_F_NO_SCHED; 777 } else { 778 set = &ctrl->tag_set; 779 memset(set, 0, sizeof(*set)); 780 set->ops = &nvme_rdma_mq_ops; 781 set->queue_depth = nctrl->sqsize + 1; 782 set->reserved_tags = 1; /* fabric connect */ 783 set->numa_node = nctrl->numa_node; 784 set->flags = BLK_MQ_F_SHOULD_MERGE; 785 set->cmd_size = sizeof(struct nvme_rdma_request) + 786 NVME_RDMA_DATA_SGL_SIZE; 787 if (nctrl->max_integrity_segments) 788 set->cmd_size += sizeof(struct nvme_rdma_sgl) + 789 NVME_RDMA_METADATA_SGL_SIZE; 790 set->driver_data = ctrl; 791 set->nr_hw_queues = nctrl->queue_count - 1; 792 set->timeout = NVME_IO_TIMEOUT; 793 set->nr_maps = nctrl->opts->nr_poll_queues ? HCTX_MAX_TYPES : 2; 794 } 795 796 ret = blk_mq_alloc_tag_set(set); 797 if (ret) 798 return ERR_PTR(ret); 799 800 return set; 801 } 802 803 static void nvme_rdma_destroy_admin_queue(struct nvme_rdma_ctrl *ctrl, 804 bool remove) 805 { 806 if (remove) { 807 blk_cleanup_queue(ctrl->ctrl.admin_q); 808 blk_cleanup_queue(ctrl->ctrl.fabrics_q); 809 blk_mq_free_tag_set(ctrl->ctrl.admin_tagset); 810 } 811 if (ctrl->async_event_sqe.data) { 812 nvme_rdma_free_qe(ctrl->device->dev, &ctrl->async_event_sqe, 813 sizeof(struct nvme_command), DMA_TO_DEVICE); 814 ctrl->async_event_sqe.data = NULL; 815 } 816 nvme_rdma_free_queue(&ctrl->queues[0]); 817 } 818 819 static int nvme_rdma_configure_admin_queue(struct nvme_rdma_ctrl *ctrl, 820 bool new) 821 { 822 bool pi_capable = false; 823 int error; 824 825 error = nvme_rdma_alloc_queue(ctrl, 0, NVME_AQ_DEPTH); 826 if (error) 827 return error; 828 829 ctrl->device = ctrl->queues[0].device; 830 ctrl->ctrl.numa_node = dev_to_node(ctrl->device->dev->dma_device); 831 832 /* T10-PI support */ 833 if (ctrl->device->dev->attrs.device_cap_flags & 834 IB_DEVICE_INTEGRITY_HANDOVER) 835 pi_capable = true; 836 837 ctrl->max_fr_pages = nvme_rdma_get_max_fr_pages(ctrl->device->dev, 838 pi_capable); 839 840 /* 841 * Bind the async event SQE DMA mapping to the admin queue lifetime. 842 * It's safe, since any chage in the underlying RDMA device will issue 843 * error recovery and queue re-creation. 844 */ 845 error = nvme_rdma_alloc_qe(ctrl->device->dev, &ctrl->async_event_sqe, 846 sizeof(struct nvme_command), DMA_TO_DEVICE); 847 if (error) 848 goto out_free_queue; 849 850 if (new) { 851 ctrl->ctrl.admin_tagset = nvme_rdma_alloc_tagset(&ctrl->ctrl, true); 852 if (IS_ERR(ctrl->ctrl.admin_tagset)) { 853 error = PTR_ERR(ctrl->ctrl.admin_tagset); 854 goto out_free_async_qe; 855 } 856 857 ctrl->ctrl.fabrics_q = blk_mq_init_queue(&ctrl->admin_tag_set); 858 if (IS_ERR(ctrl->ctrl.fabrics_q)) { 859 error = PTR_ERR(ctrl->ctrl.fabrics_q); 860 goto out_free_tagset; 861 } 862 863 ctrl->ctrl.admin_q = blk_mq_init_queue(&ctrl->admin_tag_set); 864 if (IS_ERR(ctrl->ctrl.admin_q)) { 865 error = PTR_ERR(ctrl->ctrl.admin_q); 866 goto out_cleanup_fabrics_q; 867 } 868 } 869 870 error = nvme_rdma_start_queue(ctrl, 0); 871 if (error) 872 goto out_cleanup_queue; 873 874 error = nvme_enable_ctrl(&ctrl->ctrl); 875 if (error) 876 goto out_stop_queue; 877 878 ctrl->ctrl.max_segments = ctrl->max_fr_pages; 879 ctrl->ctrl.max_hw_sectors = ctrl->max_fr_pages << (ilog2(SZ_4K) - 9); 880 if (pi_capable) 881 ctrl->ctrl.max_integrity_segments = ctrl->max_fr_pages; 882 else 883 ctrl->ctrl.max_integrity_segments = 0; 884 885 blk_mq_unquiesce_queue(ctrl->ctrl.admin_q); 886 887 error = nvme_init_identify(&ctrl->ctrl); 888 if (error) 889 goto out_stop_queue; 890 891 return 0; 892 893 out_stop_queue: 894 nvme_rdma_stop_queue(&ctrl->queues[0]); 895 out_cleanup_queue: 896 if (new) 897 blk_cleanup_queue(ctrl->ctrl.admin_q); 898 out_cleanup_fabrics_q: 899 if (new) 900 blk_cleanup_queue(ctrl->ctrl.fabrics_q); 901 out_free_tagset: 902 if (new) 903 blk_mq_free_tag_set(ctrl->ctrl.admin_tagset); 904 out_free_async_qe: 905 if (ctrl->async_event_sqe.data) { 906 nvme_rdma_free_qe(ctrl->device->dev, &ctrl->async_event_sqe, 907 sizeof(struct nvme_command), DMA_TO_DEVICE); 908 ctrl->async_event_sqe.data = NULL; 909 } 910 out_free_queue: 911 nvme_rdma_free_queue(&ctrl->queues[0]); 912 return error; 913 } 914 915 static void nvme_rdma_destroy_io_queues(struct nvme_rdma_ctrl *ctrl, 916 bool remove) 917 { 918 if (remove) { 919 blk_cleanup_queue(ctrl->ctrl.connect_q); 920 blk_mq_free_tag_set(ctrl->ctrl.tagset); 921 } 922 nvme_rdma_free_io_queues(ctrl); 923 } 924 925 static int nvme_rdma_configure_io_queues(struct nvme_rdma_ctrl *ctrl, bool new) 926 { 927 int ret; 928 929 ret = nvme_rdma_alloc_io_queues(ctrl); 930 if (ret) 931 return ret; 932 933 if (new) { 934 ctrl->ctrl.tagset = nvme_rdma_alloc_tagset(&ctrl->ctrl, false); 935 if (IS_ERR(ctrl->ctrl.tagset)) { 936 ret = PTR_ERR(ctrl->ctrl.tagset); 937 goto out_free_io_queues; 938 } 939 940 ctrl->ctrl.connect_q = blk_mq_init_queue(&ctrl->tag_set); 941 if (IS_ERR(ctrl->ctrl.connect_q)) { 942 ret = PTR_ERR(ctrl->ctrl.connect_q); 943 goto out_free_tag_set; 944 } 945 } else { 946 blk_mq_update_nr_hw_queues(&ctrl->tag_set, 947 ctrl->ctrl.queue_count - 1); 948 } 949 950 ret = nvme_rdma_start_io_queues(ctrl); 951 if (ret) 952 goto out_cleanup_connect_q; 953 954 return 0; 955 956 out_cleanup_connect_q: 957 if (new) 958 blk_cleanup_queue(ctrl->ctrl.connect_q); 959 out_free_tag_set: 960 if (new) 961 blk_mq_free_tag_set(ctrl->ctrl.tagset); 962 out_free_io_queues: 963 nvme_rdma_free_io_queues(ctrl); 964 return ret; 965 } 966 967 static void nvme_rdma_teardown_admin_queue(struct nvme_rdma_ctrl *ctrl, 968 bool remove) 969 { 970 blk_mq_quiesce_queue(ctrl->ctrl.admin_q); 971 nvme_rdma_stop_queue(&ctrl->queues[0]); 972 if (ctrl->ctrl.admin_tagset) { 973 blk_mq_tagset_busy_iter(ctrl->ctrl.admin_tagset, 974 nvme_cancel_request, &ctrl->ctrl); 975 blk_mq_tagset_wait_completed_request(ctrl->ctrl.admin_tagset); 976 } 977 if (remove) 978 blk_mq_unquiesce_queue(ctrl->ctrl.admin_q); 979 nvme_rdma_destroy_admin_queue(ctrl, remove); 980 } 981 982 static void nvme_rdma_teardown_io_queues(struct nvme_rdma_ctrl *ctrl, 983 bool remove) 984 { 985 if (ctrl->ctrl.queue_count > 1) { 986 nvme_stop_queues(&ctrl->ctrl); 987 nvme_rdma_stop_io_queues(ctrl); 988 if (ctrl->ctrl.tagset) { 989 blk_mq_tagset_busy_iter(ctrl->ctrl.tagset, 990 nvme_cancel_request, &ctrl->ctrl); 991 blk_mq_tagset_wait_completed_request(ctrl->ctrl.tagset); 992 } 993 if (remove) 994 nvme_start_queues(&ctrl->ctrl); 995 nvme_rdma_destroy_io_queues(ctrl, remove); 996 } 997 } 998 999 static void nvme_rdma_free_ctrl(struct nvme_ctrl *nctrl) 1000 { 1001 struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(nctrl); 1002 1003 if (list_empty(&ctrl->list)) 1004 goto free_ctrl; 1005 1006 mutex_lock(&nvme_rdma_ctrl_mutex); 1007 list_del(&ctrl->list); 1008 mutex_unlock(&nvme_rdma_ctrl_mutex); 1009 1010 nvmf_free_options(nctrl->opts); 1011 free_ctrl: 1012 kfree(ctrl->queues); 1013 kfree(ctrl); 1014 } 1015 1016 static void nvme_rdma_reconnect_or_remove(struct nvme_rdma_ctrl *ctrl) 1017 { 1018 /* If we are resetting/deleting then do nothing */ 1019 if (ctrl->ctrl.state != NVME_CTRL_CONNECTING) { 1020 WARN_ON_ONCE(ctrl->ctrl.state == NVME_CTRL_NEW || 1021 ctrl->ctrl.state == NVME_CTRL_LIVE); 1022 return; 1023 } 1024 1025 if (nvmf_should_reconnect(&ctrl->ctrl)) { 1026 dev_info(ctrl->ctrl.device, "Reconnecting in %d seconds...\n", 1027 ctrl->ctrl.opts->reconnect_delay); 1028 queue_delayed_work(nvme_wq, &ctrl->reconnect_work, 1029 ctrl->ctrl.opts->reconnect_delay * HZ); 1030 } else { 1031 nvme_delete_ctrl(&ctrl->ctrl); 1032 } 1033 } 1034 1035 static int nvme_rdma_setup_ctrl(struct nvme_rdma_ctrl *ctrl, bool new) 1036 { 1037 int ret = -EINVAL; 1038 bool changed; 1039 1040 ret = nvme_rdma_configure_admin_queue(ctrl, new); 1041 if (ret) 1042 return ret; 1043 1044 if (ctrl->ctrl.icdoff) { 1045 dev_err(ctrl->ctrl.device, "icdoff is not supported!\n"); 1046 goto destroy_admin; 1047 } 1048 1049 if (!(ctrl->ctrl.sgls & (1 << 2))) { 1050 dev_err(ctrl->ctrl.device, 1051 "Mandatory keyed sgls are not supported!\n"); 1052 goto destroy_admin; 1053 } 1054 1055 if (ctrl->ctrl.opts->queue_size > ctrl->ctrl.sqsize + 1) { 1056 dev_warn(ctrl->ctrl.device, 1057 "queue_size %zu > ctrl sqsize %u, clamping down\n", 1058 ctrl->ctrl.opts->queue_size, ctrl->ctrl.sqsize + 1); 1059 } 1060 1061 if (ctrl->ctrl.sqsize + 1 > ctrl->ctrl.maxcmd) { 1062 dev_warn(ctrl->ctrl.device, 1063 "sqsize %u > ctrl maxcmd %u, clamping down\n", 1064 ctrl->ctrl.sqsize + 1, ctrl->ctrl.maxcmd); 1065 ctrl->ctrl.sqsize = ctrl->ctrl.maxcmd - 1; 1066 } 1067 1068 if (ctrl->ctrl.sgls & (1 << 20)) 1069 ctrl->use_inline_data = true; 1070 1071 if (ctrl->ctrl.queue_count > 1) { 1072 ret = nvme_rdma_configure_io_queues(ctrl, new); 1073 if (ret) 1074 goto destroy_admin; 1075 } 1076 1077 changed = nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_LIVE); 1078 if (!changed) { 1079 /* 1080 * state change failure is ok if we're in DELETING state, 1081 * unless we're during creation of a new controller to 1082 * avoid races with teardown flow. 1083 */ 1084 WARN_ON_ONCE(ctrl->ctrl.state != NVME_CTRL_DELETING); 1085 WARN_ON_ONCE(new); 1086 ret = -EINVAL; 1087 goto destroy_io; 1088 } 1089 1090 nvme_start_ctrl(&ctrl->ctrl); 1091 return 0; 1092 1093 destroy_io: 1094 if (ctrl->ctrl.queue_count > 1) 1095 nvme_rdma_destroy_io_queues(ctrl, new); 1096 destroy_admin: 1097 nvme_rdma_stop_queue(&ctrl->queues[0]); 1098 nvme_rdma_destroy_admin_queue(ctrl, new); 1099 return ret; 1100 } 1101 1102 static void nvme_rdma_reconnect_ctrl_work(struct work_struct *work) 1103 { 1104 struct nvme_rdma_ctrl *ctrl = container_of(to_delayed_work(work), 1105 struct nvme_rdma_ctrl, reconnect_work); 1106 1107 ++ctrl->ctrl.nr_reconnects; 1108 1109 if (nvme_rdma_setup_ctrl(ctrl, false)) 1110 goto requeue; 1111 1112 dev_info(ctrl->ctrl.device, "Successfully reconnected (%d attempts)\n", 1113 ctrl->ctrl.nr_reconnects); 1114 1115 ctrl->ctrl.nr_reconnects = 0; 1116 1117 return; 1118 1119 requeue: 1120 dev_info(ctrl->ctrl.device, "Failed reconnect attempt %d\n", 1121 ctrl->ctrl.nr_reconnects); 1122 nvme_rdma_reconnect_or_remove(ctrl); 1123 } 1124 1125 static void nvme_rdma_error_recovery_work(struct work_struct *work) 1126 { 1127 struct nvme_rdma_ctrl *ctrl = container_of(work, 1128 struct nvme_rdma_ctrl, err_work); 1129 1130 nvme_stop_keep_alive(&ctrl->ctrl); 1131 nvme_rdma_teardown_io_queues(ctrl, false); 1132 nvme_start_queues(&ctrl->ctrl); 1133 nvme_rdma_teardown_admin_queue(ctrl, false); 1134 blk_mq_unquiesce_queue(ctrl->ctrl.admin_q); 1135 1136 if (!nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_CONNECTING)) { 1137 /* state change failure is ok if we're in DELETING state */ 1138 WARN_ON_ONCE(ctrl->ctrl.state != NVME_CTRL_DELETING); 1139 return; 1140 } 1141 1142 nvme_rdma_reconnect_or_remove(ctrl); 1143 } 1144 1145 static void nvme_rdma_error_recovery(struct nvme_rdma_ctrl *ctrl) 1146 { 1147 if (!nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_RESETTING)) 1148 return; 1149 1150 queue_work(nvme_reset_wq, &ctrl->err_work); 1151 } 1152 1153 static void nvme_rdma_end_request(struct nvme_rdma_request *req) 1154 { 1155 struct request *rq = blk_mq_rq_from_pdu(req); 1156 1157 if (!refcount_dec_and_test(&req->ref)) 1158 return; 1159 if (!nvme_end_request(rq, req->status, req->result)) 1160 nvme_rdma_complete_rq(rq); 1161 } 1162 1163 static void nvme_rdma_wr_error(struct ib_cq *cq, struct ib_wc *wc, 1164 const char *op) 1165 { 1166 struct nvme_rdma_queue *queue = cq->cq_context; 1167 struct nvme_rdma_ctrl *ctrl = queue->ctrl; 1168 1169 if (ctrl->ctrl.state == NVME_CTRL_LIVE) 1170 dev_info(ctrl->ctrl.device, 1171 "%s for CQE 0x%p failed with status %s (%d)\n", 1172 op, wc->wr_cqe, 1173 ib_wc_status_msg(wc->status), wc->status); 1174 nvme_rdma_error_recovery(ctrl); 1175 } 1176 1177 static void nvme_rdma_memreg_done(struct ib_cq *cq, struct ib_wc *wc) 1178 { 1179 if (unlikely(wc->status != IB_WC_SUCCESS)) 1180 nvme_rdma_wr_error(cq, wc, "MEMREG"); 1181 } 1182 1183 static void nvme_rdma_inv_rkey_done(struct ib_cq *cq, struct ib_wc *wc) 1184 { 1185 struct nvme_rdma_request *req = 1186 container_of(wc->wr_cqe, struct nvme_rdma_request, reg_cqe); 1187 1188 if (unlikely(wc->status != IB_WC_SUCCESS)) 1189 nvme_rdma_wr_error(cq, wc, "LOCAL_INV"); 1190 else 1191 nvme_rdma_end_request(req); 1192 } 1193 1194 static int nvme_rdma_inv_rkey(struct nvme_rdma_queue *queue, 1195 struct nvme_rdma_request *req) 1196 { 1197 struct ib_send_wr wr = { 1198 .opcode = IB_WR_LOCAL_INV, 1199 .next = NULL, 1200 .num_sge = 0, 1201 .send_flags = IB_SEND_SIGNALED, 1202 .ex.invalidate_rkey = req->mr->rkey, 1203 }; 1204 1205 req->reg_cqe.done = nvme_rdma_inv_rkey_done; 1206 wr.wr_cqe = &req->reg_cqe; 1207 1208 return ib_post_send(queue->qp, &wr, NULL); 1209 } 1210 1211 static void nvme_rdma_unmap_data(struct nvme_rdma_queue *queue, 1212 struct request *rq) 1213 { 1214 struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); 1215 struct nvme_rdma_device *dev = queue->device; 1216 struct ib_device *ibdev = dev->dev; 1217 struct list_head *pool = &queue->qp->rdma_mrs; 1218 1219 if (!blk_rq_nr_phys_segments(rq)) 1220 return; 1221 1222 if (blk_integrity_rq(rq)) { 1223 ib_dma_unmap_sg(ibdev, req->metadata_sgl->sg_table.sgl, 1224 req->metadata_sgl->nents, rq_dma_dir(rq)); 1225 sg_free_table_chained(&req->metadata_sgl->sg_table, 1226 NVME_INLINE_METADATA_SG_CNT); 1227 } 1228 1229 if (req->use_sig_mr) 1230 pool = &queue->qp->sig_mrs; 1231 1232 if (req->mr) { 1233 ib_mr_pool_put(queue->qp, pool, req->mr); 1234 req->mr = NULL; 1235 } 1236 1237 ib_dma_unmap_sg(ibdev, req->data_sgl.sg_table.sgl, req->data_sgl.nents, 1238 rq_dma_dir(rq)); 1239 sg_free_table_chained(&req->data_sgl.sg_table, NVME_INLINE_SG_CNT); 1240 } 1241 1242 static int nvme_rdma_set_sg_null(struct nvme_command *c) 1243 { 1244 struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl; 1245 1246 sg->addr = 0; 1247 put_unaligned_le24(0, sg->length); 1248 put_unaligned_le32(0, sg->key); 1249 sg->type = NVME_KEY_SGL_FMT_DATA_DESC << 4; 1250 return 0; 1251 } 1252 1253 static int nvme_rdma_map_sg_inline(struct nvme_rdma_queue *queue, 1254 struct nvme_rdma_request *req, struct nvme_command *c, 1255 int count) 1256 { 1257 struct nvme_sgl_desc *sg = &c->common.dptr.sgl; 1258 struct scatterlist *sgl = req->data_sgl.sg_table.sgl; 1259 struct ib_sge *sge = &req->sge[1]; 1260 u32 len = 0; 1261 int i; 1262 1263 for (i = 0; i < count; i++, sgl++, sge++) { 1264 sge->addr = sg_dma_address(sgl); 1265 sge->length = sg_dma_len(sgl); 1266 sge->lkey = queue->device->pd->local_dma_lkey; 1267 len += sge->length; 1268 } 1269 1270 sg->addr = cpu_to_le64(queue->ctrl->ctrl.icdoff); 1271 sg->length = cpu_to_le32(len); 1272 sg->type = (NVME_SGL_FMT_DATA_DESC << 4) | NVME_SGL_FMT_OFFSET; 1273 1274 req->num_sge += count; 1275 return 0; 1276 } 1277 1278 static int nvme_rdma_map_sg_single(struct nvme_rdma_queue *queue, 1279 struct nvme_rdma_request *req, struct nvme_command *c) 1280 { 1281 struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl; 1282 1283 sg->addr = cpu_to_le64(sg_dma_address(req->data_sgl.sg_table.sgl)); 1284 put_unaligned_le24(sg_dma_len(req->data_sgl.sg_table.sgl), sg->length); 1285 put_unaligned_le32(queue->device->pd->unsafe_global_rkey, sg->key); 1286 sg->type = NVME_KEY_SGL_FMT_DATA_DESC << 4; 1287 return 0; 1288 } 1289 1290 static int nvme_rdma_map_sg_fr(struct nvme_rdma_queue *queue, 1291 struct nvme_rdma_request *req, struct nvme_command *c, 1292 int count) 1293 { 1294 struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl; 1295 int nr; 1296 1297 req->mr = ib_mr_pool_get(queue->qp, &queue->qp->rdma_mrs); 1298 if (WARN_ON_ONCE(!req->mr)) 1299 return -EAGAIN; 1300 1301 /* 1302 * Align the MR to a 4K page size to match the ctrl page size and 1303 * the block virtual boundary. 1304 */ 1305 nr = ib_map_mr_sg(req->mr, req->data_sgl.sg_table.sgl, count, NULL, 1306 SZ_4K); 1307 if (unlikely(nr < count)) { 1308 ib_mr_pool_put(queue->qp, &queue->qp->rdma_mrs, req->mr); 1309 req->mr = NULL; 1310 if (nr < 0) 1311 return nr; 1312 return -EINVAL; 1313 } 1314 1315 ib_update_fast_reg_key(req->mr, ib_inc_rkey(req->mr->rkey)); 1316 1317 req->reg_cqe.done = nvme_rdma_memreg_done; 1318 memset(&req->reg_wr, 0, sizeof(req->reg_wr)); 1319 req->reg_wr.wr.opcode = IB_WR_REG_MR; 1320 req->reg_wr.wr.wr_cqe = &req->reg_cqe; 1321 req->reg_wr.wr.num_sge = 0; 1322 req->reg_wr.mr = req->mr; 1323 req->reg_wr.key = req->mr->rkey; 1324 req->reg_wr.access = IB_ACCESS_LOCAL_WRITE | 1325 IB_ACCESS_REMOTE_READ | 1326 IB_ACCESS_REMOTE_WRITE; 1327 1328 sg->addr = cpu_to_le64(req->mr->iova); 1329 put_unaligned_le24(req->mr->length, sg->length); 1330 put_unaligned_le32(req->mr->rkey, sg->key); 1331 sg->type = (NVME_KEY_SGL_FMT_DATA_DESC << 4) | 1332 NVME_SGL_FMT_INVALIDATE; 1333 1334 return 0; 1335 } 1336 1337 static void nvme_rdma_set_sig_domain(struct blk_integrity *bi, 1338 struct nvme_command *cmd, struct ib_sig_domain *domain, 1339 u16 control, u8 pi_type) 1340 { 1341 domain->sig_type = IB_SIG_TYPE_T10_DIF; 1342 domain->sig.dif.bg_type = IB_T10DIF_CRC; 1343 domain->sig.dif.pi_interval = 1 << bi->interval_exp; 1344 domain->sig.dif.ref_tag = le32_to_cpu(cmd->rw.reftag); 1345 if (control & NVME_RW_PRINFO_PRCHK_REF) 1346 domain->sig.dif.ref_remap = true; 1347 1348 domain->sig.dif.app_tag = le16_to_cpu(cmd->rw.apptag); 1349 domain->sig.dif.apptag_check_mask = le16_to_cpu(cmd->rw.appmask); 1350 domain->sig.dif.app_escape = true; 1351 if (pi_type == NVME_NS_DPS_PI_TYPE3) 1352 domain->sig.dif.ref_escape = true; 1353 } 1354 1355 static void nvme_rdma_set_sig_attrs(struct blk_integrity *bi, 1356 struct nvme_command *cmd, struct ib_sig_attrs *sig_attrs, 1357 u8 pi_type) 1358 { 1359 u16 control = le16_to_cpu(cmd->rw.control); 1360 1361 memset(sig_attrs, 0, sizeof(*sig_attrs)); 1362 if (control & NVME_RW_PRINFO_PRACT) { 1363 /* for WRITE_INSERT/READ_STRIP no memory domain */ 1364 sig_attrs->mem.sig_type = IB_SIG_TYPE_NONE; 1365 nvme_rdma_set_sig_domain(bi, cmd, &sig_attrs->wire, control, 1366 pi_type); 1367 /* Clear the PRACT bit since HCA will generate/verify the PI */ 1368 control &= ~NVME_RW_PRINFO_PRACT; 1369 cmd->rw.control = cpu_to_le16(control); 1370 } else { 1371 /* for WRITE_PASS/READ_PASS both wire/memory domains exist */ 1372 nvme_rdma_set_sig_domain(bi, cmd, &sig_attrs->wire, control, 1373 pi_type); 1374 nvme_rdma_set_sig_domain(bi, cmd, &sig_attrs->mem, control, 1375 pi_type); 1376 } 1377 } 1378 1379 static void nvme_rdma_set_prot_checks(struct nvme_command *cmd, u8 *mask) 1380 { 1381 *mask = 0; 1382 if (le16_to_cpu(cmd->rw.control) & NVME_RW_PRINFO_PRCHK_REF) 1383 *mask |= IB_SIG_CHECK_REFTAG; 1384 if (le16_to_cpu(cmd->rw.control) & NVME_RW_PRINFO_PRCHK_GUARD) 1385 *mask |= IB_SIG_CHECK_GUARD; 1386 } 1387 1388 static void nvme_rdma_sig_done(struct ib_cq *cq, struct ib_wc *wc) 1389 { 1390 if (unlikely(wc->status != IB_WC_SUCCESS)) 1391 nvme_rdma_wr_error(cq, wc, "SIG"); 1392 } 1393 1394 static int nvme_rdma_map_sg_pi(struct nvme_rdma_queue *queue, 1395 struct nvme_rdma_request *req, struct nvme_command *c, 1396 int count, int pi_count) 1397 { 1398 struct nvme_rdma_sgl *sgl = &req->data_sgl; 1399 struct ib_reg_wr *wr = &req->reg_wr; 1400 struct request *rq = blk_mq_rq_from_pdu(req); 1401 struct nvme_ns *ns = rq->q->queuedata; 1402 struct bio *bio = rq->bio; 1403 struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl; 1404 int nr; 1405 1406 req->mr = ib_mr_pool_get(queue->qp, &queue->qp->sig_mrs); 1407 if (WARN_ON_ONCE(!req->mr)) 1408 return -EAGAIN; 1409 1410 nr = ib_map_mr_sg_pi(req->mr, sgl->sg_table.sgl, count, NULL, 1411 req->metadata_sgl->sg_table.sgl, pi_count, NULL, 1412 SZ_4K); 1413 if (unlikely(nr)) 1414 goto mr_put; 1415 1416 nvme_rdma_set_sig_attrs(blk_get_integrity(bio->bi_disk), c, 1417 req->mr->sig_attrs, ns->pi_type); 1418 nvme_rdma_set_prot_checks(c, &req->mr->sig_attrs->check_mask); 1419 1420 ib_update_fast_reg_key(req->mr, ib_inc_rkey(req->mr->rkey)); 1421 1422 req->reg_cqe.done = nvme_rdma_sig_done; 1423 memset(wr, 0, sizeof(*wr)); 1424 wr->wr.opcode = IB_WR_REG_MR_INTEGRITY; 1425 wr->wr.wr_cqe = &req->reg_cqe; 1426 wr->wr.num_sge = 0; 1427 wr->wr.send_flags = 0; 1428 wr->mr = req->mr; 1429 wr->key = req->mr->rkey; 1430 wr->access = IB_ACCESS_LOCAL_WRITE | 1431 IB_ACCESS_REMOTE_READ | 1432 IB_ACCESS_REMOTE_WRITE; 1433 1434 sg->addr = cpu_to_le64(req->mr->iova); 1435 put_unaligned_le24(req->mr->length, sg->length); 1436 put_unaligned_le32(req->mr->rkey, sg->key); 1437 sg->type = NVME_KEY_SGL_FMT_DATA_DESC << 4; 1438 1439 return 0; 1440 1441 mr_put: 1442 ib_mr_pool_put(queue->qp, &queue->qp->sig_mrs, req->mr); 1443 req->mr = NULL; 1444 if (nr < 0) 1445 return nr; 1446 return -EINVAL; 1447 } 1448 1449 static int nvme_rdma_map_data(struct nvme_rdma_queue *queue, 1450 struct request *rq, struct nvme_command *c) 1451 { 1452 struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); 1453 struct nvme_rdma_device *dev = queue->device; 1454 struct ib_device *ibdev = dev->dev; 1455 int pi_count = 0; 1456 int count, ret; 1457 1458 req->num_sge = 1; 1459 refcount_set(&req->ref, 2); /* send and recv completions */ 1460 1461 c->common.flags |= NVME_CMD_SGL_METABUF; 1462 1463 if (!blk_rq_nr_phys_segments(rq)) 1464 return nvme_rdma_set_sg_null(c); 1465 1466 req->data_sgl.sg_table.sgl = (struct scatterlist *)(req + 1); 1467 ret = sg_alloc_table_chained(&req->data_sgl.sg_table, 1468 blk_rq_nr_phys_segments(rq), req->data_sgl.sg_table.sgl, 1469 NVME_INLINE_SG_CNT); 1470 if (ret) 1471 return -ENOMEM; 1472 1473 req->data_sgl.nents = blk_rq_map_sg(rq->q, rq, 1474 req->data_sgl.sg_table.sgl); 1475 1476 count = ib_dma_map_sg(ibdev, req->data_sgl.sg_table.sgl, 1477 req->data_sgl.nents, rq_dma_dir(rq)); 1478 if (unlikely(count <= 0)) { 1479 ret = -EIO; 1480 goto out_free_table; 1481 } 1482 1483 if (blk_integrity_rq(rq)) { 1484 req->metadata_sgl->sg_table.sgl = 1485 (struct scatterlist *)(req->metadata_sgl + 1); 1486 ret = sg_alloc_table_chained(&req->metadata_sgl->sg_table, 1487 blk_rq_count_integrity_sg(rq->q, rq->bio), 1488 req->metadata_sgl->sg_table.sgl, 1489 NVME_INLINE_METADATA_SG_CNT); 1490 if (unlikely(ret)) { 1491 ret = -ENOMEM; 1492 goto out_unmap_sg; 1493 } 1494 1495 req->metadata_sgl->nents = blk_rq_map_integrity_sg(rq->q, 1496 rq->bio, req->metadata_sgl->sg_table.sgl); 1497 pi_count = ib_dma_map_sg(ibdev, 1498 req->metadata_sgl->sg_table.sgl, 1499 req->metadata_sgl->nents, 1500 rq_dma_dir(rq)); 1501 if (unlikely(pi_count <= 0)) { 1502 ret = -EIO; 1503 goto out_free_pi_table; 1504 } 1505 } 1506 1507 if (req->use_sig_mr) { 1508 ret = nvme_rdma_map_sg_pi(queue, req, c, count, pi_count); 1509 goto out; 1510 } 1511 1512 if (count <= dev->num_inline_segments) { 1513 if (rq_data_dir(rq) == WRITE && nvme_rdma_queue_idx(queue) && 1514 queue->ctrl->use_inline_data && 1515 blk_rq_payload_bytes(rq) <= 1516 nvme_rdma_inline_data_size(queue)) { 1517 ret = nvme_rdma_map_sg_inline(queue, req, c, count); 1518 goto out; 1519 } 1520 1521 if (count == 1 && dev->pd->flags & IB_PD_UNSAFE_GLOBAL_RKEY) { 1522 ret = nvme_rdma_map_sg_single(queue, req, c); 1523 goto out; 1524 } 1525 } 1526 1527 ret = nvme_rdma_map_sg_fr(queue, req, c, count); 1528 out: 1529 if (unlikely(ret)) 1530 goto out_unmap_pi_sg; 1531 1532 return 0; 1533 1534 out_unmap_pi_sg: 1535 if (blk_integrity_rq(rq)) 1536 ib_dma_unmap_sg(ibdev, req->metadata_sgl->sg_table.sgl, 1537 req->metadata_sgl->nents, rq_dma_dir(rq)); 1538 out_free_pi_table: 1539 if (blk_integrity_rq(rq)) 1540 sg_free_table_chained(&req->metadata_sgl->sg_table, 1541 NVME_INLINE_METADATA_SG_CNT); 1542 out_unmap_sg: 1543 ib_dma_unmap_sg(ibdev, req->data_sgl.sg_table.sgl, req->data_sgl.nents, 1544 rq_dma_dir(rq)); 1545 out_free_table: 1546 sg_free_table_chained(&req->data_sgl.sg_table, NVME_INLINE_SG_CNT); 1547 return ret; 1548 } 1549 1550 static void nvme_rdma_send_done(struct ib_cq *cq, struct ib_wc *wc) 1551 { 1552 struct nvme_rdma_qe *qe = 1553 container_of(wc->wr_cqe, struct nvme_rdma_qe, cqe); 1554 struct nvme_rdma_request *req = 1555 container_of(qe, struct nvme_rdma_request, sqe); 1556 1557 if (unlikely(wc->status != IB_WC_SUCCESS)) 1558 nvme_rdma_wr_error(cq, wc, "SEND"); 1559 else 1560 nvme_rdma_end_request(req); 1561 } 1562 1563 static int nvme_rdma_post_send(struct nvme_rdma_queue *queue, 1564 struct nvme_rdma_qe *qe, struct ib_sge *sge, u32 num_sge, 1565 struct ib_send_wr *first) 1566 { 1567 struct ib_send_wr wr; 1568 int ret; 1569 1570 sge->addr = qe->dma; 1571 sge->length = sizeof(struct nvme_command); 1572 sge->lkey = queue->device->pd->local_dma_lkey; 1573 1574 wr.next = NULL; 1575 wr.wr_cqe = &qe->cqe; 1576 wr.sg_list = sge; 1577 wr.num_sge = num_sge; 1578 wr.opcode = IB_WR_SEND; 1579 wr.send_flags = IB_SEND_SIGNALED; 1580 1581 if (first) 1582 first->next = ≀ 1583 else 1584 first = ≀ 1585 1586 ret = ib_post_send(queue->qp, first, NULL); 1587 if (unlikely(ret)) { 1588 dev_err(queue->ctrl->ctrl.device, 1589 "%s failed with error code %d\n", __func__, ret); 1590 } 1591 return ret; 1592 } 1593 1594 static int nvme_rdma_post_recv(struct nvme_rdma_queue *queue, 1595 struct nvme_rdma_qe *qe) 1596 { 1597 struct ib_recv_wr wr; 1598 struct ib_sge list; 1599 int ret; 1600 1601 list.addr = qe->dma; 1602 list.length = sizeof(struct nvme_completion); 1603 list.lkey = queue->device->pd->local_dma_lkey; 1604 1605 qe->cqe.done = nvme_rdma_recv_done; 1606 1607 wr.next = NULL; 1608 wr.wr_cqe = &qe->cqe; 1609 wr.sg_list = &list; 1610 wr.num_sge = 1; 1611 1612 ret = ib_post_recv(queue->qp, &wr, NULL); 1613 if (unlikely(ret)) { 1614 dev_err(queue->ctrl->ctrl.device, 1615 "%s failed with error code %d\n", __func__, ret); 1616 } 1617 return ret; 1618 } 1619 1620 static struct blk_mq_tags *nvme_rdma_tagset(struct nvme_rdma_queue *queue) 1621 { 1622 u32 queue_idx = nvme_rdma_queue_idx(queue); 1623 1624 if (queue_idx == 0) 1625 return queue->ctrl->admin_tag_set.tags[queue_idx]; 1626 return queue->ctrl->tag_set.tags[queue_idx - 1]; 1627 } 1628 1629 static void nvme_rdma_async_done(struct ib_cq *cq, struct ib_wc *wc) 1630 { 1631 if (unlikely(wc->status != IB_WC_SUCCESS)) 1632 nvme_rdma_wr_error(cq, wc, "ASYNC"); 1633 } 1634 1635 static void nvme_rdma_submit_async_event(struct nvme_ctrl *arg) 1636 { 1637 struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(arg); 1638 struct nvme_rdma_queue *queue = &ctrl->queues[0]; 1639 struct ib_device *dev = queue->device->dev; 1640 struct nvme_rdma_qe *sqe = &ctrl->async_event_sqe; 1641 struct nvme_command *cmd = sqe->data; 1642 struct ib_sge sge; 1643 int ret; 1644 1645 ib_dma_sync_single_for_cpu(dev, sqe->dma, sizeof(*cmd), DMA_TO_DEVICE); 1646 1647 memset(cmd, 0, sizeof(*cmd)); 1648 cmd->common.opcode = nvme_admin_async_event; 1649 cmd->common.command_id = NVME_AQ_BLK_MQ_DEPTH; 1650 cmd->common.flags |= NVME_CMD_SGL_METABUF; 1651 nvme_rdma_set_sg_null(cmd); 1652 1653 sqe->cqe.done = nvme_rdma_async_done; 1654 1655 ib_dma_sync_single_for_device(dev, sqe->dma, sizeof(*cmd), 1656 DMA_TO_DEVICE); 1657 1658 ret = nvme_rdma_post_send(queue, sqe, &sge, 1, NULL); 1659 WARN_ON_ONCE(ret); 1660 } 1661 1662 static void nvme_rdma_process_nvme_rsp(struct nvme_rdma_queue *queue, 1663 struct nvme_completion *cqe, struct ib_wc *wc) 1664 { 1665 struct request *rq; 1666 struct nvme_rdma_request *req; 1667 1668 rq = blk_mq_tag_to_rq(nvme_rdma_tagset(queue), cqe->command_id); 1669 if (!rq) { 1670 dev_err(queue->ctrl->ctrl.device, 1671 "tag 0x%x on QP %#x not found\n", 1672 cqe->command_id, queue->qp->qp_num); 1673 nvme_rdma_error_recovery(queue->ctrl); 1674 return; 1675 } 1676 req = blk_mq_rq_to_pdu(rq); 1677 1678 req->status = cqe->status; 1679 req->result = cqe->result; 1680 1681 if (wc->wc_flags & IB_WC_WITH_INVALIDATE) { 1682 if (unlikely(wc->ex.invalidate_rkey != req->mr->rkey)) { 1683 dev_err(queue->ctrl->ctrl.device, 1684 "Bogus remote invalidation for rkey %#x\n", 1685 req->mr->rkey); 1686 nvme_rdma_error_recovery(queue->ctrl); 1687 } 1688 } else if (req->mr) { 1689 int ret; 1690 1691 ret = nvme_rdma_inv_rkey(queue, req); 1692 if (unlikely(ret < 0)) { 1693 dev_err(queue->ctrl->ctrl.device, 1694 "Queueing INV WR for rkey %#x failed (%d)\n", 1695 req->mr->rkey, ret); 1696 nvme_rdma_error_recovery(queue->ctrl); 1697 } 1698 /* the local invalidation completion will end the request */ 1699 return; 1700 } 1701 1702 nvme_rdma_end_request(req); 1703 } 1704 1705 static void nvme_rdma_recv_done(struct ib_cq *cq, struct ib_wc *wc) 1706 { 1707 struct nvme_rdma_qe *qe = 1708 container_of(wc->wr_cqe, struct nvme_rdma_qe, cqe); 1709 struct nvme_rdma_queue *queue = cq->cq_context; 1710 struct ib_device *ibdev = queue->device->dev; 1711 struct nvme_completion *cqe = qe->data; 1712 const size_t len = sizeof(struct nvme_completion); 1713 1714 if (unlikely(wc->status != IB_WC_SUCCESS)) { 1715 nvme_rdma_wr_error(cq, wc, "RECV"); 1716 return; 1717 } 1718 1719 ib_dma_sync_single_for_cpu(ibdev, qe->dma, len, DMA_FROM_DEVICE); 1720 /* 1721 * AEN requests are special as they don't time out and can 1722 * survive any kind of queue freeze and often don't respond to 1723 * aborts. We don't even bother to allocate a struct request 1724 * for them but rather special case them here. 1725 */ 1726 if (unlikely(nvme_is_aen_req(nvme_rdma_queue_idx(queue), 1727 cqe->command_id))) 1728 nvme_complete_async_event(&queue->ctrl->ctrl, cqe->status, 1729 &cqe->result); 1730 else 1731 nvme_rdma_process_nvme_rsp(queue, cqe, wc); 1732 ib_dma_sync_single_for_device(ibdev, qe->dma, len, DMA_FROM_DEVICE); 1733 1734 nvme_rdma_post_recv(queue, qe); 1735 } 1736 1737 static int nvme_rdma_conn_established(struct nvme_rdma_queue *queue) 1738 { 1739 int ret, i; 1740 1741 for (i = 0; i < queue->queue_size; i++) { 1742 ret = nvme_rdma_post_recv(queue, &queue->rsp_ring[i]); 1743 if (ret) 1744 goto out_destroy_queue_ib; 1745 } 1746 1747 return 0; 1748 1749 out_destroy_queue_ib: 1750 nvme_rdma_destroy_queue_ib(queue); 1751 return ret; 1752 } 1753 1754 static int nvme_rdma_conn_rejected(struct nvme_rdma_queue *queue, 1755 struct rdma_cm_event *ev) 1756 { 1757 struct rdma_cm_id *cm_id = queue->cm_id; 1758 int status = ev->status; 1759 const char *rej_msg; 1760 const struct nvme_rdma_cm_rej *rej_data; 1761 u8 rej_data_len; 1762 1763 rej_msg = rdma_reject_msg(cm_id, status); 1764 rej_data = rdma_consumer_reject_data(cm_id, ev, &rej_data_len); 1765 1766 if (rej_data && rej_data_len >= sizeof(u16)) { 1767 u16 sts = le16_to_cpu(rej_data->sts); 1768 1769 dev_err(queue->ctrl->ctrl.device, 1770 "Connect rejected: status %d (%s) nvme status %d (%s).\n", 1771 status, rej_msg, sts, nvme_rdma_cm_msg(sts)); 1772 } else { 1773 dev_err(queue->ctrl->ctrl.device, 1774 "Connect rejected: status %d (%s).\n", status, rej_msg); 1775 } 1776 1777 return -ECONNRESET; 1778 } 1779 1780 static int nvme_rdma_addr_resolved(struct nvme_rdma_queue *queue) 1781 { 1782 struct nvme_ctrl *ctrl = &queue->ctrl->ctrl; 1783 int ret; 1784 1785 ret = nvme_rdma_create_queue_ib(queue); 1786 if (ret) 1787 return ret; 1788 1789 if (ctrl->opts->tos >= 0) 1790 rdma_set_service_type(queue->cm_id, ctrl->opts->tos); 1791 ret = rdma_resolve_route(queue->cm_id, NVME_RDMA_CONNECT_TIMEOUT_MS); 1792 if (ret) { 1793 dev_err(ctrl->device, "rdma_resolve_route failed (%d).\n", 1794 queue->cm_error); 1795 goto out_destroy_queue; 1796 } 1797 1798 return 0; 1799 1800 out_destroy_queue: 1801 nvme_rdma_destroy_queue_ib(queue); 1802 return ret; 1803 } 1804 1805 static int nvme_rdma_route_resolved(struct nvme_rdma_queue *queue) 1806 { 1807 struct nvme_rdma_ctrl *ctrl = queue->ctrl; 1808 struct rdma_conn_param param = { }; 1809 struct nvme_rdma_cm_req priv = { }; 1810 int ret; 1811 1812 param.qp_num = queue->qp->qp_num; 1813 param.flow_control = 1; 1814 1815 param.responder_resources = queue->device->dev->attrs.max_qp_rd_atom; 1816 /* maximum retry count */ 1817 param.retry_count = 7; 1818 param.rnr_retry_count = 7; 1819 param.private_data = &priv; 1820 param.private_data_len = sizeof(priv); 1821 1822 priv.recfmt = cpu_to_le16(NVME_RDMA_CM_FMT_1_0); 1823 priv.qid = cpu_to_le16(nvme_rdma_queue_idx(queue)); 1824 /* 1825 * set the admin queue depth to the minimum size 1826 * specified by the Fabrics standard. 1827 */ 1828 if (priv.qid == 0) { 1829 priv.hrqsize = cpu_to_le16(NVME_AQ_DEPTH); 1830 priv.hsqsize = cpu_to_le16(NVME_AQ_DEPTH - 1); 1831 } else { 1832 /* 1833 * current interpretation of the fabrics spec 1834 * is at minimum you make hrqsize sqsize+1, or a 1835 * 1's based representation of sqsize. 1836 */ 1837 priv.hrqsize = cpu_to_le16(queue->queue_size); 1838 priv.hsqsize = cpu_to_le16(queue->ctrl->ctrl.sqsize); 1839 } 1840 1841 ret = rdma_connect(queue->cm_id, ¶m); 1842 if (ret) { 1843 dev_err(ctrl->ctrl.device, 1844 "rdma_connect failed (%d).\n", ret); 1845 goto out_destroy_queue_ib; 1846 } 1847 1848 return 0; 1849 1850 out_destroy_queue_ib: 1851 nvme_rdma_destroy_queue_ib(queue); 1852 return ret; 1853 } 1854 1855 static int nvme_rdma_cm_handler(struct rdma_cm_id *cm_id, 1856 struct rdma_cm_event *ev) 1857 { 1858 struct nvme_rdma_queue *queue = cm_id->context; 1859 int cm_error = 0; 1860 1861 dev_dbg(queue->ctrl->ctrl.device, "%s (%d): status %d id %p\n", 1862 rdma_event_msg(ev->event), ev->event, 1863 ev->status, cm_id); 1864 1865 switch (ev->event) { 1866 case RDMA_CM_EVENT_ADDR_RESOLVED: 1867 cm_error = nvme_rdma_addr_resolved(queue); 1868 break; 1869 case RDMA_CM_EVENT_ROUTE_RESOLVED: 1870 cm_error = nvme_rdma_route_resolved(queue); 1871 break; 1872 case RDMA_CM_EVENT_ESTABLISHED: 1873 queue->cm_error = nvme_rdma_conn_established(queue); 1874 /* complete cm_done regardless of success/failure */ 1875 complete(&queue->cm_done); 1876 return 0; 1877 case RDMA_CM_EVENT_REJECTED: 1878 nvme_rdma_destroy_queue_ib(queue); 1879 cm_error = nvme_rdma_conn_rejected(queue, ev); 1880 break; 1881 case RDMA_CM_EVENT_ROUTE_ERROR: 1882 case RDMA_CM_EVENT_CONNECT_ERROR: 1883 case RDMA_CM_EVENT_UNREACHABLE: 1884 nvme_rdma_destroy_queue_ib(queue); 1885 /* fall through */ 1886 case RDMA_CM_EVENT_ADDR_ERROR: 1887 dev_dbg(queue->ctrl->ctrl.device, 1888 "CM error event %d\n", ev->event); 1889 cm_error = -ECONNRESET; 1890 break; 1891 case RDMA_CM_EVENT_DISCONNECTED: 1892 case RDMA_CM_EVENT_ADDR_CHANGE: 1893 case RDMA_CM_EVENT_TIMEWAIT_EXIT: 1894 dev_dbg(queue->ctrl->ctrl.device, 1895 "disconnect received - connection closed\n"); 1896 nvme_rdma_error_recovery(queue->ctrl); 1897 break; 1898 case RDMA_CM_EVENT_DEVICE_REMOVAL: 1899 /* device removal is handled via the ib_client API */ 1900 break; 1901 default: 1902 dev_err(queue->ctrl->ctrl.device, 1903 "Unexpected RDMA CM event (%d)\n", ev->event); 1904 nvme_rdma_error_recovery(queue->ctrl); 1905 break; 1906 } 1907 1908 if (cm_error) { 1909 queue->cm_error = cm_error; 1910 complete(&queue->cm_done); 1911 } 1912 1913 return 0; 1914 } 1915 1916 static enum blk_eh_timer_return 1917 nvme_rdma_timeout(struct request *rq, bool reserved) 1918 { 1919 struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); 1920 struct nvme_rdma_queue *queue = req->queue; 1921 struct nvme_rdma_ctrl *ctrl = queue->ctrl; 1922 1923 dev_warn(ctrl->ctrl.device, "I/O %d QID %d timeout\n", 1924 rq->tag, nvme_rdma_queue_idx(queue)); 1925 1926 /* 1927 * Restart the timer if a controller reset is already scheduled. Any 1928 * timed out commands would be handled before entering the connecting 1929 * state. 1930 */ 1931 if (ctrl->ctrl.state == NVME_CTRL_RESETTING) 1932 return BLK_EH_RESET_TIMER; 1933 1934 if (ctrl->ctrl.state != NVME_CTRL_LIVE) { 1935 /* 1936 * Teardown immediately if controller times out while starting 1937 * or we are already started error recovery. all outstanding 1938 * requests are completed on shutdown, so we return BLK_EH_DONE. 1939 */ 1940 flush_work(&ctrl->err_work); 1941 nvme_rdma_teardown_io_queues(ctrl, false); 1942 nvme_rdma_teardown_admin_queue(ctrl, false); 1943 return BLK_EH_DONE; 1944 } 1945 1946 dev_warn(ctrl->ctrl.device, "starting error recovery\n"); 1947 nvme_rdma_error_recovery(ctrl); 1948 1949 return BLK_EH_RESET_TIMER; 1950 } 1951 1952 static blk_status_t nvme_rdma_queue_rq(struct blk_mq_hw_ctx *hctx, 1953 const struct blk_mq_queue_data *bd) 1954 { 1955 struct nvme_ns *ns = hctx->queue->queuedata; 1956 struct nvme_rdma_queue *queue = hctx->driver_data; 1957 struct request *rq = bd->rq; 1958 struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); 1959 struct nvme_rdma_qe *sqe = &req->sqe; 1960 struct nvme_command *c = sqe->data; 1961 struct ib_device *dev; 1962 bool queue_ready = test_bit(NVME_RDMA_Q_LIVE, &queue->flags); 1963 blk_status_t ret; 1964 int err; 1965 1966 WARN_ON_ONCE(rq->tag < 0); 1967 1968 if (!nvmf_check_ready(&queue->ctrl->ctrl, rq, queue_ready)) 1969 return nvmf_fail_nonready_command(&queue->ctrl->ctrl, rq); 1970 1971 dev = queue->device->dev; 1972 1973 req->sqe.dma = ib_dma_map_single(dev, req->sqe.data, 1974 sizeof(struct nvme_command), 1975 DMA_TO_DEVICE); 1976 err = ib_dma_mapping_error(dev, req->sqe.dma); 1977 if (unlikely(err)) 1978 return BLK_STS_RESOURCE; 1979 1980 ib_dma_sync_single_for_cpu(dev, sqe->dma, 1981 sizeof(struct nvme_command), DMA_TO_DEVICE); 1982 1983 ret = nvme_setup_cmd(ns, rq, c); 1984 if (ret) 1985 goto unmap_qe; 1986 1987 blk_mq_start_request(rq); 1988 1989 if (IS_ENABLED(CONFIG_BLK_DEV_INTEGRITY) && 1990 queue->pi_support && 1991 (c->common.opcode == nvme_cmd_write || 1992 c->common.opcode == nvme_cmd_read) && 1993 nvme_ns_has_pi(ns)) 1994 req->use_sig_mr = true; 1995 else 1996 req->use_sig_mr = false; 1997 1998 err = nvme_rdma_map_data(queue, rq, c); 1999 if (unlikely(err < 0)) { 2000 dev_err(queue->ctrl->ctrl.device, 2001 "Failed to map data (%d)\n", err); 2002 goto err; 2003 } 2004 2005 sqe->cqe.done = nvme_rdma_send_done; 2006 2007 ib_dma_sync_single_for_device(dev, sqe->dma, 2008 sizeof(struct nvme_command), DMA_TO_DEVICE); 2009 2010 err = nvme_rdma_post_send(queue, sqe, req->sge, req->num_sge, 2011 req->mr ? &req->reg_wr.wr : NULL); 2012 if (unlikely(err)) 2013 goto err_unmap; 2014 2015 return BLK_STS_OK; 2016 2017 err_unmap: 2018 nvme_rdma_unmap_data(queue, rq); 2019 err: 2020 if (err == -ENOMEM || err == -EAGAIN) 2021 ret = BLK_STS_RESOURCE; 2022 else 2023 ret = BLK_STS_IOERR; 2024 nvme_cleanup_cmd(rq); 2025 unmap_qe: 2026 ib_dma_unmap_single(dev, req->sqe.dma, sizeof(struct nvme_command), 2027 DMA_TO_DEVICE); 2028 return ret; 2029 } 2030 2031 static int nvme_rdma_poll(struct blk_mq_hw_ctx *hctx) 2032 { 2033 struct nvme_rdma_queue *queue = hctx->driver_data; 2034 2035 return ib_process_cq_direct(queue->ib_cq, -1); 2036 } 2037 2038 static void nvme_rdma_check_pi_status(struct nvme_rdma_request *req) 2039 { 2040 struct request *rq = blk_mq_rq_from_pdu(req); 2041 struct ib_mr_status mr_status; 2042 int ret; 2043 2044 ret = ib_check_mr_status(req->mr, IB_MR_CHECK_SIG_STATUS, &mr_status); 2045 if (ret) { 2046 pr_err("ib_check_mr_status failed, ret %d\n", ret); 2047 nvme_req(rq)->status = NVME_SC_INVALID_PI; 2048 return; 2049 } 2050 2051 if (mr_status.fail_status & IB_MR_CHECK_SIG_STATUS) { 2052 switch (mr_status.sig_err.err_type) { 2053 case IB_SIG_BAD_GUARD: 2054 nvme_req(rq)->status = NVME_SC_GUARD_CHECK; 2055 break; 2056 case IB_SIG_BAD_REFTAG: 2057 nvme_req(rq)->status = NVME_SC_REFTAG_CHECK; 2058 break; 2059 case IB_SIG_BAD_APPTAG: 2060 nvme_req(rq)->status = NVME_SC_APPTAG_CHECK; 2061 break; 2062 } 2063 pr_err("PI error found type %d expected 0x%x vs actual 0x%x\n", 2064 mr_status.sig_err.err_type, mr_status.sig_err.expected, 2065 mr_status.sig_err.actual); 2066 } 2067 } 2068 2069 static void nvme_rdma_complete_rq(struct request *rq) 2070 { 2071 struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); 2072 struct nvme_rdma_queue *queue = req->queue; 2073 struct ib_device *ibdev = queue->device->dev; 2074 2075 if (req->use_sig_mr) 2076 nvme_rdma_check_pi_status(req); 2077 2078 nvme_rdma_unmap_data(queue, rq); 2079 ib_dma_unmap_single(ibdev, req->sqe.dma, sizeof(struct nvme_command), 2080 DMA_TO_DEVICE); 2081 nvme_complete_rq(rq); 2082 } 2083 2084 static int nvme_rdma_map_queues(struct blk_mq_tag_set *set) 2085 { 2086 struct nvme_rdma_ctrl *ctrl = set->driver_data; 2087 struct nvmf_ctrl_options *opts = ctrl->ctrl.opts; 2088 2089 if (opts->nr_write_queues && ctrl->io_queues[HCTX_TYPE_READ]) { 2090 /* separate read/write queues */ 2091 set->map[HCTX_TYPE_DEFAULT].nr_queues = 2092 ctrl->io_queues[HCTX_TYPE_DEFAULT]; 2093 set->map[HCTX_TYPE_DEFAULT].queue_offset = 0; 2094 set->map[HCTX_TYPE_READ].nr_queues = 2095 ctrl->io_queues[HCTX_TYPE_READ]; 2096 set->map[HCTX_TYPE_READ].queue_offset = 2097 ctrl->io_queues[HCTX_TYPE_DEFAULT]; 2098 } else { 2099 /* shared read/write queues */ 2100 set->map[HCTX_TYPE_DEFAULT].nr_queues = 2101 ctrl->io_queues[HCTX_TYPE_DEFAULT]; 2102 set->map[HCTX_TYPE_DEFAULT].queue_offset = 0; 2103 set->map[HCTX_TYPE_READ].nr_queues = 2104 ctrl->io_queues[HCTX_TYPE_DEFAULT]; 2105 set->map[HCTX_TYPE_READ].queue_offset = 0; 2106 } 2107 blk_mq_rdma_map_queues(&set->map[HCTX_TYPE_DEFAULT], 2108 ctrl->device->dev, 0); 2109 blk_mq_rdma_map_queues(&set->map[HCTX_TYPE_READ], 2110 ctrl->device->dev, 0); 2111 2112 if (opts->nr_poll_queues && ctrl->io_queues[HCTX_TYPE_POLL]) { 2113 /* map dedicated poll queues only if we have queues left */ 2114 set->map[HCTX_TYPE_POLL].nr_queues = 2115 ctrl->io_queues[HCTX_TYPE_POLL]; 2116 set->map[HCTX_TYPE_POLL].queue_offset = 2117 ctrl->io_queues[HCTX_TYPE_DEFAULT] + 2118 ctrl->io_queues[HCTX_TYPE_READ]; 2119 blk_mq_map_queues(&set->map[HCTX_TYPE_POLL]); 2120 } 2121 2122 dev_info(ctrl->ctrl.device, 2123 "mapped %d/%d/%d default/read/poll queues.\n", 2124 ctrl->io_queues[HCTX_TYPE_DEFAULT], 2125 ctrl->io_queues[HCTX_TYPE_READ], 2126 ctrl->io_queues[HCTX_TYPE_POLL]); 2127 2128 return 0; 2129 } 2130 2131 static const struct blk_mq_ops nvme_rdma_mq_ops = { 2132 .queue_rq = nvme_rdma_queue_rq, 2133 .complete = nvme_rdma_complete_rq, 2134 .init_request = nvme_rdma_init_request, 2135 .exit_request = nvme_rdma_exit_request, 2136 .init_hctx = nvme_rdma_init_hctx, 2137 .timeout = nvme_rdma_timeout, 2138 .map_queues = nvme_rdma_map_queues, 2139 .poll = nvme_rdma_poll, 2140 }; 2141 2142 static const struct blk_mq_ops nvme_rdma_admin_mq_ops = { 2143 .queue_rq = nvme_rdma_queue_rq, 2144 .complete = nvme_rdma_complete_rq, 2145 .init_request = nvme_rdma_init_request, 2146 .exit_request = nvme_rdma_exit_request, 2147 .init_hctx = nvme_rdma_init_admin_hctx, 2148 .timeout = nvme_rdma_timeout, 2149 }; 2150 2151 static void nvme_rdma_shutdown_ctrl(struct nvme_rdma_ctrl *ctrl, bool shutdown) 2152 { 2153 cancel_work_sync(&ctrl->err_work); 2154 cancel_delayed_work_sync(&ctrl->reconnect_work); 2155 2156 nvme_rdma_teardown_io_queues(ctrl, shutdown); 2157 blk_mq_quiesce_queue(ctrl->ctrl.admin_q); 2158 if (shutdown) 2159 nvme_shutdown_ctrl(&ctrl->ctrl); 2160 else 2161 nvme_disable_ctrl(&ctrl->ctrl); 2162 nvme_rdma_teardown_admin_queue(ctrl, shutdown); 2163 } 2164 2165 static void nvme_rdma_delete_ctrl(struct nvme_ctrl *ctrl) 2166 { 2167 nvme_rdma_shutdown_ctrl(to_rdma_ctrl(ctrl), true); 2168 } 2169 2170 static void nvme_rdma_reset_ctrl_work(struct work_struct *work) 2171 { 2172 struct nvme_rdma_ctrl *ctrl = 2173 container_of(work, struct nvme_rdma_ctrl, ctrl.reset_work); 2174 2175 nvme_stop_ctrl(&ctrl->ctrl); 2176 nvme_rdma_shutdown_ctrl(ctrl, false); 2177 2178 if (!nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_CONNECTING)) { 2179 /* state change failure should never happen */ 2180 WARN_ON_ONCE(1); 2181 return; 2182 } 2183 2184 if (nvme_rdma_setup_ctrl(ctrl, false)) 2185 goto out_fail; 2186 2187 return; 2188 2189 out_fail: 2190 ++ctrl->ctrl.nr_reconnects; 2191 nvme_rdma_reconnect_or_remove(ctrl); 2192 } 2193 2194 static const struct nvme_ctrl_ops nvme_rdma_ctrl_ops = { 2195 .name = "rdma", 2196 .module = THIS_MODULE, 2197 .flags = NVME_F_FABRICS | NVME_F_METADATA_SUPPORTED, 2198 .reg_read32 = nvmf_reg_read32, 2199 .reg_read64 = nvmf_reg_read64, 2200 .reg_write32 = nvmf_reg_write32, 2201 .free_ctrl = nvme_rdma_free_ctrl, 2202 .submit_async_event = nvme_rdma_submit_async_event, 2203 .delete_ctrl = nvme_rdma_delete_ctrl, 2204 .get_address = nvmf_get_address, 2205 }; 2206 2207 /* 2208 * Fails a connection request if it matches an existing controller 2209 * (association) with the same tuple: 2210 * <Host NQN, Host ID, local address, remote address, remote port, SUBSYS NQN> 2211 * 2212 * if local address is not specified in the request, it will match an 2213 * existing controller with all the other parameters the same and no 2214 * local port address specified as well. 2215 * 2216 * The ports don't need to be compared as they are intrinsically 2217 * already matched by the port pointers supplied. 2218 */ 2219 static bool 2220 nvme_rdma_existing_controller(struct nvmf_ctrl_options *opts) 2221 { 2222 struct nvme_rdma_ctrl *ctrl; 2223 bool found = false; 2224 2225 mutex_lock(&nvme_rdma_ctrl_mutex); 2226 list_for_each_entry(ctrl, &nvme_rdma_ctrl_list, list) { 2227 found = nvmf_ip_options_match(&ctrl->ctrl, opts); 2228 if (found) 2229 break; 2230 } 2231 mutex_unlock(&nvme_rdma_ctrl_mutex); 2232 2233 return found; 2234 } 2235 2236 static struct nvme_ctrl *nvme_rdma_create_ctrl(struct device *dev, 2237 struct nvmf_ctrl_options *opts) 2238 { 2239 struct nvme_rdma_ctrl *ctrl; 2240 int ret; 2241 bool changed; 2242 2243 ctrl = kzalloc(sizeof(*ctrl), GFP_KERNEL); 2244 if (!ctrl) 2245 return ERR_PTR(-ENOMEM); 2246 ctrl->ctrl.opts = opts; 2247 INIT_LIST_HEAD(&ctrl->list); 2248 2249 if (!(opts->mask & NVMF_OPT_TRSVCID)) { 2250 opts->trsvcid = 2251 kstrdup(__stringify(NVME_RDMA_IP_PORT), GFP_KERNEL); 2252 if (!opts->trsvcid) { 2253 ret = -ENOMEM; 2254 goto out_free_ctrl; 2255 } 2256 opts->mask |= NVMF_OPT_TRSVCID; 2257 } 2258 2259 ret = inet_pton_with_scope(&init_net, AF_UNSPEC, 2260 opts->traddr, opts->trsvcid, &ctrl->addr); 2261 if (ret) { 2262 pr_err("malformed address passed: %s:%s\n", 2263 opts->traddr, opts->trsvcid); 2264 goto out_free_ctrl; 2265 } 2266 2267 if (opts->mask & NVMF_OPT_HOST_TRADDR) { 2268 ret = inet_pton_with_scope(&init_net, AF_UNSPEC, 2269 opts->host_traddr, NULL, &ctrl->src_addr); 2270 if (ret) { 2271 pr_err("malformed src address passed: %s\n", 2272 opts->host_traddr); 2273 goto out_free_ctrl; 2274 } 2275 } 2276 2277 if (!opts->duplicate_connect && nvme_rdma_existing_controller(opts)) { 2278 ret = -EALREADY; 2279 goto out_free_ctrl; 2280 } 2281 2282 INIT_DELAYED_WORK(&ctrl->reconnect_work, 2283 nvme_rdma_reconnect_ctrl_work); 2284 INIT_WORK(&ctrl->err_work, nvme_rdma_error_recovery_work); 2285 INIT_WORK(&ctrl->ctrl.reset_work, nvme_rdma_reset_ctrl_work); 2286 2287 ctrl->ctrl.queue_count = opts->nr_io_queues + opts->nr_write_queues + 2288 opts->nr_poll_queues + 1; 2289 ctrl->ctrl.sqsize = opts->queue_size - 1; 2290 ctrl->ctrl.kato = opts->kato; 2291 2292 ret = -ENOMEM; 2293 ctrl->queues = kcalloc(ctrl->ctrl.queue_count, sizeof(*ctrl->queues), 2294 GFP_KERNEL); 2295 if (!ctrl->queues) 2296 goto out_free_ctrl; 2297 2298 ret = nvme_init_ctrl(&ctrl->ctrl, dev, &nvme_rdma_ctrl_ops, 2299 0 /* no quirks, we're perfect! */); 2300 if (ret) 2301 goto out_kfree_queues; 2302 2303 changed = nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_CONNECTING); 2304 WARN_ON_ONCE(!changed); 2305 2306 ret = nvme_rdma_setup_ctrl(ctrl, true); 2307 if (ret) 2308 goto out_uninit_ctrl; 2309 2310 dev_info(ctrl->ctrl.device, "new ctrl: NQN \"%s\", addr %pISpcs\n", 2311 ctrl->ctrl.opts->subsysnqn, &ctrl->addr); 2312 2313 mutex_lock(&nvme_rdma_ctrl_mutex); 2314 list_add_tail(&ctrl->list, &nvme_rdma_ctrl_list); 2315 mutex_unlock(&nvme_rdma_ctrl_mutex); 2316 2317 return &ctrl->ctrl; 2318 2319 out_uninit_ctrl: 2320 nvme_uninit_ctrl(&ctrl->ctrl); 2321 nvme_put_ctrl(&ctrl->ctrl); 2322 if (ret > 0) 2323 ret = -EIO; 2324 return ERR_PTR(ret); 2325 out_kfree_queues: 2326 kfree(ctrl->queues); 2327 out_free_ctrl: 2328 kfree(ctrl); 2329 return ERR_PTR(ret); 2330 } 2331 2332 static struct nvmf_transport_ops nvme_rdma_transport = { 2333 .name = "rdma", 2334 .module = THIS_MODULE, 2335 .required_opts = NVMF_OPT_TRADDR, 2336 .allowed_opts = NVMF_OPT_TRSVCID | NVMF_OPT_RECONNECT_DELAY | 2337 NVMF_OPT_HOST_TRADDR | NVMF_OPT_CTRL_LOSS_TMO | 2338 NVMF_OPT_NR_WRITE_QUEUES | NVMF_OPT_NR_POLL_QUEUES | 2339 NVMF_OPT_TOS, 2340 .create_ctrl = nvme_rdma_create_ctrl, 2341 }; 2342 2343 static void nvme_rdma_remove_one(struct ib_device *ib_device, void *client_data) 2344 { 2345 struct nvme_rdma_ctrl *ctrl; 2346 struct nvme_rdma_device *ndev; 2347 bool found = false; 2348 2349 mutex_lock(&device_list_mutex); 2350 list_for_each_entry(ndev, &device_list, entry) { 2351 if (ndev->dev == ib_device) { 2352 found = true; 2353 break; 2354 } 2355 } 2356 mutex_unlock(&device_list_mutex); 2357 2358 if (!found) 2359 return; 2360 2361 /* Delete all controllers using this device */ 2362 mutex_lock(&nvme_rdma_ctrl_mutex); 2363 list_for_each_entry(ctrl, &nvme_rdma_ctrl_list, list) { 2364 if (ctrl->device->dev != ib_device) 2365 continue; 2366 nvme_delete_ctrl(&ctrl->ctrl); 2367 } 2368 mutex_unlock(&nvme_rdma_ctrl_mutex); 2369 2370 flush_workqueue(nvme_delete_wq); 2371 } 2372 2373 static struct ib_client nvme_rdma_ib_client = { 2374 .name = "nvme_rdma", 2375 .remove = nvme_rdma_remove_one 2376 }; 2377 2378 static int __init nvme_rdma_init_module(void) 2379 { 2380 int ret; 2381 2382 ret = ib_register_client(&nvme_rdma_ib_client); 2383 if (ret) 2384 return ret; 2385 2386 ret = nvmf_register_transport(&nvme_rdma_transport); 2387 if (ret) 2388 goto err_unreg_client; 2389 2390 return 0; 2391 2392 err_unreg_client: 2393 ib_unregister_client(&nvme_rdma_ib_client); 2394 return ret; 2395 } 2396 2397 static void __exit nvme_rdma_cleanup_module(void) 2398 { 2399 struct nvme_rdma_ctrl *ctrl; 2400 2401 nvmf_unregister_transport(&nvme_rdma_transport); 2402 ib_unregister_client(&nvme_rdma_ib_client); 2403 2404 mutex_lock(&nvme_rdma_ctrl_mutex); 2405 list_for_each_entry(ctrl, &nvme_rdma_ctrl_list, list) 2406 nvme_delete_ctrl(&ctrl->ctrl); 2407 mutex_unlock(&nvme_rdma_ctrl_mutex); 2408 flush_workqueue(nvme_delete_wq); 2409 } 2410 2411 module_init(nvme_rdma_init_module); 2412 module_exit(nvme_rdma_cleanup_module); 2413 2414 MODULE_LICENSE("GPL v2"); 2415