1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * NVMe over Fabrics RDMA host code. 4 * Copyright (c) 2015-2016 HGST, a Western Digital Company. 5 */ 6 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 7 #include <linux/module.h> 8 #include <linux/init.h> 9 #include <linux/slab.h> 10 #include <rdma/mr_pool.h> 11 #include <linux/err.h> 12 #include <linux/string.h> 13 #include <linux/atomic.h> 14 #include <linux/blk-mq.h> 15 #include <linux/blk-mq-rdma.h> 16 #include <linux/types.h> 17 #include <linux/list.h> 18 #include <linux/mutex.h> 19 #include <linux/scatterlist.h> 20 #include <linux/nvme.h> 21 #include <asm/unaligned.h> 22 23 #include <rdma/ib_verbs.h> 24 #include <rdma/rdma_cm.h> 25 #include <linux/nvme-rdma.h> 26 27 #include "nvme.h" 28 #include "fabrics.h" 29 30 31 #define NVME_RDMA_CONNECT_TIMEOUT_MS 3000 /* 3 second */ 32 33 #define NVME_RDMA_MAX_SEGMENTS 256 34 35 #define NVME_RDMA_MAX_INLINE_SEGMENTS 4 36 37 #define NVME_RDMA_DATA_SGL_SIZE \ 38 (sizeof(struct scatterlist) * NVME_INLINE_SG_CNT) 39 #define NVME_RDMA_METADATA_SGL_SIZE \ 40 (sizeof(struct scatterlist) * NVME_INLINE_METADATA_SG_CNT) 41 42 struct nvme_rdma_device { 43 struct ib_device *dev; 44 struct ib_pd *pd; 45 struct kref ref; 46 struct list_head entry; 47 unsigned int num_inline_segments; 48 }; 49 50 struct nvme_rdma_qe { 51 struct ib_cqe cqe; 52 void *data; 53 u64 dma; 54 }; 55 56 struct nvme_rdma_sgl { 57 int nents; 58 struct sg_table sg_table; 59 }; 60 61 struct nvme_rdma_queue; 62 struct nvme_rdma_request { 63 struct nvme_request req; 64 struct ib_mr *mr; 65 struct nvme_rdma_qe sqe; 66 union nvme_result result; 67 __le16 status; 68 refcount_t ref; 69 struct ib_sge sge[1 + NVME_RDMA_MAX_INLINE_SEGMENTS]; 70 u32 num_sge; 71 struct ib_reg_wr reg_wr; 72 struct ib_cqe reg_cqe; 73 struct nvme_rdma_queue *queue; 74 struct nvme_rdma_sgl data_sgl; 75 struct nvme_rdma_sgl *metadata_sgl; 76 bool use_sig_mr; 77 }; 78 79 enum nvme_rdma_queue_flags { 80 NVME_RDMA_Q_ALLOCATED = 0, 81 NVME_RDMA_Q_LIVE = 1, 82 NVME_RDMA_Q_TR_READY = 2, 83 }; 84 85 struct nvme_rdma_queue { 86 struct nvme_rdma_qe *rsp_ring; 87 int queue_size; 88 size_t cmnd_capsule_len; 89 struct nvme_rdma_ctrl *ctrl; 90 struct nvme_rdma_device *device; 91 struct ib_cq *ib_cq; 92 struct ib_qp *qp; 93 94 unsigned long flags; 95 struct rdma_cm_id *cm_id; 96 int cm_error; 97 struct completion cm_done; 98 bool pi_support; 99 }; 100 101 struct nvme_rdma_ctrl { 102 /* read only in the hot path */ 103 struct nvme_rdma_queue *queues; 104 105 /* other member variables */ 106 struct blk_mq_tag_set tag_set; 107 struct work_struct err_work; 108 109 struct nvme_rdma_qe async_event_sqe; 110 111 struct delayed_work reconnect_work; 112 113 struct list_head list; 114 115 struct blk_mq_tag_set admin_tag_set; 116 struct nvme_rdma_device *device; 117 118 u32 max_fr_pages; 119 120 struct sockaddr_storage addr; 121 struct sockaddr_storage src_addr; 122 123 struct nvme_ctrl ctrl; 124 bool use_inline_data; 125 u32 io_queues[HCTX_MAX_TYPES]; 126 }; 127 128 static inline struct nvme_rdma_ctrl *to_rdma_ctrl(struct nvme_ctrl *ctrl) 129 { 130 return container_of(ctrl, struct nvme_rdma_ctrl, ctrl); 131 } 132 133 static LIST_HEAD(device_list); 134 static DEFINE_MUTEX(device_list_mutex); 135 136 static LIST_HEAD(nvme_rdma_ctrl_list); 137 static DEFINE_MUTEX(nvme_rdma_ctrl_mutex); 138 139 /* 140 * Disabling this option makes small I/O goes faster, but is fundamentally 141 * unsafe. With it turned off we will have to register a global rkey that 142 * allows read and write access to all physical memory. 143 */ 144 static bool register_always = true; 145 module_param(register_always, bool, 0444); 146 MODULE_PARM_DESC(register_always, 147 "Use memory registration even for contiguous memory regions"); 148 149 static int nvme_rdma_cm_handler(struct rdma_cm_id *cm_id, 150 struct rdma_cm_event *event); 151 static void nvme_rdma_recv_done(struct ib_cq *cq, struct ib_wc *wc); 152 153 static const struct blk_mq_ops nvme_rdma_mq_ops; 154 static const struct blk_mq_ops nvme_rdma_admin_mq_ops; 155 156 static inline int nvme_rdma_queue_idx(struct nvme_rdma_queue *queue) 157 { 158 return queue - queue->ctrl->queues; 159 } 160 161 static bool nvme_rdma_poll_queue(struct nvme_rdma_queue *queue) 162 { 163 return nvme_rdma_queue_idx(queue) > 164 queue->ctrl->io_queues[HCTX_TYPE_DEFAULT] + 165 queue->ctrl->io_queues[HCTX_TYPE_READ]; 166 } 167 168 static inline size_t nvme_rdma_inline_data_size(struct nvme_rdma_queue *queue) 169 { 170 return queue->cmnd_capsule_len - sizeof(struct nvme_command); 171 } 172 173 static void nvme_rdma_free_qe(struct ib_device *ibdev, struct nvme_rdma_qe *qe, 174 size_t capsule_size, enum dma_data_direction dir) 175 { 176 ib_dma_unmap_single(ibdev, qe->dma, capsule_size, dir); 177 kfree(qe->data); 178 } 179 180 static int nvme_rdma_alloc_qe(struct ib_device *ibdev, struct nvme_rdma_qe *qe, 181 size_t capsule_size, enum dma_data_direction dir) 182 { 183 qe->data = kzalloc(capsule_size, GFP_KERNEL); 184 if (!qe->data) 185 return -ENOMEM; 186 187 qe->dma = ib_dma_map_single(ibdev, qe->data, capsule_size, dir); 188 if (ib_dma_mapping_error(ibdev, qe->dma)) { 189 kfree(qe->data); 190 qe->data = NULL; 191 return -ENOMEM; 192 } 193 194 return 0; 195 } 196 197 static void nvme_rdma_free_ring(struct ib_device *ibdev, 198 struct nvme_rdma_qe *ring, size_t ib_queue_size, 199 size_t capsule_size, enum dma_data_direction dir) 200 { 201 int i; 202 203 for (i = 0; i < ib_queue_size; i++) 204 nvme_rdma_free_qe(ibdev, &ring[i], capsule_size, dir); 205 kfree(ring); 206 } 207 208 static struct nvme_rdma_qe *nvme_rdma_alloc_ring(struct ib_device *ibdev, 209 size_t ib_queue_size, size_t capsule_size, 210 enum dma_data_direction dir) 211 { 212 struct nvme_rdma_qe *ring; 213 int i; 214 215 ring = kcalloc(ib_queue_size, sizeof(struct nvme_rdma_qe), GFP_KERNEL); 216 if (!ring) 217 return NULL; 218 219 /* 220 * Bind the CQEs (post recv buffers) DMA mapping to the RDMA queue 221 * lifetime. It's safe, since any chage in the underlying RDMA device 222 * will issue error recovery and queue re-creation. 223 */ 224 for (i = 0; i < ib_queue_size; i++) { 225 if (nvme_rdma_alloc_qe(ibdev, &ring[i], capsule_size, dir)) 226 goto out_free_ring; 227 } 228 229 return ring; 230 231 out_free_ring: 232 nvme_rdma_free_ring(ibdev, ring, i, capsule_size, dir); 233 return NULL; 234 } 235 236 static void nvme_rdma_qp_event(struct ib_event *event, void *context) 237 { 238 pr_debug("QP event %s (%d)\n", 239 ib_event_msg(event->event), event->event); 240 241 } 242 243 static int nvme_rdma_wait_for_cm(struct nvme_rdma_queue *queue) 244 { 245 int ret; 246 247 ret = wait_for_completion_interruptible_timeout(&queue->cm_done, 248 msecs_to_jiffies(NVME_RDMA_CONNECT_TIMEOUT_MS) + 1); 249 if (ret < 0) 250 return ret; 251 if (ret == 0) 252 return -ETIMEDOUT; 253 WARN_ON_ONCE(queue->cm_error > 0); 254 return queue->cm_error; 255 } 256 257 static int nvme_rdma_create_qp(struct nvme_rdma_queue *queue, const int factor) 258 { 259 struct nvme_rdma_device *dev = queue->device; 260 struct ib_qp_init_attr init_attr; 261 int ret; 262 263 memset(&init_attr, 0, sizeof(init_attr)); 264 init_attr.event_handler = nvme_rdma_qp_event; 265 /* +1 for drain */ 266 init_attr.cap.max_send_wr = factor * queue->queue_size + 1; 267 /* +1 for drain */ 268 init_attr.cap.max_recv_wr = queue->queue_size + 1; 269 init_attr.cap.max_recv_sge = 1; 270 init_attr.cap.max_send_sge = 1 + dev->num_inline_segments; 271 init_attr.sq_sig_type = IB_SIGNAL_REQ_WR; 272 init_attr.qp_type = IB_QPT_RC; 273 init_attr.send_cq = queue->ib_cq; 274 init_attr.recv_cq = queue->ib_cq; 275 if (queue->pi_support) 276 init_attr.create_flags |= IB_QP_CREATE_INTEGRITY_EN; 277 278 ret = rdma_create_qp(queue->cm_id, dev->pd, &init_attr); 279 280 queue->qp = queue->cm_id->qp; 281 return ret; 282 } 283 284 static void nvme_rdma_exit_request(struct blk_mq_tag_set *set, 285 struct request *rq, unsigned int hctx_idx) 286 { 287 struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); 288 289 kfree(req->sqe.data); 290 } 291 292 static int nvme_rdma_init_request(struct blk_mq_tag_set *set, 293 struct request *rq, unsigned int hctx_idx, 294 unsigned int numa_node) 295 { 296 struct nvme_rdma_ctrl *ctrl = set->driver_data; 297 struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); 298 int queue_idx = (set == &ctrl->tag_set) ? hctx_idx + 1 : 0; 299 struct nvme_rdma_queue *queue = &ctrl->queues[queue_idx]; 300 301 nvme_req(rq)->ctrl = &ctrl->ctrl; 302 req->sqe.data = kzalloc(sizeof(struct nvme_command), GFP_KERNEL); 303 if (!req->sqe.data) 304 return -ENOMEM; 305 306 /* metadata nvme_rdma_sgl struct is located after command's data SGL */ 307 if (queue->pi_support) 308 req->metadata_sgl = (void *)nvme_req(rq) + 309 sizeof(struct nvme_rdma_request) + 310 NVME_RDMA_DATA_SGL_SIZE; 311 312 req->queue = queue; 313 314 return 0; 315 } 316 317 static int nvme_rdma_init_hctx(struct blk_mq_hw_ctx *hctx, void *data, 318 unsigned int hctx_idx) 319 { 320 struct nvme_rdma_ctrl *ctrl = data; 321 struct nvme_rdma_queue *queue = &ctrl->queues[hctx_idx + 1]; 322 323 BUG_ON(hctx_idx >= ctrl->ctrl.queue_count); 324 325 hctx->driver_data = queue; 326 return 0; 327 } 328 329 static int nvme_rdma_init_admin_hctx(struct blk_mq_hw_ctx *hctx, void *data, 330 unsigned int hctx_idx) 331 { 332 struct nvme_rdma_ctrl *ctrl = data; 333 struct nvme_rdma_queue *queue = &ctrl->queues[0]; 334 335 BUG_ON(hctx_idx != 0); 336 337 hctx->driver_data = queue; 338 return 0; 339 } 340 341 static void nvme_rdma_free_dev(struct kref *ref) 342 { 343 struct nvme_rdma_device *ndev = 344 container_of(ref, struct nvme_rdma_device, ref); 345 346 mutex_lock(&device_list_mutex); 347 list_del(&ndev->entry); 348 mutex_unlock(&device_list_mutex); 349 350 ib_dealloc_pd(ndev->pd); 351 kfree(ndev); 352 } 353 354 static void nvme_rdma_dev_put(struct nvme_rdma_device *dev) 355 { 356 kref_put(&dev->ref, nvme_rdma_free_dev); 357 } 358 359 static int nvme_rdma_dev_get(struct nvme_rdma_device *dev) 360 { 361 return kref_get_unless_zero(&dev->ref); 362 } 363 364 static struct nvme_rdma_device * 365 nvme_rdma_find_get_device(struct rdma_cm_id *cm_id) 366 { 367 struct nvme_rdma_device *ndev; 368 369 mutex_lock(&device_list_mutex); 370 list_for_each_entry(ndev, &device_list, entry) { 371 if (ndev->dev->node_guid == cm_id->device->node_guid && 372 nvme_rdma_dev_get(ndev)) 373 goto out_unlock; 374 } 375 376 ndev = kzalloc(sizeof(*ndev), GFP_KERNEL); 377 if (!ndev) 378 goto out_err; 379 380 ndev->dev = cm_id->device; 381 kref_init(&ndev->ref); 382 383 ndev->pd = ib_alloc_pd(ndev->dev, 384 register_always ? 0 : IB_PD_UNSAFE_GLOBAL_RKEY); 385 if (IS_ERR(ndev->pd)) 386 goto out_free_dev; 387 388 if (!(ndev->dev->attrs.device_cap_flags & 389 IB_DEVICE_MEM_MGT_EXTENSIONS)) { 390 dev_err(&ndev->dev->dev, 391 "Memory registrations not supported.\n"); 392 goto out_free_pd; 393 } 394 395 ndev->num_inline_segments = min(NVME_RDMA_MAX_INLINE_SEGMENTS, 396 ndev->dev->attrs.max_send_sge - 1); 397 list_add(&ndev->entry, &device_list); 398 out_unlock: 399 mutex_unlock(&device_list_mutex); 400 return ndev; 401 402 out_free_pd: 403 ib_dealloc_pd(ndev->pd); 404 out_free_dev: 405 kfree(ndev); 406 out_err: 407 mutex_unlock(&device_list_mutex); 408 return NULL; 409 } 410 411 static void nvme_rdma_destroy_queue_ib(struct nvme_rdma_queue *queue) 412 { 413 struct nvme_rdma_device *dev; 414 struct ib_device *ibdev; 415 416 if (!test_and_clear_bit(NVME_RDMA_Q_TR_READY, &queue->flags)) 417 return; 418 419 dev = queue->device; 420 ibdev = dev->dev; 421 422 if (queue->pi_support) 423 ib_mr_pool_destroy(queue->qp, &queue->qp->sig_mrs); 424 ib_mr_pool_destroy(queue->qp, &queue->qp->rdma_mrs); 425 426 /* 427 * The cm_id object might have been destroyed during RDMA connection 428 * establishment error flow to avoid getting other cma events, thus 429 * the destruction of the QP shouldn't use rdma_cm API. 430 */ 431 ib_destroy_qp(queue->qp); 432 ib_free_cq(queue->ib_cq); 433 434 nvme_rdma_free_ring(ibdev, queue->rsp_ring, queue->queue_size, 435 sizeof(struct nvme_completion), DMA_FROM_DEVICE); 436 437 nvme_rdma_dev_put(dev); 438 } 439 440 static int nvme_rdma_get_max_fr_pages(struct ib_device *ibdev, bool pi_support) 441 { 442 u32 max_page_list_len; 443 444 if (pi_support) 445 max_page_list_len = ibdev->attrs.max_pi_fast_reg_page_list_len; 446 else 447 max_page_list_len = ibdev->attrs.max_fast_reg_page_list_len; 448 449 return min_t(u32, NVME_RDMA_MAX_SEGMENTS, max_page_list_len - 1); 450 } 451 452 static int nvme_rdma_create_queue_ib(struct nvme_rdma_queue *queue) 453 { 454 struct ib_device *ibdev; 455 const int send_wr_factor = 3; /* MR, SEND, INV */ 456 const int cq_factor = send_wr_factor + 1; /* + RECV */ 457 int comp_vector, idx = nvme_rdma_queue_idx(queue); 458 enum ib_poll_context poll_ctx; 459 int ret, pages_per_mr; 460 461 queue->device = nvme_rdma_find_get_device(queue->cm_id); 462 if (!queue->device) { 463 dev_err(queue->cm_id->device->dev.parent, 464 "no client data found!\n"); 465 return -ECONNREFUSED; 466 } 467 ibdev = queue->device->dev; 468 469 /* 470 * Spread I/O queues completion vectors according their queue index. 471 * Admin queues can always go on completion vector 0. 472 */ 473 comp_vector = idx == 0 ? idx : idx - 1; 474 475 /* Polling queues need direct cq polling context */ 476 if (nvme_rdma_poll_queue(queue)) 477 poll_ctx = IB_POLL_DIRECT; 478 else 479 poll_ctx = IB_POLL_SOFTIRQ; 480 481 /* +1 for ib_stop_cq */ 482 queue->ib_cq = ib_alloc_cq(ibdev, queue, 483 cq_factor * queue->queue_size + 1, 484 comp_vector, poll_ctx); 485 if (IS_ERR(queue->ib_cq)) { 486 ret = PTR_ERR(queue->ib_cq); 487 goto out_put_dev; 488 } 489 490 ret = nvme_rdma_create_qp(queue, send_wr_factor); 491 if (ret) 492 goto out_destroy_ib_cq; 493 494 queue->rsp_ring = nvme_rdma_alloc_ring(ibdev, queue->queue_size, 495 sizeof(struct nvme_completion), DMA_FROM_DEVICE); 496 if (!queue->rsp_ring) { 497 ret = -ENOMEM; 498 goto out_destroy_qp; 499 } 500 501 /* 502 * Currently we don't use SG_GAPS MR's so if the first entry is 503 * misaligned we'll end up using two entries for a single data page, 504 * so one additional entry is required. 505 */ 506 pages_per_mr = nvme_rdma_get_max_fr_pages(ibdev, queue->pi_support) + 1; 507 ret = ib_mr_pool_init(queue->qp, &queue->qp->rdma_mrs, 508 queue->queue_size, 509 IB_MR_TYPE_MEM_REG, 510 pages_per_mr, 0); 511 if (ret) { 512 dev_err(queue->ctrl->ctrl.device, 513 "failed to initialize MR pool sized %d for QID %d\n", 514 queue->queue_size, idx); 515 goto out_destroy_ring; 516 } 517 518 if (queue->pi_support) { 519 ret = ib_mr_pool_init(queue->qp, &queue->qp->sig_mrs, 520 queue->queue_size, IB_MR_TYPE_INTEGRITY, 521 pages_per_mr, pages_per_mr); 522 if (ret) { 523 dev_err(queue->ctrl->ctrl.device, 524 "failed to initialize PI MR pool sized %d for QID %d\n", 525 queue->queue_size, idx); 526 goto out_destroy_mr_pool; 527 } 528 } 529 530 set_bit(NVME_RDMA_Q_TR_READY, &queue->flags); 531 532 return 0; 533 534 out_destroy_mr_pool: 535 ib_mr_pool_destroy(queue->qp, &queue->qp->rdma_mrs); 536 out_destroy_ring: 537 nvme_rdma_free_ring(ibdev, queue->rsp_ring, queue->queue_size, 538 sizeof(struct nvme_completion), DMA_FROM_DEVICE); 539 out_destroy_qp: 540 rdma_destroy_qp(queue->cm_id); 541 out_destroy_ib_cq: 542 ib_free_cq(queue->ib_cq); 543 out_put_dev: 544 nvme_rdma_dev_put(queue->device); 545 return ret; 546 } 547 548 static int nvme_rdma_alloc_queue(struct nvme_rdma_ctrl *ctrl, 549 int idx, size_t queue_size) 550 { 551 struct nvme_rdma_queue *queue; 552 struct sockaddr *src_addr = NULL; 553 int ret; 554 555 queue = &ctrl->queues[idx]; 556 queue->ctrl = ctrl; 557 if (idx && ctrl->ctrl.max_integrity_segments) 558 queue->pi_support = true; 559 else 560 queue->pi_support = false; 561 init_completion(&queue->cm_done); 562 563 if (idx > 0) 564 queue->cmnd_capsule_len = ctrl->ctrl.ioccsz * 16; 565 else 566 queue->cmnd_capsule_len = sizeof(struct nvme_command); 567 568 queue->queue_size = queue_size; 569 570 queue->cm_id = rdma_create_id(&init_net, nvme_rdma_cm_handler, queue, 571 RDMA_PS_TCP, IB_QPT_RC); 572 if (IS_ERR(queue->cm_id)) { 573 dev_info(ctrl->ctrl.device, 574 "failed to create CM ID: %ld\n", PTR_ERR(queue->cm_id)); 575 return PTR_ERR(queue->cm_id); 576 } 577 578 if (ctrl->ctrl.opts->mask & NVMF_OPT_HOST_TRADDR) 579 src_addr = (struct sockaddr *)&ctrl->src_addr; 580 581 queue->cm_error = -ETIMEDOUT; 582 ret = rdma_resolve_addr(queue->cm_id, src_addr, 583 (struct sockaddr *)&ctrl->addr, 584 NVME_RDMA_CONNECT_TIMEOUT_MS); 585 if (ret) { 586 dev_info(ctrl->ctrl.device, 587 "rdma_resolve_addr failed (%d).\n", ret); 588 goto out_destroy_cm_id; 589 } 590 591 ret = nvme_rdma_wait_for_cm(queue); 592 if (ret) { 593 dev_info(ctrl->ctrl.device, 594 "rdma connection establishment failed (%d)\n", ret); 595 goto out_destroy_cm_id; 596 } 597 598 set_bit(NVME_RDMA_Q_ALLOCATED, &queue->flags); 599 600 return 0; 601 602 out_destroy_cm_id: 603 rdma_destroy_id(queue->cm_id); 604 nvme_rdma_destroy_queue_ib(queue); 605 return ret; 606 } 607 608 static void __nvme_rdma_stop_queue(struct nvme_rdma_queue *queue) 609 { 610 rdma_disconnect(queue->cm_id); 611 ib_drain_qp(queue->qp); 612 } 613 614 static void nvme_rdma_stop_queue(struct nvme_rdma_queue *queue) 615 { 616 if (!test_and_clear_bit(NVME_RDMA_Q_LIVE, &queue->flags)) 617 return; 618 __nvme_rdma_stop_queue(queue); 619 } 620 621 static void nvme_rdma_free_queue(struct nvme_rdma_queue *queue) 622 { 623 if (!test_and_clear_bit(NVME_RDMA_Q_ALLOCATED, &queue->flags)) 624 return; 625 626 nvme_rdma_destroy_queue_ib(queue); 627 rdma_destroy_id(queue->cm_id); 628 } 629 630 static void nvme_rdma_free_io_queues(struct nvme_rdma_ctrl *ctrl) 631 { 632 int i; 633 634 for (i = 1; i < ctrl->ctrl.queue_count; i++) 635 nvme_rdma_free_queue(&ctrl->queues[i]); 636 } 637 638 static void nvme_rdma_stop_io_queues(struct nvme_rdma_ctrl *ctrl) 639 { 640 int i; 641 642 for (i = 1; i < ctrl->ctrl.queue_count; i++) 643 nvme_rdma_stop_queue(&ctrl->queues[i]); 644 } 645 646 static int nvme_rdma_start_queue(struct nvme_rdma_ctrl *ctrl, int idx) 647 { 648 struct nvme_rdma_queue *queue = &ctrl->queues[idx]; 649 bool poll = nvme_rdma_poll_queue(queue); 650 int ret; 651 652 if (idx) 653 ret = nvmf_connect_io_queue(&ctrl->ctrl, idx, poll); 654 else 655 ret = nvmf_connect_admin_queue(&ctrl->ctrl); 656 657 if (!ret) { 658 set_bit(NVME_RDMA_Q_LIVE, &queue->flags); 659 } else { 660 if (test_bit(NVME_RDMA_Q_ALLOCATED, &queue->flags)) 661 __nvme_rdma_stop_queue(queue); 662 dev_info(ctrl->ctrl.device, 663 "failed to connect queue: %d ret=%d\n", idx, ret); 664 } 665 return ret; 666 } 667 668 static int nvme_rdma_start_io_queues(struct nvme_rdma_ctrl *ctrl) 669 { 670 int i, ret = 0; 671 672 for (i = 1; i < ctrl->ctrl.queue_count; i++) { 673 ret = nvme_rdma_start_queue(ctrl, i); 674 if (ret) 675 goto out_stop_queues; 676 } 677 678 return 0; 679 680 out_stop_queues: 681 for (i--; i >= 1; i--) 682 nvme_rdma_stop_queue(&ctrl->queues[i]); 683 return ret; 684 } 685 686 static int nvme_rdma_alloc_io_queues(struct nvme_rdma_ctrl *ctrl) 687 { 688 struct nvmf_ctrl_options *opts = ctrl->ctrl.opts; 689 struct ib_device *ibdev = ctrl->device->dev; 690 unsigned int nr_io_queues, nr_default_queues; 691 unsigned int nr_read_queues, nr_poll_queues; 692 int i, ret; 693 694 nr_read_queues = min_t(unsigned int, ibdev->num_comp_vectors, 695 min(opts->nr_io_queues, num_online_cpus())); 696 nr_default_queues = min_t(unsigned int, ibdev->num_comp_vectors, 697 min(opts->nr_write_queues, num_online_cpus())); 698 nr_poll_queues = min(opts->nr_poll_queues, num_online_cpus()); 699 nr_io_queues = nr_read_queues + nr_default_queues + nr_poll_queues; 700 701 ret = nvme_set_queue_count(&ctrl->ctrl, &nr_io_queues); 702 if (ret) 703 return ret; 704 705 ctrl->ctrl.queue_count = nr_io_queues + 1; 706 if (ctrl->ctrl.queue_count < 2) 707 return 0; 708 709 dev_info(ctrl->ctrl.device, 710 "creating %d I/O queues.\n", nr_io_queues); 711 712 if (opts->nr_write_queues && nr_read_queues < nr_io_queues) { 713 /* 714 * separate read/write queues 715 * hand out dedicated default queues only after we have 716 * sufficient read queues. 717 */ 718 ctrl->io_queues[HCTX_TYPE_READ] = nr_read_queues; 719 nr_io_queues -= ctrl->io_queues[HCTX_TYPE_READ]; 720 ctrl->io_queues[HCTX_TYPE_DEFAULT] = 721 min(nr_default_queues, nr_io_queues); 722 nr_io_queues -= ctrl->io_queues[HCTX_TYPE_DEFAULT]; 723 } else { 724 /* 725 * shared read/write queues 726 * either no write queues were requested, or we don't have 727 * sufficient queue count to have dedicated default queues. 728 */ 729 ctrl->io_queues[HCTX_TYPE_DEFAULT] = 730 min(nr_read_queues, nr_io_queues); 731 nr_io_queues -= ctrl->io_queues[HCTX_TYPE_DEFAULT]; 732 } 733 734 if (opts->nr_poll_queues && nr_io_queues) { 735 /* map dedicated poll queues only if we have queues left */ 736 ctrl->io_queues[HCTX_TYPE_POLL] = 737 min(nr_poll_queues, nr_io_queues); 738 } 739 740 for (i = 1; i < ctrl->ctrl.queue_count; i++) { 741 ret = nvme_rdma_alloc_queue(ctrl, i, 742 ctrl->ctrl.sqsize + 1); 743 if (ret) 744 goto out_free_queues; 745 } 746 747 return 0; 748 749 out_free_queues: 750 for (i--; i >= 1; i--) 751 nvme_rdma_free_queue(&ctrl->queues[i]); 752 753 return ret; 754 } 755 756 static struct blk_mq_tag_set *nvme_rdma_alloc_tagset(struct nvme_ctrl *nctrl, 757 bool admin) 758 { 759 struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(nctrl); 760 struct blk_mq_tag_set *set; 761 int ret; 762 763 if (admin) { 764 set = &ctrl->admin_tag_set; 765 memset(set, 0, sizeof(*set)); 766 set->ops = &nvme_rdma_admin_mq_ops; 767 set->queue_depth = NVME_AQ_MQ_TAG_DEPTH; 768 set->reserved_tags = 2; /* connect + keep-alive */ 769 set->numa_node = nctrl->numa_node; 770 set->cmd_size = sizeof(struct nvme_rdma_request) + 771 NVME_RDMA_DATA_SGL_SIZE; 772 set->driver_data = ctrl; 773 set->nr_hw_queues = 1; 774 set->timeout = ADMIN_TIMEOUT; 775 set->flags = BLK_MQ_F_NO_SCHED; 776 } else { 777 set = &ctrl->tag_set; 778 memset(set, 0, sizeof(*set)); 779 set->ops = &nvme_rdma_mq_ops; 780 set->queue_depth = nctrl->sqsize + 1; 781 set->reserved_tags = 1; /* fabric connect */ 782 set->numa_node = nctrl->numa_node; 783 set->flags = BLK_MQ_F_SHOULD_MERGE; 784 set->cmd_size = sizeof(struct nvme_rdma_request) + 785 NVME_RDMA_DATA_SGL_SIZE; 786 if (nctrl->max_integrity_segments) 787 set->cmd_size += sizeof(struct nvme_rdma_sgl) + 788 NVME_RDMA_METADATA_SGL_SIZE; 789 set->driver_data = ctrl; 790 set->nr_hw_queues = nctrl->queue_count - 1; 791 set->timeout = NVME_IO_TIMEOUT; 792 set->nr_maps = nctrl->opts->nr_poll_queues ? HCTX_MAX_TYPES : 2; 793 } 794 795 ret = blk_mq_alloc_tag_set(set); 796 if (ret) 797 return ERR_PTR(ret); 798 799 return set; 800 } 801 802 static void nvme_rdma_destroy_admin_queue(struct nvme_rdma_ctrl *ctrl, 803 bool remove) 804 { 805 if (remove) { 806 blk_cleanup_queue(ctrl->ctrl.admin_q); 807 blk_cleanup_queue(ctrl->ctrl.fabrics_q); 808 blk_mq_free_tag_set(ctrl->ctrl.admin_tagset); 809 } 810 if (ctrl->async_event_sqe.data) { 811 nvme_rdma_free_qe(ctrl->device->dev, &ctrl->async_event_sqe, 812 sizeof(struct nvme_command), DMA_TO_DEVICE); 813 ctrl->async_event_sqe.data = NULL; 814 } 815 nvme_rdma_free_queue(&ctrl->queues[0]); 816 } 817 818 static int nvme_rdma_configure_admin_queue(struct nvme_rdma_ctrl *ctrl, 819 bool new) 820 { 821 bool pi_capable = false; 822 int error; 823 824 error = nvme_rdma_alloc_queue(ctrl, 0, NVME_AQ_DEPTH); 825 if (error) 826 return error; 827 828 ctrl->device = ctrl->queues[0].device; 829 ctrl->ctrl.numa_node = dev_to_node(ctrl->device->dev->dma_device); 830 831 /* T10-PI support */ 832 if (ctrl->device->dev->attrs.device_cap_flags & 833 IB_DEVICE_INTEGRITY_HANDOVER) 834 pi_capable = true; 835 836 ctrl->max_fr_pages = nvme_rdma_get_max_fr_pages(ctrl->device->dev, 837 pi_capable); 838 839 /* 840 * Bind the async event SQE DMA mapping to the admin queue lifetime. 841 * It's safe, since any chage in the underlying RDMA device will issue 842 * error recovery and queue re-creation. 843 */ 844 error = nvme_rdma_alloc_qe(ctrl->device->dev, &ctrl->async_event_sqe, 845 sizeof(struct nvme_command), DMA_TO_DEVICE); 846 if (error) 847 goto out_free_queue; 848 849 if (new) { 850 ctrl->ctrl.admin_tagset = nvme_rdma_alloc_tagset(&ctrl->ctrl, true); 851 if (IS_ERR(ctrl->ctrl.admin_tagset)) { 852 error = PTR_ERR(ctrl->ctrl.admin_tagset); 853 goto out_free_async_qe; 854 } 855 856 ctrl->ctrl.fabrics_q = blk_mq_init_queue(&ctrl->admin_tag_set); 857 if (IS_ERR(ctrl->ctrl.fabrics_q)) { 858 error = PTR_ERR(ctrl->ctrl.fabrics_q); 859 goto out_free_tagset; 860 } 861 862 ctrl->ctrl.admin_q = blk_mq_init_queue(&ctrl->admin_tag_set); 863 if (IS_ERR(ctrl->ctrl.admin_q)) { 864 error = PTR_ERR(ctrl->ctrl.admin_q); 865 goto out_cleanup_fabrics_q; 866 } 867 } 868 869 error = nvme_rdma_start_queue(ctrl, 0); 870 if (error) 871 goto out_cleanup_queue; 872 873 error = nvme_enable_ctrl(&ctrl->ctrl); 874 if (error) 875 goto out_stop_queue; 876 877 ctrl->ctrl.max_segments = ctrl->max_fr_pages; 878 ctrl->ctrl.max_hw_sectors = ctrl->max_fr_pages << (ilog2(SZ_4K) - 9); 879 if (pi_capable) 880 ctrl->ctrl.max_integrity_segments = ctrl->max_fr_pages; 881 else 882 ctrl->ctrl.max_integrity_segments = 0; 883 884 blk_mq_unquiesce_queue(ctrl->ctrl.admin_q); 885 886 error = nvme_init_identify(&ctrl->ctrl); 887 if (error) 888 goto out_stop_queue; 889 890 return 0; 891 892 out_stop_queue: 893 nvme_rdma_stop_queue(&ctrl->queues[0]); 894 out_cleanup_queue: 895 if (new) 896 blk_cleanup_queue(ctrl->ctrl.admin_q); 897 out_cleanup_fabrics_q: 898 if (new) 899 blk_cleanup_queue(ctrl->ctrl.fabrics_q); 900 out_free_tagset: 901 if (new) 902 blk_mq_free_tag_set(ctrl->ctrl.admin_tagset); 903 out_free_async_qe: 904 if (ctrl->async_event_sqe.data) { 905 nvme_rdma_free_qe(ctrl->device->dev, &ctrl->async_event_sqe, 906 sizeof(struct nvme_command), DMA_TO_DEVICE); 907 ctrl->async_event_sqe.data = NULL; 908 } 909 out_free_queue: 910 nvme_rdma_free_queue(&ctrl->queues[0]); 911 return error; 912 } 913 914 static void nvme_rdma_destroy_io_queues(struct nvme_rdma_ctrl *ctrl, 915 bool remove) 916 { 917 if (remove) { 918 blk_cleanup_queue(ctrl->ctrl.connect_q); 919 blk_mq_free_tag_set(ctrl->ctrl.tagset); 920 } 921 nvme_rdma_free_io_queues(ctrl); 922 } 923 924 static int nvme_rdma_configure_io_queues(struct nvme_rdma_ctrl *ctrl, bool new) 925 { 926 int ret; 927 928 ret = nvme_rdma_alloc_io_queues(ctrl); 929 if (ret) 930 return ret; 931 932 if (new) { 933 ctrl->ctrl.tagset = nvme_rdma_alloc_tagset(&ctrl->ctrl, false); 934 if (IS_ERR(ctrl->ctrl.tagset)) { 935 ret = PTR_ERR(ctrl->ctrl.tagset); 936 goto out_free_io_queues; 937 } 938 939 ctrl->ctrl.connect_q = blk_mq_init_queue(&ctrl->tag_set); 940 if (IS_ERR(ctrl->ctrl.connect_q)) { 941 ret = PTR_ERR(ctrl->ctrl.connect_q); 942 goto out_free_tag_set; 943 } 944 } else { 945 blk_mq_update_nr_hw_queues(&ctrl->tag_set, 946 ctrl->ctrl.queue_count - 1); 947 } 948 949 ret = nvme_rdma_start_io_queues(ctrl); 950 if (ret) 951 goto out_cleanup_connect_q; 952 953 return 0; 954 955 out_cleanup_connect_q: 956 if (new) 957 blk_cleanup_queue(ctrl->ctrl.connect_q); 958 out_free_tag_set: 959 if (new) 960 blk_mq_free_tag_set(ctrl->ctrl.tagset); 961 out_free_io_queues: 962 nvme_rdma_free_io_queues(ctrl); 963 return ret; 964 } 965 966 static void nvme_rdma_teardown_admin_queue(struct nvme_rdma_ctrl *ctrl, 967 bool remove) 968 { 969 blk_mq_quiesce_queue(ctrl->ctrl.admin_q); 970 nvme_rdma_stop_queue(&ctrl->queues[0]); 971 if (ctrl->ctrl.admin_tagset) { 972 blk_mq_tagset_busy_iter(ctrl->ctrl.admin_tagset, 973 nvme_cancel_request, &ctrl->ctrl); 974 blk_mq_tagset_wait_completed_request(ctrl->ctrl.admin_tagset); 975 } 976 if (remove) 977 blk_mq_unquiesce_queue(ctrl->ctrl.admin_q); 978 nvme_rdma_destroy_admin_queue(ctrl, remove); 979 } 980 981 static void nvme_rdma_teardown_io_queues(struct nvme_rdma_ctrl *ctrl, 982 bool remove) 983 { 984 if (ctrl->ctrl.queue_count > 1) { 985 nvme_stop_queues(&ctrl->ctrl); 986 nvme_rdma_stop_io_queues(ctrl); 987 if (ctrl->ctrl.tagset) { 988 blk_mq_tagset_busy_iter(ctrl->ctrl.tagset, 989 nvme_cancel_request, &ctrl->ctrl); 990 blk_mq_tagset_wait_completed_request(ctrl->ctrl.tagset); 991 } 992 if (remove) 993 nvme_start_queues(&ctrl->ctrl); 994 nvme_rdma_destroy_io_queues(ctrl, remove); 995 } 996 } 997 998 static void nvme_rdma_free_ctrl(struct nvme_ctrl *nctrl) 999 { 1000 struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(nctrl); 1001 1002 if (list_empty(&ctrl->list)) 1003 goto free_ctrl; 1004 1005 mutex_lock(&nvme_rdma_ctrl_mutex); 1006 list_del(&ctrl->list); 1007 mutex_unlock(&nvme_rdma_ctrl_mutex); 1008 1009 nvmf_free_options(nctrl->opts); 1010 free_ctrl: 1011 kfree(ctrl->queues); 1012 kfree(ctrl); 1013 } 1014 1015 static void nvme_rdma_reconnect_or_remove(struct nvme_rdma_ctrl *ctrl) 1016 { 1017 /* If we are resetting/deleting then do nothing */ 1018 if (ctrl->ctrl.state != NVME_CTRL_CONNECTING) { 1019 WARN_ON_ONCE(ctrl->ctrl.state == NVME_CTRL_NEW || 1020 ctrl->ctrl.state == NVME_CTRL_LIVE); 1021 return; 1022 } 1023 1024 if (nvmf_should_reconnect(&ctrl->ctrl)) { 1025 dev_info(ctrl->ctrl.device, "Reconnecting in %d seconds...\n", 1026 ctrl->ctrl.opts->reconnect_delay); 1027 queue_delayed_work(nvme_wq, &ctrl->reconnect_work, 1028 ctrl->ctrl.opts->reconnect_delay * HZ); 1029 } else { 1030 nvme_delete_ctrl(&ctrl->ctrl); 1031 } 1032 } 1033 1034 static int nvme_rdma_setup_ctrl(struct nvme_rdma_ctrl *ctrl, bool new) 1035 { 1036 int ret = -EINVAL; 1037 bool changed; 1038 1039 ret = nvme_rdma_configure_admin_queue(ctrl, new); 1040 if (ret) 1041 return ret; 1042 1043 if (ctrl->ctrl.icdoff) { 1044 dev_err(ctrl->ctrl.device, "icdoff is not supported!\n"); 1045 goto destroy_admin; 1046 } 1047 1048 if (!(ctrl->ctrl.sgls & (1 << 2))) { 1049 dev_err(ctrl->ctrl.device, 1050 "Mandatory keyed sgls are not supported!\n"); 1051 goto destroy_admin; 1052 } 1053 1054 if (ctrl->ctrl.opts->queue_size > ctrl->ctrl.sqsize + 1) { 1055 dev_warn(ctrl->ctrl.device, 1056 "queue_size %zu > ctrl sqsize %u, clamping down\n", 1057 ctrl->ctrl.opts->queue_size, ctrl->ctrl.sqsize + 1); 1058 } 1059 1060 if (ctrl->ctrl.sqsize + 1 > ctrl->ctrl.maxcmd) { 1061 dev_warn(ctrl->ctrl.device, 1062 "sqsize %u > ctrl maxcmd %u, clamping down\n", 1063 ctrl->ctrl.sqsize + 1, ctrl->ctrl.maxcmd); 1064 ctrl->ctrl.sqsize = ctrl->ctrl.maxcmd - 1; 1065 } 1066 1067 if (ctrl->ctrl.sgls & (1 << 20)) 1068 ctrl->use_inline_data = true; 1069 1070 if (ctrl->ctrl.queue_count > 1) { 1071 ret = nvme_rdma_configure_io_queues(ctrl, new); 1072 if (ret) 1073 goto destroy_admin; 1074 } 1075 1076 changed = nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_LIVE); 1077 if (!changed) { 1078 /* 1079 * state change failure is ok if we're in DELETING state, 1080 * unless we're during creation of a new controller to 1081 * avoid races with teardown flow. 1082 */ 1083 WARN_ON_ONCE(ctrl->ctrl.state != NVME_CTRL_DELETING); 1084 WARN_ON_ONCE(new); 1085 ret = -EINVAL; 1086 goto destroy_io; 1087 } 1088 1089 nvme_start_ctrl(&ctrl->ctrl); 1090 return 0; 1091 1092 destroy_io: 1093 if (ctrl->ctrl.queue_count > 1) 1094 nvme_rdma_destroy_io_queues(ctrl, new); 1095 destroy_admin: 1096 nvme_rdma_stop_queue(&ctrl->queues[0]); 1097 nvme_rdma_destroy_admin_queue(ctrl, new); 1098 return ret; 1099 } 1100 1101 static void nvme_rdma_reconnect_ctrl_work(struct work_struct *work) 1102 { 1103 struct nvme_rdma_ctrl *ctrl = container_of(to_delayed_work(work), 1104 struct nvme_rdma_ctrl, reconnect_work); 1105 1106 ++ctrl->ctrl.nr_reconnects; 1107 1108 if (nvme_rdma_setup_ctrl(ctrl, false)) 1109 goto requeue; 1110 1111 dev_info(ctrl->ctrl.device, "Successfully reconnected (%d attempts)\n", 1112 ctrl->ctrl.nr_reconnects); 1113 1114 ctrl->ctrl.nr_reconnects = 0; 1115 1116 return; 1117 1118 requeue: 1119 dev_info(ctrl->ctrl.device, "Failed reconnect attempt %d\n", 1120 ctrl->ctrl.nr_reconnects); 1121 nvme_rdma_reconnect_or_remove(ctrl); 1122 } 1123 1124 static void nvme_rdma_error_recovery_work(struct work_struct *work) 1125 { 1126 struct nvme_rdma_ctrl *ctrl = container_of(work, 1127 struct nvme_rdma_ctrl, err_work); 1128 1129 nvme_stop_keep_alive(&ctrl->ctrl); 1130 nvme_rdma_teardown_io_queues(ctrl, false); 1131 nvme_start_queues(&ctrl->ctrl); 1132 nvme_rdma_teardown_admin_queue(ctrl, false); 1133 blk_mq_unquiesce_queue(ctrl->ctrl.admin_q); 1134 1135 if (!nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_CONNECTING)) { 1136 /* state change failure is ok if we're in DELETING state */ 1137 WARN_ON_ONCE(ctrl->ctrl.state != NVME_CTRL_DELETING); 1138 return; 1139 } 1140 1141 nvme_rdma_reconnect_or_remove(ctrl); 1142 } 1143 1144 static void nvme_rdma_error_recovery(struct nvme_rdma_ctrl *ctrl) 1145 { 1146 if (!nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_RESETTING)) 1147 return; 1148 1149 queue_work(nvme_reset_wq, &ctrl->err_work); 1150 } 1151 1152 static void nvme_rdma_wr_error(struct ib_cq *cq, struct ib_wc *wc, 1153 const char *op) 1154 { 1155 struct nvme_rdma_queue *queue = cq->cq_context; 1156 struct nvme_rdma_ctrl *ctrl = queue->ctrl; 1157 1158 if (ctrl->ctrl.state == NVME_CTRL_LIVE) 1159 dev_info(ctrl->ctrl.device, 1160 "%s for CQE 0x%p failed with status %s (%d)\n", 1161 op, wc->wr_cqe, 1162 ib_wc_status_msg(wc->status), wc->status); 1163 nvme_rdma_error_recovery(ctrl); 1164 } 1165 1166 static void nvme_rdma_memreg_done(struct ib_cq *cq, struct ib_wc *wc) 1167 { 1168 if (unlikely(wc->status != IB_WC_SUCCESS)) 1169 nvme_rdma_wr_error(cq, wc, "MEMREG"); 1170 } 1171 1172 static void nvme_rdma_inv_rkey_done(struct ib_cq *cq, struct ib_wc *wc) 1173 { 1174 struct nvme_rdma_request *req = 1175 container_of(wc->wr_cqe, struct nvme_rdma_request, reg_cqe); 1176 struct request *rq = blk_mq_rq_from_pdu(req); 1177 1178 if (unlikely(wc->status != IB_WC_SUCCESS)) { 1179 nvme_rdma_wr_error(cq, wc, "LOCAL_INV"); 1180 return; 1181 } 1182 1183 if (refcount_dec_and_test(&req->ref)) 1184 nvme_end_request(rq, req->status, req->result); 1185 1186 } 1187 1188 static int nvme_rdma_inv_rkey(struct nvme_rdma_queue *queue, 1189 struct nvme_rdma_request *req) 1190 { 1191 struct ib_send_wr wr = { 1192 .opcode = IB_WR_LOCAL_INV, 1193 .next = NULL, 1194 .num_sge = 0, 1195 .send_flags = IB_SEND_SIGNALED, 1196 .ex.invalidate_rkey = req->mr->rkey, 1197 }; 1198 1199 req->reg_cqe.done = nvme_rdma_inv_rkey_done; 1200 wr.wr_cqe = &req->reg_cqe; 1201 1202 return ib_post_send(queue->qp, &wr, NULL); 1203 } 1204 1205 static void nvme_rdma_unmap_data(struct nvme_rdma_queue *queue, 1206 struct request *rq) 1207 { 1208 struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); 1209 struct nvme_rdma_device *dev = queue->device; 1210 struct ib_device *ibdev = dev->dev; 1211 struct list_head *pool = &queue->qp->rdma_mrs; 1212 1213 if (!blk_rq_nr_phys_segments(rq)) 1214 return; 1215 1216 if (blk_integrity_rq(rq)) { 1217 ib_dma_unmap_sg(ibdev, req->metadata_sgl->sg_table.sgl, 1218 req->metadata_sgl->nents, rq_dma_dir(rq)); 1219 sg_free_table_chained(&req->metadata_sgl->sg_table, 1220 NVME_INLINE_METADATA_SG_CNT); 1221 } 1222 1223 if (req->use_sig_mr) 1224 pool = &queue->qp->sig_mrs; 1225 1226 if (req->mr) { 1227 ib_mr_pool_put(queue->qp, pool, req->mr); 1228 req->mr = NULL; 1229 } 1230 1231 ib_dma_unmap_sg(ibdev, req->data_sgl.sg_table.sgl, req->data_sgl.nents, 1232 rq_dma_dir(rq)); 1233 sg_free_table_chained(&req->data_sgl.sg_table, NVME_INLINE_SG_CNT); 1234 } 1235 1236 static int nvme_rdma_set_sg_null(struct nvme_command *c) 1237 { 1238 struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl; 1239 1240 sg->addr = 0; 1241 put_unaligned_le24(0, sg->length); 1242 put_unaligned_le32(0, sg->key); 1243 sg->type = NVME_KEY_SGL_FMT_DATA_DESC << 4; 1244 return 0; 1245 } 1246 1247 static int nvme_rdma_map_sg_inline(struct nvme_rdma_queue *queue, 1248 struct nvme_rdma_request *req, struct nvme_command *c, 1249 int count) 1250 { 1251 struct nvme_sgl_desc *sg = &c->common.dptr.sgl; 1252 struct scatterlist *sgl = req->data_sgl.sg_table.sgl; 1253 struct ib_sge *sge = &req->sge[1]; 1254 u32 len = 0; 1255 int i; 1256 1257 for (i = 0; i < count; i++, sgl++, sge++) { 1258 sge->addr = sg_dma_address(sgl); 1259 sge->length = sg_dma_len(sgl); 1260 sge->lkey = queue->device->pd->local_dma_lkey; 1261 len += sge->length; 1262 } 1263 1264 sg->addr = cpu_to_le64(queue->ctrl->ctrl.icdoff); 1265 sg->length = cpu_to_le32(len); 1266 sg->type = (NVME_SGL_FMT_DATA_DESC << 4) | NVME_SGL_FMT_OFFSET; 1267 1268 req->num_sge += count; 1269 return 0; 1270 } 1271 1272 static int nvme_rdma_map_sg_single(struct nvme_rdma_queue *queue, 1273 struct nvme_rdma_request *req, struct nvme_command *c) 1274 { 1275 struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl; 1276 1277 sg->addr = cpu_to_le64(sg_dma_address(req->data_sgl.sg_table.sgl)); 1278 put_unaligned_le24(sg_dma_len(req->data_sgl.sg_table.sgl), sg->length); 1279 put_unaligned_le32(queue->device->pd->unsafe_global_rkey, sg->key); 1280 sg->type = NVME_KEY_SGL_FMT_DATA_DESC << 4; 1281 return 0; 1282 } 1283 1284 static int nvme_rdma_map_sg_fr(struct nvme_rdma_queue *queue, 1285 struct nvme_rdma_request *req, struct nvme_command *c, 1286 int count) 1287 { 1288 struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl; 1289 int nr; 1290 1291 req->mr = ib_mr_pool_get(queue->qp, &queue->qp->rdma_mrs); 1292 if (WARN_ON_ONCE(!req->mr)) 1293 return -EAGAIN; 1294 1295 /* 1296 * Align the MR to a 4K page size to match the ctrl page size and 1297 * the block virtual boundary. 1298 */ 1299 nr = ib_map_mr_sg(req->mr, req->data_sgl.sg_table.sgl, count, NULL, 1300 SZ_4K); 1301 if (unlikely(nr < count)) { 1302 ib_mr_pool_put(queue->qp, &queue->qp->rdma_mrs, req->mr); 1303 req->mr = NULL; 1304 if (nr < 0) 1305 return nr; 1306 return -EINVAL; 1307 } 1308 1309 ib_update_fast_reg_key(req->mr, ib_inc_rkey(req->mr->rkey)); 1310 1311 req->reg_cqe.done = nvme_rdma_memreg_done; 1312 memset(&req->reg_wr, 0, sizeof(req->reg_wr)); 1313 req->reg_wr.wr.opcode = IB_WR_REG_MR; 1314 req->reg_wr.wr.wr_cqe = &req->reg_cqe; 1315 req->reg_wr.wr.num_sge = 0; 1316 req->reg_wr.mr = req->mr; 1317 req->reg_wr.key = req->mr->rkey; 1318 req->reg_wr.access = IB_ACCESS_LOCAL_WRITE | 1319 IB_ACCESS_REMOTE_READ | 1320 IB_ACCESS_REMOTE_WRITE; 1321 1322 sg->addr = cpu_to_le64(req->mr->iova); 1323 put_unaligned_le24(req->mr->length, sg->length); 1324 put_unaligned_le32(req->mr->rkey, sg->key); 1325 sg->type = (NVME_KEY_SGL_FMT_DATA_DESC << 4) | 1326 NVME_SGL_FMT_INVALIDATE; 1327 1328 return 0; 1329 } 1330 1331 static void nvme_rdma_set_sig_domain(struct blk_integrity *bi, 1332 struct nvme_command *cmd, struct ib_sig_domain *domain, 1333 u16 control, u8 pi_type) 1334 { 1335 domain->sig_type = IB_SIG_TYPE_T10_DIF; 1336 domain->sig.dif.bg_type = IB_T10DIF_CRC; 1337 domain->sig.dif.pi_interval = 1 << bi->interval_exp; 1338 domain->sig.dif.ref_tag = le32_to_cpu(cmd->rw.reftag); 1339 if (control & NVME_RW_PRINFO_PRCHK_REF) 1340 domain->sig.dif.ref_remap = true; 1341 1342 domain->sig.dif.app_tag = le16_to_cpu(cmd->rw.apptag); 1343 domain->sig.dif.apptag_check_mask = le16_to_cpu(cmd->rw.appmask); 1344 domain->sig.dif.app_escape = true; 1345 if (pi_type == NVME_NS_DPS_PI_TYPE3) 1346 domain->sig.dif.ref_escape = true; 1347 } 1348 1349 static void nvme_rdma_set_sig_attrs(struct blk_integrity *bi, 1350 struct nvme_command *cmd, struct ib_sig_attrs *sig_attrs, 1351 u8 pi_type) 1352 { 1353 u16 control = le16_to_cpu(cmd->rw.control); 1354 1355 memset(sig_attrs, 0, sizeof(*sig_attrs)); 1356 if (control & NVME_RW_PRINFO_PRACT) { 1357 /* for WRITE_INSERT/READ_STRIP no memory domain */ 1358 sig_attrs->mem.sig_type = IB_SIG_TYPE_NONE; 1359 nvme_rdma_set_sig_domain(bi, cmd, &sig_attrs->wire, control, 1360 pi_type); 1361 /* Clear the PRACT bit since HCA will generate/verify the PI */ 1362 control &= ~NVME_RW_PRINFO_PRACT; 1363 cmd->rw.control = cpu_to_le16(control); 1364 } else { 1365 /* for WRITE_PASS/READ_PASS both wire/memory domains exist */ 1366 nvme_rdma_set_sig_domain(bi, cmd, &sig_attrs->wire, control, 1367 pi_type); 1368 nvme_rdma_set_sig_domain(bi, cmd, &sig_attrs->mem, control, 1369 pi_type); 1370 } 1371 } 1372 1373 static void nvme_rdma_set_prot_checks(struct nvme_command *cmd, u8 *mask) 1374 { 1375 *mask = 0; 1376 if (le16_to_cpu(cmd->rw.control) & NVME_RW_PRINFO_PRCHK_REF) 1377 *mask |= IB_SIG_CHECK_REFTAG; 1378 if (le16_to_cpu(cmd->rw.control) & NVME_RW_PRINFO_PRCHK_GUARD) 1379 *mask |= IB_SIG_CHECK_GUARD; 1380 } 1381 1382 static void nvme_rdma_sig_done(struct ib_cq *cq, struct ib_wc *wc) 1383 { 1384 if (unlikely(wc->status != IB_WC_SUCCESS)) 1385 nvme_rdma_wr_error(cq, wc, "SIG"); 1386 } 1387 1388 static int nvme_rdma_map_sg_pi(struct nvme_rdma_queue *queue, 1389 struct nvme_rdma_request *req, struct nvme_command *c, 1390 int count, int pi_count) 1391 { 1392 struct nvme_rdma_sgl *sgl = &req->data_sgl; 1393 struct ib_reg_wr *wr = &req->reg_wr; 1394 struct request *rq = blk_mq_rq_from_pdu(req); 1395 struct nvme_ns *ns = rq->q->queuedata; 1396 struct bio *bio = rq->bio; 1397 struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl; 1398 int nr; 1399 1400 req->mr = ib_mr_pool_get(queue->qp, &queue->qp->sig_mrs); 1401 if (WARN_ON_ONCE(!req->mr)) 1402 return -EAGAIN; 1403 1404 nr = ib_map_mr_sg_pi(req->mr, sgl->sg_table.sgl, count, NULL, 1405 req->metadata_sgl->sg_table.sgl, pi_count, NULL, 1406 SZ_4K); 1407 if (unlikely(nr)) 1408 goto mr_put; 1409 1410 nvme_rdma_set_sig_attrs(blk_get_integrity(bio->bi_disk), c, 1411 req->mr->sig_attrs, ns->pi_type); 1412 nvme_rdma_set_prot_checks(c, &req->mr->sig_attrs->check_mask); 1413 1414 ib_update_fast_reg_key(req->mr, ib_inc_rkey(req->mr->rkey)); 1415 1416 req->reg_cqe.done = nvme_rdma_sig_done; 1417 memset(wr, 0, sizeof(*wr)); 1418 wr->wr.opcode = IB_WR_REG_MR_INTEGRITY; 1419 wr->wr.wr_cqe = &req->reg_cqe; 1420 wr->wr.num_sge = 0; 1421 wr->wr.send_flags = 0; 1422 wr->mr = req->mr; 1423 wr->key = req->mr->rkey; 1424 wr->access = IB_ACCESS_LOCAL_WRITE | 1425 IB_ACCESS_REMOTE_READ | 1426 IB_ACCESS_REMOTE_WRITE; 1427 1428 sg->addr = cpu_to_le64(req->mr->iova); 1429 put_unaligned_le24(req->mr->length, sg->length); 1430 put_unaligned_le32(req->mr->rkey, sg->key); 1431 sg->type = NVME_KEY_SGL_FMT_DATA_DESC << 4; 1432 1433 return 0; 1434 1435 mr_put: 1436 ib_mr_pool_put(queue->qp, &queue->qp->sig_mrs, req->mr); 1437 req->mr = NULL; 1438 if (nr < 0) 1439 return nr; 1440 return -EINVAL; 1441 } 1442 1443 static int nvme_rdma_map_data(struct nvme_rdma_queue *queue, 1444 struct request *rq, struct nvme_command *c) 1445 { 1446 struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); 1447 struct nvme_rdma_device *dev = queue->device; 1448 struct ib_device *ibdev = dev->dev; 1449 int pi_count = 0; 1450 int count, ret; 1451 1452 req->num_sge = 1; 1453 refcount_set(&req->ref, 2); /* send and recv completions */ 1454 1455 c->common.flags |= NVME_CMD_SGL_METABUF; 1456 1457 if (!blk_rq_nr_phys_segments(rq)) 1458 return nvme_rdma_set_sg_null(c); 1459 1460 req->data_sgl.sg_table.sgl = (struct scatterlist *)(req + 1); 1461 ret = sg_alloc_table_chained(&req->data_sgl.sg_table, 1462 blk_rq_nr_phys_segments(rq), req->data_sgl.sg_table.sgl, 1463 NVME_INLINE_SG_CNT); 1464 if (ret) 1465 return -ENOMEM; 1466 1467 req->data_sgl.nents = blk_rq_map_sg(rq->q, rq, 1468 req->data_sgl.sg_table.sgl); 1469 1470 count = ib_dma_map_sg(ibdev, req->data_sgl.sg_table.sgl, 1471 req->data_sgl.nents, rq_dma_dir(rq)); 1472 if (unlikely(count <= 0)) { 1473 ret = -EIO; 1474 goto out_free_table; 1475 } 1476 1477 if (blk_integrity_rq(rq)) { 1478 req->metadata_sgl->sg_table.sgl = 1479 (struct scatterlist *)(req->metadata_sgl + 1); 1480 ret = sg_alloc_table_chained(&req->metadata_sgl->sg_table, 1481 blk_rq_count_integrity_sg(rq->q, rq->bio), 1482 req->metadata_sgl->sg_table.sgl, 1483 NVME_INLINE_METADATA_SG_CNT); 1484 if (unlikely(ret)) { 1485 ret = -ENOMEM; 1486 goto out_unmap_sg; 1487 } 1488 1489 req->metadata_sgl->nents = blk_rq_map_integrity_sg(rq->q, 1490 rq->bio, req->metadata_sgl->sg_table.sgl); 1491 pi_count = ib_dma_map_sg(ibdev, 1492 req->metadata_sgl->sg_table.sgl, 1493 req->metadata_sgl->nents, 1494 rq_dma_dir(rq)); 1495 if (unlikely(pi_count <= 0)) { 1496 ret = -EIO; 1497 goto out_free_pi_table; 1498 } 1499 } 1500 1501 if (req->use_sig_mr) { 1502 ret = nvme_rdma_map_sg_pi(queue, req, c, count, pi_count); 1503 goto out; 1504 } 1505 1506 if (count <= dev->num_inline_segments) { 1507 if (rq_data_dir(rq) == WRITE && nvme_rdma_queue_idx(queue) && 1508 queue->ctrl->use_inline_data && 1509 blk_rq_payload_bytes(rq) <= 1510 nvme_rdma_inline_data_size(queue)) { 1511 ret = nvme_rdma_map_sg_inline(queue, req, c, count); 1512 goto out; 1513 } 1514 1515 if (count == 1 && dev->pd->flags & IB_PD_UNSAFE_GLOBAL_RKEY) { 1516 ret = nvme_rdma_map_sg_single(queue, req, c); 1517 goto out; 1518 } 1519 } 1520 1521 ret = nvme_rdma_map_sg_fr(queue, req, c, count); 1522 out: 1523 if (unlikely(ret)) 1524 goto out_unmap_pi_sg; 1525 1526 return 0; 1527 1528 out_unmap_pi_sg: 1529 if (blk_integrity_rq(rq)) 1530 ib_dma_unmap_sg(ibdev, req->metadata_sgl->sg_table.sgl, 1531 req->metadata_sgl->nents, rq_dma_dir(rq)); 1532 out_free_pi_table: 1533 if (blk_integrity_rq(rq)) 1534 sg_free_table_chained(&req->metadata_sgl->sg_table, 1535 NVME_INLINE_METADATA_SG_CNT); 1536 out_unmap_sg: 1537 ib_dma_unmap_sg(ibdev, req->data_sgl.sg_table.sgl, req->data_sgl.nents, 1538 rq_dma_dir(rq)); 1539 out_free_table: 1540 sg_free_table_chained(&req->data_sgl.sg_table, NVME_INLINE_SG_CNT); 1541 return ret; 1542 } 1543 1544 static void nvme_rdma_send_done(struct ib_cq *cq, struct ib_wc *wc) 1545 { 1546 struct nvme_rdma_qe *qe = 1547 container_of(wc->wr_cqe, struct nvme_rdma_qe, cqe); 1548 struct nvme_rdma_request *req = 1549 container_of(qe, struct nvme_rdma_request, sqe); 1550 struct request *rq = blk_mq_rq_from_pdu(req); 1551 1552 if (unlikely(wc->status != IB_WC_SUCCESS)) { 1553 nvme_rdma_wr_error(cq, wc, "SEND"); 1554 return; 1555 } 1556 1557 if (refcount_dec_and_test(&req->ref)) 1558 nvme_end_request(rq, req->status, req->result); 1559 } 1560 1561 static int nvme_rdma_post_send(struct nvme_rdma_queue *queue, 1562 struct nvme_rdma_qe *qe, struct ib_sge *sge, u32 num_sge, 1563 struct ib_send_wr *first) 1564 { 1565 struct ib_send_wr wr; 1566 int ret; 1567 1568 sge->addr = qe->dma; 1569 sge->length = sizeof(struct nvme_command); 1570 sge->lkey = queue->device->pd->local_dma_lkey; 1571 1572 wr.next = NULL; 1573 wr.wr_cqe = &qe->cqe; 1574 wr.sg_list = sge; 1575 wr.num_sge = num_sge; 1576 wr.opcode = IB_WR_SEND; 1577 wr.send_flags = IB_SEND_SIGNALED; 1578 1579 if (first) 1580 first->next = ≀ 1581 else 1582 first = ≀ 1583 1584 ret = ib_post_send(queue->qp, first, NULL); 1585 if (unlikely(ret)) { 1586 dev_err(queue->ctrl->ctrl.device, 1587 "%s failed with error code %d\n", __func__, ret); 1588 } 1589 return ret; 1590 } 1591 1592 static int nvme_rdma_post_recv(struct nvme_rdma_queue *queue, 1593 struct nvme_rdma_qe *qe) 1594 { 1595 struct ib_recv_wr wr; 1596 struct ib_sge list; 1597 int ret; 1598 1599 list.addr = qe->dma; 1600 list.length = sizeof(struct nvme_completion); 1601 list.lkey = queue->device->pd->local_dma_lkey; 1602 1603 qe->cqe.done = nvme_rdma_recv_done; 1604 1605 wr.next = NULL; 1606 wr.wr_cqe = &qe->cqe; 1607 wr.sg_list = &list; 1608 wr.num_sge = 1; 1609 1610 ret = ib_post_recv(queue->qp, &wr, NULL); 1611 if (unlikely(ret)) { 1612 dev_err(queue->ctrl->ctrl.device, 1613 "%s failed with error code %d\n", __func__, ret); 1614 } 1615 return ret; 1616 } 1617 1618 static struct blk_mq_tags *nvme_rdma_tagset(struct nvme_rdma_queue *queue) 1619 { 1620 u32 queue_idx = nvme_rdma_queue_idx(queue); 1621 1622 if (queue_idx == 0) 1623 return queue->ctrl->admin_tag_set.tags[queue_idx]; 1624 return queue->ctrl->tag_set.tags[queue_idx - 1]; 1625 } 1626 1627 static void nvme_rdma_async_done(struct ib_cq *cq, struct ib_wc *wc) 1628 { 1629 if (unlikely(wc->status != IB_WC_SUCCESS)) 1630 nvme_rdma_wr_error(cq, wc, "ASYNC"); 1631 } 1632 1633 static void nvme_rdma_submit_async_event(struct nvme_ctrl *arg) 1634 { 1635 struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(arg); 1636 struct nvme_rdma_queue *queue = &ctrl->queues[0]; 1637 struct ib_device *dev = queue->device->dev; 1638 struct nvme_rdma_qe *sqe = &ctrl->async_event_sqe; 1639 struct nvme_command *cmd = sqe->data; 1640 struct ib_sge sge; 1641 int ret; 1642 1643 ib_dma_sync_single_for_cpu(dev, sqe->dma, sizeof(*cmd), DMA_TO_DEVICE); 1644 1645 memset(cmd, 0, sizeof(*cmd)); 1646 cmd->common.opcode = nvme_admin_async_event; 1647 cmd->common.command_id = NVME_AQ_BLK_MQ_DEPTH; 1648 cmd->common.flags |= NVME_CMD_SGL_METABUF; 1649 nvme_rdma_set_sg_null(cmd); 1650 1651 sqe->cqe.done = nvme_rdma_async_done; 1652 1653 ib_dma_sync_single_for_device(dev, sqe->dma, sizeof(*cmd), 1654 DMA_TO_DEVICE); 1655 1656 ret = nvme_rdma_post_send(queue, sqe, &sge, 1, NULL); 1657 WARN_ON_ONCE(ret); 1658 } 1659 1660 static void nvme_rdma_process_nvme_rsp(struct nvme_rdma_queue *queue, 1661 struct nvme_completion *cqe, struct ib_wc *wc) 1662 { 1663 struct request *rq; 1664 struct nvme_rdma_request *req; 1665 1666 rq = blk_mq_tag_to_rq(nvme_rdma_tagset(queue), cqe->command_id); 1667 if (!rq) { 1668 dev_err(queue->ctrl->ctrl.device, 1669 "tag 0x%x on QP %#x not found\n", 1670 cqe->command_id, queue->qp->qp_num); 1671 nvme_rdma_error_recovery(queue->ctrl); 1672 return; 1673 } 1674 req = blk_mq_rq_to_pdu(rq); 1675 1676 req->status = cqe->status; 1677 req->result = cqe->result; 1678 1679 if (wc->wc_flags & IB_WC_WITH_INVALIDATE) { 1680 if (unlikely(wc->ex.invalidate_rkey != req->mr->rkey)) { 1681 dev_err(queue->ctrl->ctrl.device, 1682 "Bogus remote invalidation for rkey %#x\n", 1683 req->mr->rkey); 1684 nvme_rdma_error_recovery(queue->ctrl); 1685 } 1686 } else if (req->mr) { 1687 int ret; 1688 1689 ret = nvme_rdma_inv_rkey(queue, req); 1690 if (unlikely(ret < 0)) { 1691 dev_err(queue->ctrl->ctrl.device, 1692 "Queueing INV WR for rkey %#x failed (%d)\n", 1693 req->mr->rkey, ret); 1694 nvme_rdma_error_recovery(queue->ctrl); 1695 } 1696 /* the local invalidation completion will end the request */ 1697 return; 1698 } 1699 1700 if (refcount_dec_and_test(&req->ref)) 1701 nvme_end_request(rq, req->status, req->result); 1702 } 1703 1704 static void nvme_rdma_recv_done(struct ib_cq *cq, struct ib_wc *wc) 1705 { 1706 struct nvme_rdma_qe *qe = 1707 container_of(wc->wr_cqe, struct nvme_rdma_qe, cqe); 1708 struct nvme_rdma_queue *queue = cq->cq_context; 1709 struct ib_device *ibdev = queue->device->dev; 1710 struct nvme_completion *cqe = qe->data; 1711 const size_t len = sizeof(struct nvme_completion); 1712 1713 if (unlikely(wc->status != IB_WC_SUCCESS)) { 1714 nvme_rdma_wr_error(cq, wc, "RECV"); 1715 return; 1716 } 1717 1718 ib_dma_sync_single_for_cpu(ibdev, qe->dma, len, DMA_FROM_DEVICE); 1719 /* 1720 * AEN requests are special as they don't time out and can 1721 * survive any kind of queue freeze and often don't respond to 1722 * aborts. We don't even bother to allocate a struct request 1723 * for them but rather special case them here. 1724 */ 1725 if (unlikely(nvme_is_aen_req(nvme_rdma_queue_idx(queue), 1726 cqe->command_id))) 1727 nvme_complete_async_event(&queue->ctrl->ctrl, cqe->status, 1728 &cqe->result); 1729 else 1730 nvme_rdma_process_nvme_rsp(queue, cqe, wc); 1731 ib_dma_sync_single_for_device(ibdev, qe->dma, len, DMA_FROM_DEVICE); 1732 1733 nvme_rdma_post_recv(queue, qe); 1734 } 1735 1736 static int nvme_rdma_conn_established(struct nvme_rdma_queue *queue) 1737 { 1738 int ret, i; 1739 1740 for (i = 0; i < queue->queue_size; i++) { 1741 ret = nvme_rdma_post_recv(queue, &queue->rsp_ring[i]); 1742 if (ret) 1743 goto out_destroy_queue_ib; 1744 } 1745 1746 return 0; 1747 1748 out_destroy_queue_ib: 1749 nvme_rdma_destroy_queue_ib(queue); 1750 return ret; 1751 } 1752 1753 static int nvme_rdma_conn_rejected(struct nvme_rdma_queue *queue, 1754 struct rdma_cm_event *ev) 1755 { 1756 struct rdma_cm_id *cm_id = queue->cm_id; 1757 int status = ev->status; 1758 const char *rej_msg; 1759 const struct nvme_rdma_cm_rej *rej_data; 1760 u8 rej_data_len; 1761 1762 rej_msg = rdma_reject_msg(cm_id, status); 1763 rej_data = rdma_consumer_reject_data(cm_id, ev, &rej_data_len); 1764 1765 if (rej_data && rej_data_len >= sizeof(u16)) { 1766 u16 sts = le16_to_cpu(rej_data->sts); 1767 1768 dev_err(queue->ctrl->ctrl.device, 1769 "Connect rejected: status %d (%s) nvme status %d (%s).\n", 1770 status, rej_msg, sts, nvme_rdma_cm_msg(sts)); 1771 } else { 1772 dev_err(queue->ctrl->ctrl.device, 1773 "Connect rejected: status %d (%s).\n", status, rej_msg); 1774 } 1775 1776 return -ECONNRESET; 1777 } 1778 1779 static int nvme_rdma_addr_resolved(struct nvme_rdma_queue *queue) 1780 { 1781 struct nvme_ctrl *ctrl = &queue->ctrl->ctrl; 1782 int ret; 1783 1784 ret = nvme_rdma_create_queue_ib(queue); 1785 if (ret) 1786 return ret; 1787 1788 if (ctrl->opts->tos >= 0) 1789 rdma_set_service_type(queue->cm_id, ctrl->opts->tos); 1790 ret = rdma_resolve_route(queue->cm_id, NVME_RDMA_CONNECT_TIMEOUT_MS); 1791 if (ret) { 1792 dev_err(ctrl->device, "rdma_resolve_route failed (%d).\n", 1793 queue->cm_error); 1794 goto out_destroy_queue; 1795 } 1796 1797 return 0; 1798 1799 out_destroy_queue: 1800 nvme_rdma_destroy_queue_ib(queue); 1801 return ret; 1802 } 1803 1804 static int nvme_rdma_route_resolved(struct nvme_rdma_queue *queue) 1805 { 1806 struct nvme_rdma_ctrl *ctrl = queue->ctrl; 1807 struct rdma_conn_param param = { }; 1808 struct nvme_rdma_cm_req priv = { }; 1809 int ret; 1810 1811 param.qp_num = queue->qp->qp_num; 1812 param.flow_control = 1; 1813 1814 param.responder_resources = queue->device->dev->attrs.max_qp_rd_atom; 1815 /* maximum retry count */ 1816 param.retry_count = 7; 1817 param.rnr_retry_count = 7; 1818 param.private_data = &priv; 1819 param.private_data_len = sizeof(priv); 1820 1821 priv.recfmt = cpu_to_le16(NVME_RDMA_CM_FMT_1_0); 1822 priv.qid = cpu_to_le16(nvme_rdma_queue_idx(queue)); 1823 /* 1824 * set the admin queue depth to the minimum size 1825 * specified by the Fabrics standard. 1826 */ 1827 if (priv.qid == 0) { 1828 priv.hrqsize = cpu_to_le16(NVME_AQ_DEPTH); 1829 priv.hsqsize = cpu_to_le16(NVME_AQ_DEPTH - 1); 1830 } else { 1831 /* 1832 * current interpretation of the fabrics spec 1833 * is at minimum you make hrqsize sqsize+1, or a 1834 * 1's based representation of sqsize. 1835 */ 1836 priv.hrqsize = cpu_to_le16(queue->queue_size); 1837 priv.hsqsize = cpu_to_le16(queue->ctrl->ctrl.sqsize); 1838 } 1839 1840 ret = rdma_connect(queue->cm_id, ¶m); 1841 if (ret) { 1842 dev_err(ctrl->ctrl.device, 1843 "rdma_connect failed (%d).\n", ret); 1844 goto out_destroy_queue_ib; 1845 } 1846 1847 return 0; 1848 1849 out_destroy_queue_ib: 1850 nvme_rdma_destroy_queue_ib(queue); 1851 return ret; 1852 } 1853 1854 static int nvme_rdma_cm_handler(struct rdma_cm_id *cm_id, 1855 struct rdma_cm_event *ev) 1856 { 1857 struct nvme_rdma_queue *queue = cm_id->context; 1858 int cm_error = 0; 1859 1860 dev_dbg(queue->ctrl->ctrl.device, "%s (%d): status %d id %p\n", 1861 rdma_event_msg(ev->event), ev->event, 1862 ev->status, cm_id); 1863 1864 switch (ev->event) { 1865 case RDMA_CM_EVENT_ADDR_RESOLVED: 1866 cm_error = nvme_rdma_addr_resolved(queue); 1867 break; 1868 case RDMA_CM_EVENT_ROUTE_RESOLVED: 1869 cm_error = nvme_rdma_route_resolved(queue); 1870 break; 1871 case RDMA_CM_EVENT_ESTABLISHED: 1872 queue->cm_error = nvme_rdma_conn_established(queue); 1873 /* complete cm_done regardless of success/failure */ 1874 complete(&queue->cm_done); 1875 return 0; 1876 case RDMA_CM_EVENT_REJECTED: 1877 nvme_rdma_destroy_queue_ib(queue); 1878 cm_error = nvme_rdma_conn_rejected(queue, ev); 1879 break; 1880 case RDMA_CM_EVENT_ROUTE_ERROR: 1881 case RDMA_CM_EVENT_CONNECT_ERROR: 1882 case RDMA_CM_EVENT_UNREACHABLE: 1883 nvme_rdma_destroy_queue_ib(queue); 1884 /* fall through */ 1885 case RDMA_CM_EVENT_ADDR_ERROR: 1886 dev_dbg(queue->ctrl->ctrl.device, 1887 "CM error event %d\n", ev->event); 1888 cm_error = -ECONNRESET; 1889 break; 1890 case RDMA_CM_EVENT_DISCONNECTED: 1891 case RDMA_CM_EVENT_ADDR_CHANGE: 1892 case RDMA_CM_EVENT_TIMEWAIT_EXIT: 1893 dev_dbg(queue->ctrl->ctrl.device, 1894 "disconnect received - connection closed\n"); 1895 nvme_rdma_error_recovery(queue->ctrl); 1896 break; 1897 case RDMA_CM_EVENT_DEVICE_REMOVAL: 1898 /* device removal is handled via the ib_client API */ 1899 break; 1900 default: 1901 dev_err(queue->ctrl->ctrl.device, 1902 "Unexpected RDMA CM event (%d)\n", ev->event); 1903 nvme_rdma_error_recovery(queue->ctrl); 1904 break; 1905 } 1906 1907 if (cm_error) { 1908 queue->cm_error = cm_error; 1909 complete(&queue->cm_done); 1910 } 1911 1912 return 0; 1913 } 1914 1915 static enum blk_eh_timer_return 1916 nvme_rdma_timeout(struct request *rq, bool reserved) 1917 { 1918 struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); 1919 struct nvme_rdma_queue *queue = req->queue; 1920 struct nvme_rdma_ctrl *ctrl = queue->ctrl; 1921 1922 dev_warn(ctrl->ctrl.device, "I/O %d QID %d timeout\n", 1923 rq->tag, nvme_rdma_queue_idx(queue)); 1924 1925 /* 1926 * Restart the timer if a controller reset is already scheduled. Any 1927 * timed out commands would be handled before entering the connecting 1928 * state. 1929 */ 1930 if (ctrl->ctrl.state == NVME_CTRL_RESETTING) 1931 return BLK_EH_RESET_TIMER; 1932 1933 if (ctrl->ctrl.state != NVME_CTRL_LIVE) { 1934 /* 1935 * Teardown immediately if controller times out while starting 1936 * or we are already started error recovery. all outstanding 1937 * requests are completed on shutdown, so we return BLK_EH_DONE. 1938 */ 1939 flush_work(&ctrl->err_work); 1940 nvme_rdma_teardown_io_queues(ctrl, false); 1941 nvme_rdma_teardown_admin_queue(ctrl, false); 1942 return BLK_EH_DONE; 1943 } 1944 1945 dev_warn(ctrl->ctrl.device, "starting error recovery\n"); 1946 nvme_rdma_error_recovery(ctrl); 1947 1948 return BLK_EH_RESET_TIMER; 1949 } 1950 1951 static blk_status_t nvme_rdma_queue_rq(struct blk_mq_hw_ctx *hctx, 1952 const struct blk_mq_queue_data *bd) 1953 { 1954 struct nvme_ns *ns = hctx->queue->queuedata; 1955 struct nvme_rdma_queue *queue = hctx->driver_data; 1956 struct request *rq = bd->rq; 1957 struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); 1958 struct nvme_rdma_qe *sqe = &req->sqe; 1959 struct nvme_command *c = sqe->data; 1960 struct ib_device *dev; 1961 bool queue_ready = test_bit(NVME_RDMA_Q_LIVE, &queue->flags); 1962 blk_status_t ret; 1963 int err; 1964 1965 WARN_ON_ONCE(rq->tag < 0); 1966 1967 if (!nvmf_check_ready(&queue->ctrl->ctrl, rq, queue_ready)) 1968 return nvmf_fail_nonready_command(&queue->ctrl->ctrl, rq); 1969 1970 dev = queue->device->dev; 1971 1972 req->sqe.dma = ib_dma_map_single(dev, req->sqe.data, 1973 sizeof(struct nvme_command), 1974 DMA_TO_DEVICE); 1975 err = ib_dma_mapping_error(dev, req->sqe.dma); 1976 if (unlikely(err)) 1977 return BLK_STS_RESOURCE; 1978 1979 ib_dma_sync_single_for_cpu(dev, sqe->dma, 1980 sizeof(struct nvme_command), DMA_TO_DEVICE); 1981 1982 ret = nvme_setup_cmd(ns, rq, c); 1983 if (ret) 1984 goto unmap_qe; 1985 1986 blk_mq_start_request(rq); 1987 1988 if (IS_ENABLED(CONFIG_BLK_DEV_INTEGRITY) && 1989 queue->pi_support && 1990 (c->common.opcode == nvme_cmd_write || 1991 c->common.opcode == nvme_cmd_read) && 1992 nvme_ns_has_pi(ns)) 1993 req->use_sig_mr = true; 1994 else 1995 req->use_sig_mr = false; 1996 1997 err = nvme_rdma_map_data(queue, rq, c); 1998 if (unlikely(err < 0)) { 1999 dev_err(queue->ctrl->ctrl.device, 2000 "Failed to map data (%d)\n", err); 2001 goto err; 2002 } 2003 2004 sqe->cqe.done = nvme_rdma_send_done; 2005 2006 ib_dma_sync_single_for_device(dev, sqe->dma, 2007 sizeof(struct nvme_command), DMA_TO_DEVICE); 2008 2009 err = nvme_rdma_post_send(queue, sqe, req->sge, req->num_sge, 2010 req->mr ? &req->reg_wr.wr : NULL); 2011 if (unlikely(err)) 2012 goto err_unmap; 2013 2014 return BLK_STS_OK; 2015 2016 err_unmap: 2017 nvme_rdma_unmap_data(queue, rq); 2018 err: 2019 if (err == -ENOMEM || err == -EAGAIN) 2020 ret = BLK_STS_RESOURCE; 2021 else 2022 ret = BLK_STS_IOERR; 2023 nvme_cleanup_cmd(rq); 2024 unmap_qe: 2025 ib_dma_unmap_single(dev, req->sqe.dma, sizeof(struct nvme_command), 2026 DMA_TO_DEVICE); 2027 return ret; 2028 } 2029 2030 static int nvme_rdma_poll(struct blk_mq_hw_ctx *hctx) 2031 { 2032 struct nvme_rdma_queue *queue = hctx->driver_data; 2033 2034 return ib_process_cq_direct(queue->ib_cq, -1); 2035 } 2036 2037 static void nvme_rdma_check_pi_status(struct nvme_rdma_request *req) 2038 { 2039 struct request *rq = blk_mq_rq_from_pdu(req); 2040 struct ib_mr_status mr_status; 2041 int ret; 2042 2043 ret = ib_check_mr_status(req->mr, IB_MR_CHECK_SIG_STATUS, &mr_status); 2044 if (ret) { 2045 pr_err("ib_check_mr_status failed, ret %d\n", ret); 2046 nvme_req(rq)->status = NVME_SC_INVALID_PI; 2047 return; 2048 } 2049 2050 if (mr_status.fail_status & IB_MR_CHECK_SIG_STATUS) { 2051 switch (mr_status.sig_err.err_type) { 2052 case IB_SIG_BAD_GUARD: 2053 nvme_req(rq)->status = NVME_SC_GUARD_CHECK; 2054 break; 2055 case IB_SIG_BAD_REFTAG: 2056 nvme_req(rq)->status = NVME_SC_REFTAG_CHECK; 2057 break; 2058 case IB_SIG_BAD_APPTAG: 2059 nvme_req(rq)->status = NVME_SC_APPTAG_CHECK; 2060 break; 2061 } 2062 pr_err("PI error found type %d expected 0x%x vs actual 0x%x\n", 2063 mr_status.sig_err.err_type, mr_status.sig_err.expected, 2064 mr_status.sig_err.actual); 2065 } 2066 } 2067 2068 static void nvme_rdma_complete_rq(struct request *rq) 2069 { 2070 struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); 2071 struct nvme_rdma_queue *queue = req->queue; 2072 struct ib_device *ibdev = queue->device->dev; 2073 2074 if (req->use_sig_mr) 2075 nvme_rdma_check_pi_status(req); 2076 2077 nvme_rdma_unmap_data(queue, rq); 2078 ib_dma_unmap_single(ibdev, req->sqe.dma, sizeof(struct nvme_command), 2079 DMA_TO_DEVICE); 2080 nvme_complete_rq(rq); 2081 } 2082 2083 static int nvme_rdma_map_queues(struct blk_mq_tag_set *set) 2084 { 2085 struct nvme_rdma_ctrl *ctrl = set->driver_data; 2086 struct nvmf_ctrl_options *opts = ctrl->ctrl.opts; 2087 2088 if (opts->nr_write_queues && ctrl->io_queues[HCTX_TYPE_READ]) { 2089 /* separate read/write queues */ 2090 set->map[HCTX_TYPE_DEFAULT].nr_queues = 2091 ctrl->io_queues[HCTX_TYPE_DEFAULT]; 2092 set->map[HCTX_TYPE_DEFAULT].queue_offset = 0; 2093 set->map[HCTX_TYPE_READ].nr_queues = 2094 ctrl->io_queues[HCTX_TYPE_READ]; 2095 set->map[HCTX_TYPE_READ].queue_offset = 2096 ctrl->io_queues[HCTX_TYPE_DEFAULT]; 2097 } else { 2098 /* shared read/write queues */ 2099 set->map[HCTX_TYPE_DEFAULT].nr_queues = 2100 ctrl->io_queues[HCTX_TYPE_DEFAULT]; 2101 set->map[HCTX_TYPE_DEFAULT].queue_offset = 0; 2102 set->map[HCTX_TYPE_READ].nr_queues = 2103 ctrl->io_queues[HCTX_TYPE_DEFAULT]; 2104 set->map[HCTX_TYPE_READ].queue_offset = 0; 2105 } 2106 blk_mq_rdma_map_queues(&set->map[HCTX_TYPE_DEFAULT], 2107 ctrl->device->dev, 0); 2108 blk_mq_rdma_map_queues(&set->map[HCTX_TYPE_READ], 2109 ctrl->device->dev, 0); 2110 2111 if (opts->nr_poll_queues && ctrl->io_queues[HCTX_TYPE_POLL]) { 2112 /* map dedicated poll queues only if we have queues left */ 2113 set->map[HCTX_TYPE_POLL].nr_queues = 2114 ctrl->io_queues[HCTX_TYPE_POLL]; 2115 set->map[HCTX_TYPE_POLL].queue_offset = 2116 ctrl->io_queues[HCTX_TYPE_DEFAULT] + 2117 ctrl->io_queues[HCTX_TYPE_READ]; 2118 blk_mq_map_queues(&set->map[HCTX_TYPE_POLL]); 2119 } 2120 2121 dev_info(ctrl->ctrl.device, 2122 "mapped %d/%d/%d default/read/poll queues.\n", 2123 ctrl->io_queues[HCTX_TYPE_DEFAULT], 2124 ctrl->io_queues[HCTX_TYPE_READ], 2125 ctrl->io_queues[HCTX_TYPE_POLL]); 2126 2127 return 0; 2128 } 2129 2130 static const struct blk_mq_ops nvme_rdma_mq_ops = { 2131 .queue_rq = nvme_rdma_queue_rq, 2132 .complete = nvme_rdma_complete_rq, 2133 .init_request = nvme_rdma_init_request, 2134 .exit_request = nvme_rdma_exit_request, 2135 .init_hctx = nvme_rdma_init_hctx, 2136 .timeout = nvme_rdma_timeout, 2137 .map_queues = nvme_rdma_map_queues, 2138 .poll = nvme_rdma_poll, 2139 }; 2140 2141 static const struct blk_mq_ops nvme_rdma_admin_mq_ops = { 2142 .queue_rq = nvme_rdma_queue_rq, 2143 .complete = nvme_rdma_complete_rq, 2144 .init_request = nvme_rdma_init_request, 2145 .exit_request = nvme_rdma_exit_request, 2146 .init_hctx = nvme_rdma_init_admin_hctx, 2147 .timeout = nvme_rdma_timeout, 2148 }; 2149 2150 static void nvme_rdma_shutdown_ctrl(struct nvme_rdma_ctrl *ctrl, bool shutdown) 2151 { 2152 cancel_work_sync(&ctrl->err_work); 2153 cancel_delayed_work_sync(&ctrl->reconnect_work); 2154 2155 nvme_rdma_teardown_io_queues(ctrl, shutdown); 2156 blk_mq_quiesce_queue(ctrl->ctrl.admin_q); 2157 if (shutdown) 2158 nvme_shutdown_ctrl(&ctrl->ctrl); 2159 else 2160 nvme_disable_ctrl(&ctrl->ctrl); 2161 nvme_rdma_teardown_admin_queue(ctrl, shutdown); 2162 } 2163 2164 static void nvme_rdma_delete_ctrl(struct nvme_ctrl *ctrl) 2165 { 2166 nvme_rdma_shutdown_ctrl(to_rdma_ctrl(ctrl), true); 2167 } 2168 2169 static void nvme_rdma_reset_ctrl_work(struct work_struct *work) 2170 { 2171 struct nvme_rdma_ctrl *ctrl = 2172 container_of(work, struct nvme_rdma_ctrl, ctrl.reset_work); 2173 2174 nvme_stop_ctrl(&ctrl->ctrl); 2175 nvme_rdma_shutdown_ctrl(ctrl, false); 2176 2177 if (!nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_CONNECTING)) { 2178 /* state change failure should never happen */ 2179 WARN_ON_ONCE(1); 2180 return; 2181 } 2182 2183 if (nvme_rdma_setup_ctrl(ctrl, false)) 2184 goto out_fail; 2185 2186 return; 2187 2188 out_fail: 2189 ++ctrl->ctrl.nr_reconnects; 2190 nvme_rdma_reconnect_or_remove(ctrl); 2191 } 2192 2193 static const struct nvme_ctrl_ops nvme_rdma_ctrl_ops = { 2194 .name = "rdma", 2195 .module = THIS_MODULE, 2196 .flags = NVME_F_FABRICS | NVME_F_METADATA_SUPPORTED, 2197 .reg_read32 = nvmf_reg_read32, 2198 .reg_read64 = nvmf_reg_read64, 2199 .reg_write32 = nvmf_reg_write32, 2200 .free_ctrl = nvme_rdma_free_ctrl, 2201 .submit_async_event = nvme_rdma_submit_async_event, 2202 .delete_ctrl = nvme_rdma_delete_ctrl, 2203 .get_address = nvmf_get_address, 2204 }; 2205 2206 /* 2207 * Fails a connection request if it matches an existing controller 2208 * (association) with the same tuple: 2209 * <Host NQN, Host ID, local address, remote address, remote port, SUBSYS NQN> 2210 * 2211 * if local address is not specified in the request, it will match an 2212 * existing controller with all the other parameters the same and no 2213 * local port address specified as well. 2214 * 2215 * The ports don't need to be compared as they are intrinsically 2216 * already matched by the port pointers supplied. 2217 */ 2218 static bool 2219 nvme_rdma_existing_controller(struct nvmf_ctrl_options *opts) 2220 { 2221 struct nvme_rdma_ctrl *ctrl; 2222 bool found = false; 2223 2224 mutex_lock(&nvme_rdma_ctrl_mutex); 2225 list_for_each_entry(ctrl, &nvme_rdma_ctrl_list, list) { 2226 found = nvmf_ip_options_match(&ctrl->ctrl, opts); 2227 if (found) 2228 break; 2229 } 2230 mutex_unlock(&nvme_rdma_ctrl_mutex); 2231 2232 return found; 2233 } 2234 2235 static struct nvme_ctrl *nvme_rdma_create_ctrl(struct device *dev, 2236 struct nvmf_ctrl_options *opts) 2237 { 2238 struct nvme_rdma_ctrl *ctrl; 2239 int ret; 2240 bool changed; 2241 2242 ctrl = kzalloc(sizeof(*ctrl), GFP_KERNEL); 2243 if (!ctrl) 2244 return ERR_PTR(-ENOMEM); 2245 ctrl->ctrl.opts = opts; 2246 INIT_LIST_HEAD(&ctrl->list); 2247 2248 if (!(opts->mask & NVMF_OPT_TRSVCID)) { 2249 opts->trsvcid = 2250 kstrdup(__stringify(NVME_RDMA_IP_PORT), GFP_KERNEL); 2251 if (!opts->trsvcid) { 2252 ret = -ENOMEM; 2253 goto out_free_ctrl; 2254 } 2255 opts->mask |= NVMF_OPT_TRSVCID; 2256 } 2257 2258 ret = inet_pton_with_scope(&init_net, AF_UNSPEC, 2259 opts->traddr, opts->trsvcid, &ctrl->addr); 2260 if (ret) { 2261 pr_err("malformed address passed: %s:%s\n", 2262 opts->traddr, opts->trsvcid); 2263 goto out_free_ctrl; 2264 } 2265 2266 if (opts->mask & NVMF_OPT_HOST_TRADDR) { 2267 ret = inet_pton_with_scope(&init_net, AF_UNSPEC, 2268 opts->host_traddr, NULL, &ctrl->src_addr); 2269 if (ret) { 2270 pr_err("malformed src address passed: %s\n", 2271 opts->host_traddr); 2272 goto out_free_ctrl; 2273 } 2274 } 2275 2276 if (!opts->duplicate_connect && nvme_rdma_existing_controller(opts)) { 2277 ret = -EALREADY; 2278 goto out_free_ctrl; 2279 } 2280 2281 INIT_DELAYED_WORK(&ctrl->reconnect_work, 2282 nvme_rdma_reconnect_ctrl_work); 2283 INIT_WORK(&ctrl->err_work, nvme_rdma_error_recovery_work); 2284 INIT_WORK(&ctrl->ctrl.reset_work, nvme_rdma_reset_ctrl_work); 2285 2286 ctrl->ctrl.queue_count = opts->nr_io_queues + opts->nr_write_queues + 2287 opts->nr_poll_queues + 1; 2288 ctrl->ctrl.sqsize = opts->queue_size - 1; 2289 ctrl->ctrl.kato = opts->kato; 2290 2291 ret = -ENOMEM; 2292 ctrl->queues = kcalloc(ctrl->ctrl.queue_count, sizeof(*ctrl->queues), 2293 GFP_KERNEL); 2294 if (!ctrl->queues) 2295 goto out_free_ctrl; 2296 2297 ret = nvme_init_ctrl(&ctrl->ctrl, dev, &nvme_rdma_ctrl_ops, 2298 0 /* no quirks, we're perfect! */); 2299 if (ret) 2300 goto out_kfree_queues; 2301 2302 changed = nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_CONNECTING); 2303 WARN_ON_ONCE(!changed); 2304 2305 ret = nvme_rdma_setup_ctrl(ctrl, true); 2306 if (ret) 2307 goto out_uninit_ctrl; 2308 2309 dev_info(ctrl->ctrl.device, "new ctrl: NQN \"%s\", addr %pISpcs\n", 2310 ctrl->ctrl.opts->subsysnqn, &ctrl->addr); 2311 2312 mutex_lock(&nvme_rdma_ctrl_mutex); 2313 list_add_tail(&ctrl->list, &nvme_rdma_ctrl_list); 2314 mutex_unlock(&nvme_rdma_ctrl_mutex); 2315 2316 return &ctrl->ctrl; 2317 2318 out_uninit_ctrl: 2319 nvme_uninit_ctrl(&ctrl->ctrl); 2320 nvme_put_ctrl(&ctrl->ctrl); 2321 if (ret > 0) 2322 ret = -EIO; 2323 return ERR_PTR(ret); 2324 out_kfree_queues: 2325 kfree(ctrl->queues); 2326 out_free_ctrl: 2327 kfree(ctrl); 2328 return ERR_PTR(ret); 2329 } 2330 2331 static struct nvmf_transport_ops nvme_rdma_transport = { 2332 .name = "rdma", 2333 .module = THIS_MODULE, 2334 .required_opts = NVMF_OPT_TRADDR, 2335 .allowed_opts = NVMF_OPT_TRSVCID | NVMF_OPT_RECONNECT_DELAY | 2336 NVMF_OPT_HOST_TRADDR | NVMF_OPT_CTRL_LOSS_TMO | 2337 NVMF_OPT_NR_WRITE_QUEUES | NVMF_OPT_NR_POLL_QUEUES | 2338 NVMF_OPT_TOS, 2339 .create_ctrl = nvme_rdma_create_ctrl, 2340 }; 2341 2342 static void nvme_rdma_remove_one(struct ib_device *ib_device, void *client_data) 2343 { 2344 struct nvme_rdma_ctrl *ctrl; 2345 struct nvme_rdma_device *ndev; 2346 bool found = false; 2347 2348 mutex_lock(&device_list_mutex); 2349 list_for_each_entry(ndev, &device_list, entry) { 2350 if (ndev->dev == ib_device) { 2351 found = true; 2352 break; 2353 } 2354 } 2355 mutex_unlock(&device_list_mutex); 2356 2357 if (!found) 2358 return; 2359 2360 /* Delete all controllers using this device */ 2361 mutex_lock(&nvme_rdma_ctrl_mutex); 2362 list_for_each_entry(ctrl, &nvme_rdma_ctrl_list, list) { 2363 if (ctrl->device->dev != ib_device) 2364 continue; 2365 nvme_delete_ctrl(&ctrl->ctrl); 2366 } 2367 mutex_unlock(&nvme_rdma_ctrl_mutex); 2368 2369 flush_workqueue(nvme_delete_wq); 2370 } 2371 2372 static struct ib_client nvme_rdma_ib_client = { 2373 .name = "nvme_rdma", 2374 .remove = nvme_rdma_remove_one 2375 }; 2376 2377 static int __init nvme_rdma_init_module(void) 2378 { 2379 int ret; 2380 2381 ret = ib_register_client(&nvme_rdma_ib_client); 2382 if (ret) 2383 return ret; 2384 2385 ret = nvmf_register_transport(&nvme_rdma_transport); 2386 if (ret) 2387 goto err_unreg_client; 2388 2389 return 0; 2390 2391 err_unreg_client: 2392 ib_unregister_client(&nvme_rdma_ib_client); 2393 return ret; 2394 } 2395 2396 static void __exit nvme_rdma_cleanup_module(void) 2397 { 2398 struct nvme_rdma_ctrl *ctrl; 2399 2400 nvmf_unregister_transport(&nvme_rdma_transport); 2401 ib_unregister_client(&nvme_rdma_ib_client); 2402 2403 mutex_lock(&nvme_rdma_ctrl_mutex); 2404 list_for_each_entry(ctrl, &nvme_rdma_ctrl_list, list) 2405 nvme_delete_ctrl(&ctrl->ctrl); 2406 mutex_unlock(&nvme_rdma_ctrl_mutex); 2407 flush_workqueue(nvme_delete_wq); 2408 } 2409 2410 module_init(nvme_rdma_init_module); 2411 module_exit(nvme_rdma_cleanup_module); 2412 2413 MODULE_LICENSE("GPL v2"); 2414