1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * NVMe over Fabrics RDMA host code. 4 * Copyright (c) 2015-2016 HGST, a Western Digital Company. 5 */ 6 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 7 #include <linux/module.h> 8 #include <linux/init.h> 9 #include <linux/slab.h> 10 #include <rdma/mr_pool.h> 11 #include <linux/err.h> 12 #include <linux/string.h> 13 #include <linux/atomic.h> 14 #include <linux/blk-mq.h> 15 #include <linux/blk-mq-rdma.h> 16 #include <linux/types.h> 17 #include <linux/list.h> 18 #include <linux/mutex.h> 19 #include <linux/scatterlist.h> 20 #include <linux/nvme.h> 21 #include <asm/unaligned.h> 22 23 #include <rdma/ib_verbs.h> 24 #include <rdma/rdma_cm.h> 25 #include <linux/nvme-rdma.h> 26 27 #include "nvme.h" 28 #include "fabrics.h" 29 30 31 #define NVME_RDMA_CONNECT_TIMEOUT_MS 3000 /* 3 second */ 32 33 #define NVME_RDMA_MAX_SEGMENTS 256 34 35 #define NVME_RDMA_MAX_INLINE_SEGMENTS 4 36 37 #define NVME_RDMA_DATA_SGL_SIZE \ 38 (sizeof(struct scatterlist) * NVME_INLINE_SG_CNT) 39 #define NVME_RDMA_METADATA_SGL_SIZE \ 40 (sizeof(struct scatterlist) * NVME_INLINE_METADATA_SG_CNT) 41 42 struct nvme_rdma_device { 43 struct ib_device *dev; 44 struct ib_pd *pd; 45 struct kref ref; 46 struct list_head entry; 47 unsigned int num_inline_segments; 48 }; 49 50 struct nvme_rdma_qe { 51 struct ib_cqe cqe; 52 void *data; 53 u64 dma; 54 }; 55 56 struct nvme_rdma_sgl { 57 int nents; 58 struct sg_table sg_table; 59 }; 60 61 struct nvme_rdma_queue; 62 struct nvme_rdma_request { 63 struct nvme_request req; 64 struct ib_mr *mr; 65 struct nvme_rdma_qe sqe; 66 union nvme_result result; 67 __le16 status; 68 refcount_t ref; 69 struct ib_sge sge[1 + NVME_RDMA_MAX_INLINE_SEGMENTS]; 70 u32 num_sge; 71 struct ib_reg_wr reg_wr; 72 struct ib_cqe reg_cqe; 73 struct nvme_rdma_queue *queue; 74 struct nvme_rdma_sgl data_sgl; 75 struct nvme_rdma_sgl *metadata_sgl; 76 bool use_sig_mr; 77 }; 78 79 enum nvme_rdma_queue_flags { 80 NVME_RDMA_Q_ALLOCATED = 0, 81 NVME_RDMA_Q_LIVE = 1, 82 NVME_RDMA_Q_TR_READY = 2, 83 }; 84 85 struct nvme_rdma_queue { 86 struct nvme_rdma_qe *rsp_ring; 87 int queue_size; 88 size_t cmnd_capsule_len; 89 struct nvme_rdma_ctrl *ctrl; 90 struct nvme_rdma_device *device; 91 struct ib_cq *ib_cq; 92 struct ib_qp *qp; 93 94 unsigned long flags; 95 struct rdma_cm_id *cm_id; 96 int cm_error; 97 struct completion cm_done; 98 bool pi_support; 99 int cq_size; 100 }; 101 102 struct nvme_rdma_ctrl { 103 /* read only in the hot path */ 104 struct nvme_rdma_queue *queues; 105 106 /* other member variables */ 107 struct blk_mq_tag_set tag_set; 108 struct work_struct err_work; 109 110 struct nvme_rdma_qe async_event_sqe; 111 112 struct delayed_work reconnect_work; 113 114 struct list_head list; 115 116 struct blk_mq_tag_set admin_tag_set; 117 struct nvme_rdma_device *device; 118 119 u32 max_fr_pages; 120 121 struct sockaddr_storage addr; 122 struct sockaddr_storage src_addr; 123 124 struct nvme_ctrl ctrl; 125 struct mutex teardown_lock; 126 bool use_inline_data; 127 u32 io_queues[HCTX_MAX_TYPES]; 128 }; 129 130 static inline struct nvme_rdma_ctrl *to_rdma_ctrl(struct nvme_ctrl *ctrl) 131 { 132 return container_of(ctrl, struct nvme_rdma_ctrl, ctrl); 133 } 134 135 static LIST_HEAD(device_list); 136 static DEFINE_MUTEX(device_list_mutex); 137 138 static LIST_HEAD(nvme_rdma_ctrl_list); 139 static DEFINE_MUTEX(nvme_rdma_ctrl_mutex); 140 141 /* 142 * Disabling this option makes small I/O goes faster, but is fundamentally 143 * unsafe. With it turned off we will have to register a global rkey that 144 * allows read and write access to all physical memory. 145 */ 146 static bool register_always = true; 147 module_param(register_always, bool, 0444); 148 MODULE_PARM_DESC(register_always, 149 "Use memory registration even for contiguous memory regions"); 150 151 static int nvme_rdma_cm_handler(struct rdma_cm_id *cm_id, 152 struct rdma_cm_event *event); 153 static void nvme_rdma_recv_done(struct ib_cq *cq, struct ib_wc *wc); 154 static void nvme_rdma_complete_rq(struct request *rq); 155 156 static const struct blk_mq_ops nvme_rdma_mq_ops; 157 static const struct blk_mq_ops nvme_rdma_admin_mq_ops; 158 159 static inline int nvme_rdma_queue_idx(struct nvme_rdma_queue *queue) 160 { 161 return queue - queue->ctrl->queues; 162 } 163 164 static bool nvme_rdma_poll_queue(struct nvme_rdma_queue *queue) 165 { 166 return nvme_rdma_queue_idx(queue) > 167 queue->ctrl->io_queues[HCTX_TYPE_DEFAULT] + 168 queue->ctrl->io_queues[HCTX_TYPE_READ]; 169 } 170 171 static inline size_t nvme_rdma_inline_data_size(struct nvme_rdma_queue *queue) 172 { 173 return queue->cmnd_capsule_len - sizeof(struct nvme_command); 174 } 175 176 static void nvme_rdma_free_qe(struct ib_device *ibdev, struct nvme_rdma_qe *qe, 177 size_t capsule_size, enum dma_data_direction dir) 178 { 179 ib_dma_unmap_single(ibdev, qe->dma, capsule_size, dir); 180 kfree(qe->data); 181 } 182 183 static int nvme_rdma_alloc_qe(struct ib_device *ibdev, struct nvme_rdma_qe *qe, 184 size_t capsule_size, enum dma_data_direction dir) 185 { 186 qe->data = kzalloc(capsule_size, GFP_KERNEL); 187 if (!qe->data) 188 return -ENOMEM; 189 190 qe->dma = ib_dma_map_single(ibdev, qe->data, capsule_size, dir); 191 if (ib_dma_mapping_error(ibdev, qe->dma)) { 192 kfree(qe->data); 193 qe->data = NULL; 194 return -ENOMEM; 195 } 196 197 return 0; 198 } 199 200 static void nvme_rdma_free_ring(struct ib_device *ibdev, 201 struct nvme_rdma_qe *ring, size_t ib_queue_size, 202 size_t capsule_size, enum dma_data_direction dir) 203 { 204 int i; 205 206 for (i = 0; i < ib_queue_size; i++) 207 nvme_rdma_free_qe(ibdev, &ring[i], capsule_size, dir); 208 kfree(ring); 209 } 210 211 static struct nvme_rdma_qe *nvme_rdma_alloc_ring(struct ib_device *ibdev, 212 size_t ib_queue_size, size_t capsule_size, 213 enum dma_data_direction dir) 214 { 215 struct nvme_rdma_qe *ring; 216 int i; 217 218 ring = kcalloc(ib_queue_size, sizeof(struct nvme_rdma_qe), GFP_KERNEL); 219 if (!ring) 220 return NULL; 221 222 /* 223 * Bind the CQEs (post recv buffers) DMA mapping to the RDMA queue 224 * lifetime. It's safe, since any chage in the underlying RDMA device 225 * will issue error recovery and queue re-creation. 226 */ 227 for (i = 0; i < ib_queue_size; i++) { 228 if (nvme_rdma_alloc_qe(ibdev, &ring[i], capsule_size, dir)) 229 goto out_free_ring; 230 } 231 232 return ring; 233 234 out_free_ring: 235 nvme_rdma_free_ring(ibdev, ring, i, capsule_size, dir); 236 return NULL; 237 } 238 239 static void nvme_rdma_qp_event(struct ib_event *event, void *context) 240 { 241 pr_debug("QP event %s (%d)\n", 242 ib_event_msg(event->event), event->event); 243 244 } 245 246 static int nvme_rdma_wait_for_cm(struct nvme_rdma_queue *queue) 247 { 248 int ret; 249 250 ret = wait_for_completion_interruptible_timeout(&queue->cm_done, 251 msecs_to_jiffies(NVME_RDMA_CONNECT_TIMEOUT_MS) + 1); 252 if (ret < 0) 253 return ret; 254 if (ret == 0) 255 return -ETIMEDOUT; 256 WARN_ON_ONCE(queue->cm_error > 0); 257 return queue->cm_error; 258 } 259 260 static int nvme_rdma_create_qp(struct nvme_rdma_queue *queue, const int factor) 261 { 262 struct nvme_rdma_device *dev = queue->device; 263 struct ib_qp_init_attr init_attr; 264 int ret; 265 266 memset(&init_attr, 0, sizeof(init_attr)); 267 init_attr.event_handler = nvme_rdma_qp_event; 268 /* +1 for drain */ 269 init_attr.cap.max_send_wr = factor * queue->queue_size + 1; 270 /* +1 for drain */ 271 init_attr.cap.max_recv_wr = queue->queue_size + 1; 272 init_attr.cap.max_recv_sge = 1; 273 init_attr.cap.max_send_sge = 1 + dev->num_inline_segments; 274 init_attr.sq_sig_type = IB_SIGNAL_REQ_WR; 275 init_attr.qp_type = IB_QPT_RC; 276 init_attr.send_cq = queue->ib_cq; 277 init_attr.recv_cq = queue->ib_cq; 278 if (queue->pi_support) 279 init_attr.create_flags |= IB_QP_CREATE_INTEGRITY_EN; 280 init_attr.qp_context = queue; 281 282 ret = rdma_create_qp(queue->cm_id, dev->pd, &init_attr); 283 284 queue->qp = queue->cm_id->qp; 285 return ret; 286 } 287 288 static void nvme_rdma_exit_request(struct blk_mq_tag_set *set, 289 struct request *rq, unsigned int hctx_idx) 290 { 291 struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); 292 293 kfree(req->sqe.data); 294 } 295 296 static int nvme_rdma_init_request(struct blk_mq_tag_set *set, 297 struct request *rq, unsigned int hctx_idx, 298 unsigned int numa_node) 299 { 300 struct nvme_rdma_ctrl *ctrl = set->driver_data; 301 struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); 302 int queue_idx = (set == &ctrl->tag_set) ? hctx_idx + 1 : 0; 303 struct nvme_rdma_queue *queue = &ctrl->queues[queue_idx]; 304 305 nvme_req(rq)->ctrl = &ctrl->ctrl; 306 req->sqe.data = kzalloc(sizeof(struct nvme_command), GFP_KERNEL); 307 if (!req->sqe.data) 308 return -ENOMEM; 309 310 /* metadata nvme_rdma_sgl struct is located after command's data SGL */ 311 if (queue->pi_support) 312 req->metadata_sgl = (void *)nvme_req(rq) + 313 sizeof(struct nvme_rdma_request) + 314 NVME_RDMA_DATA_SGL_SIZE; 315 316 req->queue = queue; 317 318 return 0; 319 } 320 321 static int nvme_rdma_init_hctx(struct blk_mq_hw_ctx *hctx, void *data, 322 unsigned int hctx_idx) 323 { 324 struct nvme_rdma_ctrl *ctrl = data; 325 struct nvme_rdma_queue *queue = &ctrl->queues[hctx_idx + 1]; 326 327 BUG_ON(hctx_idx >= ctrl->ctrl.queue_count); 328 329 hctx->driver_data = queue; 330 return 0; 331 } 332 333 static int nvme_rdma_init_admin_hctx(struct blk_mq_hw_ctx *hctx, void *data, 334 unsigned int hctx_idx) 335 { 336 struct nvme_rdma_ctrl *ctrl = data; 337 struct nvme_rdma_queue *queue = &ctrl->queues[0]; 338 339 BUG_ON(hctx_idx != 0); 340 341 hctx->driver_data = queue; 342 return 0; 343 } 344 345 static void nvme_rdma_free_dev(struct kref *ref) 346 { 347 struct nvme_rdma_device *ndev = 348 container_of(ref, struct nvme_rdma_device, ref); 349 350 mutex_lock(&device_list_mutex); 351 list_del(&ndev->entry); 352 mutex_unlock(&device_list_mutex); 353 354 ib_dealloc_pd(ndev->pd); 355 kfree(ndev); 356 } 357 358 static void nvme_rdma_dev_put(struct nvme_rdma_device *dev) 359 { 360 kref_put(&dev->ref, nvme_rdma_free_dev); 361 } 362 363 static int nvme_rdma_dev_get(struct nvme_rdma_device *dev) 364 { 365 return kref_get_unless_zero(&dev->ref); 366 } 367 368 static struct nvme_rdma_device * 369 nvme_rdma_find_get_device(struct rdma_cm_id *cm_id) 370 { 371 struct nvme_rdma_device *ndev; 372 373 mutex_lock(&device_list_mutex); 374 list_for_each_entry(ndev, &device_list, entry) { 375 if (ndev->dev->node_guid == cm_id->device->node_guid && 376 nvme_rdma_dev_get(ndev)) 377 goto out_unlock; 378 } 379 380 ndev = kzalloc(sizeof(*ndev), GFP_KERNEL); 381 if (!ndev) 382 goto out_err; 383 384 ndev->dev = cm_id->device; 385 kref_init(&ndev->ref); 386 387 ndev->pd = ib_alloc_pd(ndev->dev, 388 register_always ? 0 : IB_PD_UNSAFE_GLOBAL_RKEY); 389 if (IS_ERR(ndev->pd)) 390 goto out_free_dev; 391 392 if (!(ndev->dev->attrs.device_cap_flags & 393 IB_DEVICE_MEM_MGT_EXTENSIONS)) { 394 dev_err(&ndev->dev->dev, 395 "Memory registrations not supported.\n"); 396 goto out_free_pd; 397 } 398 399 ndev->num_inline_segments = min(NVME_RDMA_MAX_INLINE_SEGMENTS, 400 ndev->dev->attrs.max_send_sge - 1); 401 list_add(&ndev->entry, &device_list); 402 out_unlock: 403 mutex_unlock(&device_list_mutex); 404 return ndev; 405 406 out_free_pd: 407 ib_dealloc_pd(ndev->pd); 408 out_free_dev: 409 kfree(ndev); 410 out_err: 411 mutex_unlock(&device_list_mutex); 412 return NULL; 413 } 414 415 static void nvme_rdma_free_cq(struct nvme_rdma_queue *queue) 416 { 417 if (nvme_rdma_poll_queue(queue)) 418 ib_free_cq(queue->ib_cq); 419 else 420 ib_cq_pool_put(queue->ib_cq, queue->cq_size); 421 } 422 423 static void nvme_rdma_destroy_queue_ib(struct nvme_rdma_queue *queue) 424 { 425 struct nvme_rdma_device *dev; 426 struct ib_device *ibdev; 427 428 if (!test_and_clear_bit(NVME_RDMA_Q_TR_READY, &queue->flags)) 429 return; 430 431 dev = queue->device; 432 ibdev = dev->dev; 433 434 if (queue->pi_support) 435 ib_mr_pool_destroy(queue->qp, &queue->qp->sig_mrs); 436 ib_mr_pool_destroy(queue->qp, &queue->qp->rdma_mrs); 437 438 /* 439 * The cm_id object might have been destroyed during RDMA connection 440 * establishment error flow to avoid getting other cma events, thus 441 * the destruction of the QP shouldn't use rdma_cm API. 442 */ 443 ib_destroy_qp(queue->qp); 444 nvme_rdma_free_cq(queue); 445 446 nvme_rdma_free_ring(ibdev, queue->rsp_ring, queue->queue_size, 447 sizeof(struct nvme_completion), DMA_FROM_DEVICE); 448 449 nvme_rdma_dev_put(dev); 450 } 451 452 static int nvme_rdma_get_max_fr_pages(struct ib_device *ibdev, bool pi_support) 453 { 454 u32 max_page_list_len; 455 456 if (pi_support) 457 max_page_list_len = ibdev->attrs.max_pi_fast_reg_page_list_len; 458 else 459 max_page_list_len = ibdev->attrs.max_fast_reg_page_list_len; 460 461 return min_t(u32, NVME_RDMA_MAX_SEGMENTS, max_page_list_len - 1); 462 } 463 464 static int nvme_rdma_create_cq(struct ib_device *ibdev, 465 struct nvme_rdma_queue *queue) 466 { 467 int ret, comp_vector, idx = nvme_rdma_queue_idx(queue); 468 enum ib_poll_context poll_ctx; 469 470 /* 471 * Spread I/O queues completion vectors according their queue index. 472 * Admin queues can always go on completion vector 0. 473 */ 474 comp_vector = (idx == 0 ? idx : idx - 1) % ibdev->num_comp_vectors; 475 476 /* Polling queues need direct cq polling context */ 477 if (nvme_rdma_poll_queue(queue)) { 478 poll_ctx = IB_POLL_DIRECT; 479 queue->ib_cq = ib_alloc_cq(ibdev, queue, queue->cq_size, 480 comp_vector, poll_ctx); 481 } else { 482 poll_ctx = IB_POLL_SOFTIRQ; 483 queue->ib_cq = ib_cq_pool_get(ibdev, queue->cq_size, 484 comp_vector, poll_ctx); 485 } 486 487 if (IS_ERR(queue->ib_cq)) { 488 ret = PTR_ERR(queue->ib_cq); 489 return ret; 490 } 491 492 return 0; 493 } 494 495 static int nvme_rdma_create_queue_ib(struct nvme_rdma_queue *queue) 496 { 497 struct ib_device *ibdev; 498 const int send_wr_factor = 3; /* MR, SEND, INV */ 499 const int cq_factor = send_wr_factor + 1; /* + RECV */ 500 int ret, pages_per_mr; 501 502 queue->device = nvme_rdma_find_get_device(queue->cm_id); 503 if (!queue->device) { 504 dev_err(queue->cm_id->device->dev.parent, 505 "no client data found!\n"); 506 return -ECONNREFUSED; 507 } 508 ibdev = queue->device->dev; 509 510 /* +1 for ib_stop_cq */ 511 queue->cq_size = cq_factor * queue->queue_size + 1; 512 513 ret = nvme_rdma_create_cq(ibdev, queue); 514 if (ret) 515 goto out_put_dev; 516 517 ret = nvme_rdma_create_qp(queue, send_wr_factor); 518 if (ret) 519 goto out_destroy_ib_cq; 520 521 queue->rsp_ring = nvme_rdma_alloc_ring(ibdev, queue->queue_size, 522 sizeof(struct nvme_completion), DMA_FROM_DEVICE); 523 if (!queue->rsp_ring) { 524 ret = -ENOMEM; 525 goto out_destroy_qp; 526 } 527 528 /* 529 * Currently we don't use SG_GAPS MR's so if the first entry is 530 * misaligned we'll end up using two entries for a single data page, 531 * so one additional entry is required. 532 */ 533 pages_per_mr = nvme_rdma_get_max_fr_pages(ibdev, queue->pi_support) + 1; 534 ret = ib_mr_pool_init(queue->qp, &queue->qp->rdma_mrs, 535 queue->queue_size, 536 IB_MR_TYPE_MEM_REG, 537 pages_per_mr, 0); 538 if (ret) { 539 dev_err(queue->ctrl->ctrl.device, 540 "failed to initialize MR pool sized %d for QID %d\n", 541 queue->queue_size, nvme_rdma_queue_idx(queue)); 542 goto out_destroy_ring; 543 } 544 545 if (queue->pi_support) { 546 ret = ib_mr_pool_init(queue->qp, &queue->qp->sig_mrs, 547 queue->queue_size, IB_MR_TYPE_INTEGRITY, 548 pages_per_mr, pages_per_mr); 549 if (ret) { 550 dev_err(queue->ctrl->ctrl.device, 551 "failed to initialize PI MR pool sized %d for QID %d\n", 552 queue->queue_size, nvme_rdma_queue_idx(queue)); 553 goto out_destroy_mr_pool; 554 } 555 } 556 557 set_bit(NVME_RDMA_Q_TR_READY, &queue->flags); 558 559 return 0; 560 561 out_destroy_mr_pool: 562 ib_mr_pool_destroy(queue->qp, &queue->qp->rdma_mrs); 563 out_destroy_ring: 564 nvme_rdma_free_ring(ibdev, queue->rsp_ring, queue->queue_size, 565 sizeof(struct nvme_completion), DMA_FROM_DEVICE); 566 out_destroy_qp: 567 rdma_destroy_qp(queue->cm_id); 568 out_destroy_ib_cq: 569 nvme_rdma_free_cq(queue); 570 out_put_dev: 571 nvme_rdma_dev_put(queue->device); 572 return ret; 573 } 574 575 static int nvme_rdma_alloc_queue(struct nvme_rdma_ctrl *ctrl, 576 int idx, size_t queue_size) 577 { 578 struct nvme_rdma_queue *queue; 579 struct sockaddr *src_addr = NULL; 580 int ret; 581 582 queue = &ctrl->queues[idx]; 583 queue->ctrl = ctrl; 584 if (idx && ctrl->ctrl.max_integrity_segments) 585 queue->pi_support = true; 586 else 587 queue->pi_support = false; 588 init_completion(&queue->cm_done); 589 590 if (idx > 0) 591 queue->cmnd_capsule_len = ctrl->ctrl.ioccsz * 16; 592 else 593 queue->cmnd_capsule_len = sizeof(struct nvme_command); 594 595 queue->queue_size = queue_size; 596 597 queue->cm_id = rdma_create_id(&init_net, nvme_rdma_cm_handler, queue, 598 RDMA_PS_TCP, IB_QPT_RC); 599 if (IS_ERR(queue->cm_id)) { 600 dev_info(ctrl->ctrl.device, 601 "failed to create CM ID: %ld\n", PTR_ERR(queue->cm_id)); 602 return PTR_ERR(queue->cm_id); 603 } 604 605 if (ctrl->ctrl.opts->mask & NVMF_OPT_HOST_TRADDR) 606 src_addr = (struct sockaddr *)&ctrl->src_addr; 607 608 queue->cm_error = -ETIMEDOUT; 609 ret = rdma_resolve_addr(queue->cm_id, src_addr, 610 (struct sockaddr *)&ctrl->addr, 611 NVME_RDMA_CONNECT_TIMEOUT_MS); 612 if (ret) { 613 dev_info(ctrl->ctrl.device, 614 "rdma_resolve_addr failed (%d).\n", ret); 615 goto out_destroy_cm_id; 616 } 617 618 ret = nvme_rdma_wait_for_cm(queue); 619 if (ret) { 620 dev_info(ctrl->ctrl.device, 621 "rdma connection establishment failed (%d)\n", ret); 622 goto out_destroy_cm_id; 623 } 624 625 set_bit(NVME_RDMA_Q_ALLOCATED, &queue->flags); 626 627 return 0; 628 629 out_destroy_cm_id: 630 rdma_destroy_id(queue->cm_id); 631 nvme_rdma_destroy_queue_ib(queue); 632 return ret; 633 } 634 635 static void __nvme_rdma_stop_queue(struct nvme_rdma_queue *queue) 636 { 637 rdma_disconnect(queue->cm_id); 638 ib_drain_qp(queue->qp); 639 } 640 641 static void nvme_rdma_stop_queue(struct nvme_rdma_queue *queue) 642 { 643 if (!test_and_clear_bit(NVME_RDMA_Q_LIVE, &queue->flags)) 644 return; 645 __nvme_rdma_stop_queue(queue); 646 } 647 648 static void nvme_rdma_free_queue(struct nvme_rdma_queue *queue) 649 { 650 if (!test_and_clear_bit(NVME_RDMA_Q_ALLOCATED, &queue->flags)) 651 return; 652 653 nvme_rdma_destroy_queue_ib(queue); 654 rdma_destroy_id(queue->cm_id); 655 } 656 657 static void nvme_rdma_free_io_queues(struct nvme_rdma_ctrl *ctrl) 658 { 659 int i; 660 661 for (i = 1; i < ctrl->ctrl.queue_count; i++) 662 nvme_rdma_free_queue(&ctrl->queues[i]); 663 } 664 665 static void nvme_rdma_stop_io_queues(struct nvme_rdma_ctrl *ctrl) 666 { 667 int i; 668 669 for (i = 1; i < ctrl->ctrl.queue_count; i++) 670 nvme_rdma_stop_queue(&ctrl->queues[i]); 671 } 672 673 static int nvme_rdma_start_queue(struct nvme_rdma_ctrl *ctrl, int idx) 674 { 675 struct nvme_rdma_queue *queue = &ctrl->queues[idx]; 676 bool poll = nvme_rdma_poll_queue(queue); 677 int ret; 678 679 if (idx) 680 ret = nvmf_connect_io_queue(&ctrl->ctrl, idx, poll); 681 else 682 ret = nvmf_connect_admin_queue(&ctrl->ctrl); 683 684 if (!ret) { 685 set_bit(NVME_RDMA_Q_LIVE, &queue->flags); 686 } else { 687 if (test_bit(NVME_RDMA_Q_ALLOCATED, &queue->flags)) 688 __nvme_rdma_stop_queue(queue); 689 dev_info(ctrl->ctrl.device, 690 "failed to connect queue: %d ret=%d\n", idx, ret); 691 } 692 return ret; 693 } 694 695 static int nvme_rdma_start_io_queues(struct nvme_rdma_ctrl *ctrl) 696 { 697 int i, ret = 0; 698 699 for (i = 1; i < ctrl->ctrl.queue_count; i++) { 700 ret = nvme_rdma_start_queue(ctrl, i); 701 if (ret) 702 goto out_stop_queues; 703 } 704 705 return 0; 706 707 out_stop_queues: 708 for (i--; i >= 1; i--) 709 nvme_rdma_stop_queue(&ctrl->queues[i]); 710 return ret; 711 } 712 713 static int nvme_rdma_alloc_io_queues(struct nvme_rdma_ctrl *ctrl) 714 { 715 struct nvmf_ctrl_options *opts = ctrl->ctrl.opts; 716 struct ib_device *ibdev = ctrl->device->dev; 717 unsigned int nr_io_queues, nr_default_queues; 718 unsigned int nr_read_queues, nr_poll_queues; 719 int i, ret; 720 721 nr_read_queues = min_t(unsigned int, ibdev->num_comp_vectors, 722 min(opts->nr_io_queues, num_online_cpus())); 723 nr_default_queues = min_t(unsigned int, ibdev->num_comp_vectors, 724 min(opts->nr_write_queues, num_online_cpus())); 725 nr_poll_queues = min(opts->nr_poll_queues, num_online_cpus()); 726 nr_io_queues = nr_read_queues + nr_default_queues + nr_poll_queues; 727 728 ret = nvme_set_queue_count(&ctrl->ctrl, &nr_io_queues); 729 if (ret) 730 return ret; 731 732 ctrl->ctrl.queue_count = nr_io_queues + 1; 733 if (ctrl->ctrl.queue_count < 2) 734 return 0; 735 736 dev_info(ctrl->ctrl.device, 737 "creating %d I/O queues.\n", nr_io_queues); 738 739 if (opts->nr_write_queues && nr_read_queues < nr_io_queues) { 740 /* 741 * separate read/write queues 742 * hand out dedicated default queues only after we have 743 * sufficient read queues. 744 */ 745 ctrl->io_queues[HCTX_TYPE_READ] = nr_read_queues; 746 nr_io_queues -= ctrl->io_queues[HCTX_TYPE_READ]; 747 ctrl->io_queues[HCTX_TYPE_DEFAULT] = 748 min(nr_default_queues, nr_io_queues); 749 nr_io_queues -= ctrl->io_queues[HCTX_TYPE_DEFAULT]; 750 } else { 751 /* 752 * shared read/write queues 753 * either no write queues were requested, or we don't have 754 * sufficient queue count to have dedicated default queues. 755 */ 756 ctrl->io_queues[HCTX_TYPE_DEFAULT] = 757 min(nr_read_queues, nr_io_queues); 758 nr_io_queues -= ctrl->io_queues[HCTX_TYPE_DEFAULT]; 759 } 760 761 if (opts->nr_poll_queues && nr_io_queues) { 762 /* map dedicated poll queues only if we have queues left */ 763 ctrl->io_queues[HCTX_TYPE_POLL] = 764 min(nr_poll_queues, nr_io_queues); 765 } 766 767 for (i = 1; i < ctrl->ctrl.queue_count; i++) { 768 ret = nvme_rdma_alloc_queue(ctrl, i, 769 ctrl->ctrl.sqsize + 1); 770 if (ret) 771 goto out_free_queues; 772 } 773 774 return 0; 775 776 out_free_queues: 777 for (i--; i >= 1; i--) 778 nvme_rdma_free_queue(&ctrl->queues[i]); 779 780 return ret; 781 } 782 783 static struct blk_mq_tag_set *nvme_rdma_alloc_tagset(struct nvme_ctrl *nctrl, 784 bool admin) 785 { 786 struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(nctrl); 787 struct blk_mq_tag_set *set; 788 int ret; 789 790 if (admin) { 791 set = &ctrl->admin_tag_set; 792 memset(set, 0, sizeof(*set)); 793 set->ops = &nvme_rdma_admin_mq_ops; 794 set->queue_depth = NVME_AQ_MQ_TAG_DEPTH; 795 set->reserved_tags = 2; /* connect + keep-alive */ 796 set->numa_node = nctrl->numa_node; 797 set->cmd_size = sizeof(struct nvme_rdma_request) + 798 NVME_RDMA_DATA_SGL_SIZE; 799 set->driver_data = ctrl; 800 set->nr_hw_queues = 1; 801 set->timeout = ADMIN_TIMEOUT; 802 set->flags = BLK_MQ_F_NO_SCHED; 803 } else { 804 set = &ctrl->tag_set; 805 memset(set, 0, sizeof(*set)); 806 set->ops = &nvme_rdma_mq_ops; 807 set->queue_depth = nctrl->sqsize + 1; 808 set->reserved_tags = 1; /* fabric connect */ 809 set->numa_node = nctrl->numa_node; 810 set->flags = BLK_MQ_F_SHOULD_MERGE; 811 set->cmd_size = sizeof(struct nvme_rdma_request) + 812 NVME_RDMA_DATA_SGL_SIZE; 813 if (nctrl->max_integrity_segments) 814 set->cmd_size += sizeof(struct nvme_rdma_sgl) + 815 NVME_RDMA_METADATA_SGL_SIZE; 816 set->driver_data = ctrl; 817 set->nr_hw_queues = nctrl->queue_count - 1; 818 set->timeout = NVME_IO_TIMEOUT; 819 set->nr_maps = nctrl->opts->nr_poll_queues ? HCTX_MAX_TYPES : 2; 820 } 821 822 ret = blk_mq_alloc_tag_set(set); 823 if (ret) 824 return ERR_PTR(ret); 825 826 return set; 827 } 828 829 static void nvme_rdma_destroy_admin_queue(struct nvme_rdma_ctrl *ctrl, 830 bool remove) 831 { 832 if (remove) { 833 blk_cleanup_queue(ctrl->ctrl.admin_q); 834 blk_cleanup_queue(ctrl->ctrl.fabrics_q); 835 blk_mq_free_tag_set(ctrl->ctrl.admin_tagset); 836 } 837 if (ctrl->async_event_sqe.data) { 838 nvme_rdma_free_qe(ctrl->device->dev, &ctrl->async_event_sqe, 839 sizeof(struct nvme_command), DMA_TO_DEVICE); 840 ctrl->async_event_sqe.data = NULL; 841 } 842 nvme_rdma_free_queue(&ctrl->queues[0]); 843 } 844 845 static int nvme_rdma_configure_admin_queue(struct nvme_rdma_ctrl *ctrl, 846 bool new) 847 { 848 bool pi_capable = false; 849 int error; 850 851 error = nvme_rdma_alloc_queue(ctrl, 0, NVME_AQ_DEPTH); 852 if (error) 853 return error; 854 855 ctrl->device = ctrl->queues[0].device; 856 ctrl->ctrl.numa_node = dev_to_node(ctrl->device->dev->dma_device); 857 858 /* T10-PI support */ 859 if (ctrl->device->dev->attrs.device_cap_flags & 860 IB_DEVICE_INTEGRITY_HANDOVER) 861 pi_capable = true; 862 863 ctrl->max_fr_pages = nvme_rdma_get_max_fr_pages(ctrl->device->dev, 864 pi_capable); 865 866 /* 867 * Bind the async event SQE DMA mapping to the admin queue lifetime. 868 * It's safe, since any chage in the underlying RDMA device will issue 869 * error recovery and queue re-creation. 870 */ 871 error = nvme_rdma_alloc_qe(ctrl->device->dev, &ctrl->async_event_sqe, 872 sizeof(struct nvme_command), DMA_TO_DEVICE); 873 if (error) 874 goto out_free_queue; 875 876 if (new) { 877 ctrl->ctrl.admin_tagset = nvme_rdma_alloc_tagset(&ctrl->ctrl, true); 878 if (IS_ERR(ctrl->ctrl.admin_tagset)) { 879 error = PTR_ERR(ctrl->ctrl.admin_tagset); 880 goto out_free_async_qe; 881 } 882 883 ctrl->ctrl.fabrics_q = blk_mq_init_queue(&ctrl->admin_tag_set); 884 if (IS_ERR(ctrl->ctrl.fabrics_q)) { 885 error = PTR_ERR(ctrl->ctrl.fabrics_q); 886 goto out_free_tagset; 887 } 888 889 ctrl->ctrl.admin_q = blk_mq_init_queue(&ctrl->admin_tag_set); 890 if (IS_ERR(ctrl->ctrl.admin_q)) { 891 error = PTR_ERR(ctrl->ctrl.admin_q); 892 goto out_cleanup_fabrics_q; 893 } 894 } 895 896 error = nvme_rdma_start_queue(ctrl, 0); 897 if (error) 898 goto out_cleanup_queue; 899 900 error = nvme_enable_ctrl(&ctrl->ctrl); 901 if (error) 902 goto out_stop_queue; 903 904 ctrl->ctrl.max_segments = ctrl->max_fr_pages; 905 ctrl->ctrl.max_hw_sectors = ctrl->max_fr_pages << (ilog2(SZ_4K) - 9); 906 if (pi_capable) 907 ctrl->ctrl.max_integrity_segments = ctrl->max_fr_pages; 908 else 909 ctrl->ctrl.max_integrity_segments = 0; 910 911 blk_mq_unquiesce_queue(ctrl->ctrl.admin_q); 912 913 error = nvme_init_identify(&ctrl->ctrl); 914 if (error) 915 goto out_stop_queue; 916 917 return 0; 918 919 out_stop_queue: 920 nvme_rdma_stop_queue(&ctrl->queues[0]); 921 out_cleanup_queue: 922 if (new) 923 blk_cleanup_queue(ctrl->ctrl.admin_q); 924 out_cleanup_fabrics_q: 925 if (new) 926 blk_cleanup_queue(ctrl->ctrl.fabrics_q); 927 out_free_tagset: 928 if (new) 929 blk_mq_free_tag_set(ctrl->ctrl.admin_tagset); 930 out_free_async_qe: 931 if (ctrl->async_event_sqe.data) { 932 nvme_rdma_free_qe(ctrl->device->dev, &ctrl->async_event_sqe, 933 sizeof(struct nvme_command), DMA_TO_DEVICE); 934 ctrl->async_event_sqe.data = NULL; 935 } 936 out_free_queue: 937 nvme_rdma_free_queue(&ctrl->queues[0]); 938 return error; 939 } 940 941 static void nvme_rdma_destroy_io_queues(struct nvme_rdma_ctrl *ctrl, 942 bool remove) 943 { 944 if (remove) { 945 blk_cleanup_queue(ctrl->ctrl.connect_q); 946 blk_mq_free_tag_set(ctrl->ctrl.tagset); 947 } 948 nvme_rdma_free_io_queues(ctrl); 949 } 950 951 static int nvme_rdma_configure_io_queues(struct nvme_rdma_ctrl *ctrl, bool new) 952 { 953 int ret; 954 955 ret = nvme_rdma_alloc_io_queues(ctrl); 956 if (ret) 957 return ret; 958 959 if (new) { 960 ctrl->ctrl.tagset = nvme_rdma_alloc_tagset(&ctrl->ctrl, false); 961 if (IS_ERR(ctrl->ctrl.tagset)) { 962 ret = PTR_ERR(ctrl->ctrl.tagset); 963 goto out_free_io_queues; 964 } 965 966 ctrl->ctrl.connect_q = blk_mq_init_queue(&ctrl->tag_set); 967 if (IS_ERR(ctrl->ctrl.connect_q)) { 968 ret = PTR_ERR(ctrl->ctrl.connect_q); 969 goto out_free_tag_set; 970 } 971 } 972 973 ret = nvme_rdma_start_io_queues(ctrl); 974 if (ret) 975 goto out_cleanup_connect_q; 976 977 if (!new) { 978 nvme_start_queues(&ctrl->ctrl); 979 if (!nvme_wait_freeze_timeout(&ctrl->ctrl, NVME_IO_TIMEOUT)) { 980 /* 981 * If we timed out waiting for freeze we are likely to 982 * be stuck. Fail the controller initialization just 983 * to be safe. 984 */ 985 ret = -ENODEV; 986 goto out_wait_freeze_timed_out; 987 } 988 blk_mq_update_nr_hw_queues(ctrl->ctrl.tagset, 989 ctrl->ctrl.queue_count - 1); 990 nvme_unfreeze(&ctrl->ctrl); 991 } 992 993 return 0; 994 995 out_wait_freeze_timed_out: 996 nvme_stop_queues(&ctrl->ctrl); 997 nvme_rdma_stop_io_queues(ctrl); 998 out_cleanup_connect_q: 999 if (new) 1000 blk_cleanup_queue(ctrl->ctrl.connect_q); 1001 out_free_tag_set: 1002 if (new) 1003 blk_mq_free_tag_set(ctrl->ctrl.tagset); 1004 out_free_io_queues: 1005 nvme_rdma_free_io_queues(ctrl); 1006 return ret; 1007 } 1008 1009 static void nvme_rdma_teardown_admin_queue(struct nvme_rdma_ctrl *ctrl, 1010 bool remove) 1011 { 1012 mutex_lock(&ctrl->teardown_lock); 1013 blk_mq_quiesce_queue(ctrl->ctrl.admin_q); 1014 nvme_rdma_stop_queue(&ctrl->queues[0]); 1015 if (ctrl->ctrl.admin_tagset) { 1016 blk_mq_tagset_busy_iter(ctrl->ctrl.admin_tagset, 1017 nvme_cancel_request, &ctrl->ctrl); 1018 blk_mq_tagset_wait_completed_request(ctrl->ctrl.admin_tagset); 1019 } 1020 if (remove) 1021 blk_mq_unquiesce_queue(ctrl->ctrl.admin_q); 1022 nvme_rdma_destroy_admin_queue(ctrl, remove); 1023 mutex_unlock(&ctrl->teardown_lock); 1024 } 1025 1026 static void nvme_rdma_teardown_io_queues(struct nvme_rdma_ctrl *ctrl, 1027 bool remove) 1028 { 1029 mutex_lock(&ctrl->teardown_lock); 1030 if (ctrl->ctrl.queue_count > 1) { 1031 nvme_start_freeze(&ctrl->ctrl); 1032 nvme_stop_queues(&ctrl->ctrl); 1033 nvme_rdma_stop_io_queues(ctrl); 1034 if (ctrl->ctrl.tagset) { 1035 blk_mq_tagset_busy_iter(ctrl->ctrl.tagset, 1036 nvme_cancel_request, &ctrl->ctrl); 1037 blk_mq_tagset_wait_completed_request(ctrl->ctrl.tagset); 1038 } 1039 if (remove) 1040 nvme_start_queues(&ctrl->ctrl); 1041 nvme_rdma_destroy_io_queues(ctrl, remove); 1042 } 1043 mutex_unlock(&ctrl->teardown_lock); 1044 } 1045 1046 static void nvme_rdma_free_ctrl(struct nvme_ctrl *nctrl) 1047 { 1048 struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(nctrl); 1049 1050 if (list_empty(&ctrl->list)) 1051 goto free_ctrl; 1052 1053 mutex_lock(&nvme_rdma_ctrl_mutex); 1054 list_del(&ctrl->list); 1055 mutex_unlock(&nvme_rdma_ctrl_mutex); 1056 1057 nvmf_free_options(nctrl->opts); 1058 free_ctrl: 1059 kfree(ctrl->queues); 1060 kfree(ctrl); 1061 } 1062 1063 static void nvme_rdma_reconnect_or_remove(struct nvme_rdma_ctrl *ctrl) 1064 { 1065 /* If we are resetting/deleting then do nothing */ 1066 if (ctrl->ctrl.state != NVME_CTRL_CONNECTING) { 1067 WARN_ON_ONCE(ctrl->ctrl.state == NVME_CTRL_NEW || 1068 ctrl->ctrl.state == NVME_CTRL_LIVE); 1069 return; 1070 } 1071 1072 if (nvmf_should_reconnect(&ctrl->ctrl)) { 1073 dev_info(ctrl->ctrl.device, "Reconnecting in %d seconds...\n", 1074 ctrl->ctrl.opts->reconnect_delay); 1075 queue_delayed_work(nvme_wq, &ctrl->reconnect_work, 1076 ctrl->ctrl.opts->reconnect_delay * HZ); 1077 } else { 1078 nvme_delete_ctrl(&ctrl->ctrl); 1079 } 1080 } 1081 1082 static int nvme_rdma_setup_ctrl(struct nvme_rdma_ctrl *ctrl, bool new) 1083 { 1084 int ret = -EINVAL; 1085 bool changed; 1086 1087 ret = nvme_rdma_configure_admin_queue(ctrl, new); 1088 if (ret) 1089 return ret; 1090 1091 if (ctrl->ctrl.icdoff) { 1092 dev_err(ctrl->ctrl.device, "icdoff is not supported!\n"); 1093 goto destroy_admin; 1094 } 1095 1096 if (!(ctrl->ctrl.sgls & (1 << 2))) { 1097 dev_err(ctrl->ctrl.device, 1098 "Mandatory keyed sgls are not supported!\n"); 1099 goto destroy_admin; 1100 } 1101 1102 if (ctrl->ctrl.opts->queue_size > ctrl->ctrl.sqsize + 1) { 1103 dev_warn(ctrl->ctrl.device, 1104 "queue_size %zu > ctrl sqsize %u, clamping down\n", 1105 ctrl->ctrl.opts->queue_size, ctrl->ctrl.sqsize + 1); 1106 } 1107 1108 if (ctrl->ctrl.sqsize + 1 > ctrl->ctrl.maxcmd) { 1109 dev_warn(ctrl->ctrl.device, 1110 "sqsize %u > ctrl maxcmd %u, clamping down\n", 1111 ctrl->ctrl.sqsize + 1, ctrl->ctrl.maxcmd); 1112 ctrl->ctrl.sqsize = ctrl->ctrl.maxcmd - 1; 1113 } 1114 1115 if (ctrl->ctrl.sgls & (1 << 20)) 1116 ctrl->use_inline_data = true; 1117 1118 if (ctrl->ctrl.queue_count > 1) { 1119 ret = nvme_rdma_configure_io_queues(ctrl, new); 1120 if (ret) 1121 goto destroy_admin; 1122 } 1123 1124 changed = nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_LIVE); 1125 if (!changed) { 1126 /* 1127 * state change failure is ok if we started ctrl delete, 1128 * unless we're during creation of a new controller to 1129 * avoid races with teardown flow. 1130 */ 1131 WARN_ON_ONCE(ctrl->ctrl.state != NVME_CTRL_DELETING && 1132 ctrl->ctrl.state != NVME_CTRL_DELETING_NOIO); 1133 WARN_ON_ONCE(new); 1134 ret = -EINVAL; 1135 goto destroy_io; 1136 } 1137 1138 nvme_start_ctrl(&ctrl->ctrl); 1139 return 0; 1140 1141 destroy_io: 1142 if (ctrl->ctrl.queue_count > 1) 1143 nvme_rdma_destroy_io_queues(ctrl, new); 1144 destroy_admin: 1145 nvme_rdma_stop_queue(&ctrl->queues[0]); 1146 nvme_rdma_destroy_admin_queue(ctrl, new); 1147 return ret; 1148 } 1149 1150 static void nvme_rdma_reconnect_ctrl_work(struct work_struct *work) 1151 { 1152 struct nvme_rdma_ctrl *ctrl = container_of(to_delayed_work(work), 1153 struct nvme_rdma_ctrl, reconnect_work); 1154 1155 ++ctrl->ctrl.nr_reconnects; 1156 1157 if (nvme_rdma_setup_ctrl(ctrl, false)) 1158 goto requeue; 1159 1160 dev_info(ctrl->ctrl.device, "Successfully reconnected (%d attempts)\n", 1161 ctrl->ctrl.nr_reconnects); 1162 1163 ctrl->ctrl.nr_reconnects = 0; 1164 1165 return; 1166 1167 requeue: 1168 dev_info(ctrl->ctrl.device, "Failed reconnect attempt %d\n", 1169 ctrl->ctrl.nr_reconnects); 1170 nvme_rdma_reconnect_or_remove(ctrl); 1171 } 1172 1173 static void nvme_rdma_error_recovery_work(struct work_struct *work) 1174 { 1175 struct nvme_rdma_ctrl *ctrl = container_of(work, 1176 struct nvme_rdma_ctrl, err_work); 1177 1178 nvme_stop_keep_alive(&ctrl->ctrl); 1179 nvme_rdma_teardown_io_queues(ctrl, false); 1180 nvme_start_queues(&ctrl->ctrl); 1181 nvme_rdma_teardown_admin_queue(ctrl, false); 1182 blk_mq_unquiesce_queue(ctrl->ctrl.admin_q); 1183 1184 if (!nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_CONNECTING)) { 1185 /* state change failure is ok if we started ctrl delete */ 1186 WARN_ON_ONCE(ctrl->ctrl.state != NVME_CTRL_DELETING && 1187 ctrl->ctrl.state != NVME_CTRL_DELETING_NOIO); 1188 return; 1189 } 1190 1191 nvme_rdma_reconnect_or_remove(ctrl); 1192 } 1193 1194 static void nvme_rdma_error_recovery(struct nvme_rdma_ctrl *ctrl) 1195 { 1196 if (!nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_RESETTING)) 1197 return; 1198 1199 dev_warn(ctrl->ctrl.device, "starting error recovery\n"); 1200 queue_work(nvme_reset_wq, &ctrl->err_work); 1201 } 1202 1203 static void nvme_rdma_end_request(struct nvme_rdma_request *req) 1204 { 1205 struct request *rq = blk_mq_rq_from_pdu(req); 1206 1207 if (!refcount_dec_and_test(&req->ref)) 1208 return; 1209 if (!nvme_try_complete_req(rq, req->status, req->result)) 1210 nvme_rdma_complete_rq(rq); 1211 } 1212 1213 static void nvme_rdma_wr_error(struct ib_cq *cq, struct ib_wc *wc, 1214 const char *op) 1215 { 1216 struct nvme_rdma_queue *queue = wc->qp->qp_context; 1217 struct nvme_rdma_ctrl *ctrl = queue->ctrl; 1218 1219 if (ctrl->ctrl.state == NVME_CTRL_LIVE) 1220 dev_info(ctrl->ctrl.device, 1221 "%s for CQE 0x%p failed with status %s (%d)\n", 1222 op, wc->wr_cqe, 1223 ib_wc_status_msg(wc->status), wc->status); 1224 nvme_rdma_error_recovery(ctrl); 1225 } 1226 1227 static void nvme_rdma_memreg_done(struct ib_cq *cq, struct ib_wc *wc) 1228 { 1229 if (unlikely(wc->status != IB_WC_SUCCESS)) 1230 nvme_rdma_wr_error(cq, wc, "MEMREG"); 1231 } 1232 1233 static void nvme_rdma_inv_rkey_done(struct ib_cq *cq, struct ib_wc *wc) 1234 { 1235 struct nvme_rdma_request *req = 1236 container_of(wc->wr_cqe, struct nvme_rdma_request, reg_cqe); 1237 1238 if (unlikely(wc->status != IB_WC_SUCCESS)) 1239 nvme_rdma_wr_error(cq, wc, "LOCAL_INV"); 1240 else 1241 nvme_rdma_end_request(req); 1242 } 1243 1244 static int nvme_rdma_inv_rkey(struct nvme_rdma_queue *queue, 1245 struct nvme_rdma_request *req) 1246 { 1247 struct ib_send_wr wr = { 1248 .opcode = IB_WR_LOCAL_INV, 1249 .next = NULL, 1250 .num_sge = 0, 1251 .send_flags = IB_SEND_SIGNALED, 1252 .ex.invalidate_rkey = req->mr->rkey, 1253 }; 1254 1255 req->reg_cqe.done = nvme_rdma_inv_rkey_done; 1256 wr.wr_cqe = &req->reg_cqe; 1257 1258 return ib_post_send(queue->qp, &wr, NULL); 1259 } 1260 1261 static void nvme_rdma_unmap_data(struct nvme_rdma_queue *queue, 1262 struct request *rq) 1263 { 1264 struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); 1265 struct nvme_rdma_device *dev = queue->device; 1266 struct ib_device *ibdev = dev->dev; 1267 struct list_head *pool = &queue->qp->rdma_mrs; 1268 1269 if (!blk_rq_nr_phys_segments(rq)) 1270 return; 1271 1272 if (blk_integrity_rq(rq)) { 1273 ib_dma_unmap_sg(ibdev, req->metadata_sgl->sg_table.sgl, 1274 req->metadata_sgl->nents, rq_dma_dir(rq)); 1275 sg_free_table_chained(&req->metadata_sgl->sg_table, 1276 NVME_INLINE_METADATA_SG_CNT); 1277 } 1278 1279 if (req->use_sig_mr) 1280 pool = &queue->qp->sig_mrs; 1281 1282 if (req->mr) { 1283 ib_mr_pool_put(queue->qp, pool, req->mr); 1284 req->mr = NULL; 1285 } 1286 1287 ib_dma_unmap_sg(ibdev, req->data_sgl.sg_table.sgl, req->data_sgl.nents, 1288 rq_dma_dir(rq)); 1289 sg_free_table_chained(&req->data_sgl.sg_table, NVME_INLINE_SG_CNT); 1290 } 1291 1292 static int nvme_rdma_set_sg_null(struct nvme_command *c) 1293 { 1294 struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl; 1295 1296 sg->addr = 0; 1297 put_unaligned_le24(0, sg->length); 1298 put_unaligned_le32(0, sg->key); 1299 sg->type = NVME_KEY_SGL_FMT_DATA_DESC << 4; 1300 return 0; 1301 } 1302 1303 static int nvme_rdma_map_sg_inline(struct nvme_rdma_queue *queue, 1304 struct nvme_rdma_request *req, struct nvme_command *c, 1305 int count) 1306 { 1307 struct nvme_sgl_desc *sg = &c->common.dptr.sgl; 1308 struct scatterlist *sgl = req->data_sgl.sg_table.sgl; 1309 struct ib_sge *sge = &req->sge[1]; 1310 u32 len = 0; 1311 int i; 1312 1313 for (i = 0; i < count; i++, sgl++, sge++) { 1314 sge->addr = sg_dma_address(sgl); 1315 sge->length = sg_dma_len(sgl); 1316 sge->lkey = queue->device->pd->local_dma_lkey; 1317 len += sge->length; 1318 } 1319 1320 sg->addr = cpu_to_le64(queue->ctrl->ctrl.icdoff); 1321 sg->length = cpu_to_le32(len); 1322 sg->type = (NVME_SGL_FMT_DATA_DESC << 4) | NVME_SGL_FMT_OFFSET; 1323 1324 req->num_sge += count; 1325 return 0; 1326 } 1327 1328 static int nvme_rdma_map_sg_single(struct nvme_rdma_queue *queue, 1329 struct nvme_rdma_request *req, struct nvme_command *c) 1330 { 1331 struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl; 1332 1333 sg->addr = cpu_to_le64(sg_dma_address(req->data_sgl.sg_table.sgl)); 1334 put_unaligned_le24(sg_dma_len(req->data_sgl.sg_table.sgl), sg->length); 1335 put_unaligned_le32(queue->device->pd->unsafe_global_rkey, sg->key); 1336 sg->type = NVME_KEY_SGL_FMT_DATA_DESC << 4; 1337 return 0; 1338 } 1339 1340 static int nvme_rdma_map_sg_fr(struct nvme_rdma_queue *queue, 1341 struct nvme_rdma_request *req, struct nvme_command *c, 1342 int count) 1343 { 1344 struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl; 1345 int nr; 1346 1347 req->mr = ib_mr_pool_get(queue->qp, &queue->qp->rdma_mrs); 1348 if (WARN_ON_ONCE(!req->mr)) 1349 return -EAGAIN; 1350 1351 /* 1352 * Align the MR to a 4K page size to match the ctrl page size and 1353 * the block virtual boundary. 1354 */ 1355 nr = ib_map_mr_sg(req->mr, req->data_sgl.sg_table.sgl, count, NULL, 1356 SZ_4K); 1357 if (unlikely(nr < count)) { 1358 ib_mr_pool_put(queue->qp, &queue->qp->rdma_mrs, req->mr); 1359 req->mr = NULL; 1360 if (nr < 0) 1361 return nr; 1362 return -EINVAL; 1363 } 1364 1365 ib_update_fast_reg_key(req->mr, ib_inc_rkey(req->mr->rkey)); 1366 1367 req->reg_cqe.done = nvme_rdma_memreg_done; 1368 memset(&req->reg_wr, 0, sizeof(req->reg_wr)); 1369 req->reg_wr.wr.opcode = IB_WR_REG_MR; 1370 req->reg_wr.wr.wr_cqe = &req->reg_cqe; 1371 req->reg_wr.wr.num_sge = 0; 1372 req->reg_wr.mr = req->mr; 1373 req->reg_wr.key = req->mr->rkey; 1374 req->reg_wr.access = IB_ACCESS_LOCAL_WRITE | 1375 IB_ACCESS_REMOTE_READ | 1376 IB_ACCESS_REMOTE_WRITE; 1377 1378 sg->addr = cpu_to_le64(req->mr->iova); 1379 put_unaligned_le24(req->mr->length, sg->length); 1380 put_unaligned_le32(req->mr->rkey, sg->key); 1381 sg->type = (NVME_KEY_SGL_FMT_DATA_DESC << 4) | 1382 NVME_SGL_FMT_INVALIDATE; 1383 1384 return 0; 1385 } 1386 1387 static void nvme_rdma_set_sig_domain(struct blk_integrity *bi, 1388 struct nvme_command *cmd, struct ib_sig_domain *domain, 1389 u16 control, u8 pi_type) 1390 { 1391 domain->sig_type = IB_SIG_TYPE_T10_DIF; 1392 domain->sig.dif.bg_type = IB_T10DIF_CRC; 1393 domain->sig.dif.pi_interval = 1 << bi->interval_exp; 1394 domain->sig.dif.ref_tag = le32_to_cpu(cmd->rw.reftag); 1395 if (control & NVME_RW_PRINFO_PRCHK_REF) 1396 domain->sig.dif.ref_remap = true; 1397 1398 domain->sig.dif.app_tag = le16_to_cpu(cmd->rw.apptag); 1399 domain->sig.dif.apptag_check_mask = le16_to_cpu(cmd->rw.appmask); 1400 domain->sig.dif.app_escape = true; 1401 if (pi_type == NVME_NS_DPS_PI_TYPE3) 1402 domain->sig.dif.ref_escape = true; 1403 } 1404 1405 static void nvme_rdma_set_sig_attrs(struct blk_integrity *bi, 1406 struct nvme_command *cmd, struct ib_sig_attrs *sig_attrs, 1407 u8 pi_type) 1408 { 1409 u16 control = le16_to_cpu(cmd->rw.control); 1410 1411 memset(sig_attrs, 0, sizeof(*sig_attrs)); 1412 if (control & NVME_RW_PRINFO_PRACT) { 1413 /* for WRITE_INSERT/READ_STRIP no memory domain */ 1414 sig_attrs->mem.sig_type = IB_SIG_TYPE_NONE; 1415 nvme_rdma_set_sig_domain(bi, cmd, &sig_attrs->wire, control, 1416 pi_type); 1417 /* Clear the PRACT bit since HCA will generate/verify the PI */ 1418 control &= ~NVME_RW_PRINFO_PRACT; 1419 cmd->rw.control = cpu_to_le16(control); 1420 } else { 1421 /* for WRITE_PASS/READ_PASS both wire/memory domains exist */ 1422 nvme_rdma_set_sig_domain(bi, cmd, &sig_attrs->wire, control, 1423 pi_type); 1424 nvme_rdma_set_sig_domain(bi, cmd, &sig_attrs->mem, control, 1425 pi_type); 1426 } 1427 } 1428 1429 static void nvme_rdma_set_prot_checks(struct nvme_command *cmd, u8 *mask) 1430 { 1431 *mask = 0; 1432 if (le16_to_cpu(cmd->rw.control) & NVME_RW_PRINFO_PRCHK_REF) 1433 *mask |= IB_SIG_CHECK_REFTAG; 1434 if (le16_to_cpu(cmd->rw.control) & NVME_RW_PRINFO_PRCHK_GUARD) 1435 *mask |= IB_SIG_CHECK_GUARD; 1436 } 1437 1438 static void nvme_rdma_sig_done(struct ib_cq *cq, struct ib_wc *wc) 1439 { 1440 if (unlikely(wc->status != IB_WC_SUCCESS)) 1441 nvme_rdma_wr_error(cq, wc, "SIG"); 1442 } 1443 1444 static int nvme_rdma_map_sg_pi(struct nvme_rdma_queue *queue, 1445 struct nvme_rdma_request *req, struct nvme_command *c, 1446 int count, int pi_count) 1447 { 1448 struct nvme_rdma_sgl *sgl = &req->data_sgl; 1449 struct ib_reg_wr *wr = &req->reg_wr; 1450 struct request *rq = blk_mq_rq_from_pdu(req); 1451 struct nvme_ns *ns = rq->q->queuedata; 1452 struct bio *bio = rq->bio; 1453 struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl; 1454 int nr; 1455 1456 req->mr = ib_mr_pool_get(queue->qp, &queue->qp->sig_mrs); 1457 if (WARN_ON_ONCE(!req->mr)) 1458 return -EAGAIN; 1459 1460 nr = ib_map_mr_sg_pi(req->mr, sgl->sg_table.sgl, count, NULL, 1461 req->metadata_sgl->sg_table.sgl, pi_count, NULL, 1462 SZ_4K); 1463 if (unlikely(nr)) 1464 goto mr_put; 1465 1466 nvme_rdma_set_sig_attrs(blk_get_integrity(bio->bi_disk), c, 1467 req->mr->sig_attrs, ns->pi_type); 1468 nvme_rdma_set_prot_checks(c, &req->mr->sig_attrs->check_mask); 1469 1470 ib_update_fast_reg_key(req->mr, ib_inc_rkey(req->mr->rkey)); 1471 1472 req->reg_cqe.done = nvme_rdma_sig_done; 1473 memset(wr, 0, sizeof(*wr)); 1474 wr->wr.opcode = IB_WR_REG_MR_INTEGRITY; 1475 wr->wr.wr_cqe = &req->reg_cqe; 1476 wr->wr.num_sge = 0; 1477 wr->wr.send_flags = 0; 1478 wr->mr = req->mr; 1479 wr->key = req->mr->rkey; 1480 wr->access = IB_ACCESS_LOCAL_WRITE | 1481 IB_ACCESS_REMOTE_READ | 1482 IB_ACCESS_REMOTE_WRITE; 1483 1484 sg->addr = cpu_to_le64(req->mr->iova); 1485 put_unaligned_le24(req->mr->length, sg->length); 1486 put_unaligned_le32(req->mr->rkey, sg->key); 1487 sg->type = NVME_KEY_SGL_FMT_DATA_DESC << 4; 1488 1489 return 0; 1490 1491 mr_put: 1492 ib_mr_pool_put(queue->qp, &queue->qp->sig_mrs, req->mr); 1493 req->mr = NULL; 1494 if (nr < 0) 1495 return nr; 1496 return -EINVAL; 1497 } 1498 1499 static int nvme_rdma_map_data(struct nvme_rdma_queue *queue, 1500 struct request *rq, struct nvme_command *c) 1501 { 1502 struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); 1503 struct nvme_rdma_device *dev = queue->device; 1504 struct ib_device *ibdev = dev->dev; 1505 int pi_count = 0; 1506 int count, ret; 1507 1508 req->num_sge = 1; 1509 refcount_set(&req->ref, 2); /* send and recv completions */ 1510 1511 c->common.flags |= NVME_CMD_SGL_METABUF; 1512 1513 if (!blk_rq_nr_phys_segments(rq)) 1514 return nvme_rdma_set_sg_null(c); 1515 1516 req->data_sgl.sg_table.sgl = (struct scatterlist *)(req + 1); 1517 ret = sg_alloc_table_chained(&req->data_sgl.sg_table, 1518 blk_rq_nr_phys_segments(rq), req->data_sgl.sg_table.sgl, 1519 NVME_INLINE_SG_CNT); 1520 if (ret) 1521 return -ENOMEM; 1522 1523 req->data_sgl.nents = blk_rq_map_sg(rq->q, rq, 1524 req->data_sgl.sg_table.sgl); 1525 1526 count = ib_dma_map_sg(ibdev, req->data_sgl.sg_table.sgl, 1527 req->data_sgl.nents, rq_dma_dir(rq)); 1528 if (unlikely(count <= 0)) { 1529 ret = -EIO; 1530 goto out_free_table; 1531 } 1532 1533 if (blk_integrity_rq(rq)) { 1534 req->metadata_sgl->sg_table.sgl = 1535 (struct scatterlist *)(req->metadata_sgl + 1); 1536 ret = sg_alloc_table_chained(&req->metadata_sgl->sg_table, 1537 blk_rq_count_integrity_sg(rq->q, rq->bio), 1538 req->metadata_sgl->sg_table.sgl, 1539 NVME_INLINE_METADATA_SG_CNT); 1540 if (unlikely(ret)) { 1541 ret = -ENOMEM; 1542 goto out_unmap_sg; 1543 } 1544 1545 req->metadata_sgl->nents = blk_rq_map_integrity_sg(rq->q, 1546 rq->bio, req->metadata_sgl->sg_table.sgl); 1547 pi_count = ib_dma_map_sg(ibdev, 1548 req->metadata_sgl->sg_table.sgl, 1549 req->metadata_sgl->nents, 1550 rq_dma_dir(rq)); 1551 if (unlikely(pi_count <= 0)) { 1552 ret = -EIO; 1553 goto out_free_pi_table; 1554 } 1555 } 1556 1557 if (req->use_sig_mr) { 1558 ret = nvme_rdma_map_sg_pi(queue, req, c, count, pi_count); 1559 goto out; 1560 } 1561 1562 if (count <= dev->num_inline_segments) { 1563 if (rq_data_dir(rq) == WRITE && nvme_rdma_queue_idx(queue) && 1564 queue->ctrl->use_inline_data && 1565 blk_rq_payload_bytes(rq) <= 1566 nvme_rdma_inline_data_size(queue)) { 1567 ret = nvme_rdma_map_sg_inline(queue, req, c, count); 1568 goto out; 1569 } 1570 1571 if (count == 1 && dev->pd->flags & IB_PD_UNSAFE_GLOBAL_RKEY) { 1572 ret = nvme_rdma_map_sg_single(queue, req, c); 1573 goto out; 1574 } 1575 } 1576 1577 ret = nvme_rdma_map_sg_fr(queue, req, c, count); 1578 out: 1579 if (unlikely(ret)) 1580 goto out_unmap_pi_sg; 1581 1582 return 0; 1583 1584 out_unmap_pi_sg: 1585 if (blk_integrity_rq(rq)) 1586 ib_dma_unmap_sg(ibdev, req->metadata_sgl->sg_table.sgl, 1587 req->metadata_sgl->nents, rq_dma_dir(rq)); 1588 out_free_pi_table: 1589 if (blk_integrity_rq(rq)) 1590 sg_free_table_chained(&req->metadata_sgl->sg_table, 1591 NVME_INLINE_METADATA_SG_CNT); 1592 out_unmap_sg: 1593 ib_dma_unmap_sg(ibdev, req->data_sgl.sg_table.sgl, req->data_sgl.nents, 1594 rq_dma_dir(rq)); 1595 out_free_table: 1596 sg_free_table_chained(&req->data_sgl.sg_table, NVME_INLINE_SG_CNT); 1597 return ret; 1598 } 1599 1600 static void nvme_rdma_send_done(struct ib_cq *cq, struct ib_wc *wc) 1601 { 1602 struct nvme_rdma_qe *qe = 1603 container_of(wc->wr_cqe, struct nvme_rdma_qe, cqe); 1604 struct nvme_rdma_request *req = 1605 container_of(qe, struct nvme_rdma_request, sqe); 1606 1607 if (unlikely(wc->status != IB_WC_SUCCESS)) 1608 nvme_rdma_wr_error(cq, wc, "SEND"); 1609 else 1610 nvme_rdma_end_request(req); 1611 } 1612 1613 static int nvme_rdma_post_send(struct nvme_rdma_queue *queue, 1614 struct nvme_rdma_qe *qe, struct ib_sge *sge, u32 num_sge, 1615 struct ib_send_wr *first) 1616 { 1617 struct ib_send_wr wr; 1618 int ret; 1619 1620 sge->addr = qe->dma; 1621 sge->length = sizeof(struct nvme_command); 1622 sge->lkey = queue->device->pd->local_dma_lkey; 1623 1624 wr.next = NULL; 1625 wr.wr_cqe = &qe->cqe; 1626 wr.sg_list = sge; 1627 wr.num_sge = num_sge; 1628 wr.opcode = IB_WR_SEND; 1629 wr.send_flags = IB_SEND_SIGNALED; 1630 1631 if (first) 1632 first->next = ≀ 1633 else 1634 first = ≀ 1635 1636 ret = ib_post_send(queue->qp, first, NULL); 1637 if (unlikely(ret)) { 1638 dev_err(queue->ctrl->ctrl.device, 1639 "%s failed with error code %d\n", __func__, ret); 1640 } 1641 return ret; 1642 } 1643 1644 static int nvme_rdma_post_recv(struct nvme_rdma_queue *queue, 1645 struct nvme_rdma_qe *qe) 1646 { 1647 struct ib_recv_wr wr; 1648 struct ib_sge list; 1649 int ret; 1650 1651 list.addr = qe->dma; 1652 list.length = sizeof(struct nvme_completion); 1653 list.lkey = queue->device->pd->local_dma_lkey; 1654 1655 qe->cqe.done = nvme_rdma_recv_done; 1656 1657 wr.next = NULL; 1658 wr.wr_cqe = &qe->cqe; 1659 wr.sg_list = &list; 1660 wr.num_sge = 1; 1661 1662 ret = ib_post_recv(queue->qp, &wr, NULL); 1663 if (unlikely(ret)) { 1664 dev_err(queue->ctrl->ctrl.device, 1665 "%s failed with error code %d\n", __func__, ret); 1666 } 1667 return ret; 1668 } 1669 1670 static struct blk_mq_tags *nvme_rdma_tagset(struct nvme_rdma_queue *queue) 1671 { 1672 u32 queue_idx = nvme_rdma_queue_idx(queue); 1673 1674 if (queue_idx == 0) 1675 return queue->ctrl->admin_tag_set.tags[queue_idx]; 1676 return queue->ctrl->tag_set.tags[queue_idx - 1]; 1677 } 1678 1679 static void nvme_rdma_async_done(struct ib_cq *cq, struct ib_wc *wc) 1680 { 1681 if (unlikely(wc->status != IB_WC_SUCCESS)) 1682 nvme_rdma_wr_error(cq, wc, "ASYNC"); 1683 } 1684 1685 static void nvme_rdma_submit_async_event(struct nvme_ctrl *arg) 1686 { 1687 struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(arg); 1688 struct nvme_rdma_queue *queue = &ctrl->queues[0]; 1689 struct ib_device *dev = queue->device->dev; 1690 struct nvme_rdma_qe *sqe = &ctrl->async_event_sqe; 1691 struct nvme_command *cmd = sqe->data; 1692 struct ib_sge sge; 1693 int ret; 1694 1695 ib_dma_sync_single_for_cpu(dev, sqe->dma, sizeof(*cmd), DMA_TO_DEVICE); 1696 1697 memset(cmd, 0, sizeof(*cmd)); 1698 cmd->common.opcode = nvme_admin_async_event; 1699 cmd->common.command_id = NVME_AQ_BLK_MQ_DEPTH; 1700 cmd->common.flags |= NVME_CMD_SGL_METABUF; 1701 nvme_rdma_set_sg_null(cmd); 1702 1703 sqe->cqe.done = nvme_rdma_async_done; 1704 1705 ib_dma_sync_single_for_device(dev, sqe->dma, sizeof(*cmd), 1706 DMA_TO_DEVICE); 1707 1708 ret = nvme_rdma_post_send(queue, sqe, &sge, 1, NULL); 1709 WARN_ON_ONCE(ret); 1710 } 1711 1712 static void nvme_rdma_process_nvme_rsp(struct nvme_rdma_queue *queue, 1713 struct nvme_completion *cqe, struct ib_wc *wc) 1714 { 1715 struct request *rq; 1716 struct nvme_rdma_request *req; 1717 1718 rq = blk_mq_tag_to_rq(nvme_rdma_tagset(queue), cqe->command_id); 1719 if (!rq) { 1720 dev_err(queue->ctrl->ctrl.device, 1721 "tag 0x%x on QP %#x not found\n", 1722 cqe->command_id, queue->qp->qp_num); 1723 nvme_rdma_error_recovery(queue->ctrl); 1724 return; 1725 } 1726 req = blk_mq_rq_to_pdu(rq); 1727 1728 req->status = cqe->status; 1729 req->result = cqe->result; 1730 1731 if (wc->wc_flags & IB_WC_WITH_INVALIDATE) { 1732 if (unlikely(wc->ex.invalidate_rkey != req->mr->rkey)) { 1733 dev_err(queue->ctrl->ctrl.device, 1734 "Bogus remote invalidation for rkey %#x\n", 1735 req->mr->rkey); 1736 nvme_rdma_error_recovery(queue->ctrl); 1737 } 1738 } else if (req->mr) { 1739 int ret; 1740 1741 ret = nvme_rdma_inv_rkey(queue, req); 1742 if (unlikely(ret < 0)) { 1743 dev_err(queue->ctrl->ctrl.device, 1744 "Queueing INV WR for rkey %#x failed (%d)\n", 1745 req->mr->rkey, ret); 1746 nvme_rdma_error_recovery(queue->ctrl); 1747 } 1748 /* the local invalidation completion will end the request */ 1749 return; 1750 } 1751 1752 nvme_rdma_end_request(req); 1753 } 1754 1755 static void nvme_rdma_recv_done(struct ib_cq *cq, struct ib_wc *wc) 1756 { 1757 struct nvme_rdma_qe *qe = 1758 container_of(wc->wr_cqe, struct nvme_rdma_qe, cqe); 1759 struct nvme_rdma_queue *queue = wc->qp->qp_context; 1760 struct ib_device *ibdev = queue->device->dev; 1761 struct nvme_completion *cqe = qe->data; 1762 const size_t len = sizeof(struct nvme_completion); 1763 1764 if (unlikely(wc->status != IB_WC_SUCCESS)) { 1765 nvme_rdma_wr_error(cq, wc, "RECV"); 1766 return; 1767 } 1768 1769 ib_dma_sync_single_for_cpu(ibdev, qe->dma, len, DMA_FROM_DEVICE); 1770 /* 1771 * AEN requests are special as they don't time out and can 1772 * survive any kind of queue freeze and often don't respond to 1773 * aborts. We don't even bother to allocate a struct request 1774 * for them but rather special case them here. 1775 */ 1776 if (unlikely(nvme_is_aen_req(nvme_rdma_queue_idx(queue), 1777 cqe->command_id))) 1778 nvme_complete_async_event(&queue->ctrl->ctrl, cqe->status, 1779 &cqe->result); 1780 else 1781 nvme_rdma_process_nvme_rsp(queue, cqe, wc); 1782 ib_dma_sync_single_for_device(ibdev, qe->dma, len, DMA_FROM_DEVICE); 1783 1784 nvme_rdma_post_recv(queue, qe); 1785 } 1786 1787 static int nvme_rdma_conn_established(struct nvme_rdma_queue *queue) 1788 { 1789 int ret, i; 1790 1791 for (i = 0; i < queue->queue_size; i++) { 1792 ret = nvme_rdma_post_recv(queue, &queue->rsp_ring[i]); 1793 if (ret) 1794 goto out_destroy_queue_ib; 1795 } 1796 1797 return 0; 1798 1799 out_destroy_queue_ib: 1800 nvme_rdma_destroy_queue_ib(queue); 1801 return ret; 1802 } 1803 1804 static int nvme_rdma_conn_rejected(struct nvme_rdma_queue *queue, 1805 struct rdma_cm_event *ev) 1806 { 1807 struct rdma_cm_id *cm_id = queue->cm_id; 1808 int status = ev->status; 1809 const char *rej_msg; 1810 const struct nvme_rdma_cm_rej *rej_data; 1811 u8 rej_data_len; 1812 1813 rej_msg = rdma_reject_msg(cm_id, status); 1814 rej_data = rdma_consumer_reject_data(cm_id, ev, &rej_data_len); 1815 1816 if (rej_data && rej_data_len >= sizeof(u16)) { 1817 u16 sts = le16_to_cpu(rej_data->sts); 1818 1819 dev_err(queue->ctrl->ctrl.device, 1820 "Connect rejected: status %d (%s) nvme status %d (%s).\n", 1821 status, rej_msg, sts, nvme_rdma_cm_msg(sts)); 1822 } else { 1823 dev_err(queue->ctrl->ctrl.device, 1824 "Connect rejected: status %d (%s).\n", status, rej_msg); 1825 } 1826 1827 return -ECONNRESET; 1828 } 1829 1830 static int nvme_rdma_addr_resolved(struct nvme_rdma_queue *queue) 1831 { 1832 struct nvme_ctrl *ctrl = &queue->ctrl->ctrl; 1833 int ret; 1834 1835 ret = nvme_rdma_create_queue_ib(queue); 1836 if (ret) 1837 return ret; 1838 1839 if (ctrl->opts->tos >= 0) 1840 rdma_set_service_type(queue->cm_id, ctrl->opts->tos); 1841 ret = rdma_resolve_route(queue->cm_id, NVME_RDMA_CONNECT_TIMEOUT_MS); 1842 if (ret) { 1843 dev_err(ctrl->device, "rdma_resolve_route failed (%d).\n", 1844 queue->cm_error); 1845 goto out_destroy_queue; 1846 } 1847 1848 return 0; 1849 1850 out_destroy_queue: 1851 nvme_rdma_destroy_queue_ib(queue); 1852 return ret; 1853 } 1854 1855 static int nvme_rdma_route_resolved(struct nvme_rdma_queue *queue) 1856 { 1857 struct nvme_rdma_ctrl *ctrl = queue->ctrl; 1858 struct rdma_conn_param param = { }; 1859 struct nvme_rdma_cm_req priv = { }; 1860 int ret; 1861 1862 param.qp_num = queue->qp->qp_num; 1863 param.flow_control = 1; 1864 1865 param.responder_resources = queue->device->dev->attrs.max_qp_rd_atom; 1866 /* maximum retry count */ 1867 param.retry_count = 7; 1868 param.rnr_retry_count = 7; 1869 param.private_data = &priv; 1870 param.private_data_len = sizeof(priv); 1871 1872 priv.recfmt = cpu_to_le16(NVME_RDMA_CM_FMT_1_0); 1873 priv.qid = cpu_to_le16(nvme_rdma_queue_idx(queue)); 1874 /* 1875 * set the admin queue depth to the minimum size 1876 * specified by the Fabrics standard. 1877 */ 1878 if (priv.qid == 0) { 1879 priv.hrqsize = cpu_to_le16(NVME_AQ_DEPTH); 1880 priv.hsqsize = cpu_to_le16(NVME_AQ_DEPTH - 1); 1881 } else { 1882 /* 1883 * current interpretation of the fabrics spec 1884 * is at minimum you make hrqsize sqsize+1, or a 1885 * 1's based representation of sqsize. 1886 */ 1887 priv.hrqsize = cpu_to_le16(queue->queue_size); 1888 priv.hsqsize = cpu_to_le16(queue->ctrl->ctrl.sqsize); 1889 } 1890 1891 ret = rdma_connect(queue->cm_id, ¶m); 1892 if (ret) { 1893 dev_err(ctrl->ctrl.device, 1894 "rdma_connect failed (%d).\n", ret); 1895 goto out_destroy_queue_ib; 1896 } 1897 1898 return 0; 1899 1900 out_destroy_queue_ib: 1901 nvme_rdma_destroy_queue_ib(queue); 1902 return ret; 1903 } 1904 1905 static int nvme_rdma_cm_handler(struct rdma_cm_id *cm_id, 1906 struct rdma_cm_event *ev) 1907 { 1908 struct nvme_rdma_queue *queue = cm_id->context; 1909 int cm_error = 0; 1910 1911 dev_dbg(queue->ctrl->ctrl.device, "%s (%d): status %d id %p\n", 1912 rdma_event_msg(ev->event), ev->event, 1913 ev->status, cm_id); 1914 1915 switch (ev->event) { 1916 case RDMA_CM_EVENT_ADDR_RESOLVED: 1917 cm_error = nvme_rdma_addr_resolved(queue); 1918 break; 1919 case RDMA_CM_EVENT_ROUTE_RESOLVED: 1920 cm_error = nvme_rdma_route_resolved(queue); 1921 break; 1922 case RDMA_CM_EVENT_ESTABLISHED: 1923 queue->cm_error = nvme_rdma_conn_established(queue); 1924 /* complete cm_done regardless of success/failure */ 1925 complete(&queue->cm_done); 1926 return 0; 1927 case RDMA_CM_EVENT_REJECTED: 1928 nvme_rdma_destroy_queue_ib(queue); 1929 cm_error = nvme_rdma_conn_rejected(queue, ev); 1930 break; 1931 case RDMA_CM_EVENT_ROUTE_ERROR: 1932 case RDMA_CM_EVENT_CONNECT_ERROR: 1933 case RDMA_CM_EVENT_UNREACHABLE: 1934 nvme_rdma_destroy_queue_ib(queue); 1935 fallthrough; 1936 case RDMA_CM_EVENT_ADDR_ERROR: 1937 dev_dbg(queue->ctrl->ctrl.device, 1938 "CM error event %d\n", ev->event); 1939 cm_error = -ECONNRESET; 1940 break; 1941 case RDMA_CM_EVENT_DISCONNECTED: 1942 case RDMA_CM_EVENT_ADDR_CHANGE: 1943 case RDMA_CM_EVENT_TIMEWAIT_EXIT: 1944 dev_dbg(queue->ctrl->ctrl.device, 1945 "disconnect received - connection closed\n"); 1946 nvme_rdma_error_recovery(queue->ctrl); 1947 break; 1948 case RDMA_CM_EVENT_DEVICE_REMOVAL: 1949 /* device removal is handled via the ib_client API */ 1950 break; 1951 default: 1952 dev_err(queue->ctrl->ctrl.device, 1953 "Unexpected RDMA CM event (%d)\n", ev->event); 1954 nvme_rdma_error_recovery(queue->ctrl); 1955 break; 1956 } 1957 1958 if (cm_error) { 1959 queue->cm_error = cm_error; 1960 complete(&queue->cm_done); 1961 } 1962 1963 return 0; 1964 } 1965 1966 static void nvme_rdma_complete_timed_out(struct request *rq) 1967 { 1968 struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); 1969 struct nvme_rdma_queue *queue = req->queue; 1970 struct nvme_rdma_ctrl *ctrl = queue->ctrl; 1971 1972 /* fence other contexts that may complete the command */ 1973 mutex_lock(&ctrl->teardown_lock); 1974 nvme_rdma_stop_queue(queue); 1975 if (!blk_mq_request_completed(rq)) { 1976 nvme_req(rq)->status = NVME_SC_HOST_ABORTED_CMD; 1977 blk_mq_complete_request(rq); 1978 } 1979 mutex_unlock(&ctrl->teardown_lock); 1980 } 1981 1982 static enum blk_eh_timer_return 1983 nvme_rdma_timeout(struct request *rq, bool reserved) 1984 { 1985 struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); 1986 struct nvme_rdma_queue *queue = req->queue; 1987 struct nvme_rdma_ctrl *ctrl = queue->ctrl; 1988 1989 dev_warn(ctrl->ctrl.device, "I/O %d QID %d timeout\n", 1990 rq->tag, nvme_rdma_queue_idx(queue)); 1991 1992 if (ctrl->ctrl.state != NVME_CTRL_LIVE) { 1993 /* 1994 * If we are resetting, connecting or deleting we should 1995 * complete immediately because we may block controller 1996 * teardown or setup sequence 1997 * - ctrl disable/shutdown fabrics requests 1998 * - connect requests 1999 * - initialization admin requests 2000 * - I/O requests that entered after unquiescing and 2001 * the controller stopped responding 2002 * 2003 * All other requests should be cancelled by the error 2004 * recovery work, so it's fine that we fail it here. 2005 */ 2006 nvme_rdma_complete_timed_out(rq); 2007 return BLK_EH_DONE; 2008 } 2009 2010 /* 2011 * LIVE state should trigger the normal error recovery which will 2012 * handle completing this request. 2013 */ 2014 nvme_rdma_error_recovery(ctrl); 2015 return BLK_EH_RESET_TIMER; 2016 } 2017 2018 static blk_status_t nvme_rdma_queue_rq(struct blk_mq_hw_ctx *hctx, 2019 const struct blk_mq_queue_data *bd) 2020 { 2021 struct nvme_ns *ns = hctx->queue->queuedata; 2022 struct nvme_rdma_queue *queue = hctx->driver_data; 2023 struct request *rq = bd->rq; 2024 struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); 2025 struct nvme_rdma_qe *sqe = &req->sqe; 2026 struct nvme_command *c = sqe->data; 2027 struct ib_device *dev; 2028 bool queue_ready = test_bit(NVME_RDMA_Q_LIVE, &queue->flags); 2029 blk_status_t ret; 2030 int err; 2031 2032 WARN_ON_ONCE(rq->tag < 0); 2033 2034 if (!nvmf_check_ready(&queue->ctrl->ctrl, rq, queue_ready)) 2035 return nvmf_fail_nonready_command(&queue->ctrl->ctrl, rq); 2036 2037 dev = queue->device->dev; 2038 2039 req->sqe.dma = ib_dma_map_single(dev, req->sqe.data, 2040 sizeof(struct nvme_command), 2041 DMA_TO_DEVICE); 2042 err = ib_dma_mapping_error(dev, req->sqe.dma); 2043 if (unlikely(err)) 2044 return BLK_STS_RESOURCE; 2045 2046 ib_dma_sync_single_for_cpu(dev, sqe->dma, 2047 sizeof(struct nvme_command), DMA_TO_DEVICE); 2048 2049 ret = nvme_setup_cmd(ns, rq, c); 2050 if (ret) 2051 goto unmap_qe; 2052 2053 blk_mq_start_request(rq); 2054 2055 if (IS_ENABLED(CONFIG_BLK_DEV_INTEGRITY) && 2056 queue->pi_support && 2057 (c->common.opcode == nvme_cmd_write || 2058 c->common.opcode == nvme_cmd_read) && 2059 nvme_ns_has_pi(ns)) 2060 req->use_sig_mr = true; 2061 else 2062 req->use_sig_mr = false; 2063 2064 err = nvme_rdma_map_data(queue, rq, c); 2065 if (unlikely(err < 0)) { 2066 dev_err(queue->ctrl->ctrl.device, 2067 "Failed to map data (%d)\n", err); 2068 goto err; 2069 } 2070 2071 sqe->cqe.done = nvme_rdma_send_done; 2072 2073 ib_dma_sync_single_for_device(dev, sqe->dma, 2074 sizeof(struct nvme_command), DMA_TO_DEVICE); 2075 2076 err = nvme_rdma_post_send(queue, sqe, req->sge, req->num_sge, 2077 req->mr ? &req->reg_wr.wr : NULL); 2078 if (unlikely(err)) 2079 goto err_unmap; 2080 2081 return BLK_STS_OK; 2082 2083 err_unmap: 2084 nvme_rdma_unmap_data(queue, rq); 2085 err: 2086 if (err == -ENOMEM || err == -EAGAIN) 2087 ret = BLK_STS_RESOURCE; 2088 else 2089 ret = BLK_STS_IOERR; 2090 nvme_cleanup_cmd(rq); 2091 unmap_qe: 2092 ib_dma_unmap_single(dev, req->sqe.dma, sizeof(struct nvme_command), 2093 DMA_TO_DEVICE); 2094 return ret; 2095 } 2096 2097 static int nvme_rdma_poll(struct blk_mq_hw_ctx *hctx) 2098 { 2099 struct nvme_rdma_queue *queue = hctx->driver_data; 2100 2101 return ib_process_cq_direct(queue->ib_cq, -1); 2102 } 2103 2104 static void nvme_rdma_check_pi_status(struct nvme_rdma_request *req) 2105 { 2106 struct request *rq = blk_mq_rq_from_pdu(req); 2107 struct ib_mr_status mr_status; 2108 int ret; 2109 2110 ret = ib_check_mr_status(req->mr, IB_MR_CHECK_SIG_STATUS, &mr_status); 2111 if (ret) { 2112 pr_err("ib_check_mr_status failed, ret %d\n", ret); 2113 nvme_req(rq)->status = NVME_SC_INVALID_PI; 2114 return; 2115 } 2116 2117 if (mr_status.fail_status & IB_MR_CHECK_SIG_STATUS) { 2118 switch (mr_status.sig_err.err_type) { 2119 case IB_SIG_BAD_GUARD: 2120 nvme_req(rq)->status = NVME_SC_GUARD_CHECK; 2121 break; 2122 case IB_SIG_BAD_REFTAG: 2123 nvme_req(rq)->status = NVME_SC_REFTAG_CHECK; 2124 break; 2125 case IB_SIG_BAD_APPTAG: 2126 nvme_req(rq)->status = NVME_SC_APPTAG_CHECK; 2127 break; 2128 } 2129 pr_err("PI error found type %d expected 0x%x vs actual 0x%x\n", 2130 mr_status.sig_err.err_type, mr_status.sig_err.expected, 2131 mr_status.sig_err.actual); 2132 } 2133 } 2134 2135 static void nvme_rdma_complete_rq(struct request *rq) 2136 { 2137 struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); 2138 struct nvme_rdma_queue *queue = req->queue; 2139 struct ib_device *ibdev = queue->device->dev; 2140 2141 if (req->use_sig_mr) 2142 nvme_rdma_check_pi_status(req); 2143 2144 nvme_rdma_unmap_data(queue, rq); 2145 ib_dma_unmap_single(ibdev, req->sqe.dma, sizeof(struct nvme_command), 2146 DMA_TO_DEVICE); 2147 nvme_complete_rq(rq); 2148 } 2149 2150 static int nvme_rdma_map_queues(struct blk_mq_tag_set *set) 2151 { 2152 struct nvme_rdma_ctrl *ctrl = set->driver_data; 2153 struct nvmf_ctrl_options *opts = ctrl->ctrl.opts; 2154 2155 if (opts->nr_write_queues && ctrl->io_queues[HCTX_TYPE_READ]) { 2156 /* separate read/write queues */ 2157 set->map[HCTX_TYPE_DEFAULT].nr_queues = 2158 ctrl->io_queues[HCTX_TYPE_DEFAULT]; 2159 set->map[HCTX_TYPE_DEFAULT].queue_offset = 0; 2160 set->map[HCTX_TYPE_READ].nr_queues = 2161 ctrl->io_queues[HCTX_TYPE_READ]; 2162 set->map[HCTX_TYPE_READ].queue_offset = 2163 ctrl->io_queues[HCTX_TYPE_DEFAULT]; 2164 } else { 2165 /* shared read/write queues */ 2166 set->map[HCTX_TYPE_DEFAULT].nr_queues = 2167 ctrl->io_queues[HCTX_TYPE_DEFAULT]; 2168 set->map[HCTX_TYPE_DEFAULT].queue_offset = 0; 2169 set->map[HCTX_TYPE_READ].nr_queues = 2170 ctrl->io_queues[HCTX_TYPE_DEFAULT]; 2171 set->map[HCTX_TYPE_READ].queue_offset = 0; 2172 } 2173 blk_mq_rdma_map_queues(&set->map[HCTX_TYPE_DEFAULT], 2174 ctrl->device->dev, 0); 2175 blk_mq_rdma_map_queues(&set->map[HCTX_TYPE_READ], 2176 ctrl->device->dev, 0); 2177 2178 if (opts->nr_poll_queues && ctrl->io_queues[HCTX_TYPE_POLL]) { 2179 /* map dedicated poll queues only if we have queues left */ 2180 set->map[HCTX_TYPE_POLL].nr_queues = 2181 ctrl->io_queues[HCTX_TYPE_POLL]; 2182 set->map[HCTX_TYPE_POLL].queue_offset = 2183 ctrl->io_queues[HCTX_TYPE_DEFAULT] + 2184 ctrl->io_queues[HCTX_TYPE_READ]; 2185 blk_mq_map_queues(&set->map[HCTX_TYPE_POLL]); 2186 } 2187 2188 dev_info(ctrl->ctrl.device, 2189 "mapped %d/%d/%d default/read/poll queues.\n", 2190 ctrl->io_queues[HCTX_TYPE_DEFAULT], 2191 ctrl->io_queues[HCTX_TYPE_READ], 2192 ctrl->io_queues[HCTX_TYPE_POLL]); 2193 2194 return 0; 2195 } 2196 2197 static const struct blk_mq_ops nvme_rdma_mq_ops = { 2198 .queue_rq = nvme_rdma_queue_rq, 2199 .complete = nvme_rdma_complete_rq, 2200 .init_request = nvme_rdma_init_request, 2201 .exit_request = nvme_rdma_exit_request, 2202 .init_hctx = nvme_rdma_init_hctx, 2203 .timeout = nvme_rdma_timeout, 2204 .map_queues = nvme_rdma_map_queues, 2205 .poll = nvme_rdma_poll, 2206 }; 2207 2208 static const struct blk_mq_ops nvme_rdma_admin_mq_ops = { 2209 .queue_rq = nvme_rdma_queue_rq, 2210 .complete = nvme_rdma_complete_rq, 2211 .init_request = nvme_rdma_init_request, 2212 .exit_request = nvme_rdma_exit_request, 2213 .init_hctx = nvme_rdma_init_admin_hctx, 2214 .timeout = nvme_rdma_timeout, 2215 }; 2216 2217 static void nvme_rdma_shutdown_ctrl(struct nvme_rdma_ctrl *ctrl, bool shutdown) 2218 { 2219 cancel_work_sync(&ctrl->err_work); 2220 cancel_delayed_work_sync(&ctrl->reconnect_work); 2221 2222 nvme_rdma_teardown_io_queues(ctrl, shutdown); 2223 blk_mq_quiesce_queue(ctrl->ctrl.admin_q); 2224 if (shutdown) 2225 nvme_shutdown_ctrl(&ctrl->ctrl); 2226 else 2227 nvme_disable_ctrl(&ctrl->ctrl); 2228 nvme_rdma_teardown_admin_queue(ctrl, shutdown); 2229 } 2230 2231 static void nvme_rdma_delete_ctrl(struct nvme_ctrl *ctrl) 2232 { 2233 nvme_rdma_shutdown_ctrl(to_rdma_ctrl(ctrl), true); 2234 } 2235 2236 static void nvme_rdma_reset_ctrl_work(struct work_struct *work) 2237 { 2238 struct nvme_rdma_ctrl *ctrl = 2239 container_of(work, struct nvme_rdma_ctrl, ctrl.reset_work); 2240 2241 nvme_stop_ctrl(&ctrl->ctrl); 2242 nvme_rdma_shutdown_ctrl(ctrl, false); 2243 2244 if (!nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_CONNECTING)) { 2245 /* state change failure should never happen */ 2246 WARN_ON_ONCE(1); 2247 return; 2248 } 2249 2250 if (nvme_rdma_setup_ctrl(ctrl, false)) 2251 goto out_fail; 2252 2253 return; 2254 2255 out_fail: 2256 ++ctrl->ctrl.nr_reconnects; 2257 nvme_rdma_reconnect_or_remove(ctrl); 2258 } 2259 2260 static const struct nvme_ctrl_ops nvme_rdma_ctrl_ops = { 2261 .name = "rdma", 2262 .module = THIS_MODULE, 2263 .flags = NVME_F_FABRICS | NVME_F_METADATA_SUPPORTED, 2264 .reg_read32 = nvmf_reg_read32, 2265 .reg_read64 = nvmf_reg_read64, 2266 .reg_write32 = nvmf_reg_write32, 2267 .free_ctrl = nvme_rdma_free_ctrl, 2268 .submit_async_event = nvme_rdma_submit_async_event, 2269 .delete_ctrl = nvme_rdma_delete_ctrl, 2270 .get_address = nvmf_get_address, 2271 }; 2272 2273 /* 2274 * Fails a connection request if it matches an existing controller 2275 * (association) with the same tuple: 2276 * <Host NQN, Host ID, local address, remote address, remote port, SUBSYS NQN> 2277 * 2278 * if local address is not specified in the request, it will match an 2279 * existing controller with all the other parameters the same and no 2280 * local port address specified as well. 2281 * 2282 * The ports don't need to be compared as they are intrinsically 2283 * already matched by the port pointers supplied. 2284 */ 2285 static bool 2286 nvme_rdma_existing_controller(struct nvmf_ctrl_options *opts) 2287 { 2288 struct nvme_rdma_ctrl *ctrl; 2289 bool found = false; 2290 2291 mutex_lock(&nvme_rdma_ctrl_mutex); 2292 list_for_each_entry(ctrl, &nvme_rdma_ctrl_list, list) { 2293 found = nvmf_ip_options_match(&ctrl->ctrl, opts); 2294 if (found) 2295 break; 2296 } 2297 mutex_unlock(&nvme_rdma_ctrl_mutex); 2298 2299 return found; 2300 } 2301 2302 static struct nvme_ctrl *nvme_rdma_create_ctrl(struct device *dev, 2303 struct nvmf_ctrl_options *opts) 2304 { 2305 struct nvme_rdma_ctrl *ctrl; 2306 int ret; 2307 bool changed; 2308 2309 ctrl = kzalloc(sizeof(*ctrl), GFP_KERNEL); 2310 if (!ctrl) 2311 return ERR_PTR(-ENOMEM); 2312 ctrl->ctrl.opts = opts; 2313 INIT_LIST_HEAD(&ctrl->list); 2314 mutex_init(&ctrl->teardown_lock); 2315 2316 if (!(opts->mask & NVMF_OPT_TRSVCID)) { 2317 opts->trsvcid = 2318 kstrdup(__stringify(NVME_RDMA_IP_PORT), GFP_KERNEL); 2319 if (!opts->trsvcid) { 2320 ret = -ENOMEM; 2321 goto out_free_ctrl; 2322 } 2323 opts->mask |= NVMF_OPT_TRSVCID; 2324 } 2325 2326 ret = inet_pton_with_scope(&init_net, AF_UNSPEC, 2327 opts->traddr, opts->trsvcid, &ctrl->addr); 2328 if (ret) { 2329 pr_err("malformed address passed: %s:%s\n", 2330 opts->traddr, opts->trsvcid); 2331 goto out_free_ctrl; 2332 } 2333 2334 if (opts->mask & NVMF_OPT_HOST_TRADDR) { 2335 ret = inet_pton_with_scope(&init_net, AF_UNSPEC, 2336 opts->host_traddr, NULL, &ctrl->src_addr); 2337 if (ret) { 2338 pr_err("malformed src address passed: %s\n", 2339 opts->host_traddr); 2340 goto out_free_ctrl; 2341 } 2342 } 2343 2344 if (!opts->duplicate_connect && nvme_rdma_existing_controller(opts)) { 2345 ret = -EALREADY; 2346 goto out_free_ctrl; 2347 } 2348 2349 INIT_DELAYED_WORK(&ctrl->reconnect_work, 2350 nvme_rdma_reconnect_ctrl_work); 2351 INIT_WORK(&ctrl->err_work, nvme_rdma_error_recovery_work); 2352 INIT_WORK(&ctrl->ctrl.reset_work, nvme_rdma_reset_ctrl_work); 2353 2354 ctrl->ctrl.queue_count = opts->nr_io_queues + opts->nr_write_queues + 2355 opts->nr_poll_queues + 1; 2356 ctrl->ctrl.sqsize = opts->queue_size - 1; 2357 ctrl->ctrl.kato = opts->kato; 2358 2359 ret = -ENOMEM; 2360 ctrl->queues = kcalloc(ctrl->ctrl.queue_count, sizeof(*ctrl->queues), 2361 GFP_KERNEL); 2362 if (!ctrl->queues) 2363 goto out_free_ctrl; 2364 2365 ret = nvme_init_ctrl(&ctrl->ctrl, dev, &nvme_rdma_ctrl_ops, 2366 0 /* no quirks, we're perfect! */); 2367 if (ret) 2368 goto out_kfree_queues; 2369 2370 changed = nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_CONNECTING); 2371 WARN_ON_ONCE(!changed); 2372 2373 ret = nvme_rdma_setup_ctrl(ctrl, true); 2374 if (ret) 2375 goto out_uninit_ctrl; 2376 2377 dev_info(ctrl->ctrl.device, "new ctrl: NQN \"%s\", addr %pISpcs\n", 2378 ctrl->ctrl.opts->subsysnqn, &ctrl->addr); 2379 2380 mutex_lock(&nvme_rdma_ctrl_mutex); 2381 list_add_tail(&ctrl->list, &nvme_rdma_ctrl_list); 2382 mutex_unlock(&nvme_rdma_ctrl_mutex); 2383 2384 return &ctrl->ctrl; 2385 2386 out_uninit_ctrl: 2387 nvme_uninit_ctrl(&ctrl->ctrl); 2388 nvme_put_ctrl(&ctrl->ctrl); 2389 if (ret > 0) 2390 ret = -EIO; 2391 return ERR_PTR(ret); 2392 out_kfree_queues: 2393 kfree(ctrl->queues); 2394 out_free_ctrl: 2395 kfree(ctrl); 2396 return ERR_PTR(ret); 2397 } 2398 2399 static struct nvmf_transport_ops nvme_rdma_transport = { 2400 .name = "rdma", 2401 .module = THIS_MODULE, 2402 .required_opts = NVMF_OPT_TRADDR, 2403 .allowed_opts = NVMF_OPT_TRSVCID | NVMF_OPT_RECONNECT_DELAY | 2404 NVMF_OPT_HOST_TRADDR | NVMF_OPT_CTRL_LOSS_TMO | 2405 NVMF_OPT_NR_WRITE_QUEUES | NVMF_OPT_NR_POLL_QUEUES | 2406 NVMF_OPT_TOS, 2407 .create_ctrl = nvme_rdma_create_ctrl, 2408 }; 2409 2410 static void nvme_rdma_remove_one(struct ib_device *ib_device, void *client_data) 2411 { 2412 struct nvme_rdma_ctrl *ctrl; 2413 struct nvme_rdma_device *ndev; 2414 bool found = false; 2415 2416 mutex_lock(&device_list_mutex); 2417 list_for_each_entry(ndev, &device_list, entry) { 2418 if (ndev->dev == ib_device) { 2419 found = true; 2420 break; 2421 } 2422 } 2423 mutex_unlock(&device_list_mutex); 2424 2425 if (!found) 2426 return; 2427 2428 /* Delete all controllers using this device */ 2429 mutex_lock(&nvme_rdma_ctrl_mutex); 2430 list_for_each_entry(ctrl, &nvme_rdma_ctrl_list, list) { 2431 if (ctrl->device->dev != ib_device) 2432 continue; 2433 nvme_delete_ctrl(&ctrl->ctrl); 2434 } 2435 mutex_unlock(&nvme_rdma_ctrl_mutex); 2436 2437 flush_workqueue(nvme_delete_wq); 2438 } 2439 2440 static struct ib_client nvme_rdma_ib_client = { 2441 .name = "nvme_rdma", 2442 .remove = nvme_rdma_remove_one 2443 }; 2444 2445 static int __init nvme_rdma_init_module(void) 2446 { 2447 int ret; 2448 2449 ret = ib_register_client(&nvme_rdma_ib_client); 2450 if (ret) 2451 return ret; 2452 2453 ret = nvmf_register_transport(&nvme_rdma_transport); 2454 if (ret) 2455 goto err_unreg_client; 2456 2457 return 0; 2458 2459 err_unreg_client: 2460 ib_unregister_client(&nvme_rdma_ib_client); 2461 return ret; 2462 } 2463 2464 static void __exit nvme_rdma_cleanup_module(void) 2465 { 2466 struct nvme_rdma_ctrl *ctrl; 2467 2468 nvmf_unregister_transport(&nvme_rdma_transport); 2469 ib_unregister_client(&nvme_rdma_ib_client); 2470 2471 mutex_lock(&nvme_rdma_ctrl_mutex); 2472 list_for_each_entry(ctrl, &nvme_rdma_ctrl_list, list) 2473 nvme_delete_ctrl(&ctrl->ctrl); 2474 mutex_unlock(&nvme_rdma_ctrl_mutex); 2475 flush_workqueue(nvme_delete_wq); 2476 } 2477 2478 module_init(nvme_rdma_init_module); 2479 module_exit(nvme_rdma_cleanup_module); 2480 2481 MODULE_LICENSE("GPL v2"); 2482