157dacad5SJay Sternberg /* 257dacad5SJay Sternberg * NVM Express device driver 357dacad5SJay Sternberg * Copyright (c) 2011-2014, Intel Corporation. 457dacad5SJay Sternberg * 557dacad5SJay Sternberg * This program is free software; you can redistribute it and/or modify it 657dacad5SJay Sternberg * under the terms and conditions of the GNU General Public License, 757dacad5SJay Sternberg * version 2, as published by the Free Software Foundation. 857dacad5SJay Sternberg * 957dacad5SJay Sternberg * This program is distributed in the hope it will be useful, but WITHOUT 1057dacad5SJay Sternberg * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 1157dacad5SJay Sternberg * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 1257dacad5SJay Sternberg * more details. 1357dacad5SJay Sternberg */ 1457dacad5SJay Sternberg 15a0a3408eSKeith Busch #include <linux/aer.h> 1657dacad5SJay Sternberg #include <linux/bitops.h> 1757dacad5SJay Sternberg #include <linux/blkdev.h> 1857dacad5SJay Sternberg #include <linux/blk-mq.h> 1957dacad5SJay Sternberg #include <linux/cpu.h> 2057dacad5SJay Sternberg #include <linux/delay.h> 2157dacad5SJay Sternberg #include <linux/errno.h> 2257dacad5SJay Sternberg #include <linux/fs.h> 2357dacad5SJay Sternberg #include <linux/genhd.h> 2457dacad5SJay Sternberg #include <linux/hdreg.h> 2557dacad5SJay Sternberg #include <linux/idr.h> 2657dacad5SJay Sternberg #include <linux/init.h> 2757dacad5SJay Sternberg #include <linux/interrupt.h> 2857dacad5SJay Sternberg #include <linux/io.h> 2957dacad5SJay Sternberg #include <linux/kdev_t.h> 3057dacad5SJay Sternberg #include <linux/kernel.h> 3157dacad5SJay Sternberg #include <linux/mm.h> 3257dacad5SJay Sternberg #include <linux/module.h> 3357dacad5SJay Sternberg #include <linux/moduleparam.h> 3477bf25eaSKeith Busch #include <linux/mutex.h> 3557dacad5SJay Sternberg #include <linux/pci.h> 3657dacad5SJay Sternberg #include <linux/poison.h> 3757dacad5SJay Sternberg #include <linux/ptrace.h> 3857dacad5SJay Sternberg #include <linux/sched.h> 3957dacad5SJay Sternberg #include <linux/slab.h> 4057dacad5SJay Sternberg #include <linux/t10-pi.h> 412d55cd5fSChristoph Hellwig #include <linux/timer.h> 4257dacad5SJay Sternberg #include <linux/types.h> 439cf5c095SLinus Torvalds #include <linux/io-64-nonatomic-lo-hi.h> 441d277a63SKeith Busch #include <asm/unaligned.h> 4557dacad5SJay Sternberg 4657dacad5SJay Sternberg #include "nvme.h" 4757dacad5SJay Sternberg 4857dacad5SJay Sternberg #define NVME_Q_DEPTH 1024 4957dacad5SJay Sternberg #define NVME_AQ_DEPTH 256 5057dacad5SJay Sternberg #define SQ_SIZE(depth) (depth * sizeof(struct nvme_command)) 5157dacad5SJay Sternberg #define CQ_SIZE(depth) (depth * sizeof(struct nvme_completion)) 5257dacad5SJay Sternberg 53adf68f21SChristoph Hellwig /* 54adf68f21SChristoph Hellwig * We handle AEN commands ourselves and don't even let the 55adf68f21SChristoph Hellwig * block layer know about them. 56adf68f21SChristoph Hellwig */ 57f866fc42SChristoph Hellwig #define NVME_AQ_BLKMQ_DEPTH (NVME_AQ_DEPTH - NVME_NR_AERS) 58adf68f21SChristoph Hellwig 5957dacad5SJay Sternberg static int use_threaded_interrupts; 6057dacad5SJay Sternberg module_param(use_threaded_interrupts, int, 0); 6157dacad5SJay Sternberg 6257dacad5SJay Sternberg static bool use_cmb_sqes = true; 6357dacad5SJay Sternberg module_param(use_cmb_sqes, bool, 0644); 6457dacad5SJay Sternberg MODULE_PARM_DESC(use_cmb_sqes, "use controller's memory buffer for I/O SQes"); 6557dacad5SJay Sternberg 6657dacad5SJay Sternberg static struct workqueue_struct *nvme_workq; 6757dacad5SJay Sternberg 681c63dc66SChristoph Hellwig struct nvme_dev; 691c63dc66SChristoph Hellwig struct nvme_queue; 7057dacad5SJay Sternberg 7157dacad5SJay Sternberg static int nvme_reset(struct nvme_dev *dev); 72a0fa9647SJens Axboe static void nvme_process_cq(struct nvme_queue *nvmeq); 73a5cdb68cSKeith Busch static void nvme_dev_disable(struct nvme_dev *dev, bool shutdown); 7457dacad5SJay Sternberg 7557dacad5SJay Sternberg /* 761c63dc66SChristoph Hellwig * Represents an NVM Express device. Each nvme_dev is a PCI function. 771c63dc66SChristoph Hellwig */ 781c63dc66SChristoph Hellwig struct nvme_dev { 791c63dc66SChristoph Hellwig struct nvme_queue **queues; 801c63dc66SChristoph Hellwig struct blk_mq_tag_set tagset; 811c63dc66SChristoph Hellwig struct blk_mq_tag_set admin_tagset; 821c63dc66SChristoph Hellwig u32 __iomem *dbs; 831c63dc66SChristoph Hellwig struct device *dev; 841c63dc66SChristoph Hellwig struct dma_pool *prp_page_pool; 851c63dc66SChristoph Hellwig struct dma_pool *prp_small_pool; 861c63dc66SChristoph Hellwig unsigned queue_count; 871c63dc66SChristoph Hellwig unsigned online_queues; 881c63dc66SChristoph Hellwig unsigned max_qid; 891c63dc66SChristoph Hellwig int q_depth; 901c63dc66SChristoph Hellwig u32 db_stride; 911c63dc66SChristoph Hellwig struct msix_entry *entry; 921c63dc66SChristoph Hellwig void __iomem *bar; 931c63dc66SChristoph Hellwig struct work_struct reset_work; 945c8809e6SChristoph Hellwig struct work_struct remove_work; 952d55cd5fSChristoph Hellwig struct timer_list watchdog_timer; 9677bf25eaSKeith Busch struct mutex shutdown_lock; 971c63dc66SChristoph Hellwig bool subsystem; 981c63dc66SChristoph Hellwig void __iomem *cmb; 991c63dc66SChristoph Hellwig dma_addr_t cmb_dma_addr; 1001c63dc66SChristoph Hellwig u64 cmb_size; 1011c63dc66SChristoph Hellwig u32 cmbsz; 1021c63dc66SChristoph Hellwig struct nvme_ctrl ctrl; 103db3cbfffSKeith Busch struct completion ioq_wait; 10457dacad5SJay Sternberg }; 10557dacad5SJay Sternberg 1061c63dc66SChristoph Hellwig static inline struct nvme_dev *to_nvme_dev(struct nvme_ctrl *ctrl) 1071c63dc66SChristoph Hellwig { 1081c63dc66SChristoph Hellwig return container_of(ctrl, struct nvme_dev, ctrl); 1091c63dc66SChristoph Hellwig } 1101c63dc66SChristoph Hellwig 11157dacad5SJay Sternberg /* 11257dacad5SJay Sternberg * An NVM Express queue. Each device has at least two (one for admin 11357dacad5SJay Sternberg * commands and one for I/O commands). 11457dacad5SJay Sternberg */ 11557dacad5SJay Sternberg struct nvme_queue { 11657dacad5SJay Sternberg struct device *q_dmadev; 11757dacad5SJay Sternberg struct nvme_dev *dev; 11857dacad5SJay Sternberg char irqname[24]; /* nvme4294967295-65535\0 */ 11957dacad5SJay Sternberg spinlock_t q_lock; 12057dacad5SJay Sternberg struct nvme_command *sq_cmds; 12157dacad5SJay Sternberg struct nvme_command __iomem *sq_cmds_io; 12257dacad5SJay Sternberg volatile struct nvme_completion *cqes; 12357dacad5SJay Sternberg struct blk_mq_tags **tags; 12457dacad5SJay Sternberg dma_addr_t sq_dma_addr; 12557dacad5SJay Sternberg dma_addr_t cq_dma_addr; 12657dacad5SJay Sternberg u32 __iomem *q_db; 12757dacad5SJay Sternberg u16 q_depth; 12857dacad5SJay Sternberg s16 cq_vector; 12957dacad5SJay Sternberg u16 sq_tail; 13057dacad5SJay Sternberg u16 cq_head; 13157dacad5SJay Sternberg u16 qid; 13257dacad5SJay Sternberg u8 cq_phase; 13357dacad5SJay Sternberg u8 cqe_seen; 13457dacad5SJay Sternberg }; 13557dacad5SJay Sternberg 13657dacad5SJay Sternberg /* 13771bd150cSChristoph Hellwig * The nvme_iod describes the data in an I/O, including the list of PRP 13871bd150cSChristoph Hellwig * entries. You can't see it in this data structure because C doesn't let 139f4800d6dSChristoph Hellwig * me express that. Use nvme_init_iod to ensure there's enough space 14071bd150cSChristoph Hellwig * allocated to store the PRP list. 14171bd150cSChristoph Hellwig */ 14271bd150cSChristoph Hellwig struct nvme_iod { 143f4800d6dSChristoph Hellwig struct nvme_queue *nvmeq; 144f4800d6dSChristoph Hellwig int aborted; 14571bd150cSChristoph Hellwig int npages; /* In the PRP list. 0 means small pool in use */ 14671bd150cSChristoph Hellwig int nents; /* Used in scatterlist */ 14771bd150cSChristoph Hellwig int length; /* Of data, in bytes */ 14871bd150cSChristoph Hellwig dma_addr_t first_dma; 149bf684057SChristoph Hellwig struct scatterlist meta_sg; /* metadata requires single contiguous buffer */ 150f4800d6dSChristoph Hellwig struct scatterlist *sg; 151f4800d6dSChristoph Hellwig struct scatterlist inline_sg[0]; 15257dacad5SJay Sternberg }; 15357dacad5SJay Sternberg 15457dacad5SJay Sternberg /* 15557dacad5SJay Sternberg * Check we didin't inadvertently grow the command struct 15657dacad5SJay Sternberg */ 15757dacad5SJay Sternberg static inline void _nvme_check_size(void) 15857dacad5SJay Sternberg { 15957dacad5SJay Sternberg BUILD_BUG_ON(sizeof(struct nvme_rw_command) != 64); 16057dacad5SJay Sternberg BUILD_BUG_ON(sizeof(struct nvme_create_cq) != 64); 16157dacad5SJay Sternberg BUILD_BUG_ON(sizeof(struct nvme_create_sq) != 64); 16257dacad5SJay Sternberg BUILD_BUG_ON(sizeof(struct nvme_delete_queue) != 64); 16357dacad5SJay Sternberg BUILD_BUG_ON(sizeof(struct nvme_features) != 64); 16457dacad5SJay Sternberg BUILD_BUG_ON(sizeof(struct nvme_format_cmd) != 64); 16557dacad5SJay Sternberg BUILD_BUG_ON(sizeof(struct nvme_abort_cmd) != 64); 16657dacad5SJay Sternberg BUILD_BUG_ON(sizeof(struct nvme_command) != 64); 16757dacad5SJay Sternberg BUILD_BUG_ON(sizeof(struct nvme_id_ctrl) != 4096); 16857dacad5SJay Sternberg BUILD_BUG_ON(sizeof(struct nvme_id_ns) != 4096); 16957dacad5SJay Sternberg BUILD_BUG_ON(sizeof(struct nvme_lba_range_type) != 64); 17057dacad5SJay Sternberg BUILD_BUG_ON(sizeof(struct nvme_smart_log) != 512); 17157dacad5SJay Sternberg } 17257dacad5SJay Sternberg 17357dacad5SJay Sternberg /* 17457dacad5SJay Sternberg * Max size of iod being embedded in the request payload 17557dacad5SJay Sternberg */ 17657dacad5SJay Sternberg #define NVME_INT_PAGES 2 1775fd4ce1bSChristoph Hellwig #define NVME_INT_BYTES(dev) (NVME_INT_PAGES * (dev)->ctrl.page_size) 17857dacad5SJay Sternberg 17957dacad5SJay Sternberg /* 18057dacad5SJay Sternberg * Will slightly overestimate the number of pages needed. This is OK 18157dacad5SJay Sternberg * as it only leads to a small amount of wasted memory for the lifetime of 18257dacad5SJay Sternberg * the I/O. 18357dacad5SJay Sternberg */ 18457dacad5SJay Sternberg static int nvme_npages(unsigned size, struct nvme_dev *dev) 18557dacad5SJay Sternberg { 1865fd4ce1bSChristoph Hellwig unsigned nprps = DIV_ROUND_UP(size + dev->ctrl.page_size, 1875fd4ce1bSChristoph Hellwig dev->ctrl.page_size); 18857dacad5SJay Sternberg return DIV_ROUND_UP(8 * nprps, PAGE_SIZE - 8); 18957dacad5SJay Sternberg } 19057dacad5SJay Sternberg 191f4800d6dSChristoph Hellwig static unsigned int nvme_iod_alloc_size(struct nvme_dev *dev, 192f4800d6dSChristoph Hellwig unsigned int size, unsigned int nseg) 193f4800d6dSChristoph Hellwig { 194f4800d6dSChristoph Hellwig return sizeof(__le64 *) * nvme_npages(size, dev) + 195f4800d6dSChristoph Hellwig sizeof(struct scatterlist) * nseg; 196f4800d6dSChristoph Hellwig } 197f4800d6dSChristoph Hellwig 19857dacad5SJay Sternberg static unsigned int nvme_cmd_size(struct nvme_dev *dev) 19957dacad5SJay Sternberg { 200f4800d6dSChristoph Hellwig return sizeof(struct nvme_iod) + 201f4800d6dSChristoph Hellwig nvme_iod_alloc_size(dev, NVME_INT_BYTES(dev), NVME_INT_PAGES); 20257dacad5SJay Sternberg } 20357dacad5SJay Sternberg 20457dacad5SJay Sternberg static int nvme_admin_init_hctx(struct blk_mq_hw_ctx *hctx, void *data, 20557dacad5SJay Sternberg unsigned int hctx_idx) 20657dacad5SJay Sternberg { 20757dacad5SJay Sternberg struct nvme_dev *dev = data; 20857dacad5SJay Sternberg struct nvme_queue *nvmeq = dev->queues[0]; 20957dacad5SJay Sternberg 21057dacad5SJay Sternberg WARN_ON(hctx_idx != 0); 21157dacad5SJay Sternberg WARN_ON(dev->admin_tagset.tags[0] != hctx->tags); 21257dacad5SJay Sternberg WARN_ON(nvmeq->tags); 21357dacad5SJay Sternberg 21457dacad5SJay Sternberg hctx->driver_data = nvmeq; 21557dacad5SJay Sternberg nvmeq->tags = &dev->admin_tagset.tags[0]; 21657dacad5SJay Sternberg return 0; 21757dacad5SJay Sternberg } 21857dacad5SJay Sternberg 21957dacad5SJay Sternberg static void nvme_admin_exit_hctx(struct blk_mq_hw_ctx *hctx, unsigned int hctx_idx) 22057dacad5SJay Sternberg { 22157dacad5SJay Sternberg struct nvme_queue *nvmeq = hctx->driver_data; 22257dacad5SJay Sternberg 22357dacad5SJay Sternberg nvmeq->tags = NULL; 22457dacad5SJay Sternberg } 22557dacad5SJay Sternberg 22657dacad5SJay Sternberg static int nvme_admin_init_request(void *data, struct request *req, 22757dacad5SJay Sternberg unsigned int hctx_idx, unsigned int rq_idx, 22857dacad5SJay Sternberg unsigned int numa_node) 22957dacad5SJay Sternberg { 23057dacad5SJay Sternberg struct nvme_dev *dev = data; 231f4800d6dSChristoph Hellwig struct nvme_iod *iod = blk_mq_rq_to_pdu(req); 23257dacad5SJay Sternberg struct nvme_queue *nvmeq = dev->queues[0]; 23357dacad5SJay Sternberg 23457dacad5SJay Sternberg BUG_ON(!nvmeq); 235f4800d6dSChristoph Hellwig iod->nvmeq = nvmeq; 23657dacad5SJay Sternberg return 0; 23757dacad5SJay Sternberg } 23857dacad5SJay Sternberg 23957dacad5SJay Sternberg static int nvme_init_hctx(struct blk_mq_hw_ctx *hctx, void *data, 24057dacad5SJay Sternberg unsigned int hctx_idx) 24157dacad5SJay Sternberg { 24257dacad5SJay Sternberg struct nvme_dev *dev = data; 24357dacad5SJay Sternberg struct nvme_queue *nvmeq = dev->queues[hctx_idx + 1]; 24457dacad5SJay Sternberg 24557dacad5SJay Sternberg if (!nvmeq->tags) 24657dacad5SJay Sternberg nvmeq->tags = &dev->tagset.tags[hctx_idx]; 24757dacad5SJay Sternberg 24857dacad5SJay Sternberg WARN_ON(dev->tagset.tags[hctx_idx] != hctx->tags); 24957dacad5SJay Sternberg hctx->driver_data = nvmeq; 25057dacad5SJay Sternberg return 0; 25157dacad5SJay Sternberg } 25257dacad5SJay Sternberg 25357dacad5SJay Sternberg static int nvme_init_request(void *data, struct request *req, 25457dacad5SJay Sternberg unsigned int hctx_idx, unsigned int rq_idx, 25557dacad5SJay Sternberg unsigned int numa_node) 25657dacad5SJay Sternberg { 25757dacad5SJay Sternberg struct nvme_dev *dev = data; 258f4800d6dSChristoph Hellwig struct nvme_iod *iod = blk_mq_rq_to_pdu(req); 25957dacad5SJay Sternberg struct nvme_queue *nvmeq = dev->queues[hctx_idx + 1]; 26057dacad5SJay Sternberg 26157dacad5SJay Sternberg BUG_ON(!nvmeq); 262f4800d6dSChristoph Hellwig iod->nvmeq = nvmeq; 26357dacad5SJay Sternberg return 0; 26457dacad5SJay Sternberg } 26557dacad5SJay Sternberg 26657dacad5SJay Sternberg /** 267adf68f21SChristoph Hellwig * __nvme_submit_cmd() - Copy a command into a queue and ring the doorbell 26857dacad5SJay Sternberg * @nvmeq: The queue to use 26957dacad5SJay Sternberg * @cmd: The command to send 27057dacad5SJay Sternberg * 27157dacad5SJay Sternberg * Safe to use from interrupt context 27257dacad5SJay Sternberg */ 27357dacad5SJay Sternberg static void __nvme_submit_cmd(struct nvme_queue *nvmeq, 27457dacad5SJay Sternberg struct nvme_command *cmd) 27557dacad5SJay Sternberg { 27657dacad5SJay Sternberg u16 tail = nvmeq->sq_tail; 27757dacad5SJay Sternberg 27857dacad5SJay Sternberg if (nvmeq->sq_cmds_io) 27957dacad5SJay Sternberg memcpy_toio(&nvmeq->sq_cmds_io[tail], cmd, sizeof(*cmd)); 28057dacad5SJay Sternberg else 28157dacad5SJay Sternberg memcpy(&nvmeq->sq_cmds[tail], cmd, sizeof(*cmd)); 28257dacad5SJay Sternberg 28357dacad5SJay Sternberg if (++tail == nvmeq->q_depth) 28457dacad5SJay Sternberg tail = 0; 28557dacad5SJay Sternberg writel(tail, nvmeq->q_db); 28657dacad5SJay Sternberg nvmeq->sq_tail = tail; 28757dacad5SJay Sternberg } 28857dacad5SJay Sternberg 289f4800d6dSChristoph Hellwig static __le64 **iod_list(struct request *req) 29057dacad5SJay Sternberg { 291f4800d6dSChristoph Hellwig struct nvme_iod *iod = blk_mq_rq_to_pdu(req); 292f4800d6dSChristoph Hellwig return (__le64 **)(iod->sg + req->nr_phys_segments); 29357dacad5SJay Sternberg } 29457dacad5SJay Sternberg 29558b45602SMing Lin static int nvme_init_iod(struct request *rq, unsigned size, 29658b45602SMing Lin struct nvme_dev *dev) 29757dacad5SJay Sternberg { 298f4800d6dSChristoph Hellwig struct nvme_iod *iod = blk_mq_rq_to_pdu(rq); 299f4800d6dSChristoph Hellwig int nseg = rq->nr_phys_segments; 300f4800d6dSChristoph Hellwig 301f4800d6dSChristoph Hellwig if (nseg > NVME_INT_PAGES || size > NVME_INT_BYTES(dev)) { 302f4800d6dSChristoph Hellwig iod->sg = kmalloc(nvme_iod_alloc_size(dev, size, nseg), GFP_ATOMIC); 303f4800d6dSChristoph Hellwig if (!iod->sg) 304f4800d6dSChristoph Hellwig return BLK_MQ_RQ_QUEUE_BUSY; 305f4800d6dSChristoph Hellwig } else { 306f4800d6dSChristoph Hellwig iod->sg = iod->inline_sg; 30757dacad5SJay Sternberg } 30857dacad5SJay Sternberg 309f4800d6dSChristoph Hellwig iod->aborted = 0; 31057dacad5SJay Sternberg iod->npages = -1; 31157dacad5SJay Sternberg iod->nents = 0; 312f4800d6dSChristoph Hellwig iod->length = size; 313f4800d6dSChristoph Hellwig return 0; 31457dacad5SJay Sternberg } 31557dacad5SJay Sternberg 316f4800d6dSChristoph Hellwig static void nvme_free_iod(struct nvme_dev *dev, struct request *req) 31757dacad5SJay Sternberg { 318f4800d6dSChristoph Hellwig struct nvme_iod *iod = blk_mq_rq_to_pdu(req); 3195fd4ce1bSChristoph Hellwig const int last_prp = dev->ctrl.page_size / 8 - 1; 32057dacad5SJay Sternberg int i; 321f4800d6dSChristoph Hellwig __le64 **list = iod_list(req); 32257dacad5SJay Sternberg dma_addr_t prp_dma = iod->first_dma; 32357dacad5SJay Sternberg 3246904242dSMing Lin nvme_cleanup_cmd(req); 32503b5929eSMing Lin 32657dacad5SJay Sternberg if (iod->npages == 0) 32757dacad5SJay Sternberg dma_pool_free(dev->prp_small_pool, list[0], prp_dma); 32857dacad5SJay Sternberg for (i = 0; i < iod->npages; i++) { 32957dacad5SJay Sternberg __le64 *prp_list = list[i]; 33057dacad5SJay Sternberg dma_addr_t next_prp_dma = le64_to_cpu(prp_list[last_prp]); 33157dacad5SJay Sternberg dma_pool_free(dev->prp_page_pool, prp_list, prp_dma); 33257dacad5SJay Sternberg prp_dma = next_prp_dma; 33357dacad5SJay Sternberg } 33457dacad5SJay Sternberg 335f4800d6dSChristoph Hellwig if (iod->sg != iod->inline_sg) 336f4800d6dSChristoph Hellwig kfree(iod->sg); 33757dacad5SJay Sternberg } 33857dacad5SJay Sternberg 33957dacad5SJay Sternberg #ifdef CONFIG_BLK_DEV_INTEGRITY 34057dacad5SJay Sternberg static void nvme_dif_prep(u32 p, u32 v, struct t10_pi_tuple *pi) 34157dacad5SJay Sternberg { 34257dacad5SJay Sternberg if (be32_to_cpu(pi->ref_tag) == v) 34357dacad5SJay Sternberg pi->ref_tag = cpu_to_be32(p); 34457dacad5SJay Sternberg } 34557dacad5SJay Sternberg 34657dacad5SJay Sternberg static void nvme_dif_complete(u32 p, u32 v, struct t10_pi_tuple *pi) 34757dacad5SJay Sternberg { 34857dacad5SJay Sternberg if (be32_to_cpu(pi->ref_tag) == p) 34957dacad5SJay Sternberg pi->ref_tag = cpu_to_be32(v); 35057dacad5SJay Sternberg } 35157dacad5SJay Sternberg 35257dacad5SJay Sternberg /** 35357dacad5SJay Sternberg * nvme_dif_remap - remaps ref tags to bip seed and physical lba 35457dacad5SJay Sternberg * 35557dacad5SJay Sternberg * The virtual start sector is the one that was originally submitted by the 35657dacad5SJay Sternberg * block layer. Due to partitioning, MD/DM cloning, etc. the actual physical 35757dacad5SJay Sternberg * start sector may be different. Remap protection information to match the 35857dacad5SJay Sternberg * physical LBA on writes, and back to the original seed on reads. 35957dacad5SJay Sternberg * 36057dacad5SJay Sternberg * Type 0 and 3 do not have a ref tag, so no remapping required. 36157dacad5SJay Sternberg */ 36257dacad5SJay Sternberg static void nvme_dif_remap(struct request *req, 36357dacad5SJay Sternberg void (*dif_swap)(u32 p, u32 v, struct t10_pi_tuple *pi)) 36457dacad5SJay Sternberg { 36557dacad5SJay Sternberg struct nvme_ns *ns = req->rq_disk->private_data; 36657dacad5SJay Sternberg struct bio_integrity_payload *bip; 36757dacad5SJay Sternberg struct t10_pi_tuple *pi; 36857dacad5SJay Sternberg void *p, *pmap; 36957dacad5SJay Sternberg u32 i, nlb, ts, phys, virt; 37057dacad5SJay Sternberg 37157dacad5SJay Sternberg if (!ns->pi_type || ns->pi_type == NVME_NS_DPS_PI_TYPE3) 37257dacad5SJay Sternberg return; 37357dacad5SJay Sternberg 37457dacad5SJay Sternberg bip = bio_integrity(req->bio); 37557dacad5SJay Sternberg if (!bip) 37657dacad5SJay Sternberg return; 37757dacad5SJay Sternberg 37857dacad5SJay Sternberg pmap = kmap_atomic(bip->bip_vec->bv_page) + bip->bip_vec->bv_offset; 37957dacad5SJay Sternberg 38057dacad5SJay Sternberg p = pmap; 38157dacad5SJay Sternberg virt = bip_get_seed(bip); 38257dacad5SJay Sternberg phys = nvme_block_nr(ns, blk_rq_pos(req)); 38357dacad5SJay Sternberg nlb = (blk_rq_bytes(req) >> ns->lba_shift); 384ac6fc48cSDan Williams ts = ns->disk->queue->integrity.tuple_size; 38557dacad5SJay Sternberg 38657dacad5SJay Sternberg for (i = 0; i < nlb; i++, virt++, phys++) { 38757dacad5SJay Sternberg pi = (struct t10_pi_tuple *)p; 38857dacad5SJay Sternberg dif_swap(phys, virt, pi); 38957dacad5SJay Sternberg p += ts; 39057dacad5SJay Sternberg } 39157dacad5SJay Sternberg kunmap_atomic(pmap); 39257dacad5SJay Sternberg } 39357dacad5SJay Sternberg #else /* CONFIG_BLK_DEV_INTEGRITY */ 39457dacad5SJay Sternberg static void nvme_dif_remap(struct request *req, 39557dacad5SJay Sternberg void (*dif_swap)(u32 p, u32 v, struct t10_pi_tuple *pi)) 39657dacad5SJay Sternberg { 39757dacad5SJay Sternberg } 39857dacad5SJay Sternberg static void nvme_dif_prep(u32 p, u32 v, struct t10_pi_tuple *pi) 39957dacad5SJay Sternberg { 40057dacad5SJay Sternberg } 40157dacad5SJay Sternberg static void nvme_dif_complete(u32 p, u32 v, struct t10_pi_tuple *pi) 40257dacad5SJay Sternberg { 40357dacad5SJay Sternberg } 40457dacad5SJay Sternberg #endif 40557dacad5SJay Sternberg 406f4800d6dSChristoph Hellwig static bool nvme_setup_prps(struct nvme_dev *dev, struct request *req, 40769d2b571SChristoph Hellwig int total_len) 40857dacad5SJay Sternberg { 409f4800d6dSChristoph Hellwig struct nvme_iod *iod = blk_mq_rq_to_pdu(req); 41057dacad5SJay Sternberg struct dma_pool *pool; 41157dacad5SJay Sternberg int length = total_len; 41257dacad5SJay Sternberg struct scatterlist *sg = iod->sg; 41357dacad5SJay Sternberg int dma_len = sg_dma_len(sg); 41457dacad5SJay Sternberg u64 dma_addr = sg_dma_address(sg); 4155fd4ce1bSChristoph Hellwig u32 page_size = dev->ctrl.page_size; 41657dacad5SJay Sternberg int offset = dma_addr & (page_size - 1); 41757dacad5SJay Sternberg __le64 *prp_list; 418f4800d6dSChristoph Hellwig __le64 **list = iod_list(req); 41957dacad5SJay Sternberg dma_addr_t prp_dma; 42057dacad5SJay Sternberg int nprps, i; 42157dacad5SJay Sternberg 42257dacad5SJay Sternberg length -= (page_size - offset); 42357dacad5SJay Sternberg if (length <= 0) 42469d2b571SChristoph Hellwig return true; 42557dacad5SJay Sternberg 42657dacad5SJay Sternberg dma_len -= (page_size - offset); 42757dacad5SJay Sternberg if (dma_len) { 42857dacad5SJay Sternberg dma_addr += (page_size - offset); 42957dacad5SJay Sternberg } else { 43057dacad5SJay Sternberg sg = sg_next(sg); 43157dacad5SJay Sternberg dma_addr = sg_dma_address(sg); 43257dacad5SJay Sternberg dma_len = sg_dma_len(sg); 43357dacad5SJay Sternberg } 43457dacad5SJay Sternberg 43557dacad5SJay Sternberg if (length <= page_size) { 43657dacad5SJay Sternberg iod->first_dma = dma_addr; 43769d2b571SChristoph Hellwig return true; 43857dacad5SJay Sternberg } 43957dacad5SJay Sternberg 44057dacad5SJay Sternberg nprps = DIV_ROUND_UP(length, page_size); 44157dacad5SJay Sternberg if (nprps <= (256 / 8)) { 44257dacad5SJay Sternberg pool = dev->prp_small_pool; 44357dacad5SJay Sternberg iod->npages = 0; 44457dacad5SJay Sternberg } else { 44557dacad5SJay Sternberg pool = dev->prp_page_pool; 44657dacad5SJay Sternberg iod->npages = 1; 44757dacad5SJay Sternberg } 44857dacad5SJay Sternberg 44969d2b571SChristoph Hellwig prp_list = dma_pool_alloc(pool, GFP_ATOMIC, &prp_dma); 45057dacad5SJay Sternberg if (!prp_list) { 45157dacad5SJay Sternberg iod->first_dma = dma_addr; 45257dacad5SJay Sternberg iod->npages = -1; 45369d2b571SChristoph Hellwig return false; 45457dacad5SJay Sternberg } 45557dacad5SJay Sternberg list[0] = prp_list; 45657dacad5SJay Sternberg iod->first_dma = prp_dma; 45757dacad5SJay Sternberg i = 0; 45857dacad5SJay Sternberg for (;;) { 45957dacad5SJay Sternberg if (i == page_size >> 3) { 46057dacad5SJay Sternberg __le64 *old_prp_list = prp_list; 46169d2b571SChristoph Hellwig prp_list = dma_pool_alloc(pool, GFP_ATOMIC, &prp_dma); 46257dacad5SJay Sternberg if (!prp_list) 46369d2b571SChristoph Hellwig return false; 46457dacad5SJay Sternberg list[iod->npages++] = prp_list; 46557dacad5SJay Sternberg prp_list[0] = old_prp_list[i - 1]; 46657dacad5SJay Sternberg old_prp_list[i - 1] = cpu_to_le64(prp_dma); 46757dacad5SJay Sternberg i = 1; 46857dacad5SJay Sternberg } 46957dacad5SJay Sternberg prp_list[i++] = cpu_to_le64(dma_addr); 47057dacad5SJay Sternberg dma_len -= page_size; 47157dacad5SJay Sternberg dma_addr += page_size; 47257dacad5SJay Sternberg length -= page_size; 47357dacad5SJay Sternberg if (length <= 0) 47457dacad5SJay Sternberg break; 47557dacad5SJay Sternberg if (dma_len > 0) 47657dacad5SJay Sternberg continue; 47757dacad5SJay Sternberg BUG_ON(dma_len < 0); 47857dacad5SJay Sternberg sg = sg_next(sg); 47957dacad5SJay Sternberg dma_addr = sg_dma_address(sg); 48057dacad5SJay Sternberg dma_len = sg_dma_len(sg); 48157dacad5SJay Sternberg } 48257dacad5SJay Sternberg 48369d2b571SChristoph Hellwig return true; 48457dacad5SJay Sternberg } 48557dacad5SJay Sternberg 486f4800d6dSChristoph Hellwig static int nvme_map_data(struct nvme_dev *dev, struct request *req, 48703b5929eSMing Lin unsigned size, struct nvme_command *cmnd) 48857dacad5SJay Sternberg { 489f4800d6dSChristoph Hellwig struct nvme_iod *iod = blk_mq_rq_to_pdu(req); 490ba1ca37eSChristoph Hellwig struct request_queue *q = req->q; 491ba1ca37eSChristoph Hellwig enum dma_data_direction dma_dir = rq_data_dir(req) ? 492ba1ca37eSChristoph Hellwig DMA_TO_DEVICE : DMA_FROM_DEVICE; 493ba1ca37eSChristoph Hellwig int ret = BLK_MQ_RQ_QUEUE_ERROR; 49457dacad5SJay Sternberg 495ba1ca37eSChristoph Hellwig sg_init_table(iod->sg, req->nr_phys_segments); 496ba1ca37eSChristoph Hellwig iod->nents = blk_rq_map_sg(q, req, iod->sg); 497ba1ca37eSChristoph Hellwig if (!iod->nents) 498ba1ca37eSChristoph Hellwig goto out; 499ba1ca37eSChristoph Hellwig 500ba1ca37eSChristoph Hellwig ret = BLK_MQ_RQ_QUEUE_BUSY; 501ba1ca37eSChristoph Hellwig if (!dma_map_sg(dev->dev, iod->sg, iod->nents, dma_dir)) 502ba1ca37eSChristoph Hellwig goto out; 503ba1ca37eSChristoph Hellwig 50403b5929eSMing Lin if (!nvme_setup_prps(dev, req, size)) 505ba1ca37eSChristoph Hellwig goto out_unmap; 506ba1ca37eSChristoph Hellwig 507ba1ca37eSChristoph Hellwig ret = BLK_MQ_RQ_QUEUE_ERROR; 508ba1ca37eSChristoph Hellwig if (blk_integrity_rq(req)) { 509ba1ca37eSChristoph Hellwig if (blk_rq_count_integrity_sg(q, req->bio) != 1) 510ba1ca37eSChristoph Hellwig goto out_unmap; 511ba1ca37eSChristoph Hellwig 512bf684057SChristoph Hellwig sg_init_table(&iod->meta_sg, 1); 513bf684057SChristoph Hellwig if (blk_rq_map_integrity_sg(q, req->bio, &iod->meta_sg) != 1) 514ba1ca37eSChristoph Hellwig goto out_unmap; 515ba1ca37eSChristoph Hellwig 516ba1ca37eSChristoph Hellwig if (rq_data_dir(req)) 517ba1ca37eSChristoph Hellwig nvme_dif_remap(req, nvme_dif_prep); 518ba1ca37eSChristoph Hellwig 519bf684057SChristoph Hellwig if (!dma_map_sg(dev->dev, &iod->meta_sg, 1, dma_dir)) 520ba1ca37eSChristoph Hellwig goto out_unmap; 52157dacad5SJay Sternberg } 52257dacad5SJay Sternberg 523ba1ca37eSChristoph Hellwig cmnd->rw.prp1 = cpu_to_le64(sg_dma_address(iod->sg)); 524ba1ca37eSChristoph Hellwig cmnd->rw.prp2 = cpu_to_le64(iod->first_dma); 525ba1ca37eSChristoph Hellwig if (blk_integrity_rq(req)) 526bf684057SChristoph Hellwig cmnd->rw.metadata = cpu_to_le64(sg_dma_address(&iod->meta_sg)); 527ba1ca37eSChristoph Hellwig return BLK_MQ_RQ_QUEUE_OK; 528ba1ca37eSChristoph Hellwig 529ba1ca37eSChristoph Hellwig out_unmap: 530ba1ca37eSChristoph Hellwig dma_unmap_sg(dev->dev, iod->sg, iod->nents, dma_dir); 531ba1ca37eSChristoph Hellwig out: 532ba1ca37eSChristoph Hellwig return ret; 53357dacad5SJay Sternberg } 53457dacad5SJay Sternberg 535f4800d6dSChristoph Hellwig static void nvme_unmap_data(struct nvme_dev *dev, struct request *req) 536d4f6c3abSChristoph Hellwig { 537f4800d6dSChristoph Hellwig struct nvme_iod *iod = blk_mq_rq_to_pdu(req); 538d4f6c3abSChristoph Hellwig enum dma_data_direction dma_dir = rq_data_dir(req) ? 539d4f6c3abSChristoph Hellwig DMA_TO_DEVICE : DMA_FROM_DEVICE; 540d4f6c3abSChristoph Hellwig 541d4f6c3abSChristoph Hellwig if (iod->nents) { 542d4f6c3abSChristoph Hellwig dma_unmap_sg(dev->dev, iod->sg, iod->nents, dma_dir); 543d4f6c3abSChristoph Hellwig if (blk_integrity_rq(req)) { 544d4f6c3abSChristoph Hellwig if (!rq_data_dir(req)) 545d4f6c3abSChristoph Hellwig nvme_dif_remap(req, nvme_dif_complete); 546bf684057SChristoph Hellwig dma_unmap_sg(dev->dev, &iod->meta_sg, 1, dma_dir); 547d4f6c3abSChristoph Hellwig } 548d4f6c3abSChristoph Hellwig } 549d4f6c3abSChristoph Hellwig 550f4800d6dSChristoph Hellwig nvme_free_iod(dev, req); 55157dacad5SJay Sternberg } 55257dacad5SJay Sternberg 55357dacad5SJay Sternberg /* 55457dacad5SJay Sternberg * NOTE: ns is NULL when called on the admin queue. 55557dacad5SJay Sternberg */ 55657dacad5SJay Sternberg static int nvme_queue_rq(struct blk_mq_hw_ctx *hctx, 55757dacad5SJay Sternberg const struct blk_mq_queue_data *bd) 55857dacad5SJay Sternberg { 55957dacad5SJay Sternberg struct nvme_ns *ns = hctx->queue->queuedata; 56057dacad5SJay Sternberg struct nvme_queue *nvmeq = hctx->driver_data; 56157dacad5SJay Sternberg struct nvme_dev *dev = nvmeq->dev; 56257dacad5SJay Sternberg struct request *req = bd->rq; 563ba1ca37eSChristoph Hellwig struct nvme_command cmnd; 56458b45602SMing Lin unsigned map_len; 565ba1ca37eSChristoph Hellwig int ret = BLK_MQ_RQ_QUEUE_OK; 56657dacad5SJay Sternberg 56757dacad5SJay Sternberg /* 56857dacad5SJay Sternberg * If formated with metadata, require the block layer provide a buffer 56957dacad5SJay Sternberg * unless this namespace is formated such that the metadata can be 57057dacad5SJay Sternberg * stripped/generated by the controller with PRACT=1. 57157dacad5SJay Sternberg */ 57257dacad5SJay Sternberg if (ns && ns->ms && !blk_integrity_rq(req)) { 57357dacad5SJay Sternberg if (!(ns->pi_type && ns->ms == 8) && 57457dacad5SJay Sternberg req->cmd_type != REQ_TYPE_DRV_PRIV) { 575eee417b0SChristoph Hellwig blk_mq_end_request(req, -EFAULT); 57657dacad5SJay Sternberg return BLK_MQ_RQ_QUEUE_OK; 57757dacad5SJay Sternberg } 57857dacad5SJay Sternberg } 57957dacad5SJay Sternberg 58058b45602SMing Lin map_len = nvme_map_len(req); 58158b45602SMing Lin ret = nvme_init_iod(req, map_len, dev); 582f4800d6dSChristoph Hellwig if (ret) 583f4800d6dSChristoph Hellwig return ret; 58457dacad5SJay Sternberg 5858093f7caSMing Lin ret = nvme_setup_cmd(ns, req, &cmnd); 58603b5929eSMing Lin if (ret) 58703b5929eSMing Lin goto out; 58857dacad5SJay Sternberg 589ba1ca37eSChristoph Hellwig if (req->nr_phys_segments) 59003b5929eSMing Lin ret = nvme_map_data(dev, req, map_len, &cmnd); 591ba1ca37eSChristoph Hellwig 592ba1ca37eSChristoph Hellwig if (ret) 593ba1ca37eSChristoph Hellwig goto out; 594ba1ca37eSChristoph Hellwig 595ba1ca37eSChristoph Hellwig cmnd.common.command_id = req->tag; 596aae239e1SChristoph Hellwig blk_mq_start_request(req); 597ba1ca37eSChristoph Hellwig 598ba1ca37eSChristoph Hellwig spin_lock_irq(&nvmeq->q_lock); 599ae1fba20SKeith Busch if (unlikely(nvmeq->cq_vector < 0)) { 60069d9a99cSKeith Busch if (ns && !test_bit(NVME_NS_DEAD, &ns->flags)) 601ae1fba20SKeith Busch ret = BLK_MQ_RQ_QUEUE_BUSY; 60269d9a99cSKeith Busch else 60369d9a99cSKeith Busch ret = BLK_MQ_RQ_QUEUE_ERROR; 604ae1fba20SKeith Busch spin_unlock_irq(&nvmeq->q_lock); 605ae1fba20SKeith Busch goto out; 606ae1fba20SKeith Busch } 607ba1ca37eSChristoph Hellwig __nvme_submit_cmd(nvmeq, &cmnd); 60857dacad5SJay Sternberg nvme_process_cq(nvmeq); 60957dacad5SJay Sternberg spin_unlock_irq(&nvmeq->q_lock); 61057dacad5SJay Sternberg return BLK_MQ_RQ_QUEUE_OK; 611ba1ca37eSChristoph Hellwig out: 612f4800d6dSChristoph Hellwig nvme_free_iod(dev, req); 613ba1ca37eSChristoph Hellwig return ret; 61457dacad5SJay Sternberg } 61557dacad5SJay Sternberg 616eee417b0SChristoph Hellwig static void nvme_complete_rq(struct request *req) 617eee417b0SChristoph Hellwig { 618f4800d6dSChristoph Hellwig struct nvme_iod *iod = blk_mq_rq_to_pdu(req); 619f4800d6dSChristoph Hellwig struct nvme_dev *dev = iod->nvmeq->dev; 620eee417b0SChristoph Hellwig int error = 0; 621eee417b0SChristoph Hellwig 622f4800d6dSChristoph Hellwig nvme_unmap_data(dev, req); 623eee417b0SChristoph Hellwig 624eee417b0SChristoph Hellwig if (unlikely(req->errors)) { 625eee417b0SChristoph Hellwig if (nvme_req_needs_retry(req, req->errors)) { 626eee417b0SChristoph Hellwig nvme_requeue_req(req); 627eee417b0SChristoph Hellwig return; 628eee417b0SChristoph Hellwig } 629eee417b0SChristoph Hellwig 630eee417b0SChristoph Hellwig if (req->cmd_type == REQ_TYPE_DRV_PRIV) 631eee417b0SChristoph Hellwig error = req->errors; 632eee417b0SChristoph Hellwig else 633eee417b0SChristoph Hellwig error = nvme_error_status(req->errors); 634eee417b0SChristoph Hellwig } 635eee417b0SChristoph Hellwig 636f4800d6dSChristoph Hellwig if (unlikely(iod->aborted)) { 6371b3c47c1SSagi Grimberg dev_warn(dev->ctrl.device, 638eee417b0SChristoph Hellwig "completing aborted command with status: %04x\n", 639eee417b0SChristoph Hellwig req->errors); 640eee417b0SChristoph Hellwig } 641eee417b0SChristoph Hellwig 642eee417b0SChristoph Hellwig blk_mq_end_request(req, error); 64357dacad5SJay Sternberg } 64457dacad5SJay Sternberg 645d783e0bdSMarta Rybczynska /* We read the CQE phase first to check if the rest of the entry is valid */ 646d783e0bdSMarta Rybczynska static inline bool nvme_cqe_valid(struct nvme_queue *nvmeq, u16 head, 647d783e0bdSMarta Rybczynska u16 phase) 648d783e0bdSMarta Rybczynska { 649d783e0bdSMarta Rybczynska return (le16_to_cpu(nvmeq->cqes[head].status) & 1) == phase; 650d783e0bdSMarta Rybczynska } 651d783e0bdSMarta Rybczynska 652a0fa9647SJens Axboe static void __nvme_process_cq(struct nvme_queue *nvmeq, unsigned int *tag) 65357dacad5SJay Sternberg { 65457dacad5SJay Sternberg u16 head, phase; 65557dacad5SJay Sternberg 65657dacad5SJay Sternberg head = nvmeq->cq_head; 65757dacad5SJay Sternberg phase = nvmeq->cq_phase; 65857dacad5SJay Sternberg 659d783e0bdSMarta Rybczynska while (nvme_cqe_valid(nvmeq, head, phase)) { 66057dacad5SJay Sternberg struct nvme_completion cqe = nvmeq->cqes[head]; 661eee417b0SChristoph Hellwig struct request *req; 662adf68f21SChristoph Hellwig 66357dacad5SJay Sternberg if (++head == nvmeq->q_depth) { 66457dacad5SJay Sternberg head = 0; 66557dacad5SJay Sternberg phase = !phase; 66657dacad5SJay Sternberg } 667adf68f21SChristoph Hellwig 668a0fa9647SJens Axboe if (tag && *tag == cqe.command_id) 669a0fa9647SJens Axboe *tag = -1; 670adf68f21SChristoph Hellwig 671aae239e1SChristoph Hellwig if (unlikely(cqe.command_id >= nvmeq->q_depth)) { 6721b3c47c1SSagi Grimberg dev_warn(nvmeq->dev->ctrl.device, 673aae239e1SChristoph Hellwig "invalid id %d completed on queue %d\n", 674aae239e1SChristoph Hellwig cqe.command_id, le16_to_cpu(cqe.sq_id)); 675aae239e1SChristoph Hellwig continue; 676aae239e1SChristoph Hellwig } 677aae239e1SChristoph Hellwig 678adf68f21SChristoph Hellwig /* 679adf68f21SChristoph Hellwig * AEN requests are special as they don't time out and can 680adf68f21SChristoph Hellwig * survive any kind of queue freeze and often don't respond to 681adf68f21SChristoph Hellwig * aborts. We don't even bother to allocate a struct request 682adf68f21SChristoph Hellwig * for them but rather special case them here. 683adf68f21SChristoph Hellwig */ 684adf68f21SChristoph Hellwig if (unlikely(nvmeq->qid == 0 && 685adf68f21SChristoph Hellwig cqe.command_id >= NVME_AQ_BLKMQ_DEPTH)) { 686f866fc42SChristoph Hellwig nvme_complete_async_event(&nvmeq->dev->ctrl, &cqe); 687adf68f21SChristoph Hellwig continue; 688adf68f21SChristoph Hellwig } 689adf68f21SChristoph Hellwig 690eee417b0SChristoph Hellwig req = blk_mq_tag_to_rq(*nvmeq->tags, cqe.command_id); 6911cb3cce5SChristoph Hellwig if (req->cmd_type == REQ_TYPE_DRV_PRIV && req->special) 6921cb3cce5SChristoph Hellwig memcpy(req->special, &cqe, sizeof(cqe)); 693d783e0bdSMarta Rybczynska blk_mq_complete_request(req, le16_to_cpu(cqe.status) >> 1); 694eee417b0SChristoph Hellwig 69557dacad5SJay Sternberg } 69657dacad5SJay Sternberg 69757dacad5SJay Sternberg /* If the controller ignores the cq head doorbell and continuously 69857dacad5SJay Sternberg * writes to the queue, it is theoretically possible to wrap around 69957dacad5SJay Sternberg * the queue twice and mistakenly return IRQ_NONE. Linux only 70057dacad5SJay Sternberg * requires that 0.1% of your interrupts are handled, so this isn't 70157dacad5SJay Sternberg * a big problem. 70257dacad5SJay Sternberg */ 70357dacad5SJay Sternberg if (head == nvmeq->cq_head && phase == nvmeq->cq_phase) 704a0fa9647SJens Axboe return; 70557dacad5SJay Sternberg 706604e8c8dSKeith Busch if (likely(nvmeq->cq_vector >= 0)) 70757dacad5SJay Sternberg writel(head, nvmeq->q_db + nvmeq->dev->db_stride); 70857dacad5SJay Sternberg nvmeq->cq_head = head; 70957dacad5SJay Sternberg nvmeq->cq_phase = phase; 71057dacad5SJay Sternberg 71157dacad5SJay Sternberg nvmeq->cqe_seen = 1; 712a0fa9647SJens Axboe } 713a0fa9647SJens Axboe 714a0fa9647SJens Axboe static void nvme_process_cq(struct nvme_queue *nvmeq) 715a0fa9647SJens Axboe { 716a0fa9647SJens Axboe __nvme_process_cq(nvmeq, NULL); 71757dacad5SJay Sternberg } 71857dacad5SJay Sternberg 71957dacad5SJay Sternberg static irqreturn_t nvme_irq(int irq, void *data) 72057dacad5SJay Sternberg { 72157dacad5SJay Sternberg irqreturn_t result; 72257dacad5SJay Sternberg struct nvme_queue *nvmeq = data; 72357dacad5SJay Sternberg spin_lock(&nvmeq->q_lock); 72457dacad5SJay Sternberg nvme_process_cq(nvmeq); 72557dacad5SJay Sternberg result = nvmeq->cqe_seen ? IRQ_HANDLED : IRQ_NONE; 72657dacad5SJay Sternberg nvmeq->cqe_seen = 0; 72757dacad5SJay Sternberg spin_unlock(&nvmeq->q_lock); 72857dacad5SJay Sternberg return result; 72957dacad5SJay Sternberg } 73057dacad5SJay Sternberg 73157dacad5SJay Sternberg static irqreturn_t nvme_irq_check(int irq, void *data) 73257dacad5SJay Sternberg { 73357dacad5SJay Sternberg struct nvme_queue *nvmeq = data; 734d783e0bdSMarta Rybczynska if (nvme_cqe_valid(nvmeq, nvmeq->cq_head, nvmeq->cq_phase)) 73557dacad5SJay Sternberg return IRQ_WAKE_THREAD; 736d783e0bdSMarta Rybczynska return IRQ_NONE; 73757dacad5SJay Sternberg } 73857dacad5SJay Sternberg 739a0fa9647SJens Axboe static int nvme_poll(struct blk_mq_hw_ctx *hctx, unsigned int tag) 740a0fa9647SJens Axboe { 741a0fa9647SJens Axboe struct nvme_queue *nvmeq = hctx->driver_data; 742a0fa9647SJens Axboe 743d783e0bdSMarta Rybczynska if (nvme_cqe_valid(nvmeq, nvmeq->cq_head, nvmeq->cq_phase)) { 744a0fa9647SJens Axboe spin_lock_irq(&nvmeq->q_lock); 745a0fa9647SJens Axboe __nvme_process_cq(nvmeq, &tag); 746a0fa9647SJens Axboe spin_unlock_irq(&nvmeq->q_lock); 747a0fa9647SJens Axboe 748a0fa9647SJens Axboe if (tag == -1) 749a0fa9647SJens Axboe return 1; 750a0fa9647SJens Axboe } 751a0fa9647SJens Axboe 752a0fa9647SJens Axboe return 0; 753a0fa9647SJens Axboe } 754a0fa9647SJens Axboe 755f866fc42SChristoph Hellwig static void nvme_pci_submit_async_event(struct nvme_ctrl *ctrl, int aer_idx) 75657dacad5SJay Sternberg { 757f866fc42SChristoph Hellwig struct nvme_dev *dev = to_nvme_dev(ctrl); 7589396dec9SChristoph Hellwig struct nvme_queue *nvmeq = dev->queues[0]; 75957dacad5SJay Sternberg struct nvme_command c; 76057dacad5SJay Sternberg 76157dacad5SJay Sternberg memset(&c, 0, sizeof(c)); 76257dacad5SJay Sternberg c.common.opcode = nvme_admin_async_event; 763f866fc42SChristoph Hellwig c.common.command_id = NVME_AQ_BLKMQ_DEPTH + aer_idx; 76457dacad5SJay Sternberg 7659396dec9SChristoph Hellwig spin_lock_irq(&nvmeq->q_lock); 7669396dec9SChristoph Hellwig __nvme_submit_cmd(nvmeq, &c); 7679396dec9SChristoph Hellwig spin_unlock_irq(&nvmeq->q_lock); 76857dacad5SJay Sternberg } 76957dacad5SJay Sternberg 77057dacad5SJay Sternberg static int adapter_delete_queue(struct nvme_dev *dev, u8 opcode, u16 id) 77157dacad5SJay Sternberg { 77257dacad5SJay Sternberg struct nvme_command c; 77357dacad5SJay Sternberg 77457dacad5SJay Sternberg memset(&c, 0, sizeof(c)); 77557dacad5SJay Sternberg c.delete_queue.opcode = opcode; 77657dacad5SJay Sternberg c.delete_queue.qid = cpu_to_le16(id); 77757dacad5SJay Sternberg 7781c63dc66SChristoph Hellwig return nvme_submit_sync_cmd(dev->ctrl.admin_q, &c, NULL, 0); 77957dacad5SJay Sternberg } 78057dacad5SJay Sternberg 78157dacad5SJay Sternberg static int adapter_alloc_cq(struct nvme_dev *dev, u16 qid, 78257dacad5SJay Sternberg struct nvme_queue *nvmeq) 78357dacad5SJay Sternberg { 78457dacad5SJay Sternberg struct nvme_command c; 78557dacad5SJay Sternberg int flags = NVME_QUEUE_PHYS_CONTIG | NVME_CQ_IRQ_ENABLED; 78657dacad5SJay Sternberg 78757dacad5SJay Sternberg /* 78857dacad5SJay Sternberg * Note: we (ab)use the fact the the prp fields survive if no data 78957dacad5SJay Sternberg * is attached to the request. 79057dacad5SJay Sternberg */ 79157dacad5SJay Sternberg memset(&c, 0, sizeof(c)); 79257dacad5SJay Sternberg c.create_cq.opcode = nvme_admin_create_cq; 79357dacad5SJay Sternberg c.create_cq.prp1 = cpu_to_le64(nvmeq->cq_dma_addr); 79457dacad5SJay Sternberg c.create_cq.cqid = cpu_to_le16(qid); 79557dacad5SJay Sternberg c.create_cq.qsize = cpu_to_le16(nvmeq->q_depth - 1); 79657dacad5SJay Sternberg c.create_cq.cq_flags = cpu_to_le16(flags); 79757dacad5SJay Sternberg c.create_cq.irq_vector = cpu_to_le16(nvmeq->cq_vector); 79857dacad5SJay Sternberg 7991c63dc66SChristoph Hellwig return nvme_submit_sync_cmd(dev->ctrl.admin_q, &c, NULL, 0); 80057dacad5SJay Sternberg } 80157dacad5SJay Sternberg 80257dacad5SJay Sternberg static int adapter_alloc_sq(struct nvme_dev *dev, u16 qid, 80357dacad5SJay Sternberg struct nvme_queue *nvmeq) 80457dacad5SJay Sternberg { 80557dacad5SJay Sternberg struct nvme_command c; 80657dacad5SJay Sternberg int flags = NVME_QUEUE_PHYS_CONTIG | NVME_SQ_PRIO_MEDIUM; 80757dacad5SJay Sternberg 80857dacad5SJay Sternberg /* 80957dacad5SJay Sternberg * Note: we (ab)use the fact the the prp fields survive if no data 81057dacad5SJay Sternberg * is attached to the request. 81157dacad5SJay Sternberg */ 81257dacad5SJay Sternberg memset(&c, 0, sizeof(c)); 81357dacad5SJay Sternberg c.create_sq.opcode = nvme_admin_create_sq; 81457dacad5SJay Sternberg c.create_sq.prp1 = cpu_to_le64(nvmeq->sq_dma_addr); 81557dacad5SJay Sternberg c.create_sq.sqid = cpu_to_le16(qid); 81657dacad5SJay Sternberg c.create_sq.qsize = cpu_to_le16(nvmeq->q_depth - 1); 81757dacad5SJay Sternberg c.create_sq.sq_flags = cpu_to_le16(flags); 81857dacad5SJay Sternberg c.create_sq.cqid = cpu_to_le16(qid); 81957dacad5SJay Sternberg 8201c63dc66SChristoph Hellwig return nvme_submit_sync_cmd(dev->ctrl.admin_q, &c, NULL, 0); 82157dacad5SJay Sternberg } 82257dacad5SJay Sternberg 82357dacad5SJay Sternberg static int adapter_delete_cq(struct nvme_dev *dev, u16 cqid) 82457dacad5SJay Sternberg { 82557dacad5SJay Sternberg return adapter_delete_queue(dev, nvme_admin_delete_cq, cqid); 82657dacad5SJay Sternberg } 82757dacad5SJay Sternberg 82857dacad5SJay Sternberg static int adapter_delete_sq(struct nvme_dev *dev, u16 sqid) 82957dacad5SJay Sternberg { 83057dacad5SJay Sternberg return adapter_delete_queue(dev, nvme_admin_delete_sq, sqid); 83157dacad5SJay Sternberg } 83257dacad5SJay Sternberg 833e7a2a87dSChristoph Hellwig static void abort_endio(struct request *req, int error) 83457dacad5SJay Sternberg { 835f4800d6dSChristoph Hellwig struct nvme_iod *iod = blk_mq_rq_to_pdu(req); 836f4800d6dSChristoph Hellwig struct nvme_queue *nvmeq = iod->nvmeq; 837e7a2a87dSChristoph Hellwig u16 status = req->errors; 83857dacad5SJay Sternberg 8391cb3cce5SChristoph Hellwig dev_warn(nvmeq->dev->ctrl.device, "Abort status: 0x%x", status); 840e7a2a87dSChristoph Hellwig atomic_inc(&nvmeq->dev->ctrl.abort_limit); 841e7a2a87dSChristoph Hellwig blk_mq_free_request(req); 84257dacad5SJay Sternberg } 84357dacad5SJay Sternberg 84431c7c7d2SChristoph Hellwig static enum blk_eh_timer_return nvme_timeout(struct request *req, bool reserved) 84557dacad5SJay Sternberg { 846f4800d6dSChristoph Hellwig struct nvme_iod *iod = blk_mq_rq_to_pdu(req); 847f4800d6dSChristoph Hellwig struct nvme_queue *nvmeq = iod->nvmeq; 84857dacad5SJay Sternberg struct nvme_dev *dev = nvmeq->dev; 84957dacad5SJay Sternberg struct request *abort_req; 85057dacad5SJay Sternberg struct nvme_command cmd; 85157dacad5SJay Sternberg 85231c7c7d2SChristoph Hellwig /* 853fd634f41SChristoph Hellwig * Shutdown immediately if controller times out while starting. The 854fd634f41SChristoph Hellwig * reset work will see the pci device disabled when it gets the forced 855fd634f41SChristoph Hellwig * cancellation error. All outstanding requests are completed on 856fd634f41SChristoph Hellwig * shutdown, so we return BLK_EH_HANDLED. 857fd634f41SChristoph Hellwig */ 858bb8d261eSChristoph Hellwig if (dev->ctrl.state == NVME_CTRL_RESETTING) { 8591b3c47c1SSagi Grimberg dev_warn(dev->ctrl.device, 860fd634f41SChristoph Hellwig "I/O %d QID %d timeout, disable controller\n", 861fd634f41SChristoph Hellwig req->tag, nvmeq->qid); 862a5cdb68cSKeith Busch nvme_dev_disable(dev, false); 863fd634f41SChristoph Hellwig req->errors = NVME_SC_CANCELLED; 864fd634f41SChristoph Hellwig return BLK_EH_HANDLED; 865fd634f41SChristoph Hellwig } 866fd634f41SChristoph Hellwig 867fd634f41SChristoph Hellwig /* 868e1569a16SKeith Busch * Shutdown the controller immediately and schedule a reset if the 869e1569a16SKeith Busch * command was already aborted once before and still hasn't been 870e1569a16SKeith Busch * returned to the driver, or if this is the admin queue. 87131c7c7d2SChristoph Hellwig */ 872f4800d6dSChristoph Hellwig if (!nvmeq->qid || iod->aborted) { 8731b3c47c1SSagi Grimberg dev_warn(dev->ctrl.device, 87457dacad5SJay Sternberg "I/O %d QID %d timeout, reset controller\n", 87557dacad5SJay Sternberg req->tag, nvmeq->qid); 876a5cdb68cSKeith Busch nvme_dev_disable(dev, false); 877e1569a16SKeith Busch queue_work(nvme_workq, &dev->reset_work); 878e1569a16SKeith Busch 879e1569a16SKeith Busch /* 880e1569a16SKeith Busch * Mark the request as handled, since the inline shutdown 881e1569a16SKeith Busch * forces all outstanding requests to complete. 882e1569a16SKeith Busch */ 883e1569a16SKeith Busch req->errors = NVME_SC_CANCELLED; 884e1569a16SKeith Busch return BLK_EH_HANDLED; 88557dacad5SJay Sternberg } 88657dacad5SJay Sternberg 887f4800d6dSChristoph Hellwig iod->aborted = 1; 88857dacad5SJay Sternberg 889e7a2a87dSChristoph Hellwig if (atomic_dec_return(&dev->ctrl.abort_limit) < 0) { 890e7a2a87dSChristoph Hellwig atomic_inc(&dev->ctrl.abort_limit); 891e7a2a87dSChristoph Hellwig return BLK_EH_RESET_TIMER; 892e7a2a87dSChristoph Hellwig } 89357dacad5SJay Sternberg 89457dacad5SJay Sternberg memset(&cmd, 0, sizeof(cmd)); 89557dacad5SJay Sternberg cmd.abort.opcode = nvme_admin_abort_cmd; 89657dacad5SJay Sternberg cmd.abort.cid = req->tag; 89757dacad5SJay Sternberg cmd.abort.sqid = cpu_to_le16(nvmeq->qid); 89857dacad5SJay Sternberg 8991b3c47c1SSagi Grimberg dev_warn(nvmeq->dev->ctrl.device, 9001b3c47c1SSagi Grimberg "I/O %d QID %d timeout, aborting\n", 90157dacad5SJay Sternberg req->tag, nvmeq->qid); 902e7a2a87dSChristoph Hellwig 903e7a2a87dSChristoph Hellwig abort_req = nvme_alloc_request(dev->ctrl.admin_q, &cmd, 9046f3b0e8bSChristoph Hellwig BLK_MQ_REQ_NOWAIT); 9056bf25d16SChristoph Hellwig if (IS_ERR(abort_req)) { 9066bf25d16SChristoph Hellwig atomic_inc(&dev->ctrl.abort_limit); 90731c7c7d2SChristoph Hellwig return BLK_EH_RESET_TIMER; 90857dacad5SJay Sternberg } 90957dacad5SJay Sternberg 910e7a2a87dSChristoph Hellwig abort_req->timeout = ADMIN_TIMEOUT; 911e7a2a87dSChristoph Hellwig abort_req->end_io_data = NULL; 912e7a2a87dSChristoph Hellwig blk_execute_rq_nowait(abort_req->q, NULL, abort_req, 0, abort_endio); 91357dacad5SJay Sternberg 91457dacad5SJay Sternberg /* 91557dacad5SJay Sternberg * The aborted req will be completed on receiving the abort req. 91657dacad5SJay Sternberg * We enable the timer again. If hit twice, it'll cause a device reset, 91757dacad5SJay Sternberg * as the device then is in a faulty state. 91857dacad5SJay Sternberg */ 91957dacad5SJay Sternberg return BLK_EH_RESET_TIMER; 92057dacad5SJay Sternberg } 92157dacad5SJay Sternberg 92257dacad5SJay Sternberg static void nvme_free_queue(struct nvme_queue *nvmeq) 92357dacad5SJay Sternberg { 92457dacad5SJay Sternberg dma_free_coherent(nvmeq->q_dmadev, CQ_SIZE(nvmeq->q_depth), 92557dacad5SJay Sternberg (void *)nvmeq->cqes, nvmeq->cq_dma_addr); 92657dacad5SJay Sternberg if (nvmeq->sq_cmds) 92757dacad5SJay Sternberg dma_free_coherent(nvmeq->q_dmadev, SQ_SIZE(nvmeq->q_depth), 92857dacad5SJay Sternberg nvmeq->sq_cmds, nvmeq->sq_dma_addr); 92957dacad5SJay Sternberg kfree(nvmeq); 93057dacad5SJay Sternberg } 93157dacad5SJay Sternberg 93257dacad5SJay Sternberg static void nvme_free_queues(struct nvme_dev *dev, int lowest) 93357dacad5SJay Sternberg { 93457dacad5SJay Sternberg int i; 93557dacad5SJay Sternberg 93657dacad5SJay Sternberg for (i = dev->queue_count - 1; i >= lowest; i--) { 93757dacad5SJay Sternberg struct nvme_queue *nvmeq = dev->queues[i]; 93857dacad5SJay Sternberg dev->queue_count--; 93957dacad5SJay Sternberg dev->queues[i] = NULL; 94057dacad5SJay Sternberg nvme_free_queue(nvmeq); 94157dacad5SJay Sternberg } 94257dacad5SJay Sternberg } 94357dacad5SJay Sternberg 94457dacad5SJay Sternberg /** 94557dacad5SJay Sternberg * nvme_suspend_queue - put queue into suspended state 94657dacad5SJay Sternberg * @nvmeq - queue to suspend 94757dacad5SJay Sternberg */ 94857dacad5SJay Sternberg static int nvme_suspend_queue(struct nvme_queue *nvmeq) 94957dacad5SJay Sternberg { 95057dacad5SJay Sternberg int vector; 95157dacad5SJay Sternberg 95257dacad5SJay Sternberg spin_lock_irq(&nvmeq->q_lock); 95357dacad5SJay Sternberg if (nvmeq->cq_vector == -1) { 95457dacad5SJay Sternberg spin_unlock_irq(&nvmeq->q_lock); 95557dacad5SJay Sternberg return 1; 95657dacad5SJay Sternberg } 95757dacad5SJay Sternberg vector = nvmeq->dev->entry[nvmeq->cq_vector].vector; 95857dacad5SJay Sternberg nvmeq->dev->online_queues--; 95957dacad5SJay Sternberg nvmeq->cq_vector = -1; 96057dacad5SJay Sternberg spin_unlock_irq(&nvmeq->q_lock); 96157dacad5SJay Sternberg 9621c63dc66SChristoph Hellwig if (!nvmeq->qid && nvmeq->dev->ctrl.admin_q) 96325646264SKeith Busch blk_mq_stop_hw_queues(nvmeq->dev->ctrl.admin_q); 96457dacad5SJay Sternberg 96557dacad5SJay Sternberg irq_set_affinity_hint(vector, NULL); 96657dacad5SJay Sternberg free_irq(vector, nvmeq); 96757dacad5SJay Sternberg 96857dacad5SJay Sternberg return 0; 96957dacad5SJay Sternberg } 97057dacad5SJay Sternberg 971a5cdb68cSKeith Busch static void nvme_disable_admin_queue(struct nvme_dev *dev, bool shutdown) 97257dacad5SJay Sternberg { 973a5cdb68cSKeith Busch struct nvme_queue *nvmeq = dev->queues[0]; 97457dacad5SJay Sternberg 97557dacad5SJay Sternberg if (!nvmeq) 97657dacad5SJay Sternberg return; 97757dacad5SJay Sternberg if (nvme_suspend_queue(nvmeq)) 97857dacad5SJay Sternberg return; 97957dacad5SJay Sternberg 980a5cdb68cSKeith Busch if (shutdown) 981a5cdb68cSKeith Busch nvme_shutdown_ctrl(&dev->ctrl); 982a5cdb68cSKeith Busch else 983a5cdb68cSKeith Busch nvme_disable_ctrl(&dev->ctrl, lo_hi_readq( 984a5cdb68cSKeith Busch dev->bar + NVME_REG_CAP)); 98557dacad5SJay Sternberg 98657dacad5SJay Sternberg spin_lock_irq(&nvmeq->q_lock); 98757dacad5SJay Sternberg nvme_process_cq(nvmeq); 98857dacad5SJay Sternberg spin_unlock_irq(&nvmeq->q_lock); 98957dacad5SJay Sternberg } 99057dacad5SJay Sternberg 99157dacad5SJay Sternberg static int nvme_cmb_qdepth(struct nvme_dev *dev, int nr_io_queues, 99257dacad5SJay Sternberg int entry_size) 99357dacad5SJay Sternberg { 99457dacad5SJay Sternberg int q_depth = dev->q_depth; 9955fd4ce1bSChristoph Hellwig unsigned q_size_aligned = roundup(q_depth * entry_size, 9965fd4ce1bSChristoph Hellwig dev->ctrl.page_size); 99757dacad5SJay Sternberg 99857dacad5SJay Sternberg if (q_size_aligned * nr_io_queues > dev->cmb_size) { 99957dacad5SJay Sternberg u64 mem_per_q = div_u64(dev->cmb_size, nr_io_queues); 10005fd4ce1bSChristoph Hellwig mem_per_q = round_down(mem_per_q, dev->ctrl.page_size); 100157dacad5SJay Sternberg q_depth = div_u64(mem_per_q, entry_size); 100257dacad5SJay Sternberg 100357dacad5SJay Sternberg /* 100457dacad5SJay Sternberg * Ensure the reduced q_depth is above some threshold where it 100557dacad5SJay Sternberg * would be better to map queues in system memory with the 100657dacad5SJay Sternberg * original depth 100757dacad5SJay Sternberg */ 100857dacad5SJay Sternberg if (q_depth < 64) 100957dacad5SJay Sternberg return -ENOMEM; 101057dacad5SJay Sternberg } 101157dacad5SJay Sternberg 101257dacad5SJay Sternberg return q_depth; 101357dacad5SJay Sternberg } 101457dacad5SJay Sternberg 101557dacad5SJay Sternberg static int nvme_alloc_sq_cmds(struct nvme_dev *dev, struct nvme_queue *nvmeq, 101657dacad5SJay Sternberg int qid, int depth) 101757dacad5SJay Sternberg { 101857dacad5SJay Sternberg if (qid && dev->cmb && use_cmb_sqes && NVME_CMB_SQS(dev->cmbsz)) { 10195fd4ce1bSChristoph Hellwig unsigned offset = (qid - 1) * roundup(SQ_SIZE(depth), 10205fd4ce1bSChristoph Hellwig dev->ctrl.page_size); 102157dacad5SJay Sternberg nvmeq->sq_dma_addr = dev->cmb_dma_addr + offset; 102257dacad5SJay Sternberg nvmeq->sq_cmds_io = dev->cmb + offset; 102357dacad5SJay Sternberg } else { 102457dacad5SJay Sternberg nvmeq->sq_cmds = dma_alloc_coherent(dev->dev, SQ_SIZE(depth), 102557dacad5SJay Sternberg &nvmeq->sq_dma_addr, GFP_KERNEL); 102657dacad5SJay Sternberg if (!nvmeq->sq_cmds) 102757dacad5SJay Sternberg return -ENOMEM; 102857dacad5SJay Sternberg } 102957dacad5SJay Sternberg 103057dacad5SJay Sternberg return 0; 103157dacad5SJay Sternberg } 103257dacad5SJay Sternberg 103357dacad5SJay Sternberg static struct nvme_queue *nvme_alloc_queue(struct nvme_dev *dev, int qid, 103457dacad5SJay Sternberg int depth) 103557dacad5SJay Sternberg { 103657dacad5SJay Sternberg struct nvme_queue *nvmeq = kzalloc(sizeof(*nvmeq), GFP_KERNEL); 103757dacad5SJay Sternberg if (!nvmeq) 103857dacad5SJay Sternberg return NULL; 103957dacad5SJay Sternberg 104057dacad5SJay Sternberg nvmeq->cqes = dma_zalloc_coherent(dev->dev, CQ_SIZE(depth), 104157dacad5SJay Sternberg &nvmeq->cq_dma_addr, GFP_KERNEL); 104257dacad5SJay Sternberg if (!nvmeq->cqes) 104357dacad5SJay Sternberg goto free_nvmeq; 104457dacad5SJay Sternberg 104557dacad5SJay Sternberg if (nvme_alloc_sq_cmds(dev, nvmeq, qid, depth)) 104657dacad5SJay Sternberg goto free_cqdma; 104757dacad5SJay Sternberg 104857dacad5SJay Sternberg nvmeq->q_dmadev = dev->dev; 104957dacad5SJay Sternberg nvmeq->dev = dev; 105057dacad5SJay Sternberg snprintf(nvmeq->irqname, sizeof(nvmeq->irqname), "nvme%dq%d", 10511c63dc66SChristoph Hellwig dev->ctrl.instance, qid); 105257dacad5SJay Sternberg spin_lock_init(&nvmeq->q_lock); 105357dacad5SJay Sternberg nvmeq->cq_head = 0; 105457dacad5SJay Sternberg nvmeq->cq_phase = 1; 105557dacad5SJay Sternberg nvmeq->q_db = &dev->dbs[qid * 2 * dev->db_stride]; 105657dacad5SJay Sternberg nvmeq->q_depth = depth; 105757dacad5SJay Sternberg nvmeq->qid = qid; 105857dacad5SJay Sternberg nvmeq->cq_vector = -1; 105957dacad5SJay Sternberg dev->queues[qid] = nvmeq; 106057dacad5SJay Sternberg dev->queue_count++; 106157dacad5SJay Sternberg 106257dacad5SJay Sternberg return nvmeq; 106357dacad5SJay Sternberg 106457dacad5SJay Sternberg free_cqdma: 106557dacad5SJay Sternberg dma_free_coherent(dev->dev, CQ_SIZE(depth), (void *)nvmeq->cqes, 106657dacad5SJay Sternberg nvmeq->cq_dma_addr); 106757dacad5SJay Sternberg free_nvmeq: 106857dacad5SJay Sternberg kfree(nvmeq); 106957dacad5SJay Sternberg return NULL; 107057dacad5SJay Sternberg } 107157dacad5SJay Sternberg 107257dacad5SJay Sternberg static int queue_request_irq(struct nvme_dev *dev, struct nvme_queue *nvmeq, 107357dacad5SJay Sternberg const char *name) 107457dacad5SJay Sternberg { 107557dacad5SJay Sternberg if (use_threaded_interrupts) 107657dacad5SJay Sternberg return request_threaded_irq(dev->entry[nvmeq->cq_vector].vector, 107757dacad5SJay Sternberg nvme_irq_check, nvme_irq, IRQF_SHARED, 107857dacad5SJay Sternberg name, nvmeq); 107957dacad5SJay Sternberg return request_irq(dev->entry[nvmeq->cq_vector].vector, nvme_irq, 108057dacad5SJay Sternberg IRQF_SHARED, name, nvmeq); 108157dacad5SJay Sternberg } 108257dacad5SJay Sternberg 108357dacad5SJay Sternberg static void nvme_init_queue(struct nvme_queue *nvmeq, u16 qid) 108457dacad5SJay Sternberg { 108557dacad5SJay Sternberg struct nvme_dev *dev = nvmeq->dev; 108657dacad5SJay Sternberg 108757dacad5SJay Sternberg spin_lock_irq(&nvmeq->q_lock); 108857dacad5SJay Sternberg nvmeq->sq_tail = 0; 108957dacad5SJay Sternberg nvmeq->cq_head = 0; 109057dacad5SJay Sternberg nvmeq->cq_phase = 1; 109157dacad5SJay Sternberg nvmeq->q_db = &dev->dbs[qid * 2 * dev->db_stride]; 109257dacad5SJay Sternberg memset((void *)nvmeq->cqes, 0, CQ_SIZE(nvmeq->q_depth)); 109357dacad5SJay Sternberg dev->online_queues++; 109457dacad5SJay Sternberg spin_unlock_irq(&nvmeq->q_lock); 109557dacad5SJay Sternberg } 109657dacad5SJay Sternberg 109757dacad5SJay Sternberg static int nvme_create_queue(struct nvme_queue *nvmeq, int qid) 109857dacad5SJay Sternberg { 109957dacad5SJay Sternberg struct nvme_dev *dev = nvmeq->dev; 110057dacad5SJay Sternberg int result; 110157dacad5SJay Sternberg 110257dacad5SJay Sternberg nvmeq->cq_vector = qid - 1; 110357dacad5SJay Sternberg result = adapter_alloc_cq(dev, qid, nvmeq); 110457dacad5SJay Sternberg if (result < 0) 110557dacad5SJay Sternberg return result; 110657dacad5SJay Sternberg 110757dacad5SJay Sternberg result = adapter_alloc_sq(dev, qid, nvmeq); 110857dacad5SJay Sternberg if (result < 0) 110957dacad5SJay Sternberg goto release_cq; 111057dacad5SJay Sternberg 111157dacad5SJay Sternberg result = queue_request_irq(dev, nvmeq, nvmeq->irqname); 111257dacad5SJay Sternberg if (result < 0) 111357dacad5SJay Sternberg goto release_sq; 111457dacad5SJay Sternberg 111557dacad5SJay Sternberg nvme_init_queue(nvmeq, qid); 111657dacad5SJay Sternberg return result; 111757dacad5SJay Sternberg 111857dacad5SJay Sternberg release_sq: 111957dacad5SJay Sternberg adapter_delete_sq(dev, qid); 112057dacad5SJay Sternberg release_cq: 112157dacad5SJay Sternberg adapter_delete_cq(dev, qid); 112257dacad5SJay Sternberg return result; 112357dacad5SJay Sternberg } 112457dacad5SJay Sternberg 112557dacad5SJay Sternberg static struct blk_mq_ops nvme_mq_admin_ops = { 112657dacad5SJay Sternberg .queue_rq = nvme_queue_rq, 1127eee417b0SChristoph Hellwig .complete = nvme_complete_rq, 112857dacad5SJay Sternberg .map_queue = blk_mq_map_queue, 112957dacad5SJay Sternberg .init_hctx = nvme_admin_init_hctx, 113057dacad5SJay Sternberg .exit_hctx = nvme_admin_exit_hctx, 113157dacad5SJay Sternberg .init_request = nvme_admin_init_request, 113257dacad5SJay Sternberg .timeout = nvme_timeout, 113357dacad5SJay Sternberg }; 113457dacad5SJay Sternberg 113557dacad5SJay Sternberg static struct blk_mq_ops nvme_mq_ops = { 113657dacad5SJay Sternberg .queue_rq = nvme_queue_rq, 1137eee417b0SChristoph Hellwig .complete = nvme_complete_rq, 113857dacad5SJay Sternberg .map_queue = blk_mq_map_queue, 113957dacad5SJay Sternberg .init_hctx = nvme_init_hctx, 114057dacad5SJay Sternberg .init_request = nvme_init_request, 114157dacad5SJay Sternberg .timeout = nvme_timeout, 1142a0fa9647SJens Axboe .poll = nvme_poll, 114357dacad5SJay Sternberg }; 114457dacad5SJay Sternberg 114557dacad5SJay Sternberg static void nvme_dev_remove_admin(struct nvme_dev *dev) 114657dacad5SJay Sternberg { 11471c63dc66SChristoph Hellwig if (dev->ctrl.admin_q && !blk_queue_dying(dev->ctrl.admin_q)) { 114869d9a99cSKeith Busch /* 114969d9a99cSKeith Busch * If the controller was reset during removal, it's possible 115069d9a99cSKeith Busch * user requests may be waiting on a stopped queue. Start the 115169d9a99cSKeith Busch * queue to flush these to completion. 115269d9a99cSKeith Busch */ 115369d9a99cSKeith Busch blk_mq_start_stopped_hw_queues(dev->ctrl.admin_q, true); 11541c63dc66SChristoph Hellwig blk_cleanup_queue(dev->ctrl.admin_q); 115557dacad5SJay Sternberg blk_mq_free_tag_set(&dev->admin_tagset); 115657dacad5SJay Sternberg } 115757dacad5SJay Sternberg } 115857dacad5SJay Sternberg 115957dacad5SJay Sternberg static int nvme_alloc_admin_tags(struct nvme_dev *dev) 116057dacad5SJay Sternberg { 11611c63dc66SChristoph Hellwig if (!dev->ctrl.admin_q) { 116257dacad5SJay Sternberg dev->admin_tagset.ops = &nvme_mq_admin_ops; 116357dacad5SJay Sternberg dev->admin_tagset.nr_hw_queues = 1; 1164e3e9d50cSKeith Busch 1165e3e9d50cSKeith Busch /* 1166e3e9d50cSKeith Busch * Subtract one to leave an empty queue entry for 'Full Queue' 1167e3e9d50cSKeith Busch * condition. See NVM-Express 1.2 specification, section 4.1.2. 1168e3e9d50cSKeith Busch */ 1169e3e9d50cSKeith Busch dev->admin_tagset.queue_depth = NVME_AQ_BLKMQ_DEPTH - 1; 117057dacad5SJay Sternberg dev->admin_tagset.timeout = ADMIN_TIMEOUT; 117157dacad5SJay Sternberg dev->admin_tagset.numa_node = dev_to_node(dev->dev); 117257dacad5SJay Sternberg dev->admin_tagset.cmd_size = nvme_cmd_size(dev); 117357dacad5SJay Sternberg dev->admin_tagset.driver_data = dev; 117457dacad5SJay Sternberg 117557dacad5SJay Sternberg if (blk_mq_alloc_tag_set(&dev->admin_tagset)) 117657dacad5SJay Sternberg return -ENOMEM; 117757dacad5SJay Sternberg 11781c63dc66SChristoph Hellwig dev->ctrl.admin_q = blk_mq_init_queue(&dev->admin_tagset); 11791c63dc66SChristoph Hellwig if (IS_ERR(dev->ctrl.admin_q)) { 118057dacad5SJay Sternberg blk_mq_free_tag_set(&dev->admin_tagset); 118157dacad5SJay Sternberg return -ENOMEM; 118257dacad5SJay Sternberg } 11831c63dc66SChristoph Hellwig if (!blk_get_queue(dev->ctrl.admin_q)) { 118457dacad5SJay Sternberg nvme_dev_remove_admin(dev); 11851c63dc66SChristoph Hellwig dev->ctrl.admin_q = NULL; 118657dacad5SJay Sternberg return -ENODEV; 118757dacad5SJay Sternberg } 118857dacad5SJay Sternberg } else 118925646264SKeith Busch blk_mq_start_stopped_hw_queues(dev->ctrl.admin_q, true); 119057dacad5SJay Sternberg 119157dacad5SJay Sternberg return 0; 119257dacad5SJay Sternberg } 119357dacad5SJay Sternberg 119457dacad5SJay Sternberg static int nvme_configure_admin_queue(struct nvme_dev *dev) 119557dacad5SJay Sternberg { 119657dacad5SJay Sternberg int result; 119757dacad5SJay Sternberg u32 aqa; 11987a67cbeaSChristoph Hellwig u64 cap = lo_hi_readq(dev->bar + NVME_REG_CAP); 119957dacad5SJay Sternberg struct nvme_queue *nvmeq; 120057dacad5SJay Sternberg 12017a67cbeaSChristoph Hellwig dev->subsystem = readl(dev->bar + NVME_REG_VS) >= NVME_VS(1, 1) ? 120257dacad5SJay Sternberg NVME_CAP_NSSRC(cap) : 0; 120357dacad5SJay Sternberg 12047a67cbeaSChristoph Hellwig if (dev->subsystem && 12057a67cbeaSChristoph Hellwig (readl(dev->bar + NVME_REG_CSTS) & NVME_CSTS_NSSRO)) 12067a67cbeaSChristoph Hellwig writel(NVME_CSTS_NSSRO, dev->bar + NVME_REG_CSTS); 120757dacad5SJay Sternberg 12085fd4ce1bSChristoph Hellwig result = nvme_disable_ctrl(&dev->ctrl, cap); 120957dacad5SJay Sternberg if (result < 0) 121057dacad5SJay Sternberg return result; 121157dacad5SJay Sternberg 121257dacad5SJay Sternberg nvmeq = dev->queues[0]; 121357dacad5SJay Sternberg if (!nvmeq) { 121457dacad5SJay Sternberg nvmeq = nvme_alloc_queue(dev, 0, NVME_AQ_DEPTH); 121557dacad5SJay Sternberg if (!nvmeq) 121657dacad5SJay Sternberg return -ENOMEM; 121757dacad5SJay Sternberg } 121857dacad5SJay Sternberg 121957dacad5SJay Sternberg aqa = nvmeq->q_depth - 1; 122057dacad5SJay Sternberg aqa |= aqa << 16; 122157dacad5SJay Sternberg 12227a67cbeaSChristoph Hellwig writel(aqa, dev->bar + NVME_REG_AQA); 12237a67cbeaSChristoph Hellwig lo_hi_writeq(nvmeq->sq_dma_addr, dev->bar + NVME_REG_ASQ); 12247a67cbeaSChristoph Hellwig lo_hi_writeq(nvmeq->cq_dma_addr, dev->bar + NVME_REG_ACQ); 122557dacad5SJay Sternberg 12265fd4ce1bSChristoph Hellwig result = nvme_enable_ctrl(&dev->ctrl, cap); 122757dacad5SJay Sternberg if (result) 122857dacad5SJay Sternberg goto free_nvmeq; 122957dacad5SJay Sternberg 123057dacad5SJay Sternberg nvmeq->cq_vector = 0; 123157dacad5SJay Sternberg result = queue_request_irq(dev, nvmeq, nvmeq->irqname); 123257dacad5SJay Sternberg if (result) { 123357dacad5SJay Sternberg nvmeq->cq_vector = -1; 123457dacad5SJay Sternberg goto free_nvmeq; 123557dacad5SJay Sternberg } 123657dacad5SJay Sternberg 123757dacad5SJay Sternberg return result; 123857dacad5SJay Sternberg 123957dacad5SJay Sternberg free_nvmeq: 124057dacad5SJay Sternberg nvme_free_queues(dev, 0); 124157dacad5SJay Sternberg return result; 124257dacad5SJay Sternberg } 124357dacad5SJay Sternberg 1244c875a709SGuilherme G. Piccoli static bool nvme_should_reset(struct nvme_dev *dev, u32 csts) 1245c875a709SGuilherme G. Piccoli { 1246c875a709SGuilherme G. Piccoli 1247c875a709SGuilherme G. Piccoli /* If true, indicates loss of adapter communication, possibly by a 1248c875a709SGuilherme G. Piccoli * NVMe Subsystem reset. 1249c875a709SGuilherme G. Piccoli */ 1250c875a709SGuilherme G. Piccoli bool nssro = dev->subsystem && (csts & NVME_CSTS_NSSRO); 1251c875a709SGuilherme G. Piccoli 1252c875a709SGuilherme G. Piccoli /* If there is a reset ongoing, we shouldn't reset again. */ 1253c875a709SGuilherme G. Piccoli if (work_busy(&dev->reset_work)) 1254c875a709SGuilherme G. Piccoli return false; 1255c875a709SGuilherme G. Piccoli 1256c875a709SGuilherme G. Piccoli /* We shouldn't reset unless the controller is on fatal error state 1257c875a709SGuilherme G. Piccoli * _or_ if we lost the communication with it. 1258c875a709SGuilherme G. Piccoli */ 1259c875a709SGuilherme G. Piccoli if (!(csts & NVME_CSTS_CFS) && !nssro) 1260c875a709SGuilherme G. Piccoli return false; 1261c875a709SGuilherme G. Piccoli 1262c875a709SGuilherme G. Piccoli /* If PCI error recovery process is happening, we cannot reset or 1263c875a709SGuilherme G. Piccoli * the recovery mechanism will surely fail. 1264c875a709SGuilherme G. Piccoli */ 1265c875a709SGuilherme G. Piccoli if (pci_channel_offline(to_pci_dev(dev->dev))) 1266c875a709SGuilherme G. Piccoli return false; 1267c875a709SGuilherme G. Piccoli 1268c875a709SGuilherme G. Piccoli return true; 1269c875a709SGuilherme G. Piccoli } 1270c875a709SGuilherme G. Piccoli 12712d55cd5fSChristoph Hellwig static void nvme_watchdog_timer(unsigned long data) 127257dacad5SJay Sternberg { 12732d55cd5fSChristoph Hellwig struct nvme_dev *dev = (struct nvme_dev *)data; 12747a67cbeaSChristoph Hellwig u32 csts = readl(dev->bar + NVME_REG_CSTS); 127557dacad5SJay Sternberg 1276c875a709SGuilherme G. Piccoli /* Skip controllers under certain specific conditions. */ 1277c875a709SGuilherme G. Piccoli if (nvme_should_reset(dev, csts)) { 1278c875a709SGuilherme G. Piccoli if (queue_work(nvme_workq, &dev->reset_work)) 127957dacad5SJay Sternberg dev_warn(dev->dev, 12802d55cd5fSChristoph Hellwig "Failed status: 0x%x, reset controller.\n", 12812d55cd5fSChristoph Hellwig csts); 12822d55cd5fSChristoph Hellwig return; 128357dacad5SJay Sternberg } 128457dacad5SJay Sternberg 12852d55cd5fSChristoph Hellwig mod_timer(&dev->watchdog_timer, round_jiffies(jiffies + HZ)); 128657dacad5SJay Sternberg } 128757dacad5SJay Sternberg 1288749941f2SChristoph Hellwig static int nvme_create_io_queues(struct nvme_dev *dev) 128957dacad5SJay Sternberg { 1290949928c1SKeith Busch unsigned i, max; 1291749941f2SChristoph Hellwig int ret = 0; 129257dacad5SJay Sternberg 1293749941f2SChristoph Hellwig for (i = dev->queue_count; i <= dev->max_qid; i++) { 1294749941f2SChristoph Hellwig if (!nvme_alloc_queue(dev, i, dev->q_depth)) { 1295749941f2SChristoph Hellwig ret = -ENOMEM; 129657dacad5SJay Sternberg break; 1297749941f2SChristoph Hellwig } 1298749941f2SChristoph Hellwig } 129957dacad5SJay Sternberg 1300949928c1SKeith Busch max = min(dev->max_qid, dev->queue_count - 1); 1301949928c1SKeith Busch for (i = dev->online_queues; i <= max; i++) { 1302749941f2SChristoph Hellwig ret = nvme_create_queue(dev->queues[i], i); 1303749941f2SChristoph Hellwig if (ret) { 130457dacad5SJay Sternberg nvme_free_queues(dev, i); 130557dacad5SJay Sternberg break; 130657dacad5SJay Sternberg } 130757dacad5SJay Sternberg } 130857dacad5SJay Sternberg 1309749941f2SChristoph Hellwig /* 1310749941f2SChristoph Hellwig * Ignore failing Create SQ/CQ commands, we can continue with less 1311749941f2SChristoph Hellwig * than the desired aount of queues, and even a controller without 1312749941f2SChristoph Hellwig * I/O queues an still be used to issue admin commands. This might 1313749941f2SChristoph Hellwig * be useful to upgrade a buggy firmware for example. 1314749941f2SChristoph Hellwig */ 1315749941f2SChristoph Hellwig return ret >= 0 ? 0 : ret; 131657dacad5SJay Sternberg } 131757dacad5SJay Sternberg 131857dacad5SJay Sternberg static void __iomem *nvme_map_cmb(struct nvme_dev *dev) 131957dacad5SJay Sternberg { 132057dacad5SJay Sternberg u64 szu, size, offset; 132157dacad5SJay Sternberg u32 cmbloc; 132257dacad5SJay Sternberg resource_size_t bar_size; 132357dacad5SJay Sternberg struct pci_dev *pdev = to_pci_dev(dev->dev); 132457dacad5SJay Sternberg void __iomem *cmb; 132557dacad5SJay Sternberg dma_addr_t dma_addr; 132657dacad5SJay Sternberg 132757dacad5SJay Sternberg if (!use_cmb_sqes) 132857dacad5SJay Sternberg return NULL; 132957dacad5SJay Sternberg 13307a67cbeaSChristoph Hellwig dev->cmbsz = readl(dev->bar + NVME_REG_CMBSZ); 133157dacad5SJay Sternberg if (!(NVME_CMB_SZ(dev->cmbsz))) 133257dacad5SJay Sternberg return NULL; 133357dacad5SJay Sternberg 13347a67cbeaSChristoph Hellwig cmbloc = readl(dev->bar + NVME_REG_CMBLOC); 133557dacad5SJay Sternberg 133657dacad5SJay Sternberg szu = (u64)1 << (12 + 4 * NVME_CMB_SZU(dev->cmbsz)); 133757dacad5SJay Sternberg size = szu * NVME_CMB_SZ(dev->cmbsz); 133857dacad5SJay Sternberg offset = szu * NVME_CMB_OFST(cmbloc); 133957dacad5SJay Sternberg bar_size = pci_resource_len(pdev, NVME_CMB_BIR(cmbloc)); 134057dacad5SJay Sternberg 134157dacad5SJay Sternberg if (offset > bar_size) 134257dacad5SJay Sternberg return NULL; 134357dacad5SJay Sternberg 134457dacad5SJay Sternberg /* 134557dacad5SJay Sternberg * Controllers may support a CMB size larger than their BAR, 134657dacad5SJay Sternberg * for example, due to being behind a bridge. Reduce the CMB to 134757dacad5SJay Sternberg * the reported size of the BAR 134857dacad5SJay Sternberg */ 134957dacad5SJay Sternberg if (size > bar_size - offset) 135057dacad5SJay Sternberg size = bar_size - offset; 135157dacad5SJay Sternberg 135257dacad5SJay Sternberg dma_addr = pci_resource_start(pdev, NVME_CMB_BIR(cmbloc)) + offset; 135357dacad5SJay Sternberg cmb = ioremap_wc(dma_addr, size); 135457dacad5SJay Sternberg if (!cmb) 135557dacad5SJay Sternberg return NULL; 135657dacad5SJay Sternberg 135757dacad5SJay Sternberg dev->cmb_dma_addr = dma_addr; 135857dacad5SJay Sternberg dev->cmb_size = size; 135957dacad5SJay Sternberg return cmb; 136057dacad5SJay Sternberg } 136157dacad5SJay Sternberg 136257dacad5SJay Sternberg static inline void nvme_release_cmb(struct nvme_dev *dev) 136357dacad5SJay Sternberg { 136457dacad5SJay Sternberg if (dev->cmb) { 136557dacad5SJay Sternberg iounmap(dev->cmb); 136657dacad5SJay Sternberg dev->cmb = NULL; 136757dacad5SJay Sternberg } 136857dacad5SJay Sternberg } 136957dacad5SJay Sternberg 137057dacad5SJay Sternberg static size_t db_bar_size(struct nvme_dev *dev, unsigned nr_io_queues) 137157dacad5SJay Sternberg { 137257dacad5SJay Sternberg return 4096 + ((nr_io_queues + 1) * 8 * dev->db_stride); 137357dacad5SJay Sternberg } 137457dacad5SJay Sternberg 137557dacad5SJay Sternberg static int nvme_setup_io_queues(struct nvme_dev *dev) 137657dacad5SJay Sternberg { 137757dacad5SJay Sternberg struct nvme_queue *adminq = dev->queues[0]; 137857dacad5SJay Sternberg struct pci_dev *pdev = to_pci_dev(dev->dev); 137957dacad5SJay Sternberg int result, i, vecs, nr_io_queues, size; 138057dacad5SJay Sternberg 13812800b8e7SKeith Busch nr_io_queues = num_online_cpus(); 13829a0be7abSChristoph Hellwig result = nvme_set_queue_count(&dev->ctrl, &nr_io_queues); 13839a0be7abSChristoph Hellwig if (result < 0) 138457dacad5SJay Sternberg return result; 13859a0be7abSChristoph Hellwig 1386*f5fa90dcSChristoph Hellwig if (nr_io_queues == 0) 1387a5229050SKeith Busch return 0; 138857dacad5SJay Sternberg 138957dacad5SJay Sternberg if (dev->cmb && NVME_CMB_SQS(dev->cmbsz)) { 139057dacad5SJay Sternberg result = nvme_cmb_qdepth(dev, nr_io_queues, 139157dacad5SJay Sternberg sizeof(struct nvme_command)); 139257dacad5SJay Sternberg if (result > 0) 139357dacad5SJay Sternberg dev->q_depth = result; 139457dacad5SJay Sternberg else 139557dacad5SJay Sternberg nvme_release_cmb(dev); 139657dacad5SJay Sternberg } 139757dacad5SJay Sternberg 139857dacad5SJay Sternberg size = db_bar_size(dev, nr_io_queues); 139957dacad5SJay Sternberg if (size > 8192) { 140057dacad5SJay Sternberg iounmap(dev->bar); 140157dacad5SJay Sternberg do { 140257dacad5SJay Sternberg dev->bar = ioremap(pci_resource_start(pdev, 0), size); 140357dacad5SJay Sternberg if (dev->bar) 140457dacad5SJay Sternberg break; 140557dacad5SJay Sternberg if (!--nr_io_queues) 140657dacad5SJay Sternberg return -ENOMEM; 140757dacad5SJay Sternberg size = db_bar_size(dev, nr_io_queues); 140857dacad5SJay Sternberg } while (1); 14097a67cbeaSChristoph Hellwig dev->dbs = dev->bar + 4096; 141057dacad5SJay Sternberg adminq->q_db = dev->dbs; 141157dacad5SJay Sternberg } 141257dacad5SJay Sternberg 141357dacad5SJay Sternberg /* Deregister the admin queue's interrupt */ 141457dacad5SJay Sternberg free_irq(dev->entry[0].vector, adminq); 141557dacad5SJay Sternberg 141657dacad5SJay Sternberg /* 141757dacad5SJay Sternberg * If we enable msix early due to not intx, disable it again before 141857dacad5SJay Sternberg * setting up the full range we need. 141957dacad5SJay Sternberg */ 1420a5229050SKeith Busch if (pdev->msi_enabled) 1421a5229050SKeith Busch pci_disable_msi(pdev); 1422a5229050SKeith Busch else if (pdev->msix_enabled) 142357dacad5SJay Sternberg pci_disable_msix(pdev); 142457dacad5SJay Sternberg 142557dacad5SJay Sternberg for (i = 0; i < nr_io_queues; i++) 142657dacad5SJay Sternberg dev->entry[i].entry = i; 142757dacad5SJay Sternberg vecs = pci_enable_msix_range(pdev, dev->entry, 1, nr_io_queues); 142857dacad5SJay Sternberg if (vecs < 0) { 142957dacad5SJay Sternberg vecs = pci_enable_msi_range(pdev, 1, min(nr_io_queues, 32)); 143057dacad5SJay Sternberg if (vecs < 0) { 143157dacad5SJay Sternberg vecs = 1; 143257dacad5SJay Sternberg } else { 143357dacad5SJay Sternberg for (i = 0; i < vecs; i++) 143457dacad5SJay Sternberg dev->entry[i].vector = i + pdev->irq; 143557dacad5SJay Sternberg } 143657dacad5SJay Sternberg } 143757dacad5SJay Sternberg 143857dacad5SJay Sternberg /* 143957dacad5SJay Sternberg * Should investigate if there's a performance win from allocating 144057dacad5SJay Sternberg * more queues than interrupt vectors; it might allow the submission 144157dacad5SJay Sternberg * path to scale better, even if the receive path is limited by the 144257dacad5SJay Sternberg * number of interrupts. 144357dacad5SJay Sternberg */ 144457dacad5SJay Sternberg nr_io_queues = vecs; 144557dacad5SJay Sternberg dev->max_qid = nr_io_queues; 144657dacad5SJay Sternberg 144757dacad5SJay Sternberg result = queue_request_irq(dev, adminq, adminq->irqname); 144857dacad5SJay Sternberg if (result) { 144957dacad5SJay Sternberg adminq->cq_vector = -1; 145057dacad5SJay Sternberg goto free_queues; 145157dacad5SJay Sternberg } 1452749941f2SChristoph Hellwig return nvme_create_io_queues(dev); 145357dacad5SJay Sternberg 145457dacad5SJay Sternberg free_queues: 145557dacad5SJay Sternberg nvme_free_queues(dev, 1); 145657dacad5SJay Sternberg return result; 145757dacad5SJay Sternberg } 145857dacad5SJay Sternberg 14595955be21SChristoph Hellwig static void nvme_pci_post_scan(struct nvme_ctrl *ctrl) 146057dacad5SJay Sternberg { 14615955be21SChristoph Hellwig struct nvme_dev *dev = to_nvme_dev(ctrl); 146257dacad5SJay Sternberg struct nvme_queue *nvmeq; 146357dacad5SJay Sternberg int i; 146457dacad5SJay Sternberg 146557dacad5SJay Sternberg for (i = 0; i < dev->online_queues; i++) { 146657dacad5SJay Sternberg nvmeq = dev->queues[i]; 146757dacad5SJay Sternberg 146857dacad5SJay Sternberg if (!nvmeq->tags || !(*nvmeq->tags)) 146957dacad5SJay Sternberg continue; 147057dacad5SJay Sternberg 147157dacad5SJay Sternberg irq_set_affinity_hint(dev->entry[nvmeq->cq_vector].vector, 147257dacad5SJay Sternberg blk_mq_tags_cpumask(*nvmeq->tags)); 147357dacad5SJay Sternberg } 147457dacad5SJay Sternberg } 147557dacad5SJay Sternberg 1476db3cbfffSKeith Busch static void nvme_del_queue_end(struct request *req, int error) 1477db3cbfffSKeith Busch { 1478db3cbfffSKeith Busch struct nvme_queue *nvmeq = req->end_io_data; 1479db3cbfffSKeith Busch 1480db3cbfffSKeith Busch blk_mq_free_request(req); 1481db3cbfffSKeith Busch complete(&nvmeq->dev->ioq_wait); 1482db3cbfffSKeith Busch } 1483db3cbfffSKeith Busch 1484db3cbfffSKeith Busch static void nvme_del_cq_end(struct request *req, int error) 1485db3cbfffSKeith Busch { 1486db3cbfffSKeith Busch struct nvme_queue *nvmeq = req->end_io_data; 1487db3cbfffSKeith Busch 1488db3cbfffSKeith Busch if (!error) { 1489db3cbfffSKeith Busch unsigned long flags; 1490db3cbfffSKeith Busch 14912e39e0f6SMing Lin /* 14922e39e0f6SMing Lin * We might be called with the AQ q_lock held 14932e39e0f6SMing Lin * and the I/O queue q_lock should always 14942e39e0f6SMing Lin * nest inside the AQ one. 14952e39e0f6SMing Lin */ 14962e39e0f6SMing Lin spin_lock_irqsave_nested(&nvmeq->q_lock, flags, 14972e39e0f6SMing Lin SINGLE_DEPTH_NESTING); 1498db3cbfffSKeith Busch nvme_process_cq(nvmeq); 1499db3cbfffSKeith Busch spin_unlock_irqrestore(&nvmeq->q_lock, flags); 1500db3cbfffSKeith Busch } 1501db3cbfffSKeith Busch 1502db3cbfffSKeith Busch nvme_del_queue_end(req, error); 1503db3cbfffSKeith Busch } 1504db3cbfffSKeith Busch 1505db3cbfffSKeith Busch static int nvme_delete_queue(struct nvme_queue *nvmeq, u8 opcode) 1506db3cbfffSKeith Busch { 1507db3cbfffSKeith Busch struct request_queue *q = nvmeq->dev->ctrl.admin_q; 1508db3cbfffSKeith Busch struct request *req; 1509db3cbfffSKeith Busch struct nvme_command cmd; 1510db3cbfffSKeith Busch 1511db3cbfffSKeith Busch memset(&cmd, 0, sizeof(cmd)); 1512db3cbfffSKeith Busch cmd.delete_queue.opcode = opcode; 1513db3cbfffSKeith Busch cmd.delete_queue.qid = cpu_to_le16(nvmeq->qid); 1514db3cbfffSKeith Busch 1515db3cbfffSKeith Busch req = nvme_alloc_request(q, &cmd, BLK_MQ_REQ_NOWAIT); 1516db3cbfffSKeith Busch if (IS_ERR(req)) 1517db3cbfffSKeith Busch return PTR_ERR(req); 1518db3cbfffSKeith Busch 1519db3cbfffSKeith Busch req->timeout = ADMIN_TIMEOUT; 1520db3cbfffSKeith Busch req->end_io_data = nvmeq; 1521db3cbfffSKeith Busch 1522db3cbfffSKeith Busch blk_execute_rq_nowait(q, NULL, req, false, 1523db3cbfffSKeith Busch opcode == nvme_admin_delete_cq ? 1524db3cbfffSKeith Busch nvme_del_cq_end : nvme_del_queue_end); 1525db3cbfffSKeith Busch return 0; 1526db3cbfffSKeith Busch } 1527db3cbfffSKeith Busch 1528db3cbfffSKeith Busch static void nvme_disable_io_queues(struct nvme_dev *dev) 1529db3cbfffSKeith Busch { 1530014a0d60SKeith Busch int pass, queues = dev->online_queues - 1; 1531db3cbfffSKeith Busch unsigned long timeout; 1532db3cbfffSKeith Busch u8 opcode = nvme_admin_delete_sq; 1533db3cbfffSKeith Busch 1534db3cbfffSKeith Busch for (pass = 0; pass < 2; pass++) { 1535014a0d60SKeith Busch int sent = 0, i = queues; 1536db3cbfffSKeith Busch 1537db3cbfffSKeith Busch reinit_completion(&dev->ioq_wait); 1538db3cbfffSKeith Busch retry: 1539db3cbfffSKeith Busch timeout = ADMIN_TIMEOUT; 1540db3cbfffSKeith Busch for (; i > 0; i--) { 1541db3cbfffSKeith Busch struct nvme_queue *nvmeq = dev->queues[i]; 1542db3cbfffSKeith Busch 1543db3cbfffSKeith Busch if (!pass) 1544db3cbfffSKeith Busch nvme_suspend_queue(nvmeq); 1545db3cbfffSKeith Busch if (nvme_delete_queue(nvmeq, opcode)) 1546db3cbfffSKeith Busch break; 1547db3cbfffSKeith Busch ++sent; 1548db3cbfffSKeith Busch } 1549db3cbfffSKeith Busch while (sent--) { 1550db3cbfffSKeith Busch timeout = wait_for_completion_io_timeout(&dev->ioq_wait, timeout); 1551db3cbfffSKeith Busch if (timeout == 0) 1552db3cbfffSKeith Busch return; 1553db3cbfffSKeith Busch if (i) 1554db3cbfffSKeith Busch goto retry; 1555db3cbfffSKeith Busch } 1556db3cbfffSKeith Busch opcode = nvme_admin_delete_cq; 1557db3cbfffSKeith Busch } 1558db3cbfffSKeith Busch } 1559db3cbfffSKeith Busch 156057dacad5SJay Sternberg /* 156157dacad5SJay Sternberg * Return: error value if an error occurred setting up the queues or calling 156257dacad5SJay Sternberg * Identify Device. 0 if these succeeded, even if adding some of the 156357dacad5SJay Sternberg * namespaces failed. At the moment, these failures are silent. TBD which 156457dacad5SJay Sternberg * failures should be reported. 156557dacad5SJay Sternberg */ 156657dacad5SJay Sternberg static int nvme_dev_add(struct nvme_dev *dev) 156757dacad5SJay Sternberg { 15685bae7f73SChristoph Hellwig if (!dev->ctrl.tagset) { 156957dacad5SJay Sternberg dev->tagset.ops = &nvme_mq_ops; 157057dacad5SJay Sternberg dev->tagset.nr_hw_queues = dev->online_queues - 1; 157157dacad5SJay Sternberg dev->tagset.timeout = NVME_IO_TIMEOUT; 157257dacad5SJay Sternberg dev->tagset.numa_node = dev_to_node(dev->dev); 157357dacad5SJay Sternberg dev->tagset.queue_depth = 157457dacad5SJay Sternberg min_t(int, dev->q_depth, BLK_MQ_MAX_DEPTH) - 1; 157557dacad5SJay Sternberg dev->tagset.cmd_size = nvme_cmd_size(dev); 157657dacad5SJay Sternberg dev->tagset.flags = BLK_MQ_F_SHOULD_MERGE; 157757dacad5SJay Sternberg dev->tagset.driver_data = dev; 157857dacad5SJay Sternberg 157957dacad5SJay Sternberg if (blk_mq_alloc_tag_set(&dev->tagset)) 158057dacad5SJay Sternberg return 0; 15815bae7f73SChristoph Hellwig dev->ctrl.tagset = &dev->tagset; 1582949928c1SKeith Busch } else { 1583949928c1SKeith Busch blk_mq_update_nr_hw_queues(&dev->tagset, dev->online_queues - 1); 1584949928c1SKeith Busch 1585949928c1SKeith Busch /* Free previously allocated queues that are no longer usable */ 1586949928c1SKeith Busch nvme_free_queues(dev, dev->online_queues); 158757dacad5SJay Sternberg } 1588949928c1SKeith Busch 158957dacad5SJay Sternberg return 0; 159057dacad5SJay Sternberg } 159157dacad5SJay Sternberg 1592b00a726aSKeith Busch static int nvme_pci_enable(struct nvme_dev *dev) 159357dacad5SJay Sternberg { 159457dacad5SJay Sternberg u64 cap; 1595b00a726aSKeith Busch int result = -ENOMEM; 159657dacad5SJay Sternberg struct pci_dev *pdev = to_pci_dev(dev->dev); 159757dacad5SJay Sternberg 159857dacad5SJay Sternberg if (pci_enable_device_mem(pdev)) 159957dacad5SJay Sternberg return result; 160057dacad5SJay Sternberg 160157dacad5SJay Sternberg pci_set_master(pdev); 160257dacad5SJay Sternberg 160357dacad5SJay Sternberg if (dma_set_mask_and_coherent(dev->dev, DMA_BIT_MASK(64)) && 160457dacad5SJay Sternberg dma_set_mask_and_coherent(dev->dev, DMA_BIT_MASK(32))) 160557dacad5SJay Sternberg goto disable; 160657dacad5SJay Sternberg 16077a67cbeaSChristoph Hellwig if (readl(dev->bar + NVME_REG_CSTS) == -1) { 160857dacad5SJay Sternberg result = -ENODEV; 1609b00a726aSKeith Busch goto disable; 161057dacad5SJay Sternberg } 161157dacad5SJay Sternberg 161257dacad5SJay Sternberg /* 1613a5229050SKeith Busch * Some devices and/or platforms don't advertise or work with INTx 1614a5229050SKeith Busch * interrupts. Pre-enable a single MSIX or MSI vec for setup. We'll 1615a5229050SKeith Busch * adjust this later. 161657dacad5SJay Sternberg */ 1617a5229050SKeith Busch if (pci_enable_msix(pdev, dev->entry, 1)) { 1618a5229050SKeith Busch pci_enable_msi(pdev); 1619a5229050SKeith Busch dev->entry[0].vector = pdev->irq; 1620a5229050SKeith Busch } 1621a5229050SKeith Busch 1622a5229050SKeith Busch if (!dev->entry[0].vector) { 1623a5229050SKeith Busch result = -ENODEV; 1624b00a726aSKeith Busch goto disable; 162557dacad5SJay Sternberg } 162657dacad5SJay Sternberg 16277a67cbeaSChristoph Hellwig cap = lo_hi_readq(dev->bar + NVME_REG_CAP); 16287a67cbeaSChristoph Hellwig 162957dacad5SJay Sternberg dev->q_depth = min_t(int, NVME_CAP_MQES(cap) + 1, NVME_Q_DEPTH); 163057dacad5SJay Sternberg dev->db_stride = 1 << NVME_CAP_STRIDE(cap); 16317a67cbeaSChristoph Hellwig dev->dbs = dev->bar + 4096; 16321f390c1fSStephan Günther 16331f390c1fSStephan Günther /* 16341f390c1fSStephan Günther * Temporary fix for the Apple controller found in the MacBook8,1 and 16351f390c1fSStephan Günther * some MacBook7,1 to avoid controller resets and data loss. 16361f390c1fSStephan Günther */ 16371f390c1fSStephan Günther if (pdev->vendor == PCI_VENDOR_ID_APPLE && pdev->device == 0x2001) { 16381f390c1fSStephan Günther dev->q_depth = 2; 16391f390c1fSStephan Günther dev_warn(dev->dev, "detected Apple NVMe controller, set " 16401f390c1fSStephan Günther "queue depth=%u to work around controller resets\n", 16411f390c1fSStephan Günther dev->q_depth); 16421f390c1fSStephan Günther } 16431f390c1fSStephan Günther 16447a67cbeaSChristoph Hellwig if (readl(dev->bar + NVME_REG_VS) >= NVME_VS(1, 2)) 164557dacad5SJay Sternberg dev->cmb = nvme_map_cmb(dev); 164657dacad5SJay Sternberg 1647a0a3408eSKeith Busch pci_enable_pcie_error_reporting(pdev); 1648a0a3408eSKeith Busch pci_save_state(pdev); 164957dacad5SJay Sternberg return 0; 165057dacad5SJay Sternberg 165157dacad5SJay Sternberg disable: 165257dacad5SJay Sternberg pci_disable_device(pdev); 165357dacad5SJay Sternberg return result; 165457dacad5SJay Sternberg } 165557dacad5SJay Sternberg 165657dacad5SJay Sternberg static void nvme_dev_unmap(struct nvme_dev *dev) 165757dacad5SJay Sternberg { 1658b00a726aSKeith Busch if (dev->bar) 1659b00a726aSKeith Busch iounmap(dev->bar); 1660b00a726aSKeith Busch pci_release_regions(to_pci_dev(dev->dev)); 1661b00a726aSKeith Busch } 1662b00a726aSKeith Busch 1663b00a726aSKeith Busch static void nvme_pci_disable(struct nvme_dev *dev) 1664b00a726aSKeith Busch { 166557dacad5SJay Sternberg struct pci_dev *pdev = to_pci_dev(dev->dev); 166657dacad5SJay Sternberg 166757dacad5SJay Sternberg if (pdev->msi_enabled) 166857dacad5SJay Sternberg pci_disable_msi(pdev); 166957dacad5SJay Sternberg else if (pdev->msix_enabled) 167057dacad5SJay Sternberg pci_disable_msix(pdev); 167157dacad5SJay Sternberg 1672a0a3408eSKeith Busch if (pci_is_enabled(pdev)) { 1673a0a3408eSKeith Busch pci_disable_pcie_error_reporting(pdev); 167457dacad5SJay Sternberg pci_disable_device(pdev); 167557dacad5SJay Sternberg } 1676a0a3408eSKeith Busch } 167757dacad5SJay Sternberg 1678a5cdb68cSKeith Busch static void nvme_dev_disable(struct nvme_dev *dev, bool shutdown) 167957dacad5SJay Sternberg { 168057dacad5SJay Sternberg int i; 168157dacad5SJay Sternberg u32 csts = -1; 168257dacad5SJay Sternberg 16832d55cd5fSChristoph Hellwig del_timer_sync(&dev->watchdog_timer); 168457dacad5SJay Sternberg 168577bf25eaSKeith Busch mutex_lock(&dev->shutdown_lock); 1686b00a726aSKeith Busch if (pci_is_enabled(to_pci_dev(dev->dev))) { 168725646264SKeith Busch nvme_stop_queues(&dev->ctrl); 16887a67cbeaSChristoph Hellwig csts = readl(dev->bar + NVME_REG_CSTS); 168957dacad5SJay Sternberg } 169057dacad5SJay Sternberg if (csts & NVME_CSTS_CFS || !(csts & NVME_CSTS_RDY)) { 169157dacad5SJay Sternberg for (i = dev->queue_count - 1; i >= 0; i--) { 169257dacad5SJay Sternberg struct nvme_queue *nvmeq = dev->queues[i]; 169357dacad5SJay Sternberg nvme_suspend_queue(nvmeq); 169457dacad5SJay Sternberg } 169557dacad5SJay Sternberg } else { 169657dacad5SJay Sternberg nvme_disable_io_queues(dev); 1697a5cdb68cSKeith Busch nvme_disable_admin_queue(dev, shutdown); 169857dacad5SJay Sternberg } 1699b00a726aSKeith Busch nvme_pci_disable(dev); 170057dacad5SJay Sternberg 1701e1958e65SMing Lin blk_mq_tagset_busy_iter(&dev->tagset, nvme_cancel_request, &dev->ctrl); 1702e1958e65SMing Lin blk_mq_tagset_busy_iter(&dev->admin_tagset, nvme_cancel_request, &dev->ctrl); 170377bf25eaSKeith Busch mutex_unlock(&dev->shutdown_lock); 170457dacad5SJay Sternberg } 170557dacad5SJay Sternberg 170657dacad5SJay Sternberg static int nvme_setup_prp_pools(struct nvme_dev *dev) 170757dacad5SJay Sternberg { 170857dacad5SJay Sternberg dev->prp_page_pool = dma_pool_create("prp list page", dev->dev, 170957dacad5SJay Sternberg PAGE_SIZE, PAGE_SIZE, 0); 171057dacad5SJay Sternberg if (!dev->prp_page_pool) 171157dacad5SJay Sternberg return -ENOMEM; 171257dacad5SJay Sternberg 171357dacad5SJay Sternberg /* Optimisation for I/Os between 4k and 128k */ 171457dacad5SJay Sternberg dev->prp_small_pool = dma_pool_create("prp list 256", dev->dev, 171557dacad5SJay Sternberg 256, 256, 0); 171657dacad5SJay Sternberg if (!dev->prp_small_pool) { 171757dacad5SJay Sternberg dma_pool_destroy(dev->prp_page_pool); 171857dacad5SJay Sternberg return -ENOMEM; 171957dacad5SJay Sternberg } 172057dacad5SJay Sternberg return 0; 172157dacad5SJay Sternberg } 172257dacad5SJay Sternberg 172357dacad5SJay Sternberg static void nvme_release_prp_pools(struct nvme_dev *dev) 172457dacad5SJay Sternberg { 172557dacad5SJay Sternberg dma_pool_destroy(dev->prp_page_pool); 172657dacad5SJay Sternberg dma_pool_destroy(dev->prp_small_pool); 172757dacad5SJay Sternberg } 172857dacad5SJay Sternberg 17291673f1f0SChristoph Hellwig static void nvme_pci_free_ctrl(struct nvme_ctrl *ctrl) 173057dacad5SJay Sternberg { 17311673f1f0SChristoph Hellwig struct nvme_dev *dev = to_nvme_dev(ctrl); 173257dacad5SJay Sternberg 173357dacad5SJay Sternberg put_device(dev->dev); 173457dacad5SJay Sternberg if (dev->tagset.tags) 173557dacad5SJay Sternberg blk_mq_free_tag_set(&dev->tagset); 17361c63dc66SChristoph Hellwig if (dev->ctrl.admin_q) 17371c63dc66SChristoph Hellwig blk_put_queue(dev->ctrl.admin_q); 173857dacad5SJay Sternberg kfree(dev->queues); 173957dacad5SJay Sternberg kfree(dev->entry); 174057dacad5SJay Sternberg kfree(dev); 174157dacad5SJay Sternberg } 174257dacad5SJay Sternberg 1743f58944e2SKeith Busch static void nvme_remove_dead_ctrl(struct nvme_dev *dev, int status) 1744f58944e2SKeith Busch { 1745237045fcSLinus Torvalds dev_warn(dev->ctrl.device, "Removing after probe failure status: %d\n", status); 1746f58944e2SKeith Busch 1747f58944e2SKeith Busch kref_get(&dev->ctrl.kref); 174869d9a99cSKeith Busch nvme_dev_disable(dev, false); 1749f58944e2SKeith Busch if (!schedule_work(&dev->remove_work)) 1750f58944e2SKeith Busch nvme_put_ctrl(&dev->ctrl); 1751f58944e2SKeith Busch } 1752f58944e2SKeith Busch 1753fd634f41SChristoph Hellwig static void nvme_reset_work(struct work_struct *work) 175457dacad5SJay Sternberg { 1755fd634f41SChristoph Hellwig struct nvme_dev *dev = container_of(work, struct nvme_dev, reset_work); 1756f58944e2SKeith Busch int result = -ENODEV; 175757dacad5SJay Sternberg 1758bb8d261eSChristoph Hellwig if (WARN_ON(dev->ctrl.state == NVME_CTRL_RESETTING)) 1759fd634f41SChristoph Hellwig goto out; 1760fd634f41SChristoph Hellwig 1761fd634f41SChristoph Hellwig /* 1762fd634f41SChristoph Hellwig * If we're called to reset a live controller first shut it down before 1763fd634f41SChristoph Hellwig * moving on. 1764fd634f41SChristoph Hellwig */ 1765b00a726aSKeith Busch if (dev->ctrl.ctrl_config & NVME_CC_ENABLE) 1766a5cdb68cSKeith Busch nvme_dev_disable(dev, false); 1767fd634f41SChristoph Hellwig 1768bb8d261eSChristoph Hellwig if (!nvme_change_ctrl_state(&dev->ctrl, NVME_CTRL_RESETTING)) 17699bf2b972SKeith Busch goto out; 17709bf2b972SKeith Busch 1771b00a726aSKeith Busch result = nvme_pci_enable(dev); 177257dacad5SJay Sternberg if (result) 177357dacad5SJay Sternberg goto out; 177457dacad5SJay Sternberg 177557dacad5SJay Sternberg result = nvme_configure_admin_queue(dev); 177657dacad5SJay Sternberg if (result) 1777f58944e2SKeith Busch goto out; 177857dacad5SJay Sternberg 177957dacad5SJay Sternberg nvme_init_queue(dev->queues[0], 0); 178057dacad5SJay Sternberg result = nvme_alloc_admin_tags(dev); 178157dacad5SJay Sternberg if (result) 1782f58944e2SKeith Busch goto out; 178357dacad5SJay Sternberg 1784ce4541f4SChristoph Hellwig result = nvme_init_identify(&dev->ctrl); 1785ce4541f4SChristoph Hellwig if (result) 1786f58944e2SKeith Busch goto out; 1787ce4541f4SChristoph Hellwig 178857dacad5SJay Sternberg result = nvme_setup_io_queues(dev); 178957dacad5SJay Sternberg if (result) 1790f58944e2SKeith Busch goto out; 179157dacad5SJay Sternberg 179221f033f7SKeith Busch /* 179321f033f7SKeith Busch * A controller that can not execute IO typically requires user 179421f033f7SKeith Busch * intervention to correct. For such degraded controllers, the driver 179521f033f7SKeith Busch * should not submit commands the user did not request, so skip 179621f033f7SKeith Busch * registering for asynchronous event notification on this condition. 179721f033f7SKeith Busch */ 1798f866fc42SChristoph Hellwig if (dev->online_queues > 1) 1799f866fc42SChristoph Hellwig nvme_queue_async_events(&dev->ctrl); 180057dacad5SJay Sternberg 18012d55cd5fSChristoph Hellwig mod_timer(&dev->watchdog_timer, round_jiffies(jiffies + HZ)); 180257dacad5SJay Sternberg 180357dacad5SJay Sternberg /* 180457dacad5SJay Sternberg * Keep the controller around but remove all namespaces if we don't have 180557dacad5SJay Sternberg * any working I/O queue. 180657dacad5SJay Sternberg */ 180757dacad5SJay Sternberg if (dev->online_queues < 2) { 18081b3c47c1SSagi Grimberg dev_warn(dev->ctrl.device, "IO queues not created\n"); 18093b24774eSKeith Busch nvme_kill_queues(&dev->ctrl); 18105bae7f73SChristoph Hellwig nvme_remove_namespaces(&dev->ctrl); 181157dacad5SJay Sternberg } else { 181225646264SKeith Busch nvme_start_queues(&dev->ctrl); 181357dacad5SJay Sternberg nvme_dev_add(dev); 181457dacad5SJay Sternberg } 181557dacad5SJay Sternberg 1816bb8d261eSChristoph Hellwig if (!nvme_change_ctrl_state(&dev->ctrl, NVME_CTRL_LIVE)) { 1817bb8d261eSChristoph Hellwig dev_warn(dev->ctrl.device, "failed to mark controller live\n"); 1818bb8d261eSChristoph Hellwig goto out; 1819bb8d261eSChristoph Hellwig } 182092911a55SChristoph Hellwig 182192911a55SChristoph Hellwig if (dev->online_queues > 1) 18225955be21SChristoph Hellwig nvme_queue_scan(&dev->ctrl); 182357dacad5SJay Sternberg return; 182457dacad5SJay Sternberg 182557dacad5SJay Sternberg out: 1826f58944e2SKeith Busch nvme_remove_dead_ctrl(dev, result); 182757dacad5SJay Sternberg } 182857dacad5SJay Sternberg 18295c8809e6SChristoph Hellwig static void nvme_remove_dead_ctrl_work(struct work_struct *work) 183057dacad5SJay Sternberg { 18315c8809e6SChristoph Hellwig struct nvme_dev *dev = container_of(work, struct nvme_dev, remove_work); 183257dacad5SJay Sternberg struct pci_dev *pdev = to_pci_dev(dev->dev); 183357dacad5SJay Sternberg 183469d9a99cSKeith Busch nvme_kill_queues(&dev->ctrl); 183557dacad5SJay Sternberg if (pci_get_drvdata(pdev)) 1836921920abSKeith Busch device_release_driver(&pdev->dev); 18371673f1f0SChristoph Hellwig nvme_put_ctrl(&dev->ctrl); 183857dacad5SJay Sternberg } 183957dacad5SJay Sternberg 184057dacad5SJay Sternberg static int nvme_reset(struct nvme_dev *dev) 184157dacad5SJay Sternberg { 18421c63dc66SChristoph Hellwig if (!dev->ctrl.admin_q || blk_queue_dying(dev->ctrl.admin_q)) 184357dacad5SJay Sternberg return -ENODEV; 184457dacad5SJay Sternberg 1845846cc05fSChristoph Hellwig if (!queue_work(nvme_workq, &dev->reset_work)) 1846846cc05fSChristoph Hellwig return -EBUSY; 184757dacad5SJay Sternberg 184857dacad5SJay Sternberg flush_work(&dev->reset_work); 184957dacad5SJay Sternberg return 0; 185057dacad5SJay Sternberg } 185157dacad5SJay Sternberg 18521c63dc66SChristoph Hellwig static int nvme_pci_reg_read32(struct nvme_ctrl *ctrl, u32 off, u32 *val) 185357dacad5SJay Sternberg { 18541c63dc66SChristoph Hellwig *val = readl(to_nvme_dev(ctrl)->bar + off); 18551c63dc66SChristoph Hellwig return 0; 185657dacad5SJay Sternberg } 18571c63dc66SChristoph Hellwig 18585fd4ce1bSChristoph Hellwig static int nvme_pci_reg_write32(struct nvme_ctrl *ctrl, u32 off, u32 val) 18595fd4ce1bSChristoph Hellwig { 18605fd4ce1bSChristoph Hellwig writel(val, to_nvme_dev(ctrl)->bar + off); 18615fd4ce1bSChristoph Hellwig return 0; 18625fd4ce1bSChristoph Hellwig } 18635fd4ce1bSChristoph Hellwig 18647fd8930fSChristoph Hellwig static int nvme_pci_reg_read64(struct nvme_ctrl *ctrl, u32 off, u64 *val) 18657fd8930fSChristoph Hellwig { 18667fd8930fSChristoph Hellwig *val = readq(to_nvme_dev(ctrl)->bar + off); 18677fd8930fSChristoph Hellwig return 0; 18687fd8930fSChristoph Hellwig } 18697fd8930fSChristoph Hellwig 1870f3ca80fcSChristoph Hellwig static int nvme_pci_reset_ctrl(struct nvme_ctrl *ctrl) 1871f3ca80fcSChristoph Hellwig { 1872f3ca80fcSChristoph Hellwig return nvme_reset(to_nvme_dev(ctrl)); 1873f3ca80fcSChristoph Hellwig } 1874f3ca80fcSChristoph Hellwig 18751c63dc66SChristoph Hellwig static const struct nvme_ctrl_ops nvme_pci_ctrl_ops = { 1876e439bb12SSagi Grimberg .module = THIS_MODULE, 18771c63dc66SChristoph Hellwig .reg_read32 = nvme_pci_reg_read32, 18785fd4ce1bSChristoph Hellwig .reg_write32 = nvme_pci_reg_write32, 18797fd8930fSChristoph Hellwig .reg_read64 = nvme_pci_reg_read64, 1880f3ca80fcSChristoph Hellwig .reset_ctrl = nvme_pci_reset_ctrl, 18811673f1f0SChristoph Hellwig .free_ctrl = nvme_pci_free_ctrl, 18825955be21SChristoph Hellwig .post_scan = nvme_pci_post_scan, 1883f866fc42SChristoph Hellwig .submit_async_event = nvme_pci_submit_async_event, 18841c63dc66SChristoph Hellwig }; 188557dacad5SJay Sternberg 1886b00a726aSKeith Busch static int nvme_dev_map(struct nvme_dev *dev) 1887b00a726aSKeith Busch { 1888b00a726aSKeith Busch int bars; 1889b00a726aSKeith Busch struct pci_dev *pdev = to_pci_dev(dev->dev); 1890b00a726aSKeith Busch 1891b00a726aSKeith Busch bars = pci_select_bars(pdev, IORESOURCE_MEM); 1892b00a726aSKeith Busch if (!bars) 1893b00a726aSKeith Busch return -ENODEV; 1894b00a726aSKeith Busch if (pci_request_selected_regions(pdev, bars, "nvme")) 1895b00a726aSKeith Busch return -ENODEV; 1896b00a726aSKeith Busch 1897b00a726aSKeith Busch dev->bar = ioremap(pci_resource_start(pdev, 0), 8192); 1898b00a726aSKeith Busch if (!dev->bar) 1899b00a726aSKeith Busch goto release; 1900b00a726aSKeith Busch 1901b00a726aSKeith Busch return 0; 1902b00a726aSKeith Busch release: 1903b00a726aSKeith Busch pci_release_regions(pdev); 1904b00a726aSKeith Busch return -ENODEV; 1905b00a726aSKeith Busch } 1906b00a726aSKeith Busch 190757dacad5SJay Sternberg static int nvme_probe(struct pci_dev *pdev, const struct pci_device_id *id) 190857dacad5SJay Sternberg { 190957dacad5SJay Sternberg int node, result = -ENOMEM; 191057dacad5SJay Sternberg struct nvme_dev *dev; 191157dacad5SJay Sternberg 191257dacad5SJay Sternberg node = dev_to_node(&pdev->dev); 191357dacad5SJay Sternberg if (node == NUMA_NO_NODE) 191457dacad5SJay Sternberg set_dev_node(&pdev->dev, 0); 191557dacad5SJay Sternberg 191657dacad5SJay Sternberg dev = kzalloc_node(sizeof(*dev), GFP_KERNEL, node); 191757dacad5SJay Sternberg if (!dev) 191857dacad5SJay Sternberg return -ENOMEM; 191957dacad5SJay Sternberg dev->entry = kzalloc_node(num_possible_cpus() * sizeof(*dev->entry), 192057dacad5SJay Sternberg GFP_KERNEL, node); 192157dacad5SJay Sternberg if (!dev->entry) 192257dacad5SJay Sternberg goto free; 192357dacad5SJay Sternberg dev->queues = kzalloc_node((num_possible_cpus() + 1) * sizeof(void *), 192457dacad5SJay Sternberg GFP_KERNEL, node); 192557dacad5SJay Sternberg if (!dev->queues) 192657dacad5SJay Sternberg goto free; 192757dacad5SJay Sternberg 192857dacad5SJay Sternberg dev->dev = get_device(&pdev->dev); 192957dacad5SJay Sternberg pci_set_drvdata(pdev, dev); 193057dacad5SJay Sternberg 1931b00a726aSKeith Busch result = nvme_dev_map(dev); 1932b00a726aSKeith Busch if (result) 1933b00a726aSKeith Busch goto free; 1934b00a726aSKeith Busch 1935f3ca80fcSChristoph Hellwig INIT_WORK(&dev->reset_work, nvme_reset_work); 19365c8809e6SChristoph Hellwig INIT_WORK(&dev->remove_work, nvme_remove_dead_ctrl_work); 19372d55cd5fSChristoph Hellwig setup_timer(&dev->watchdog_timer, nvme_watchdog_timer, 19382d55cd5fSChristoph Hellwig (unsigned long)dev); 193977bf25eaSKeith Busch mutex_init(&dev->shutdown_lock); 1940db3cbfffSKeith Busch init_completion(&dev->ioq_wait); 1941f3ca80fcSChristoph Hellwig 1942f3ca80fcSChristoph Hellwig result = nvme_setup_prp_pools(dev); 1943f3ca80fcSChristoph Hellwig if (result) 1944f3ca80fcSChristoph Hellwig goto put_pci; 1945f3ca80fcSChristoph Hellwig 1946f3ca80fcSChristoph Hellwig result = nvme_init_ctrl(&dev->ctrl, &pdev->dev, &nvme_pci_ctrl_ops, 1947f3ca80fcSChristoph Hellwig id->driver_data); 1948f3ca80fcSChristoph Hellwig if (result) 1949f3ca80fcSChristoph Hellwig goto release_pools; 1950f3ca80fcSChristoph Hellwig 19511b3c47c1SSagi Grimberg dev_info(dev->ctrl.device, "pci function %s\n", dev_name(&pdev->dev)); 19521b3c47c1SSagi Grimberg 195392f7a162SKeith Busch queue_work(nvme_workq, &dev->reset_work); 195457dacad5SJay Sternberg return 0; 195557dacad5SJay Sternberg 195657dacad5SJay Sternberg release_pools: 195757dacad5SJay Sternberg nvme_release_prp_pools(dev); 195857dacad5SJay Sternberg put_pci: 195957dacad5SJay Sternberg put_device(dev->dev); 1960b00a726aSKeith Busch nvme_dev_unmap(dev); 196157dacad5SJay Sternberg free: 196257dacad5SJay Sternberg kfree(dev->queues); 196357dacad5SJay Sternberg kfree(dev->entry); 196457dacad5SJay Sternberg kfree(dev); 196557dacad5SJay Sternberg return result; 196657dacad5SJay Sternberg } 196757dacad5SJay Sternberg 196857dacad5SJay Sternberg static void nvme_reset_notify(struct pci_dev *pdev, bool prepare) 196957dacad5SJay Sternberg { 197057dacad5SJay Sternberg struct nvme_dev *dev = pci_get_drvdata(pdev); 197157dacad5SJay Sternberg 197257dacad5SJay Sternberg if (prepare) 1973a5cdb68cSKeith Busch nvme_dev_disable(dev, false); 197457dacad5SJay Sternberg else 197592f7a162SKeith Busch queue_work(nvme_workq, &dev->reset_work); 197657dacad5SJay Sternberg } 197757dacad5SJay Sternberg 197857dacad5SJay Sternberg static void nvme_shutdown(struct pci_dev *pdev) 197957dacad5SJay Sternberg { 198057dacad5SJay Sternberg struct nvme_dev *dev = pci_get_drvdata(pdev); 1981a5cdb68cSKeith Busch nvme_dev_disable(dev, true); 198257dacad5SJay Sternberg } 198357dacad5SJay Sternberg 1984f58944e2SKeith Busch /* 1985f58944e2SKeith Busch * The driver's remove may be called on a device in a partially initialized 1986f58944e2SKeith Busch * state. This function must not have any dependencies on the device state in 1987f58944e2SKeith Busch * order to proceed. 1988f58944e2SKeith Busch */ 198957dacad5SJay Sternberg static void nvme_remove(struct pci_dev *pdev) 199057dacad5SJay Sternberg { 199157dacad5SJay Sternberg struct nvme_dev *dev = pci_get_drvdata(pdev); 199257dacad5SJay Sternberg 1993bb8d261eSChristoph Hellwig nvme_change_ctrl_state(&dev->ctrl, NVME_CTRL_DELETING); 1994bb8d261eSChristoph Hellwig 199557dacad5SJay Sternberg pci_set_drvdata(pdev, NULL); 19960ff9d4e1SKeith Busch 19970ff9d4e1SKeith Busch if (!pci_device_is_present(pdev)) 19980ff9d4e1SKeith Busch nvme_change_ctrl_state(&dev->ctrl, NVME_CTRL_DEAD); 19990ff9d4e1SKeith Busch 20009bf2b972SKeith Busch flush_work(&dev->reset_work); 200153029b04SKeith Busch nvme_uninit_ctrl(&dev->ctrl); 2002a5cdb68cSKeith Busch nvme_dev_disable(dev, true); 200357dacad5SJay Sternberg nvme_dev_remove_admin(dev); 200457dacad5SJay Sternberg nvme_free_queues(dev, 0); 200557dacad5SJay Sternberg nvme_release_cmb(dev); 200657dacad5SJay Sternberg nvme_release_prp_pools(dev); 2007b00a726aSKeith Busch nvme_dev_unmap(dev); 20081673f1f0SChristoph Hellwig nvme_put_ctrl(&dev->ctrl); 200957dacad5SJay Sternberg } 201057dacad5SJay Sternberg 201157dacad5SJay Sternberg #ifdef CONFIG_PM_SLEEP 201257dacad5SJay Sternberg static int nvme_suspend(struct device *dev) 201357dacad5SJay Sternberg { 201457dacad5SJay Sternberg struct pci_dev *pdev = to_pci_dev(dev); 201557dacad5SJay Sternberg struct nvme_dev *ndev = pci_get_drvdata(pdev); 201657dacad5SJay Sternberg 2017a5cdb68cSKeith Busch nvme_dev_disable(ndev, true); 201857dacad5SJay Sternberg return 0; 201957dacad5SJay Sternberg } 202057dacad5SJay Sternberg 202157dacad5SJay Sternberg static int nvme_resume(struct device *dev) 202257dacad5SJay Sternberg { 202357dacad5SJay Sternberg struct pci_dev *pdev = to_pci_dev(dev); 202457dacad5SJay Sternberg struct nvme_dev *ndev = pci_get_drvdata(pdev); 202557dacad5SJay Sternberg 202692f7a162SKeith Busch queue_work(nvme_workq, &ndev->reset_work); 202757dacad5SJay Sternberg return 0; 202857dacad5SJay Sternberg } 202957dacad5SJay Sternberg #endif 203057dacad5SJay Sternberg 203157dacad5SJay Sternberg static SIMPLE_DEV_PM_OPS(nvme_dev_pm_ops, nvme_suspend, nvme_resume); 203257dacad5SJay Sternberg 2033a0a3408eSKeith Busch static pci_ers_result_t nvme_error_detected(struct pci_dev *pdev, 2034a0a3408eSKeith Busch pci_channel_state_t state) 2035a0a3408eSKeith Busch { 2036a0a3408eSKeith Busch struct nvme_dev *dev = pci_get_drvdata(pdev); 2037a0a3408eSKeith Busch 2038a0a3408eSKeith Busch /* 2039a0a3408eSKeith Busch * A frozen channel requires a reset. When detected, this method will 2040a0a3408eSKeith Busch * shutdown the controller to quiesce. The controller will be restarted 2041a0a3408eSKeith Busch * after the slot reset through driver's slot_reset callback. 2042a0a3408eSKeith Busch */ 2043a0a3408eSKeith Busch switch (state) { 2044a0a3408eSKeith Busch case pci_channel_io_normal: 2045a0a3408eSKeith Busch return PCI_ERS_RESULT_CAN_RECOVER; 2046a0a3408eSKeith Busch case pci_channel_io_frozen: 2047d011fb31SKeith Busch dev_warn(dev->ctrl.device, 2048d011fb31SKeith Busch "frozen state error detected, reset controller\n"); 2049a5cdb68cSKeith Busch nvme_dev_disable(dev, false); 2050a0a3408eSKeith Busch return PCI_ERS_RESULT_NEED_RESET; 2051a0a3408eSKeith Busch case pci_channel_io_perm_failure: 2052d011fb31SKeith Busch dev_warn(dev->ctrl.device, 2053d011fb31SKeith Busch "failure state error detected, request disconnect\n"); 2054a0a3408eSKeith Busch return PCI_ERS_RESULT_DISCONNECT; 2055a0a3408eSKeith Busch } 2056a0a3408eSKeith Busch return PCI_ERS_RESULT_NEED_RESET; 2057a0a3408eSKeith Busch } 2058a0a3408eSKeith Busch 2059a0a3408eSKeith Busch static pci_ers_result_t nvme_slot_reset(struct pci_dev *pdev) 2060a0a3408eSKeith Busch { 2061a0a3408eSKeith Busch struct nvme_dev *dev = pci_get_drvdata(pdev); 2062a0a3408eSKeith Busch 20631b3c47c1SSagi Grimberg dev_info(dev->ctrl.device, "restart after slot reset\n"); 2064a0a3408eSKeith Busch pci_restore_state(pdev); 2065a0a3408eSKeith Busch queue_work(nvme_workq, &dev->reset_work); 2066a0a3408eSKeith Busch return PCI_ERS_RESULT_RECOVERED; 2067a0a3408eSKeith Busch } 2068a0a3408eSKeith Busch 2069a0a3408eSKeith Busch static void nvme_error_resume(struct pci_dev *pdev) 2070a0a3408eSKeith Busch { 2071a0a3408eSKeith Busch pci_cleanup_aer_uncorrect_error_status(pdev); 2072a0a3408eSKeith Busch } 2073a0a3408eSKeith Busch 207457dacad5SJay Sternberg static const struct pci_error_handlers nvme_err_handler = { 207557dacad5SJay Sternberg .error_detected = nvme_error_detected, 207657dacad5SJay Sternberg .slot_reset = nvme_slot_reset, 207757dacad5SJay Sternberg .resume = nvme_error_resume, 207857dacad5SJay Sternberg .reset_notify = nvme_reset_notify, 207957dacad5SJay Sternberg }; 208057dacad5SJay Sternberg 208157dacad5SJay Sternberg /* Move to pci_ids.h later */ 208257dacad5SJay Sternberg #define PCI_CLASS_STORAGE_EXPRESS 0x010802 208357dacad5SJay Sternberg 208457dacad5SJay Sternberg static const struct pci_device_id nvme_id_table[] = { 2085106198edSChristoph Hellwig { PCI_VDEVICE(INTEL, 0x0953), 208608095e70SKeith Busch .driver_data = NVME_QUIRK_STRIPE_SIZE | 208708095e70SKeith Busch NVME_QUIRK_DISCARD_ZEROES, }, 208899466e70SKeith Busch { PCI_VDEVICE(INTEL, 0x0a53), 208999466e70SKeith Busch .driver_data = NVME_QUIRK_STRIPE_SIZE | 209099466e70SKeith Busch NVME_QUIRK_DISCARD_ZEROES, }, 209199466e70SKeith Busch { PCI_VDEVICE(INTEL, 0x0a54), 209299466e70SKeith Busch .driver_data = NVME_QUIRK_STRIPE_SIZE | 209399466e70SKeith Busch NVME_QUIRK_DISCARD_ZEROES, }, 2094540c801cSKeith Busch { PCI_VDEVICE(INTEL, 0x5845), /* Qemu emulated controller */ 2095540c801cSKeith Busch .driver_data = NVME_QUIRK_IDENTIFY_CNS, }, 209657dacad5SJay Sternberg { PCI_DEVICE_CLASS(PCI_CLASS_STORAGE_EXPRESS, 0xffffff) }, 2097c74dc780SStephan Günther { PCI_DEVICE(PCI_VENDOR_ID_APPLE, 0x2001) }, 209857dacad5SJay Sternberg { 0, } 209957dacad5SJay Sternberg }; 210057dacad5SJay Sternberg MODULE_DEVICE_TABLE(pci, nvme_id_table); 210157dacad5SJay Sternberg 210257dacad5SJay Sternberg static struct pci_driver nvme_driver = { 210357dacad5SJay Sternberg .name = "nvme", 210457dacad5SJay Sternberg .id_table = nvme_id_table, 210557dacad5SJay Sternberg .probe = nvme_probe, 210657dacad5SJay Sternberg .remove = nvme_remove, 210757dacad5SJay Sternberg .shutdown = nvme_shutdown, 210857dacad5SJay Sternberg .driver = { 210957dacad5SJay Sternberg .pm = &nvme_dev_pm_ops, 211057dacad5SJay Sternberg }, 211157dacad5SJay Sternberg .err_handler = &nvme_err_handler, 211257dacad5SJay Sternberg }; 211357dacad5SJay Sternberg 211457dacad5SJay Sternberg static int __init nvme_init(void) 211557dacad5SJay Sternberg { 211657dacad5SJay Sternberg int result; 211757dacad5SJay Sternberg 211892f7a162SKeith Busch nvme_workq = alloc_workqueue("nvme", WQ_UNBOUND | WQ_MEM_RECLAIM, 0); 211957dacad5SJay Sternberg if (!nvme_workq) 212057dacad5SJay Sternberg return -ENOMEM; 212157dacad5SJay Sternberg 212257dacad5SJay Sternberg result = pci_register_driver(&nvme_driver); 212357dacad5SJay Sternberg if (result) 212457dacad5SJay Sternberg destroy_workqueue(nvme_workq); 212557dacad5SJay Sternberg return result; 212657dacad5SJay Sternberg } 212757dacad5SJay Sternberg 212857dacad5SJay Sternberg static void __exit nvme_exit(void) 212957dacad5SJay Sternberg { 213057dacad5SJay Sternberg pci_unregister_driver(&nvme_driver); 213157dacad5SJay Sternberg destroy_workqueue(nvme_workq); 213257dacad5SJay Sternberg _nvme_check_size(); 213357dacad5SJay Sternberg } 213457dacad5SJay Sternberg 213557dacad5SJay Sternberg MODULE_AUTHOR("Matthew Wilcox <willy@linux.intel.com>"); 213657dacad5SJay Sternberg MODULE_LICENSE("GPL"); 213757dacad5SJay Sternberg MODULE_VERSION("1.0"); 213857dacad5SJay Sternberg module_init(nvme_init); 213957dacad5SJay Sternberg module_exit(nvme_exit); 2140