157dacad5SJay Sternberg /* 257dacad5SJay Sternberg * NVM Express device driver 357dacad5SJay Sternberg * Copyright (c) 2011-2014, Intel Corporation. 457dacad5SJay Sternberg * 557dacad5SJay Sternberg * This program is free software; you can redistribute it and/or modify it 657dacad5SJay Sternberg * under the terms and conditions of the GNU General Public License, 757dacad5SJay Sternberg * version 2, as published by the Free Software Foundation. 857dacad5SJay Sternberg * 957dacad5SJay Sternberg * This program is distributed in the hope it will be useful, but WITHOUT 1057dacad5SJay Sternberg * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 1157dacad5SJay Sternberg * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 1257dacad5SJay Sternberg * more details. 1357dacad5SJay Sternberg */ 1457dacad5SJay Sternberg 15a0a3408eSKeith Busch #include <linux/aer.h> 1657dacad5SJay Sternberg #include <linux/bitops.h> 1757dacad5SJay Sternberg #include <linux/blkdev.h> 1857dacad5SJay Sternberg #include <linux/blk-mq.h> 19dca51e78SChristoph Hellwig #include <linux/blk-mq-pci.h> 2057dacad5SJay Sternberg #include <linux/cpu.h> 2157dacad5SJay Sternberg #include <linux/delay.h> 2257dacad5SJay Sternberg #include <linux/errno.h> 2357dacad5SJay Sternberg #include <linux/fs.h> 2457dacad5SJay Sternberg #include <linux/genhd.h> 2557dacad5SJay Sternberg #include <linux/hdreg.h> 2657dacad5SJay Sternberg #include <linux/idr.h> 2757dacad5SJay Sternberg #include <linux/init.h> 2857dacad5SJay Sternberg #include <linux/interrupt.h> 2957dacad5SJay Sternberg #include <linux/io.h> 3057dacad5SJay Sternberg #include <linux/kdev_t.h> 3157dacad5SJay Sternberg #include <linux/kernel.h> 3257dacad5SJay Sternberg #include <linux/mm.h> 3357dacad5SJay Sternberg #include <linux/module.h> 3457dacad5SJay Sternberg #include <linux/moduleparam.h> 3577bf25eaSKeith Busch #include <linux/mutex.h> 3657dacad5SJay Sternberg #include <linux/pci.h> 3757dacad5SJay Sternberg #include <linux/poison.h> 3857dacad5SJay Sternberg #include <linux/ptrace.h> 3957dacad5SJay Sternberg #include <linux/sched.h> 4057dacad5SJay Sternberg #include <linux/slab.h> 4157dacad5SJay Sternberg #include <linux/t10-pi.h> 422d55cd5fSChristoph Hellwig #include <linux/timer.h> 4357dacad5SJay Sternberg #include <linux/types.h> 449cf5c095SLinus Torvalds #include <linux/io-64-nonatomic-lo-hi.h> 451d277a63SKeith Busch #include <asm/unaligned.h> 4657dacad5SJay Sternberg 4757dacad5SJay Sternberg #include "nvme.h" 4857dacad5SJay Sternberg 4957dacad5SJay Sternberg #define NVME_Q_DEPTH 1024 5057dacad5SJay Sternberg #define NVME_AQ_DEPTH 256 5157dacad5SJay Sternberg #define SQ_SIZE(depth) (depth * sizeof(struct nvme_command)) 5257dacad5SJay Sternberg #define CQ_SIZE(depth) (depth * sizeof(struct nvme_completion)) 5357dacad5SJay Sternberg 54adf68f21SChristoph Hellwig /* 55adf68f21SChristoph Hellwig * We handle AEN commands ourselves and don't even let the 56adf68f21SChristoph Hellwig * block layer know about them. 57adf68f21SChristoph Hellwig */ 58f866fc42SChristoph Hellwig #define NVME_AQ_BLKMQ_DEPTH (NVME_AQ_DEPTH - NVME_NR_AERS) 59adf68f21SChristoph Hellwig 6057dacad5SJay Sternberg static int use_threaded_interrupts; 6157dacad5SJay Sternberg module_param(use_threaded_interrupts, int, 0); 6257dacad5SJay Sternberg 6357dacad5SJay Sternberg static bool use_cmb_sqes = true; 6457dacad5SJay Sternberg module_param(use_cmb_sqes, bool, 0644); 6557dacad5SJay Sternberg MODULE_PARM_DESC(use_cmb_sqes, "use controller's memory buffer for I/O SQes"); 6657dacad5SJay Sternberg 6757dacad5SJay Sternberg static struct workqueue_struct *nvme_workq; 6857dacad5SJay Sternberg 691c63dc66SChristoph Hellwig struct nvme_dev; 701c63dc66SChristoph Hellwig struct nvme_queue; 7157dacad5SJay Sternberg 7257dacad5SJay Sternberg static int nvme_reset(struct nvme_dev *dev); 73a0fa9647SJens Axboe static void nvme_process_cq(struct nvme_queue *nvmeq); 74a5cdb68cSKeith Busch static void nvme_dev_disable(struct nvme_dev *dev, bool shutdown); 7557dacad5SJay Sternberg 7657dacad5SJay Sternberg /* 771c63dc66SChristoph Hellwig * Represents an NVM Express device. Each nvme_dev is a PCI function. 781c63dc66SChristoph Hellwig */ 791c63dc66SChristoph Hellwig struct nvme_dev { 801c63dc66SChristoph Hellwig struct nvme_queue **queues; 811c63dc66SChristoph Hellwig struct blk_mq_tag_set tagset; 821c63dc66SChristoph Hellwig struct blk_mq_tag_set admin_tagset; 831c63dc66SChristoph Hellwig u32 __iomem *dbs; 841c63dc66SChristoph Hellwig struct device *dev; 851c63dc66SChristoph Hellwig struct dma_pool *prp_page_pool; 861c63dc66SChristoph Hellwig struct dma_pool *prp_small_pool; 871c63dc66SChristoph Hellwig unsigned queue_count; 881c63dc66SChristoph Hellwig unsigned online_queues; 891c63dc66SChristoph Hellwig unsigned max_qid; 901c63dc66SChristoph Hellwig int q_depth; 911c63dc66SChristoph Hellwig u32 db_stride; 921c63dc66SChristoph Hellwig void __iomem *bar; 931c63dc66SChristoph Hellwig struct work_struct reset_work; 945c8809e6SChristoph Hellwig struct work_struct remove_work; 952d55cd5fSChristoph Hellwig struct timer_list watchdog_timer; 9677bf25eaSKeith Busch struct mutex shutdown_lock; 971c63dc66SChristoph Hellwig bool subsystem; 981c63dc66SChristoph Hellwig void __iomem *cmb; 991c63dc66SChristoph Hellwig dma_addr_t cmb_dma_addr; 1001c63dc66SChristoph Hellwig u64 cmb_size; 1011c63dc66SChristoph Hellwig u32 cmbsz; 1021c63dc66SChristoph Hellwig struct nvme_ctrl ctrl; 103db3cbfffSKeith Busch struct completion ioq_wait; 10457dacad5SJay Sternberg }; 10557dacad5SJay Sternberg 1061c63dc66SChristoph Hellwig static inline struct nvme_dev *to_nvme_dev(struct nvme_ctrl *ctrl) 1071c63dc66SChristoph Hellwig { 1081c63dc66SChristoph Hellwig return container_of(ctrl, struct nvme_dev, ctrl); 1091c63dc66SChristoph Hellwig } 1101c63dc66SChristoph Hellwig 11157dacad5SJay Sternberg /* 11257dacad5SJay Sternberg * An NVM Express queue. Each device has at least two (one for admin 11357dacad5SJay Sternberg * commands and one for I/O commands). 11457dacad5SJay Sternberg */ 11557dacad5SJay Sternberg struct nvme_queue { 11657dacad5SJay Sternberg struct device *q_dmadev; 11757dacad5SJay Sternberg struct nvme_dev *dev; 11857dacad5SJay Sternberg char irqname[24]; /* nvme4294967295-65535\0 */ 11957dacad5SJay Sternberg spinlock_t q_lock; 12057dacad5SJay Sternberg struct nvme_command *sq_cmds; 12157dacad5SJay Sternberg struct nvme_command __iomem *sq_cmds_io; 12257dacad5SJay Sternberg volatile struct nvme_completion *cqes; 12357dacad5SJay Sternberg struct blk_mq_tags **tags; 12457dacad5SJay Sternberg dma_addr_t sq_dma_addr; 12557dacad5SJay Sternberg dma_addr_t cq_dma_addr; 12657dacad5SJay Sternberg u32 __iomem *q_db; 12757dacad5SJay Sternberg u16 q_depth; 12857dacad5SJay Sternberg s16 cq_vector; 12957dacad5SJay Sternberg u16 sq_tail; 13057dacad5SJay Sternberg u16 cq_head; 13157dacad5SJay Sternberg u16 qid; 13257dacad5SJay Sternberg u8 cq_phase; 13357dacad5SJay Sternberg u8 cqe_seen; 13457dacad5SJay Sternberg }; 13557dacad5SJay Sternberg 13657dacad5SJay Sternberg /* 13771bd150cSChristoph Hellwig * The nvme_iod describes the data in an I/O, including the list of PRP 13871bd150cSChristoph Hellwig * entries. You can't see it in this data structure because C doesn't let 139f4800d6dSChristoph Hellwig * me express that. Use nvme_init_iod to ensure there's enough space 14071bd150cSChristoph Hellwig * allocated to store the PRP list. 14171bd150cSChristoph Hellwig */ 14271bd150cSChristoph Hellwig struct nvme_iod { 143f4800d6dSChristoph Hellwig struct nvme_queue *nvmeq; 144f4800d6dSChristoph Hellwig int aborted; 14571bd150cSChristoph Hellwig int npages; /* In the PRP list. 0 means small pool in use */ 14671bd150cSChristoph Hellwig int nents; /* Used in scatterlist */ 14771bd150cSChristoph Hellwig int length; /* Of data, in bytes */ 14871bd150cSChristoph Hellwig dma_addr_t first_dma; 149bf684057SChristoph Hellwig struct scatterlist meta_sg; /* metadata requires single contiguous buffer */ 150f4800d6dSChristoph Hellwig struct scatterlist *sg; 151f4800d6dSChristoph Hellwig struct scatterlist inline_sg[0]; 15257dacad5SJay Sternberg }; 15357dacad5SJay Sternberg 15457dacad5SJay Sternberg /* 15557dacad5SJay Sternberg * Check we didin't inadvertently grow the command struct 15657dacad5SJay Sternberg */ 15757dacad5SJay Sternberg static inline void _nvme_check_size(void) 15857dacad5SJay Sternberg { 15957dacad5SJay Sternberg BUILD_BUG_ON(sizeof(struct nvme_rw_command) != 64); 16057dacad5SJay Sternberg BUILD_BUG_ON(sizeof(struct nvme_create_cq) != 64); 16157dacad5SJay Sternberg BUILD_BUG_ON(sizeof(struct nvme_create_sq) != 64); 16257dacad5SJay Sternberg BUILD_BUG_ON(sizeof(struct nvme_delete_queue) != 64); 16357dacad5SJay Sternberg BUILD_BUG_ON(sizeof(struct nvme_features) != 64); 16457dacad5SJay Sternberg BUILD_BUG_ON(sizeof(struct nvme_format_cmd) != 64); 16557dacad5SJay Sternberg BUILD_BUG_ON(sizeof(struct nvme_abort_cmd) != 64); 16657dacad5SJay Sternberg BUILD_BUG_ON(sizeof(struct nvme_command) != 64); 16757dacad5SJay Sternberg BUILD_BUG_ON(sizeof(struct nvme_id_ctrl) != 4096); 16857dacad5SJay Sternberg BUILD_BUG_ON(sizeof(struct nvme_id_ns) != 4096); 16957dacad5SJay Sternberg BUILD_BUG_ON(sizeof(struct nvme_lba_range_type) != 64); 17057dacad5SJay Sternberg BUILD_BUG_ON(sizeof(struct nvme_smart_log) != 512); 17157dacad5SJay Sternberg } 17257dacad5SJay Sternberg 17357dacad5SJay Sternberg /* 17457dacad5SJay Sternberg * Max size of iod being embedded in the request payload 17557dacad5SJay Sternberg */ 17657dacad5SJay Sternberg #define NVME_INT_PAGES 2 1775fd4ce1bSChristoph Hellwig #define NVME_INT_BYTES(dev) (NVME_INT_PAGES * (dev)->ctrl.page_size) 17857dacad5SJay Sternberg 17957dacad5SJay Sternberg /* 18057dacad5SJay Sternberg * Will slightly overestimate the number of pages needed. This is OK 18157dacad5SJay Sternberg * as it only leads to a small amount of wasted memory for the lifetime of 18257dacad5SJay Sternberg * the I/O. 18357dacad5SJay Sternberg */ 18457dacad5SJay Sternberg static int nvme_npages(unsigned size, struct nvme_dev *dev) 18557dacad5SJay Sternberg { 1865fd4ce1bSChristoph Hellwig unsigned nprps = DIV_ROUND_UP(size + dev->ctrl.page_size, 1875fd4ce1bSChristoph Hellwig dev->ctrl.page_size); 18857dacad5SJay Sternberg return DIV_ROUND_UP(8 * nprps, PAGE_SIZE - 8); 18957dacad5SJay Sternberg } 19057dacad5SJay Sternberg 191f4800d6dSChristoph Hellwig static unsigned int nvme_iod_alloc_size(struct nvme_dev *dev, 192f4800d6dSChristoph Hellwig unsigned int size, unsigned int nseg) 193f4800d6dSChristoph Hellwig { 194f4800d6dSChristoph Hellwig return sizeof(__le64 *) * nvme_npages(size, dev) + 195f4800d6dSChristoph Hellwig sizeof(struct scatterlist) * nseg; 196f4800d6dSChristoph Hellwig } 197f4800d6dSChristoph Hellwig 19857dacad5SJay Sternberg static unsigned int nvme_cmd_size(struct nvme_dev *dev) 19957dacad5SJay Sternberg { 200f4800d6dSChristoph Hellwig return sizeof(struct nvme_iod) + 201f4800d6dSChristoph Hellwig nvme_iod_alloc_size(dev, NVME_INT_BYTES(dev), NVME_INT_PAGES); 20257dacad5SJay Sternberg } 20357dacad5SJay Sternberg 204dca51e78SChristoph Hellwig static int nvmeq_irq(struct nvme_queue *nvmeq) 205dca51e78SChristoph Hellwig { 206dca51e78SChristoph Hellwig return pci_irq_vector(to_pci_dev(nvmeq->dev->dev), nvmeq->cq_vector); 207dca51e78SChristoph Hellwig } 208dca51e78SChristoph Hellwig 20957dacad5SJay Sternberg static int nvme_admin_init_hctx(struct blk_mq_hw_ctx *hctx, void *data, 21057dacad5SJay Sternberg unsigned int hctx_idx) 21157dacad5SJay Sternberg { 21257dacad5SJay Sternberg struct nvme_dev *dev = data; 21357dacad5SJay Sternberg struct nvme_queue *nvmeq = dev->queues[0]; 21457dacad5SJay Sternberg 21557dacad5SJay Sternberg WARN_ON(hctx_idx != 0); 21657dacad5SJay Sternberg WARN_ON(dev->admin_tagset.tags[0] != hctx->tags); 21757dacad5SJay Sternberg WARN_ON(nvmeq->tags); 21857dacad5SJay Sternberg 21957dacad5SJay Sternberg hctx->driver_data = nvmeq; 22057dacad5SJay Sternberg nvmeq->tags = &dev->admin_tagset.tags[0]; 22157dacad5SJay Sternberg return 0; 22257dacad5SJay Sternberg } 22357dacad5SJay Sternberg 22457dacad5SJay Sternberg static void nvme_admin_exit_hctx(struct blk_mq_hw_ctx *hctx, unsigned int hctx_idx) 22557dacad5SJay Sternberg { 22657dacad5SJay Sternberg struct nvme_queue *nvmeq = hctx->driver_data; 22757dacad5SJay Sternberg 22857dacad5SJay Sternberg nvmeq->tags = NULL; 22957dacad5SJay Sternberg } 23057dacad5SJay Sternberg 23157dacad5SJay Sternberg static int nvme_admin_init_request(void *data, struct request *req, 23257dacad5SJay Sternberg unsigned int hctx_idx, unsigned int rq_idx, 23357dacad5SJay Sternberg unsigned int numa_node) 23457dacad5SJay Sternberg { 23557dacad5SJay Sternberg struct nvme_dev *dev = data; 236f4800d6dSChristoph Hellwig struct nvme_iod *iod = blk_mq_rq_to_pdu(req); 23757dacad5SJay Sternberg struct nvme_queue *nvmeq = dev->queues[0]; 23857dacad5SJay Sternberg 23957dacad5SJay Sternberg BUG_ON(!nvmeq); 240f4800d6dSChristoph Hellwig iod->nvmeq = nvmeq; 24157dacad5SJay Sternberg return 0; 24257dacad5SJay Sternberg } 24357dacad5SJay Sternberg 24457dacad5SJay Sternberg static int nvme_init_hctx(struct blk_mq_hw_ctx *hctx, void *data, 24557dacad5SJay Sternberg unsigned int hctx_idx) 24657dacad5SJay Sternberg { 24757dacad5SJay Sternberg struct nvme_dev *dev = data; 24857dacad5SJay Sternberg struct nvme_queue *nvmeq = dev->queues[hctx_idx + 1]; 24957dacad5SJay Sternberg 25057dacad5SJay Sternberg if (!nvmeq->tags) 25157dacad5SJay Sternberg nvmeq->tags = &dev->tagset.tags[hctx_idx]; 25257dacad5SJay Sternberg 25357dacad5SJay Sternberg WARN_ON(dev->tagset.tags[hctx_idx] != hctx->tags); 25457dacad5SJay Sternberg hctx->driver_data = nvmeq; 25557dacad5SJay Sternberg return 0; 25657dacad5SJay Sternberg } 25757dacad5SJay Sternberg 25857dacad5SJay Sternberg static int nvme_init_request(void *data, struct request *req, 25957dacad5SJay Sternberg unsigned int hctx_idx, unsigned int rq_idx, 26057dacad5SJay Sternberg unsigned int numa_node) 26157dacad5SJay Sternberg { 26257dacad5SJay Sternberg struct nvme_dev *dev = data; 263f4800d6dSChristoph Hellwig struct nvme_iod *iod = blk_mq_rq_to_pdu(req); 26457dacad5SJay Sternberg struct nvme_queue *nvmeq = dev->queues[hctx_idx + 1]; 26557dacad5SJay Sternberg 26657dacad5SJay Sternberg BUG_ON(!nvmeq); 267f4800d6dSChristoph Hellwig iod->nvmeq = nvmeq; 26857dacad5SJay Sternberg return 0; 26957dacad5SJay Sternberg } 27057dacad5SJay Sternberg 271dca51e78SChristoph Hellwig static int nvme_pci_map_queues(struct blk_mq_tag_set *set) 272dca51e78SChristoph Hellwig { 273dca51e78SChristoph Hellwig struct nvme_dev *dev = set->driver_data; 274dca51e78SChristoph Hellwig 275dca51e78SChristoph Hellwig return blk_mq_pci_map_queues(set, to_pci_dev(dev->dev)); 276dca51e78SChristoph Hellwig } 277dca51e78SChristoph Hellwig 27857dacad5SJay Sternberg /** 279adf68f21SChristoph Hellwig * __nvme_submit_cmd() - Copy a command into a queue and ring the doorbell 28057dacad5SJay Sternberg * @nvmeq: The queue to use 28157dacad5SJay Sternberg * @cmd: The command to send 28257dacad5SJay Sternberg * 28357dacad5SJay Sternberg * Safe to use from interrupt context 28457dacad5SJay Sternberg */ 28557dacad5SJay Sternberg static void __nvme_submit_cmd(struct nvme_queue *nvmeq, 28657dacad5SJay Sternberg struct nvme_command *cmd) 28757dacad5SJay Sternberg { 28857dacad5SJay Sternberg u16 tail = nvmeq->sq_tail; 28957dacad5SJay Sternberg 29057dacad5SJay Sternberg if (nvmeq->sq_cmds_io) 29157dacad5SJay Sternberg memcpy_toio(&nvmeq->sq_cmds_io[tail], cmd, sizeof(*cmd)); 29257dacad5SJay Sternberg else 29357dacad5SJay Sternberg memcpy(&nvmeq->sq_cmds[tail], cmd, sizeof(*cmd)); 29457dacad5SJay Sternberg 29557dacad5SJay Sternberg if (++tail == nvmeq->q_depth) 29657dacad5SJay Sternberg tail = 0; 29757dacad5SJay Sternberg writel(tail, nvmeq->q_db); 29857dacad5SJay Sternberg nvmeq->sq_tail = tail; 29957dacad5SJay Sternberg } 30057dacad5SJay Sternberg 301f4800d6dSChristoph Hellwig static __le64 **iod_list(struct request *req) 30257dacad5SJay Sternberg { 303f4800d6dSChristoph Hellwig struct nvme_iod *iod = blk_mq_rq_to_pdu(req); 304f4800d6dSChristoph Hellwig return (__le64 **)(iod->sg + req->nr_phys_segments); 30557dacad5SJay Sternberg } 30657dacad5SJay Sternberg 30758b45602SMing Lin static int nvme_init_iod(struct request *rq, unsigned size, 30858b45602SMing Lin struct nvme_dev *dev) 30957dacad5SJay Sternberg { 310f4800d6dSChristoph Hellwig struct nvme_iod *iod = blk_mq_rq_to_pdu(rq); 311f4800d6dSChristoph Hellwig int nseg = rq->nr_phys_segments; 312f4800d6dSChristoph Hellwig 313f4800d6dSChristoph Hellwig if (nseg > NVME_INT_PAGES || size > NVME_INT_BYTES(dev)) { 314f4800d6dSChristoph Hellwig iod->sg = kmalloc(nvme_iod_alloc_size(dev, size, nseg), GFP_ATOMIC); 315f4800d6dSChristoph Hellwig if (!iod->sg) 316f4800d6dSChristoph Hellwig return BLK_MQ_RQ_QUEUE_BUSY; 317f4800d6dSChristoph Hellwig } else { 318f4800d6dSChristoph Hellwig iod->sg = iod->inline_sg; 31957dacad5SJay Sternberg } 32057dacad5SJay Sternberg 321f4800d6dSChristoph Hellwig iod->aborted = 0; 32257dacad5SJay Sternberg iod->npages = -1; 32357dacad5SJay Sternberg iod->nents = 0; 324f4800d6dSChristoph Hellwig iod->length = size; 325f80ec966SKeith Busch 326f80ec966SKeith Busch if (!(rq->cmd_flags & REQ_DONTPREP)) { 327f80ec966SKeith Busch rq->retries = 0; 328f80ec966SKeith Busch rq->cmd_flags |= REQ_DONTPREP; 329f80ec966SKeith Busch } 330f4800d6dSChristoph Hellwig return 0; 33157dacad5SJay Sternberg } 33257dacad5SJay Sternberg 333f4800d6dSChristoph Hellwig static void nvme_free_iod(struct nvme_dev *dev, struct request *req) 33457dacad5SJay Sternberg { 335f4800d6dSChristoph Hellwig struct nvme_iod *iod = blk_mq_rq_to_pdu(req); 3365fd4ce1bSChristoph Hellwig const int last_prp = dev->ctrl.page_size / 8 - 1; 33757dacad5SJay Sternberg int i; 338f4800d6dSChristoph Hellwig __le64 **list = iod_list(req); 33957dacad5SJay Sternberg dma_addr_t prp_dma = iod->first_dma; 34057dacad5SJay Sternberg 3416904242dSMing Lin nvme_cleanup_cmd(req); 34203b5929eSMing Lin 34357dacad5SJay Sternberg if (iod->npages == 0) 34457dacad5SJay Sternberg dma_pool_free(dev->prp_small_pool, list[0], prp_dma); 34557dacad5SJay Sternberg for (i = 0; i < iod->npages; i++) { 34657dacad5SJay Sternberg __le64 *prp_list = list[i]; 34757dacad5SJay Sternberg dma_addr_t next_prp_dma = le64_to_cpu(prp_list[last_prp]); 34857dacad5SJay Sternberg dma_pool_free(dev->prp_page_pool, prp_list, prp_dma); 34957dacad5SJay Sternberg prp_dma = next_prp_dma; 35057dacad5SJay Sternberg } 35157dacad5SJay Sternberg 352f4800d6dSChristoph Hellwig if (iod->sg != iod->inline_sg) 353f4800d6dSChristoph Hellwig kfree(iod->sg); 35457dacad5SJay Sternberg } 35557dacad5SJay Sternberg 35657dacad5SJay Sternberg #ifdef CONFIG_BLK_DEV_INTEGRITY 35757dacad5SJay Sternberg static void nvme_dif_prep(u32 p, u32 v, struct t10_pi_tuple *pi) 35857dacad5SJay Sternberg { 35957dacad5SJay Sternberg if (be32_to_cpu(pi->ref_tag) == v) 36057dacad5SJay Sternberg pi->ref_tag = cpu_to_be32(p); 36157dacad5SJay Sternberg } 36257dacad5SJay Sternberg 36357dacad5SJay Sternberg static void nvme_dif_complete(u32 p, u32 v, struct t10_pi_tuple *pi) 36457dacad5SJay Sternberg { 36557dacad5SJay Sternberg if (be32_to_cpu(pi->ref_tag) == p) 36657dacad5SJay Sternberg pi->ref_tag = cpu_to_be32(v); 36757dacad5SJay Sternberg } 36857dacad5SJay Sternberg 36957dacad5SJay Sternberg /** 37057dacad5SJay Sternberg * nvme_dif_remap - remaps ref tags to bip seed and physical lba 37157dacad5SJay Sternberg * 37257dacad5SJay Sternberg * The virtual start sector is the one that was originally submitted by the 37357dacad5SJay Sternberg * block layer. Due to partitioning, MD/DM cloning, etc. the actual physical 37457dacad5SJay Sternberg * start sector may be different. Remap protection information to match the 37557dacad5SJay Sternberg * physical LBA on writes, and back to the original seed on reads. 37657dacad5SJay Sternberg * 37757dacad5SJay Sternberg * Type 0 and 3 do not have a ref tag, so no remapping required. 37857dacad5SJay Sternberg */ 37957dacad5SJay Sternberg static void nvme_dif_remap(struct request *req, 38057dacad5SJay Sternberg void (*dif_swap)(u32 p, u32 v, struct t10_pi_tuple *pi)) 38157dacad5SJay Sternberg { 38257dacad5SJay Sternberg struct nvme_ns *ns = req->rq_disk->private_data; 38357dacad5SJay Sternberg struct bio_integrity_payload *bip; 38457dacad5SJay Sternberg struct t10_pi_tuple *pi; 38557dacad5SJay Sternberg void *p, *pmap; 38657dacad5SJay Sternberg u32 i, nlb, ts, phys, virt; 38757dacad5SJay Sternberg 38857dacad5SJay Sternberg if (!ns->pi_type || ns->pi_type == NVME_NS_DPS_PI_TYPE3) 38957dacad5SJay Sternberg return; 39057dacad5SJay Sternberg 39157dacad5SJay Sternberg bip = bio_integrity(req->bio); 39257dacad5SJay Sternberg if (!bip) 39357dacad5SJay Sternberg return; 39457dacad5SJay Sternberg 39557dacad5SJay Sternberg pmap = kmap_atomic(bip->bip_vec->bv_page) + bip->bip_vec->bv_offset; 39657dacad5SJay Sternberg 39757dacad5SJay Sternberg p = pmap; 39857dacad5SJay Sternberg virt = bip_get_seed(bip); 39957dacad5SJay Sternberg phys = nvme_block_nr(ns, blk_rq_pos(req)); 40057dacad5SJay Sternberg nlb = (blk_rq_bytes(req) >> ns->lba_shift); 401ac6fc48cSDan Williams ts = ns->disk->queue->integrity.tuple_size; 40257dacad5SJay Sternberg 40357dacad5SJay Sternberg for (i = 0; i < nlb; i++, virt++, phys++) { 40457dacad5SJay Sternberg pi = (struct t10_pi_tuple *)p; 40557dacad5SJay Sternberg dif_swap(phys, virt, pi); 40657dacad5SJay Sternberg p += ts; 40757dacad5SJay Sternberg } 40857dacad5SJay Sternberg kunmap_atomic(pmap); 40957dacad5SJay Sternberg } 41057dacad5SJay Sternberg #else /* CONFIG_BLK_DEV_INTEGRITY */ 41157dacad5SJay Sternberg static void nvme_dif_remap(struct request *req, 41257dacad5SJay Sternberg void (*dif_swap)(u32 p, u32 v, struct t10_pi_tuple *pi)) 41357dacad5SJay Sternberg { 41457dacad5SJay Sternberg } 41557dacad5SJay Sternberg static void nvme_dif_prep(u32 p, u32 v, struct t10_pi_tuple *pi) 41657dacad5SJay Sternberg { 41757dacad5SJay Sternberg } 41857dacad5SJay Sternberg static void nvme_dif_complete(u32 p, u32 v, struct t10_pi_tuple *pi) 41957dacad5SJay Sternberg { 42057dacad5SJay Sternberg } 42157dacad5SJay Sternberg #endif 42257dacad5SJay Sternberg 423f4800d6dSChristoph Hellwig static bool nvme_setup_prps(struct nvme_dev *dev, struct request *req, 42469d2b571SChristoph Hellwig int total_len) 42557dacad5SJay Sternberg { 426f4800d6dSChristoph Hellwig struct nvme_iod *iod = blk_mq_rq_to_pdu(req); 42757dacad5SJay Sternberg struct dma_pool *pool; 42857dacad5SJay Sternberg int length = total_len; 42957dacad5SJay Sternberg struct scatterlist *sg = iod->sg; 43057dacad5SJay Sternberg int dma_len = sg_dma_len(sg); 43157dacad5SJay Sternberg u64 dma_addr = sg_dma_address(sg); 4325fd4ce1bSChristoph Hellwig u32 page_size = dev->ctrl.page_size; 43357dacad5SJay Sternberg int offset = dma_addr & (page_size - 1); 43457dacad5SJay Sternberg __le64 *prp_list; 435f4800d6dSChristoph Hellwig __le64 **list = iod_list(req); 43657dacad5SJay Sternberg dma_addr_t prp_dma; 43757dacad5SJay Sternberg int nprps, i; 43857dacad5SJay Sternberg 43957dacad5SJay Sternberg length -= (page_size - offset); 44057dacad5SJay Sternberg if (length <= 0) 44169d2b571SChristoph Hellwig return true; 44257dacad5SJay Sternberg 44357dacad5SJay Sternberg dma_len -= (page_size - offset); 44457dacad5SJay Sternberg if (dma_len) { 44557dacad5SJay Sternberg dma_addr += (page_size - offset); 44657dacad5SJay Sternberg } else { 44757dacad5SJay Sternberg sg = sg_next(sg); 44857dacad5SJay Sternberg dma_addr = sg_dma_address(sg); 44957dacad5SJay Sternberg dma_len = sg_dma_len(sg); 45057dacad5SJay Sternberg } 45157dacad5SJay Sternberg 45257dacad5SJay Sternberg if (length <= page_size) { 45357dacad5SJay Sternberg iod->first_dma = dma_addr; 45469d2b571SChristoph Hellwig return true; 45557dacad5SJay Sternberg } 45657dacad5SJay Sternberg 45757dacad5SJay Sternberg nprps = DIV_ROUND_UP(length, page_size); 45857dacad5SJay Sternberg if (nprps <= (256 / 8)) { 45957dacad5SJay Sternberg pool = dev->prp_small_pool; 46057dacad5SJay Sternberg iod->npages = 0; 46157dacad5SJay Sternberg } else { 46257dacad5SJay Sternberg pool = dev->prp_page_pool; 46357dacad5SJay Sternberg iod->npages = 1; 46457dacad5SJay Sternberg } 46557dacad5SJay Sternberg 46669d2b571SChristoph Hellwig prp_list = dma_pool_alloc(pool, GFP_ATOMIC, &prp_dma); 46757dacad5SJay Sternberg if (!prp_list) { 46857dacad5SJay Sternberg iod->first_dma = dma_addr; 46957dacad5SJay Sternberg iod->npages = -1; 47069d2b571SChristoph Hellwig return false; 47157dacad5SJay Sternberg } 47257dacad5SJay Sternberg list[0] = prp_list; 47357dacad5SJay Sternberg iod->first_dma = prp_dma; 47457dacad5SJay Sternberg i = 0; 47557dacad5SJay Sternberg for (;;) { 47657dacad5SJay Sternberg if (i == page_size >> 3) { 47757dacad5SJay Sternberg __le64 *old_prp_list = prp_list; 47869d2b571SChristoph Hellwig prp_list = dma_pool_alloc(pool, GFP_ATOMIC, &prp_dma); 47957dacad5SJay Sternberg if (!prp_list) 48069d2b571SChristoph Hellwig return false; 48157dacad5SJay Sternberg list[iod->npages++] = prp_list; 48257dacad5SJay Sternberg prp_list[0] = old_prp_list[i - 1]; 48357dacad5SJay Sternberg old_prp_list[i - 1] = cpu_to_le64(prp_dma); 48457dacad5SJay Sternberg i = 1; 48557dacad5SJay Sternberg } 48657dacad5SJay Sternberg prp_list[i++] = cpu_to_le64(dma_addr); 48757dacad5SJay Sternberg dma_len -= page_size; 48857dacad5SJay Sternberg dma_addr += page_size; 48957dacad5SJay Sternberg length -= page_size; 49057dacad5SJay Sternberg if (length <= 0) 49157dacad5SJay Sternberg break; 49257dacad5SJay Sternberg if (dma_len > 0) 49357dacad5SJay Sternberg continue; 49457dacad5SJay Sternberg BUG_ON(dma_len < 0); 49557dacad5SJay Sternberg sg = sg_next(sg); 49657dacad5SJay Sternberg dma_addr = sg_dma_address(sg); 49757dacad5SJay Sternberg dma_len = sg_dma_len(sg); 49857dacad5SJay Sternberg } 49957dacad5SJay Sternberg 50069d2b571SChristoph Hellwig return true; 50157dacad5SJay Sternberg } 50257dacad5SJay Sternberg 503f4800d6dSChristoph Hellwig static int nvme_map_data(struct nvme_dev *dev, struct request *req, 50403b5929eSMing Lin unsigned size, struct nvme_command *cmnd) 50557dacad5SJay Sternberg { 506f4800d6dSChristoph Hellwig struct nvme_iod *iod = blk_mq_rq_to_pdu(req); 507ba1ca37eSChristoph Hellwig struct request_queue *q = req->q; 508ba1ca37eSChristoph Hellwig enum dma_data_direction dma_dir = rq_data_dir(req) ? 509ba1ca37eSChristoph Hellwig DMA_TO_DEVICE : DMA_FROM_DEVICE; 510ba1ca37eSChristoph Hellwig int ret = BLK_MQ_RQ_QUEUE_ERROR; 51157dacad5SJay Sternberg 512ba1ca37eSChristoph Hellwig sg_init_table(iod->sg, req->nr_phys_segments); 513ba1ca37eSChristoph Hellwig iod->nents = blk_rq_map_sg(q, req, iod->sg); 514ba1ca37eSChristoph Hellwig if (!iod->nents) 515ba1ca37eSChristoph Hellwig goto out; 516ba1ca37eSChristoph Hellwig 517ba1ca37eSChristoph Hellwig ret = BLK_MQ_RQ_QUEUE_BUSY; 518ba1ca37eSChristoph Hellwig if (!dma_map_sg(dev->dev, iod->sg, iod->nents, dma_dir)) 519ba1ca37eSChristoph Hellwig goto out; 520ba1ca37eSChristoph Hellwig 52103b5929eSMing Lin if (!nvme_setup_prps(dev, req, size)) 522ba1ca37eSChristoph Hellwig goto out_unmap; 523ba1ca37eSChristoph Hellwig 524ba1ca37eSChristoph Hellwig ret = BLK_MQ_RQ_QUEUE_ERROR; 525ba1ca37eSChristoph Hellwig if (blk_integrity_rq(req)) { 526ba1ca37eSChristoph Hellwig if (blk_rq_count_integrity_sg(q, req->bio) != 1) 527ba1ca37eSChristoph Hellwig goto out_unmap; 528ba1ca37eSChristoph Hellwig 529bf684057SChristoph Hellwig sg_init_table(&iod->meta_sg, 1); 530bf684057SChristoph Hellwig if (blk_rq_map_integrity_sg(q, req->bio, &iod->meta_sg) != 1) 531ba1ca37eSChristoph Hellwig goto out_unmap; 532ba1ca37eSChristoph Hellwig 533ba1ca37eSChristoph Hellwig if (rq_data_dir(req)) 534ba1ca37eSChristoph Hellwig nvme_dif_remap(req, nvme_dif_prep); 535ba1ca37eSChristoph Hellwig 536bf684057SChristoph Hellwig if (!dma_map_sg(dev->dev, &iod->meta_sg, 1, dma_dir)) 537ba1ca37eSChristoph Hellwig goto out_unmap; 53857dacad5SJay Sternberg } 53957dacad5SJay Sternberg 540eb793e2cSChristoph Hellwig cmnd->rw.dptr.prp1 = cpu_to_le64(sg_dma_address(iod->sg)); 541eb793e2cSChristoph Hellwig cmnd->rw.dptr.prp2 = cpu_to_le64(iod->first_dma); 542ba1ca37eSChristoph Hellwig if (blk_integrity_rq(req)) 543bf684057SChristoph Hellwig cmnd->rw.metadata = cpu_to_le64(sg_dma_address(&iod->meta_sg)); 544ba1ca37eSChristoph Hellwig return BLK_MQ_RQ_QUEUE_OK; 545ba1ca37eSChristoph Hellwig 546ba1ca37eSChristoph Hellwig out_unmap: 547ba1ca37eSChristoph Hellwig dma_unmap_sg(dev->dev, iod->sg, iod->nents, dma_dir); 548ba1ca37eSChristoph Hellwig out: 549ba1ca37eSChristoph Hellwig return ret; 55057dacad5SJay Sternberg } 55157dacad5SJay Sternberg 552f4800d6dSChristoph Hellwig static void nvme_unmap_data(struct nvme_dev *dev, struct request *req) 553d4f6c3abSChristoph Hellwig { 554f4800d6dSChristoph Hellwig struct nvme_iod *iod = blk_mq_rq_to_pdu(req); 555d4f6c3abSChristoph Hellwig enum dma_data_direction dma_dir = rq_data_dir(req) ? 556d4f6c3abSChristoph Hellwig DMA_TO_DEVICE : DMA_FROM_DEVICE; 557d4f6c3abSChristoph Hellwig 558d4f6c3abSChristoph Hellwig if (iod->nents) { 559d4f6c3abSChristoph Hellwig dma_unmap_sg(dev->dev, iod->sg, iod->nents, dma_dir); 560d4f6c3abSChristoph Hellwig if (blk_integrity_rq(req)) { 561d4f6c3abSChristoph Hellwig if (!rq_data_dir(req)) 562d4f6c3abSChristoph Hellwig nvme_dif_remap(req, nvme_dif_complete); 563bf684057SChristoph Hellwig dma_unmap_sg(dev->dev, &iod->meta_sg, 1, dma_dir); 564d4f6c3abSChristoph Hellwig } 565d4f6c3abSChristoph Hellwig } 566d4f6c3abSChristoph Hellwig 567f4800d6dSChristoph Hellwig nvme_free_iod(dev, req); 56857dacad5SJay Sternberg } 56957dacad5SJay Sternberg 57057dacad5SJay Sternberg /* 57157dacad5SJay Sternberg * NOTE: ns is NULL when called on the admin queue. 57257dacad5SJay Sternberg */ 57357dacad5SJay Sternberg static int nvme_queue_rq(struct blk_mq_hw_ctx *hctx, 57457dacad5SJay Sternberg const struct blk_mq_queue_data *bd) 57557dacad5SJay Sternberg { 57657dacad5SJay Sternberg struct nvme_ns *ns = hctx->queue->queuedata; 57757dacad5SJay Sternberg struct nvme_queue *nvmeq = hctx->driver_data; 57857dacad5SJay Sternberg struct nvme_dev *dev = nvmeq->dev; 57957dacad5SJay Sternberg struct request *req = bd->rq; 580ba1ca37eSChristoph Hellwig struct nvme_command cmnd; 58158b45602SMing Lin unsigned map_len; 582ba1ca37eSChristoph Hellwig int ret = BLK_MQ_RQ_QUEUE_OK; 58357dacad5SJay Sternberg 58457dacad5SJay Sternberg /* 58557dacad5SJay Sternberg * If formated with metadata, require the block layer provide a buffer 58657dacad5SJay Sternberg * unless this namespace is formated such that the metadata can be 58757dacad5SJay Sternberg * stripped/generated by the controller with PRACT=1. 58857dacad5SJay Sternberg */ 58957dacad5SJay Sternberg if (ns && ns->ms && !blk_integrity_rq(req)) { 59057dacad5SJay Sternberg if (!(ns->pi_type && ns->ms == 8) && 59157dacad5SJay Sternberg req->cmd_type != REQ_TYPE_DRV_PRIV) { 592eee417b0SChristoph Hellwig blk_mq_end_request(req, -EFAULT); 59357dacad5SJay Sternberg return BLK_MQ_RQ_QUEUE_OK; 59457dacad5SJay Sternberg } 59557dacad5SJay Sternberg } 59657dacad5SJay Sternberg 59758b45602SMing Lin map_len = nvme_map_len(req); 59858b45602SMing Lin ret = nvme_init_iod(req, map_len, dev); 599f4800d6dSChristoph Hellwig if (ret) 600f4800d6dSChristoph Hellwig return ret; 60157dacad5SJay Sternberg 6028093f7caSMing Lin ret = nvme_setup_cmd(ns, req, &cmnd); 60303b5929eSMing Lin if (ret) 60403b5929eSMing Lin goto out; 60557dacad5SJay Sternberg 606ba1ca37eSChristoph Hellwig if (req->nr_phys_segments) 60703b5929eSMing Lin ret = nvme_map_data(dev, req, map_len, &cmnd); 608ba1ca37eSChristoph Hellwig 609ba1ca37eSChristoph Hellwig if (ret) 610ba1ca37eSChristoph Hellwig goto out; 611ba1ca37eSChristoph Hellwig 612ba1ca37eSChristoph Hellwig cmnd.common.command_id = req->tag; 613aae239e1SChristoph Hellwig blk_mq_start_request(req); 614ba1ca37eSChristoph Hellwig 615ba1ca37eSChristoph Hellwig spin_lock_irq(&nvmeq->q_lock); 616ae1fba20SKeith Busch if (unlikely(nvmeq->cq_vector < 0)) { 61769d9a99cSKeith Busch if (ns && !test_bit(NVME_NS_DEAD, &ns->flags)) 618ae1fba20SKeith Busch ret = BLK_MQ_RQ_QUEUE_BUSY; 61969d9a99cSKeith Busch else 62069d9a99cSKeith Busch ret = BLK_MQ_RQ_QUEUE_ERROR; 621ae1fba20SKeith Busch spin_unlock_irq(&nvmeq->q_lock); 622ae1fba20SKeith Busch goto out; 623ae1fba20SKeith Busch } 624ba1ca37eSChristoph Hellwig __nvme_submit_cmd(nvmeq, &cmnd); 62557dacad5SJay Sternberg nvme_process_cq(nvmeq); 62657dacad5SJay Sternberg spin_unlock_irq(&nvmeq->q_lock); 62757dacad5SJay Sternberg return BLK_MQ_RQ_QUEUE_OK; 628ba1ca37eSChristoph Hellwig out: 629f4800d6dSChristoph Hellwig nvme_free_iod(dev, req); 630ba1ca37eSChristoph Hellwig return ret; 63157dacad5SJay Sternberg } 63257dacad5SJay Sternberg 633eee417b0SChristoph Hellwig static void nvme_complete_rq(struct request *req) 634eee417b0SChristoph Hellwig { 635f4800d6dSChristoph Hellwig struct nvme_iod *iod = blk_mq_rq_to_pdu(req); 636f4800d6dSChristoph Hellwig struct nvme_dev *dev = iod->nvmeq->dev; 637eee417b0SChristoph Hellwig int error = 0; 638eee417b0SChristoph Hellwig 639f4800d6dSChristoph Hellwig nvme_unmap_data(dev, req); 640eee417b0SChristoph Hellwig 641eee417b0SChristoph Hellwig if (unlikely(req->errors)) { 642eee417b0SChristoph Hellwig if (nvme_req_needs_retry(req, req->errors)) { 643f80ec966SKeith Busch req->retries++; 644eee417b0SChristoph Hellwig nvme_requeue_req(req); 645eee417b0SChristoph Hellwig return; 646eee417b0SChristoph Hellwig } 647eee417b0SChristoph Hellwig 648eee417b0SChristoph Hellwig if (req->cmd_type == REQ_TYPE_DRV_PRIV) 649eee417b0SChristoph Hellwig error = req->errors; 650eee417b0SChristoph Hellwig else 651eee417b0SChristoph Hellwig error = nvme_error_status(req->errors); 652eee417b0SChristoph Hellwig } 653eee417b0SChristoph Hellwig 654f4800d6dSChristoph Hellwig if (unlikely(iod->aborted)) { 6551b3c47c1SSagi Grimberg dev_warn(dev->ctrl.device, 656eee417b0SChristoph Hellwig "completing aborted command with status: %04x\n", 657eee417b0SChristoph Hellwig req->errors); 658eee417b0SChristoph Hellwig } 659eee417b0SChristoph Hellwig 660eee417b0SChristoph Hellwig blk_mq_end_request(req, error); 66157dacad5SJay Sternberg } 66257dacad5SJay Sternberg 663d783e0bdSMarta Rybczynska /* We read the CQE phase first to check if the rest of the entry is valid */ 664d783e0bdSMarta Rybczynska static inline bool nvme_cqe_valid(struct nvme_queue *nvmeq, u16 head, 665d783e0bdSMarta Rybczynska u16 phase) 666d783e0bdSMarta Rybczynska { 667d783e0bdSMarta Rybczynska return (le16_to_cpu(nvmeq->cqes[head].status) & 1) == phase; 668d783e0bdSMarta Rybczynska } 669d783e0bdSMarta Rybczynska 670a0fa9647SJens Axboe static void __nvme_process_cq(struct nvme_queue *nvmeq, unsigned int *tag) 67157dacad5SJay Sternberg { 67257dacad5SJay Sternberg u16 head, phase; 67357dacad5SJay Sternberg 67457dacad5SJay Sternberg head = nvmeq->cq_head; 67557dacad5SJay Sternberg phase = nvmeq->cq_phase; 67657dacad5SJay Sternberg 677d783e0bdSMarta Rybczynska while (nvme_cqe_valid(nvmeq, head, phase)) { 67857dacad5SJay Sternberg struct nvme_completion cqe = nvmeq->cqes[head]; 679eee417b0SChristoph Hellwig struct request *req; 680adf68f21SChristoph Hellwig 68157dacad5SJay Sternberg if (++head == nvmeq->q_depth) { 68257dacad5SJay Sternberg head = 0; 68357dacad5SJay Sternberg phase = !phase; 68457dacad5SJay Sternberg } 685adf68f21SChristoph Hellwig 686a0fa9647SJens Axboe if (tag && *tag == cqe.command_id) 687a0fa9647SJens Axboe *tag = -1; 688adf68f21SChristoph Hellwig 689aae239e1SChristoph Hellwig if (unlikely(cqe.command_id >= nvmeq->q_depth)) { 6901b3c47c1SSagi Grimberg dev_warn(nvmeq->dev->ctrl.device, 691aae239e1SChristoph Hellwig "invalid id %d completed on queue %d\n", 692aae239e1SChristoph Hellwig cqe.command_id, le16_to_cpu(cqe.sq_id)); 693aae239e1SChristoph Hellwig continue; 694aae239e1SChristoph Hellwig } 695aae239e1SChristoph Hellwig 696adf68f21SChristoph Hellwig /* 697adf68f21SChristoph Hellwig * AEN requests are special as they don't time out and can 698adf68f21SChristoph Hellwig * survive any kind of queue freeze and often don't respond to 699adf68f21SChristoph Hellwig * aborts. We don't even bother to allocate a struct request 700adf68f21SChristoph Hellwig * for them but rather special case them here. 701adf68f21SChristoph Hellwig */ 702adf68f21SChristoph Hellwig if (unlikely(nvmeq->qid == 0 && 703adf68f21SChristoph Hellwig cqe.command_id >= NVME_AQ_BLKMQ_DEPTH)) { 704f866fc42SChristoph Hellwig nvme_complete_async_event(&nvmeq->dev->ctrl, &cqe); 705adf68f21SChristoph Hellwig continue; 706adf68f21SChristoph Hellwig } 707adf68f21SChristoph Hellwig 708eee417b0SChristoph Hellwig req = blk_mq_tag_to_rq(*nvmeq->tags, cqe.command_id); 7091cb3cce5SChristoph Hellwig if (req->cmd_type == REQ_TYPE_DRV_PRIV && req->special) 7101cb3cce5SChristoph Hellwig memcpy(req->special, &cqe, sizeof(cqe)); 711d783e0bdSMarta Rybczynska blk_mq_complete_request(req, le16_to_cpu(cqe.status) >> 1); 712eee417b0SChristoph Hellwig 71357dacad5SJay Sternberg } 71457dacad5SJay Sternberg 71557dacad5SJay Sternberg /* If the controller ignores the cq head doorbell and continuously 71657dacad5SJay Sternberg * writes to the queue, it is theoretically possible to wrap around 71757dacad5SJay Sternberg * the queue twice and mistakenly return IRQ_NONE. Linux only 71857dacad5SJay Sternberg * requires that 0.1% of your interrupts are handled, so this isn't 71957dacad5SJay Sternberg * a big problem. 72057dacad5SJay Sternberg */ 72157dacad5SJay Sternberg if (head == nvmeq->cq_head && phase == nvmeq->cq_phase) 722a0fa9647SJens Axboe return; 72357dacad5SJay Sternberg 724604e8c8dSKeith Busch if (likely(nvmeq->cq_vector >= 0)) 72557dacad5SJay Sternberg writel(head, nvmeq->q_db + nvmeq->dev->db_stride); 72657dacad5SJay Sternberg nvmeq->cq_head = head; 72757dacad5SJay Sternberg nvmeq->cq_phase = phase; 72857dacad5SJay Sternberg 72957dacad5SJay Sternberg nvmeq->cqe_seen = 1; 730a0fa9647SJens Axboe } 731a0fa9647SJens Axboe 732a0fa9647SJens Axboe static void nvme_process_cq(struct nvme_queue *nvmeq) 733a0fa9647SJens Axboe { 734a0fa9647SJens Axboe __nvme_process_cq(nvmeq, NULL); 73557dacad5SJay Sternberg } 73657dacad5SJay Sternberg 73757dacad5SJay Sternberg static irqreturn_t nvme_irq(int irq, void *data) 73857dacad5SJay Sternberg { 73957dacad5SJay Sternberg irqreturn_t result; 74057dacad5SJay Sternberg struct nvme_queue *nvmeq = data; 74157dacad5SJay Sternberg spin_lock(&nvmeq->q_lock); 74257dacad5SJay Sternberg nvme_process_cq(nvmeq); 74357dacad5SJay Sternberg result = nvmeq->cqe_seen ? IRQ_HANDLED : IRQ_NONE; 74457dacad5SJay Sternberg nvmeq->cqe_seen = 0; 74557dacad5SJay Sternberg spin_unlock(&nvmeq->q_lock); 74657dacad5SJay Sternberg return result; 74757dacad5SJay Sternberg } 74857dacad5SJay Sternberg 74957dacad5SJay Sternberg static irqreturn_t nvme_irq_check(int irq, void *data) 75057dacad5SJay Sternberg { 75157dacad5SJay Sternberg struct nvme_queue *nvmeq = data; 752d783e0bdSMarta Rybczynska if (nvme_cqe_valid(nvmeq, nvmeq->cq_head, nvmeq->cq_phase)) 75357dacad5SJay Sternberg return IRQ_WAKE_THREAD; 754d783e0bdSMarta Rybczynska return IRQ_NONE; 75557dacad5SJay Sternberg } 75657dacad5SJay Sternberg 757a0fa9647SJens Axboe static int nvme_poll(struct blk_mq_hw_ctx *hctx, unsigned int tag) 758a0fa9647SJens Axboe { 759a0fa9647SJens Axboe struct nvme_queue *nvmeq = hctx->driver_data; 760a0fa9647SJens Axboe 761d783e0bdSMarta Rybczynska if (nvme_cqe_valid(nvmeq, nvmeq->cq_head, nvmeq->cq_phase)) { 762a0fa9647SJens Axboe spin_lock_irq(&nvmeq->q_lock); 763a0fa9647SJens Axboe __nvme_process_cq(nvmeq, &tag); 764a0fa9647SJens Axboe spin_unlock_irq(&nvmeq->q_lock); 765a0fa9647SJens Axboe 766a0fa9647SJens Axboe if (tag == -1) 767a0fa9647SJens Axboe return 1; 768a0fa9647SJens Axboe } 769a0fa9647SJens Axboe 770a0fa9647SJens Axboe return 0; 771a0fa9647SJens Axboe } 772a0fa9647SJens Axboe 773f866fc42SChristoph Hellwig static void nvme_pci_submit_async_event(struct nvme_ctrl *ctrl, int aer_idx) 77457dacad5SJay Sternberg { 775f866fc42SChristoph Hellwig struct nvme_dev *dev = to_nvme_dev(ctrl); 7769396dec9SChristoph Hellwig struct nvme_queue *nvmeq = dev->queues[0]; 77757dacad5SJay Sternberg struct nvme_command c; 77857dacad5SJay Sternberg 77957dacad5SJay Sternberg memset(&c, 0, sizeof(c)); 78057dacad5SJay Sternberg c.common.opcode = nvme_admin_async_event; 781f866fc42SChristoph Hellwig c.common.command_id = NVME_AQ_BLKMQ_DEPTH + aer_idx; 78257dacad5SJay Sternberg 7839396dec9SChristoph Hellwig spin_lock_irq(&nvmeq->q_lock); 7849396dec9SChristoph Hellwig __nvme_submit_cmd(nvmeq, &c); 7859396dec9SChristoph Hellwig spin_unlock_irq(&nvmeq->q_lock); 78657dacad5SJay Sternberg } 78757dacad5SJay Sternberg 78857dacad5SJay Sternberg static int adapter_delete_queue(struct nvme_dev *dev, u8 opcode, u16 id) 78957dacad5SJay Sternberg { 79057dacad5SJay Sternberg struct nvme_command c; 79157dacad5SJay Sternberg 79257dacad5SJay Sternberg memset(&c, 0, sizeof(c)); 79357dacad5SJay Sternberg c.delete_queue.opcode = opcode; 79457dacad5SJay Sternberg c.delete_queue.qid = cpu_to_le16(id); 79557dacad5SJay Sternberg 7961c63dc66SChristoph Hellwig return nvme_submit_sync_cmd(dev->ctrl.admin_q, &c, NULL, 0); 79757dacad5SJay Sternberg } 79857dacad5SJay Sternberg 79957dacad5SJay Sternberg static int adapter_alloc_cq(struct nvme_dev *dev, u16 qid, 80057dacad5SJay Sternberg struct nvme_queue *nvmeq) 80157dacad5SJay Sternberg { 80257dacad5SJay Sternberg struct nvme_command c; 80357dacad5SJay Sternberg int flags = NVME_QUEUE_PHYS_CONTIG | NVME_CQ_IRQ_ENABLED; 80457dacad5SJay Sternberg 80557dacad5SJay Sternberg /* 80657dacad5SJay Sternberg * Note: we (ab)use the fact the the prp fields survive if no data 80757dacad5SJay Sternberg * is attached to the request. 80857dacad5SJay Sternberg */ 80957dacad5SJay Sternberg memset(&c, 0, sizeof(c)); 81057dacad5SJay Sternberg c.create_cq.opcode = nvme_admin_create_cq; 81157dacad5SJay Sternberg c.create_cq.prp1 = cpu_to_le64(nvmeq->cq_dma_addr); 81257dacad5SJay Sternberg c.create_cq.cqid = cpu_to_le16(qid); 81357dacad5SJay Sternberg c.create_cq.qsize = cpu_to_le16(nvmeq->q_depth - 1); 81457dacad5SJay Sternberg c.create_cq.cq_flags = cpu_to_le16(flags); 81557dacad5SJay Sternberg c.create_cq.irq_vector = cpu_to_le16(nvmeq->cq_vector); 81657dacad5SJay Sternberg 8171c63dc66SChristoph Hellwig return nvme_submit_sync_cmd(dev->ctrl.admin_q, &c, NULL, 0); 81857dacad5SJay Sternberg } 81957dacad5SJay Sternberg 82057dacad5SJay Sternberg static int adapter_alloc_sq(struct nvme_dev *dev, u16 qid, 82157dacad5SJay Sternberg struct nvme_queue *nvmeq) 82257dacad5SJay Sternberg { 82357dacad5SJay Sternberg struct nvme_command c; 82457dacad5SJay Sternberg int flags = NVME_QUEUE_PHYS_CONTIG | NVME_SQ_PRIO_MEDIUM; 82557dacad5SJay Sternberg 82657dacad5SJay Sternberg /* 82757dacad5SJay Sternberg * Note: we (ab)use the fact the the prp fields survive if no data 82857dacad5SJay Sternberg * is attached to the request. 82957dacad5SJay Sternberg */ 83057dacad5SJay Sternberg memset(&c, 0, sizeof(c)); 83157dacad5SJay Sternberg c.create_sq.opcode = nvme_admin_create_sq; 83257dacad5SJay Sternberg c.create_sq.prp1 = cpu_to_le64(nvmeq->sq_dma_addr); 83357dacad5SJay Sternberg c.create_sq.sqid = cpu_to_le16(qid); 83457dacad5SJay Sternberg c.create_sq.qsize = cpu_to_le16(nvmeq->q_depth - 1); 83557dacad5SJay Sternberg c.create_sq.sq_flags = cpu_to_le16(flags); 83657dacad5SJay Sternberg c.create_sq.cqid = cpu_to_le16(qid); 83757dacad5SJay Sternberg 8381c63dc66SChristoph Hellwig return nvme_submit_sync_cmd(dev->ctrl.admin_q, &c, NULL, 0); 83957dacad5SJay Sternberg } 84057dacad5SJay Sternberg 84157dacad5SJay Sternberg static int adapter_delete_cq(struct nvme_dev *dev, u16 cqid) 84257dacad5SJay Sternberg { 84357dacad5SJay Sternberg return adapter_delete_queue(dev, nvme_admin_delete_cq, cqid); 84457dacad5SJay Sternberg } 84557dacad5SJay Sternberg 84657dacad5SJay Sternberg static int adapter_delete_sq(struct nvme_dev *dev, u16 sqid) 84757dacad5SJay Sternberg { 84857dacad5SJay Sternberg return adapter_delete_queue(dev, nvme_admin_delete_sq, sqid); 84957dacad5SJay Sternberg } 85057dacad5SJay Sternberg 851e7a2a87dSChristoph Hellwig static void abort_endio(struct request *req, int error) 85257dacad5SJay Sternberg { 853f4800d6dSChristoph Hellwig struct nvme_iod *iod = blk_mq_rq_to_pdu(req); 854f4800d6dSChristoph Hellwig struct nvme_queue *nvmeq = iod->nvmeq; 855e7a2a87dSChristoph Hellwig u16 status = req->errors; 85657dacad5SJay Sternberg 8571cb3cce5SChristoph Hellwig dev_warn(nvmeq->dev->ctrl.device, "Abort status: 0x%x", status); 858e7a2a87dSChristoph Hellwig atomic_inc(&nvmeq->dev->ctrl.abort_limit); 859e7a2a87dSChristoph Hellwig blk_mq_free_request(req); 86057dacad5SJay Sternberg } 86157dacad5SJay Sternberg 86231c7c7d2SChristoph Hellwig static enum blk_eh_timer_return nvme_timeout(struct request *req, bool reserved) 86357dacad5SJay Sternberg { 864f4800d6dSChristoph Hellwig struct nvme_iod *iod = blk_mq_rq_to_pdu(req); 865f4800d6dSChristoph Hellwig struct nvme_queue *nvmeq = iod->nvmeq; 86657dacad5SJay Sternberg struct nvme_dev *dev = nvmeq->dev; 86757dacad5SJay Sternberg struct request *abort_req; 86857dacad5SJay Sternberg struct nvme_command cmd; 86957dacad5SJay Sternberg 87031c7c7d2SChristoph Hellwig /* 871fd634f41SChristoph Hellwig * Shutdown immediately if controller times out while starting. The 872fd634f41SChristoph Hellwig * reset work will see the pci device disabled when it gets the forced 873fd634f41SChristoph Hellwig * cancellation error. All outstanding requests are completed on 874fd634f41SChristoph Hellwig * shutdown, so we return BLK_EH_HANDLED. 875fd634f41SChristoph Hellwig */ 876bb8d261eSChristoph Hellwig if (dev->ctrl.state == NVME_CTRL_RESETTING) { 8771b3c47c1SSagi Grimberg dev_warn(dev->ctrl.device, 878fd634f41SChristoph Hellwig "I/O %d QID %d timeout, disable controller\n", 879fd634f41SChristoph Hellwig req->tag, nvmeq->qid); 880a5cdb68cSKeith Busch nvme_dev_disable(dev, false); 881fd634f41SChristoph Hellwig req->errors = NVME_SC_CANCELLED; 882fd634f41SChristoph Hellwig return BLK_EH_HANDLED; 883fd634f41SChristoph Hellwig } 884fd634f41SChristoph Hellwig 885fd634f41SChristoph Hellwig /* 886e1569a16SKeith Busch * Shutdown the controller immediately and schedule a reset if the 887e1569a16SKeith Busch * command was already aborted once before and still hasn't been 888e1569a16SKeith Busch * returned to the driver, or if this is the admin queue. 88931c7c7d2SChristoph Hellwig */ 890f4800d6dSChristoph Hellwig if (!nvmeq->qid || iod->aborted) { 8911b3c47c1SSagi Grimberg dev_warn(dev->ctrl.device, 89257dacad5SJay Sternberg "I/O %d QID %d timeout, reset controller\n", 89357dacad5SJay Sternberg req->tag, nvmeq->qid); 894a5cdb68cSKeith Busch nvme_dev_disable(dev, false); 895e1569a16SKeith Busch queue_work(nvme_workq, &dev->reset_work); 896e1569a16SKeith Busch 897e1569a16SKeith Busch /* 898e1569a16SKeith Busch * Mark the request as handled, since the inline shutdown 899e1569a16SKeith Busch * forces all outstanding requests to complete. 900e1569a16SKeith Busch */ 901e1569a16SKeith Busch req->errors = NVME_SC_CANCELLED; 902e1569a16SKeith Busch return BLK_EH_HANDLED; 90357dacad5SJay Sternberg } 90457dacad5SJay Sternberg 905f4800d6dSChristoph Hellwig iod->aborted = 1; 90657dacad5SJay Sternberg 907e7a2a87dSChristoph Hellwig if (atomic_dec_return(&dev->ctrl.abort_limit) < 0) { 908e7a2a87dSChristoph Hellwig atomic_inc(&dev->ctrl.abort_limit); 909e7a2a87dSChristoph Hellwig return BLK_EH_RESET_TIMER; 910e7a2a87dSChristoph Hellwig } 91157dacad5SJay Sternberg 91257dacad5SJay Sternberg memset(&cmd, 0, sizeof(cmd)); 91357dacad5SJay Sternberg cmd.abort.opcode = nvme_admin_abort_cmd; 91457dacad5SJay Sternberg cmd.abort.cid = req->tag; 91557dacad5SJay Sternberg cmd.abort.sqid = cpu_to_le16(nvmeq->qid); 91657dacad5SJay Sternberg 9171b3c47c1SSagi Grimberg dev_warn(nvmeq->dev->ctrl.device, 9181b3c47c1SSagi Grimberg "I/O %d QID %d timeout, aborting\n", 91957dacad5SJay Sternberg req->tag, nvmeq->qid); 920e7a2a87dSChristoph Hellwig 921e7a2a87dSChristoph Hellwig abort_req = nvme_alloc_request(dev->ctrl.admin_q, &cmd, 922eb71f435SChristoph Hellwig BLK_MQ_REQ_NOWAIT, NVME_QID_ANY); 9236bf25d16SChristoph Hellwig if (IS_ERR(abort_req)) { 9246bf25d16SChristoph Hellwig atomic_inc(&dev->ctrl.abort_limit); 92531c7c7d2SChristoph Hellwig return BLK_EH_RESET_TIMER; 92657dacad5SJay Sternberg } 92757dacad5SJay Sternberg 928e7a2a87dSChristoph Hellwig abort_req->timeout = ADMIN_TIMEOUT; 929e7a2a87dSChristoph Hellwig abort_req->end_io_data = NULL; 930e7a2a87dSChristoph Hellwig blk_execute_rq_nowait(abort_req->q, NULL, abort_req, 0, abort_endio); 93157dacad5SJay Sternberg 93257dacad5SJay Sternberg /* 93357dacad5SJay Sternberg * The aborted req will be completed on receiving the abort req. 93457dacad5SJay Sternberg * We enable the timer again. If hit twice, it'll cause a device reset, 93557dacad5SJay Sternberg * as the device then is in a faulty state. 93657dacad5SJay Sternberg */ 93757dacad5SJay Sternberg return BLK_EH_RESET_TIMER; 93857dacad5SJay Sternberg } 93957dacad5SJay Sternberg 94057dacad5SJay Sternberg static void nvme_free_queue(struct nvme_queue *nvmeq) 94157dacad5SJay Sternberg { 94257dacad5SJay Sternberg dma_free_coherent(nvmeq->q_dmadev, CQ_SIZE(nvmeq->q_depth), 94357dacad5SJay Sternberg (void *)nvmeq->cqes, nvmeq->cq_dma_addr); 94457dacad5SJay Sternberg if (nvmeq->sq_cmds) 94557dacad5SJay Sternberg dma_free_coherent(nvmeq->q_dmadev, SQ_SIZE(nvmeq->q_depth), 94657dacad5SJay Sternberg nvmeq->sq_cmds, nvmeq->sq_dma_addr); 94757dacad5SJay Sternberg kfree(nvmeq); 94857dacad5SJay Sternberg } 94957dacad5SJay Sternberg 95057dacad5SJay Sternberg static void nvme_free_queues(struct nvme_dev *dev, int lowest) 95157dacad5SJay Sternberg { 95257dacad5SJay Sternberg int i; 95357dacad5SJay Sternberg 95457dacad5SJay Sternberg for (i = dev->queue_count - 1; i >= lowest; i--) { 95557dacad5SJay Sternberg struct nvme_queue *nvmeq = dev->queues[i]; 95657dacad5SJay Sternberg dev->queue_count--; 95757dacad5SJay Sternberg dev->queues[i] = NULL; 95857dacad5SJay Sternberg nvme_free_queue(nvmeq); 95957dacad5SJay Sternberg } 96057dacad5SJay Sternberg } 96157dacad5SJay Sternberg 96257dacad5SJay Sternberg /** 96357dacad5SJay Sternberg * nvme_suspend_queue - put queue into suspended state 96457dacad5SJay Sternberg * @nvmeq - queue to suspend 96557dacad5SJay Sternberg */ 96657dacad5SJay Sternberg static int nvme_suspend_queue(struct nvme_queue *nvmeq) 96757dacad5SJay Sternberg { 96857dacad5SJay Sternberg int vector; 96957dacad5SJay Sternberg 97057dacad5SJay Sternberg spin_lock_irq(&nvmeq->q_lock); 97157dacad5SJay Sternberg if (nvmeq->cq_vector == -1) { 97257dacad5SJay Sternberg spin_unlock_irq(&nvmeq->q_lock); 97357dacad5SJay Sternberg return 1; 97457dacad5SJay Sternberg } 975dca51e78SChristoph Hellwig vector = nvmeq_irq(nvmeq); 97657dacad5SJay Sternberg nvmeq->dev->online_queues--; 97757dacad5SJay Sternberg nvmeq->cq_vector = -1; 97857dacad5SJay Sternberg spin_unlock_irq(&nvmeq->q_lock); 97957dacad5SJay Sternberg 9801c63dc66SChristoph Hellwig if (!nvmeq->qid && nvmeq->dev->ctrl.admin_q) 98125646264SKeith Busch blk_mq_stop_hw_queues(nvmeq->dev->ctrl.admin_q); 98257dacad5SJay Sternberg 98357dacad5SJay Sternberg free_irq(vector, nvmeq); 98457dacad5SJay Sternberg 98557dacad5SJay Sternberg return 0; 98657dacad5SJay Sternberg } 98757dacad5SJay Sternberg 988a5cdb68cSKeith Busch static void nvme_disable_admin_queue(struct nvme_dev *dev, bool shutdown) 98957dacad5SJay Sternberg { 990a5cdb68cSKeith Busch struct nvme_queue *nvmeq = dev->queues[0]; 99157dacad5SJay Sternberg 99257dacad5SJay Sternberg if (!nvmeq) 99357dacad5SJay Sternberg return; 99457dacad5SJay Sternberg if (nvme_suspend_queue(nvmeq)) 99557dacad5SJay Sternberg return; 99657dacad5SJay Sternberg 997a5cdb68cSKeith Busch if (shutdown) 998a5cdb68cSKeith Busch nvme_shutdown_ctrl(&dev->ctrl); 999a5cdb68cSKeith Busch else 1000a5cdb68cSKeith Busch nvme_disable_ctrl(&dev->ctrl, lo_hi_readq( 1001a5cdb68cSKeith Busch dev->bar + NVME_REG_CAP)); 100257dacad5SJay Sternberg 100357dacad5SJay Sternberg spin_lock_irq(&nvmeq->q_lock); 100457dacad5SJay Sternberg nvme_process_cq(nvmeq); 100557dacad5SJay Sternberg spin_unlock_irq(&nvmeq->q_lock); 100657dacad5SJay Sternberg } 100757dacad5SJay Sternberg 100857dacad5SJay Sternberg static int nvme_cmb_qdepth(struct nvme_dev *dev, int nr_io_queues, 100957dacad5SJay Sternberg int entry_size) 101057dacad5SJay Sternberg { 101157dacad5SJay Sternberg int q_depth = dev->q_depth; 10125fd4ce1bSChristoph Hellwig unsigned q_size_aligned = roundup(q_depth * entry_size, 10135fd4ce1bSChristoph Hellwig dev->ctrl.page_size); 101457dacad5SJay Sternberg 101557dacad5SJay Sternberg if (q_size_aligned * nr_io_queues > dev->cmb_size) { 101657dacad5SJay Sternberg u64 mem_per_q = div_u64(dev->cmb_size, nr_io_queues); 10175fd4ce1bSChristoph Hellwig mem_per_q = round_down(mem_per_q, dev->ctrl.page_size); 101857dacad5SJay Sternberg q_depth = div_u64(mem_per_q, entry_size); 101957dacad5SJay Sternberg 102057dacad5SJay Sternberg /* 102157dacad5SJay Sternberg * Ensure the reduced q_depth is above some threshold where it 102257dacad5SJay Sternberg * would be better to map queues in system memory with the 102357dacad5SJay Sternberg * original depth 102457dacad5SJay Sternberg */ 102557dacad5SJay Sternberg if (q_depth < 64) 102657dacad5SJay Sternberg return -ENOMEM; 102757dacad5SJay Sternberg } 102857dacad5SJay Sternberg 102957dacad5SJay Sternberg return q_depth; 103057dacad5SJay Sternberg } 103157dacad5SJay Sternberg 103257dacad5SJay Sternberg static int nvme_alloc_sq_cmds(struct nvme_dev *dev, struct nvme_queue *nvmeq, 103357dacad5SJay Sternberg int qid, int depth) 103457dacad5SJay Sternberg { 103557dacad5SJay Sternberg if (qid && dev->cmb && use_cmb_sqes && NVME_CMB_SQS(dev->cmbsz)) { 10365fd4ce1bSChristoph Hellwig unsigned offset = (qid - 1) * roundup(SQ_SIZE(depth), 10375fd4ce1bSChristoph Hellwig dev->ctrl.page_size); 103857dacad5SJay Sternberg nvmeq->sq_dma_addr = dev->cmb_dma_addr + offset; 103957dacad5SJay Sternberg nvmeq->sq_cmds_io = dev->cmb + offset; 104057dacad5SJay Sternberg } else { 104157dacad5SJay Sternberg nvmeq->sq_cmds = dma_alloc_coherent(dev->dev, SQ_SIZE(depth), 104257dacad5SJay Sternberg &nvmeq->sq_dma_addr, GFP_KERNEL); 104357dacad5SJay Sternberg if (!nvmeq->sq_cmds) 104457dacad5SJay Sternberg return -ENOMEM; 104557dacad5SJay Sternberg } 104657dacad5SJay Sternberg 104757dacad5SJay Sternberg return 0; 104857dacad5SJay Sternberg } 104957dacad5SJay Sternberg 105057dacad5SJay Sternberg static struct nvme_queue *nvme_alloc_queue(struct nvme_dev *dev, int qid, 105157dacad5SJay Sternberg int depth) 105257dacad5SJay Sternberg { 105357dacad5SJay Sternberg struct nvme_queue *nvmeq = kzalloc(sizeof(*nvmeq), GFP_KERNEL); 105457dacad5SJay Sternberg if (!nvmeq) 105557dacad5SJay Sternberg return NULL; 105657dacad5SJay Sternberg 105757dacad5SJay Sternberg nvmeq->cqes = dma_zalloc_coherent(dev->dev, CQ_SIZE(depth), 105857dacad5SJay Sternberg &nvmeq->cq_dma_addr, GFP_KERNEL); 105957dacad5SJay Sternberg if (!nvmeq->cqes) 106057dacad5SJay Sternberg goto free_nvmeq; 106157dacad5SJay Sternberg 106257dacad5SJay Sternberg if (nvme_alloc_sq_cmds(dev, nvmeq, qid, depth)) 106357dacad5SJay Sternberg goto free_cqdma; 106457dacad5SJay Sternberg 106557dacad5SJay Sternberg nvmeq->q_dmadev = dev->dev; 106657dacad5SJay Sternberg nvmeq->dev = dev; 106757dacad5SJay Sternberg snprintf(nvmeq->irqname, sizeof(nvmeq->irqname), "nvme%dq%d", 10681c63dc66SChristoph Hellwig dev->ctrl.instance, qid); 106957dacad5SJay Sternberg spin_lock_init(&nvmeq->q_lock); 107057dacad5SJay Sternberg nvmeq->cq_head = 0; 107157dacad5SJay Sternberg nvmeq->cq_phase = 1; 107257dacad5SJay Sternberg nvmeq->q_db = &dev->dbs[qid * 2 * dev->db_stride]; 107357dacad5SJay Sternberg nvmeq->q_depth = depth; 107457dacad5SJay Sternberg nvmeq->qid = qid; 107557dacad5SJay Sternberg nvmeq->cq_vector = -1; 107657dacad5SJay Sternberg dev->queues[qid] = nvmeq; 107757dacad5SJay Sternberg dev->queue_count++; 107857dacad5SJay Sternberg 107957dacad5SJay Sternberg return nvmeq; 108057dacad5SJay Sternberg 108157dacad5SJay Sternberg free_cqdma: 108257dacad5SJay Sternberg dma_free_coherent(dev->dev, CQ_SIZE(depth), (void *)nvmeq->cqes, 108357dacad5SJay Sternberg nvmeq->cq_dma_addr); 108457dacad5SJay Sternberg free_nvmeq: 108557dacad5SJay Sternberg kfree(nvmeq); 108657dacad5SJay Sternberg return NULL; 108757dacad5SJay Sternberg } 108857dacad5SJay Sternberg 1089dca51e78SChristoph Hellwig static int queue_request_irq(struct nvme_queue *nvmeq) 109057dacad5SJay Sternberg { 109157dacad5SJay Sternberg if (use_threaded_interrupts) 1092dca51e78SChristoph Hellwig return request_threaded_irq(nvmeq_irq(nvmeq), nvme_irq_check, 1093dca51e78SChristoph Hellwig nvme_irq, IRQF_SHARED, nvmeq->irqname, nvmeq); 1094dca51e78SChristoph Hellwig else 1095dca51e78SChristoph Hellwig return request_irq(nvmeq_irq(nvmeq), nvme_irq, IRQF_SHARED, 1096dca51e78SChristoph Hellwig nvmeq->irqname, nvmeq); 109757dacad5SJay Sternberg } 109857dacad5SJay Sternberg 109957dacad5SJay Sternberg static void nvme_init_queue(struct nvme_queue *nvmeq, u16 qid) 110057dacad5SJay Sternberg { 110157dacad5SJay Sternberg struct nvme_dev *dev = nvmeq->dev; 110257dacad5SJay Sternberg 110357dacad5SJay Sternberg spin_lock_irq(&nvmeq->q_lock); 110457dacad5SJay Sternberg nvmeq->sq_tail = 0; 110557dacad5SJay Sternberg nvmeq->cq_head = 0; 110657dacad5SJay Sternberg nvmeq->cq_phase = 1; 110757dacad5SJay Sternberg nvmeq->q_db = &dev->dbs[qid * 2 * dev->db_stride]; 110857dacad5SJay Sternberg memset((void *)nvmeq->cqes, 0, CQ_SIZE(nvmeq->q_depth)); 110957dacad5SJay Sternberg dev->online_queues++; 111057dacad5SJay Sternberg spin_unlock_irq(&nvmeq->q_lock); 111157dacad5SJay Sternberg } 111257dacad5SJay Sternberg 111357dacad5SJay Sternberg static int nvme_create_queue(struct nvme_queue *nvmeq, int qid) 111457dacad5SJay Sternberg { 111557dacad5SJay Sternberg struct nvme_dev *dev = nvmeq->dev; 111657dacad5SJay Sternberg int result; 111757dacad5SJay Sternberg 111857dacad5SJay Sternberg nvmeq->cq_vector = qid - 1; 111957dacad5SJay Sternberg result = adapter_alloc_cq(dev, qid, nvmeq); 112057dacad5SJay Sternberg if (result < 0) 112157dacad5SJay Sternberg return result; 112257dacad5SJay Sternberg 112357dacad5SJay Sternberg result = adapter_alloc_sq(dev, qid, nvmeq); 112457dacad5SJay Sternberg if (result < 0) 112557dacad5SJay Sternberg goto release_cq; 112657dacad5SJay Sternberg 1127dca51e78SChristoph Hellwig result = queue_request_irq(nvmeq); 112857dacad5SJay Sternberg if (result < 0) 112957dacad5SJay Sternberg goto release_sq; 113057dacad5SJay Sternberg 113157dacad5SJay Sternberg nvme_init_queue(nvmeq, qid); 113257dacad5SJay Sternberg return result; 113357dacad5SJay Sternberg 113457dacad5SJay Sternberg release_sq: 113557dacad5SJay Sternberg adapter_delete_sq(dev, qid); 113657dacad5SJay Sternberg release_cq: 113757dacad5SJay Sternberg adapter_delete_cq(dev, qid); 113857dacad5SJay Sternberg return result; 113957dacad5SJay Sternberg } 114057dacad5SJay Sternberg 114157dacad5SJay Sternberg static struct blk_mq_ops nvme_mq_admin_ops = { 114257dacad5SJay Sternberg .queue_rq = nvme_queue_rq, 1143eee417b0SChristoph Hellwig .complete = nvme_complete_rq, 114457dacad5SJay Sternberg .init_hctx = nvme_admin_init_hctx, 114557dacad5SJay Sternberg .exit_hctx = nvme_admin_exit_hctx, 114657dacad5SJay Sternberg .init_request = nvme_admin_init_request, 114757dacad5SJay Sternberg .timeout = nvme_timeout, 114857dacad5SJay Sternberg }; 114957dacad5SJay Sternberg 115057dacad5SJay Sternberg static struct blk_mq_ops nvme_mq_ops = { 115157dacad5SJay Sternberg .queue_rq = nvme_queue_rq, 1152eee417b0SChristoph Hellwig .complete = nvme_complete_rq, 115357dacad5SJay Sternberg .init_hctx = nvme_init_hctx, 115457dacad5SJay Sternberg .init_request = nvme_init_request, 1155dca51e78SChristoph Hellwig .map_queues = nvme_pci_map_queues, 115657dacad5SJay Sternberg .timeout = nvme_timeout, 1157a0fa9647SJens Axboe .poll = nvme_poll, 115857dacad5SJay Sternberg }; 115957dacad5SJay Sternberg 116057dacad5SJay Sternberg static void nvme_dev_remove_admin(struct nvme_dev *dev) 116157dacad5SJay Sternberg { 11621c63dc66SChristoph Hellwig if (dev->ctrl.admin_q && !blk_queue_dying(dev->ctrl.admin_q)) { 116369d9a99cSKeith Busch /* 116469d9a99cSKeith Busch * If the controller was reset during removal, it's possible 116569d9a99cSKeith Busch * user requests may be waiting on a stopped queue. Start the 116669d9a99cSKeith Busch * queue to flush these to completion. 116769d9a99cSKeith Busch */ 116869d9a99cSKeith Busch blk_mq_start_stopped_hw_queues(dev->ctrl.admin_q, true); 11691c63dc66SChristoph Hellwig blk_cleanup_queue(dev->ctrl.admin_q); 117057dacad5SJay Sternberg blk_mq_free_tag_set(&dev->admin_tagset); 117157dacad5SJay Sternberg } 117257dacad5SJay Sternberg } 117357dacad5SJay Sternberg 117457dacad5SJay Sternberg static int nvme_alloc_admin_tags(struct nvme_dev *dev) 117557dacad5SJay Sternberg { 11761c63dc66SChristoph Hellwig if (!dev->ctrl.admin_q) { 117757dacad5SJay Sternberg dev->admin_tagset.ops = &nvme_mq_admin_ops; 117857dacad5SJay Sternberg dev->admin_tagset.nr_hw_queues = 1; 1179e3e9d50cSKeith Busch 1180e3e9d50cSKeith Busch /* 1181e3e9d50cSKeith Busch * Subtract one to leave an empty queue entry for 'Full Queue' 1182e3e9d50cSKeith Busch * condition. See NVM-Express 1.2 specification, section 4.1.2. 1183e3e9d50cSKeith Busch */ 1184e3e9d50cSKeith Busch dev->admin_tagset.queue_depth = NVME_AQ_BLKMQ_DEPTH - 1; 118557dacad5SJay Sternberg dev->admin_tagset.timeout = ADMIN_TIMEOUT; 118657dacad5SJay Sternberg dev->admin_tagset.numa_node = dev_to_node(dev->dev); 118757dacad5SJay Sternberg dev->admin_tagset.cmd_size = nvme_cmd_size(dev); 118857dacad5SJay Sternberg dev->admin_tagset.driver_data = dev; 118957dacad5SJay Sternberg 119057dacad5SJay Sternberg if (blk_mq_alloc_tag_set(&dev->admin_tagset)) 119157dacad5SJay Sternberg return -ENOMEM; 119257dacad5SJay Sternberg 11931c63dc66SChristoph Hellwig dev->ctrl.admin_q = blk_mq_init_queue(&dev->admin_tagset); 11941c63dc66SChristoph Hellwig if (IS_ERR(dev->ctrl.admin_q)) { 119557dacad5SJay Sternberg blk_mq_free_tag_set(&dev->admin_tagset); 119657dacad5SJay Sternberg return -ENOMEM; 119757dacad5SJay Sternberg } 11981c63dc66SChristoph Hellwig if (!blk_get_queue(dev->ctrl.admin_q)) { 119957dacad5SJay Sternberg nvme_dev_remove_admin(dev); 12001c63dc66SChristoph Hellwig dev->ctrl.admin_q = NULL; 120157dacad5SJay Sternberg return -ENODEV; 120257dacad5SJay Sternberg } 120357dacad5SJay Sternberg } else 120425646264SKeith Busch blk_mq_start_stopped_hw_queues(dev->ctrl.admin_q, true); 120557dacad5SJay Sternberg 120657dacad5SJay Sternberg return 0; 120757dacad5SJay Sternberg } 120857dacad5SJay Sternberg 120957dacad5SJay Sternberg static int nvme_configure_admin_queue(struct nvme_dev *dev) 121057dacad5SJay Sternberg { 121157dacad5SJay Sternberg int result; 121257dacad5SJay Sternberg u32 aqa; 12137a67cbeaSChristoph Hellwig u64 cap = lo_hi_readq(dev->bar + NVME_REG_CAP); 121457dacad5SJay Sternberg struct nvme_queue *nvmeq; 121557dacad5SJay Sternberg 12167a67cbeaSChristoph Hellwig dev->subsystem = readl(dev->bar + NVME_REG_VS) >= NVME_VS(1, 1) ? 121757dacad5SJay Sternberg NVME_CAP_NSSRC(cap) : 0; 121857dacad5SJay Sternberg 12197a67cbeaSChristoph Hellwig if (dev->subsystem && 12207a67cbeaSChristoph Hellwig (readl(dev->bar + NVME_REG_CSTS) & NVME_CSTS_NSSRO)) 12217a67cbeaSChristoph Hellwig writel(NVME_CSTS_NSSRO, dev->bar + NVME_REG_CSTS); 122257dacad5SJay Sternberg 12235fd4ce1bSChristoph Hellwig result = nvme_disable_ctrl(&dev->ctrl, cap); 122457dacad5SJay Sternberg if (result < 0) 122557dacad5SJay Sternberg return result; 122657dacad5SJay Sternberg 122757dacad5SJay Sternberg nvmeq = dev->queues[0]; 122857dacad5SJay Sternberg if (!nvmeq) { 122957dacad5SJay Sternberg nvmeq = nvme_alloc_queue(dev, 0, NVME_AQ_DEPTH); 123057dacad5SJay Sternberg if (!nvmeq) 123157dacad5SJay Sternberg return -ENOMEM; 123257dacad5SJay Sternberg } 123357dacad5SJay Sternberg 123457dacad5SJay Sternberg aqa = nvmeq->q_depth - 1; 123557dacad5SJay Sternberg aqa |= aqa << 16; 123657dacad5SJay Sternberg 12377a67cbeaSChristoph Hellwig writel(aqa, dev->bar + NVME_REG_AQA); 12387a67cbeaSChristoph Hellwig lo_hi_writeq(nvmeq->sq_dma_addr, dev->bar + NVME_REG_ASQ); 12397a67cbeaSChristoph Hellwig lo_hi_writeq(nvmeq->cq_dma_addr, dev->bar + NVME_REG_ACQ); 124057dacad5SJay Sternberg 12415fd4ce1bSChristoph Hellwig result = nvme_enable_ctrl(&dev->ctrl, cap); 124257dacad5SJay Sternberg if (result) 124357dacad5SJay Sternberg goto free_nvmeq; 124457dacad5SJay Sternberg 124557dacad5SJay Sternberg nvmeq->cq_vector = 0; 1246dca51e78SChristoph Hellwig result = queue_request_irq(nvmeq); 124757dacad5SJay Sternberg if (result) { 124857dacad5SJay Sternberg nvmeq->cq_vector = -1; 124957dacad5SJay Sternberg goto free_nvmeq; 125057dacad5SJay Sternberg } 125157dacad5SJay Sternberg 125257dacad5SJay Sternberg return result; 125357dacad5SJay Sternberg 125457dacad5SJay Sternberg free_nvmeq: 125557dacad5SJay Sternberg nvme_free_queues(dev, 0); 125657dacad5SJay Sternberg return result; 125757dacad5SJay Sternberg } 125857dacad5SJay Sternberg 1259c875a709SGuilherme G. Piccoli static bool nvme_should_reset(struct nvme_dev *dev, u32 csts) 1260c875a709SGuilherme G. Piccoli { 1261c875a709SGuilherme G. Piccoli 1262c875a709SGuilherme G. Piccoli /* If true, indicates loss of adapter communication, possibly by a 1263c875a709SGuilherme G. Piccoli * NVMe Subsystem reset. 1264c875a709SGuilherme G. Piccoli */ 1265c875a709SGuilherme G. Piccoli bool nssro = dev->subsystem && (csts & NVME_CSTS_NSSRO); 1266c875a709SGuilherme G. Piccoli 1267c875a709SGuilherme G. Piccoli /* If there is a reset ongoing, we shouldn't reset again. */ 1268c875a709SGuilherme G. Piccoli if (work_busy(&dev->reset_work)) 1269c875a709SGuilherme G. Piccoli return false; 1270c875a709SGuilherme G. Piccoli 1271c875a709SGuilherme G. Piccoli /* We shouldn't reset unless the controller is on fatal error state 1272c875a709SGuilherme G. Piccoli * _or_ if we lost the communication with it. 1273c875a709SGuilherme G. Piccoli */ 1274c875a709SGuilherme G. Piccoli if (!(csts & NVME_CSTS_CFS) && !nssro) 1275c875a709SGuilherme G. Piccoli return false; 1276c875a709SGuilherme G. Piccoli 1277c875a709SGuilherme G. Piccoli /* If PCI error recovery process is happening, we cannot reset or 1278c875a709SGuilherme G. Piccoli * the recovery mechanism will surely fail. 1279c875a709SGuilherme G. Piccoli */ 1280c875a709SGuilherme G. Piccoli if (pci_channel_offline(to_pci_dev(dev->dev))) 1281c875a709SGuilherme G. Piccoli return false; 1282c875a709SGuilherme G. Piccoli 1283c875a709SGuilherme G. Piccoli return true; 1284c875a709SGuilherme G. Piccoli } 1285c875a709SGuilherme G. Piccoli 12862d55cd5fSChristoph Hellwig static void nvme_watchdog_timer(unsigned long data) 128757dacad5SJay Sternberg { 12882d55cd5fSChristoph Hellwig struct nvme_dev *dev = (struct nvme_dev *)data; 12897a67cbeaSChristoph Hellwig u32 csts = readl(dev->bar + NVME_REG_CSTS); 129057dacad5SJay Sternberg 1291c875a709SGuilherme G. Piccoli /* Skip controllers under certain specific conditions. */ 1292c875a709SGuilherme G. Piccoli if (nvme_should_reset(dev, csts)) { 1293c875a709SGuilherme G. Piccoli if (queue_work(nvme_workq, &dev->reset_work)) 129457dacad5SJay Sternberg dev_warn(dev->dev, 12952d55cd5fSChristoph Hellwig "Failed status: 0x%x, reset controller.\n", 12962d55cd5fSChristoph Hellwig csts); 12972d55cd5fSChristoph Hellwig return; 129857dacad5SJay Sternberg } 129957dacad5SJay Sternberg 13002d55cd5fSChristoph Hellwig mod_timer(&dev->watchdog_timer, round_jiffies(jiffies + HZ)); 130157dacad5SJay Sternberg } 130257dacad5SJay Sternberg 1303749941f2SChristoph Hellwig static int nvme_create_io_queues(struct nvme_dev *dev) 130457dacad5SJay Sternberg { 1305949928c1SKeith Busch unsigned i, max; 1306749941f2SChristoph Hellwig int ret = 0; 130757dacad5SJay Sternberg 1308749941f2SChristoph Hellwig for (i = dev->queue_count; i <= dev->max_qid; i++) { 1309749941f2SChristoph Hellwig if (!nvme_alloc_queue(dev, i, dev->q_depth)) { 1310749941f2SChristoph Hellwig ret = -ENOMEM; 131157dacad5SJay Sternberg break; 1312749941f2SChristoph Hellwig } 1313749941f2SChristoph Hellwig } 131457dacad5SJay Sternberg 1315949928c1SKeith Busch max = min(dev->max_qid, dev->queue_count - 1); 1316949928c1SKeith Busch for (i = dev->online_queues; i <= max; i++) { 1317749941f2SChristoph Hellwig ret = nvme_create_queue(dev->queues[i], i); 1318749941f2SChristoph Hellwig if (ret) { 131957dacad5SJay Sternberg nvme_free_queues(dev, i); 132057dacad5SJay Sternberg break; 132157dacad5SJay Sternberg } 132257dacad5SJay Sternberg } 132357dacad5SJay Sternberg 1324749941f2SChristoph Hellwig /* 1325749941f2SChristoph Hellwig * Ignore failing Create SQ/CQ commands, we can continue with less 1326749941f2SChristoph Hellwig * than the desired aount of queues, and even a controller without 1327749941f2SChristoph Hellwig * I/O queues an still be used to issue admin commands. This might 1328749941f2SChristoph Hellwig * be useful to upgrade a buggy firmware for example. 1329749941f2SChristoph Hellwig */ 1330749941f2SChristoph Hellwig return ret >= 0 ? 0 : ret; 133157dacad5SJay Sternberg } 133257dacad5SJay Sternberg 133357dacad5SJay Sternberg static void __iomem *nvme_map_cmb(struct nvme_dev *dev) 133457dacad5SJay Sternberg { 133557dacad5SJay Sternberg u64 szu, size, offset; 133657dacad5SJay Sternberg u32 cmbloc; 133757dacad5SJay Sternberg resource_size_t bar_size; 133857dacad5SJay Sternberg struct pci_dev *pdev = to_pci_dev(dev->dev); 133957dacad5SJay Sternberg void __iomem *cmb; 134057dacad5SJay Sternberg dma_addr_t dma_addr; 134157dacad5SJay Sternberg 134257dacad5SJay Sternberg if (!use_cmb_sqes) 134357dacad5SJay Sternberg return NULL; 134457dacad5SJay Sternberg 13457a67cbeaSChristoph Hellwig dev->cmbsz = readl(dev->bar + NVME_REG_CMBSZ); 134657dacad5SJay Sternberg if (!(NVME_CMB_SZ(dev->cmbsz))) 134757dacad5SJay Sternberg return NULL; 134857dacad5SJay Sternberg 13497a67cbeaSChristoph Hellwig cmbloc = readl(dev->bar + NVME_REG_CMBLOC); 135057dacad5SJay Sternberg 135157dacad5SJay Sternberg szu = (u64)1 << (12 + 4 * NVME_CMB_SZU(dev->cmbsz)); 135257dacad5SJay Sternberg size = szu * NVME_CMB_SZ(dev->cmbsz); 135357dacad5SJay Sternberg offset = szu * NVME_CMB_OFST(cmbloc); 135457dacad5SJay Sternberg bar_size = pci_resource_len(pdev, NVME_CMB_BIR(cmbloc)); 135557dacad5SJay Sternberg 135657dacad5SJay Sternberg if (offset > bar_size) 135757dacad5SJay Sternberg return NULL; 135857dacad5SJay Sternberg 135957dacad5SJay Sternberg /* 136057dacad5SJay Sternberg * Controllers may support a CMB size larger than their BAR, 136157dacad5SJay Sternberg * for example, due to being behind a bridge. Reduce the CMB to 136257dacad5SJay Sternberg * the reported size of the BAR 136357dacad5SJay Sternberg */ 136457dacad5SJay Sternberg if (size > bar_size - offset) 136557dacad5SJay Sternberg size = bar_size - offset; 136657dacad5SJay Sternberg 136757dacad5SJay Sternberg dma_addr = pci_resource_start(pdev, NVME_CMB_BIR(cmbloc)) + offset; 136857dacad5SJay Sternberg cmb = ioremap_wc(dma_addr, size); 136957dacad5SJay Sternberg if (!cmb) 137057dacad5SJay Sternberg return NULL; 137157dacad5SJay Sternberg 137257dacad5SJay Sternberg dev->cmb_dma_addr = dma_addr; 137357dacad5SJay Sternberg dev->cmb_size = size; 137457dacad5SJay Sternberg return cmb; 137557dacad5SJay Sternberg } 137657dacad5SJay Sternberg 137757dacad5SJay Sternberg static inline void nvme_release_cmb(struct nvme_dev *dev) 137857dacad5SJay Sternberg { 137957dacad5SJay Sternberg if (dev->cmb) { 138057dacad5SJay Sternberg iounmap(dev->cmb); 138157dacad5SJay Sternberg dev->cmb = NULL; 138257dacad5SJay Sternberg } 138357dacad5SJay Sternberg } 138457dacad5SJay Sternberg 138557dacad5SJay Sternberg static size_t db_bar_size(struct nvme_dev *dev, unsigned nr_io_queues) 138657dacad5SJay Sternberg { 138757dacad5SJay Sternberg return 4096 + ((nr_io_queues + 1) * 8 * dev->db_stride); 138857dacad5SJay Sternberg } 138957dacad5SJay Sternberg 139057dacad5SJay Sternberg static int nvme_setup_io_queues(struct nvme_dev *dev) 139157dacad5SJay Sternberg { 139257dacad5SJay Sternberg struct nvme_queue *adminq = dev->queues[0]; 139357dacad5SJay Sternberg struct pci_dev *pdev = to_pci_dev(dev->dev); 1394dca51e78SChristoph Hellwig int result, nr_io_queues, size; 139557dacad5SJay Sternberg 13962800b8e7SKeith Busch nr_io_queues = num_online_cpus(); 13979a0be7abSChristoph Hellwig result = nvme_set_queue_count(&dev->ctrl, &nr_io_queues); 13989a0be7abSChristoph Hellwig if (result < 0) 139957dacad5SJay Sternberg return result; 14009a0be7abSChristoph Hellwig 1401f5fa90dcSChristoph Hellwig if (nr_io_queues == 0) 1402a5229050SKeith Busch return 0; 140357dacad5SJay Sternberg 140457dacad5SJay Sternberg if (dev->cmb && NVME_CMB_SQS(dev->cmbsz)) { 140557dacad5SJay Sternberg result = nvme_cmb_qdepth(dev, nr_io_queues, 140657dacad5SJay Sternberg sizeof(struct nvme_command)); 140757dacad5SJay Sternberg if (result > 0) 140857dacad5SJay Sternberg dev->q_depth = result; 140957dacad5SJay Sternberg else 141057dacad5SJay Sternberg nvme_release_cmb(dev); 141157dacad5SJay Sternberg } 141257dacad5SJay Sternberg 141357dacad5SJay Sternberg size = db_bar_size(dev, nr_io_queues); 141457dacad5SJay Sternberg if (size > 8192) { 141557dacad5SJay Sternberg iounmap(dev->bar); 141657dacad5SJay Sternberg do { 141757dacad5SJay Sternberg dev->bar = ioremap(pci_resource_start(pdev, 0), size); 141857dacad5SJay Sternberg if (dev->bar) 141957dacad5SJay Sternberg break; 142057dacad5SJay Sternberg if (!--nr_io_queues) 142157dacad5SJay Sternberg return -ENOMEM; 142257dacad5SJay Sternberg size = db_bar_size(dev, nr_io_queues); 142357dacad5SJay Sternberg } while (1); 14247a67cbeaSChristoph Hellwig dev->dbs = dev->bar + 4096; 142557dacad5SJay Sternberg adminq->q_db = dev->dbs; 142657dacad5SJay Sternberg } 142757dacad5SJay Sternberg 142857dacad5SJay Sternberg /* Deregister the admin queue's interrupt */ 1429dca51e78SChristoph Hellwig free_irq(pci_irq_vector(pdev, 0), adminq); 143057dacad5SJay Sternberg 143157dacad5SJay Sternberg /* 143257dacad5SJay Sternberg * If we enable msix early due to not intx, disable it again before 143357dacad5SJay Sternberg * setting up the full range we need. 143457dacad5SJay Sternberg */ 1435dca51e78SChristoph Hellwig pci_free_irq_vectors(pdev); 1436dca51e78SChristoph Hellwig nr_io_queues = pci_alloc_irq_vectors(pdev, 1, nr_io_queues, 1437dca51e78SChristoph Hellwig PCI_IRQ_ALL_TYPES | PCI_IRQ_AFFINITY); 1438dca51e78SChristoph Hellwig if (nr_io_queues <= 0) 1439dca51e78SChristoph Hellwig return -EIO; 1440dca51e78SChristoph Hellwig dev->max_qid = nr_io_queues; 144157dacad5SJay Sternberg 144257dacad5SJay Sternberg /* 144357dacad5SJay Sternberg * Should investigate if there's a performance win from allocating 144457dacad5SJay Sternberg * more queues than interrupt vectors; it might allow the submission 144557dacad5SJay Sternberg * path to scale better, even if the receive path is limited by the 144657dacad5SJay Sternberg * number of interrupts. 144757dacad5SJay Sternberg */ 144857dacad5SJay Sternberg 1449dca51e78SChristoph Hellwig result = queue_request_irq(adminq); 145057dacad5SJay Sternberg if (result) { 145157dacad5SJay Sternberg adminq->cq_vector = -1; 145257dacad5SJay Sternberg goto free_queues; 145357dacad5SJay Sternberg } 1454749941f2SChristoph Hellwig return nvme_create_io_queues(dev); 145557dacad5SJay Sternberg 145657dacad5SJay Sternberg free_queues: 145757dacad5SJay Sternberg nvme_free_queues(dev, 1); 145857dacad5SJay Sternberg return result; 145957dacad5SJay Sternberg } 146057dacad5SJay Sternberg 1461db3cbfffSKeith Busch static void nvme_del_queue_end(struct request *req, int error) 1462db3cbfffSKeith Busch { 1463db3cbfffSKeith Busch struct nvme_queue *nvmeq = req->end_io_data; 1464db3cbfffSKeith Busch 1465db3cbfffSKeith Busch blk_mq_free_request(req); 1466db3cbfffSKeith Busch complete(&nvmeq->dev->ioq_wait); 1467db3cbfffSKeith Busch } 1468db3cbfffSKeith Busch 1469db3cbfffSKeith Busch static void nvme_del_cq_end(struct request *req, int error) 1470db3cbfffSKeith Busch { 1471db3cbfffSKeith Busch struct nvme_queue *nvmeq = req->end_io_data; 1472db3cbfffSKeith Busch 1473db3cbfffSKeith Busch if (!error) { 1474db3cbfffSKeith Busch unsigned long flags; 1475db3cbfffSKeith Busch 14762e39e0f6SMing Lin /* 14772e39e0f6SMing Lin * We might be called with the AQ q_lock held 14782e39e0f6SMing Lin * and the I/O queue q_lock should always 14792e39e0f6SMing Lin * nest inside the AQ one. 14802e39e0f6SMing Lin */ 14812e39e0f6SMing Lin spin_lock_irqsave_nested(&nvmeq->q_lock, flags, 14822e39e0f6SMing Lin SINGLE_DEPTH_NESTING); 1483db3cbfffSKeith Busch nvme_process_cq(nvmeq); 1484db3cbfffSKeith Busch spin_unlock_irqrestore(&nvmeq->q_lock, flags); 1485db3cbfffSKeith Busch } 1486db3cbfffSKeith Busch 1487db3cbfffSKeith Busch nvme_del_queue_end(req, error); 1488db3cbfffSKeith Busch } 1489db3cbfffSKeith Busch 1490db3cbfffSKeith Busch static int nvme_delete_queue(struct nvme_queue *nvmeq, u8 opcode) 1491db3cbfffSKeith Busch { 1492db3cbfffSKeith Busch struct request_queue *q = nvmeq->dev->ctrl.admin_q; 1493db3cbfffSKeith Busch struct request *req; 1494db3cbfffSKeith Busch struct nvme_command cmd; 1495db3cbfffSKeith Busch 1496db3cbfffSKeith Busch memset(&cmd, 0, sizeof(cmd)); 1497db3cbfffSKeith Busch cmd.delete_queue.opcode = opcode; 1498db3cbfffSKeith Busch cmd.delete_queue.qid = cpu_to_le16(nvmeq->qid); 1499db3cbfffSKeith Busch 1500eb71f435SChristoph Hellwig req = nvme_alloc_request(q, &cmd, BLK_MQ_REQ_NOWAIT, NVME_QID_ANY); 1501db3cbfffSKeith Busch if (IS_ERR(req)) 1502db3cbfffSKeith Busch return PTR_ERR(req); 1503db3cbfffSKeith Busch 1504db3cbfffSKeith Busch req->timeout = ADMIN_TIMEOUT; 1505db3cbfffSKeith Busch req->end_io_data = nvmeq; 1506db3cbfffSKeith Busch 1507db3cbfffSKeith Busch blk_execute_rq_nowait(q, NULL, req, false, 1508db3cbfffSKeith Busch opcode == nvme_admin_delete_cq ? 1509db3cbfffSKeith Busch nvme_del_cq_end : nvme_del_queue_end); 1510db3cbfffSKeith Busch return 0; 1511db3cbfffSKeith Busch } 1512db3cbfffSKeith Busch 1513db3cbfffSKeith Busch static void nvme_disable_io_queues(struct nvme_dev *dev) 1514db3cbfffSKeith Busch { 1515014a0d60SKeith Busch int pass, queues = dev->online_queues - 1; 1516db3cbfffSKeith Busch unsigned long timeout; 1517db3cbfffSKeith Busch u8 opcode = nvme_admin_delete_sq; 1518db3cbfffSKeith Busch 1519db3cbfffSKeith Busch for (pass = 0; pass < 2; pass++) { 1520014a0d60SKeith Busch int sent = 0, i = queues; 1521db3cbfffSKeith Busch 1522db3cbfffSKeith Busch reinit_completion(&dev->ioq_wait); 1523db3cbfffSKeith Busch retry: 1524db3cbfffSKeith Busch timeout = ADMIN_TIMEOUT; 1525c21377f8SGabriel Krisman Bertazi for (; i > 0; i--, sent++) 1526c21377f8SGabriel Krisman Bertazi if (nvme_delete_queue(dev->queues[i], opcode)) 1527db3cbfffSKeith Busch break; 1528c21377f8SGabriel Krisman Bertazi 1529db3cbfffSKeith Busch while (sent--) { 1530db3cbfffSKeith Busch timeout = wait_for_completion_io_timeout(&dev->ioq_wait, timeout); 1531db3cbfffSKeith Busch if (timeout == 0) 1532db3cbfffSKeith Busch return; 1533db3cbfffSKeith Busch if (i) 1534db3cbfffSKeith Busch goto retry; 1535db3cbfffSKeith Busch } 1536db3cbfffSKeith Busch opcode = nvme_admin_delete_cq; 1537db3cbfffSKeith Busch } 1538db3cbfffSKeith Busch } 1539db3cbfffSKeith Busch 154057dacad5SJay Sternberg /* 154157dacad5SJay Sternberg * Return: error value if an error occurred setting up the queues or calling 154257dacad5SJay Sternberg * Identify Device. 0 if these succeeded, even if adding some of the 154357dacad5SJay Sternberg * namespaces failed. At the moment, these failures are silent. TBD which 154457dacad5SJay Sternberg * failures should be reported. 154557dacad5SJay Sternberg */ 154657dacad5SJay Sternberg static int nvme_dev_add(struct nvme_dev *dev) 154757dacad5SJay Sternberg { 15485bae7f73SChristoph Hellwig if (!dev->ctrl.tagset) { 154957dacad5SJay Sternberg dev->tagset.ops = &nvme_mq_ops; 155057dacad5SJay Sternberg dev->tagset.nr_hw_queues = dev->online_queues - 1; 155157dacad5SJay Sternberg dev->tagset.timeout = NVME_IO_TIMEOUT; 155257dacad5SJay Sternberg dev->tagset.numa_node = dev_to_node(dev->dev); 155357dacad5SJay Sternberg dev->tagset.queue_depth = 155457dacad5SJay Sternberg min_t(int, dev->q_depth, BLK_MQ_MAX_DEPTH) - 1; 155557dacad5SJay Sternberg dev->tagset.cmd_size = nvme_cmd_size(dev); 155657dacad5SJay Sternberg dev->tagset.flags = BLK_MQ_F_SHOULD_MERGE; 155757dacad5SJay Sternberg dev->tagset.driver_data = dev; 155857dacad5SJay Sternberg 155957dacad5SJay Sternberg if (blk_mq_alloc_tag_set(&dev->tagset)) 156057dacad5SJay Sternberg return 0; 15615bae7f73SChristoph Hellwig dev->ctrl.tagset = &dev->tagset; 1562949928c1SKeith Busch } else { 1563949928c1SKeith Busch blk_mq_update_nr_hw_queues(&dev->tagset, dev->online_queues - 1); 1564949928c1SKeith Busch 1565949928c1SKeith Busch /* Free previously allocated queues that are no longer usable */ 1566949928c1SKeith Busch nvme_free_queues(dev, dev->online_queues); 156757dacad5SJay Sternberg } 1568949928c1SKeith Busch 156957dacad5SJay Sternberg return 0; 157057dacad5SJay Sternberg } 157157dacad5SJay Sternberg 1572b00a726aSKeith Busch static int nvme_pci_enable(struct nvme_dev *dev) 157357dacad5SJay Sternberg { 157457dacad5SJay Sternberg u64 cap; 1575b00a726aSKeith Busch int result = -ENOMEM; 157657dacad5SJay Sternberg struct pci_dev *pdev = to_pci_dev(dev->dev); 157757dacad5SJay Sternberg 157857dacad5SJay Sternberg if (pci_enable_device_mem(pdev)) 157957dacad5SJay Sternberg return result; 158057dacad5SJay Sternberg 158157dacad5SJay Sternberg pci_set_master(pdev); 158257dacad5SJay Sternberg 158357dacad5SJay Sternberg if (dma_set_mask_and_coherent(dev->dev, DMA_BIT_MASK(64)) && 158457dacad5SJay Sternberg dma_set_mask_and_coherent(dev->dev, DMA_BIT_MASK(32))) 158557dacad5SJay Sternberg goto disable; 158657dacad5SJay Sternberg 15877a67cbeaSChristoph Hellwig if (readl(dev->bar + NVME_REG_CSTS) == -1) { 158857dacad5SJay Sternberg result = -ENODEV; 1589b00a726aSKeith Busch goto disable; 159057dacad5SJay Sternberg } 159157dacad5SJay Sternberg 159257dacad5SJay Sternberg /* 1593a5229050SKeith Busch * Some devices and/or platforms don't advertise or work with INTx 1594a5229050SKeith Busch * interrupts. Pre-enable a single MSIX or MSI vec for setup. We'll 1595a5229050SKeith Busch * adjust this later. 159657dacad5SJay Sternberg */ 1597dca51e78SChristoph Hellwig result = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_ALL_TYPES); 1598dca51e78SChristoph Hellwig if (result < 0) 1599dca51e78SChristoph Hellwig return result; 160057dacad5SJay Sternberg 16017a67cbeaSChristoph Hellwig cap = lo_hi_readq(dev->bar + NVME_REG_CAP); 16027a67cbeaSChristoph Hellwig 160357dacad5SJay Sternberg dev->q_depth = min_t(int, NVME_CAP_MQES(cap) + 1, NVME_Q_DEPTH); 160457dacad5SJay Sternberg dev->db_stride = 1 << NVME_CAP_STRIDE(cap); 16057a67cbeaSChristoph Hellwig dev->dbs = dev->bar + 4096; 16061f390c1fSStephan Günther 16071f390c1fSStephan Günther /* 16081f390c1fSStephan Günther * Temporary fix for the Apple controller found in the MacBook8,1 and 16091f390c1fSStephan Günther * some MacBook7,1 to avoid controller resets and data loss. 16101f390c1fSStephan Günther */ 16111f390c1fSStephan Günther if (pdev->vendor == PCI_VENDOR_ID_APPLE && pdev->device == 0x2001) { 16121f390c1fSStephan Günther dev->q_depth = 2; 16131f390c1fSStephan Günther dev_warn(dev->dev, "detected Apple NVMe controller, set " 16141f390c1fSStephan Günther "queue depth=%u to work around controller resets\n", 16151f390c1fSStephan Günther dev->q_depth); 16161f390c1fSStephan Günther } 16171f390c1fSStephan Günther 16187a67cbeaSChristoph Hellwig if (readl(dev->bar + NVME_REG_VS) >= NVME_VS(1, 2)) 161957dacad5SJay Sternberg dev->cmb = nvme_map_cmb(dev); 162057dacad5SJay Sternberg 1621a0a3408eSKeith Busch pci_enable_pcie_error_reporting(pdev); 1622a0a3408eSKeith Busch pci_save_state(pdev); 162357dacad5SJay Sternberg return 0; 162457dacad5SJay Sternberg 162557dacad5SJay Sternberg disable: 162657dacad5SJay Sternberg pci_disable_device(pdev); 162757dacad5SJay Sternberg return result; 162857dacad5SJay Sternberg } 162957dacad5SJay Sternberg 163057dacad5SJay Sternberg static void nvme_dev_unmap(struct nvme_dev *dev) 163157dacad5SJay Sternberg { 1632b00a726aSKeith Busch if (dev->bar) 1633b00a726aSKeith Busch iounmap(dev->bar); 1634a1f447b3SJohannes Thumshirn pci_release_mem_regions(to_pci_dev(dev->dev)); 1635b00a726aSKeith Busch } 1636b00a726aSKeith Busch 1637b00a726aSKeith Busch static void nvme_pci_disable(struct nvme_dev *dev) 1638b00a726aSKeith Busch { 163957dacad5SJay Sternberg struct pci_dev *pdev = to_pci_dev(dev->dev); 164057dacad5SJay Sternberg 1641dca51e78SChristoph Hellwig pci_free_irq_vectors(pdev); 164257dacad5SJay Sternberg 1643a0a3408eSKeith Busch if (pci_is_enabled(pdev)) { 1644a0a3408eSKeith Busch pci_disable_pcie_error_reporting(pdev); 164557dacad5SJay Sternberg pci_disable_device(pdev); 164657dacad5SJay Sternberg } 1647a0a3408eSKeith Busch } 164857dacad5SJay Sternberg 1649a5cdb68cSKeith Busch static void nvme_dev_disable(struct nvme_dev *dev, bool shutdown) 165057dacad5SJay Sternberg { 165157dacad5SJay Sternberg int i; 165257dacad5SJay Sternberg u32 csts = -1; 165357dacad5SJay Sternberg 16542d55cd5fSChristoph Hellwig del_timer_sync(&dev->watchdog_timer); 165557dacad5SJay Sternberg 165677bf25eaSKeith Busch mutex_lock(&dev->shutdown_lock); 1657b00a726aSKeith Busch if (pci_is_enabled(to_pci_dev(dev->dev))) { 165825646264SKeith Busch nvme_stop_queues(&dev->ctrl); 16597a67cbeaSChristoph Hellwig csts = readl(dev->bar + NVME_REG_CSTS); 166057dacad5SJay Sternberg } 1661c21377f8SGabriel Krisman Bertazi 1662c21377f8SGabriel Krisman Bertazi for (i = dev->queue_count - 1; i > 0; i--) 1663c21377f8SGabriel Krisman Bertazi nvme_suspend_queue(dev->queues[i]); 1664c21377f8SGabriel Krisman Bertazi 166557dacad5SJay Sternberg if (csts & NVME_CSTS_CFS || !(csts & NVME_CSTS_RDY)) { 1666c21377f8SGabriel Krisman Bertazi nvme_suspend_queue(dev->queues[0]); 166757dacad5SJay Sternberg } else { 166857dacad5SJay Sternberg nvme_disable_io_queues(dev); 1669a5cdb68cSKeith Busch nvme_disable_admin_queue(dev, shutdown); 167057dacad5SJay Sternberg } 1671b00a726aSKeith Busch nvme_pci_disable(dev); 167257dacad5SJay Sternberg 1673e1958e65SMing Lin blk_mq_tagset_busy_iter(&dev->tagset, nvme_cancel_request, &dev->ctrl); 1674e1958e65SMing Lin blk_mq_tagset_busy_iter(&dev->admin_tagset, nvme_cancel_request, &dev->ctrl); 167577bf25eaSKeith Busch mutex_unlock(&dev->shutdown_lock); 167657dacad5SJay Sternberg } 167757dacad5SJay Sternberg 167857dacad5SJay Sternberg static int nvme_setup_prp_pools(struct nvme_dev *dev) 167957dacad5SJay Sternberg { 168057dacad5SJay Sternberg dev->prp_page_pool = dma_pool_create("prp list page", dev->dev, 168157dacad5SJay Sternberg PAGE_SIZE, PAGE_SIZE, 0); 168257dacad5SJay Sternberg if (!dev->prp_page_pool) 168357dacad5SJay Sternberg return -ENOMEM; 168457dacad5SJay Sternberg 168557dacad5SJay Sternberg /* Optimisation for I/Os between 4k and 128k */ 168657dacad5SJay Sternberg dev->prp_small_pool = dma_pool_create("prp list 256", dev->dev, 168757dacad5SJay Sternberg 256, 256, 0); 168857dacad5SJay Sternberg if (!dev->prp_small_pool) { 168957dacad5SJay Sternberg dma_pool_destroy(dev->prp_page_pool); 169057dacad5SJay Sternberg return -ENOMEM; 169157dacad5SJay Sternberg } 169257dacad5SJay Sternberg return 0; 169357dacad5SJay Sternberg } 169457dacad5SJay Sternberg 169557dacad5SJay Sternberg static void nvme_release_prp_pools(struct nvme_dev *dev) 169657dacad5SJay Sternberg { 169757dacad5SJay Sternberg dma_pool_destroy(dev->prp_page_pool); 169857dacad5SJay Sternberg dma_pool_destroy(dev->prp_small_pool); 169957dacad5SJay Sternberg } 170057dacad5SJay Sternberg 17011673f1f0SChristoph Hellwig static void nvme_pci_free_ctrl(struct nvme_ctrl *ctrl) 170257dacad5SJay Sternberg { 17031673f1f0SChristoph Hellwig struct nvme_dev *dev = to_nvme_dev(ctrl); 170457dacad5SJay Sternberg 170557dacad5SJay Sternberg put_device(dev->dev); 170657dacad5SJay Sternberg if (dev->tagset.tags) 170757dacad5SJay Sternberg blk_mq_free_tag_set(&dev->tagset); 17081c63dc66SChristoph Hellwig if (dev->ctrl.admin_q) 17091c63dc66SChristoph Hellwig blk_put_queue(dev->ctrl.admin_q); 171057dacad5SJay Sternberg kfree(dev->queues); 171157dacad5SJay Sternberg kfree(dev); 171257dacad5SJay Sternberg } 171357dacad5SJay Sternberg 1714f58944e2SKeith Busch static void nvme_remove_dead_ctrl(struct nvme_dev *dev, int status) 1715f58944e2SKeith Busch { 1716237045fcSLinus Torvalds dev_warn(dev->ctrl.device, "Removing after probe failure status: %d\n", status); 1717f58944e2SKeith Busch 1718f58944e2SKeith Busch kref_get(&dev->ctrl.kref); 171969d9a99cSKeith Busch nvme_dev_disable(dev, false); 1720f58944e2SKeith Busch if (!schedule_work(&dev->remove_work)) 1721f58944e2SKeith Busch nvme_put_ctrl(&dev->ctrl); 1722f58944e2SKeith Busch } 1723f58944e2SKeith Busch 1724fd634f41SChristoph Hellwig static void nvme_reset_work(struct work_struct *work) 172557dacad5SJay Sternberg { 1726fd634f41SChristoph Hellwig struct nvme_dev *dev = container_of(work, struct nvme_dev, reset_work); 1727f58944e2SKeith Busch int result = -ENODEV; 172857dacad5SJay Sternberg 1729bb8d261eSChristoph Hellwig if (WARN_ON(dev->ctrl.state == NVME_CTRL_RESETTING)) 1730fd634f41SChristoph Hellwig goto out; 1731fd634f41SChristoph Hellwig 1732fd634f41SChristoph Hellwig /* 1733fd634f41SChristoph Hellwig * If we're called to reset a live controller first shut it down before 1734fd634f41SChristoph Hellwig * moving on. 1735fd634f41SChristoph Hellwig */ 1736b00a726aSKeith Busch if (dev->ctrl.ctrl_config & NVME_CC_ENABLE) 1737a5cdb68cSKeith Busch nvme_dev_disable(dev, false); 1738fd634f41SChristoph Hellwig 1739bb8d261eSChristoph Hellwig if (!nvme_change_ctrl_state(&dev->ctrl, NVME_CTRL_RESETTING)) 17409bf2b972SKeith Busch goto out; 17419bf2b972SKeith Busch 1742b00a726aSKeith Busch result = nvme_pci_enable(dev); 174357dacad5SJay Sternberg if (result) 174457dacad5SJay Sternberg goto out; 174557dacad5SJay Sternberg 174657dacad5SJay Sternberg result = nvme_configure_admin_queue(dev); 174757dacad5SJay Sternberg if (result) 1748f58944e2SKeith Busch goto out; 174957dacad5SJay Sternberg 175057dacad5SJay Sternberg nvme_init_queue(dev->queues[0], 0); 175157dacad5SJay Sternberg result = nvme_alloc_admin_tags(dev); 175257dacad5SJay Sternberg if (result) 1753f58944e2SKeith Busch goto out; 175457dacad5SJay Sternberg 1755ce4541f4SChristoph Hellwig result = nvme_init_identify(&dev->ctrl); 1756ce4541f4SChristoph Hellwig if (result) 1757f58944e2SKeith Busch goto out; 1758ce4541f4SChristoph Hellwig 175957dacad5SJay Sternberg result = nvme_setup_io_queues(dev); 176057dacad5SJay Sternberg if (result) 1761f58944e2SKeith Busch goto out; 176257dacad5SJay Sternberg 176321f033f7SKeith Busch /* 176421f033f7SKeith Busch * A controller that can not execute IO typically requires user 176521f033f7SKeith Busch * intervention to correct. For such degraded controllers, the driver 176621f033f7SKeith Busch * should not submit commands the user did not request, so skip 176721f033f7SKeith Busch * registering for asynchronous event notification on this condition. 176821f033f7SKeith Busch */ 1769f866fc42SChristoph Hellwig if (dev->online_queues > 1) 1770f866fc42SChristoph Hellwig nvme_queue_async_events(&dev->ctrl); 177157dacad5SJay Sternberg 17722d55cd5fSChristoph Hellwig mod_timer(&dev->watchdog_timer, round_jiffies(jiffies + HZ)); 177357dacad5SJay Sternberg 177457dacad5SJay Sternberg /* 177557dacad5SJay Sternberg * Keep the controller around but remove all namespaces if we don't have 177657dacad5SJay Sternberg * any working I/O queue. 177757dacad5SJay Sternberg */ 177857dacad5SJay Sternberg if (dev->online_queues < 2) { 17791b3c47c1SSagi Grimberg dev_warn(dev->ctrl.device, "IO queues not created\n"); 17803b24774eSKeith Busch nvme_kill_queues(&dev->ctrl); 17815bae7f73SChristoph Hellwig nvme_remove_namespaces(&dev->ctrl); 178257dacad5SJay Sternberg } else { 178325646264SKeith Busch nvme_start_queues(&dev->ctrl); 178457dacad5SJay Sternberg nvme_dev_add(dev); 178557dacad5SJay Sternberg } 178657dacad5SJay Sternberg 1787bb8d261eSChristoph Hellwig if (!nvme_change_ctrl_state(&dev->ctrl, NVME_CTRL_LIVE)) { 1788bb8d261eSChristoph Hellwig dev_warn(dev->ctrl.device, "failed to mark controller live\n"); 1789bb8d261eSChristoph Hellwig goto out; 1790bb8d261eSChristoph Hellwig } 179192911a55SChristoph Hellwig 179292911a55SChristoph Hellwig if (dev->online_queues > 1) 17935955be21SChristoph Hellwig nvme_queue_scan(&dev->ctrl); 179457dacad5SJay Sternberg return; 179557dacad5SJay Sternberg 179657dacad5SJay Sternberg out: 1797f58944e2SKeith Busch nvme_remove_dead_ctrl(dev, result); 179857dacad5SJay Sternberg } 179957dacad5SJay Sternberg 18005c8809e6SChristoph Hellwig static void nvme_remove_dead_ctrl_work(struct work_struct *work) 180157dacad5SJay Sternberg { 18025c8809e6SChristoph Hellwig struct nvme_dev *dev = container_of(work, struct nvme_dev, remove_work); 180357dacad5SJay Sternberg struct pci_dev *pdev = to_pci_dev(dev->dev); 180457dacad5SJay Sternberg 180569d9a99cSKeith Busch nvme_kill_queues(&dev->ctrl); 180657dacad5SJay Sternberg if (pci_get_drvdata(pdev)) 1807921920abSKeith Busch device_release_driver(&pdev->dev); 18081673f1f0SChristoph Hellwig nvme_put_ctrl(&dev->ctrl); 180957dacad5SJay Sternberg } 181057dacad5SJay Sternberg 181157dacad5SJay Sternberg static int nvme_reset(struct nvme_dev *dev) 181257dacad5SJay Sternberg { 18131c63dc66SChristoph Hellwig if (!dev->ctrl.admin_q || blk_queue_dying(dev->ctrl.admin_q)) 181457dacad5SJay Sternberg return -ENODEV; 181557dacad5SJay Sternberg 1816846cc05fSChristoph Hellwig if (!queue_work(nvme_workq, &dev->reset_work)) 1817846cc05fSChristoph Hellwig return -EBUSY; 181857dacad5SJay Sternberg 181957dacad5SJay Sternberg flush_work(&dev->reset_work); 182057dacad5SJay Sternberg return 0; 182157dacad5SJay Sternberg } 182257dacad5SJay Sternberg 18231c63dc66SChristoph Hellwig static int nvme_pci_reg_read32(struct nvme_ctrl *ctrl, u32 off, u32 *val) 182457dacad5SJay Sternberg { 18251c63dc66SChristoph Hellwig *val = readl(to_nvme_dev(ctrl)->bar + off); 18261c63dc66SChristoph Hellwig return 0; 182757dacad5SJay Sternberg } 18281c63dc66SChristoph Hellwig 18295fd4ce1bSChristoph Hellwig static int nvme_pci_reg_write32(struct nvme_ctrl *ctrl, u32 off, u32 val) 18305fd4ce1bSChristoph Hellwig { 18315fd4ce1bSChristoph Hellwig writel(val, to_nvme_dev(ctrl)->bar + off); 18325fd4ce1bSChristoph Hellwig return 0; 18335fd4ce1bSChristoph Hellwig } 18345fd4ce1bSChristoph Hellwig 18357fd8930fSChristoph Hellwig static int nvme_pci_reg_read64(struct nvme_ctrl *ctrl, u32 off, u64 *val) 18367fd8930fSChristoph Hellwig { 18377fd8930fSChristoph Hellwig *val = readq(to_nvme_dev(ctrl)->bar + off); 18387fd8930fSChristoph Hellwig return 0; 18397fd8930fSChristoph Hellwig } 18407fd8930fSChristoph Hellwig 1841f3ca80fcSChristoph Hellwig static int nvme_pci_reset_ctrl(struct nvme_ctrl *ctrl) 1842f3ca80fcSChristoph Hellwig { 1843f3ca80fcSChristoph Hellwig return nvme_reset(to_nvme_dev(ctrl)); 1844f3ca80fcSChristoph Hellwig } 1845f3ca80fcSChristoph Hellwig 18461c63dc66SChristoph Hellwig static const struct nvme_ctrl_ops nvme_pci_ctrl_ops = { 18471a353d85SMing Lin .name = "pcie", 1848e439bb12SSagi Grimberg .module = THIS_MODULE, 18491c63dc66SChristoph Hellwig .reg_read32 = nvme_pci_reg_read32, 18505fd4ce1bSChristoph Hellwig .reg_write32 = nvme_pci_reg_write32, 18517fd8930fSChristoph Hellwig .reg_read64 = nvme_pci_reg_read64, 1852f3ca80fcSChristoph Hellwig .reset_ctrl = nvme_pci_reset_ctrl, 18531673f1f0SChristoph Hellwig .free_ctrl = nvme_pci_free_ctrl, 1854f866fc42SChristoph Hellwig .submit_async_event = nvme_pci_submit_async_event, 18551c63dc66SChristoph Hellwig }; 185657dacad5SJay Sternberg 1857b00a726aSKeith Busch static int nvme_dev_map(struct nvme_dev *dev) 1858b00a726aSKeith Busch { 1859b00a726aSKeith Busch struct pci_dev *pdev = to_pci_dev(dev->dev); 1860b00a726aSKeith Busch 1861a1f447b3SJohannes Thumshirn if (pci_request_mem_regions(pdev, "nvme")) 1862b00a726aSKeith Busch return -ENODEV; 1863b00a726aSKeith Busch 1864b00a726aSKeith Busch dev->bar = ioremap(pci_resource_start(pdev, 0), 8192); 1865b00a726aSKeith Busch if (!dev->bar) 1866b00a726aSKeith Busch goto release; 1867b00a726aSKeith Busch 1868b00a726aSKeith Busch return 0; 1869b00a726aSKeith Busch release: 1870a1f447b3SJohannes Thumshirn pci_release_mem_regions(pdev); 1871b00a726aSKeith Busch return -ENODEV; 1872b00a726aSKeith Busch } 1873b00a726aSKeith Busch 187457dacad5SJay Sternberg static int nvme_probe(struct pci_dev *pdev, const struct pci_device_id *id) 187557dacad5SJay Sternberg { 187657dacad5SJay Sternberg int node, result = -ENOMEM; 187757dacad5SJay Sternberg struct nvme_dev *dev; 187857dacad5SJay Sternberg 187957dacad5SJay Sternberg node = dev_to_node(&pdev->dev); 188057dacad5SJay Sternberg if (node == NUMA_NO_NODE) 18812fa84351SMasayoshi Mizuma set_dev_node(&pdev->dev, first_memory_node); 188257dacad5SJay Sternberg 188357dacad5SJay Sternberg dev = kzalloc_node(sizeof(*dev), GFP_KERNEL, node); 188457dacad5SJay Sternberg if (!dev) 188557dacad5SJay Sternberg return -ENOMEM; 188657dacad5SJay Sternberg dev->queues = kzalloc_node((num_possible_cpus() + 1) * sizeof(void *), 188757dacad5SJay Sternberg GFP_KERNEL, node); 188857dacad5SJay Sternberg if (!dev->queues) 188957dacad5SJay Sternberg goto free; 189057dacad5SJay Sternberg 189157dacad5SJay Sternberg dev->dev = get_device(&pdev->dev); 189257dacad5SJay Sternberg pci_set_drvdata(pdev, dev); 189357dacad5SJay Sternberg 1894b00a726aSKeith Busch result = nvme_dev_map(dev); 1895b00a726aSKeith Busch if (result) 1896b00a726aSKeith Busch goto free; 1897b00a726aSKeith Busch 1898f3ca80fcSChristoph Hellwig INIT_WORK(&dev->reset_work, nvme_reset_work); 18995c8809e6SChristoph Hellwig INIT_WORK(&dev->remove_work, nvme_remove_dead_ctrl_work); 19002d55cd5fSChristoph Hellwig setup_timer(&dev->watchdog_timer, nvme_watchdog_timer, 19012d55cd5fSChristoph Hellwig (unsigned long)dev); 190277bf25eaSKeith Busch mutex_init(&dev->shutdown_lock); 1903db3cbfffSKeith Busch init_completion(&dev->ioq_wait); 1904f3ca80fcSChristoph Hellwig 1905f3ca80fcSChristoph Hellwig result = nvme_setup_prp_pools(dev); 1906f3ca80fcSChristoph Hellwig if (result) 1907f3ca80fcSChristoph Hellwig goto put_pci; 1908f3ca80fcSChristoph Hellwig 1909f3ca80fcSChristoph Hellwig result = nvme_init_ctrl(&dev->ctrl, &pdev->dev, &nvme_pci_ctrl_ops, 1910f3ca80fcSChristoph Hellwig id->driver_data); 1911f3ca80fcSChristoph Hellwig if (result) 1912f3ca80fcSChristoph Hellwig goto release_pools; 1913f3ca80fcSChristoph Hellwig 19141b3c47c1SSagi Grimberg dev_info(dev->ctrl.device, "pci function %s\n", dev_name(&pdev->dev)); 19151b3c47c1SSagi Grimberg 191692f7a162SKeith Busch queue_work(nvme_workq, &dev->reset_work); 191757dacad5SJay Sternberg return 0; 191857dacad5SJay Sternberg 191957dacad5SJay Sternberg release_pools: 192057dacad5SJay Sternberg nvme_release_prp_pools(dev); 192157dacad5SJay Sternberg put_pci: 192257dacad5SJay Sternberg put_device(dev->dev); 1923b00a726aSKeith Busch nvme_dev_unmap(dev); 192457dacad5SJay Sternberg free: 192557dacad5SJay Sternberg kfree(dev->queues); 192657dacad5SJay Sternberg kfree(dev); 192757dacad5SJay Sternberg return result; 192857dacad5SJay Sternberg } 192957dacad5SJay Sternberg 193057dacad5SJay Sternberg static void nvme_reset_notify(struct pci_dev *pdev, bool prepare) 193157dacad5SJay Sternberg { 193257dacad5SJay Sternberg struct nvme_dev *dev = pci_get_drvdata(pdev); 193357dacad5SJay Sternberg 193457dacad5SJay Sternberg if (prepare) 1935a5cdb68cSKeith Busch nvme_dev_disable(dev, false); 193657dacad5SJay Sternberg else 193792f7a162SKeith Busch queue_work(nvme_workq, &dev->reset_work); 193857dacad5SJay Sternberg } 193957dacad5SJay Sternberg 194057dacad5SJay Sternberg static void nvme_shutdown(struct pci_dev *pdev) 194157dacad5SJay Sternberg { 194257dacad5SJay Sternberg struct nvme_dev *dev = pci_get_drvdata(pdev); 1943a5cdb68cSKeith Busch nvme_dev_disable(dev, true); 194457dacad5SJay Sternberg } 194557dacad5SJay Sternberg 1946f58944e2SKeith Busch /* 1947f58944e2SKeith Busch * The driver's remove may be called on a device in a partially initialized 1948f58944e2SKeith Busch * state. This function must not have any dependencies on the device state in 1949f58944e2SKeith Busch * order to proceed. 1950f58944e2SKeith Busch */ 195157dacad5SJay Sternberg static void nvme_remove(struct pci_dev *pdev) 195257dacad5SJay Sternberg { 195357dacad5SJay Sternberg struct nvme_dev *dev = pci_get_drvdata(pdev); 195457dacad5SJay Sternberg 1955bb8d261eSChristoph Hellwig nvme_change_ctrl_state(&dev->ctrl, NVME_CTRL_DELETING); 1956bb8d261eSChristoph Hellwig 195757dacad5SJay Sternberg pci_set_drvdata(pdev, NULL); 19580ff9d4e1SKeith Busch 19590ff9d4e1SKeith Busch if (!pci_device_is_present(pdev)) 19600ff9d4e1SKeith Busch nvme_change_ctrl_state(&dev->ctrl, NVME_CTRL_DEAD); 19610ff9d4e1SKeith Busch 19629bf2b972SKeith Busch flush_work(&dev->reset_work); 196353029b04SKeith Busch nvme_uninit_ctrl(&dev->ctrl); 1964a5cdb68cSKeith Busch nvme_dev_disable(dev, true); 196557dacad5SJay Sternberg nvme_dev_remove_admin(dev); 196657dacad5SJay Sternberg nvme_free_queues(dev, 0); 196757dacad5SJay Sternberg nvme_release_cmb(dev); 196857dacad5SJay Sternberg nvme_release_prp_pools(dev); 1969b00a726aSKeith Busch nvme_dev_unmap(dev); 19701673f1f0SChristoph Hellwig nvme_put_ctrl(&dev->ctrl); 197157dacad5SJay Sternberg } 197257dacad5SJay Sternberg 197313880f5bSKeith Busch static int nvme_pci_sriov_configure(struct pci_dev *pdev, int numvfs) 197413880f5bSKeith Busch { 197513880f5bSKeith Busch int ret = 0; 197613880f5bSKeith Busch 197713880f5bSKeith Busch if (numvfs == 0) { 197813880f5bSKeith Busch if (pci_vfs_assigned(pdev)) { 197913880f5bSKeith Busch dev_warn(&pdev->dev, 198013880f5bSKeith Busch "Cannot disable SR-IOV VFs while assigned\n"); 198113880f5bSKeith Busch return -EPERM; 198213880f5bSKeith Busch } 198313880f5bSKeith Busch pci_disable_sriov(pdev); 198413880f5bSKeith Busch return 0; 198513880f5bSKeith Busch } 198613880f5bSKeith Busch 198713880f5bSKeith Busch ret = pci_enable_sriov(pdev, numvfs); 198813880f5bSKeith Busch return ret ? ret : numvfs; 198913880f5bSKeith Busch } 199013880f5bSKeith Busch 199157dacad5SJay Sternberg #ifdef CONFIG_PM_SLEEP 199257dacad5SJay Sternberg static int nvme_suspend(struct device *dev) 199357dacad5SJay Sternberg { 199457dacad5SJay Sternberg struct pci_dev *pdev = to_pci_dev(dev); 199557dacad5SJay Sternberg struct nvme_dev *ndev = pci_get_drvdata(pdev); 199657dacad5SJay Sternberg 1997a5cdb68cSKeith Busch nvme_dev_disable(ndev, true); 199857dacad5SJay Sternberg return 0; 199957dacad5SJay Sternberg } 200057dacad5SJay Sternberg 200157dacad5SJay Sternberg static int nvme_resume(struct device *dev) 200257dacad5SJay Sternberg { 200357dacad5SJay Sternberg struct pci_dev *pdev = to_pci_dev(dev); 200457dacad5SJay Sternberg struct nvme_dev *ndev = pci_get_drvdata(pdev); 200557dacad5SJay Sternberg 200692f7a162SKeith Busch queue_work(nvme_workq, &ndev->reset_work); 200757dacad5SJay Sternberg return 0; 200857dacad5SJay Sternberg } 200957dacad5SJay Sternberg #endif 201057dacad5SJay Sternberg 201157dacad5SJay Sternberg static SIMPLE_DEV_PM_OPS(nvme_dev_pm_ops, nvme_suspend, nvme_resume); 201257dacad5SJay Sternberg 2013a0a3408eSKeith Busch static pci_ers_result_t nvme_error_detected(struct pci_dev *pdev, 2014a0a3408eSKeith Busch pci_channel_state_t state) 2015a0a3408eSKeith Busch { 2016a0a3408eSKeith Busch struct nvme_dev *dev = pci_get_drvdata(pdev); 2017a0a3408eSKeith Busch 2018a0a3408eSKeith Busch /* 2019a0a3408eSKeith Busch * A frozen channel requires a reset. When detected, this method will 2020a0a3408eSKeith Busch * shutdown the controller to quiesce. The controller will be restarted 2021a0a3408eSKeith Busch * after the slot reset through driver's slot_reset callback. 2022a0a3408eSKeith Busch */ 2023a0a3408eSKeith Busch switch (state) { 2024a0a3408eSKeith Busch case pci_channel_io_normal: 2025a0a3408eSKeith Busch return PCI_ERS_RESULT_CAN_RECOVER; 2026a0a3408eSKeith Busch case pci_channel_io_frozen: 2027d011fb31SKeith Busch dev_warn(dev->ctrl.device, 2028d011fb31SKeith Busch "frozen state error detected, reset controller\n"); 2029a5cdb68cSKeith Busch nvme_dev_disable(dev, false); 2030a0a3408eSKeith Busch return PCI_ERS_RESULT_NEED_RESET; 2031a0a3408eSKeith Busch case pci_channel_io_perm_failure: 2032d011fb31SKeith Busch dev_warn(dev->ctrl.device, 2033d011fb31SKeith Busch "failure state error detected, request disconnect\n"); 2034a0a3408eSKeith Busch return PCI_ERS_RESULT_DISCONNECT; 2035a0a3408eSKeith Busch } 2036a0a3408eSKeith Busch return PCI_ERS_RESULT_NEED_RESET; 2037a0a3408eSKeith Busch } 2038a0a3408eSKeith Busch 2039a0a3408eSKeith Busch static pci_ers_result_t nvme_slot_reset(struct pci_dev *pdev) 2040a0a3408eSKeith Busch { 2041a0a3408eSKeith Busch struct nvme_dev *dev = pci_get_drvdata(pdev); 2042a0a3408eSKeith Busch 20431b3c47c1SSagi Grimberg dev_info(dev->ctrl.device, "restart after slot reset\n"); 2044a0a3408eSKeith Busch pci_restore_state(pdev); 2045a0a3408eSKeith Busch queue_work(nvme_workq, &dev->reset_work); 2046a0a3408eSKeith Busch return PCI_ERS_RESULT_RECOVERED; 2047a0a3408eSKeith Busch } 2048a0a3408eSKeith Busch 2049a0a3408eSKeith Busch static void nvme_error_resume(struct pci_dev *pdev) 2050a0a3408eSKeith Busch { 2051a0a3408eSKeith Busch pci_cleanup_aer_uncorrect_error_status(pdev); 2052a0a3408eSKeith Busch } 2053a0a3408eSKeith Busch 205457dacad5SJay Sternberg static const struct pci_error_handlers nvme_err_handler = { 205557dacad5SJay Sternberg .error_detected = nvme_error_detected, 205657dacad5SJay Sternberg .slot_reset = nvme_slot_reset, 205757dacad5SJay Sternberg .resume = nvme_error_resume, 205857dacad5SJay Sternberg .reset_notify = nvme_reset_notify, 205957dacad5SJay Sternberg }; 206057dacad5SJay Sternberg 206157dacad5SJay Sternberg /* Move to pci_ids.h later */ 206257dacad5SJay Sternberg #define PCI_CLASS_STORAGE_EXPRESS 0x010802 206357dacad5SJay Sternberg 206457dacad5SJay Sternberg static const struct pci_device_id nvme_id_table[] = { 2065106198edSChristoph Hellwig { PCI_VDEVICE(INTEL, 0x0953), 206608095e70SKeith Busch .driver_data = NVME_QUIRK_STRIPE_SIZE | 206708095e70SKeith Busch NVME_QUIRK_DISCARD_ZEROES, }, 206899466e70SKeith Busch { PCI_VDEVICE(INTEL, 0x0a53), 206999466e70SKeith Busch .driver_data = NVME_QUIRK_STRIPE_SIZE | 207099466e70SKeith Busch NVME_QUIRK_DISCARD_ZEROES, }, 207199466e70SKeith Busch { PCI_VDEVICE(INTEL, 0x0a54), 207299466e70SKeith Busch .driver_data = NVME_QUIRK_STRIPE_SIZE | 207399466e70SKeith Busch NVME_QUIRK_DISCARD_ZEROES, }, 2074540c801cSKeith Busch { PCI_VDEVICE(INTEL, 0x5845), /* Qemu emulated controller */ 2075540c801cSKeith Busch .driver_data = NVME_QUIRK_IDENTIFY_CNS, }, 207654adc010SGuilherme G. Piccoli { PCI_DEVICE(0x1c58, 0x0003), /* HGST adapter */ 207754adc010SGuilherme G. Piccoli .driver_data = NVME_QUIRK_DELAY_BEFORE_CHK_RDY, }, 207857dacad5SJay Sternberg { PCI_DEVICE_CLASS(PCI_CLASS_STORAGE_EXPRESS, 0xffffff) }, 2079c74dc780SStephan Günther { PCI_DEVICE(PCI_VENDOR_ID_APPLE, 0x2001) }, 208057dacad5SJay Sternberg { 0, } 208157dacad5SJay Sternberg }; 208257dacad5SJay Sternberg MODULE_DEVICE_TABLE(pci, nvme_id_table); 208357dacad5SJay Sternberg 208457dacad5SJay Sternberg static struct pci_driver nvme_driver = { 208557dacad5SJay Sternberg .name = "nvme", 208657dacad5SJay Sternberg .id_table = nvme_id_table, 208757dacad5SJay Sternberg .probe = nvme_probe, 208857dacad5SJay Sternberg .remove = nvme_remove, 208957dacad5SJay Sternberg .shutdown = nvme_shutdown, 209057dacad5SJay Sternberg .driver = { 209157dacad5SJay Sternberg .pm = &nvme_dev_pm_ops, 209257dacad5SJay Sternberg }, 209313880f5bSKeith Busch .sriov_configure = nvme_pci_sriov_configure, 209457dacad5SJay Sternberg .err_handler = &nvme_err_handler, 209557dacad5SJay Sternberg }; 209657dacad5SJay Sternberg 209757dacad5SJay Sternberg static int __init nvme_init(void) 209857dacad5SJay Sternberg { 209957dacad5SJay Sternberg int result; 210057dacad5SJay Sternberg 210192f7a162SKeith Busch nvme_workq = alloc_workqueue("nvme", WQ_UNBOUND | WQ_MEM_RECLAIM, 0); 210257dacad5SJay Sternberg if (!nvme_workq) 210357dacad5SJay Sternberg return -ENOMEM; 210457dacad5SJay Sternberg 210557dacad5SJay Sternberg result = pci_register_driver(&nvme_driver); 210657dacad5SJay Sternberg if (result) 210757dacad5SJay Sternberg destroy_workqueue(nvme_workq); 210857dacad5SJay Sternberg return result; 210957dacad5SJay Sternberg } 211057dacad5SJay Sternberg 211157dacad5SJay Sternberg static void __exit nvme_exit(void) 211257dacad5SJay Sternberg { 211357dacad5SJay Sternberg pci_unregister_driver(&nvme_driver); 211457dacad5SJay Sternberg destroy_workqueue(nvme_workq); 211557dacad5SJay Sternberg _nvme_check_size(); 211657dacad5SJay Sternberg } 211757dacad5SJay Sternberg 211857dacad5SJay Sternberg MODULE_AUTHOR("Matthew Wilcox <willy@linux.intel.com>"); 211957dacad5SJay Sternberg MODULE_LICENSE("GPL"); 212057dacad5SJay Sternberg MODULE_VERSION("1.0"); 212157dacad5SJay Sternberg module_init(nvme_init); 212257dacad5SJay Sternberg module_exit(nvme_exit); 2123