157dacad5SJay Sternberg /* 257dacad5SJay Sternberg * NVM Express device driver 357dacad5SJay Sternberg * Copyright (c) 2011-2014, Intel Corporation. 457dacad5SJay Sternberg * 557dacad5SJay Sternberg * This program is free software; you can redistribute it and/or modify it 657dacad5SJay Sternberg * under the terms and conditions of the GNU General Public License, 757dacad5SJay Sternberg * version 2, as published by the Free Software Foundation. 857dacad5SJay Sternberg * 957dacad5SJay Sternberg * This program is distributed in the hope it will be useful, but WITHOUT 1057dacad5SJay Sternberg * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 1157dacad5SJay Sternberg * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 1257dacad5SJay Sternberg * more details. 1357dacad5SJay Sternberg */ 1457dacad5SJay Sternberg 15a0a3408eSKeith Busch #include <linux/aer.h> 1657dacad5SJay Sternberg #include <linux/bitops.h> 1757dacad5SJay Sternberg #include <linux/blkdev.h> 1857dacad5SJay Sternberg #include <linux/blk-mq.h> 1957dacad5SJay Sternberg #include <linux/cpu.h> 2057dacad5SJay Sternberg #include <linux/delay.h> 2157dacad5SJay Sternberg #include <linux/errno.h> 2257dacad5SJay Sternberg #include <linux/fs.h> 2357dacad5SJay Sternberg #include <linux/genhd.h> 2457dacad5SJay Sternberg #include <linux/hdreg.h> 2557dacad5SJay Sternberg #include <linux/idr.h> 2657dacad5SJay Sternberg #include <linux/init.h> 2757dacad5SJay Sternberg #include <linux/interrupt.h> 2857dacad5SJay Sternberg #include <linux/io.h> 2957dacad5SJay Sternberg #include <linux/kdev_t.h> 3057dacad5SJay Sternberg #include <linux/kernel.h> 3157dacad5SJay Sternberg #include <linux/mm.h> 3257dacad5SJay Sternberg #include <linux/module.h> 3357dacad5SJay Sternberg #include <linux/moduleparam.h> 3477bf25eaSKeith Busch #include <linux/mutex.h> 3557dacad5SJay Sternberg #include <linux/pci.h> 3657dacad5SJay Sternberg #include <linux/poison.h> 3757dacad5SJay Sternberg #include <linux/ptrace.h> 3857dacad5SJay Sternberg #include <linux/sched.h> 3957dacad5SJay Sternberg #include <linux/slab.h> 4057dacad5SJay Sternberg #include <linux/t10-pi.h> 412d55cd5fSChristoph Hellwig #include <linux/timer.h> 4257dacad5SJay Sternberg #include <linux/types.h> 439cf5c095SLinus Torvalds #include <linux/io-64-nonatomic-lo-hi.h> 441d277a63SKeith Busch #include <asm/unaligned.h> 4557dacad5SJay Sternberg 4657dacad5SJay Sternberg #include "nvme.h" 4757dacad5SJay Sternberg 4857dacad5SJay Sternberg #define NVME_Q_DEPTH 1024 4957dacad5SJay Sternberg #define NVME_AQ_DEPTH 256 5057dacad5SJay Sternberg #define SQ_SIZE(depth) (depth * sizeof(struct nvme_command)) 5157dacad5SJay Sternberg #define CQ_SIZE(depth) (depth * sizeof(struct nvme_completion)) 5257dacad5SJay Sternberg 53adf68f21SChristoph Hellwig /* 54adf68f21SChristoph Hellwig * We handle AEN commands ourselves and don't even let the 55adf68f21SChristoph Hellwig * block layer know about them. 56adf68f21SChristoph Hellwig */ 57adf68f21SChristoph Hellwig #define NVME_NR_AEN_COMMANDS 1 58adf68f21SChristoph Hellwig #define NVME_AQ_BLKMQ_DEPTH (NVME_AQ_DEPTH - NVME_NR_AEN_COMMANDS) 59adf68f21SChristoph Hellwig 6057dacad5SJay Sternberg static int use_threaded_interrupts; 6157dacad5SJay Sternberg module_param(use_threaded_interrupts, int, 0); 6257dacad5SJay Sternberg 6357dacad5SJay Sternberg static bool use_cmb_sqes = true; 6457dacad5SJay Sternberg module_param(use_cmb_sqes, bool, 0644); 6557dacad5SJay Sternberg MODULE_PARM_DESC(use_cmb_sqes, "use controller's memory buffer for I/O SQes"); 6657dacad5SJay Sternberg 6757dacad5SJay Sternberg static struct workqueue_struct *nvme_workq; 6857dacad5SJay Sternberg 691c63dc66SChristoph Hellwig struct nvme_dev; 701c63dc66SChristoph Hellwig struct nvme_queue; 7157dacad5SJay Sternberg 7257dacad5SJay Sternberg static int nvme_reset(struct nvme_dev *dev); 73a0fa9647SJens Axboe static void nvme_process_cq(struct nvme_queue *nvmeq); 74a5cdb68cSKeith Busch static void nvme_dev_disable(struct nvme_dev *dev, bool shutdown); 7557dacad5SJay Sternberg 7657dacad5SJay Sternberg /* 771c63dc66SChristoph Hellwig * Represents an NVM Express device. Each nvme_dev is a PCI function. 781c63dc66SChristoph Hellwig */ 791c63dc66SChristoph Hellwig struct nvme_dev { 801c63dc66SChristoph Hellwig struct nvme_queue **queues; 811c63dc66SChristoph Hellwig struct blk_mq_tag_set tagset; 821c63dc66SChristoph Hellwig struct blk_mq_tag_set admin_tagset; 831c63dc66SChristoph Hellwig u32 __iomem *dbs; 841c63dc66SChristoph Hellwig struct device *dev; 851c63dc66SChristoph Hellwig struct dma_pool *prp_page_pool; 861c63dc66SChristoph Hellwig struct dma_pool *prp_small_pool; 871c63dc66SChristoph Hellwig unsigned queue_count; 881c63dc66SChristoph Hellwig unsigned online_queues; 891c63dc66SChristoph Hellwig unsigned max_qid; 901c63dc66SChristoph Hellwig int q_depth; 911c63dc66SChristoph Hellwig u32 db_stride; 921c63dc66SChristoph Hellwig struct msix_entry *entry; 931c63dc66SChristoph Hellwig void __iomem *bar; 941c63dc66SChristoph Hellwig struct work_struct reset_work; 951c63dc66SChristoph Hellwig struct work_struct scan_work; 965c8809e6SChristoph Hellwig struct work_struct remove_work; 979396dec9SChristoph Hellwig struct work_struct async_work; 982d55cd5fSChristoph Hellwig struct timer_list watchdog_timer; 9977bf25eaSKeith Busch struct mutex shutdown_lock; 1001c63dc66SChristoph Hellwig bool subsystem; 1011c63dc66SChristoph Hellwig void __iomem *cmb; 1021c63dc66SChristoph Hellwig dma_addr_t cmb_dma_addr; 1031c63dc66SChristoph Hellwig u64 cmb_size; 1041c63dc66SChristoph Hellwig u32 cmbsz; 105fd634f41SChristoph Hellwig unsigned long flags; 106db3cbfffSKeith Busch 107fd634f41SChristoph Hellwig #define NVME_CTRL_RESETTING 0 108646017a6SKeith Busch #define NVME_CTRL_REMOVING 1 1091c63dc66SChristoph Hellwig 1101c63dc66SChristoph Hellwig struct nvme_ctrl ctrl; 111db3cbfffSKeith Busch struct completion ioq_wait; 11257dacad5SJay Sternberg }; 11357dacad5SJay Sternberg 1141c63dc66SChristoph Hellwig static inline struct nvme_dev *to_nvme_dev(struct nvme_ctrl *ctrl) 1151c63dc66SChristoph Hellwig { 1161c63dc66SChristoph Hellwig return container_of(ctrl, struct nvme_dev, ctrl); 1171c63dc66SChristoph Hellwig } 1181c63dc66SChristoph Hellwig 11957dacad5SJay Sternberg /* 12057dacad5SJay Sternberg * An NVM Express queue. Each device has at least two (one for admin 12157dacad5SJay Sternberg * commands and one for I/O commands). 12257dacad5SJay Sternberg */ 12357dacad5SJay Sternberg struct nvme_queue { 12457dacad5SJay Sternberg struct device *q_dmadev; 12557dacad5SJay Sternberg struct nvme_dev *dev; 12657dacad5SJay Sternberg char irqname[24]; /* nvme4294967295-65535\0 */ 12757dacad5SJay Sternberg spinlock_t q_lock; 12857dacad5SJay Sternberg struct nvme_command *sq_cmds; 12957dacad5SJay Sternberg struct nvme_command __iomem *sq_cmds_io; 13057dacad5SJay Sternberg volatile struct nvme_completion *cqes; 13157dacad5SJay Sternberg struct blk_mq_tags **tags; 13257dacad5SJay Sternberg dma_addr_t sq_dma_addr; 13357dacad5SJay Sternberg dma_addr_t cq_dma_addr; 13457dacad5SJay Sternberg u32 __iomem *q_db; 13557dacad5SJay Sternberg u16 q_depth; 13657dacad5SJay Sternberg s16 cq_vector; 13757dacad5SJay Sternberg u16 sq_tail; 13857dacad5SJay Sternberg u16 cq_head; 13957dacad5SJay Sternberg u16 qid; 14057dacad5SJay Sternberg u8 cq_phase; 14157dacad5SJay Sternberg u8 cqe_seen; 14257dacad5SJay Sternberg }; 14357dacad5SJay Sternberg 14457dacad5SJay Sternberg /* 14571bd150cSChristoph Hellwig * The nvme_iod describes the data in an I/O, including the list of PRP 14671bd150cSChristoph Hellwig * entries. You can't see it in this data structure because C doesn't let 147f4800d6dSChristoph Hellwig * me express that. Use nvme_init_iod to ensure there's enough space 14871bd150cSChristoph Hellwig * allocated to store the PRP list. 14971bd150cSChristoph Hellwig */ 15071bd150cSChristoph Hellwig struct nvme_iod { 151f4800d6dSChristoph Hellwig struct nvme_queue *nvmeq; 152f4800d6dSChristoph Hellwig int aborted; 15371bd150cSChristoph Hellwig int npages; /* In the PRP list. 0 means small pool in use */ 15471bd150cSChristoph Hellwig int nents; /* Used in scatterlist */ 15571bd150cSChristoph Hellwig int length; /* Of data, in bytes */ 15671bd150cSChristoph Hellwig dma_addr_t first_dma; 157bf684057SChristoph Hellwig struct scatterlist meta_sg; /* metadata requires single contiguous buffer */ 158f4800d6dSChristoph Hellwig struct scatterlist *sg; 159f4800d6dSChristoph Hellwig struct scatterlist inline_sg[0]; 16057dacad5SJay Sternberg }; 16157dacad5SJay Sternberg 16257dacad5SJay Sternberg /* 16357dacad5SJay Sternberg * Check we didin't inadvertently grow the command struct 16457dacad5SJay Sternberg */ 16557dacad5SJay Sternberg static inline void _nvme_check_size(void) 16657dacad5SJay Sternberg { 16757dacad5SJay Sternberg BUILD_BUG_ON(sizeof(struct nvme_rw_command) != 64); 16857dacad5SJay Sternberg BUILD_BUG_ON(sizeof(struct nvme_create_cq) != 64); 16957dacad5SJay Sternberg BUILD_BUG_ON(sizeof(struct nvme_create_sq) != 64); 17057dacad5SJay Sternberg BUILD_BUG_ON(sizeof(struct nvme_delete_queue) != 64); 17157dacad5SJay Sternberg BUILD_BUG_ON(sizeof(struct nvme_features) != 64); 17257dacad5SJay Sternberg BUILD_BUG_ON(sizeof(struct nvme_format_cmd) != 64); 17357dacad5SJay Sternberg BUILD_BUG_ON(sizeof(struct nvme_abort_cmd) != 64); 17457dacad5SJay Sternberg BUILD_BUG_ON(sizeof(struct nvme_command) != 64); 17557dacad5SJay Sternberg BUILD_BUG_ON(sizeof(struct nvme_id_ctrl) != 4096); 17657dacad5SJay Sternberg BUILD_BUG_ON(sizeof(struct nvme_id_ns) != 4096); 17757dacad5SJay Sternberg BUILD_BUG_ON(sizeof(struct nvme_lba_range_type) != 64); 17857dacad5SJay Sternberg BUILD_BUG_ON(sizeof(struct nvme_smart_log) != 512); 17957dacad5SJay Sternberg } 18057dacad5SJay Sternberg 18157dacad5SJay Sternberg /* 18257dacad5SJay Sternberg * Max size of iod being embedded in the request payload 18357dacad5SJay Sternberg */ 18457dacad5SJay Sternberg #define NVME_INT_PAGES 2 1855fd4ce1bSChristoph Hellwig #define NVME_INT_BYTES(dev) (NVME_INT_PAGES * (dev)->ctrl.page_size) 18657dacad5SJay Sternberg 18757dacad5SJay Sternberg /* 18857dacad5SJay Sternberg * Will slightly overestimate the number of pages needed. This is OK 18957dacad5SJay Sternberg * as it only leads to a small amount of wasted memory for the lifetime of 19057dacad5SJay Sternberg * the I/O. 19157dacad5SJay Sternberg */ 19257dacad5SJay Sternberg static int nvme_npages(unsigned size, struct nvme_dev *dev) 19357dacad5SJay Sternberg { 1945fd4ce1bSChristoph Hellwig unsigned nprps = DIV_ROUND_UP(size + dev->ctrl.page_size, 1955fd4ce1bSChristoph Hellwig dev->ctrl.page_size); 19657dacad5SJay Sternberg return DIV_ROUND_UP(8 * nprps, PAGE_SIZE - 8); 19757dacad5SJay Sternberg } 19857dacad5SJay Sternberg 199f4800d6dSChristoph Hellwig static unsigned int nvme_iod_alloc_size(struct nvme_dev *dev, 200f4800d6dSChristoph Hellwig unsigned int size, unsigned int nseg) 201f4800d6dSChristoph Hellwig { 202f4800d6dSChristoph Hellwig return sizeof(__le64 *) * nvme_npages(size, dev) + 203f4800d6dSChristoph Hellwig sizeof(struct scatterlist) * nseg; 204f4800d6dSChristoph Hellwig } 205f4800d6dSChristoph Hellwig 20657dacad5SJay Sternberg static unsigned int nvme_cmd_size(struct nvme_dev *dev) 20757dacad5SJay Sternberg { 208f4800d6dSChristoph Hellwig return sizeof(struct nvme_iod) + 209f4800d6dSChristoph Hellwig nvme_iod_alloc_size(dev, NVME_INT_BYTES(dev), NVME_INT_PAGES); 21057dacad5SJay Sternberg } 21157dacad5SJay Sternberg 21257dacad5SJay Sternberg static int nvme_admin_init_hctx(struct blk_mq_hw_ctx *hctx, void *data, 21357dacad5SJay Sternberg unsigned int hctx_idx) 21457dacad5SJay Sternberg { 21557dacad5SJay Sternberg struct nvme_dev *dev = data; 21657dacad5SJay Sternberg struct nvme_queue *nvmeq = dev->queues[0]; 21757dacad5SJay Sternberg 21857dacad5SJay Sternberg WARN_ON(hctx_idx != 0); 21957dacad5SJay Sternberg WARN_ON(dev->admin_tagset.tags[0] != hctx->tags); 22057dacad5SJay Sternberg WARN_ON(nvmeq->tags); 22157dacad5SJay Sternberg 22257dacad5SJay Sternberg hctx->driver_data = nvmeq; 22357dacad5SJay Sternberg nvmeq->tags = &dev->admin_tagset.tags[0]; 22457dacad5SJay Sternberg return 0; 22557dacad5SJay Sternberg } 22657dacad5SJay Sternberg 22757dacad5SJay Sternberg static void nvme_admin_exit_hctx(struct blk_mq_hw_ctx *hctx, unsigned int hctx_idx) 22857dacad5SJay Sternberg { 22957dacad5SJay Sternberg struct nvme_queue *nvmeq = hctx->driver_data; 23057dacad5SJay Sternberg 23157dacad5SJay Sternberg nvmeq->tags = NULL; 23257dacad5SJay Sternberg } 23357dacad5SJay Sternberg 23457dacad5SJay Sternberg static int nvme_admin_init_request(void *data, struct request *req, 23557dacad5SJay Sternberg unsigned int hctx_idx, unsigned int rq_idx, 23657dacad5SJay Sternberg unsigned int numa_node) 23757dacad5SJay Sternberg { 23857dacad5SJay Sternberg struct nvme_dev *dev = data; 239f4800d6dSChristoph Hellwig struct nvme_iod *iod = blk_mq_rq_to_pdu(req); 24057dacad5SJay Sternberg struct nvme_queue *nvmeq = dev->queues[0]; 24157dacad5SJay Sternberg 24257dacad5SJay Sternberg BUG_ON(!nvmeq); 243f4800d6dSChristoph Hellwig iod->nvmeq = nvmeq; 24457dacad5SJay Sternberg return 0; 24557dacad5SJay Sternberg } 24657dacad5SJay Sternberg 24757dacad5SJay Sternberg static int nvme_init_hctx(struct blk_mq_hw_ctx *hctx, void *data, 24857dacad5SJay Sternberg unsigned int hctx_idx) 24957dacad5SJay Sternberg { 25057dacad5SJay Sternberg struct nvme_dev *dev = data; 25157dacad5SJay Sternberg struct nvme_queue *nvmeq = dev->queues[hctx_idx + 1]; 25257dacad5SJay Sternberg 25357dacad5SJay Sternberg if (!nvmeq->tags) 25457dacad5SJay Sternberg nvmeq->tags = &dev->tagset.tags[hctx_idx]; 25557dacad5SJay Sternberg 25657dacad5SJay Sternberg WARN_ON(dev->tagset.tags[hctx_idx] != hctx->tags); 25757dacad5SJay Sternberg hctx->driver_data = nvmeq; 25857dacad5SJay Sternberg return 0; 25957dacad5SJay Sternberg } 26057dacad5SJay Sternberg 26157dacad5SJay Sternberg static int nvme_init_request(void *data, struct request *req, 26257dacad5SJay Sternberg unsigned int hctx_idx, unsigned int rq_idx, 26357dacad5SJay Sternberg unsigned int numa_node) 26457dacad5SJay Sternberg { 26557dacad5SJay Sternberg struct nvme_dev *dev = data; 266f4800d6dSChristoph Hellwig struct nvme_iod *iod = blk_mq_rq_to_pdu(req); 26757dacad5SJay Sternberg struct nvme_queue *nvmeq = dev->queues[hctx_idx + 1]; 26857dacad5SJay Sternberg 26957dacad5SJay Sternberg BUG_ON(!nvmeq); 270f4800d6dSChristoph Hellwig iod->nvmeq = nvmeq; 27157dacad5SJay Sternberg return 0; 27257dacad5SJay Sternberg } 27357dacad5SJay Sternberg 274646017a6SKeith Busch static void nvme_queue_scan(struct nvme_dev *dev) 275646017a6SKeith Busch { 276646017a6SKeith Busch /* 277646017a6SKeith Busch * Do not queue new scan work when a controller is reset during 278646017a6SKeith Busch * removal. 279646017a6SKeith Busch */ 280646017a6SKeith Busch if (test_bit(NVME_CTRL_REMOVING, &dev->flags)) 281646017a6SKeith Busch return; 282646017a6SKeith Busch queue_work(nvme_workq, &dev->scan_work); 283646017a6SKeith Busch } 284646017a6SKeith Busch 285adf68f21SChristoph Hellwig static void nvme_complete_async_event(struct nvme_dev *dev, 28657dacad5SJay Sternberg struct nvme_completion *cqe) 28757dacad5SJay Sternberg { 288adf68f21SChristoph Hellwig u16 status = le16_to_cpu(cqe->status) >> 1; 289adf68f21SChristoph Hellwig u32 result = le32_to_cpu(cqe->result); 29057dacad5SJay Sternberg 2919396dec9SChristoph Hellwig if (status == NVME_SC_SUCCESS || status == NVME_SC_ABORT_REQ) { 292adf68f21SChristoph Hellwig ++dev->ctrl.event_limit; 2939396dec9SChristoph Hellwig queue_work(nvme_workq, &dev->async_work); 2949396dec9SChristoph Hellwig } 2959396dec9SChristoph Hellwig 29657dacad5SJay Sternberg if (status != NVME_SC_SUCCESS) 29757dacad5SJay Sternberg return; 29857dacad5SJay Sternberg 29957dacad5SJay Sternberg switch (result & 0xff07) { 30057dacad5SJay Sternberg case NVME_AER_NOTICE_NS_CHANGED: 3011b3c47c1SSagi Grimberg dev_info(dev->ctrl.device, "rescanning\n"); 302646017a6SKeith Busch nvme_queue_scan(dev); 30357dacad5SJay Sternberg default: 3041b3c47c1SSagi Grimberg dev_warn(dev->ctrl.device, "async event result %08x\n", result); 30557dacad5SJay Sternberg } 30657dacad5SJay Sternberg } 30757dacad5SJay Sternberg 30857dacad5SJay Sternberg /** 309adf68f21SChristoph Hellwig * __nvme_submit_cmd() - Copy a command into a queue and ring the doorbell 31057dacad5SJay Sternberg * @nvmeq: The queue to use 31157dacad5SJay Sternberg * @cmd: The command to send 31257dacad5SJay Sternberg * 31357dacad5SJay Sternberg * Safe to use from interrupt context 31457dacad5SJay Sternberg */ 31557dacad5SJay Sternberg static void __nvme_submit_cmd(struct nvme_queue *nvmeq, 31657dacad5SJay Sternberg struct nvme_command *cmd) 31757dacad5SJay Sternberg { 31857dacad5SJay Sternberg u16 tail = nvmeq->sq_tail; 31957dacad5SJay Sternberg 32057dacad5SJay Sternberg if (nvmeq->sq_cmds_io) 32157dacad5SJay Sternberg memcpy_toio(&nvmeq->sq_cmds_io[tail], cmd, sizeof(*cmd)); 32257dacad5SJay Sternberg else 32357dacad5SJay Sternberg memcpy(&nvmeq->sq_cmds[tail], cmd, sizeof(*cmd)); 32457dacad5SJay Sternberg 32557dacad5SJay Sternberg if (++tail == nvmeq->q_depth) 32657dacad5SJay Sternberg tail = 0; 32757dacad5SJay Sternberg writel(tail, nvmeq->q_db); 32857dacad5SJay Sternberg nvmeq->sq_tail = tail; 32957dacad5SJay Sternberg } 33057dacad5SJay Sternberg 331f4800d6dSChristoph Hellwig static __le64 **iod_list(struct request *req) 33257dacad5SJay Sternberg { 333f4800d6dSChristoph Hellwig struct nvme_iod *iod = blk_mq_rq_to_pdu(req); 334f4800d6dSChristoph Hellwig return (__le64 **)(iod->sg + req->nr_phys_segments); 33557dacad5SJay Sternberg } 33657dacad5SJay Sternberg 337f4800d6dSChristoph Hellwig static int nvme_init_iod(struct request *rq, struct nvme_dev *dev) 33857dacad5SJay Sternberg { 339f4800d6dSChristoph Hellwig struct nvme_iod *iod = blk_mq_rq_to_pdu(rq); 340f4800d6dSChristoph Hellwig int nseg = rq->nr_phys_segments; 341f4800d6dSChristoph Hellwig unsigned size; 342f4800d6dSChristoph Hellwig 343f4800d6dSChristoph Hellwig if (rq->cmd_flags & REQ_DISCARD) 344f4800d6dSChristoph Hellwig size = sizeof(struct nvme_dsm_range); 345f4800d6dSChristoph Hellwig else 346f4800d6dSChristoph Hellwig size = blk_rq_bytes(rq); 347f4800d6dSChristoph Hellwig 348f4800d6dSChristoph Hellwig if (nseg > NVME_INT_PAGES || size > NVME_INT_BYTES(dev)) { 349f4800d6dSChristoph Hellwig iod->sg = kmalloc(nvme_iod_alloc_size(dev, size, nseg), GFP_ATOMIC); 350f4800d6dSChristoph Hellwig if (!iod->sg) 351f4800d6dSChristoph Hellwig return BLK_MQ_RQ_QUEUE_BUSY; 352f4800d6dSChristoph Hellwig } else { 353f4800d6dSChristoph Hellwig iod->sg = iod->inline_sg; 35457dacad5SJay Sternberg } 35557dacad5SJay Sternberg 356f4800d6dSChristoph Hellwig iod->aborted = 0; 35757dacad5SJay Sternberg iod->npages = -1; 35857dacad5SJay Sternberg iod->nents = 0; 359f4800d6dSChristoph Hellwig iod->length = size; 360f4800d6dSChristoph Hellwig return 0; 36157dacad5SJay Sternberg } 36257dacad5SJay Sternberg 363f4800d6dSChristoph Hellwig static void nvme_free_iod(struct nvme_dev *dev, struct request *req) 36457dacad5SJay Sternberg { 365f4800d6dSChristoph Hellwig struct nvme_iod *iod = blk_mq_rq_to_pdu(req); 3665fd4ce1bSChristoph Hellwig const int last_prp = dev->ctrl.page_size / 8 - 1; 36757dacad5SJay Sternberg int i; 368f4800d6dSChristoph Hellwig __le64 **list = iod_list(req); 36957dacad5SJay Sternberg dma_addr_t prp_dma = iod->first_dma; 37057dacad5SJay Sternberg 37157dacad5SJay Sternberg if (iod->npages == 0) 37257dacad5SJay Sternberg dma_pool_free(dev->prp_small_pool, list[0], prp_dma); 37357dacad5SJay Sternberg for (i = 0; i < iod->npages; i++) { 37457dacad5SJay Sternberg __le64 *prp_list = list[i]; 37557dacad5SJay Sternberg dma_addr_t next_prp_dma = le64_to_cpu(prp_list[last_prp]); 37657dacad5SJay Sternberg dma_pool_free(dev->prp_page_pool, prp_list, prp_dma); 37757dacad5SJay Sternberg prp_dma = next_prp_dma; 37857dacad5SJay Sternberg } 37957dacad5SJay Sternberg 380f4800d6dSChristoph Hellwig if (iod->sg != iod->inline_sg) 381f4800d6dSChristoph Hellwig kfree(iod->sg); 38257dacad5SJay Sternberg } 38357dacad5SJay Sternberg 38457dacad5SJay Sternberg #ifdef CONFIG_BLK_DEV_INTEGRITY 38557dacad5SJay Sternberg static void nvme_dif_prep(u32 p, u32 v, struct t10_pi_tuple *pi) 38657dacad5SJay Sternberg { 38757dacad5SJay Sternberg if (be32_to_cpu(pi->ref_tag) == v) 38857dacad5SJay Sternberg pi->ref_tag = cpu_to_be32(p); 38957dacad5SJay Sternberg } 39057dacad5SJay Sternberg 39157dacad5SJay Sternberg static void nvme_dif_complete(u32 p, u32 v, struct t10_pi_tuple *pi) 39257dacad5SJay Sternberg { 39357dacad5SJay Sternberg if (be32_to_cpu(pi->ref_tag) == p) 39457dacad5SJay Sternberg pi->ref_tag = cpu_to_be32(v); 39557dacad5SJay Sternberg } 39657dacad5SJay Sternberg 39757dacad5SJay Sternberg /** 39857dacad5SJay Sternberg * nvme_dif_remap - remaps ref tags to bip seed and physical lba 39957dacad5SJay Sternberg * 40057dacad5SJay Sternberg * The virtual start sector is the one that was originally submitted by the 40157dacad5SJay Sternberg * block layer. Due to partitioning, MD/DM cloning, etc. the actual physical 40257dacad5SJay Sternberg * start sector may be different. Remap protection information to match the 40357dacad5SJay Sternberg * physical LBA on writes, and back to the original seed on reads. 40457dacad5SJay Sternberg * 40557dacad5SJay Sternberg * Type 0 and 3 do not have a ref tag, so no remapping required. 40657dacad5SJay Sternberg */ 40757dacad5SJay Sternberg static void nvme_dif_remap(struct request *req, 40857dacad5SJay Sternberg void (*dif_swap)(u32 p, u32 v, struct t10_pi_tuple *pi)) 40957dacad5SJay Sternberg { 41057dacad5SJay Sternberg struct nvme_ns *ns = req->rq_disk->private_data; 41157dacad5SJay Sternberg struct bio_integrity_payload *bip; 41257dacad5SJay Sternberg struct t10_pi_tuple *pi; 41357dacad5SJay Sternberg void *p, *pmap; 41457dacad5SJay Sternberg u32 i, nlb, ts, phys, virt; 41557dacad5SJay Sternberg 41657dacad5SJay Sternberg if (!ns->pi_type || ns->pi_type == NVME_NS_DPS_PI_TYPE3) 41757dacad5SJay Sternberg return; 41857dacad5SJay Sternberg 41957dacad5SJay Sternberg bip = bio_integrity(req->bio); 42057dacad5SJay Sternberg if (!bip) 42157dacad5SJay Sternberg return; 42257dacad5SJay Sternberg 42357dacad5SJay Sternberg pmap = kmap_atomic(bip->bip_vec->bv_page) + bip->bip_vec->bv_offset; 42457dacad5SJay Sternberg 42557dacad5SJay Sternberg p = pmap; 42657dacad5SJay Sternberg virt = bip_get_seed(bip); 42757dacad5SJay Sternberg phys = nvme_block_nr(ns, blk_rq_pos(req)); 42857dacad5SJay Sternberg nlb = (blk_rq_bytes(req) >> ns->lba_shift); 429ac6fc48cSDan Williams ts = ns->disk->queue->integrity.tuple_size; 43057dacad5SJay Sternberg 43157dacad5SJay Sternberg for (i = 0; i < nlb; i++, virt++, phys++) { 43257dacad5SJay Sternberg pi = (struct t10_pi_tuple *)p; 43357dacad5SJay Sternberg dif_swap(phys, virt, pi); 43457dacad5SJay Sternberg p += ts; 43557dacad5SJay Sternberg } 43657dacad5SJay Sternberg kunmap_atomic(pmap); 43757dacad5SJay Sternberg } 43857dacad5SJay Sternberg #else /* CONFIG_BLK_DEV_INTEGRITY */ 43957dacad5SJay Sternberg static void nvme_dif_remap(struct request *req, 44057dacad5SJay Sternberg void (*dif_swap)(u32 p, u32 v, struct t10_pi_tuple *pi)) 44157dacad5SJay Sternberg { 44257dacad5SJay Sternberg } 44357dacad5SJay Sternberg static void nvme_dif_prep(u32 p, u32 v, struct t10_pi_tuple *pi) 44457dacad5SJay Sternberg { 44557dacad5SJay Sternberg } 44657dacad5SJay Sternberg static void nvme_dif_complete(u32 p, u32 v, struct t10_pi_tuple *pi) 44757dacad5SJay Sternberg { 44857dacad5SJay Sternberg } 44957dacad5SJay Sternberg #endif 45057dacad5SJay Sternberg 451f4800d6dSChristoph Hellwig static bool nvme_setup_prps(struct nvme_dev *dev, struct request *req, 45269d2b571SChristoph Hellwig int total_len) 45357dacad5SJay Sternberg { 454f4800d6dSChristoph Hellwig struct nvme_iod *iod = blk_mq_rq_to_pdu(req); 45557dacad5SJay Sternberg struct dma_pool *pool; 45657dacad5SJay Sternberg int length = total_len; 45757dacad5SJay Sternberg struct scatterlist *sg = iod->sg; 45857dacad5SJay Sternberg int dma_len = sg_dma_len(sg); 45957dacad5SJay Sternberg u64 dma_addr = sg_dma_address(sg); 4605fd4ce1bSChristoph Hellwig u32 page_size = dev->ctrl.page_size; 46157dacad5SJay Sternberg int offset = dma_addr & (page_size - 1); 46257dacad5SJay Sternberg __le64 *prp_list; 463f4800d6dSChristoph Hellwig __le64 **list = iod_list(req); 46457dacad5SJay Sternberg dma_addr_t prp_dma; 46557dacad5SJay Sternberg int nprps, i; 46657dacad5SJay Sternberg 46757dacad5SJay Sternberg length -= (page_size - offset); 46857dacad5SJay Sternberg if (length <= 0) 46969d2b571SChristoph Hellwig return true; 47057dacad5SJay Sternberg 47157dacad5SJay Sternberg dma_len -= (page_size - offset); 47257dacad5SJay Sternberg if (dma_len) { 47357dacad5SJay Sternberg dma_addr += (page_size - offset); 47457dacad5SJay Sternberg } else { 47557dacad5SJay Sternberg sg = sg_next(sg); 47657dacad5SJay Sternberg dma_addr = sg_dma_address(sg); 47757dacad5SJay Sternberg dma_len = sg_dma_len(sg); 47857dacad5SJay Sternberg } 47957dacad5SJay Sternberg 48057dacad5SJay Sternberg if (length <= page_size) { 48157dacad5SJay Sternberg iod->first_dma = dma_addr; 48269d2b571SChristoph Hellwig return true; 48357dacad5SJay Sternberg } 48457dacad5SJay Sternberg 48557dacad5SJay Sternberg nprps = DIV_ROUND_UP(length, page_size); 48657dacad5SJay Sternberg if (nprps <= (256 / 8)) { 48757dacad5SJay Sternberg pool = dev->prp_small_pool; 48857dacad5SJay Sternberg iod->npages = 0; 48957dacad5SJay Sternberg } else { 49057dacad5SJay Sternberg pool = dev->prp_page_pool; 49157dacad5SJay Sternberg iod->npages = 1; 49257dacad5SJay Sternberg } 49357dacad5SJay Sternberg 49469d2b571SChristoph Hellwig prp_list = dma_pool_alloc(pool, GFP_ATOMIC, &prp_dma); 49557dacad5SJay Sternberg if (!prp_list) { 49657dacad5SJay Sternberg iod->first_dma = dma_addr; 49757dacad5SJay Sternberg iod->npages = -1; 49869d2b571SChristoph Hellwig return false; 49957dacad5SJay Sternberg } 50057dacad5SJay Sternberg list[0] = prp_list; 50157dacad5SJay Sternberg iod->first_dma = prp_dma; 50257dacad5SJay Sternberg i = 0; 50357dacad5SJay Sternberg for (;;) { 50457dacad5SJay Sternberg if (i == page_size >> 3) { 50557dacad5SJay Sternberg __le64 *old_prp_list = prp_list; 50669d2b571SChristoph Hellwig prp_list = dma_pool_alloc(pool, GFP_ATOMIC, &prp_dma); 50757dacad5SJay Sternberg if (!prp_list) 50869d2b571SChristoph Hellwig return false; 50957dacad5SJay Sternberg list[iod->npages++] = prp_list; 51057dacad5SJay Sternberg prp_list[0] = old_prp_list[i - 1]; 51157dacad5SJay Sternberg old_prp_list[i - 1] = cpu_to_le64(prp_dma); 51257dacad5SJay Sternberg i = 1; 51357dacad5SJay Sternberg } 51457dacad5SJay Sternberg prp_list[i++] = cpu_to_le64(dma_addr); 51557dacad5SJay Sternberg dma_len -= page_size; 51657dacad5SJay Sternberg dma_addr += page_size; 51757dacad5SJay Sternberg length -= page_size; 51857dacad5SJay Sternberg if (length <= 0) 51957dacad5SJay Sternberg break; 52057dacad5SJay Sternberg if (dma_len > 0) 52157dacad5SJay Sternberg continue; 52257dacad5SJay Sternberg BUG_ON(dma_len < 0); 52357dacad5SJay Sternberg sg = sg_next(sg); 52457dacad5SJay Sternberg dma_addr = sg_dma_address(sg); 52557dacad5SJay Sternberg dma_len = sg_dma_len(sg); 52657dacad5SJay Sternberg } 52757dacad5SJay Sternberg 52869d2b571SChristoph Hellwig return true; 52957dacad5SJay Sternberg } 53057dacad5SJay Sternberg 531f4800d6dSChristoph Hellwig static int nvme_map_data(struct nvme_dev *dev, struct request *req, 532ba1ca37eSChristoph Hellwig struct nvme_command *cmnd) 53357dacad5SJay Sternberg { 534f4800d6dSChristoph Hellwig struct nvme_iod *iod = blk_mq_rq_to_pdu(req); 535ba1ca37eSChristoph Hellwig struct request_queue *q = req->q; 536ba1ca37eSChristoph Hellwig enum dma_data_direction dma_dir = rq_data_dir(req) ? 537ba1ca37eSChristoph Hellwig DMA_TO_DEVICE : DMA_FROM_DEVICE; 538ba1ca37eSChristoph Hellwig int ret = BLK_MQ_RQ_QUEUE_ERROR; 53957dacad5SJay Sternberg 540ba1ca37eSChristoph Hellwig sg_init_table(iod->sg, req->nr_phys_segments); 541ba1ca37eSChristoph Hellwig iod->nents = blk_rq_map_sg(q, req, iod->sg); 542ba1ca37eSChristoph Hellwig if (!iod->nents) 543ba1ca37eSChristoph Hellwig goto out; 544ba1ca37eSChristoph Hellwig 545ba1ca37eSChristoph Hellwig ret = BLK_MQ_RQ_QUEUE_BUSY; 546ba1ca37eSChristoph Hellwig if (!dma_map_sg(dev->dev, iod->sg, iod->nents, dma_dir)) 547ba1ca37eSChristoph Hellwig goto out; 548ba1ca37eSChristoph Hellwig 549f4800d6dSChristoph Hellwig if (!nvme_setup_prps(dev, req, blk_rq_bytes(req))) 550ba1ca37eSChristoph Hellwig goto out_unmap; 551ba1ca37eSChristoph Hellwig 552ba1ca37eSChristoph Hellwig ret = BLK_MQ_RQ_QUEUE_ERROR; 553ba1ca37eSChristoph Hellwig if (blk_integrity_rq(req)) { 554ba1ca37eSChristoph Hellwig if (blk_rq_count_integrity_sg(q, req->bio) != 1) 555ba1ca37eSChristoph Hellwig goto out_unmap; 556ba1ca37eSChristoph Hellwig 557bf684057SChristoph Hellwig sg_init_table(&iod->meta_sg, 1); 558bf684057SChristoph Hellwig if (blk_rq_map_integrity_sg(q, req->bio, &iod->meta_sg) != 1) 559ba1ca37eSChristoph Hellwig goto out_unmap; 560ba1ca37eSChristoph Hellwig 561ba1ca37eSChristoph Hellwig if (rq_data_dir(req)) 562ba1ca37eSChristoph Hellwig nvme_dif_remap(req, nvme_dif_prep); 563ba1ca37eSChristoph Hellwig 564bf684057SChristoph Hellwig if (!dma_map_sg(dev->dev, &iod->meta_sg, 1, dma_dir)) 565ba1ca37eSChristoph Hellwig goto out_unmap; 56657dacad5SJay Sternberg } 56757dacad5SJay Sternberg 568ba1ca37eSChristoph Hellwig cmnd->rw.prp1 = cpu_to_le64(sg_dma_address(iod->sg)); 569ba1ca37eSChristoph Hellwig cmnd->rw.prp2 = cpu_to_le64(iod->first_dma); 570ba1ca37eSChristoph Hellwig if (blk_integrity_rq(req)) 571bf684057SChristoph Hellwig cmnd->rw.metadata = cpu_to_le64(sg_dma_address(&iod->meta_sg)); 572ba1ca37eSChristoph Hellwig return BLK_MQ_RQ_QUEUE_OK; 573ba1ca37eSChristoph Hellwig 574ba1ca37eSChristoph Hellwig out_unmap: 575ba1ca37eSChristoph Hellwig dma_unmap_sg(dev->dev, iod->sg, iod->nents, dma_dir); 576ba1ca37eSChristoph Hellwig out: 577ba1ca37eSChristoph Hellwig return ret; 57857dacad5SJay Sternberg } 57957dacad5SJay Sternberg 580f4800d6dSChristoph Hellwig static void nvme_unmap_data(struct nvme_dev *dev, struct request *req) 581d4f6c3abSChristoph Hellwig { 582f4800d6dSChristoph Hellwig struct nvme_iod *iod = blk_mq_rq_to_pdu(req); 583d4f6c3abSChristoph Hellwig enum dma_data_direction dma_dir = rq_data_dir(req) ? 584d4f6c3abSChristoph Hellwig DMA_TO_DEVICE : DMA_FROM_DEVICE; 585d4f6c3abSChristoph Hellwig 586d4f6c3abSChristoph Hellwig if (iod->nents) { 587d4f6c3abSChristoph Hellwig dma_unmap_sg(dev->dev, iod->sg, iod->nents, dma_dir); 588d4f6c3abSChristoph Hellwig if (blk_integrity_rq(req)) { 589d4f6c3abSChristoph Hellwig if (!rq_data_dir(req)) 590d4f6c3abSChristoph Hellwig nvme_dif_remap(req, nvme_dif_complete); 591bf684057SChristoph Hellwig dma_unmap_sg(dev->dev, &iod->meta_sg, 1, dma_dir); 592d4f6c3abSChristoph Hellwig } 593d4f6c3abSChristoph Hellwig } 594d4f6c3abSChristoph Hellwig 595f4800d6dSChristoph Hellwig nvme_free_iod(dev, req); 59657dacad5SJay Sternberg } 59757dacad5SJay Sternberg 59857dacad5SJay Sternberg /* 59957dacad5SJay Sternberg * We reuse the small pool to allocate the 16-byte range here as it is not 60057dacad5SJay Sternberg * worth having a special pool for these or additional cases to handle freeing 60157dacad5SJay Sternberg * the iod. 60257dacad5SJay Sternberg */ 603ba1ca37eSChristoph Hellwig static int nvme_setup_discard(struct nvme_queue *nvmeq, struct nvme_ns *ns, 604f4800d6dSChristoph Hellwig struct request *req, struct nvme_command *cmnd) 60557dacad5SJay Sternberg { 606f4800d6dSChristoph Hellwig struct nvme_iod *iod = blk_mq_rq_to_pdu(req); 607ba1ca37eSChristoph Hellwig struct nvme_dsm_range *range; 608ba1ca37eSChristoph Hellwig 609ba1ca37eSChristoph Hellwig range = dma_pool_alloc(nvmeq->dev->prp_small_pool, GFP_ATOMIC, 610ba1ca37eSChristoph Hellwig &iod->first_dma); 611ba1ca37eSChristoph Hellwig if (!range) 612ba1ca37eSChristoph Hellwig return BLK_MQ_RQ_QUEUE_BUSY; 613f4800d6dSChristoph Hellwig iod_list(req)[0] = (__le64 *)range; 614ba1ca37eSChristoph Hellwig iod->npages = 0; 61557dacad5SJay Sternberg 61657dacad5SJay Sternberg range->cattr = cpu_to_le32(0); 61757dacad5SJay Sternberg range->nlb = cpu_to_le32(blk_rq_bytes(req) >> ns->lba_shift); 61857dacad5SJay Sternberg range->slba = cpu_to_le64(nvme_block_nr(ns, blk_rq_pos(req))); 61957dacad5SJay Sternberg 620ba1ca37eSChristoph Hellwig memset(cmnd, 0, sizeof(*cmnd)); 621ba1ca37eSChristoph Hellwig cmnd->dsm.opcode = nvme_cmd_dsm; 622ba1ca37eSChristoph Hellwig cmnd->dsm.nsid = cpu_to_le32(ns->ns_id); 623ba1ca37eSChristoph Hellwig cmnd->dsm.prp1 = cpu_to_le64(iod->first_dma); 624ba1ca37eSChristoph Hellwig cmnd->dsm.nr = 0; 625ba1ca37eSChristoph Hellwig cmnd->dsm.attributes = cpu_to_le32(NVME_DSMGMT_AD); 626ba1ca37eSChristoph Hellwig return BLK_MQ_RQ_QUEUE_OK; 62757dacad5SJay Sternberg } 62857dacad5SJay Sternberg 62957dacad5SJay Sternberg /* 63057dacad5SJay Sternberg * NOTE: ns is NULL when called on the admin queue. 63157dacad5SJay Sternberg */ 63257dacad5SJay Sternberg static int nvme_queue_rq(struct blk_mq_hw_ctx *hctx, 63357dacad5SJay Sternberg const struct blk_mq_queue_data *bd) 63457dacad5SJay Sternberg { 63557dacad5SJay Sternberg struct nvme_ns *ns = hctx->queue->queuedata; 63657dacad5SJay Sternberg struct nvme_queue *nvmeq = hctx->driver_data; 63757dacad5SJay Sternberg struct nvme_dev *dev = nvmeq->dev; 63857dacad5SJay Sternberg struct request *req = bd->rq; 639ba1ca37eSChristoph Hellwig struct nvme_command cmnd; 640ba1ca37eSChristoph Hellwig int ret = BLK_MQ_RQ_QUEUE_OK; 64157dacad5SJay Sternberg 64257dacad5SJay Sternberg /* 64357dacad5SJay Sternberg * If formated with metadata, require the block layer provide a buffer 64457dacad5SJay Sternberg * unless this namespace is formated such that the metadata can be 64557dacad5SJay Sternberg * stripped/generated by the controller with PRACT=1. 64657dacad5SJay Sternberg */ 64757dacad5SJay Sternberg if (ns && ns->ms && !blk_integrity_rq(req)) { 64857dacad5SJay Sternberg if (!(ns->pi_type && ns->ms == 8) && 64957dacad5SJay Sternberg req->cmd_type != REQ_TYPE_DRV_PRIV) { 650eee417b0SChristoph Hellwig blk_mq_end_request(req, -EFAULT); 65157dacad5SJay Sternberg return BLK_MQ_RQ_QUEUE_OK; 65257dacad5SJay Sternberg } 65357dacad5SJay Sternberg } 65457dacad5SJay Sternberg 655f4800d6dSChristoph Hellwig ret = nvme_init_iod(req, dev); 656f4800d6dSChristoph Hellwig if (ret) 657f4800d6dSChristoph Hellwig return ret; 65857dacad5SJay Sternberg 65957dacad5SJay Sternberg if (req->cmd_flags & REQ_DISCARD) { 660f4800d6dSChristoph Hellwig ret = nvme_setup_discard(nvmeq, ns, req, &cmnd); 661ba1ca37eSChristoph Hellwig } else { 66257dacad5SJay Sternberg if (req->cmd_type == REQ_TYPE_DRV_PRIV) 663ba1ca37eSChristoph Hellwig memcpy(&cmnd, req->cmd, sizeof(cmnd)); 66457dacad5SJay Sternberg else if (req->cmd_flags & REQ_FLUSH) 665ba1ca37eSChristoph Hellwig nvme_setup_flush(ns, &cmnd); 66657dacad5SJay Sternberg else 667ba1ca37eSChristoph Hellwig nvme_setup_rw(ns, req, &cmnd); 66857dacad5SJay Sternberg 669ba1ca37eSChristoph Hellwig if (req->nr_phys_segments) 670f4800d6dSChristoph Hellwig ret = nvme_map_data(dev, req, &cmnd); 671ba1ca37eSChristoph Hellwig } 672ba1ca37eSChristoph Hellwig 673ba1ca37eSChristoph Hellwig if (ret) 674ba1ca37eSChristoph Hellwig goto out; 675ba1ca37eSChristoph Hellwig 676ba1ca37eSChristoph Hellwig cmnd.common.command_id = req->tag; 677aae239e1SChristoph Hellwig blk_mq_start_request(req); 678ba1ca37eSChristoph Hellwig 679ba1ca37eSChristoph Hellwig spin_lock_irq(&nvmeq->q_lock); 680ae1fba20SKeith Busch if (unlikely(nvmeq->cq_vector < 0)) { 68169d9a99cSKeith Busch if (ns && !test_bit(NVME_NS_DEAD, &ns->flags)) 682ae1fba20SKeith Busch ret = BLK_MQ_RQ_QUEUE_BUSY; 68369d9a99cSKeith Busch else 68469d9a99cSKeith Busch ret = BLK_MQ_RQ_QUEUE_ERROR; 685ae1fba20SKeith Busch spin_unlock_irq(&nvmeq->q_lock); 686ae1fba20SKeith Busch goto out; 687ae1fba20SKeith Busch } 688ba1ca37eSChristoph Hellwig __nvme_submit_cmd(nvmeq, &cmnd); 68957dacad5SJay Sternberg nvme_process_cq(nvmeq); 69057dacad5SJay Sternberg spin_unlock_irq(&nvmeq->q_lock); 69157dacad5SJay Sternberg return BLK_MQ_RQ_QUEUE_OK; 692ba1ca37eSChristoph Hellwig out: 693f4800d6dSChristoph Hellwig nvme_free_iod(dev, req); 694ba1ca37eSChristoph Hellwig return ret; 69557dacad5SJay Sternberg } 69657dacad5SJay Sternberg 697eee417b0SChristoph Hellwig static void nvme_complete_rq(struct request *req) 698eee417b0SChristoph Hellwig { 699f4800d6dSChristoph Hellwig struct nvme_iod *iod = blk_mq_rq_to_pdu(req); 700f4800d6dSChristoph Hellwig struct nvme_dev *dev = iod->nvmeq->dev; 701eee417b0SChristoph Hellwig int error = 0; 702eee417b0SChristoph Hellwig 703f4800d6dSChristoph Hellwig nvme_unmap_data(dev, req); 704eee417b0SChristoph Hellwig 705eee417b0SChristoph Hellwig if (unlikely(req->errors)) { 706eee417b0SChristoph Hellwig if (nvme_req_needs_retry(req, req->errors)) { 707eee417b0SChristoph Hellwig nvme_requeue_req(req); 708eee417b0SChristoph Hellwig return; 709eee417b0SChristoph Hellwig } 710eee417b0SChristoph Hellwig 711eee417b0SChristoph Hellwig if (req->cmd_type == REQ_TYPE_DRV_PRIV) 712eee417b0SChristoph Hellwig error = req->errors; 713eee417b0SChristoph Hellwig else 714eee417b0SChristoph Hellwig error = nvme_error_status(req->errors); 715eee417b0SChristoph Hellwig } 716eee417b0SChristoph Hellwig 717f4800d6dSChristoph Hellwig if (unlikely(iod->aborted)) { 7181b3c47c1SSagi Grimberg dev_warn(dev->ctrl.device, 719eee417b0SChristoph Hellwig "completing aborted command with status: %04x\n", 720eee417b0SChristoph Hellwig req->errors); 721eee417b0SChristoph Hellwig } 722eee417b0SChristoph Hellwig 723eee417b0SChristoph Hellwig blk_mq_end_request(req, error); 72457dacad5SJay Sternberg } 72557dacad5SJay Sternberg 726d783e0bdSMarta Rybczynska /* We read the CQE phase first to check if the rest of the entry is valid */ 727d783e0bdSMarta Rybczynska static inline bool nvme_cqe_valid(struct nvme_queue *nvmeq, u16 head, 728d783e0bdSMarta Rybczynska u16 phase) 729d783e0bdSMarta Rybczynska { 730d783e0bdSMarta Rybczynska return (le16_to_cpu(nvmeq->cqes[head].status) & 1) == phase; 731d783e0bdSMarta Rybczynska } 732d783e0bdSMarta Rybczynska 733a0fa9647SJens Axboe static void __nvme_process_cq(struct nvme_queue *nvmeq, unsigned int *tag) 73457dacad5SJay Sternberg { 73557dacad5SJay Sternberg u16 head, phase; 73657dacad5SJay Sternberg 73757dacad5SJay Sternberg head = nvmeq->cq_head; 73857dacad5SJay Sternberg phase = nvmeq->cq_phase; 73957dacad5SJay Sternberg 740d783e0bdSMarta Rybczynska while (nvme_cqe_valid(nvmeq, head, phase)) { 74157dacad5SJay Sternberg struct nvme_completion cqe = nvmeq->cqes[head]; 742eee417b0SChristoph Hellwig struct request *req; 743adf68f21SChristoph Hellwig 74457dacad5SJay Sternberg if (++head == nvmeq->q_depth) { 74557dacad5SJay Sternberg head = 0; 74657dacad5SJay Sternberg phase = !phase; 74757dacad5SJay Sternberg } 748adf68f21SChristoph Hellwig 749a0fa9647SJens Axboe if (tag && *tag == cqe.command_id) 750a0fa9647SJens Axboe *tag = -1; 751adf68f21SChristoph Hellwig 752aae239e1SChristoph Hellwig if (unlikely(cqe.command_id >= nvmeq->q_depth)) { 7531b3c47c1SSagi Grimberg dev_warn(nvmeq->dev->ctrl.device, 754aae239e1SChristoph Hellwig "invalid id %d completed on queue %d\n", 755aae239e1SChristoph Hellwig cqe.command_id, le16_to_cpu(cqe.sq_id)); 756aae239e1SChristoph Hellwig continue; 757aae239e1SChristoph Hellwig } 758aae239e1SChristoph Hellwig 759adf68f21SChristoph Hellwig /* 760adf68f21SChristoph Hellwig * AEN requests are special as they don't time out and can 761adf68f21SChristoph Hellwig * survive any kind of queue freeze and often don't respond to 762adf68f21SChristoph Hellwig * aborts. We don't even bother to allocate a struct request 763adf68f21SChristoph Hellwig * for them but rather special case them here. 764adf68f21SChristoph Hellwig */ 765adf68f21SChristoph Hellwig if (unlikely(nvmeq->qid == 0 && 766adf68f21SChristoph Hellwig cqe.command_id >= NVME_AQ_BLKMQ_DEPTH)) { 767adf68f21SChristoph Hellwig nvme_complete_async_event(nvmeq->dev, &cqe); 768adf68f21SChristoph Hellwig continue; 769adf68f21SChristoph Hellwig } 770adf68f21SChristoph Hellwig 771eee417b0SChristoph Hellwig req = blk_mq_tag_to_rq(*nvmeq->tags, cqe.command_id); 7721cb3cce5SChristoph Hellwig if (req->cmd_type == REQ_TYPE_DRV_PRIV && req->special) 7731cb3cce5SChristoph Hellwig memcpy(req->special, &cqe, sizeof(cqe)); 774d783e0bdSMarta Rybczynska blk_mq_complete_request(req, le16_to_cpu(cqe.status) >> 1); 775eee417b0SChristoph Hellwig 77657dacad5SJay Sternberg } 77757dacad5SJay Sternberg 77857dacad5SJay Sternberg /* If the controller ignores the cq head doorbell and continuously 77957dacad5SJay Sternberg * writes to the queue, it is theoretically possible to wrap around 78057dacad5SJay Sternberg * the queue twice and mistakenly return IRQ_NONE. Linux only 78157dacad5SJay Sternberg * requires that 0.1% of your interrupts are handled, so this isn't 78257dacad5SJay Sternberg * a big problem. 78357dacad5SJay Sternberg */ 78457dacad5SJay Sternberg if (head == nvmeq->cq_head && phase == nvmeq->cq_phase) 785a0fa9647SJens Axboe return; 78657dacad5SJay Sternberg 787604e8c8dSKeith Busch if (likely(nvmeq->cq_vector >= 0)) 78857dacad5SJay Sternberg writel(head, nvmeq->q_db + nvmeq->dev->db_stride); 78957dacad5SJay Sternberg nvmeq->cq_head = head; 79057dacad5SJay Sternberg nvmeq->cq_phase = phase; 79157dacad5SJay Sternberg 79257dacad5SJay Sternberg nvmeq->cqe_seen = 1; 793a0fa9647SJens Axboe } 794a0fa9647SJens Axboe 795a0fa9647SJens Axboe static void nvme_process_cq(struct nvme_queue *nvmeq) 796a0fa9647SJens Axboe { 797a0fa9647SJens Axboe __nvme_process_cq(nvmeq, NULL); 79857dacad5SJay Sternberg } 79957dacad5SJay Sternberg 80057dacad5SJay Sternberg static irqreturn_t nvme_irq(int irq, void *data) 80157dacad5SJay Sternberg { 80257dacad5SJay Sternberg irqreturn_t result; 80357dacad5SJay Sternberg struct nvme_queue *nvmeq = data; 80457dacad5SJay Sternberg spin_lock(&nvmeq->q_lock); 80557dacad5SJay Sternberg nvme_process_cq(nvmeq); 80657dacad5SJay Sternberg result = nvmeq->cqe_seen ? IRQ_HANDLED : IRQ_NONE; 80757dacad5SJay Sternberg nvmeq->cqe_seen = 0; 80857dacad5SJay Sternberg spin_unlock(&nvmeq->q_lock); 80957dacad5SJay Sternberg return result; 81057dacad5SJay Sternberg } 81157dacad5SJay Sternberg 81257dacad5SJay Sternberg static irqreturn_t nvme_irq_check(int irq, void *data) 81357dacad5SJay Sternberg { 81457dacad5SJay Sternberg struct nvme_queue *nvmeq = data; 815d783e0bdSMarta Rybczynska if (nvme_cqe_valid(nvmeq, nvmeq->cq_head, nvmeq->cq_phase)) 81657dacad5SJay Sternberg return IRQ_WAKE_THREAD; 817d783e0bdSMarta Rybczynska return IRQ_NONE; 81857dacad5SJay Sternberg } 81957dacad5SJay Sternberg 820a0fa9647SJens Axboe static int nvme_poll(struct blk_mq_hw_ctx *hctx, unsigned int tag) 821a0fa9647SJens Axboe { 822a0fa9647SJens Axboe struct nvme_queue *nvmeq = hctx->driver_data; 823a0fa9647SJens Axboe 824d783e0bdSMarta Rybczynska if (nvme_cqe_valid(nvmeq, nvmeq->cq_head, nvmeq->cq_phase)) { 825a0fa9647SJens Axboe spin_lock_irq(&nvmeq->q_lock); 826a0fa9647SJens Axboe __nvme_process_cq(nvmeq, &tag); 827a0fa9647SJens Axboe spin_unlock_irq(&nvmeq->q_lock); 828a0fa9647SJens Axboe 829a0fa9647SJens Axboe if (tag == -1) 830a0fa9647SJens Axboe return 1; 831a0fa9647SJens Axboe } 832a0fa9647SJens Axboe 833a0fa9647SJens Axboe return 0; 834a0fa9647SJens Axboe } 835a0fa9647SJens Axboe 8369396dec9SChristoph Hellwig static void nvme_async_event_work(struct work_struct *work) 83757dacad5SJay Sternberg { 8389396dec9SChristoph Hellwig struct nvme_dev *dev = container_of(work, struct nvme_dev, async_work); 8399396dec9SChristoph Hellwig struct nvme_queue *nvmeq = dev->queues[0]; 84057dacad5SJay Sternberg struct nvme_command c; 84157dacad5SJay Sternberg 84257dacad5SJay Sternberg memset(&c, 0, sizeof(c)); 84357dacad5SJay Sternberg c.common.opcode = nvme_admin_async_event; 84457dacad5SJay Sternberg 8459396dec9SChristoph Hellwig spin_lock_irq(&nvmeq->q_lock); 8469396dec9SChristoph Hellwig while (dev->ctrl.event_limit > 0) { 8479396dec9SChristoph Hellwig c.common.command_id = NVME_AQ_BLKMQ_DEPTH + 8489396dec9SChristoph Hellwig --dev->ctrl.event_limit; 8499396dec9SChristoph Hellwig __nvme_submit_cmd(nvmeq, &c); 8509396dec9SChristoph Hellwig } 8519396dec9SChristoph Hellwig spin_unlock_irq(&nvmeq->q_lock); 85257dacad5SJay Sternberg } 85357dacad5SJay Sternberg 85457dacad5SJay Sternberg static int adapter_delete_queue(struct nvme_dev *dev, u8 opcode, u16 id) 85557dacad5SJay Sternberg { 85657dacad5SJay Sternberg struct nvme_command c; 85757dacad5SJay Sternberg 85857dacad5SJay Sternberg memset(&c, 0, sizeof(c)); 85957dacad5SJay Sternberg c.delete_queue.opcode = opcode; 86057dacad5SJay Sternberg c.delete_queue.qid = cpu_to_le16(id); 86157dacad5SJay Sternberg 8621c63dc66SChristoph Hellwig return nvme_submit_sync_cmd(dev->ctrl.admin_q, &c, NULL, 0); 86357dacad5SJay Sternberg } 86457dacad5SJay Sternberg 86557dacad5SJay Sternberg static int adapter_alloc_cq(struct nvme_dev *dev, u16 qid, 86657dacad5SJay Sternberg struct nvme_queue *nvmeq) 86757dacad5SJay Sternberg { 86857dacad5SJay Sternberg struct nvme_command c; 86957dacad5SJay Sternberg int flags = NVME_QUEUE_PHYS_CONTIG | NVME_CQ_IRQ_ENABLED; 87057dacad5SJay Sternberg 87157dacad5SJay Sternberg /* 87257dacad5SJay Sternberg * Note: we (ab)use the fact the the prp fields survive if no data 87357dacad5SJay Sternberg * is attached to the request. 87457dacad5SJay Sternberg */ 87557dacad5SJay Sternberg memset(&c, 0, sizeof(c)); 87657dacad5SJay Sternberg c.create_cq.opcode = nvme_admin_create_cq; 87757dacad5SJay Sternberg c.create_cq.prp1 = cpu_to_le64(nvmeq->cq_dma_addr); 87857dacad5SJay Sternberg c.create_cq.cqid = cpu_to_le16(qid); 87957dacad5SJay Sternberg c.create_cq.qsize = cpu_to_le16(nvmeq->q_depth - 1); 88057dacad5SJay Sternberg c.create_cq.cq_flags = cpu_to_le16(flags); 88157dacad5SJay Sternberg c.create_cq.irq_vector = cpu_to_le16(nvmeq->cq_vector); 88257dacad5SJay Sternberg 8831c63dc66SChristoph Hellwig return nvme_submit_sync_cmd(dev->ctrl.admin_q, &c, NULL, 0); 88457dacad5SJay Sternberg } 88557dacad5SJay Sternberg 88657dacad5SJay Sternberg static int adapter_alloc_sq(struct nvme_dev *dev, u16 qid, 88757dacad5SJay Sternberg struct nvme_queue *nvmeq) 88857dacad5SJay Sternberg { 88957dacad5SJay Sternberg struct nvme_command c; 89057dacad5SJay Sternberg int flags = NVME_QUEUE_PHYS_CONTIG | NVME_SQ_PRIO_MEDIUM; 89157dacad5SJay Sternberg 89257dacad5SJay Sternberg /* 89357dacad5SJay Sternberg * Note: we (ab)use the fact the the prp fields survive if no data 89457dacad5SJay Sternberg * is attached to the request. 89557dacad5SJay Sternberg */ 89657dacad5SJay Sternberg memset(&c, 0, sizeof(c)); 89757dacad5SJay Sternberg c.create_sq.opcode = nvme_admin_create_sq; 89857dacad5SJay Sternberg c.create_sq.prp1 = cpu_to_le64(nvmeq->sq_dma_addr); 89957dacad5SJay Sternberg c.create_sq.sqid = cpu_to_le16(qid); 90057dacad5SJay Sternberg c.create_sq.qsize = cpu_to_le16(nvmeq->q_depth - 1); 90157dacad5SJay Sternberg c.create_sq.sq_flags = cpu_to_le16(flags); 90257dacad5SJay Sternberg c.create_sq.cqid = cpu_to_le16(qid); 90357dacad5SJay Sternberg 9041c63dc66SChristoph Hellwig return nvme_submit_sync_cmd(dev->ctrl.admin_q, &c, NULL, 0); 90557dacad5SJay Sternberg } 90657dacad5SJay Sternberg 90757dacad5SJay Sternberg static int adapter_delete_cq(struct nvme_dev *dev, u16 cqid) 90857dacad5SJay Sternberg { 90957dacad5SJay Sternberg return adapter_delete_queue(dev, nvme_admin_delete_cq, cqid); 91057dacad5SJay Sternberg } 91157dacad5SJay Sternberg 91257dacad5SJay Sternberg static int adapter_delete_sq(struct nvme_dev *dev, u16 sqid) 91357dacad5SJay Sternberg { 91457dacad5SJay Sternberg return adapter_delete_queue(dev, nvme_admin_delete_sq, sqid); 91557dacad5SJay Sternberg } 91657dacad5SJay Sternberg 917e7a2a87dSChristoph Hellwig static void abort_endio(struct request *req, int error) 91857dacad5SJay Sternberg { 919f4800d6dSChristoph Hellwig struct nvme_iod *iod = blk_mq_rq_to_pdu(req); 920f4800d6dSChristoph Hellwig struct nvme_queue *nvmeq = iod->nvmeq; 921e7a2a87dSChristoph Hellwig u16 status = req->errors; 92257dacad5SJay Sternberg 9231cb3cce5SChristoph Hellwig dev_warn(nvmeq->dev->ctrl.device, "Abort status: 0x%x", status); 924e7a2a87dSChristoph Hellwig atomic_inc(&nvmeq->dev->ctrl.abort_limit); 925e7a2a87dSChristoph Hellwig blk_mq_free_request(req); 92657dacad5SJay Sternberg } 92757dacad5SJay Sternberg 92831c7c7d2SChristoph Hellwig static enum blk_eh_timer_return nvme_timeout(struct request *req, bool reserved) 92957dacad5SJay Sternberg { 930f4800d6dSChristoph Hellwig struct nvme_iod *iod = blk_mq_rq_to_pdu(req); 931f4800d6dSChristoph Hellwig struct nvme_queue *nvmeq = iod->nvmeq; 93257dacad5SJay Sternberg struct nvme_dev *dev = nvmeq->dev; 93357dacad5SJay Sternberg struct request *abort_req; 93457dacad5SJay Sternberg struct nvme_command cmd; 93557dacad5SJay Sternberg 93631c7c7d2SChristoph Hellwig /* 937fd634f41SChristoph Hellwig * Shutdown immediately if controller times out while starting. The 938fd634f41SChristoph Hellwig * reset work will see the pci device disabled when it gets the forced 939fd634f41SChristoph Hellwig * cancellation error. All outstanding requests are completed on 940fd634f41SChristoph Hellwig * shutdown, so we return BLK_EH_HANDLED. 941fd634f41SChristoph Hellwig */ 942fd634f41SChristoph Hellwig if (test_bit(NVME_CTRL_RESETTING, &dev->flags)) { 9431b3c47c1SSagi Grimberg dev_warn(dev->ctrl.device, 944fd634f41SChristoph Hellwig "I/O %d QID %d timeout, disable controller\n", 945fd634f41SChristoph Hellwig req->tag, nvmeq->qid); 946a5cdb68cSKeith Busch nvme_dev_disable(dev, false); 947fd634f41SChristoph Hellwig req->errors = NVME_SC_CANCELLED; 948fd634f41SChristoph Hellwig return BLK_EH_HANDLED; 949fd634f41SChristoph Hellwig } 950fd634f41SChristoph Hellwig 951fd634f41SChristoph Hellwig /* 952e1569a16SKeith Busch * Shutdown the controller immediately and schedule a reset if the 953e1569a16SKeith Busch * command was already aborted once before and still hasn't been 954e1569a16SKeith Busch * returned to the driver, or if this is the admin queue. 95531c7c7d2SChristoph Hellwig */ 956f4800d6dSChristoph Hellwig if (!nvmeq->qid || iod->aborted) { 9571b3c47c1SSagi Grimberg dev_warn(dev->ctrl.device, 95857dacad5SJay Sternberg "I/O %d QID %d timeout, reset controller\n", 95957dacad5SJay Sternberg req->tag, nvmeq->qid); 960a5cdb68cSKeith Busch nvme_dev_disable(dev, false); 961e1569a16SKeith Busch queue_work(nvme_workq, &dev->reset_work); 962e1569a16SKeith Busch 963e1569a16SKeith Busch /* 964e1569a16SKeith Busch * Mark the request as handled, since the inline shutdown 965e1569a16SKeith Busch * forces all outstanding requests to complete. 966e1569a16SKeith Busch */ 967e1569a16SKeith Busch req->errors = NVME_SC_CANCELLED; 968e1569a16SKeith Busch return BLK_EH_HANDLED; 96957dacad5SJay Sternberg } 97057dacad5SJay Sternberg 971f4800d6dSChristoph Hellwig iod->aborted = 1; 97257dacad5SJay Sternberg 973e7a2a87dSChristoph Hellwig if (atomic_dec_return(&dev->ctrl.abort_limit) < 0) { 974e7a2a87dSChristoph Hellwig atomic_inc(&dev->ctrl.abort_limit); 975e7a2a87dSChristoph Hellwig return BLK_EH_RESET_TIMER; 976e7a2a87dSChristoph Hellwig } 97757dacad5SJay Sternberg 97857dacad5SJay Sternberg memset(&cmd, 0, sizeof(cmd)); 97957dacad5SJay Sternberg cmd.abort.opcode = nvme_admin_abort_cmd; 98057dacad5SJay Sternberg cmd.abort.cid = req->tag; 98157dacad5SJay Sternberg cmd.abort.sqid = cpu_to_le16(nvmeq->qid); 98257dacad5SJay Sternberg 9831b3c47c1SSagi Grimberg dev_warn(nvmeq->dev->ctrl.device, 9841b3c47c1SSagi Grimberg "I/O %d QID %d timeout, aborting\n", 98557dacad5SJay Sternberg req->tag, nvmeq->qid); 986e7a2a87dSChristoph Hellwig 987e7a2a87dSChristoph Hellwig abort_req = nvme_alloc_request(dev->ctrl.admin_q, &cmd, 9886f3b0e8bSChristoph Hellwig BLK_MQ_REQ_NOWAIT); 9896bf25d16SChristoph Hellwig if (IS_ERR(abort_req)) { 9906bf25d16SChristoph Hellwig atomic_inc(&dev->ctrl.abort_limit); 99131c7c7d2SChristoph Hellwig return BLK_EH_RESET_TIMER; 99257dacad5SJay Sternberg } 99357dacad5SJay Sternberg 994e7a2a87dSChristoph Hellwig abort_req->timeout = ADMIN_TIMEOUT; 995e7a2a87dSChristoph Hellwig abort_req->end_io_data = NULL; 996e7a2a87dSChristoph Hellwig blk_execute_rq_nowait(abort_req->q, NULL, abort_req, 0, abort_endio); 99757dacad5SJay Sternberg 99857dacad5SJay Sternberg /* 99957dacad5SJay Sternberg * The aborted req will be completed on receiving the abort req. 100057dacad5SJay Sternberg * We enable the timer again. If hit twice, it'll cause a device reset, 100157dacad5SJay Sternberg * as the device then is in a faulty state. 100257dacad5SJay Sternberg */ 100357dacad5SJay Sternberg return BLK_EH_RESET_TIMER; 100457dacad5SJay Sternberg } 100557dacad5SJay Sternberg 100657dacad5SJay Sternberg static void nvme_cancel_queue_ios(struct request *req, void *data, bool reserved) 100757dacad5SJay Sternberg { 100857dacad5SJay Sternberg struct nvme_queue *nvmeq = data; 1009aae239e1SChristoph Hellwig int status; 101057dacad5SJay Sternberg 101157dacad5SJay Sternberg if (!blk_mq_request_started(req)) 101257dacad5SJay Sternberg return; 101357dacad5SJay Sternberg 1014237045fcSLinus Torvalds dev_dbg_ratelimited(nvmeq->dev->ctrl.device, 1015aae239e1SChristoph Hellwig "Cancelling I/O %d QID %d\n", req->tag, nvmeq->qid); 101657dacad5SJay Sternberg 10171d49c38cSKeith Busch status = NVME_SC_ABORT_REQ; 101857dacad5SJay Sternberg if (blk_queue_dying(req->q)) 1019aae239e1SChristoph Hellwig status |= NVME_SC_DNR; 1020aae239e1SChristoph Hellwig blk_mq_complete_request(req, status); 102157dacad5SJay Sternberg } 102257dacad5SJay Sternberg 102357dacad5SJay Sternberg static void nvme_free_queue(struct nvme_queue *nvmeq) 102457dacad5SJay Sternberg { 102557dacad5SJay Sternberg dma_free_coherent(nvmeq->q_dmadev, CQ_SIZE(nvmeq->q_depth), 102657dacad5SJay Sternberg (void *)nvmeq->cqes, nvmeq->cq_dma_addr); 102757dacad5SJay Sternberg if (nvmeq->sq_cmds) 102857dacad5SJay Sternberg dma_free_coherent(nvmeq->q_dmadev, SQ_SIZE(nvmeq->q_depth), 102957dacad5SJay Sternberg nvmeq->sq_cmds, nvmeq->sq_dma_addr); 103057dacad5SJay Sternberg kfree(nvmeq); 103157dacad5SJay Sternberg } 103257dacad5SJay Sternberg 103357dacad5SJay Sternberg static void nvme_free_queues(struct nvme_dev *dev, int lowest) 103457dacad5SJay Sternberg { 103557dacad5SJay Sternberg int i; 103657dacad5SJay Sternberg 103757dacad5SJay Sternberg for (i = dev->queue_count - 1; i >= lowest; i--) { 103857dacad5SJay Sternberg struct nvme_queue *nvmeq = dev->queues[i]; 103957dacad5SJay Sternberg dev->queue_count--; 104057dacad5SJay Sternberg dev->queues[i] = NULL; 104157dacad5SJay Sternberg nvme_free_queue(nvmeq); 104257dacad5SJay Sternberg } 104357dacad5SJay Sternberg } 104457dacad5SJay Sternberg 104557dacad5SJay Sternberg /** 104657dacad5SJay Sternberg * nvme_suspend_queue - put queue into suspended state 104757dacad5SJay Sternberg * @nvmeq - queue to suspend 104857dacad5SJay Sternberg */ 104957dacad5SJay Sternberg static int nvme_suspend_queue(struct nvme_queue *nvmeq) 105057dacad5SJay Sternberg { 105157dacad5SJay Sternberg int vector; 105257dacad5SJay Sternberg 105357dacad5SJay Sternberg spin_lock_irq(&nvmeq->q_lock); 105457dacad5SJay Sternberg if (nvmeq->cq_vector == -1) { 105557dacad5SJay Sternberg spin_unlock_irq(&nvmeq->q_lock); 105657dacad5SJay Sternberg return 1; 105757dacad5SJay Sternberg } 105857dacad5SJay Sternberg vector = nvmeq->dev->entry[nvmeq->cq_vector].vector; 105957dacad5SJay Sternberg nvmeq->dev->online_queues--; 106057dacad5SJay Sternberg nvmeq->cq_vector = -1; 106157dacad5SJay Sternberg spin_unlock_irq(&nvmeq->q_lock); 106257dacad5SJay Sternberg 10631c63dc66SChristoph Hellwig if (!nvmeq->qid && nvmeq->dev->ctrl.admin_q) 106425646264SKeith Busch blk_mq_stop_hw_queues(nvmeq->dev->ctrl.admin_q); 106557dacad5SJay Sternberg 106657dacad5SJay Sternberg irq_set_affinity_hint(vector, NULL); 106757dacad5SJay Sternberg free_irq(vector, nvmeq); 106857dacad5SJay Sternberg 106957dacad5SJay Sternberg return 0; 107057dacad5SJay Sternberg } 107157dacad5SJay Sternberg 107257dacad5SJay Sternberg static void nvme_clear_queue(struct nvme_queue *nvmeq) 107357dacad5SJay Sternberg { 107457dacad5SJay Sternberg spin_lock_irq(&nvmeq->q_lock); 107557dacad5SJay Sternberg if (nvmeq->tags && *nvmeq->tags) 107657dacad5SJay Sternberg blk_mq_all_tag_busy_iter(*nvmeq->tags, nvme_cancel_queue_ios, nvmeq); 107757dacad5SJay Sternberg spin_unlock_irq(&nvmeq->q_lock); 107857dacad5SJay Sternberg } 107957dacad5SJay Sternberg 1080a5cdb68cSKeith Busch static void nvme_disable_admin_queue(struct nvme_dev *dev, bool shutdown) 108157dacad5SJay Sternberg { 1082a5cdb68cSKeith Busch struct nvme_queue *nvmeq = dev->queues[0]; 108357dacad5SJay Sternberg 108457dacad5SJay Sternberg if (!nvmeq) 108557dacad5SJay Sternberg return; 108657dacad5SJay Sternberg if (nvme_suspend_queue(nvmeq)) 108757dacad5SJay Sternberg return; 108857dacad5SJay Sternberg 1089a5cdb68cSKeith Busch if (shutdown) 1090a5cdb68cSKeith Busch nvme_shutdown_ctrl(&dev->ctrl); 1091a5cdb68cSKeith Busch else 1092a5cdb68cSKeith Busch nvme_disable_ctrl(&dev->ctrl, lo_hi_readq( 1093a5cdb68cSKeith Busch dev->bar + NVME_REG_CAP)); 109457dacad5SJay Sternberg 109557dacad5SJay Sternberg spin_lock_irq(&nvmeq->q_lock); 109657dacad5SJay Sternberg nvme_process_cq(nvmeq); 109757dacad5SJay Sternberg spin_unlock_irq(&nvmeq->q_lock); 109857dacad5SJay Sternberg } 109957dacad5SJay Sternberg 110057dacad5SJay Sternberg static int nvme_cmb_qdepth(struct nvme_dev *dev, int nr_io_queues, 110157dacad5SJay Sternberg int entry_size) 110257dacad5SJay Sternberg { 110357dacad5SJay Sternberg int q_depth = dev->q_depth; 11045fd4ce1bSChristoph Hellwig unsigned q_size_aligned = roundup(q_depth * entry_size, 11055fd4ce1bSChristoph Hellwig dev->ctrl.page_size); 110657dacad5SJay Sternberg 110757dacad5SJay Sternberg if (q_size_aligned * nr_io_queues > dev->cmb_size) { 110857dacad5SJay Sternberg u64 mem_per_q = div_u64(dev->cmb_size, nr_io_queues); 11095fd4ce1bSChristoph Hellwig mem_per_q = round_down(mem_per_q, dev->ctrl.page_size); 111057dacad5SJay Sternberg q_depth = div_u64(mem_per_q, entry_size); 111157dacad5SJay Sternberg 111257dacad5SJay Sternberg /* 111357dacad5SJay Sternberg * Ensure the reduced q_depth is above some threshold where it 111457dacad5SJay Sternberg * would be better to map queues in system memory with the 111557dacad5SJay Sternberg * original depth 111657dacad5SJay Sternberg */ 111757dacad5SJay Sternberg if (q_depth < 64) 111857dacad5SJay Sternberg return -ENOMEM; 111957dacad5SJay Sternberg } 112057dacad5SJay Sternberg 112157dacad5SJay Sternberg return q_depth; 112257dacad5SJay Sternberg } 112357dacad5SJay Sternberg 112457dacad5SJay Sternberg static int nvme_alloc_sq_cmds(struct nvme_dev *dev, struct nvme_queue *nvmeq, 112557dacad5SJay Sternberg int qid, int depth) 112657dacad5SJay Sternberg { 112757dacad5SJay Sternberg if (qid && dev->cmb && use_cmb_sqes && NVME_CMB_SQS(dev->cmbsz)) { 11285fd4ce1bSChristoph Hellwig unsigned offset = (qid - 1) * roundup(SQ_SIZE(depth), 11295fd4ce1bSChristoph Hellwig dev->ctrl.page_size); 113057dacad5SJay Sternberg nvmeq->sq_dma_addr = dev->cmb_dma_addr + offset; 113157dacad5SJay Sternberg nvmeq->sq_cmds_io = dev->cmb + offset; 113257dacad5SJay Sternberg } else { 113357dacad5SJay Sternberg nvmeq->sq_cmds = dma_alloc_coherent(dev->dev, SQ_SIZE(depth), 113457dacad5SJay Sternberg &nvmeq->sq_dma_addr, GFP_KERNEL); 113557dacad5SJay Sternberg if (!nvmeq->sq_cmds) 113657dacad5SJay Sternberg return -ENOMEM; 113757dacad5SJay Sternberg } 113857dacad5SJay Sternberg 113957dacad5SJay Sternberg return 0; 114057dacad5SJay Sternberg } 114157dacad5SJay Sternberg 114257dacad5SJay Sternberg static struct nvme_queue *nvme_alloc_queue(struct nvme_dev *dev, int qid, 114357dacad5SJay Sternberg int depth) 114457dacad5SJay Sternberg { 114557dacad5SJay Sternberg struct nvme_queue *nvmeq = kzalloc(sizeof(*nvmeq), GFP_KERNEL); 114657dacad5SJay Sternberg if (!nvmeq) 114757dacad5SJay Sternberg return NULL; 114857dacad5SJay Sternberg 114957dacad5SJay Sternberg nvmeq->cqes = dma_zalloc_coherent(dev->dev, CQ_SIZE(depth), 115057dacad5SJay Sternberg &nvmeq->cq_dma_addr, GFP_KERNEL); 115157dacad5SJay Sternberg if (!nvmeq->cqes) 115257dacad5SJay Sternberg goto free_nvmeq; 115357dacad5SJay Sternberg 115457dacad5SJay Sternberg if (nvme_alloc_sq_cmds(dev, nvmeq, qid, depth)) 115557dacad5SJay Sternberg goto free_cqdma; 115657dacad5SJay Sternberg 115757dacad5SJay Sternberg nvmeq->q_dmadev = dev->dev; 115857dacad5SJay Sternberg nvmeq->dev = dev; 115957dacad5SJay Sternberg snprintf(nvmeq->irqname, sizeof(nvmeq->irqname), "nvme%dq%d", 11601c63dc66SChristoph Hellwig dev->ctrl.instance, qid); 116157dacad5SJay Sternberg spin_lock_init(&nvmeq->q_lock); 116257dacad5SJay Sternberg nvmeq->cq_head = 0; 116357dacad5SJay Sternberg nvmeq->cq_phase = 1; 116457dacad5SJay Sternberg nvmeq->q_db = &dev->dbs[qid * 2 * dev->db_stride]; 116557dacad5SJay Sternberg nvmeq->q_depth = depth; 116657dacad5SJay Sternberg nvmeq->qid = qid; 116757dacad5SJay Sternberg nvmeq->cq_vector = -1; 116857dacad5SJay Sternberg dev->queues[qid] = nvmeq; 116957dacad5SJay Sternberg dev->queue_count++; 117057dacad5SJay Sternberg 117157dacad5SJay Sternberg return nvmeq; 117257dacad5SJay Sternberg 117357dacad5SJay Sternberg free_cqdma: 117457dacad5SJay Sternberg dma_free_coherent(dev->dev, CQ_SIZE(depth), (void *)nvmeq->cqes, 117557dacad5SJay Sternberg nvmeq->cq_dma_addr); 117657dacad5SJay Sternberg free_nvmeq: 117757dacad5SJay Sternberg kfree(nvmeq); 117857dacad5SJay Sternberg return NULL; 117957dacad5SJay Sternberg } 118057dacad5SJay Sternberg 118157dacad5SJay Sternberg static int queue_request_irq(struct nvme_dev *dev, struct nvme_queue *nvmeq, 118257dacad5SJay Sternberg const char *name) 118357dacad5SJay Sternberg { 118457dacad5SJay Sternberg if (use_threaded_interrupts) 118557dacad5SJay Sternberg return request_threaded_irq(dev->entry[nvmeq->cq_vector].vector, 118657dacad5SJay Sternberg nvme_irq_check, nvme_irq, IRQF_SHARED, 118757dacad5SJay Sternberg name, nvmeq); 118857dacad5SJay Sternberg return request_irq(dev->entry[nvmeq->cq_vector].vector, nvme_irq, 118957dacad5SJay Sternberg IRQF_SHARED, name, nvmeq); 119057dacad5SJay Sternberg } 119157dacad5SJay Sternberg 119257dacad5SJay Sternberg static void nvme_init_queue(struct nvme_queue *nvmeq, u16 qid) 119357dacad5SJay Sternberg { 119457dacad5SJay Sternberg struct nvme_dev *dev = nvmeq->dev; 119557dacad5SJay Sternberg 119657dacad5SJay Sternberg spin_lock_irq(&nvmeq->q_lock); 119757dacad5SJay Sternberg nvmeq->sq_tail = 0; 119857dacad5SJay Sternberg nvmeq->cq_head = 0; 119957dacad5SJay Sternberg nvmeq->cq_phase = 1; 120057dacad5SJay Sternberg nvmeq->q_db = &dev->dbs[qid * 2 * dev->db_stride]; 120157dacad5SJay Sternberg memset((void *)nvmeq->cqes, 0, CQ_SIZE(nvmeq->q_depth)); 120257dacad5SJay Sternberg dev->online_queues++; 120357dacad5SJay Sternberg spin_unlock_irq(&nvmeq->q_lock); 120457dacad5SJay Sternberg } 120557dacad5SJay Sternberg 120657dacad5SJay Sternberg static int nvme_create_queue(struct nvme_queue *nvmeq, int qid) 120757dacad5SJay Sternberg { 120857dacad5SJay Sternberg struct nvme_dev *dev = nvmeq->dev; 120957dacad5SJay Sternberg int result; 121057dacad5SJay Sternberg 121157dacad5SJay Sternberg nvmeq->cq_vector = qid - 1; 121257dacad5SJay Sternberg result = adapter_alloc_cq(dev, qid, nvmeq); 121357dacad5SJay Sternberg if (result < 0) 121457dacad5SJay Sternberg return result; 121557dacad5SJay Sternberg 121657dacad5SJay Sternberg result = adapter_alloc_sq(dev, qid, nvmeq); 121757dacad5SJay Sternberg if (result < 0) 121857dacad5SJay Sternberg goto release_cq; 121957dacad5SJay Sternberg 122057dacad5SJay Sternberg result = queue_request_irq(dev, nvmeq, nvmeq->irqname); 122157dacad5SJay Sternberg if (result < 0) 122257dacad5SJay Sternberg goto release_sq; 122357dacad5SJay Sternberg 122457dacad5SJay Sternberg nvme_init_queue(nvmeq, qid); 122557dacad5SJay Sternberg return result; 122657dacad5SJay Sternberg 122757dacad5SJay Sternberg release_sq: 122857dacad5SJay Sternberg adapter_delete_sq(dev, qid); 122957dacad5SJay Sternberg release_cq: 123057dacad5SJay Sternberg adapter_delete_cq(dev, qid); 123157dacad5SJay Sternberg return result; 123257dacad5SJay Sternberg } 123357dacad5SJay Sternberg 123457dacad5SJay Sternberg static struct blk_mq_ops nvme_mq_admin_ops = { 123557dacad5SJay Sternberg .queue_rq = nvme_queue_rq, 1236eee417b0SChristoph Hellwig .complete = nvme_complete_rq, 123757dacad5SJay Sternberg .map_queue = blk_mq_map_queue, 123857dacad5SJay Sternberg .init_hctx = nvme_admin_init_hctx, 123957dacad5SJay Sternberg .exit_hctx = nvme_admin_exit_hctx, 124057dacad5SJay Sternberg .init_request = nvme_admin_init_request, 124157dacad5SJay Sternberg .timeout = nvme_timeout, 124257dacad5SJay Sternberg }; 124357dacad5SJay Sternberg 124457dacad5SJay Sternberg static struct blk_mq_ops nvme_mq_ops = { 124557dacad5SJay Sternberg .queue_rq = nvme_queue_rq, 1246eee417b0SChristoph Hellwig .complete = nvme_complete_rq, 124757dacad5SJay Sternberg .map_queue = blk_mq_map_queue, 124857dacad5SJay Sternberg .init_hctx = nvme_init_hctx, 124957dacad5SJay Sternberg .init_request = nvme_init_request, 125057dacad5SJay Sternberg .timeout = nvme_timeout, 1251a0fa9647SJens Axboe .poll = nvme_poll, 125257dacad5SJay Sternberg }; 125357dacad5SJay Sternberg 125457dacad5SJay Sternberg static void nvme_dev_remove_admin(struct nvme_dev *dev) 125557dacad5SJay Sternberg { 12561c63dc66SChristoph Hellwig if (dev->ctrl.admin_q && !blk_queue_dying(dev->ctrl.admin_q)) { 125769d9a99cSKeith Busch /* 125869d9a99cSKeith Busch * If the controller was reset during removal, it's possible 125969d9a99cSKeith Busch * user requests may be waiting on a stopped queue. Start the 126069d9a99cSKeith Busch * queue to flush these to completion. 126169d9a99cSKeith Busch */ 126269d9a99cSKeith Busch blk_mq_start_stopped_hw_queues(dev->ctrl.admin_q, true); 12631c63dc66SChristoph Hellwig blk_cleanup_queue(dev->ctrl.admin_q); 126457dacad5SJay Sternberg blk_mq_free_tag_set(&dev->admin_tagset); 126557dacad5SJay Sternberg } 126657dacad5SJay Sternberg } 126757dacad5SJay Sternberg 126857dacad5SJay Sternberg static int nvme_alloc_admin_tags(struct nvme_dev *dev) 126957dacad5SJay Sternberg { 12701c63dc66SChristoph Hellwig if (!dev->ctrl.admin_q) { 127157dacad5SJay Sternberg dev->admin_tagset.ops = &nvme_mq_admin_ops; 127257dacad5SJay Sternberg dev->admin_tagset.nr_hw_queues = 1; 1273e3e9d50cSKeith Busch 1274e3e9d50cSKeith Busch /* 1275e3e9d50cSKeith Busch * Subtract one to leave an empty queue entry for 'Full Queue' 1276e3e9d50cSKeith Busch * condition. See NVM-Express 1.2 specification, section 4.1.2. 1277e3e9d50cSKeith Busch */ 1278e3e9d50cSKeith Busch dev->admin_tagset.queue_depth = NVME_AQ_BLKMQ_DEPTH - 1; 127957dacad5SJay Sternberg dev->admin_tagset.timeout = ADMIN_TIMEOUT; 128057dacad5SJay Sternberg dev->admin_tagset.numa_node = dev_to_node(dev->dev); 128157dacad5SJay Sternberg dev->admin_tagset.cmd_size = nvme_cmd_size(dev); 128257dacad5SJay Sternberg dev->admin_tagset.driver_data = dev; 128357dacad5SJay Sternberg 128457dacad5SJay Sternberg if (blk_mq_alloc_tag_set(&dev->admin_tagset)) 128557dacad5SJay Sternberg return -ENOMEM; 128657dacad5SJay Sternberg 12871c63dc66SChristoph Hellwig dev->ctrl.admin_q = blk_mq_init_queue(&dev->admin_tagset); 12881c63dc66SChristoph Hellwig if (IS_ERR(dev->ctrl.admin_q)) { 128957dacad5SJay Sternberg blk_mq_free_tag_set(&dev->admin_tagset); 129057dacad5SJay Sternberg return -ENOMEM; 129157dacad5SJay Sternberg } 12921c63dc66SChristoph Hellwig if (!blk_get_queue(dev->ctrl.admin_q)) { 129357dacad5SJay Sternberg nvme_dev_remove_admin(dev); 12941c63dc66SChristoph Hellwig dev->ctrl.admin_q = NULL; 129557dacad5SJay Sternberg return -ENODEV; 129657dacad5SJay Sternberg } 129757dacad5SJay Sternberg } else 129825646264SKeith Busch blk_mq_start_stopped_hw_queues(dev->ctrl.admin_q, true); 129957dacad5SJay Sternberg 130057dacad5SJay Sternberg return 0; 130157dacad5SJay Sternberg } 130257dacad5SJay Sternberg 130357dacad5SJay Sternberg static int nvme_configure_admin_queue(struct nvme_dev *dev) 130457dacad5SJay Sternberg { 130557dacad5SJay Sternberg int result; 130657dacad5SJay Sternberg u32 aqa; 13077a67cbeaSChristoph Hellwig u64 cap = lo_hi_readq(dev->bar + NVME_REG_CAP); 130857dacad5SJay Sternberg struct nvme_queue *nvmeq; 130957dacad5SJay Sternberg 13107a67cbeaSChristoph Hellwig dev->subsystem = readl(dev->bar + NVME_REG_VS) >= NVME_VS(1, 1) ? 131157dacad5SJay Sternberg NVME_CAP_NSSRC(cap) : 0; 131257dacad5SJay Sternberg 13137a67cbeaSChristoph Hellwig if (dev->subsystem && 13147a67cbeaSChristoph Hellwig (readl(dev->bar + NVME_REG_CSTS) & NVME_CSTS_NSSRO)) 13157a67cbeaSChristoph Hellwig writel(NVME_CSTS_NSSRO, dev->bar + NVME_REG_CSTS); 131657dacad5SJay Sternberg 13175fd4ce1bSChristoph Hellwig result = nvme_disable_ctrl(&dev->ctrl, cap); 131857dacad5SJay Sternberg if (result < 0) 131957dacad5SJay Sternberg return result; 132057dacad5SJay Sternberg 132157dacad5SJay Sternberg nvmeq = dev->queues[0]; 132257dacad5SJay Sternberg if (!nvmeq) { 132357dacad5SJay Sternberg nvmeq = nvme_alloc_queue(dev, 0, NVME_AQ_DEPTH); 132457dacad5SJay Sternberg if (!nvmeq) 132557dacad5SJay Sternberg return -ENOMEM; 132657dacad5SJay Sternberg } 132757dacad5SJay Sternberg 132857dacad5SJay Sternberg aqa = nvmeq->q_depth - 1; 132957dacad5SJay Sternberg aqa |= aqa << 16; 133057dacad5SJay Sternberg 13317a67cbeaSChristoph Hellwig writel(aqa, dev->bar + NVME_REG_AQA); 13327a67cbeaSChristoph Hellwig lo_hi_writeq(nvmeq->sq_dma_addr, dev->bar + NVME_REG_ASQ); 13337a67cbeaSChristoph Hellwig lo_hi_writeq(nvmeq->cq_dma_addr, dev->bar + NVME_REG_ACQ); 133457dacad5SJay Sternberg 13355fd4ce1bSChristoph Hellwig result = nvme_enable_ctrl(&dev->ctrl, cap); 133657dacad5SJay Sternberg if (result) 133757dacad5SJay Sternberg goto free_nvmeq; 133857dacad5SJay Sternberg 133957dacad5SJay Sternberg nvmeq->cq_vector = 0; 134057dacad5SJay Sternberg result = queue_request_irq(dev, nvmeq, nvmeq->irqname); 134157dacad5SJay Sternberg if (result) { 134257dacad5SJay Sternberg nvmeq->cq_vector = -1; 134357dacad5SJay Sternberg goto free_nvmeq; 134457dacad5SJay Sternberg } 134557dacad5SJay Sternberg 134657dacad5SJay Sternberg return result; 134757dacad5SJay Sternberg 134857dacad5SJay Sternberg free_nvmeq: 134957dacad5SJay Sternberg nvme_free_queues(dev, 0); 135057dacad5SJay Sternberg return result; 135157dacad5SJay Sternberg } 135257dacad5SJay Sternberg 13532d55cd5fSChristoph Hellwig static void nvme_watchdog_timer(unsigned long data) 135457dacad5SJay Sternberg { 13552d55cd5fSChristoph Hellwig struct nvme_dev *dev = (struct nvme_dev *)data; 13567a67cbeaSChristoph Hellwig u32 csts = readl(dev->bar + NVME_REG_CSTS); 135757dacad5SJay Sternberg 1358846cc05fSChristoph Hellwig /* 1359846cc05fSChristoph Hellwig * Skip controllers currently under reset. 1360846cc05fSChristoph Hellwig */ 13612d55cd5fSChristoph Hellwig if (!work_pending(&dev->reset_work) && !work_busy(&dev->reset_work) && 13622d55cd5fSChristoph Hellwig ((csts & NVME_CSTS_CFS) || 13632d55cd5fSChristoph Hellwig (dev->subsystem && (csts & NVME_CSTS_NSSRO)))) { 1364846cc05fSChristoph Hellwig if (queue_work(nvme_workq, &dev->reset_work)) { 136557dacad5SJay Sternberg dev_warn(dev->dev, 13662d55cd5fSChristoph Hellwig "Failed status: 0x%x, reset controller.\n", 13672d55cd5fSChristoph Hellwig csts); 136857dacad5SJay Sternberg } 13692d55cd5fSChristoph Hellwig return; 137057dacad5SJay Sternberg } 137157dacad5SJay Sternberg 13722d55cd5fSChristoph Hellwig mod_timer(&dev->watchdog_timer, round_jiffies(jiffies + HZ)); 137357dacad5SJay Sternberg } 137457dacad5SJay Sternberg 1375749941f2SChristoph Hellwig static int nvme_create_io_queues(struct nvme_dev *dev) 137657dacad5SJay Sternberg { 1377949928c1SKeith Busch unsigned i, max; 1378749941f2SChristoph Hellwig int ret = 0; 137957dacad5SJay Sternberg 1380749941f2SChristoph Hellwig for (i = dev->queue_count; i <= dev->max_qid; i++) { 1381749941f2SChristoph Hellwig if (!nvme_alloc_queue(dev, i, dev->q_depth)) { 1382749941f2SChristoph Hellwig ret = -ENOMEM; 138357dacad5SJay Sternberg break; 1384749941f2SChristoph Hellwig } 1385749941f2SChristoph Hellwig } 138657dacad5SJay Sternberg 1387949928c1SKeith Busch max = min(dev->max_qid, dev->queue_count - 1); 1388949928c1SKeith Busch for (i = dev->online_queues; i <= max; i++) { 1389749941f2SChristoph Hellwig ret = nvme_create_queue(dev->queues[i], i); 1390749941f2SChristoph Hellwig if (ret) { 139157dacad5SJay Sternberg nvme_free_queues(dev, i); 139257dacad5SJay Sternberg break; 139357dacad5SJay Sternberg } 139457dacad5SJay Sternberg } 139557dacad5SJay Sternberg 1396749941f2SChristoph Hellwig /* 1397749941f2SChristoph Hellwig * Ignore failing Create SQ/CQ commands, we can continue with less 1398749941f2SChristoph Hellwig * than the desired aount of queues, and even a controller without 1399749941f2SChristoph Hellwig * I/O queues an still be used to issue admin commands. This might 1400749941f2SChristoph Hellwig * be useful to upgrade a buggy firmware for example. 1401749941f2SChristoph Hellwig */ 1402749941f2SChristoph Hellwig return ret >= 0 ? 0 : ret; 140357dacad5SJay Sternberg } 140457dacad5SJay Sternberg 140557dacad5SJay Sternberg static void __iomem *nvme_map_cmb(struct nvme_dev *dev) 140657dacad5SJay Sternberg { 140757dacad5SJay Sternberg u64 szu, size, offset; 140857dacad5SJay Sternberg u32 cmbloc; 140957dacad5SJay Sternberg resource_size_t bar_size; 141057dacad5SJay Sternberg struct pci_dev *pdev = to_pci_dev(dev->dev); 141157dacad5SJay Sternberg void __iomem *cmb; 141257dacad5SJay Sternberg dma_addr_t dma_addr; 141357dacad5SJay Sternberg 141457dacad5SJay Sternberg if (!use_cmb_sqes) 141557dacad5SJay Sternberg return NULL; 141657dacad5SJay Sternberg 14177a67cbeaSChristoph Hellwig dev->cmbsz = readl(dev->bar + NVME_REG_CMBSZ); 141857dacad5SJay Sternberg if (!(NVME_CMB_SZ(dev->cmbsz))) 141957dacad5SJay Sternberg return NULL; 142057dacad5SJay Sternberg 14217a67cbeaSChristoph Hellwig cmbloc = readl(dev->bar + NVME_REG_CMBLOC); 142257dacad5SJay Sternberg 142357dacad5SJay Sternberg szu = (u64)1 << (12 + 4 * NVME_CMB_SZU(dev->cmbsz)); 142457dacad5SJay Sternberg size = szu * NVME_CMB_SZ(dev->cmbsz); 142557dacad5SJay Sternberg offset = szu * NVME_CMB_OFST(cmbloc); 142657dacad5SJay Sternberg bar_size = pci_resource_len(pdev, NVME_CMB_BIR(cmbloc)); 142757dacad5SJay Sternberg 142857dacad5SJay Sternberg if (offset > bar_size) 142957dacad5SJay Sternberg return NULL; 143057dacad5SJay Sternberg 143157dacad5SJay Sternberg /* 143257dacad5SJay Sternberg * Controllers may support a CMB size larger than their BAR, 143357dacad5SJay Sternberg * for example, due to being behind a bridge. Reduce the CMB to 143457dacad5SJay Sternberg * the reported size of the BAR 143557dacad5SJay Sternberg */ 143657dacad5SJay Sternberg if (size > bar_size - offset) 143757dacad5SJay Sternberg size = bar_size - offset; 143857dacad5SJay Sternberg 143957dacad5SJay Sternberg dma_addr = pci_resource_start(pdev, NVME_CMB_BIR(cmbloc)) + offset; 144057dacad5SJay Sternberg cmb = ioremap_wc(dma_addr, size); 144157dacad5SJay Sternberg if (!cmb) 144257dacad5SJay Sternberg return NULL; 144357dacad5SJay Sternberg 144457dacad5SJay Sternberg dev->cmb_dma_addr = dma_addr; 144557dacad5SJay Sternberg dev->cmb_size = size; 144657dacad5SJay Sternberg return cmb; 144757dacad5SJay Sternberg } 144857dacad5SJay Sternberg 144957dacad5SJay Sternberg static inline void nvme_release_cmb(struct nvme_dev *dev) 145057dacad5SJay Sternberg { 145157dacad5SJay Sternberg if (dev->cmb) { 145257dacad5SJay Sternberg iounmap(dev->cmb); 145357dacad5SJay Sternberg dev->cmb = NULL; 145457dacad5SJay Sternberg } 145557dacad5SJay Sternberg } 145657dacad5SJay Sternberg 145757dacad5SJay Sternberg static size_t db_bar_size(struct nvme_dev *dev, unsigned nr_io_queues) 145857dacad5SJay Sternberg { 145957dacad5SJay Sternberg return 4096 + ((nr_io_queues + 1) * 8 * dev->db_stride); 146057dacad5SJay Sternberg } 146157dacad5SJay Sternberg 146257dacad5SJay Sternberg static int nvme_setup_io_queues(struct nvme_dev *dev) 146357dacad5SJay Sternberg { 146457dacad5SJay Sternberg struct nvme_queue *adminq = dev->queues[0]; 146557dacad5SJay Sternberg struct pci_dev *pdev = to_pci_dev(dev->dev); 146657dacad5SJay Sternberg int result, i, vecs, nr_io_queues, size; 146757dacad5SJay Sternberg 146857dacad5SJay Sternberg nr_io_queues = num_possible_cpus(); 14699a0be7abSChristoph Hellwig result = nvme_set_queue_count(&dev->ctrl, &nr_io_queues); 14709a0be7abSChristoph Hellwig if (result < 0) 147157dacad5SJay Sternberg return result; 14729a0be7abSChristoph Hellwig 14739a0be7abSChristoph Hellwig /* 14749a0be7abSChristoph Hellwig * Degraded controllers might return an error when setting the queue 14759a0be7abSChristoph Hellwig * count. We still want to be able to bring them online and offer 14769a0be7abSChristoph Hellwig * access to the admin queue, as that might be only way to fix them up. 14779a0be7abSChristoph Hellwig */ 14789a0be7abSChristoph Hellwig if (result > 0) { 14791b3c47c1SSagi Grimberg dev_err(dev->ctrl.device, 14801b3c47c1SSagi Grimberg "Could not set queue count (%d)\n", result); 14819a0be7abSChristoph Hellwig nr_io_queues = 0; 14829a0be7abSChristoph Hellwig result = 0; 14839a0be7abSChristoph Hellwig } 148457dacad5SJay Sternberg 148557dacad5SJay Sternberg if (dev->cmb && NVME_CMB_SQS(dev->cmbsz)) { 148657dacad5SJay Sternberg result = nvme_cmb_qdepth(dev, nr_io_queues, 148757dacad5SJay Sternberg sizeof(struct nvme_command)); 148857dacad5SJay Sternberg if (result > 0) 148957dacad5SJay Sternberg dev->q_depth = result; 149057dacad5SJay Sternberg else 149157dacad5SJay Sternberg nvme_release_cmb(dev); 149257dacad5SJay Sternberg } 149357dacad5SJay Sternberg 149457dacad5SJay Sternberg size = db_bar_size(dev, nr_io_queues); 149557dacad5SJay Sternberg if (size > 8192) { 149657dacad5SJay Sternberg iounmap(dev->bar); 149757dacad5SJay Sternberg do { 149857dacad5SJay Sternberg dev->bar = ioremap(pci_resource_start(pdev, 0), size); 149957dacad5SJay Sternberg if (dev->bar) 150057dacad5SJay Sternberg break; 150157dacad5SJay Sternberg if (!--nr_io_queues) 150257dacad5SJay Sternberg return -ENOMEM; 150357dacad5SJay Sternberg size = db_bar_size(dev, nr_io_queues); 150457dacad5SJay Sternberg } while (1); 15057a67cbeaSChristoph Hellwig dev->dbs = dev->bar + 4096; 150657dacad5SJay Sternberg adminq->q_db = dev->dbs; 150757dacad5SJay Sternberg } 150857dacad5SJay Sternberg 150957dacad5SJay Sternberg /* Deregister the admin queue's interrupt */ 151057dacad5SJay Sternberg free_irq(dev->entry[0].vector, adminq); 151157dacad5SJay Sternberg 151257dacad5SJay Sternberg /* 151357dacad5SJay Sternberg * If we enable msix early due to not intx, disable it again before 151457dacad5SJay Sternberg * setting up the full range we need. 151557dacad5SJay Sternberg */ 151657dacad5SJay Sternberg if (!pdev->irq) 151757dacad5SJay Sternberg pci_disable_msix(pdev); 151857dacad5SJay Sternberg 151957dacad5SJay Sternberg for (i = 0; i < nr_io_queues; i++) 152057dacad5SJay Sternberg dev->entry[i].entry = i; 152157dacad5SJay Sternberg vecs = pci_enable_msix_range(pdev, dev->entry, 1, nr_io_queues); 152257dacad5SJay Sternberg if (vecs < 0) { 152357dacad5SJay Sternberg vecs = pci_enable_msi_range(pdev, 1, min(nr_io_queues, 32)); 152457dacad5SJay Sternberg if (vecs < 0) { 152557dacad5SJay Sternberg vecs = 1; 152657dacad5SJay Sternberg } else { 152757dacad5SJay Sternberg for (i = 0; i < vecs; i++) 152857dacad5SJay Sternberg dev->entry[i].vector = i + pdev->irq; 152957dacad5SJay Sternberg } 153057dacad5SJay Sternberg } 153157dacad5SJay Sternberg 153257dacad5SJay Sternberg /* 153357dacad5SJay Sternberg * Should investigate if there's a performance win from allocating 153457dacad5SJay Sternberg * more queues than interrupt vectors; it might allow the submission 153557dacad5SJay Sternberg * path to scale better, even if the receive path is limited by the 153657dacad5SJay Sternberg * number of interrupts. 153757dacad5SJay Sternberg */ 153857dacad5SJay Sternberg nr_io_queues = vecs; 153957dacad5SJay Sternberg dev->max_qid = nr_io_queues; 154057dacad5SJay Sternberg 154157dacad5SJay Sternberg result = queue_request_irq(dev, adminq, adminq->irqname); 154257dacad5SJay Sternberg if (result) { 154357dacad5SJay Sternberg adminq->cq_vector = -1; 154457dacad5SJay Sternberg goto free_queues; 154557dacad5SJay Sternberg } 1546749941f2SChristoph Hellwig return nvme_create_io_queues(dev); 154757dacad5SJay Sternberg 154857dacad5SJay Sternberg free_queues: 154957dacad5SJay Sternberg nvme_free_queues(dev, 1); 155057dacad5SJay Sternberg return result; 155157dacad5SJay Sternberg } 155257dacad5SJay Sternberg 155357dacad5SJay Sternberg static void nvme_set_irq_hints(struct nvme_dev *dev) 155457dacad5SJay Sternberg { 155557dacad5SJay Sternberg struct nvme_queue *nvmeq; 155657dacad5SJay Sternberg int i; 155757dacad5SJay Sternberg 155857dacad5SJay Sternberg for (i = 0; i < dev->online_queues; i++) { 155957dacad5SJay Sternberg nvmeq = dev->queues[i]; 156057dacad5SJay Sternberg 156157dacad5SJay Sternberg if (!nvmeq->tags || !(*nvmeq->tags)) 156257dacad5SJay Sternberg continue; 156357dacad5SJay Sternberg 156457dacad5SJay Sternberg irq_set_affinity_hint(dev->entry[nvmeq->cq_vector].vector, 156557dacad5SJay Sternberg blk_mq_tags_cpumask(*nvmeq->tags)); 156657dacad5SJay Sternberg } 156757dacad5SJay Sternberg } 156857dacad5SJay Sternberg 156957dacad5SJay Sternberg static void nvme_dev_scan(struct work_struct *work) 157057dacad5SJay Sternberg { 157157dacad5SJay Sternberg struct nvme_dev *dev = container_of(work, struct nvme_dev, scan_work); 157257dacad5SJay Sternberg 157357dacad5SJay Sternberg if (!dev->tagset.tags) 157457dacad5SJay Sternberg return; 15755bae7f73SChristoph Hellwig nvme_scan_namespaces(&dev->ctrl); 157657dacad5SJay Sternberg nvme_set_irq_hints(dev); 157757dacad5SJay Sternberg } 157857dacad5SJay Sternberg 1579db3cbfffSKeith Busch static void nvme_del_queue_end(struct request *req, int error) 1580db3cbfffSKeith Busch { 1581db3cbfffSKeith Busch struct nvme_queue *nvmeq = req->end_io_data; 1582db3cbfffSKeith Busch 1583db3cbfffSKeith Busch blk_mq_free_request(req); 1584db3cbfffSKeith Busch complete(&nvmeq->dev->ioq_wait); 1585db3cbfffSKeith Busch } 1586db3cbfffSKeith Busch 1587db3cbfffSKeith Busch static void nvme_del_cq_end(struct request *req, int error) 1588db3cbfffSKeith Busch { 1589db3cbfffSKeith Busch struct nvme_queue *nvmeq = req->end_io_data; 1590db3cbfffSKeith Busch 1591db3cbfffSKeith Busch if (!error) { 1592db3cbfffSKeith Busch unsigned long flags; 1593db3cbfffSKeith Busch 1594db3cbfffSKeith Busch spin_lock_irqsave(&nvmeq->q_lock, flags); 1595db3cbfffSKeith Busch nvme_process_cq(nvmeq); 1596db3cbfffSKeith Busch spin_unlock_irqrestore(&nvmeq->q_lock, flags); 1597db3cbfffSKeith Busch } 1598db3cbfffSKeith Busch 1599db3cbfffSKeith Busch nvme_del_queue_end(req, error); 1600db3cbfffSKeith Busch } 1601db3cbfffSKeith Busch 1602db3cbfffSKeith Busch static int nvme_delete_queue(struct nvme_queue *nvmeq, u8 opcode) 1603db3cbfffSKeith Busch { 1604db3cbfffSKeith Busch struct request_queue *q = nvmeq->dev->ctrl.admin_q; 1605db3cbfffSKeith Busch struct request *req; 1606db3cbfffSKeith Busch struct nvme_command cmd; 1607db3cbfffSKeith Busch 1608db3cbfffSKeith Busch memset(&cmd, 0, sizeof(cmd)); 1609db3cbfffSKeith Busch cmd.delete_queue.opcode = opcode; 1610db3cbfffSKeith Busch cmd.delete_queue.qid = cpu_to_le16(nvmeq->qid); 1611db3cbfffSKeith Busch 1612db3cbfffSKeith Busch req = nvme_alloc_request(q, &cmd, BLK_MQ_REQ_NOWAIT); 1613db3cbfffSKeith Busch if (IS_ERR(req)) 1614db3cbfffSKeith Busch return PTR_ERR(req); 1615db3cbfffSKeith Busch 1616db3cbfffSKeith Busch req->timeout = ADMIN_TIMEOUT; 1617db3cbfffSKeith Busch req->end_io_data = nvmeq; 1618db3cbfffSKeith Busch 1619db3cbfffSKeith Busch blk_execute_rq_nowait(q, NULL, req, false, 1620db3cbfffSKeith Busch opcode == nvme_admin_delete_cq ? 1621db3cbfffSKeith Busch nvme_del_cq_end : nvme_del_queue_end); 1622db3cbfffSKeith Busch return 0; 1623db3cbfffSKeith Busch } 1624db3cbfffSKeith Busch 1625db3cbfffSKeith Busch static void nvme_disable_io_queues(struct nvme_dev *dev) 1626db3cbfffSKeith Busch { 1627db3cbfffSKeith Busch int pass; 1628db3cbfffSKeith Busch unsigned long timeout; 1629db3cbfffSKeith Busch u8 opcode = nvme_admin_delete_sq; 1630db3cbfffSKeith Busch 1631db3cbfffSKeith Busch for (pass = 0; pass < 2; pass++) { 1632db3cbfffSKeith Busch int sent = 0, i = dev->queue_count - 1; 1633db3cbfffSKeith Busch 1634db3cbfffSKeith Busch reinit_completion(&dev->ioq_wait); 1635db3cbfffSKeith Busch retry: 1636db3cbfffSKeith Busch timeout = ADMIN_TIMEOUT; 1637db3cbfffSKeith Busch for (; i > 0; i--) { 1638db3cbfffSKeith Busch struct nvme_queue *nvmeq = dev->queues[i]; 1639db3cbfffSKeith Busch 1640db3cbfffSKeith Busch if (!pass) 1641db3cbfffSKeith Busch nvme_suspend_queue(nvmeq); 1642db3cbfffSKeith Busch if (nvme_delete_queue(nvmeq, opcode)) 1643db3cbfffSKeith Busch break; 1644db3cbfffSKeith Busch ++sent; 1645db3cbfffSKeith Busch } 1646db3cbfffSKeith Busch while (sent--) { 1647db3cbfffSKeith Busch timeout = wait_for_completion_io_timeout(&dev->ioq_wait, timeout); 1648db3cbfffSKeith Busch if (timeout == 0) 1649db3cbfffSKeith Busch return; 1650db3cbfffSKeith Busch if (i) 1651db3cbfffSKeith Busch goto retry; 1652db3cbfffSKeith Busch } 1653db3cbfffSKeith Busch opcode = nvme_admin_delete_cq; 1654db3cbfffSKeith Busch } 1655db3cbfffSKeith Busch } 1656db3cbfffSKeith Busch 165757dacad5SJay Sternberg /* 165857dacad5SJay Sternberg * Return: error value if an error occurred setting up the queues or calling 165957dacad5SJay Sternberg * Identify Device. 0 if these succeeded, even if adding some of the 166057dacad5SJay Sternberg * namespaces failed. At the moment, these failures are silent. TBD which 166157dacad5SJay Sternberg * failures should be reported. 166257dacad5SJay Sternberg */ 166357dacad5SJay Sternberg static int nvme_dev_add(struct nvme_dev *dev) 166457dacad5SJay Sternberg { 16655bae7f73SChristoph Hellwig if (!dev->ctrl.tagset) { 166657dacad5SJay Sternberg dev->tagset.ops = &nvme_mq_ops; 166757dacad5SJay Sternberg dev->tagset.nr_hw_queues = dev->online_queues - 1; 166857dacad5SJay Sternberg dev->tagset.timeout = NVME_IO_TIMEOUT; 166957dacad5SJay Sternberg dev->tagset.numa_node = dev_to_node(dev->dev); 167057dacad5SJay Sternberg dev->tagset.queue_depth = 167157dacad5SJay Sternberg min_t(int, dev->q_depth, BLK_MQ_MAX_DEPTH) - 1; 167257dacad5SJay Sternberg dev->tagset.cmd_size = nvme_cmd_size(dev); 167357dacad5SJay Sternberg dev->tagset.flags = BLK_MQ_F_SHOULD_MERGE; 167457dacad5SJay Sternberg dev->tagset.driver_data = dev; 167557dacad5SJay Sternberg 167657dacad5SJay Sternberg if (blk_mq_alloc_tag_set(&dev->tagset)) 167757dacad5SJay Sternberg return 0; 16785bae7f73SChristoph Hellwig dev->ctrl.tagset = &dev->tagset; 1679949928c1SKeith Busch } else { 1680949928c1SKeith Busch blk_mq_update_nr_hw_queues(&dev->tagset, dev->online_queues - 1); 1681949928c1SKeith Busch 1682949928c1SKeith Busch /* Free previously allocated queues that are no longer usable */ 1683949928c1SKeith Busch nvme_free_queues(dev, dev->online_queues); 168457dacad5SJay Sternberg } 1685949928c1SKeith Busch 1686646017a6SKeith Busch nvme_queue_scan(dev); 168757dacad5SJay Sternberg return 0; 168857dacad5SJay Sternberg } 168957dacad5SJay Sternberg 1690b00a726aSKeith Busch static int nvme_pci_enable(struct nvme_dev *dev) 169157dacad5SJay Sternberg { 169257dacad5SJay Sternberg u64 cap; 1693b00a726aSKeith Busch int result = -ENOMEM; 169457dacad5SJay Sternberg struct pci_dev *pdev = to_pci_dev(dev->dev); 169557dacad5SJay Sternberg 169657dacad5SJay Sternberg if (pci_enable_device_mem(pdev)) 169757dacad5SJay Sternberg return result; 169857dacad5SJay Sternberg 169957dacad5SJay Sternberg dev->entry[0].vector = pdev->irq; 170057dacad5SJay Sternberg pci_set_master(pdev); 170157dacad5SJay Sternberg 170257dacad5SJay Sternberg if (dma_set_mask_and_coherent(dev->dev, DMA_BIT_MASK(64)) && 170357dacad5SJay Sternberg dma_set_mask_and_coherent(dev->dev, DMA_BIT_MASK(32))) 170457dacad5SJay Sternberg goto disable; 170557dacad5SJay Sternberg 17067a67cbeaSChristoph Hellwig if (readl(dev->bar + NVME_REG_CSTS) == -1) { 170757dacad5SJay Sternberg result = -ENODEV; 1708b00a726aSKeith Busch goto disable; 170957dacad5SJay Sternberg } 171057dacad5SJay Sternberg 171157dacad5SJay Sternberg /* 171257dacad5SJay Sternberg * Some devices don't advertse INTx interrupts, pre-enable a single 171357dacad5SJay Sternberg * MSIX vec for setup. We'll adjust this later. 171457dacad5SJay Sternberg */ 171557dacad5SJay Sternberg if (!pdev->irq) { 171657dacad5SJay Sternberg result = pci_enable_msix(pdev, dev->entry, 1); 171757dacad5SJay Sternberg if (result < 0) 1718b00a726aSKeith Busch goto disable; 171957dacad5SJay Sternberg } 172057dacad5SJay Sternberg 17217a67cbeaSChristoph Hellwig cap = lo_hi_readq(dev->bar + NVME_REG_CAP); 17227a67cbeaSChristoph Hellwig 172357dacad5SJay Sternberg dev->q_depth = min_t(int, NVME_CAP_MQES(cap) + 1, NVME_Q_DEPTH); 172457dacad5SJay Sternberg dev->db_stride = 1 << NVME_CAP_STRIDE(cap); 17257a67cbeaSChristoph Hellwig dev->dbs = dev->bar + 4096; 17261f390c1fSStephan Günther 17271f390c1fSStephan Günther /* 17281f390c1fSStephan Günther * Temporary fix for the Apple controller found in the MacBook8,1 and 17291f390c1fSStephan Günther * some MacBook7,1 to avoid controller resets and data loss. 17301f390c1fSStephan Günther */ 17311f390c1fSStephan Günther if (pdev->vendor == PCI_VENDOR_ID_APPLE && pdev->device == 0x2001) { 17321f390c1fSStephan Günther dev->q_depth = 2; 17331f390c1fSStephan Günther dev_warn(dev->dev, "detected Apple NVMe controller, set " 17341f390c1fSStephan Günther "queue depth=%u to work around controller resets\n", 17351f390c1fSStephan Günther dev->q_depth); 17361f390c1fSStephan Günther } 17371f390c1fSStephan Günther 17387a67cbeaSChristoph Hellwig if (readl(dev->bar + NVME_REG_VS) >= NVME_VS(1, 2)) 173957dacad5SJay Sternberg dev->cmb = nvme_map_cmb(dev); 174057dacad5SJay Sternberg 1741a0a3408eSKeith Busch pci_enable_pcie_error_reporting(pdev); 1742a0a3408eSKeith Busch pci_save_state(pdev); 174357dacad5SJay Sternberg return 0; 174457dacad5SJay Sternberg 174557dacad5SJay Sternberg disable: 174657dacad5SJay Sternberg pci_disable_device(pdev); 174757dacad5SJay Sternberg return result; 174857dacad5SJay Sternberg } 174957dacad5SJay Sternberg 175057dacad5SJay Sternberg static void nvme_dev_unmap(struct nvme_dev *dev) 175157dacad5SJay Sternberg { 1752b00a726aSKeith Busch if (dev->bar) 1753b00a726aSKeith Busch iounmap(dev->bar); 1754b00a726aSKeith Busch pci_release_regions(to_pci_dev(dev->dev)); 1755b00a726aSKeith Busch } 1756b00a726aSKeith Busch 1757b00a726aSKeith Busch static void nvme_pci_disable(struct nvme_dev *dev) 1758b00a726aSKeith Busch { 175957dacad5SJay Sternberg struct pci_dev *pdev = to_pci_dev(dev->dev); 176057dacad5SJay Sternberg 176157dacad5SJay Sternberg if (pdev->msi_enabled) 176257dacad5SJay Sternberg pci_disable_msi(pdev); 176357dacad5SJay Sternberg else if (pdev->msix_enabled) 176457dacad5SJay Sternberg pci_disable_msix(pdev); 176557dacad5SJay Sternberg 1766a0a3408eSKeith Busch if (pci_is_enabled(pdev)) { 1767a0a3408eSKeith Busch pci_disable_pcie_error_reporting(pdev); 176857dacad5SJay Sternberg pci_disable_device(pdev); 176957dacad5SJay Sternberg } 1770a0a3408eSKeith Busch } 177157dacad5SJay Sternberg 1772a5cdb68cSKeith Busch static void nvme_dev_disable(struct nvme_dev *dev, bool shutdown) 177357dacad5SJay Sternberg { 177457dacad5SJay Sternberg int i; 177557dacad5SJay Sternberg u32 csts = -1; 177657dacad5SJay Sternberg 17772d55cd5fSChristoph Hellwig del_timer_sync(&dev->watchdog_timer); 177857dacad5SJay Sternberg 177977bf25eaSKeith Busch mutex_lock(&dev->shutdown_lock); 1780b00a726aSKeith Busch if (pci_is_enabled(to_pci_dev(dev->dev))) { 178125646264SKeith Busch nvme_stop_queues(&dev->ctrl); 17827a67cbeaSChristoph Hellwig csts = readl(dev->bar + NVME_REG_CSTS); 178357dacad5SJay Sternberg } 178457dacad5SJay Sternberg if (csts & NVME_CSTS_CFS || !(csts & NVME_CSTS_RDY)) { 178557dacad5SJay Sternberg for (i = dev->queue_count - 1; i >= 0; i--) { 178657dacad5SJay Sternberg struct nvme_queue *nvmeq = dev->queues[i]; 178757dacad5SJay Sternberg nvme_suspend_queue(nvmeq); 178857dacad5SJay Sternberg } 178957dacad5SJay Sternberg } else { 179057dacad5SJay Sternberg nvme_disable_io_queues(dev); 1791a5cdb68cSKeith Busch nvme_disable_admin_queue(dev, shutdown); 179257dacad5SJay Sternberg } 1793b00a726aSKeith Busch nvme_pci_disable(dev); 179457dacad5SJay Sternberg 179557dacad5SJay Sternberg for (i = dev->queue_count - 1; i >= 0; i--) 179657dacad5SJay Sternberg nvme_clear_queue(dev->queues[i]); 179777bf25eaSKeith Busch mutex_unlock(&dev->shutdown_lock); 179857dacad5SJay Sternberg } 179957dacad5SJay Sternberg 180057dacad5SJay Sternberg static int nvme_setup_prp_pools(struct nvme_dev *dev) 180157dacad5SJay Sternberg { 180257dacad5SJay Sternberg dev->prp_page_pool = dma_pool_create("prp list page", dev->dev, 180357dacad5SJay Sternberg PAGE_SIZE, PAGE_SIZE, 0); 180457dacad5SJay Sternberg if (!dev->prp_page_pool) 180557dacad5SJay Sternberg return -ENOMEM; 180657dacad5SJay Sternberg 180757dacad5SJay Sternberg /* Optimisation for I/Os between 4k and 128k */ 180857dacad5SJay Sternberg dev->prp_small_pool = dma_pool_create("prp list 256", dev->dev, 180957dacad5SJay Sternberg 256, 256, 0); 181057dacad5SJay Sternberg if (!dev->prp_small_pool) { 181157dacad5SJay Sternberg dma_pool_destroy(dev->prp_page_pool); 181257dacad5SJay Sternberg return -ENOMEM; 181357dacad5SJay Sternberg } 181457dacad5SJay Sternberg return 0; 181557dacad5SJay Sternberg } 181657dacad5SJay Sternberg 181757dacad5SJay Sternberg static void nvme_release_prp_pools(struct nvme_dev *dev) 181857dacad5SJay Sternberg { 181957dacad5SJay Sternberg dma_pool_destroy(dev->prp_page_pool); 182057dacad5SJay Sternberg dma_pool_destroy(dev->prp_small_pool); 182157dacad5SJay Sternberg } 182257dacad5SJay Sternberg 18231673f1f0SChristoph Hellwig static void nvme_pci_free_ctrl(struct nvme_ctrl *ctrl) 182457dacad5SJay Sternberg { 18251673f1f0SChristoph Hellwig struct nvme_dev *dev = to_nvme_dev(ctrl); 182657dacad5SJay Sternberg 182757dacad5SJay Sternberg put_device(dev->dev); 182857dacad5SJay Sternberg if (dev->tagset.tags) 182957dacad5SJay Sternberg blk_mq_free_tag_set(&dev->tagset); 18301c63dc66SChristoph Hellwig if (dev->ctrl.admin_q) 18311c63dc66SChristoph Hellwig blk_put_queue(dev->ctrl.admin_q); 183257dacad5SJay Sternberg kfree(dev->queues); 183357dacad5SJay Sternberg kfree(dev->entry); 183457dacad5SJay Sternberg kfree(dev); 183557dacad5SJay Sternberg } 183657dacad5SJay Sternberg 1837f58944e2SKeith Busch static void nvme_remove_dead_ctrl(struct nvme_dev *dev, int status) 1838f58944e2SKeith Busch { 1839237045fcSLinus Torvalds dev_warn(dev->ctrl.device, "Removing after probe failure status: %d\n", status); 1840f58944e2SKeith Busch 1841f58944e2SKeith Busch kref_get(&dev->ctrl.kref); 184269d9a99cSKeith Busch nvme_dev_disable(dev, false); 1843f58944e2SKeith Busch if (!schedule_work(&dev->remove_work)) 1844f58944e2SKeith Busch nvme_put_ctrl(&dev->ctrl); 1845f58944e2SKeith Busch } 1846f58944e2SKeith Busch 1847fd634f41SChristoph Hellwig static void nvme_reset_work(struct work_struct *work) 184857dacad5SJay Sternberg { 1849fd634f41SChristoph Hellwig struct nvme_dev *dev = container_of(work, struct nvme_dev, reset_work); 1850f58944e2SKeith Busch int result = -ENODEV; 185157dacad5SJay Sternberg 1852fd634f41SChristoph Hellwig if (WARN_ON(test_bit(NVME_CTRL_RESETTING, &dev->flags))) 1853fd634f41SChristoph Hellwig goto out; 1854fd634f41SChristoph Hellwig 1855fd634f41SChristoph Hellwig /* 1856fd634f41SChristoph Hellwig * If we're called to reset a live controller first shut it down before 1857fd634f41SChristoph Hellwig * moving on. 1858fd634f41SChristoph Hellwig */ 1859b00a726aSKeith Busch if (dev->ctrl.ctrl_config & NVME_CC_ENABLE) 1860a5cdb68cSKeith Busch nvme_dev_disable(dev, false); 1861fd634f41SChristoph Hellwig 1862fd634f41SChristoph Hellwig set_bit(NVME_CTRL_RESETTING, &dev->flags); 1863fd634f41SChristoph Hellwig 1864b00a726aSKeith Busch result = nvme_pci_enable(dev); 186557dacad5SJay Sternberg if (result) 186657dacad5SJay Sternberg goto out; 186757dacad5SJay Sternberg 186857dacad5SJay Sternberg result = nvme_configure_admin_queue(dev); 186957dacad5SJay Sternberg if (result) 1870f58944e2SKeith Busch goto out; 187157dacad5SJay Sternberg 187257dacad5SJay Sternberg nvme_init_queue(dev->queues[0], 0); 187357dacad5SJay Sternberg result = nvme_alloc_admin_tags(dev); 187457dacad5SJay Sternberg if (result) 1875f58944e2SKeith Busch goto out; 187657dacad5SJay Sternberg 1877ce4541f4SChristoph Hellwig result = nvme_init_identify(&dev->ctrl); 1878ce4541f4SChristoph Hellwig if (result) 1879f58944e2SKeith Busch goto out; 1880ce4541f4SChristoph Hellwig 188157dacad5SJay Sternberg result = nvme_setup_io_queues(dev); 188257dacad5SJay Sternberg if (result) 1883f58944e2SKeith Busch goto out; 188457dacad5SJay Sternberg 1885adf68f21SChristoph Hellwig dev->ctrl.event_limit = NVME_NR_AEN_COMMANDS; 18869396dec9SChristoph Hellwig queue_work(nvme_workq, &dev->async_work); 188757dacad5SJay Sternberg 18882d55cd5fSChristoph Hellwig mod_timer(&dev->watchdog_timer, round_jiffies(jiffies + HZ)); 188957dacad5SJay Sternberg 189057dacad5SJay Sternberg /* 189157dacad5SJay Sternberg * Keep the controller around but remove all namespaces if we don't have 189257dacad5SJay Sternberg * any working I/O queue. 189357dacad5SJay Sternberg */ 189457dacad5SJay Sternberg if (dev->online_queues < 2) { 18951b3c47c1SSagi Grimberg dev_warn(dev->ctrl.device, "IO queues not created\n"); 18965bae7f73SChristoph Hellwig nvme_remove_namespaces(&dev->ctrl); 189757dacad5SJay Sternberg } else { 189825646264SKeith Busch nvme_start_queues(&dev->ctrl); 189957dacad5SJay Sternberg nvme_dev_add(dev); 190057dacad5SJay Sternberg } 190157dacad5SJay Sternberg 1902fd634f41SChristoph Hellwig clear_bit(NVME_CTRL_RESETTING, &dev->flags); 190357dacad5SJay Sternberg return; 190457dacad5SJay Sternberg 190557dacad5SJay Sternberg out: 1906f58944e2SKeith Busch nvme_remove_dead_ctrl(dev, result); 190757dacad5SJay Sternberg } 190857dacad5SJay Sternberg 19095c8809e6SChristoph Hellwig static void nvme_remove_dead_ctrl_work(struct work_struct *work) 191057dacad5SJay Sternberg { 19115c8809e6SChristoph Hellwig struct nvme_dev *dev = container_of(work, struct nvme_dev, remove_work); 191257dacad5SJay Sternberg struct pci_dev *pdev = to_pci_dev(dev->dev); 191357dacad5SJay Sternberg 191469d9a99cSKeith Busch nvme_kill_queues(&dev->ctrl); 191557dacad5SJay Sternberg if (pci_get_drvdata(pdev)) 191657dacad5SJay Sternberg pci_stop_and_remove_bus_device_locked(pdev); 19171673f1f0SChristoph Hellwig nvme_put_ctrl(&dev->ctrl); 191857dacad5SJay Sternberg } 191957dacad5SJay Sternberg 192057dacad5SJay Sternberg static int nvme_reset(struct nvme_dev *dev) 192157dacad5SJay Sternberg { 19221c63dc66SChristoph Hellwig if (!dev->ctrl.admin_q || blk_queue_dying(dev->ctrl.admin_q)) 192357dacad5SJay Sternberg return -ENODEV; 192457dacad5SJay Sternberg 1925846cc05fSChristoph Hellwig if (!queue_work(nvme_workq, &dev->reset_work)) 1926846cc05fSChristoph Hellwig return -EBUSY; 192757dacad5SJay Sternberg 192857dacad5SJay Sternberg flush_work(&dev->reset_work); 192957dacad5SJay Sternberg return 0; 193057dacad5SJay Sternberg } 193157dacad5SJay Sternberg 19321c63dc66SChristoph Hellwig static int nvme_pci_reg_read32(struct nvme_ctrl *ctrl, u32 off, u32 *val) 193357dacad5SJay Sternberg { 19341c63dc66SChristoph Hellwig *val = readl(to_nvme_dev(ctrl)->bar + off); 19351c63dc66SChristoph Hellwig return 0; 193657dacad5SJay Sternberg } 19371c63dc66SChristoph Hellwig 19385fd4ce1bSChristoph Hellwig static int nvme_pci_reg_write32(struct nvme_ctrl *ctrl, u32 off, u32 val) 19395fd4ce1bSChristoph Hellwig { 19405fd4ce1bSChristoph Hellwig writel(val, to_nvme_dev(ctrl)->bar + off); 19415fd4ce1bSChristoph Hellwig return 0; 19425fd4ce1bSChristoph Hellwig } 19435fd4ce1bSChristoph Hellwig 19447fd8930fSChristoph Hellwig static int nvme_pci_reg_read64(struct nvme_ctrl *ctrl, u32 off, u64 *val) 19457fd8930fSChristoph Hellwig { 19467fd8930fSChristoph Hellwig *val = readq(to_nvme_dev(ctrl)->bar + off); 19477fd8930fSChristoph Hellwig return 0; 19487fd8930fSChristoph Hellwig } 19497fd8930fSChristoph Hellwig 19505bae7f73SChristoph Hellwig static bool nvme_pci_io_incapable(struct nvme_ctrl *ctrl) 19515bae7f73SChristoph Hellwig { 19525bae7f73SChristoph Hellwig struct nvme_dev *dev = to_nvme_dev(ctrl); 19535bae7f73SChristoph Hellwig 19545bae7f73SChristoph Hellwig return !dev->bar || dev->online_queues < 2; 19555bae7f73SChristoph Hellwig } 19565bae7f73SChristoph Hellwig 1957f3ca80fcSChristoph Hellwig static int nvme_pci_reset_ctrl(struct nvme_ctrl *ctrl) 1958f3ca80fcSChristoph Hellwig { 1959f3ca80fcSChristoph Hellwig return nvme_reset(to_nvme_dev(ctrl)); 1960f3ca80fcSChristoph Hellwig } 1961f3ca80fcSChristoph Hellwig 19621c63dc66SChristoph Hellwig static const struct nvme_ctrl_ops nvme_pci_ctrl_ops = { 1963e439bb12SSagi Grimberg .module = THIS_MODULE, 19641c63dc66SChristoph Hellwig .reg_read32 = nvme_pci_reg_read32, 19655fd4ce1bSChristoph Hellwig .reg_write32 = nvme_pci_reg_write32, 19667fd8930fSChristoph Hellwig .reg_read64 = nvme_pci_reg_read64, 19675bae7f73SChristoph Hellwig .io_incapable = nvme_pci_io_incapable, 1968f3ca80fcSChristoph Hellwig .reset_ctrl = nvme_pci_reset_ctrl, 19691673f1f0SChristoph Hellwig .free_ctrl = nvme_pci_free_ctrl, 19701c63dc66SChristoph Hellwig }; 197157dacad5SJay Sternberg 1972b00a726aSKeith Busch static int nvme_dev_map(struct nvme_dev *dev) 1973b00a726aSKeith Busch { 1974b00a726aSKeith Busch int bars; 1975b00a726aSKeith Busch struct pci_dev *pdev = to_pci_dev(dev->dev); 1976b00a726aSKeith Busch 1977b00a726aSKeith Busch bars = pci_select_bars(pdev, IORESOURCE_MEM); 1978b00a726aSKeith Busch if (!bars) 1979b00a726aSKeith Busch return -ENODEV; 1980b00a726aSKeith Busch if (pci_request_selected_regions(pdev, bars, "nvme")) 1981b00a726aSKeith Busch return -ENODEV; 1982b00a726aSKeith Busch 1983b00a726aSKeith Busch dev->bar = ioremap(pci_resource_start(pdev, 0), 8192); 1984b00a726aSKeith Busch if (!dev->bar) 1985b00a726aSKeith Busch goto release; 1986b00a726aSKeith Busch 1987b00a726aSKeith Busch return 0; 1988b00a726aSKeith Busch release: 1989b00a726aSKeith Busch pci_release_regions(pdev); 1990b00a726aSKeith Busch return -ENODEV; 1991b00a726aSKeith Busch } 1992b00a726aSKeith Busch 199357dacad5SJay Sternberg static int nvme_probe(struct pci_dev *pdev, const struct pci_device_id *id) 199457dacad5SJay Sternberg { 199557dacad5SJay Sternberg int node, result = -ENOMEM; 199657dacad5SJay Sternberg struct nvme_dev *dev; 199757dacad5SJay Sternberg 199857dacad5SJay Sternberg node = dev_to_node(&pdev->dev); 199957dacad5SJay Sternberg if (node == NUMA_NO_NODE) 200057dacad5SJay Sternberg set_dev_node(&pdev->dev, 0); 200157dacad5SJay Sternberg 200257dacad5SJay Sternberg dev = kzalloc_node(sizeof(*dev), GFP_KERNEL, node); 200357dacad5SJay Sternberg if (!dev) 200457dacad5SJay Sternberg return -ENOMEM; 200557dacad5SJay Sternberg dev->entry = kzalloc_node(num_possible_cpus() * sizeof(*dev->entry), 200657dacad5SJay Sternberg GFP_KERNEL, node); 200757dacad5SJay Sternberg if (!dev->entry) 200857dacad5SJay Sternberg goto free; 200957dacad5SJay Sternberg dev->queues = kzalloc_node((num_possible_cpus() + 1) * sizeof(void *), 201057dacad5SJay Sternberg GFP_KERNEL, node); 201157dacad5SJay Sternberg if (!dev->queues) 201257dacad5SJay Sternberg goto free; 201357dacad5SJay Sternberg 201457dacad5SJay Sternberg dev->dev = get_device(&pdev->dev); 201557dacad5SJay Sternberg pci_set_drvdata(pdev, dev); 201657dacad5SJay Sternberg 2017b00a726aSKeith Busch result = nvme_dev_map(dev); 2018b00a726aSKeith Busch if (result) 2019b00a726aSKeith Busch goto free; 2020b00a726aSKeith Busch 202157dacad5SJay Sternberg INIT_WORK(&dev->scan_work, nvme_dev_scan); 2022f3ca80fcSChristoph Hellwig INIT_WORK(&dev->reset_work, nvme_reset_work); 20235c8809e6SChristoph Hellwig INIT_WORK(&dev->remove_work, nvme_remove_dead_ctrl_work); 20249396dec9SChristoph Hellwig INIT_WORK(&dev->async_work, nvme_async_event_work); 20252d55cd5fSChristoph Hellwig setup_timer(&dev->watchdog_timer, nvme_watchdog_timer, 20262d55cd5fSChristoph Hellwig (unsigned long)dev); 202777bf25eaSKeith Busch mutex_init(&dev->shutdown_lock); 2028db3cbfffSKeith Busch init_completion(&dev->ioq_wait); 2029f3ca80fcSChristoph Hellwig 2030f3ca80fcSChristoph Hellwig result = nvme_setup_prp_pools(dev); 2031f3ca80fcSChristoph Hellwig if (result) 2032f3ca80fcSChristoph Hellwig goto put_pci; 2033f3ca80fcSChristoph Hellwig 2034f3ca80fcSChristoph Hellwig result = nvme_init_ctrl(&dev->ctrl, &pdev->dev, &nvme_pci_ctrl_ops, 2035f3ca80fcSChristoph Hellwig id->driver_data); 2036f3ca80fcSChristoph Hellwig if (result) 2037f3ca80fcSChristoph Hellwig goto release_pools; 2038f3ca80fcSChristoph Hellwig 20391b3c47c1SSagi Grimberg dev_info(dev->ctrl.device, "pci function %s\n", dev_name(&pdev->dev)); 20401b3c47c1SSagi Grimberg 204192f7a162SKeith Busch queue_work(nvme_workq, &dev->reset_work); 204257dacad5SJay Sternberg return 0; 204357dacad5SJay Sternberg 204457dacad5SJay Sternberg release_pools: 204557dacad5SJay Sternberg nvme_release_prp_pools(dev); 204657dacad5SJay Sternberg put_pci: 204757dacad5SJay Sternberg put_device(dev->dev); 2048b00a726aSKeith Busch nvme_dev_unmap(dev); 204957dacad5SJay Sternberg free: 205057dacad5SJay Sternberg kfree(dev->queues); 205157dacad5SJay Sternberg kfree(dev->entry); 205257dacad5SJay Sternberg kfree(dev); 205357dacad5SJay Sternberg return result; 205457dacad5SJay Sternberg } 205557dacad5SJay Sternberg 205657dacad5SJay Sternberg static void nvme_reset_notify(struct pci_dev *pdev, bool prepare) 205757dacad5SJay Sternberg { 205857dacad5SJay Sternberg struct nvme_dev *dev = pci_get_drvdata(pdev); 205957dacad5SJay Sternberg 206057dacad5SJay Sternberg if (prepare) 2061a5cdb68cSKeith Busch nvme_dev_disable(dev, false); 206257dacad5SJay Sternberg else 206392f7a162SKeith Busch queue_work(nvme_workq, &dev->reset_work); 206457dacad5SJay Sternberg } 206557dacad5SJay Sternberg 206657dacad5SJay Sternberg static void nvme_shutdown(struct pci_dev *pdev) 206757dacad5SJay Sternberg { 206857dacad5SJay Sternberg struct nvme_dev *dev = pci_get_drvdata(pdev); 2069a5cdb68cSKeith Busch nvme_dev_disable(dev, true); 207057dacad5SJay Sternberg } 207157dacad5SJay Sternberg 2072f58944e2SKeith Busch /* 2073f58944e2SKeith Busch * The driver's remove may be called on a device in a partially initialized 2074f58944e2SKeith Busch * state. This function must not have any dependencies on the device state in 2075f58944e2SKeith Busch * order to proceed. 2076f58944e2SKeith Busch */ 207757dacad5SJay Sternberg static void nvme_remove(struct pci_dev *pdev) 207857dacad5SJay Sternberg { 207957dacad5SJay Sternberg struct nvme_dev *dev = pci_get_drvdata(pdev); 208057dacad5SJay Sternberg 20812d55cd5fSChristoph Hellwig del_timer_sync(&dev->watchdog_timer); 208257dacad5SJay Sternberg 2083646017a6SKeith Busch set_bit(NVME_CTRL_REMOVING, &dev->flags); 208457dacad5SJay Sternberg pci_set_drvdata(pdev, NULL); 20859396dec9SChristoph Hellwig flush_work(&dev->async_work); 208657dacad5SJay Sternberg flush_work(&dev->scan_work); 20875bae7f73SChristoph Hellwig nvme_remove_namespaces(&dev->ctrl); 208853029b04SKeith Busch nvme_uninit_ctrl(&dev->ctrl); 2089a5cdb68cSKeith Busch nvme_dev_disable(dev, true); 2090ff23a2a1SKeith Busch flush_work(&dev->reset_work); 209157dacad5SJay Sternberg nvme_dev_remove_admin(dev); 209257dacad5SJay Sternberg nvme_free_queues(dev, 0); 209357dacad5SJay Sternberg nvme_release_cmb(dev); 209457dacad5SJay Sternberg nvme_release_prp_pools(dev); 2095b00a726aSKeith Busch nvme_dev_unmap(dev); 20961673f1f0SChristoph Hellwig nvme_put_ctrl(&dev->ctrl); 209757dacad5SJay Sternberg } 209857dacad5SJay Sternberg 209957dacad5SJay Sternberg #ifdef CONFIG_PM_SLEEP 210057dacad5SJay Sternberg static int nvme_suspend(struct device *dev) 210157dacad5SJay Sternberg { 210257dacad5SJay Sternberg struct pci_dev *pdev = to_pci_dev(dev); 210357dacad5SJay Sternberg struct nvme_dev *ndev = pci_get_drvdata(pdev); 210457dacad5SJay Sternberg 2105a5cdb68cSKeith Busch nvme_dev_disable(ndev, true); 210657dacad5SJay Sternberg return 0; 210757dacad5SJay Sternberg } 210857dacad5SJay Sternberg 210957dacad5SJay Sternberg static int nvme_resume(struct device *dev) 211057dacad5SJay Sternberg { 211157dacad5SJay Sternberg struct pci_dev *pdev = to_pci_dev(dev); 211257dacad5SJay Sternberg struct nvme_dev *ndev = pci_get_drvdata(pdev); 211357dacad5SJay Sternberg 211492f7a162SKeith Busch queue_work(nvme_workq, &ndev->reset_work); 211557dacad5SJay Sternberg return 0; 211657dacad5SJay Sternberg } 211757dacad5SJay Sternberg #endif 211857dacad5SJay Sternberg 211957dacad5SJay Sternberg static SIMPLE_DEV_PM_OPS(nvme_dev_pm_ops, nvme_suspend, nvme_resume); 212057dacad5SJay Sternberg 2121a0a3408eSKeith Busch static pci_ers_result_t nvme_error_detected(struct pci_dev *pdev, 2122a0a3408eSKeith Busch pci_channel_state_t state) 2123a0a3408eSKeith Busch { 2124a0a3408eSKeith Busch struct nvme_dev *dev = pci_get_drvdata(pdev); 2125a0a3408eSKeith Busch 2126a0a3408eSKeith Busch /* 2127a0a3408eSKeith Busch * A frozen channel requires a reset. When detected, this method will 2128a0a3408eSKeith Busch * shutdown the controller to quiesce. The controller will be restarted 2129a0a3408eSKeith Busch * after the slot reset through driver's slot_reset callback. 2130a0a3408eSKeith Busch */ 21311b3c47c1SSagi Grimberg dev_warn(dev->ctrl.device, "error detected: state:%d\n", state); 2132a0a3408eSKeith Busch switch (state) { 2133a0a3408eSKeith Busch case pci_channel_io_normal: 2134a0a3408eSKeith Busch return PCI_ERS_RESULT_CAN_RECOVER; 2135a0a3408eSKeith Busch case pci_channel_io_frozen: 2136a5cdb68cSKeith Busch nvme_dev_disable(dev, false); 2137a0a3408eSKeith Busch return PCI_ERS_RESULT_NEED_RESET; 2138a0a3408eSKeith Busch case pci_channel_io_perm_failure: 2139a0a3408eSKeith Busch return PCI_ERS_RESULT_DISCONNECT; 2140a0a3408eSKeith Busch } 2141a0a3408eSKeith Busch return PCI_ERS_RESULT_NEED_RESET; 2142a0a3408eSKeith Busch } 2143a0a3408eSKeith Busch 2144a0a3408eSKeith Busch static pci_ers_result_t nvme_slot_reset(struct pci_dev *pdev) 2145a0a3408eSKeith Busch { 2146a0a3408eSKeith Busch struct nvme_dev *dev = pci_get_drvdata(pdev); 2147a0a3408eSKeith Busch 21481b3c47c1SSagi Grimberg dev_info(dev->ctrl.device, "restart after slot reset\n"); 2149a0a3408eSKeith Busch pci_restore_state(pdev); 2150a0a3408eSKeith Busch queue_work(nvme_workq, &dev->reset_work); 2151a0a3408eSKeith Busch return PCI_ERS_RESULT_RECOVERED; 2152a0a3408eSKeith Busch } 2153a0a3408eSKeith Busch 2154a0a3408eSKeith Busch static void nvme_error_resume(struct pci_dev *pdev) 2155a0a3408eSKeith Busch { 2156a0a3408eSKeith Busch pci_cleanup_aer_uncorrect_error_status(pdev); 2157a0a3408eSKeith Busch } 2158a0a3408eSKeith Busch 215957dacad5SJay Sternberg static const struct pci_error_handlers nvme_err_handler = { 216057dacad5SJay Sternberg .error_detected = nvme_error_detected, 216157dacad5SJay Sternberg .slot_reset = nvme_slot_reset, 216257dacad5SJay Sternberg .resume = nvme_error_resume, 216357dacad5SJay Sternberg .reset_notify = nvme_reset_notify, 216457dacad5SJay Sternberg }; 216557dacad5SJay Sternberg 216657dacad5SJay Sternberg /* Move to pci_ids.h later */ 216757dacad5SJay Sternberg #define PCI_CLASS_STORAGE_EXPRESS 0x010802 216857dacad5SJay Sternberg 216957dacad5SJay Sternberg static const struct pci_device_id nvme_id_table[] = { 2170106198edSChristoph Hellwig { PCI_VDEVICE(INTEL, 0x0953), 217108095e70SKeith Busch .driver_data = NVME_QUIRK_STRIPE_SIZE | 217208095e70SKeith Busch NVME_QUIRK_DISCARD_ZEROES, }, 2173540c801cSKeith Busch { PCI_VDEVICE(INTEL, 0x5845), /* Qemu emulated controller */ 2174540c801cSKeith Busch .driver_data = NVME_QUIRK_IDENTIFY_CNS, }, 217557dacad5SJay Sternberg { PCI_DEVICE_CLASS(PCI_CLASS_STORAGE_EXPRESS, 0xffffff) }, 2176c74dc780SStephan Günther { PCI_DEVICE(PCI_VENDOR_ID_APPLE, 0x2001) }, 217757dacad5SJay Sternberg { 0, } 217857dacad5SJay Sternberg }; 217957dacad5SJay Sternberg MODULE_DEVICE_TABLE(pci, nvme_id_table); 218057dacad5SJay Sternberg 218157dacad5SJay Sternberg static struct pci_driver nvme_driver = { 218257dacad5SJay Sternberg .name = "nvme", 218357dacad5SJay Sternberg .id_table = nvme_id_table, 218457dacad5SJay Sternberg .probe = nvme_probe, 218557dacad5SJay Sternberg .remove = nvme_remove, 218657dacad5SJay Sternberg .shutdown = nvme_shutdown, 218757dacad5SJay Sternberg .driver = { 218857dacad5SJay Sternberg .pm = &nvme_dev_pm_ops, 218957dacad5SJay Sternberg }, 219057dacad5SJay Sternberg .err_handler = &nvme_err_handler, 219157dacad5SJay Sternberg }; 219257dacad5SJay Sternberg 219357dacad5SJay Sternberg static int __init nvme_init(void) 219457dacad5SJay Sternberg { 219557dacad5SJay Sternberg int result; 219657dacad5SJay Sternberg 219792f7a162SKeith Busch nvme_workq = alloc_workqueue("nvme", WQ_UNBOUND | WQ_MEM_RECLAIM, 0); 219857dacad5SJay Sternberg if (!nvme_workq) 219957dacad5SJay Sternberg return -ENOMEM; 220057dacad5SJay Sternberg 220157dacad5SJay Sternberg result = pci_register_driver(&nvme_driver); 220257dacad5SJay Sternberg if (result) 220357dacad5SJay Sternberg destroy_workqueue(nvme_workq); 220457dacad5SJay Sternberg return result; 220557dacad5SJay Sternberg } 220657dacad5SJay Sternberg 220757dacad5SJay Sternberg static void __exit nvme_exit(void) 220857dacad5SJay Sternberg { 220957dacad5SJay Sternberg pci_unregister_driver(&nvme_driver); 221057dacad5SJay Sternberg destroy_workqueue(nvme_workq); 221157dacad5SJay Sternberg _nvme_check_size(); 221257dacad5SJay Sternberg } 221357dacad5SJay Sternberg 221457dacad5SJay Sternberg MODULE_AUTHOR("Matthew Wilcox <willy@linux.intel.com>"); 221557dacad5SJay Sternberg MODULE_LICENSE("GPL"); 221657dacad5SJay Sternberg MODULE_VERSION("1.0"); 221757dacad5SJay Sternberg module_init(nvme_init); 221857dacad5SJay Sternberg module_exit(nvme_exit); 2219