157dacad5SJay Sternberg /* 257dacad5SJay Sternberg * NVM Express device driver 357dacad5SJay Sternberg * Copyright (c) 2011-2014, Intel Corporation. 457dacad5SJay Sternberg * 557dacad5SJay Sternberg * This program is free software; you can redistribute it and/or modify it 657dacad5SJay Sternberg * under the terms and conditions of the GNU General Public License, 757dacad5SJay Sternberg * version 2, as published by the Free Software Foundation. 857dacad5SJay Sternberg * 957dacad5SJay Sternberg * This program is distributed in the hope it will be useful, but WITHOUT 1057dacad5SJay Sternberg * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 1157dacad5SJay Sternberg * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 1257dacad5SJay Sternberg * more details. 1357dacad5SJay Sternberg */ 1457dacad5SJay Sternberg 15a0a3408eSKeith Busch #include <linux/aer.h> 1657dacad5SJay Sternberg #include <linux/bitops.h> 1757dacad5SJay Sternberg #include <linux/blkdev.h> 1857dacad5SJay Sternberg #include <linux/blk-mq.h> 19dca51e78SChristoph Hellwig #include <linux/blk-mq-pci.h> 2057dacad5SJay Sternberg #include <linux/cpu.h> 2157dacad5SJay Sternberg #include <linux/delay.h> 2257dacad5SJay Sternberg #include <linux/errno.h> 2357dacad5SJay Sternberg #include <linux/fs.h> 2457dacad5SJay Sternberg #include <linux/genhd.h> 2557dacad5SJay Sternberg #include <linux/hdreg.h> 2657dacad5SJay Sternberg #include <linux/idr.h> 2757dacad5SJay Sternberg #include <linux/init.h> 2857dacad5SJay Sternberg #include <linux/interrupt.h> 2957dacad5SJay Sternberg #include <linux/io.h> 3057dacad5SJay Sternberg #include <linux/kdev_t.h> 3157dacad5SJay Sternberg #include <linux/kernel.h> 3257dacad5SJay Sternberg #include <linux/mm.h> 3357dacad5SJay Sternberg #include <linux/module.h> 3457dacad5SJay Sternberg #include <linux/moduleparam.h> 3577bf25eaSKeith Busch #include <linux/mutex.h> 3657dacad5SJay Sternberg #include <linux/pci.h> 3757dacad5SJay Sternberg #include <linux/poison.h> 3857dacad5SJay Sternberg #include <linux/ptrace.h> 3957dacad5SJay Sternberg #include <linux/sched.h> 4057dacad5SJay Sternberg #include <linux/slab.h> 4157dacad5SJay Sternberg #include <linux/t10-pi.h> 422d55cd5fSChristoph Hellwig #include <linux/timer.h> 4357dacad5SJay Sternberg #include <linux/types.h> 449cf5c095SLinus Torvalds #include <linux/io-64-nonatomic-lo-hi.h> 451d277a63SKeith Busch #include <asm/unaligned.h> 46a98e58e5SScott Bauer #include <linux/sed-opal.h> 4757dacad5SJay Sternberg 4857dacad5SJay Sternberg #include "nvme.h" 4957dacad5SJay Sternberg 5057dacad5SJay Sternberg #define NVME_Q_DEPTH 1024 5157dacad5SJay Sternberg #define NVME_AQ_DEPTH 256 5257dacad5SJay Sternberg #define SQ_SIZE(depth) (depth * sizeof(struct nvme_command)) 5357dacad5SJay Sternberg #define CQ_SIZE(depth) (depth * sizeof(struct nvme_completion)) 5457dacad5SJay Sternberg 55adf68f21SChristoph Hellwig /* 56adf68f21SChristoph Hellwig * We handle AEN commands ourselves and don't even let the 57adf68f21SChristoph Hellwig * block layer know about them. 58adf68f21SChristoph Hellwig */ 59f866fc42SChristoph Hellwig #define NVME_AQ_BLKMQ_DEPTH (NVME_AQ_DEPTH - NVME_NR_AERS) 60adf68f21SChristoph Hellwig 6157dacad5SJay Sternberg static int use_threaded_interrupts; 6257dacad5SJay Sternberg module_param(use_threaded_interrupts, int, 0); 6357dacad5SJay Sternberg 6457dacad5SJay Sternberg static bool use_cmb_sqes = true; 6557dacad5SJay Sternberg module_param(use_cmb_sqes, bool, 0644); 6657dacad5SJay Sternberg MODULE_PARM_DESC(use_cmb_sqes, "use controller's memory buffer for I/O SQes"); 6757dacad5SJay Sternberg 6857dacad5SJay Sternberg static struct workqueue_struct *nvme_workq; 6957dacad5SJay Sternberg 701c63dc66SChristoph Hellwig struct nvme_dev; 711c63dc66SChristoph Hellwig struct nvme_queue; 7257dacad5SJay Sternberg 7357dacad5SJay Sternberg static int nvme_reset(struct nvme_dev *dev); 74a0fa9647SJens Axboe static void nvme_process_cq(struct nvme_queue *nvmeq); 75a5cdb68cSKeith Busch static void nvme_dev_disable(struct nvme_dev *dev, bool shutdown); 7657dacad5SJay Sternberg 7757dacad5SJay Sternberg /* 781c63dc66SChristoph Hellwig * Represents an NVM Express device. Each nvme_dev is a PCI function. 791c63dc66SChristoph Hellwig */ 801c63dc66SChristoph Hellwig struct nvme_dev { 811c63dc66SChristoph Hellwig struct nvme_queue **queues; 821c63dc66SChristoph Hellwig struct blk_mq_tag_set tagset; 831c63dc66SChristoph Hellwig struct blk_mq_tag_set admin_tagset; 841c63dc66SChristoph Hellwig u32 __iomem *dbs; 851c63dc66SChristoph Hellwig struct device *dev; 861c63dc66SChristoph Hellwig struct dma_pool *prp_page_pool; 871c63dc66SChristoph Hellwig struct dma_pool *prp_small_pool; 881c63dc66SChristoph Hellwig unsigned queue_count; 891c63dc66SChristoph Hellwig unsigned online_queues; 901c63dc66SChristoph Hellwig unsigned max_qid; 911c63dc66SChristoph Hellwig int q_depth; 921c63dc66SChristoph Hellwig u32 db_stride; 931c63dc66SChristoph Hellwig void __iomem *bar; 941c63dc66SChristoph Hellwig struct work_struct reset_work; 955c8809e6SChristoph Hellwig struct work_struct remove_work; 962d55cd5fSChristoph Hellwig struct timer_list watchdog_timer; 9777bf25eaSKeith Busch struct mutex shutdown_lock; 981c63dc66SChristoph Hellwig bool subsystem; 991c63dc66SChristoph Hellwig void __iomem *cmb; 1001c63dc66SChristoph Hellwig dma_addr_t cmb_dma_addr; 1011c63dc66SChristoph Hellwig u64 cmb_size; 1021c63dc66SChristoph Hellwig u32 cmbsz; 103202021c1SStephen Bates u32 cmbloc; 1041c63dc66SChristoph Hellwig struct nvme_ctrl ctrl; 105db3cbfffSKeith Busch struct completion ioq_wait; 10657dacad5SJay Sternberg }; 10757dacad5SJay Sternberg 1081c63dc66SChristoph Hellwig static inline struct nvme_dev *to_nvme_dev(struct nvme_ctrl *ctrl) 1091c63dc66SChristoph Hellwig { 1101c63dc66SChristoph Hellwig return container_of(ctrl, struct nvme_dev, ctrl); 1111c63dc66SChristoph Hellwig } 1121c63dc66SChristoph Hellwig 11357dacad5SJay Sternberg /* 11457dacad5SJay Sternberg * An NVM Express queue. Each device has at least two (one for admin 11557dacad5SJay Sternberg * commands and one for I/O commands). 11657dacad5SJay Sternberg */ 11757dacad5SJay Sternberg struct nvme_queue { 11857dacad5SJay Sternberg struct device *q_dmadev; 11957dacad5SJay Sternberg struct nvme_dev *dev; 12057dacad5SJay Sternberg char irqname[24]; /* nvme4294967295-65535\0 */ 12157dacad5SJay Sternberg spinlock_t q_lock; 12257dacad5SJay Sternberg struct nvme_command *sq_cmds; 12357dacad5SJay Sternberg struct nvme_command __iomem *sq_cmds_io; 12457dacad5SJay Sternberg volatile struct nvme_completion *cqes; 12557dacad5SJay Sternberg struct blk_mq_tags **tags; 12657dacad5SJay Sternberg dma_addr_t sq_dma_addr; 12757dacad5SJay Sternberg dma_addr_t cq_dma_addr; 12857dacad5SJay Sternberg u32 __iomem *q_db; 12957dacad5SJay Sternberg u16 q_depth; 13057dacad5SJay Sternberg s16 cq_vector; 13157dacad5SJay Sternberg u16 sq_tail; 13257dacad5SJay Sternberg u16 cq_head; 13357dacad5SJay Sternberg u16 qid; 13457dacad5SJay Sternberg u8 cq_phase; 13557dacad5SJay Sternberg u8 cqe_seen; 13657dacad5SJay Sternberg }; 13757dacad5SJay Sternberg 13857dacad5SJay Sternberg /* 13971bd150cSChristoph Hellwig * The nvme_iod describes the data in an I/O, including the list of PRP 14071bd150cSChristoph Hellwig * entries. You can't see it in this data structure because C doesn't let 141f4800d6dSChristoph Hellwig * me express that. Use nvme_init_iod to ensure there's enough space 14271bd150cSChristoph Hellwig * allocated to store the PRP list. 14371bd150cSChristoph Hellwig */ 14471bd150cSChristoph Hellwig struct nvme_iod { 145d49187e9SChristoph Hellwig struct nvme_request req; 146f4800d6dSChristoph Hellwig struct nvme_queue *nvmeq; 147f4800d6dSChristoph Hellwig int aborted; 14871bd150cSChristoph Hellwig int npages; /* In the PRP list. 0 means small pool in use */ 14971bd150cSChristoph Hellwig int nents; /* Used in scatterlist */ 15071bd150cSChristoph Hellwig int length; /* Of data, in bytes */ 15171bd150cSChristoph Hellwig dma_addr_t first_dma; 152bf684057SChristoph Hellwig struct scatterlist meta_sg; /* metadata requires single contiguous buffer */ 153f4800d6dSChristoph Hellwig struct scatterlist *sg; 154f4800d6dSChristoph Hellwig struct scatterlist inline_sg[0]; 15557dacad5SJay Sternberg }; 15657dacad5SJay Sternberg 15757dacad5SJay Sternberg /* 15857dacad5SJay Sternberg * Check we didin't inadvertently grow the command struct 15957dacad5SJay Sternberg */ 16057dacad5SJay Sternberg static inline void _nvme_check_size(void) 16157dacad5SJay Sternberg { 16257dacad5SJay Sternberg BUILD_BUG_ON(sizeof(struct nvme_rw_command) != 64); 16357dacad5SJay Sternberg BUILD_BUG_ON(sizeof(struct nvme_create_cq) != 64); 16457dacad5SJay Sternberg BUILD_BUG_ON(sizeof(struct nvme_create_sq) != 64); 16557dacad5SJay Sternberg BUILD_BUG_ON(sizeof(struct nvme_delete_queue) != 64); 16657dacad5SJay Sternberg BUILD_BUG_ON(sizeof(struct nvme_features) != 64); 16757dacad5SJay Sternberg BUILD_BUG_ON(sizeof(struct nvme_format_cmd) != 64); 16857dacad5SJay Sternberg BUILD_BUG_ON(sizeof(struct nvme_abort_cmd) != 64); 16957dacad5SJay Sternberg BUILD_BUG_ON(sizeof(struct nvme_command) != 64); 17057dacad5SJay Sternberg BUILD_BUG_ON(sizeof(struct nvme_id_ctrl) != 4096); 17157dacad5SJay Sternberg BUILD_BUG_ON(sizeof(struct nvme_id_ns) != 4096); 17257dacad5SJay Sternberg BUILD_BUG_ON(sizeof(struct nvme_lba_range_type) != 64); 17357dacad5SJay Sternberg BUILD_BUG_ON(sizeof(struct nvme_smart_log) != 512); 17457dacad5SJay Sternberg } 17557dacad5SJay Sternberg 17657dacad5SJay Sternberg /* 17757dacad5SJay Sternberg * Max size of iod being embedded in the request payload 17857dacad5SJay Sternberg */ 17957dacad5SJay Sternberg #define NVME_INT_PAGES 2 1805fd4ce1bSChristoph Hellwig #define NVME_INT_BYTES(dev) (NVME_INT_PAGES * (dev)->ctrl.page_size) 18157dacad5SJay Sternberg 18257dacad5SJay Sternberg /* 18357dacad5SJay Sternberg * Will slightly overestimate the number of pages needed. This is OK 18457dacad5SJay Sternberg * as it only leads to a small amount of wasted memory for the lifetime of 18557dacad5SJay Sternberg * the I/O. 18657dacad5SJay Sternberg */ 18757dacad5SJay Sternberg static int nvme_npages(unsigned size, struct nvme_dev *dev) 18857dacad5SJay Sternberg { 1895fd4ce1bSChristoph Hellwig unsigned nprps = DIV_ROUND_UP(size + dev->ctrl.page_size, 1905fd4ce1bSChristoph Hellwig dev->ctrl.page_size); 19157dacad5SJay Sternberg return DIV_ROUND_UP(8 * nprps, PAGE_SIZE - 8); 19257dacad5SJay Sternberg } 19357dacad5SJay Sternberg 194f4800d6dSChristoph Hellwig static unsigned int nvme_iod_alloc_size(struct nvme_dev *dev, 195f4800d6dSChristoph Hellwig unsigned int size, unsigned int nseg) 196f4800d6dSChristoph Hellwig { 197f4800d6dSChristoph Hellwig return sizeof(__le64 *) * nvme_npages(size, dev) + 198f4800d6dSChristoph Hellwig sizeof(struct scatterlist) * nseg; 199f4800d6dSChristoph Hellwig } 200f4800d6dSChristoph Hellwig 20157dacad5SJay Sternberg static unsigned int nvme_cmd_size(struct nvme_dev *dev) 20257dacad5SJay Sternberg { 203f4800d6dSChristoph Hellwig return sizeof(struct nvme_iod) + 204f4800d6dSChristoph Hellwig nvme_iod_alloc_size(dev, NVME_INT_BYTES(dev), NVME_INT_PAGES); 20557dacad5SJay Sternberg } 20657dacad5SJay Sternberg 207dca51e78SChristoph Hellwig static int nvmeq_irq(struct nvme_queue *nvmeq) 208dca51e78SChristoph Hellwig { 209dca51e78SChristoph Hellwig return pci_irq_vector(to_pci_dev(nvmeq->dev->dev), nvmeq->cq_vector); 210dca51e78SChristoph Hellwig } 211dca51e78SChristoph Hellwig 21257dacad5SJay Sternberg static int nvme_admin_init_hctx(struct blk_mq_hw_ctx *hctx, void *data, 21357dacad5SJay Sternberg unsigned int hctx_idx) 21457dacad5SJay Sternberg { 21557dacad5SJay Sternberg struct nvme_dev *dev = data; 21657dacad5SJay Sternberg struct nvme_queue *nvmeq = dev->queues[0]; 21757dacad5SJay Sternberg 21857dacad5SJay Sternberg WARN_ON(hctx_idx != 0); 21957dacad5SJay Sternberg WARN_ON(dev->admin_tagset.tags[0] != hctx->tags); 22057dacad5SJay Sternberg WARN_ON(nvmeq->tags); 22157dacad5SJay Sternberg 22257dacad5SJay Sternberg hctx->driver_data = nvmeq; 22357dacad5SJay Sternberg nvmeq->tags = &dev->admin_tagset.tags[0]; 22457dacad5SJay Sternberg return 0; 22557dacad5SJay Sternberg } 22657dacad5SJay Sternberg 22757dacad5SJay Sternberg static void nvme_admin_exit_hctx(struct blk_mq_hw_ctx *hctx, unsigned int hctx_idx) 22857dacad5SJay Sternberg { 22957dacad5SJay Sternberg struct nvme_queue *nvmeq = hctx->driver_data; 23057dacad5SJay Sternberg 23157dacad5SJay Sternberg nvmeq->tags = NULL; 23257dacad5SJay Sternberg } 23357dacad5SJay Sternberg 23457dacad5SJay Sternberg static int nvme_admin_init_request(void *data, struct request *req, 23557dacad5SJay Sternberg unsigned int hctx_idx, unsigned int rq_idx, 23657dacad5SJay Sternberg unsigned int numa_node) 23757dacad5SJay Sternberg { 23857dacad5SJay Sternberg struct nvme_dev *dev = data; 239f4800d6dSChristoph Hellwig struct nvme_iod *iod = blk_mq_rq_to_pdu(req); 24057dacad5SJay Sternberg struct nvme_queue *nvmeq = dev->queues[0]; 24157dacad5SJay Sternberg 24257dacad5SJay Sternberg BUG_ON(!nvmeq); 243f4800d6dSChristoph Hellwig iod->nvmeq = nvmeq; 24457dacad5SJay Sternberg return 0; 24557dacad5SJay Sternberg } 24657dacad5SJay Sternberg 24757dacad5SJay Sternberg static int nvme_init_hctx(struct blk_mq_hw_ctx *hctx, void *data, 24857dacad5SJay Sternberg unsigned int hctx_idx) 24957dacad5SJay Sternberg { 25057dacad5SJay Sternberg struct nvme_dev *dev = data; 25157dacad5SJay Sternberg struct nvme_queue *nvmeq = dev->queues[hctx_idx + 1]; 25257dacad5SJay Sternberg 25357dacad5SJay Sternberg if (!nvmeq->tags) 25457dacad5SJay Sternberg nvmeq->tags = &dev->tagset.tags[hctx_idx]; 25557dacad5SJay Sternberg 25657dacad5SJay Sternberg WARN_ON(dev->tagset.tags[hctx_idx] != hctx->tags); 25757dacad5SJay Sternberg hctx->driver_data = nvmeq; 25857dacad5SJay Sternberg return 0; 25957dacad5SJay Sternberg } 26057dacad5SJay Sternberg 26157dacad5SJay Sternberg static int nvme_init_request(void *data, struct request *req, 26257dacad5SJay Sternberg unsigned int hctx_idx, unsigned int rq_idx, 26357dacad5SJay Sternberg unsigned int numa_node) 26457dacad5SJay Sternberg { 26557dacad5SJay Sternberg struct nvme_dev *dev = data; 266f4800d6dSChristoph Hellwig struct nvme_iod *iod = blk_mq_rq_to_pdu(req); 26757dacad5SJay Sternberg struct nvme_queue *nvmeq = dev->queues[hctx_idx + 1]; 26857dacad5SJay Sternberg 26957dacad5SJay Sternberg BUG_ON(!nvmeq); 270f4800d6dSChristoph Hellwig iod->nvmeq = nvmeq; 27157dacad5SJay Sternberg return 0; 27257dacad5SJay Sternberg } 27357dacad5SJay Sternberg 274dca51e78SChristoph Hellwig static int nvme_pci_map_queues(struct blk_mq_tag_set *set) 275dca51e78SChristoph Hellwig { 276dca51e78SChristoph Hellwig struct nvme_dev *dev = set->driver_data; 277dca51e78SChristoph Hellwig 278dca51e78SChristoph Hellwig return blk_mq_pci_map_queues(set, to_pci_dev(dev->dev)); 279dca51e78SChristoph Hellwig } 280dca51e78SChristoph Hellwig 28157dacad5SJay Sternberg /** 282adf68f21SChristoph Hellwig * __nvme_submit_cmd() - Copy a command into a queue and ring the doorbell 28357dacad5SJay Sternberg * @nvmeq: The queue to use 28457dacad5SJay Sternberg * @cmd: The command to send 28557dacad5SJay Sternberg * 28657dacad5SJay Sternberg * Safe to use from interrupt context 28757dacad5SJay Sternberg */ 28857dacad5SJay Sternberg static void __nvme_submit_cmd(struct nvme_queue *nvmeq, 28957dacad5SJay Sternberg struct nvme_command *cmd) 29057dacad5SJay Sternberg { 29157dacad5SJay Sternberg u16 tail = nvmeq->sq_tail; 29257dacad5SJay Sternberg 29357dacad5SJay Sternberg if (nvmeq->sq_cmds_io) 29457dacad5SJay Sternberg memcpy_toio(&nvmeq->sq_cmds_io[tail], cmd, sizeof(*cmd)); 29557dacad5SJay Sternberg else 29657dacad5SJay Sternberg memcpy(&nvmeq->sq_cmds[tail], cmd, sizeof(*cmd)); 29757dacad5SJay Sternberg 29857dacad5SJay Sternberg if (++tail == nvmeq->q_depth) 29957dacad5SJay Sternberg tail = 0; 30057dacad5SJay Sternberg writel(tail, nvmeq->q_db); 30157dacad5SJay Sternberg nvmeq->sq_tail = tail; 30257dacad5SJay Sternberg } 30357dacad5SJay Sternberg 304f4800d6dSChristoph Hellwig static __le64 **iod_list(struct request *req) 30557dacad5SJay Sternberg { 306f4800d6dSChristoph Hellwig struct nvme_iod *iod = blk_mq_rq_to_pdu(req); 307f9d03f96SChristoph Hellwig return (__le64 **)(iod->sg + blk_rq_nr_phys_segments(req)); 30857dacad5SJay Sternberg } 30957dacad5SJay Sternberg 310b131c61dSChristoph Hellwig static int nvme_init_iod(struct request *rq, struct nvme_dev *dev) 31157dacad5SJay Sternberg { 312f4800d6dSChristoph Hellwig struct nvme_iod *iod = blk_mq_rq_to_pdu(rq); 313f9d03f96SChristoph Hellwig int nseg = blk_rq_nr_phys_segments(rq); 314b131c61dSChristoph Hellwig unsigned int size = blk_rq_payload_bytes(rq); 315f4800d6dSChristoph Hellwig 316f4800d6dSChristoph Hellwig if (nseg > NVME_INT_PAGES || size > NVME_INT_BYTES(dev)) { 317f4800d6dSChristoph Hellwig iod->sg = kmalloc(nvme_iod_alloc_size(dev, size, nseg), GFP_ATOMIC); 318f4800d6dSChristoph Hellwig if (!iod->sg) 319f4800d6dSChristoph Hellwig return BLK_MQ_RQ_QUEUE_BUSY; 320f4800d6dSChristoph Hellwig } else { 321f4800d6dSChristoph Hellwig iod->sg = iod->inline_sg; 32257dacad5SJay Sternberg } 32357dacad5SJay Sternberg 324f4800d6dSChristoph Hellwig iod->aborted = 0; 32557dacad5SJay Sternberg iod->npages = -1; 32657dacad5SJay Sternberg iod->nents = 0; 327f4800d6dSChristoph Hellwig iod->length = size; 328f80ec966SKeith Busch 329bac0000aSOmar Sandoval return BLK_MQ_RQ_QUEUE_OK; 33057dacad5SJay Sternberg } 33157dacad5SJay Sternberg 332f4800d6dSChristoph Hellwig static void nvme_free_iod(struct nvme_dev *dev, struct request *req) 33357dacad5SJay Sternberg { 334f4800d6dSChristoph Hellwig struct nvme_iod *iod = blk_mq_rq_to_pdu(req); 3355fd4ce1bSChristoph Hellwig const int last_prp = dev->ctrl.page_size / 8 - 1; 33657dacad5SJay Sternberg int i; 337f4800d6dSChristoph Hellwig __le64 **list = iod_list(req); 33857dacad5SJay Sternberg dma_addr_t prp_dma = iod->first_dma; 33957dacad5SJay Sternberg 34057dacad5SJay Sternberg if (iod->npages == 0) 34157dacad5SJay Sternberg dma_pool_free(dev->prp_small_pool, list[0], prp_dma); 34257dacad5SJay Sternberg for (i = 0; i < iod->npages; i++) { 34357dacad5SJay Sternberg __le64 *prp_list = list[i]; 34457dacad5SJay Sternberg dma_addr_t next_prp_dma = le64_to_cpu(prp_list[last_prp]); 34557dacad5SJay Sternberg dma_pool_free(dev->prp_page_pool, prp_list, prp_dma); 34657dacad5SJay Sternberg prp_dma = next_prp_dma; 34757dacad5SJay Sternberg } 34857dacad5SJay Sternberg 349f4800d6dSChristoph Hellwig if (iod->sg != iod->inline_sg) 350f4800d6dSChristoph Hellwig kfree(iod->sg); 35157dacad5SJay Sternberg } 35257dacad5SJay Sternberg 35357dacad5SJay Sternberg #ifdef CONFIG_BLK_DEV_INTEGRITY 35457dacad5SJay Sternberg static void nvme_dif_prep(u32 p, u32 v, struct t10_pi_tuple *pi) 35557dacad5SJay Sternberg { 35657dacad5SJay Sternberg if (be32_to_cpu(pi->ref_tag) == v) 35757dacad5SJay Sternberg pi->ref_tag = cpu_to_be32(p); 35857dacad5SJay Sternberg } 35957dacad5SJay Sternberg 36057dacad5SJay Sternberg static void nvme_dif_complete(u32 p, u32 v, struct t10_pi_tuple *pi) 36157dacad5SJay Sternberg { 36257dacad5SJay Sternberg if (be32_to_cpu(pi->ref_tag) == p) 36357dacad5SJay Sternberg pi->ref_tag = cpu_to_be32(v); 36457dacad5SJay Sternberg } 36557dacad5SJay Sternberg 36657dacad5SJay Sternberg /** 36757dacad5SJay Sternberg * nvme_dif_remap - remaps ref tags to bip seed and physical lba 36857dacad5SJay Sternberg * 36957dacad5SJay Sternberg * The virtual start sector is the one that was originally submitted by the 37057dacad5SJay Sternberg * block layer. Due to partitioning, MD/DM cloning, etc. the actual physical 37157dacad5SJay Sternberg * start sector may be different. Remap protection information to match the 37257dacad5SJay Sternberg * physical LBA on writes, and back to the original seed on reads. 37357dacad5SJay Sternberg * 37457dacad5SJay Sternberg * Type 0 and 3 do not have a ref tag, so no remapping required. 37557dacad5SJay Sternberg */ 37657dacad5SJay Sternberg static void nvme_dif_remap(struct request *req, 37757dacad5SJay Sternberg void (*dif_swap)(u32 p, u32 v, struct t10_pi_tuple *pi)) 37857dacad5SJay Sternberg { 37957dacad5SJay Sternberg struct nvme_ns *ns = req->rq_disk->private_data; 38057dacad5SJay Sternberg struct bio_integrity_payload *bip; 38157dacad5SJay Sternberg struct t10_pi_tuple *pi; 38257dacad5SJay Sternberg void *p, *pmap; 38357dacad5SJay Sternberg u32 i, nlb, ts, phys, virt; 38457dacad5SJay Sternberg 38557dacad5SJay Sternberg if (!ns->pi_type || ns->pi_type == NVME_NS_DPS_PI_TYPE3) 38657dacad5SJay Sternberg return; 38757dacad5SJay Sternberg 38857dacad5SJay Sternberg bip = bio_integrity(req->bio); 38957dacad5SJay Sternberg if (!bip) 39057dacad5SJay Sternberg return; 39157dacad5SJay Sternberg 39257dacad5SJay Sternberg pmap = kmap_atomic(bip->bip_vec->bv_page) + bip->bip_vec->bv_offset; 39357dacad5SJay Sternberg 39457dacad5SJay Sternberg p = pmap; 39557dacad5SJay Sternberg virt = bip_get_seed(bip); 39657dacad5SJay Sternberg phys = nvme_block_nr(ns, blk_rq_pos(req)); 39757dacad5SJay Sternberg nlb = (blk_rq_bytes(req) >> ns->lba_shift); 398ac6fc48cSDan Williams ts = ns->disk->queue->integrity.tuple_size; 39957dacad5SJay Sternberg 40057dacad5SJay Sternberg for (i = 0; i < nlb; i++, virt++, phys++) { 40157dacad5SJay Sternberg pi = (struct t10_pi_tuple *)p; 40257dacad5SJay Sternberg dif_swap(phys, virt, pi); 40357dacad5SJay Sternberg p += ts; 40457dacad5SJay Sternberg } 40557dacad5SJay Sternberg kunmap_atomic(pmap); 40657dacad5SJay Sternberg } 40757dacad5SJay Sternberg #else /* CONFIG_BLK_DEV_INTEGRITY */ 40857dacad5SJay Sternberg static void nvme_dif_remap(struct request *req, 40957dacad5SJay Sternberg void (*dif_swap)(u32 p, u32 v, struct t10_pi_tuple *pi)) 41057dacad5SJay Sternberg { 41157dacad5SJay Sternberg } 41257dacad5SJay Sternberg static void nvme_dif_prep(u32 p, u32 v, struct t10_pi_tuple *pi) 41357dacad5SJay Sternberg { 41457dacad5SJay Sternberg } 41557dacad5SJay Sternberg static void nvme_dif_complete(u32 p, u32 v, struct t10_pi_tuple *pi) 41657dacad5SJay Sternberg { 41757dacad5SJay Sternberg } 41857dacad5SJay Sternberg #endif 41957dacad5SJay Sternberg 420b131c61dSChristoph Hellwig static bool nvme_setup_prps(struct nvme_dev *dev, struct request *req) 42157dacad5SJay Sternberg { 422f4800d6dSChristoph Hellwig struct nvme_iod *iod = blk_mq_rq_to_pdu(req); 42357dacad5SJay Sternberg struct dma_pool *pool; 424b131c61dSChristoph Hellwig int length = blk_rq_payload_bytes(req); 42557dacad5SJay Sternberg struct scatterlist *sg = iod->sg; 42657dacad5SJay Sternberg int dma_len = sg_dma_len(sg); 42757dacad5SJay Sternberg u64 dma_addr = sg_dma_address(sg); 4285fd4ce1bSChristoph Hellwig u32 page_size = dev->ctrl.page_size; 42957dacad5SJay Sternberg int offset = dma_addr & (page_size - 1); 43057dacad5SJay Sternberg __le64 *prp_list; 431f4800d6dSChristoph Hellwig __le64 **list = iod_list(req); 43257dacad5SJay Sternberg dma_addr_t prp_dma; 43357dacad5SJay Sternberg int nprps, i; 43457dacad5SJay Sternberg 43557dacad5SJay Sternberg length -= (page_size - offset); 43657dacad5SJay Sternberg if (length <= 0) 43769d2b571SChristoph Hellwig return true; 43857dacad5SJay Sternberg 43957dacad5SJay Sternberg dma_len -= (page_size - offset); 44057dacad5SJay Sternberg if (dma_len) { 44157dacad5SJay Sternberg dma_addr += (page_size - offset); 44257dacad5SJay Sternberg } else { 44357dacad5SJay Sternberg sg = sg_next(sg); 44457dacad5SJay Sternberg dma_addr = sg_dma_address(sg); 44557dacad5SJay Sternberg dma_len = sg_dma_len(sg); 44657dacad5SJay Sternberg } 44757dacad5SJay Sternberg 44857dacad5SJay Sternberg if (length <= page_size) { 44957dacad5SJay Sternberg iod->first_dma = dma_addr; 45069d2b571SChristoph Hellwig return true; 45157dacad5SJay Sternberg } 45257dacad5SJay Sternberg 45357dacad5SJay Sternberg nprps = DIV_ROUND_UP(length, page_size); 45457dacad5SJay Sternberg if (nprps <= (256 / 8)) { 45557dacad5SJay Sternberg pool = dev->prp_small_pool; 45657dacad5SJay Sternberg iod->npages = 0; 45757dacad5SJay Sternberg } else { 45857dacad5SJay Sternberg pool = dev->prp_page_pool; 45957dacad5SJay Sternberg iod->npages = 1; 46057dacad5SJay Sternberg } 46157dacad5SJay Sternberg 46269d2b571SChristoph Hellwig prp_list = dma_pool_alloc(pool, GFP_ATOMIC, &prp_dma); 46357dacad5SJay Sternberg if (!prp_list) { 46457dacad5SJay Sternberg iod->first_dma = dma_addr; 46557dacad5SJay Sternberg iod->npages = -1; 46669d2b571SChristoph Hellwig return false; 46757dacad5SJay Sternberg } 46857dacad5SJay Sternberg list[0] = prp_list; 46957dacad5SJay Sternberg iod->first_dma = prp_dma; 47057dacad5SJay Sternberg i = 0; 47157dacad5SJay Sternberg for (;;) { 47257dacad5SJay Sternberg if (i == page_size >> 3) { 47357dacad5SJay Sternberg __le64 *old_prp_list = prp_list; 47469d2b571SChristoph Hellwig prp_list = dma_pool_alloc(pool, GFP_ATOMIC, &prp_dma); 47557dacad5SJay Sternberg if (!prp_list) 47669d2b571SChristoph Hellwig return false; 47757dacad5SJay Sternberg list[iod->npages++] = prp_list; 47857dacad5SJay Sternberg prp_list[0] = old_prp_list[i - 1]; 47957dacad5SJay Sternberg old_prp_list[i - 1] = cpu_to_le64(prp_dma); 48057dacad5SJay Sternberg i = 1; 48157dacad5SJay Sternberg } 48257dacad5SJay Sternberg prp_list[i++] = cpu_to_le64(dma_addr); 48357dacad5SJay Sternberg dma_len -= page_size; 48457dacad5SJay Sternberg dma_addr += page_size; 48557dacad5SJay Sternberg length -= page_size; 48657dacad5SJay Sternberg if (length <= 0) 48757dacad5SJay Sternberg break; 48857dacad5SJay Sternberg if (dma_len > 0) 48957dacad5SJay Sternberg continue; 49057dacad5SJay Sternberg BUG_ON(dma_len < 0); 49157dacad5SJay Sternberg sg = sg_next(sg); 49257dacad5SJay Sternberg dma_addr = sg_dma_address(sg); 49357dacad5SJay Sternberg dma_len = sg_dma_len(sg); 49457dacad5SJay Sternberg } 49557dacad5SJay Sternberg 49669d2b571SChristoph Hellwig return true; 49757dacad5SJay Sternberg } 49857dacad5SJay Sternberg 499f4800d6dSChristoph Hellwig static int nvme_map_data(struct nvme_dev *dev, struct request *req, 500b131c61dSChristoph Hellwig struct nvme_command *cmnd) 50157dacad5SJay Sternberg { 502f4800d6dSChristoph Hellwig struct nvme_iod *iod = blk_mq_rq_to_pdu(req); 503ba1ca37eSChristoph Hellwig struct request_queue *q = req->q; 504ba1ca37eSChristoph Hellwig enum dma_data_direction dma_dir = rq_data_dir(req) ? 505ba1ca37eSChristoph Hellwig DMA_TO_DEVICE : DMA_FROM_DEVICE; 506ba1ca37eSChristoph Hellwig int ret = BLK_MQ_RQ_QUEUE_ERROR; 50757dacad5SJay Sternberg 508f9d03f96SChristoph Hellwig sg_init_table(iod->sg, blk_rq_nr_phys_segments(req)); 509ba1ca37eSChristoph Hellwig iod->nents = blk_rq_map_sg(q, req, iod->sg); 510ba1ca37eSChristoph Hellwig if (!iod->nents) 511ba1ca37eSChristoph Hellwig goto out; 512ba1ca37eSChristoph Hellwig 513ba1ca37eSChristoph Hellwig ret = BLK_MQ_RQ_QUEUE_BUSY; 5142b6b535dSMauricio Faria de Oliveira if (!dma_map_sg_attrs(dev->dev, iod->sg, iod->nents, dma_dir, 5152b6b535dSMauricio Faria de Oliveira DMA_ATTR_NO_WARN)) 516ba1ca37eSChristoph Hellwig goto out; 517ba1ca37eSChristoph Hellwig 518b131c61dSChristoph Hellwig if (!nvme_setup_prps(dev, req)) 519ba1ca37eSChristoph Hellwig goto out_unmap; 520ba1ca37eSChristoph Hellwig 521ba1ca37eSChristoph Hellwig ret = BLK_MQ_RQ_QUEUE_ERROR; 522ba1ca37eSChristoph Hellwig if (blk_integrity_rq(req)) { 523ba1ca37eSChristoph Hellwig if (blk_rq_count_integrity_sg(q, req->bio) != 1) 524ba1ca37eSChristoph Hellwig goto out_unmap; 525ba1ca37eSChristoph Hellwig 526bf684057SChristoph Hellwig sg_init_table(&iod->meta_sg, 1); 527bf684057SChristoph Hellwig if (blk_rq_map_integrity_sg(q, req->bio, &iod->meta_sg) != 1) 528ba1ca37eSChristoph Hellwig goto out_unmap; 529ba1ca37eSChristoph Hellwig 530ba1ca37eSChristoph Hellwig if (rq_data_dir(req)) 531ba1ca37eSChristoph Hellwig nvme_dif_remap(req, nvme_dif_prep); 532ba1ca37eSChristoph Hellwig 533bf684057SChristoph Hellwig if (!dma_map_sg(dev->dev, &iod->meta_sg, 1, dma_dir)) 534ba1ca37eSChristoph Hellwig goto out_unmap; 53557dacad5SJay Sternberg } 53657dacad5SJay Sternberg 537eb793e2cSChristoph Hellwig cmnd->rw.dptr.prp1 = cpu_to_le64(sg_dma_address(iod->sg)); 538eb793e2cSChristoph Hellwig cmnd->rw.dptr.prp2 = cpu_to_le64(iod->first_dma); 539ba1ca37eSChristoph Hellwig if (blk_integrity_rq(req)) 540bf684057SChristoph Hellwig cmnd->rw.metadata = cpu_to_le64(sg_dma_address(&iod->meta_sg)); 541ba1ca37eSChristoph Hellwig return BLK_MQ_RQ_QUEUE_OK; 542ba1ca37eSChristoph Hellwig 543ba1ca37eSChristoph Hellwig out_unmap: 544ba1ca37eSChristoph Hellwig dma_unmap_sg(dev->dev, iod->sg, iod->nents, dma_dir); 545ba1ca37eSChristoph Hellwig out: 546ba1ca37eSChristoph Hellwig return ret; 54757dacad5SJay Sternberg } 54857dacad5SJay Sternberg 549f4800d6dSChristoph Hellwig static void nvme_unmap_data(struct nvme_dev *dev, struct request *req) 550d4f6c3abSChristoph Hellwig { 551f4800d6dSChristoph Hellwig struct nvme_iod *iod = blk_mq_rq_to_pdu(req); 552d4f6c3abSChristoph Hellwig enum dma_data_direction dma_dir = rq_data_dir(req) ? 553d4f6c3abSChristoph Hellwig DMA_TO_DEVICE : DMA_FROM_DEVICE; 554d4f6c3abSChristoph Hellwig 555d4f6c3abSChristoph Hellwig if (iod->nents) { 556d4f6c3abSChristoph Hellwig dma_unmap_sg(dev->dev, iod->sg, iod->nents, dma_dir); 557d4f6c3abSChristoph Hellwig if (blk_integrity_rq(req)) { 558d4f6c3abSChristoph Hellwig if (!rq_data_dir(req)) 559d4f6c3abSChristoph Hellwig nvme_dif_remap(req, nvme_dif_complete); 560bf684057SChristoph Hellwig dma_unmap_sg(dev->dev, &iod->meta_sg, 1, dma_dir); 561d4f6c3abSChristoph Hellwig } 562d4f6c3abSChristoph Hellwig } 563d4f6c3abSChristoph Hellwig 564f9d03f96SChristoph Hellwig nvme_cleanup_cmd(req); 565f4800d6dSChristoph Hellwig nvme_free_iod(dev, req); 56657dacad5SJay Sternberg } 56757dacad5SJay Sternberg 56857dacad5SJay Sternberg /* 56957dacad5SJay Sternberg * NOTE: ns is NULL when called on the admin queue. 57057dacad5SJay Sternberg */ 57157dacad5SJay Sternberg static int nvme_queue_rq(struct blk_mq_hw_ctx *hctx, 57257dacad5SJay Sternberg const struct blk_mq_queue_data *bd) 57357dacad5SJay Sternberg { 57457dacad5SJay Sternberg struct nvme_ns *ns = hctx->queue->queuedata; 57557dacad5SJay Sternberg struct nvme_queue *nvmeq = hctx->driver_data; 57657dacad5SJay Sternberg struct nvme_dev *dev = nvmeq->dev; 57757dacad5SJay Sternberg struct request *req = bd->rq; 578ba1ca37eSChristoph Hellwig struct nvme_command cmnd; 579ba1ca37eSChristoph Hellwig int ret = BLK_MQ_RQ_QUEUE_OK; 58057dacad5SJay Sternberg 58157dacad5SJay Sternberg /* 58257dacad5SJay Sternberg * If formated with metadata, require the block layer provide a buffer 58357dacad5SJay Sternberg * unless this namespace is formated such that the metadata can be 58457dacad5SJay Sternberg * stripped/generated by the controller with PRACT=1. 58557dacad5SJay Sternberg */ 58657dacad5SJay Sternberg if (ns && ns->ms && !blk_integrity_rq(req)) { 58757dacad5SJay Sternberg if (!(ns->pi_type && ns->ms == 8) && 58857292b58SChristoph Hellwig !blk_rq_is_passthrough(req)) { 589eee417b0SChristoph Hellwig blk_mq_end_request(req, -EFAULT); 59057dacad5SJay Sternberg return BLK_MQ_RQ_QUEUE_OK; 59157dacad5SJay Sternberg } 59257dacad5SJay Sternberg } 59357dacad5SJay Sternberg 594f9d03f96SChristoph Hellwig ret = nvme_setup_cmd(ns, req, &cmnd); 595bac0000aSOmar Sandoval if (ret != BLK_MQ_RQ_QUEUE_OK) 596f4800d6dSChristoph Hellwig return ret; 59757dacad5SJay Sternberg 598b131c61dSChristoph Hellwig ret = nvme_init_iod(req, dev); 599bac0000aSOmar Sandoval if (ret != BLK_MQ_RQ_QUEUE_OK) 600f9d03f96SChristoph Hellwig goto out_free_cmd; 60157dacad5SJay Sternberg 602f9d03f96SChristoph Hellwig if (blk_rq_nr_phys_segments(req)) 603b131c61dSChristoph Hellwig ret = nvme_map_data(dev, req, &cmnd); 604ba1ca37eSChristoph Hellwig 605bac0000aSOmar Sandoval if (ret != BLK_MQ_RQ_QUEUE_OK) 606f9d03f96SChristoph Hellwig goto out_cleanup_iod; 607ba1ca37eSChristoph Hellwig 608aae239e1SChristoph Hellwig blk_mq_start_request(req); 609ba1ca37eSChristoph Hellwig 610ba1ca37eSChristoph Hellwig spin_lock_irq(&nvmeq->q_lock); 611ae1fba20SKeith Busch if (unlikely(nvmeq->cq_vector < 0)) { 61269d9a99cSKeith Busch ret = BLK_MQ_RQ_QUEUE_ERROR; 613ae1fba20SKeith Busch spin_unlock_irq(&nvmeq->q_lock); 614f9d03f96SChristoph Hellwig goto out_cleanup_iod; 615ae1fba20SKeith Busch } 616ba1ca37eSChristoph Hellwig __nvme_submit_cmd(nvmeq, &cmnd); 61757dacad5SJay Sternberg nvme_process_cq(nvmeq); 61857dacad5SJay Sternberg spin_unlock_irq(&nvmeq->q_lock); 61957dacad5SJay Sternberg return BLK_MQ_RQ_QUEUE_OK; 620f9d03f96SChristoph Hellwig out_cleanup_iod: 621f4800d6dSChristoph Hellwig nvme_free_iod(dev, req); 622f9d03f96SChristoph Hellwig out_free_cmd: 623f9d03f96SChristoph Hellwig nvme_cleanup_cmd(req); 624ba1ca37eSChristoph Hellwig return ret; 62557dacad5SJay Sternberg } 62657dacad5SJay Sternberg 62777f02a7aSChristoph Hellwig static void nvme_pci_complete_rq(struct request *req) 628eee417b0SChristoph Hellwig { 629f4800d6dSChristoph Hellwig struct nvme_iod *iod = blk_mq_rq_to_pdu(req); 630eee417b0SChristoph Hellwig 63177f02a7aSChristoph Hellwig nvme_unmap_data(iod->nvmeq->dev, req); 63277f02a7aSChristoph Hellwig nvme_complete_rq(req); 63357dacad5SJay Sternberg } 63457dacad5SJay Sternberg 635d783e0bdSMarta Rybczynska /* We read the CQE phase first to check if the rest of the entry is valid */ 636d783e0bdSMarta Rybczynska static inline bool nvme_cqe_valid(struct nvme_queue *nvmeq, u16 head, 637d783e0bdSMarta Rybczynska u16 phase) 638d783e0bdSMarta Rybczynska { 639d783e0bdSMarta Rybczynska return (le16_to_cpu(nvmeq->cqes[head].status) & 1) == phase; 640d783e0bdSMarta Rybczynska } 641d783e0bdSMarta Rybczynska 642a0fa9647SJens Axboe static void __nvme_process_cq(struct nvme_queue *nvmeq, unsigned int *tag) 64357dacad5SJay Sternberg { 64457dacad5SJay Sternberg u16 head, phase; 64557dacad5SJay Sternberg 64657dacad5SJay Sternberg head = nvmeq->cq_head; 64757dacad5SJay Sternberg phase = nvmeq->cq_phase; 64857dacad5SJay Sternberg 649d783e0bdSMarta Rybczynska while (nvme_cqe_valid(nvmeq, head, phase)) { 65057dacad5SJay Sternberg struct nvme_completion cqe = nvmeq->cqes[head]; 651eee417b0SChristoph Hellwig struct request *req; 652adf68f21SChristoph Hellwig 65357dacad5SJay Sternberg if (++head == nvmeq->q_depth) { 65457dacad5SJay Sternberg head = 0; 65557dacad5SJay Sternberg phase = !phase; 65657dacad5SJay Sternberg } 657adf68f21SChristoph Hellwig 658a0fa9647SJens Axboe if (tag && *tag == cqe.command_id) 659a0fa9647SJens Axboe *tag = -1; 660adf68f21SChristoph Hellwig 661aae239e1SChristoph Hellwig if (unlikely(cqe.command_id >= nvmeq->q_depth)) { 6621b3c47c1SSagi Grimberg dev_warn(nvmeq->dev->ctrl.device, 663aae239e1SChristoph Hellwig "invalid id %d completed on queue %d\n", 664aae239e1SChristoph Hellwig cqe.command_id, le16_to_cpu(cqe.sq_id)); 665aae239e1SChristoph Hellwig continue; 666aae239e1SChristoph Hellwig } 667aae239e1SChristoph Hellwig 668adf68f21SChristoph Hellwig /* 669adf68f21SChristoph Hellwig * AEN requests are special as they don't time out and can 670adf68f21SChristoph Hellwig * survive any kind of queue freeze and often don't respond to 671adf68f21SChristoph Hellwig * aborts. We don't even bother to allocate a struct request 672adf68f21SChristoph Hellwig * for them but rather special case them here. 673adf68f21SChristoph Hellwig */ 674adf68f21SChristoph Hellwig if (unlikely(nvmeq->qid == 0 && 675adf68f21SChristoph Hellwig cqe.command_id >= NVME_AQ_BLKMQ_DEPTH)) { 6767bf58533SChristoph Hellwig nvme_complete_async_event(&nvmeq->dev->ctrl, 6777bf58533SChristoph Hellwig cqe.status, &cqe.result); 678adf68f21SChristoph Hellwig continue; 679adf68f21SChristoph Hellwig } 680adf68f21SChristoph Hellwig 681eee417b0SChristoph Hellwig req = blk_mq_tag_to_rq(*nvmeq->tags, cqe.command_id); 68227fa9bc5SChristoph Hellwig nvme_end_request(req, cqe.status, cqe.result); 68357dacad5SJay Sternberg } 68457dacad5SJay Sternberg 68557dacad5SJay Sternberg if (head == nvmeq->cq_head && phase == nvmeq->cq_phase) 686a0fa9647SJens Axboe return; 68757dacad5SJay Sternberg 688604e8c8dSKeith Busch if (likely(nvmeq->cq_vector >= 0)) 68957dacad5SJay Sternberg writel(head, nvmeq->q_db + nvmeq->dev->db_stride); 69057dacad5SJay Sternberg nvmeq->cq_head = head; 69157dacad5SJay Sternberg nvmeq->cq_phase = phase; 69257dacad5SJay Sternberg 69357dacad5SJay Sternberg nvmeq->cqe_seen = 1; 694a0fa9647SJens Axboe } 695a0fa9647SJens Axboe 696a0fa9647SJens Axboe static void nvme_process_cq(struct nvme_queue *nvmeq) 697a0fa9647SJens Axboe { 698a0fa9647SJens Axboe __nvme_process_cq(nvmeq, NULL); 69957dacad5SJay Sternberg } 70057dacad5SJay Sternberg 70157dacad5SJay Sternberg static irqreturn_t nvme_irq(int irq, void *data) 70257dacad5SJay Sternberg { 70357dacad5SJay Sternberg irqreturn_t result; 70457dacad5SJay Sternberg struct nvme_queue *nvmeq = data; 70557dacad5SJay Sternberg spin_lock(&nvmeq->q_lock); 70657dacad5SJay Sternberg nvme_process_cq(nvmeq); 70757dacad5SJay Sternberg result = nvmeq->cqe_seen ? IRQ_HANDLED : IRQ_NONE; 70857dacad5SJay Sternberg nvmeq->cqe_seen = 0; 70957dacad5SJay Sternberg spin_unlock(&nvmeq->q_lock); 71057dacad5SJay Sternberg return result; 71157dacad5SJay Sternberg } 71257dacad5SJay Sternberg 71357dacad5SJay Sternberg static irqreturn_t nvme_irq_check(int irq, void *data) 71457dacad5SJay Sternberg { 71557dacad5SJay Sternberg struct nvme_queue *nvmeq = data; 716d783e0bdSMarta Rybczynska if (nvme_cqe_valid(nvmeq, nvmeq->cq_head, nvmeq->cq_phase)) 71757dacad5SJay Sternberg return IRQ_WAKE_THREAD; 718d783e0bdSMarta Rybczynska return IRQ_NONE; 71957dacad5SJay Sternberg } 72057dacad5SJay Sternberg 721a0fa9647SJens Axboe static int nvme_poll(struct blk_mq_hw_ctx *hctx, unsigned int tag) 722a0fa9647SJens Axboe { 723a0fa9647SJens Axboe struct nvme_queue *nvmeq = hctx->driver_data; 724a0fa9647SJens Axboe 725d783e0bdSMarta Rybczynska if (nvme_cqe_valid(nvmeq, nvmeq->cq_head, nvmeq->cq_phase)) { 726a0fa9647SJens Axboe spin_lock_irq(&nvmeq->q_lock); 727a0fa9647SJens Axboe __nvme_process_cq(nvmeq, &tag); 728a0fa9647SJens Axboe spin_unlock_irq(&nvmeq->q_lock); 729a0fa9647SJens Axboe 730a0fa9647SJens Axboe if (tag == -1) 731a0fa9647SJens Axboe return 1; 732a0fa9647SJens Axboe } 733a0fa9647SJens Axboe 734a0fa9647SJens Axboe return 0; 735a0fa9647SJens Axboe } 736a0fa9647SJens Axboe 737f866fc42SChristoph Hellwig static void nvme_pci_submit_async_event(struct nvme_ctrl *ctrl, int aer_idx) 73857dacad5SJay Sternberg { 739f866fc42SChristoph Hellwig struct nvme_dev *dev = to_nvme_dev(ctrl); 7409396dec9SChristoph Hellwig struct nvme_queue *nvmeq = dev->queues[0]; 74157dacad5SJay Sternberg struct nvme_command c; 74257dacad5SJay Sternberg 74357dacad5SJay Sternberg memset(&c, 0, sizeof(c)); 74457dacad5SJay Sternberg c.common.opcode = nvme_admin_async_event; 745f866fc42SChristoph Hellwig c.common.command_id = NVME_AQ_BLKMQ_DEPTH + aer_idx; 74657dacad5SJay Sternberg 7479396dec9SChristoph Hellwig spin_lock_irq(&nvmeq->q_lock); 7489396dec9SChristoph Hellwig __nvme_submit_cmd(nvmeq, &c); 7499396dec9SChristoph Hellwig spin_unlock_irq(&nvmeq->q_lock); 75057dacad5SJay Sternberg } 75157dacad5SJay Sternberg 75257dacad5SJay Sternberg static int adapter_delete_queue(struct nvme_dev *dev, u8 opcode, u16 id) 75357dacad5SJay Sternberg { 75457dacad5SJay Sternberg struct nvme_command c; 75557dacad5SJay Sternberg 75657dacad5SJay Sternberg memset(&c, 0, sizeof(c)); 75757dacad5SJay Sternberg c.delete_queue.opcode = opcode; 75857dacad5SJay Sternberg c.delete_queue.qid = cpu_to_le16(id); 75957dacad5SJay Sternberg 7601c63dc66SChristoph Hellwig return nvme_submit_sync_cmd(dev->ctrl.admin_q, &c, NULL, 0); 76157dacad5SJay Sternberg } 76257dacad5SJay Sternberg 76357dacad5SJay Sternberg static int adapter_alloc_cq(struct nvme_dev *dev, u16 qid, 76457dacad5SJay Sternberg struct nvme_queue *nvmeq) 76557dacad5SJay Sternberg { 76657dacad5SJay Sternberg struct nvme_command c; 76757dacad5SJay Sternberg int flags = NVME_QUEUE_PHYS_CONTIG | NVME_CQ_IRQ_ENABLED; 76857dacad5SJay Sternberg 76957dacad5SJay Sternberg /* 77057dacad5SJay Sternberg * Note: we (ab)use the fact the the prp fields survive if no data 77157dacad5SJay Sternberg * is attached to the request. 77257dacad5SJay Sternberg */ 77357dacad5SJay Sternberg memset(&c, 0, sizeof(c)); 77457dacad5SJay Sternberg c.create_cq.opcode = nvme_admin_create_cq; 77557dacad5SJay Sternberg c.create_cq.prp1 = cpu_to_le64(nvmeq->cq_dma_addr); 77657dacad5SJay Sternberg c.create_cq.cqid = cpu_to_le16(qid); 77757dacad5SJay Sternberg c.create_cq.qsize = cpu_to_le16(nvmeq->q_depth - 1); 77857dacad5SJay Sternberg c.create_cq.cq_flags = cpu_to_le16(flags); 77957dacad5SJay Sternberg c.create_cq.irq_vector = cpu_to_le16(nvmeq->cq_vector); 78057dacad5SJay Sternberg 7811c63dc66SChristoph Hellwig return nvme_submit_sync_cmd(dev->ctrl.admin_q, &c, NULL, 0); 78257dacad5SJay Sternberg } 78357dacad5SJay Sternberg 78457dacad5SJay Sternberg static int adapter_alloc_sq(struct nvme_dev *dev, u16 qid, 78557dacad5SJay Sternberg struct nvme_queue *nvmeq) 78657dacad5SJay Sternberg { 78757dacad5SJay Sternberg struct nvme_command c; 78881c1cd98SKeith Busch int flags = NVME_QUEUE_PHYS_CONTIG; 78957dacad5SJay Sternberg 79057dacad5SJay Sternberg /* 79157dacad5SJay Sternberg * Note: we (ab)use the fact the the prp fields survive if no data 79257dacad5SJay Sternberg * is attached to the request. 79357dacad5SJay Sternberg */ 79457dacad5SJay Sternberg memset(&c, 0, sizeof(c)); 79557dacad5SJay Sternberg c.create_sq.opcode = nvme_admin_create_sq; 79657dacad5SJay Sternberg c.create_sq.prp1 = cpu_to_le64(nvmeq->sq_dma_addr); 79757dacad5SJay Sternberg c.create_sq.sqid = cpu_to_le16(qid); 79857dacad5SJay Sternberg c.create_sq.qsize = cpu_to_le16(nvmeq->q_depth - 1); 79957dacad5SJay Sternberg c.create_sq.sq_flags = cpu_to_le16(flags); 80057dacad5SJay Sternberg c.create_sq.cqid = cpu_to_le16(qid); 80157dacad5SJay Sternberg 8021c63dc66SChristoph Hellwig return nvme_submit_sync_cmd(dev->ctrl.admin_q, &c, NULL, 0); 80357dacad5SJay Sternberg } 80457dacad5SJay Sternberg 80557dacad5SJay Sternberg static int adapter_delete_cq(struct nvme_dev *dev, u16 cqid) 80657dacad5SJay Sternberg { 80757dacad5SJay Sternberg return adapter_delete_queue(dev, nvme_admin_delete_cq, cqid); 80857dacad5SJay Sternberg } 80957dacad5SJay Sternberg 81057dacad5SJay Sternberg static int adapter_delete_sq(struct nvme_dev *dev, u16 sqid) 81157dacad5SJay Sternberg { 81257dacad5SJay Sternberg return adapter_delete_queue(dev, nvme_admin_delete_sq, sqid); 81357dacad5SJay Sternberg } 81457dacad5SJay Sternberg 815e7a2a87dSChristoph Hellwig static void abort_endio(struct request *req, int error) 81657dacad5SJay Sternberg { 817f4800d6dSChristoph Hellwig struct nvme_iod *iod = blk_mq_rq_to_pdu(req); 818f4800d6dSChristoph Hellwig struct nvme_queue *nvmeq = iod->nvmeq; 81957dacad5SJay Sternberg 82027fa9bc5SChristoph Hellwig dev_warn(nvmeq->dev->ctrl.device, 82127fa9bc5SChristoph Hellwig "Abort status: 0x%x", nvme_req(req)->status); 822e7a2a87dSChristoph Hellwig atomic_inc(&nvmeq->dev->ctrl.abort_limit); 823e7a2a87dSChristoph Hellwig blk_mq_free_request(req); 82457dacad5SJay Sternberg } 82557dacad5SJay Sternberg 82631c7c7d2SChristoph Hellwig static enum blk_eh_timer_return nvme_timeout(struct request *req, bool reserved) 82757dacad5SJay Sternberg { 828f4800d6dSChristoph Hellwig struct nvme_iod *iod = blk_mq_rq_to_pdu(req); 829f4800d6dSChristoph Hellwig struct nvme_queue *nvmeq = iod->nvmeq; 83057dacad5SJay Sternberg struct nvme_dev *dev = nvmeq->dev; 83157dacad5SJay Sternberg struct request *abort_req; 83257dacad5SJay Sternberg struct nvme_command cmd; 83357dacad5SJay Sternberg 83431c7c7d2SChristoph Hellwig /* 835fd634f41SChristoph Hellwig * Shutdown immediately if controller times out while starting. The 836fd634f41SChristoph Hellwig * reset work will see the pci device disabled when it gets the forced 837fd634f41SChristoph Hellwig * cancellation error. All outstanding requests are completed on 838fd634f41SChristoph Hellwig * shutdown, so we return BLK_EH_HANDLED. 839fd634f41SChristoph Hellwig */ 840bb8d261eSChristoph Hellwig if (dev->ctrl.state == NVME_CTRL_RESETTING) { 8411b3c47c1SSagi Grimberg dev_warn(dev->ctrl.device, 842fd634f41SChristoph Hellwig "I/O %d QID %d timeout, disable controller\n", 843fd634f41SChristoph Hellwig req->tag, nvmeq->qid); 844a5cdb68cSKeith Busch nvme_dev_disable(dev, false); 84527fa9bc5SChristoph Hellwig nvme_req(req)->flags |= NVME_REQ_CANCELLED; 846fd634f41SChristoph Hellwig return BLK_EH_HANDLED; 847fd634f41SChristoph Hellwig } 848fd634f41SChristoph Hellwig 849fd634f41SChristoph Hellwig /* 850e1569a16SKeith Busch * Shutdown the controller immediately and schedule a reset if the 851e1569a16SKeith Busch * command was already aborted once before and still hasn't been 852e1569a16SKeith Busch * returned to the driver, or if this is the admin queue. 85331c7c7d2SChristoph Hellwig */ 854f4800d6dSChristoph Hellwig if (!nvmeq->qid || iod->aborted) { 8551b3c47c1SSagi Grimberg dev_warn(dev->ctrl.device, 85657dacad5SJay Sternberg "I/O %d QID %d timeout, reset controller\n", 85757dacad5SJay Sternberg req->tag, nvmeq->qid); 858a5cdb68cSKeith Busch nvme_dev_disable(dev, false); 859c5f6ce97SKeith Busch nvme_reset(dev); 860e1569a16SKeith Busch 861e1569a16SKeith Busch /* 862e1569a16SKeith Busch * Mark the request as handled, since the inline shutdown 863e1569a16SKeith Busch * forces all outstanding requests to complete. 864e1569a16SKeith Busch */ 86527fa9bc5SChristoph Hellwig nvme_req(req)->flags |= NVME_REQ_CANCELLED; 866e1569a16SKeith Busch return BLK_EH_HANDLED; 86757dacad5SJay Sternberg } 86857dacad5SJay Sternberg 869e7a2a87dSChristoph Hellwig if (atomic_dec_return(&dev->ctrl.abort_limit) < 0) { 870e7a2a87dSChristoph Hellwig atomic_inc(&dev->ctrl.abort_limit); 871e7a2a87dSChristoph Hellwig return BLK_EH_RESET_TIMER; 872e7a2a87dSChristoph Hellwig } 8737bf7d778SKeith Busch iod->aborted = 1; 87457dacad5SJay Sternberg 87557dacad5SJay Sternberg memset(&cmd, 0, sizeof(cmd)); 87657dacad5SJay Sternberg cmd.abort.opcode = nvme_admin_abort_cmd; 87757dacad5SJay Sternberg cmd.abort.cid = req->tag; 87857dacad5SJay Sternberg cmd.abort.sqid = cpu_to_le16(nvmeq->qid); 87957dacad5SJay Sternberg 8801b3c47c1SSagi Grimberg dev_warn(nvmeq->dev->ctrl.device, 8811b3c47c1SSagi Grimberg "I/O %d QID %d timeout, aborting\n", 88257dacad5SJay Sternberg req->tag, nvmeq->qid); 883e7a2a87dSChristoph Hellwig 884e7a2a87dSChristoph Hellwig abort_req = nvme_alloc_request(dev->ctrl.admin_q, &cmd, 885eb71f435SChristoph Hellwig BLK_MQ_REQ_NOWAIT, NVME_QID_ANY); 8866bf25d16SChristoph Hellwig if (IS_ERR(abort_req)) { 8876bf25d16SChristoph Hellwig atomic_inc(&dev->ctrl.abort_limit); 88831c7c7d2SChristoph Hellwig return BLK_EH_RESET_TIMER; 88957dacad5SJay Sternberg } 89057dacad5SJay Sternberg 891e7a2a87dSChristoph Hellwig abort_req->timeout = ADMIN_TIMEOUT; 892e7a2a87dSChristoph Hellwig abort_req->end_io_data = NULL; 893e7a2a87dSChristoph Hellwig blk_execute_rq_nowait(abort_req->q, NULL, abort_req, 0, abort_endio); 89457dacad5SJay Sternberg 89557dacad5SJay Sternberg /* 89657dacad5SJay Sternberg * The aborted req will be completed on receiving the abort req. 89757dacad5SJay Sternberg * We enable the timer again. If hit twice, it'll cause a device reset, 89857dacad5SJay Sternberg * as the device then is in a faulty state. 89957dacad5SJay Sternberg */ 90057dacad5SJay Sternberg return BLK_EH_RESET_TIMER; 90157dacad5SJay Sternberg } 90257dacad5SJay Sternberg 90357dacad5SJay Sternberg static void nvme_free_queue(struct nvme_queue *nvmeq) 90457dacad5SJay Sternberg { 90557dacad5SJay Sternberg dma_free_coherent(nvmeq->q_dmadev, CQ_SIZE(nvmeq->q_depth), 90657dacad5SJay Sternberg (void *)nvmeq->cqes, nvmeq->cq_dma_addr); 90757dacad5SJay Sternberg if (nvmeq->sq_cmds) 90857dacad5SJay Sternberg dma_free_coherent(nvmeq->q_dmadev, SQ_SIZE(nvmeq->q_depth), 90957dacad5SJay Sternberg nvmeq->sq_cmds, nvmeq->sq_dma_addr); 91057dacad5SJay Sternberg kfree(nvmeq); 91157dacad5SJay Sternberg } 91257dacad5SJay Sternberg 91357dacad5SJay Sternberg static void nvme_free_queues(struct nvme_dev *dev, int lowest) 91457dacad5SJay Sternberg { 91557dacad5SJay Sternberg int i; 91657dacad5SJay Sternberg 91757dacad5SJay Sternberg for (i = dev->queue_count - 1; i >= lowest; i--) { 91857dacad5SJay Sternberg struct nvme_queue *nvmeq = dev->queues[i]; 91957dacad5SJay Sternberg dev->queue_count--; 92057dacad5SJay Sternberg dev->queues[i] = NULL; 92157dacad5SJay Sternberg nvme_free_queue(nvmeq); 92257dacad5SJay Sternberg } 92357dacad5SJay Sternberg } 92457dacad5SJay Sternberg 92557dacad5SJay Sternberg /** 92657dacad5SJay Sternberg * nvme_suspend_queue - put queue into suspended state 92757dacad5SJay Sternberg * @nvmeq - queue to suspend 92857dacad5SJay Sternberg */ 92957dacad5SJay Sternberg static int nvme_suspend_queue(struct nvme_queue *nvmeq) 93057dacad5SJay Sternberg { 93157dacad5SJay Sternberg int vector; 93257dacad5SJay Sternberg 93357dacad5SJay Sternberg spin_lock_irq(&nvmeq->q_lock); 93457dacad5SJay Sternberg if (nvmeq->cq_vector == -1) { 93557dacad5SJay Sternberg spin_unlock_irq(&nvmeq->q_lock); 93657dacad5SJay Sternberg return 1; 93757dacad5SJay Sternberg } 938dca51e78SChristoph Hellwig vector = nvmeq_irq(nvmeq); 93957dacad5SJay Sternberg nvmeq->dev->online_queues--; 94057dacad5SJay Sternberg nvmeq->cq_vector = -1; 94157dacad5SJay Sternberg spin_unlock_irq(&nvmeq->q_lock); 94257dacad5SJay Sternberg 9431c63dc66SChristoph Hellwig if (!nvmeq->qid && nvmeq->dev->ctrl.admin_q) 94425646264SKeith Busch blk_mq_stop_hw_queues(nvmeq->dev->ctrl.admin_q); 94557dacad5SJay Sternberg 94657dacad5SJay Sternberg free_irq(vector, nvmeq); 94757dacad5SJay Sternberg 94857dacad5SJay Sternberg return 0; 94957dacad5SJay Sternberg } 95057dacad5SJay Sternberg 951a5cdb68cSKeith Busch static void nvme_disable_admin_queue(struct nvme_dev *dev, bool shutdown) 95257dacad5SJay Sternberg { 953a5cdb68cSKeith Busch struct nvme_queue *nvmeq = dev->queues[0]; 95457dacad5SJay Sternberg 95557dacad5SJay Sternberg if (!nvmeq) 95657dacad5SJay Sternberg return; 95757dacad5SJay Sternberg if (nvme_suspend_queue(nvmeq)) 95857dacad5SJay Sternberg return; 95957dacad5SJay Sternberg 960a5cdb68cSKeith Busch if (shutdown) 961a5cdb68cSKeith Busch nvme_shutdown_ctrl(&dev->ctrl); 962a5cdb68cSKeith Busch else 963a5cdb68cSKeith Busch nvme_disable_ctrl(&dev->ctrl, lo_hi_readq( 964a5cdb68cSKeith Busch dev->bar + NVME_REG_CAP)); 96557dacad5SJay Sternberg 96657dacad5SJay Sternberg spin_lock_irq(&nvmeq->q_lock); 96757dacad5SJay Sternberg nvme_process_cq(nvmeq); 96857dacad5SJay Sternberg spin_unlock_irq(&nvmeq->q_lock); 96957dacad5SJay Sternberg } 97057dacad5SJay Sternberg 97157dacad5SJay Sternberg static int nvme_cmb_qdepth(struct nvme_dev *dev, int nr_io_queues, 97257dacad5SJay Sternberg int entry_size) 97357dacad5SJay Sternberg { 97457dacad5SJay Sternberg int q_depth = dev->q_depth; 9755fd4ce1bSChristoph Hellwig unsigned q_size_aligned = roundup(q_depth * entry_size, 9765fd4ce1bSChristoph Hellwig dev->ctrl.page_size); 97757dacad5SJay Sternberg 97857dacad5SJay Sternberg if (q_size_aligned * nr_io_queues > dev->cmb_size) { 97957dacad5SJay Sternberg u64 mem_per_q = div_u64(dev->cmb_size, nr_io_queues); 9805fd4ce1bSChristoph Hellwig mem_per_q = round_down(mem_per_q, dev->ctrl.page_size); 98157dacad5SJay Sternberg q_depth = div_u64(mem_per_q, entry_size); 98257dacad5SJay Sternberg 98357dacad5SJay Sternberg /* 98457dacad5SJay Sternberg * Ensure the reduced q_depth is above some threshold where it 98557dacad5SJay Sternberg * would be better to map queues in system memory with the 98657dacad5SJay Sternberg * original depth 98757dacad5SJay Sternberg */ 98857dacad5SJay Sternberg if (q_depth < 64) 98957dacad5SJay Sternberg return -ENOMEM; 99057dacad5SJay Sternberg } 99157dacad5SJay Sternberg 99257dacad5SJay Sternberg return q_depth; 99357dacad5SJay Sternberg } 99457dacad5SJay Sternberg 99557dacad5SJay Sternberg static int nvme_alloc_sq_cmds(struct nvme_dev *dev, struct nvme_queue *nvmeq, 99657dacad5SJay Sternberg int qid, int depth) 99757dacad5SJay Sternberg { 99857dacad5SJay Sternberg if (qid && dev->cmb && use_cmb_sqes && NVME_CMB_SQS(dev->cmbsz)) { 9995fd4ce1bSChristoph Hellwig unsigned offset = (qid - 1) * roundup(SQ_SIZE(depth), 10005fd4ce1bSChristoph Hellwig dev->ctrl.page_size); 100157dacad5SJay Sternberg nvmeq->sq_dma_addr = dev->cmb_dma_addr + offset; 100257dacad5SJay Sternberg nvmeq->sq_cmds_io = dev->cmb + offset; 100357dacad5SJay Sternberg } else { 100457dacad5SJay Sternberg nvmeq->sq_cmds = dma_alloc_coherent(dev->dev, SQ_SIZE(depth), 100557dacad5SJay Sternberg &nvmeq->sq_dma_addr, GFP_KERNEL); 100657dacad5SJay Sternberg if (!nvmeq->sq_cmds) 100757dacad5SJay Sternberg return -ENOMEM; 100857dacad5SJay Sternberg } 100957dacad5SJay Sternberg 101057dacad5SJay Sternberg return 0; 101157dacad5SJay Sternberg } 101257dacad5SJay Sternberg 101357dacad5SJay Sternberg static struct nvme_queue *nvme_alloc_queue(struct nvme_dev *dev, int qid, 1014d3af3ecdSShaohua Li int depth, int node) 101557dacad5SJay Sternberg { 1016d3af3ecdSShaohua Li struct nvme_queue *nvmeq = kzalloc_node(sizeof(*nvmeq), GFP_KERNEL, 1017d3af3ecdSShaohua Li node); 101857dacad5SJay Sternberg if (!nvmeq) 101957dacad5SJay Sternberg return NULL; 102057dacad5SJay Sternberg 102157dacad5SJay Sternberg nvmeq->cqes = dma_zalloc_coherent(dev->dev, CQ_SIZE(depth), 102257dacad5SJay Sternberg &nvmeq->cq_dma_addr, GFP_KERNEL); 102357dacad5SJay Sternberg if (!nvmeq->cqes) 102457dacad5SJay Sternberg goto free_nvmeq; 102557dacad5SJay Sternberg 102657dacad5SJay Sternberg if (nvme_alloc_sq_cmds(dev, nvmeq, qid, depth)) 102757dacad5SJay Sternberg goto free_cqdma; 102857dacad5SJay Sternberg 102957dacad5SJay Sternberg nvmeq->q_dmadev = dev->dev; 103057dacad5SJay Sternberg nvmeq->dev = dev; 103157dacad5SJay Sternberg snprintf(nvmeq->irqname, sizeof(nvmeq->irqname), "nvme%dq%d", 10321c63dc66SChristoph Hellwig dev->ctrl.instance, qid); 103357dacad5SJay Sternberg spin_lock_init(&nvmeq->q_lock); 103457dacad5SJay Sternberg nvmeq->cq_head = 0; 103557dacad5SJay Sternberg nvmeq->cq_phase = 1; 103657dacad5SJay Sternberg nvmeq->q_db = &dev->dbs[qid * 2 * dev->db_stride]; 103757dacad5SJay Sternberg nvmeq->q_depth = depth; 103857dacad5SJay Sternberg nvmeq->qid = qid; 103957dacad5SJay Sternberg nvmeq->cq_vector = -1; 104057dacad5SJay Sternberg dev->queues[qid] = nvmeq; 104157dacad5SJay Sternberg dev->queue_count++; 104257dacad5SJay Sternberg 104357dacad5SJay Sternberg return nvmeq; 104457dacad5SJay Sternberg 104557dacad5SJay Sternberg free_cqdma: 104657dacad5SJay Sternberg dma_free_coherent(dev->dev, CQ_SIZE(depth), (void *)nvmeq->cqes, 104757dacad5SJay Sternberg nvmeq->cq_dma_addr); 104857dacad5SJay Sternberg free_nvmeq: 104957dacad5SJay Sternberg kfree(nvmeq); 105057dacad5SJay Sternberg return NULL; 105157dacad5SJay Sternberg } 105257dacad5SJay Sternberg 1053dca51e78SChristoph Hellwig static int queue_request_irq(struct nvme_queue *nvmeq) 105457dacad5SJay Sternberg { 105557dacad5SJay Sternberg if (use_threaded_interrupts) 1056dca51e78SChristoph Hellwig return request_threaded_irq(nvmeq_irq(nvmeq), nvme_irq_check, 1057dca51e78SChristoph Hellwig nvme_irq, IRQF_SHARED, nvmeq->irqname, nvmeq); 1058dca51e78SChristoph Hellwig else 1059dca51e78SChristoph Hellwig return request_irq(nvmeq_irq(nvmeq), nvme_irq, IRQF_SHARED, 1060dca51e78SChristoph Hellwig nvmeq->irqname, nvmeq); 106157dacad5SJay Sternberg } 106257dacad5SJay Sternberg 106357dacad5SJay Sternberg static void nvme_init_queue(struct nvme_queue *nvmeq, u16 qid) 106457dacad5SJay Sternberg { 106557dacad5SJay Sternberg struct nvme_dev *dev = nvmeq->dev; 106657dacad5SJay Sternberg 106757dacad5SJay Sternberg spin_lock_irq(&nvmeq->q_lock); 106857dacad5SJay Sternberg nvmeq->sq_tail = 0; 106957dacad5SJay Sternberg nvmeq->cq_head = 0; 107057dacad5SJay Sternberg nvmeq->cq_phase = 1; 107157dacad5SJay Sternberg nvmeq->q_db = &dev->dbs[qid * 2 * dev->db_stride]; 107257dacad5SJay Sternberg memset((void *)nvmeq->cqes, 0, CQ_SIZE(nvmeq->q_depth)); 107357dacad5SJay Sternberg dev->online_queues++; 107457dacad5SJay Sternberg spin_unlock_irq(&nvmeq->q_lock); 107557dacad5SJay Sternberg } 107657dacad5SJay Sternberg 107757dacad5SJay Sternberg static int nvme_create_queue(struct nvme_queue *nvmeq, int qid) 107857dacad5SJay Sternberg { 107957dacad5SJay Sternberg struct nvme_dev *dev = nvmeq->dev; 108057dacad5SJay Sternberg int result; 108157dacad5SJay Sternberg 108257dacad5SJay Sternberg nvmeq->cq_vector = qid - 1; 108357dacad5SJay Sternberg result = adapter_alloc_cq(dev, qid, nvmeq); 108457dacad5SJay Sternberg if (result < 0) 108557dacad5SJay Sternberg return result; 108657dacad5SJay Sternberg 108757dacad5SJay Sternberg result = adapter_alloc_sq(dev, qid, nvmeq); 108857dacad5SJay Sternberg if (result < 0) 108957dacad5SJay Sternberg goto release_cq; 109057dacad5SJay Sternberg 1091dca51e78SChristoph Hellwig result = queue_request_irq(nvmeq); 109257dacad5SJay Sternberg if (result < 0) 109357dacad5SJay Sternberg goto release_sq; 109457dacad5SJay Sternberg 109557dacad5SJay Sternberg nvme_init_queue(nvmeq, qid); 109657dacad5SJay Sternberg return result; 109757dacad5SJay Sternberg 109857dacad5SJay Sternberg release_sq: 109957dacad5SJay Sternberg adapter_delete_sq(dev, qid); 110057dacad5SJay Sternberg release_cq: 110157dacad5SJay Sternberg adapter_delete_cq(dev, qid); 110257dacad5SJay Sternberg return result; 110357dacad5SJay Sternberg } 110457dacad5SJay Sternberg 1105f363b089SEric Biggers static const struct blk_mq_ops nvme_mq_admin_ops = { 110657dacad5SJay Sternberg .queue_rq = nvme_queue_rq, 110777f02a7aSChristoph Hellwig .complete = nvme_pci_complete_rq, 110857dacad5SJay Sternberg .init_hctx = nvme_admin_init_hctx, 110957dacad5SJay Sternberg .exit_hctx = nvme_admin_exit_hctx, 111057dacad5SJay Sternberg .init_request = nvme_admin_init_request, 111157dacad5SJay Sternberg .timeout = nvme_timeout, 111257dacad5SJay Sternberg }; 111357dacad5SJay Sternberg 1114f363b089SEric Biggers static const struct blk_mq_ops nvme_mq_ops = { 111557dacad5SJay Sternberg .queue_rq = nvme_queue_rq, 111677f02a7aSChristoph Hellwig .complete = nvme_pci_complete_rq, 111757dacad5SJay Sternberg .init_hctx = nvme_init_hctx, 111857dacad5SJay Sternberg .init_request = nvme_init_request, 1119dca51e78SChristoph Hellwig .map_queues = nvme_pci_map_queues, 112057dacad5SJay Sternberg .timeout = nvme_timeout, 1121a0fa9647SJens Axboe .poll = nvme_poll, 112257dacad5SJay Sternberg }; 112357dacad5SJay Sternberg 112457dacad5SJay Sternberg static void nvme_dev_remove_admin(struct nvme_dev *dev) 112557dacad5SJay Sternberg { 11261c63dc66SChristoph Hellwig if (dev->ctrl.admin_q && !blk_queue_dying(dev->ctrl.admin_q)) { 112769d9a99cSKeith Busch /* 112869d9a99cSKeith Busch * If the controller was reset during removal, it's possible 112969d9a99cSKeith Busch * user requests may be waiting on a stopped queue. Start the 113069d9a99cSKeith Busch * queue to flush these to completion. 113169d9a99cSKeith Busch */ 113269d9a99cSKeith Busch blk_mq_start_stopped_hw_queues(dev->ctrl.admin_q, true); 11331c63dc66SChristoph Hellwig blk_cleanup_queue(dev->ctrl.admin_q); 113457dacad5SJay Sternberg blk_mq_free_tag_set(&dev->admin_tagset); 113557dacad5SJay Sternberg } 113657dacad5SJay Sternberg } 113757dacad5SJay Sternberg 113857dacad5SJay Sternberg static int nvme_alloc_admin_tags(struct nvme_dev *dev) 113957dacad5SJay Sternberg { 11401c63dc66SChristoph Hellwig if (!dev->ctrl.admin_q) { 114157dacad5SJay Sternberg dev->admin_tagset.ops = &nvme_mq_admin_ops; 114257dacad5SJay Sternberg dev->admin_tagset.nr_hw_queues = 1; 1143e3e9d50cSKeith Busch 1144e3e9d50cSKeith Busch /* 1145e3e9d50cSKeith Busch * Subtract one to leave an empty queue entry for 'Full Queue' 1146e3e9d50cSKeith Busch * condition. See NVM-Express 1.2 specification, section 4.1.2. 1147e3e9d50cSKeith Busch */ 1148e3e9d50cSKeith Busch dev->admin_tagset.queue_depth = NVME_AQ_BLKMQ_DEPTH - 1; 114957dacad5SJay Sternberg dev->admin_tagset.timeout = ADMIN_TIMEOUT; 115057dacad5SJay Sternberg dev->admin_tagset.numa_node = dev_to_node(dev->dev); 115157dacad5SJay Sternberg dev->admin_tagset.cmd_size = nvme_cmd_size(dev); 1152d3484991SJens Axboe dev->admin_tagset.flags = BLK_MQ_F_NO_SCHED; 115357dacad5SJay Sternberg dev->admin_tagset.driver_data = dev; 115457dacad5SJay Sternberg 115557dacad5SJay Sternberg if (blk_mq_alloc_tag_set(&dev->admin_tagset)) 115657dacad5SJay Sternberg return -ENOMEM; 115757dacad5SJay Sternberg 11581c63dc66SChristoph Hellwig dev->ctrl.admin_q = blk_mq_init_queue(&dev->admin_tagset); 11591c63dc66SChristoph Hellwig if (IS_ERR(dev->ctrl.admin_q)) { 116057dacad5SJay Sternberg blk_mq_free_tag_set(&dev->admin_tagset); 116157dacad5SJay Sternberg return -ENOMEM; 116257dacad5SJay Sternberg } 11631c63dc66SChristoph Hellwig if (!blk_get_queue(dev->ctrl.admin_q)) { 116457dacad5SJay Sternberg nvme_dev_remove_admin(dev); 11651c63dc66SChristoph Hellwig dev->ctrl.admin_q = NULL; 116657dacad5SJay Sternberg return -ENODEV; 116757dacad5SJay Sternberg } 116857dacad5SJay Sternberg } else 116925646264SKeith Busch blk_mq_start_stopped_hw_queues(dev->ctrl.admin_q, true); 117057dacad5SJay Sternberg 117157dacad5SJay Sternberg return 0; 117257dacad5SJay Sternberg } 117357dacad5SJay Sternberg 117457dacad5SJay Sternberg static int nvme_configure_admin_queue(struct nvme_dev *dev) 117557dacad5SJay Sternberg { 117657dacad5SJay Sternberg int result; 117757dacad5SJay Sternberg u32 aqa; 11787a67cbeaSChristoph Hellwig u64 cap = lo_hi_readq(dev->bar + NVME_REG_CAP); 117957dacad5SJay Sternberg struct nvme_queue *nvmeq; 118057dacad5SJay Sternberg 11818ef2074dSGabriel Krisman Bertazi dev->subsystem = readl(dev->bar + NVME_REG_VS) >= NVME_VS(1, 1, 0) ? 118257dacad5SJay Sternberg NVME_CAP_NSSRC(cap) : 0; 118357dacad5SJay Sternberg 11847a67cbeaSChristoph Hellwig if (dev->subsystem && 11857a67cbeaSChristoph Hellwig (readl(dev->bar + NVME_REG_CSTS) & NVME_CSTS_NSSRO)) 11867a67cbeaSChristoph Hellwig writel(NVME_CSTS_NSSRO, dev->bar + NVME_REG_CSTS); 118757dacad5SJay Sternberg 11885fd4ce1bSChristoph Hellwig result = nvme_disable_ctrl(&dev->ctrl, cap); 118957dacad5SJay Sternberg if (result < 0) 119057dacad5SJay Sternberg return result; 119157dacad5SJay Sternberg 119257dacad5SJay Sternberg nvmeq = dev->queues[0]; 119357dacad5SJay Sternberg if (!nvmeq) { 1194d3af3ecdSShaohua Li nvmeq = nvme_alloc_queue(dev, 0, NVME_AQ_DEPTH, 1195d3af3ecdSShaohua Li dev_to_node(dev->dev)); 119657dacad5SJay Sternberg if (!nvmeq) 119757dacad5SJay Sternberg return -ENOMEM; 119857dacad5SJay Sternberg } 119957dacad5SJay Sternberg 120057dacad5SJay Sternberg aqa = nvmeq->q_depth - 1; 120157dacad5SJay Sternberg aqa |= aqa << 16; 120257dacad5SJay Sternberg 12037a67cbeaSChristoph Hellwig writel(aqa, dev->bar + NVME_REG_AQA); 12047a67cbeaSChristoph Hellwig lo_hi_writeq(nvmeq->sq_dma_addr, dev->bar + NVME_REG_ASQ); 12057a67cbeaSChristoph Hellwig lo_hi_writeq(nvmeq->cq_dma_addr, dev->bar + NVME_REG_ACQ); 120657dacad5SJay Sternberg 12075fd4ce1bSChristoph Hellwig result = nvme_enable_ctrl(&dev->ctrl, cap); 120857dacad5SJay Sternberg if (result) 1209d4875622SKeith Busch return result; 121057dacad5SJay Sternberg 121157dacad5SJay Sternberg nvmeq->cq_vector = 0; 1212dca51e78SChristoph Hellwig result = queue_request_irq(nvmeq); 121357dacad5SJay Sternberg if (result) { 121457dacad5SJay Sternberg nvmeq->cq_vector = -1; 1215d4875622SKeith Busch return result; 121657dacad5SJay Sternberg } 121757dacad5SJay Sternberg 121857dacad5SJay Sternberg return result; 121957dacad5SJay Sternberg } 122057dacad5SJay Sternberg 1221c875a709SGuilherme G. Piccoli static bool nvme_should_reset(struct nvme_dev *dev, u32 csts) 1222c875a709SGuilherme G. Piccoli { 1223c875a709SGuilherme G. Piccoli 1224c875a709SGuilherme G. Piccoli /* If true, indicates loss of adapter communication, possibly by a 1225c875a709SGuilherme G. Piccoli * NVMe Subsystem reset. 1226c875a709SGuilherme G. Piccoli */ 1227c875a709SGuilherme G. Piccoli bool nssro = dev->subsystem && (csts & NVME_CSTS_NSSRO); 1228c875a709SGuilherme G. Piccoli 1229c875a709SGuilherme G. Piccoli /* If there is a reset ongoing, we shouldn't reset again. */ 1230c875a709SGuilherme G. Piccoli if (work_busy(&dev->reset_work)) 1231c875a709SGuilherme G. Piccoli return false; 1232c875a709SGuilherme G. Piccoli 1233c875a709SGuilherme G. Piccoli /* We shouldn't reset unless the controller is on fatal error state 1234c875a709SGuilherme G. Piccoli * _or_ if we lost the communication with it. 1235c875a709SGuilherme G. Piccoli */ 1236c875a709SGuilherme G. Piccoli if (!(csts & NVME_CSTS_CFS) && !nssro) 1237c875a709SGuilherme G. Piccoli return false; 1238c875a709SGuilherme G. Piccoli 1239c875a709SGuilherme G. Piccoli /* If PCI error recovery process is happening, we cannot reset or 1240c875a709SGuilherme G. Piccoli * the recovery mechanism will surely fail. 1241c875a709SGuilherme G. Piccoli */ 1242c875a709SGuilherme G. Piccoli if (pci_channel_offline(to_pci_dev(dev->dev))) 1243c875a709SGuilherme G. Piccoli return false; 1244c875a709SGuilherme G. Piccoli 1245c875a709SGuilherme G. Piccoli return true; 1246c875a709SGuilherme G. Piccoli } 1247c875a709SGuilherme G. Piccoli 1248d2a61918SAndy Lutomirski static void nvme_warn_reset(struct nvme_dev *dev, u32 csts) 1249d2a61918SAndy Lutomirski { 1250d2a61918SAndy Lutomirski /* Read a config register to help see what died. */ 1251d2a61918SAndy Lutomirski u16 pci_status; 1252d2a61918SAndy Lutomirski int result; 1253d2a61918SAndy Lutomirski 1254d2a61918SAndy Lutomirski result = pci_read_config_word(to_pci_dev(dev->dev), PCI_STATUS, 1255d2a61918SAndy Lutomirski &pci_status); 1256d2a61918SAndy Lutomirski if (result == PCIBIOS_SUCCESSFUL) 1257d2a61918SAndy Lutomirski dev_warn(dev->dev, 1258d2a61918SAndy Lutomirski "controller is down; will reset: CSTS=0x%x, PCI_STATUS=0x%hx\n", 1259d2a61918SAndy Lutomirski csts, pci_status); 1260d2a61918SAndy Lutomirski else 1261d2a61918SAndy Lutomirski dev_warn(dev->dev, 1262d2a61918SAndy Lutomirski "controller is down; will reset: CSTS=0x%x, PCI_STATUS read failed (%d)\n", 1263d2a61918SAndy Lutomirski csts, result); 1264d2a61918SAndy Lutomirski } 1265d2a61918SAndy Lutomirski 12662d55cd5fSChristoph Hellwig static void nvme_watchdog_timer(unsigned long data) 126757dacad5SJay Sternberg { 12682d55cd5fSChristoph Hellwig struct nvme_dev *dev = (struct nvme_dev *)data; 12697a67cbeaSChristoph Hellwig u32 csts = readl(dev->bar + NVME_REG_CSTS); 127057dacad5SJay Sternberg 1271c875a709SGuilherme G. Piccoli /* Skip controllers under certain specific conditions. */ 1272c875a709SGuilherme G. Piccoli if (nvme_should_reset(dev, csts)) { 1273c5f6ce97SKeith Busch if (!nvme_reset(dev)) 1274d2a61918SAndy Lutomirski nvme_warn_reset(dev, csts); 12752d55cd5fSChristoph Hellwig return; 127657dacad5SJay Sternberg } 127757dacad5SJay Sternberg 12782d55cd5fSChristoph Hellwig mod_timer(&dev->watchdog_timer, round_jiffies(jiffies + HZ)); 127957dacad5SJay Sternberg } 128057dacad5SJay Sternberg 1281749941f2SChristoph Hellwig static int nvme_create_io_queues(struct nvme_dev *dev) 128257dacad5SJay Sternberg { 1283949928c1SKeith Busch unsigned i, max; 1284749941f2SChristoph Hellwig int ret = 0; 128557dacad5SJay Sternberg 1286749941f2SChristoph Hellwig for (i = dev->queue_count; i <= dev->max_qid; i++) { 1287d3af3ecdSShaohua Li /* vector == qid - 1, match nvme_create_queue */ 1288d3af3ecdSShaohua Li if (!nvme_alloc_queue(dev, i, dev->q_depth, 1289d3af3ecdSShaohua Li pci_irq_get_node(to_pci_dev(dev->dev), i - 1))) { 1290749941f2SChristoph Hellwig ret = -ENOMEM; 129157dacad5SJay Sternberg break; 1292749941f2SChristoph Hellwig } 1293749941f2SChristoph Hellwig } 129457dacad5SJay Sternberg 1295949928c1SKeith Busch max = min(dev->max_qid, dev->queue_count - 1); 1296949928c1SKeith Busch for (i = dev->online_queues; i <= max; i++) { 1297749941f2SChristoph Hellwig ret = nvme_create_queue(dev->queues[i], i); 1298d4875622SKeith Busch if (ret) 129957dacad5SJay Sternberg break; 130057dacad5SJay Sternberg } 130157dacad5SJay Sternberg 1302749941f2SChristoph Hellwig /* 1303749941f2SChristoph Hellwig * Ignore failing Create SQ/CQ commands, we can continue with less 1304749941f2SChristoph Hellwig * than the desired aount of queues, and even a controller without 1305749941f2SChristoph Hellwig * I/O queues an still be used to issue admin commands. This might 1306749941f2SChristoph Hellwig * be useful to upgrade a buggy firmware for example. 1307749941f2SChristoph Hellwig */ 1308749941f2SChristoph Hellwig return ret >= 0 ? 0 : ret; 130957dacad5SJay Sternberg } 131057dacad5SJay Sternberg 1311202021c1SStephen Bates static ssize_t nvme_cmb_show(struct device *dev, 1312202021c1SStephen Bates struct device_attribute *attr, 1313202021c1SStephen Bates char *buf) 1314202021c1SStephen Bates { 1315202021c1SStephen Bates struct nvme_dev *ndev = to_nvme_dev(dev_get_drvdata(dev)); 1316202021c1SStephen Bates 1317c965809cSStephen Bates return scnprintf(buf, PAGE_SIZE, "cmbloc : x%08x\ncmbsz : x%08x\n", 1318202021c1SStephen Bates ndev->cmbloc, ndev->cmbsz); 1319202021c1SStephen Bates } 1320202021c1SStephen Bates static DEVICE_ATTR(cmb, S_IRUGO, nvme_cmb_show, NULL); 1321202021c1SStephen Bates 132257dacad5SJay Sternberg static void __iomem *nvme_map_cmb(struct nvme_dev *dev) 132357dacad5SJay Sternberg { 132457dacad5SJay Sternberg u64 szu, size, offset; 132557dacad5SJay Sternberg resource_size_t bar_size; 132657dacad5SJay Sternberg struct pci_dev *pdev = to_pci_dev(dev->dev); 132757dacad5SJay Sternberg void __iomem *cmb; 132857dacad5SJay Sternberg dma_addr_t dma_addr; 132957dacad5SJay Sternberg 13307a67cbeaSChristoph Hellwig dev->cmbsz = readl(dev->bar + NVME_REG_CMBSZ); 133157dacad5SJay Sternberg if (!(NVME_CMB_SZ(dev->cmbsz))) 133257dacad5SJay Sternberg return NULL; 1333202021c1SStephen Bates dev->cmbloc = readl(dev->bar + NVME_REG_CMBLOC); 133457dacad5SJay Sternberg 1335202021c1SStephen Bates if (!use_cmb_sqes) 1336202021c1SStephen Bates return NULL; 133757dacad5SJay Sternberg 133857dacad5SJay Sternberg szu = (u64)1 << (12 + 4 * NVME_CMB_SZU(dev->cmbsz)); 133957dacad5SJay Sternberg size = szu * NVME_CMB_SZ(dev->cmbsz); 1340202021c1SStephen Bates offset = szu * NVME_CMB_OFST(dev->cmbloc); 1341202021c1SStephen Bates bar_size = pci_resource_len(pdev, NVME_CMB_BIR(dev->cmbloc)); 134257dacad5SJay Sternberg 134357dacad5SJay Sternberg if (offset > bar_size) 134457dacad5SJay Sternberg return NULL; 134557dacad5SJay Sternberg 134657dacad5SJay Sternberg /* 134757dacad5SJay Sternberg * Controllers may support a CMB size larger than their BAR, 134857dacad5SJay Sternberg * for example, due to being behind a bridge. Reduce the CMB to 134957dacad5SJay Sternberg * the reported size of the BAR 135057dacad5SJay Sternberg */ 135157dacad5SJay Sternberg if (size > bar_size - offset) 135257dacad5SJay Sternberg size = bar_size - offset; 135357dacad5SJay Sternberg 1354202021c1SStephen Bates dma_addr = pci_resource_start(pdev, NVME_CMB_BIR(dev->cmbloc)) + offset; 135557dacad5SJay Sternberg cmb = ioremap_wc(dma_addr, size); 135657dacad5SJay Sternberg if (!cmb) 135757dacad5SJay Sternberg return NULL; 135857dacad5SJay Sternberg 135957dacad5SJay Sternberg dev->cmb_dma_addr = dma_addr; 136057dacad5SJay Sternberg dev->cmb_size = size; 136157dacad5SJay Sternberg return cmb; 136257dacad5SJay Sternberg } 136357dacad5SJay Sternberg 136457dacad5SJay Sternberg static inline void nvme_release_cmb(struct nvme_dev *dev) 136557dacad5SJay Sternberg { 136657dacad5SJay Sternberg if (dev->cmb) { 136757dacad5SJay Sternberg iounmap(dev->cmb); 136857dacad5SJay Sternberg dev->cmb = NULL; 136957dacad5SJay Sternberg } 137057dacad5SJay Sternberg } 137157dacad5SJay Sternberg 137257dacad5SJay Sternberg static size_t db_bar_size(struct nvme_dev *dev, unsigned nr_io_queues) 137357dacad5SJay Sternberg { 137457dacad5SJay Sternberg return 4096 + ((nr_io_queues + 1) * 8 * dev->db_stride); 137557dacad5SJay Sternberg } 137657dacad5SJay Sternberg 137757dacad5SJay Sternberg static int nvme_setup_io_queues(struct nvme_dev *dev) 137857dacad5SJay Sternberg { 137957dacad5SJay Sternberg struct nvme_queue *adminq = dev->queues[0]; 138057dacad5SJay Sternberg struct pci_dev *pdev = to_pci_dev(dev->dev); 1381dca51e78SChristoph Hellwig int result, nr_io_queues, size; 138257dacad5SJay Sternberg 13832800b8e7SKeith Busch nr_io_queues = num_online_cpus(); 13849a0be7abSChristoph Hellwig result = nvme_set_queue_count(&dev->ctrl, &nr_io_queues); 13859a0be7abSChristoph Hellwig if (result < 0) 138657dacad5SJay Sternberg return result; 13879a0be7abSChristoph Hellwig 1388f5fa90dcSChristoph Hellwig if (nr_io_queues == 0) 1389a5229050SKeith Busch return 0; 139057dacad5SJay Sternberg 139157dacad5SJay Sternberg if (dev->cmb && NVME_CMB_SQS(dev->cmbsz)) { 139257dacad5SJay Sternberg result = nvme_cmb_qdepth(dev, nr_io_queues, 139357dacad5SJay Sternberg sizeof(struct nvme_command)); 139457dacad5SJay Sternberg if (result > 0) 139557dacad5SJay Sternberg dev->q_depth = result; 139657dacad5SJay Sternberg else 139757dacad5SJay Sternberg nvme_release_cmb(dev); 139857dacad5SJay Sternberg } 139957dacad5SJay Sternberg 140057dacad5SJay Sternberg size = db_bar_size(dev, nr_io_queues); 140157dacad5SJay Sternberg if (size > 8192) { 140257dacad5SJay Sternberg iounmap(dev->bar); 140357dacad5SJay Sternberg do { 140457dacad5SJay Sternberg dev->bar = ioremap(pci_resource_start(pdev, 0), size); 140557dacad5SJay Sternberg if (dev->bar) 140657dacad5SJay Sternberg break; 140757dacad5SJay Sternberg if (!--nr_io_queues) 140857dacad5SJay Sternberg return -ENOMEM; 140957dacad5SJay Sternberg size = db_bar_size(dev, nr_io_queues); 141057dacad5SJay Sternberg } while (1); 14117a67cbeaSChristoph Hellwig dev->dbs = dev->bar + 4096; 141257dacad5SJay Sternberg adminq->q_db = dev->dbs; 141357dacad5SJay Sternberg } 141457dacad5SJay Sternberg 141557dacad5SJay Sternberg /* Deregister the admin queue's interrupt */ 1416dca51e78SChristoph Hellwig free_irq(pci_irq_vector(pdev, 0), adminq); 141757dacad5SJay Sternberg 141857dacad5SJay Sternberg /* 141957dacad5SJay Sternberg * If we enable msix early due to not intx, disable it again before 142057dacad5SJay Sternberg * setting up the full range we need. 142157dacad5SJay Sternberg */ 1422dca51e78SChristoph Hellwig pci_free_irq_vectors(pdev); 1423dca51e78SChristoph Hellwig nr_io_queues = pci_alloc_irq_vectors(pdev, 1, nr_io_queues, 1424dca51e78SChristoph Hellwig PCI_IRQ_ALL_TYPES | PCI_IRQ_AFFINITY); 1425dca51e78SChristoph Hellwig if (nr_io_queues <= 0) 1426dca51e78SChristoph Hellwig return -EIO; 1427dca51e78SChristoph Hellwig dev->max_qid = nr_io_queues; 142857dacad5SJay Sternberg 142957dacad5SJay Sternberg /* 143057dacad5SJay Sternberg * Should investigate if there's a performance win from allocating 143157dacad5SJay Sternberg * more queues than interrupt vectors; it might allow the submission 143257dacad5SJay Sternberg * path to scale better, even if the receive path is limited by the 143357dacad5SJay Sternberg * number of interrupts. 143457dacad5SJay Sternberg */ 143557dacad5SJay Sternberg 1436dca51e78SChristoph Hellwig result = queue_request_irq(adminq); 143757dacad5SJay Sternberg if (result) { 143857dacad5SJay Sternberg adminq->cq_vector = -1; 1439d4875622SKeith Busch return result; 144057dacad5SJay Sternberg } 1441749941f2SChristoph Hellwig return nvme_create_io_queues(dev); 144257dacad5SJay Sternberg } 144357dacad5SJay Sternberg 1444db3cbfffSKeith Busch static void nvme_del_queue_end(struct request *req, int error) 1445db3cbfffSKeith Busch { 1446db3cbfffSKeith Busch struct nvme_queue *nvmeq = req->end_io_data; 1447db3cbfffSKeith Busch 1448db3cbfffSKeith Busch blk_mq_free_request(req); 1449db3cbfffSKeith Busch complete(&nvmeq->dev->ioq_wait); 1450db3cbfffSKeith Busch } 1451db3cbfffSKeith Busch 1452db3cbfffSKeith Busch static void nvme_del_cq_end(struct request *req, int error) 1453db3cbfffSKeith Busch { 1454db3cbfffSKeith Busch struct nvme_queue *nvmeq = req->end_io_data; 1455db3cbfffSKeith Busch 1456db3cbfffSKeith Busch if (!error) { 1457db3cbfffSKeith Busch unsigned long flags; 1458db3cbfffSKeith Busch 14592e39e0f6SMing Lin /* 14602e39e0f6SMing Lin * We might be called with the AQ q_lock held 14612e39e0f6SMing Lin * and the I/O queue q_lock should always 14622e39e0f6SMing Lin * nest inside the AQ one. 14632e39e0f6SMing Lin */ 14642e39e0f6SMing Lin spin_lock_irqsave_nested(&nvmeq->q_lock, flags, 14652e39e0f6SMing Lin SINGLE_DEPTH_NESTING); 1466db3cbfffSKeith Busch nvme_process_cq(nvmeq); 1467db3cbfffSKeith Busch spin_unlock_irqrestore(&nvmeq->q_lock, flags); 1468db3cbfffSKeith Busch } 1469db3cbfffSKeith Busch 1470db3cbfffSKeith Busch nvme_del_queue_end(req, error); 1471db3cbfffSKeith Busch } 1472db3cbfffSKeith Busch 1473db3cbfffSKeith Busch static int nvme_delete_queue(struct nvme_queue *nvmeq, u8 opcode) 1474db3cbfffSKeith Busch { 1475db3cbfffSKeith Busch struct request_queue *q = nvmeq->dev->ctrl.admin_q; 1476db3cbfffSKeith Busch struct request *req; 1477db3cbfffSKeith Busch struct nvme_command cmd; 1478db3cbfffSKeith Busch 1479db3cbfffSKeith Busch memset(&cmd, 0, sizeof(cmd)); 1480db3cbfffSKeith Busch cmd.delete_queue.opcode = opcode; 1481db3cbfffSKeith Busch cmd.delete_queue.qid = cpu_to_le16(nvmeq->qid); 1482db3cbfffSKeith Busch 1483eb71f435SChristoph Hellwig req = nvme_alloc_request(q, &cmd, BLK_MQ_REQ_NOWAIT, NVME_QID_ANY); 1484db3cbfffSKeith Busch if (IS_ERR(req)) 1485db3cbfffSKeith Busch return PTR_ERR(req); 1486db3cbfffSKeith Busch 1487db3cbfffSKeith Busch req->timeout = ADMIN_TIMEOUT; 1488db3cbfffSKeith Busch req->end_io_data = nvmeq; 1489db3cbfffSKeith Busch 1490db3cbfffSKeith Busch blk_execute_rq_nowait(q, NULL, req, false, 1491db3cbfffSKeith Busch opcode == nvme_admin_delete_cq ? 1492db3cbfffSKeith Busch nvme_del_cq_end : nvme_del_queue_end); 1493db3cbfffSKeith Busch return 0; 1494db3cbfffSKeith Busch } 1495db3cbfffSKeith Busch 149670659060SKeith Busch static void nvme_disable_io_queues(struct nvme_dev *dev, int queues) 1497db3cbfffSKeith Busch { 149870659060SKeith Busch int pass; 1499db3cbfffSKeith Busch unsigned long timeout; 1500db3cbfffSKeith Busch u8 opcode = nvme_admin_delete_sq; 1501db3cbfffSKeith Busch 1502db3cbfffSKeith Busch for (pass = 0; pass < 2; pass++) { 1503014a0d60SKeith Busch int sent = 0, i = queues; 1504db3cbfffSKeith Busch 1505db3cbfffSKeith Busch reinit_completion(&dev->ioq_wait); 1506db3cbfffSKeith Busch retry: 1507db3cbfffSKeith Busch timeout = ADMIN_TIMEOUT; 1508c21377f8SGabriel Krisman Bertazi for (; i > 0; i--, sent++) 1509c21377f8SGabriel Krisman Bertazi if (nvme_delete_queue(dev->queues[i], opcode)) 1510db3cbfffSKeith Busch break; 1511c21377f8SGabriel Krisman Bertazi 1512db3cbfffSKeith Busch while (sent--) { 1513db3cbfffSKeith Busch timeout = wait_for_completion_io_timeout(&dev->ioq_wait, timeout); 1514db3cbfffSKeith Busch if (timeout == 0) 1515db3cbfffSKeith Busch return; 1516db3cbfffSKeith Busch if (i) 1517db3cbfffSKeith Busch goto retry; 1518db3cbfffSKeith Busch } 1519db3cbfffSKeith Busch opcode = nvme_admin_delete_cq; 1520db3cbfffSKeith Busch } 1521db3cbfffSKeith Busch } 1522db3cbfffSKeith Busch 152357dacad5SJay Sternberg /* 152457dacad5SJay Sternberg * Return: error value if an error occurred setting up the queues or calling 152557dacad5SJay Sternberg * Identify Device. 0 if these succeeded, even if adding some of the 152657dacad5SJay Sternberg * namespaces failed. At the moment, these failures are silent. TBD which 152757dacad5SJay Sternberg * failures should be reported. 152857dacad5SJay Sternberg */ 152957dacad5SJay Sternberg static int nvme_dev_add(struct nvme_dev *dev) 153057dacad5SJay Sternberg { 15315bae7f73SChristoph Hellwig if (!dev->ctrl.tagset) { 153257dacad5SJay Sternberg dev->tagset.ops = &nvme_mq_ops; 153357dacad5SJay Sternberg dev->tagset.nr_hw_queues = dev->online_queues - 1; 153457dacad5SJay Sternberg dev->tagset.timeout = NVME_IO_TIMEOUT; 153557dacad5SJay Sternberg dev->tagset.numa_node = dev_to_node(dev->dev); 153657dacad5SJay Sternberg dev->tagset.queue_depth = 153757dacad5SJay Sternberg min_t(int, dev->q_depth, BLK_MQ_MAX_DEPTH) - 1; 153857dacad5SJay Sternberg dev->tagset.cmd_size = nvme_cmd_size(dev); 153957dacad5SJay Sternberg dev->tagset.flags = BLK_MQ_F_SHOULD_MERGE; 154057dacad5SJay Sternberg dev->tagset.driver_data = dev; 154157dacad5SJay Sternberg 154257dacad5SJay Sternberg if (blk_mq_alloc_tag_set(&dev->tagset)) 154357dacad5SJay Sternberg return 0; 15445bae7f73SChristoph Hellwig dev->ctrl.tagset = &dev->tagset; 1545949928c1SKeith Busch } else { 1546949928c1SKeith Busch blk_mq_update_nr_hw_queues(&dev->tagset, dev->online_queues - 1); 1547949928c1SKeith Busch 1548949928c1SKeith Busch /* Free previously allocated queues that are no longer usable */ 1549949928c1SKeith Busch nvme_free_queues(dev, dev->online_queues); 155057dacad5SJay Sternberg } 1551949928c1SKeith Busch 155257dacad5SJay Sternberg return 0; 155357dacad5SJay Sternberg } 155457dacad5SJay Sternberg 1555b00a726aSKeith Busch static int nvme_pci_enable(struct nvme_dev *dev) 155657dacad5SJay Sternberg { 155757dacad5SJay Sternberg u64 cap; 1558b00a726aSKeith Busch int result = -ENOMEM; 155957dacad5SJay Sternberg struct pci_dev *pdev = to_pci_dev(dev->dev); 156057dacad5SJay Sternberg 156157dacad5SJay Sternberg if (pci_enable_device_mem(pdev)) 156257dacad5SJay Sternberg return result; 156357dacad5SJay Sternberg 156457dacad5SJay Sternberg pci_set_master(pdev); 156557dacad5SJay Sternberg 156657dacad5SJay Sternberg if (dma_set_mask_and_coherent(dev->dev, DMA_BIT_MASK(64)) && 156757dacad5SJay Sternberg dma_set_mask_and_coherent(dev->dev, DMA_BIT_MASK(32))) 156857dacad5SJay Sternberg goto disable; 156957dacad5SJay Sternberg 15707a67cbeaSChristoph Hellwig if (readl(dev->bar + NVME_REG_CSTS) == -1) { 157157dacad5SJay Sternberg result = -ENODEV; 1572b00a726aSKeith Busch goto disable; 157357dacad5SJay Sternberg } 157457dacad5SJay Sternberg 157557dacad5SJay Sternberg /* 1576a5229050SKeith Busch * Some devices and/or platforms don't advertise or work with INTx 1577a5229050SKeith Busch * interrupts. Pre-enable a single MSIX or MSI vec for setup. We'll 1578a5229050SKeith Busch * adjust this later. 157957dacad5SJay Sternberg */ 1580dca51e78SChristoph Hellwig result = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_ALL_TYPES); 1581dca51e78SChristoph Hellwig if (result < 0) 1582dca51e78SChristoph Hellwig return result; 158357dacad5SJay Sternberg 15847a67cbeaSChristoph Hellwig cap = lo_hi_readq(dev->bar + NVME_REG_CAP); 15857a67cbeaSChristoph Hellwig 158657dacad5SJay Sternberg dev->q_depth = min_t(int, NVME_CAP_MQES(cap) + 1, NVME_Q_DEPTH); 158757dacad5SJay Sternberg dev->db_stride = 1 << NVME_CAP_STRIDE(cap); 15887a67cbeaSChristoph Hellwig dev->dbs = dev->bar + 4096; 15891f390c1fSStephan Günther 15901f390c1fSStephan Günther /* 15911f390c1fSStephan Günther * Temporary fix for the Apple controller found in the MacBook8,1 and 15921f390c1fSStephan Günther * some MacBook7,1 to avoid controller resets and data loss. 15931f390c1fSStephan Günther */ 15941f390c1fSStephan Günther if (pdev->vendor == PCI_VENDOR_ID_APPLE && pdev->device == 0x2001) { 15951f390c1fSStephan Günther dev->q_depth = 2; 15961f390c1fSStephan Günther dev_warn(dev->dev, "detected Apple NVMe controller, set " 15971f390c1fSStephan Günther "queue depth=%u to work around controller resets\n", 15981f390c1fSStephan Günther dev->q_depth); 15991f390c1fSStephan Günther } 16001f390c1fSStephan Günther 1601202021c1SStephen Bates /* 1602202021c1SStephen Bates * CMBs can currently only exist on >=1.2 PCIe devices. We only 1603202021c1SStephen Bates * populate sysfs if a CMB is implemented. Note that we add the 1604202021c1SStephen Bates * CMB attribute to the nvme_ctrl kobj which removes the need to remove 1605202021c1SStephen Bates * it on exit. Since nvme_dev_attrs_group has no name we can pass 1606202021c1SStephen Bates * NULL as final argument to sysfs_add_file_to_group. 1607202021c1SStephen Bates */ 1608202021c1SStephen Bates 16098ef2074dSGabriel Krisman Bertazi if (readl(dev->bar + NVME_REG_VS) >= NVME_VS(1, 2, 0)) { 161057dacad5SJay Sternberg dev->cmb = nvme_map_cmb(dev); 161157dacad5SJay Sternberg 1612202021c1SStephen Bates if (dev->cmbsz) { 1613202021c1SStephen Bates if (sysfs_add_file_to_group(&dev->ctrl.device->kobj, 1614202021c1SStephen Bates &dev_attr_cmb.attr, NULL)) 1615202021c1SStephen Bates dev_warn(dev->dev, 1616202021c1SStephen Bates "failed to add sysfs attribute for CMB\n"); 1617202021c1SStephen Bates } 1618202021c1SStephen Bates } 1619202021c1SStephen Bates 1620a0a3408eSKeith Busch pci_enable_pcie_error_reporting(pdev); 1621a0a3408eSKeith Busch pci_save_state(pdev); 162257dacad5SJay Sternberg return 0; 162357dacad5SJay Sternberg 162457dacad5SJay Sternberg disable: 162557dacad5SJay Sternberg pci_disable_device(pdev); 162657dacad5SJay Sternberg return result; 162757dacad5SJay Sternberg } 162857dacad5SJay Sternberg 162957dacad5SJay Sternberg static void nvme_dev_unmap(struct nvme_dev *dev) 163057dacad5SJay Sternberg { 1631b00a726aSKeith Busch if (dev->bar) 1632b00a726aSKeith Busch iounmap(dev->bar); 1633a1f447b3SJohannes Thumshirn pci_release_mem_regions(to_pci_dev(dev->dev)); 1634b00a726aSKeith Busch } 1635b00a726aSKeith Busch 1636b00a726aSKeith Busch static void nvme_pci_disable(struct nvme_dev *dev) 1637b00a726aSKeith Busch { 163857dacad5SJay Sternberg struct pci_dev *pdev = to_pci_dev(dev->dev); 163957dacad5SJay Sternberg 1640dca51e78SChristoph Hellwig pci_free_irq_vectors(pdev); 164157dacad5SJay Sternberg 1642a0a3408eSKeith Busch if (pci_is_enabled(pdev)) { 1643a0a3408eSKeith Busch pci_disable_pcie_error_reporting(pdev); 164457dacad5SJay Sternberg pci_disable_device(pdev); 164557dacad5SJay Sternberg } 1646a0a3408eSKeith Busch } 164757dacad5SJay Sternberg 1648a5cdb68cSKeith Busch static void nvme_dev_disable(struct nvme_dev *dev, bool shutdown) 164957dacad5SJay Sternberg { 165070659060SKeith Busch int i, queues; 1651302ad8ccSKeith Busch bool dead = true; 1652302ad8ccSKeith Busch struct pci_dev *pdev = to_pci_dev(dev->dev); 165357dacad5SJay Sternberg 16542d55cd5fSChristoph Hellwig del_timer_sync(&dev->watchdog_timer); 165557dacad5SJay Sternberg 165677bf25eaSKeith Busch mutex_lock(&dev->shutdown_lock); 1657302ad8ccSKeith Busch if (pci_is_enabled(pdev)) { 1658302ad8ccSKeith Busch u32 csts = readl(dev->bar + NVME_REG_CSTS); 1659302ad8ccSKeith Busch 1660302ad8ccSKeith Busch if (dev->ctrl.state == NVME_CTRL_LIVE) 1661302ad8ccSKeith Busch nvme_start_freeze(&dev->ctrl); 1662302ad8ccSKeith Busch dead = !!((csts & NVME_CSTS_CFS) || !(csts & NVME_CSTS_RDY) || 1663302ad8ccSKeith Busch pdev->error_state != pci_channel_io_normal); 166457dacad5SJay Sternberg } 1665c21377f8SGabriel Krisman Bertazi 1666302ad8ccSKeith Busch /* 1667302ad8ccSKeith Busch * Give the controller a chance to complete all entered requests if 1668302ad8ccSKeith Busch * doing a safe shutdown. 1669302ad8ccSKeith Busch */ 1670302ad8ccSKeith Busch if (!dead && shutdown) 1671302ad8ccSKeith Busch nvme_wait_freeze_timeout(&dev->ctrl, NVME_IO_TIMEOUT); 1672302ad8ccSKeith Busch nvme_stop_queues(&dev->ctrl); 1673302ad8ccSKeith Busch 167470659060SKeith Busch queues = dev->online_queues - 1; 1675c21377f8SGabriel Krisman Bertazi for (i = dev->queue_count - 1; i > 0; i--) 1676c21377f8SGabriel Krisman Bertazi nvme_suspend_queue(dev->queues[i]); 1677c21377f8SGabriel Krisman Bertazi 1678302ad8ccSKeith Busch if (dead) { 167982469c59SGabriel Krisman Bertazi /* A device might become IO incapable very soon during 168082469c59SGabriel Krisman Bertazi * probe, before the admin queue is configured. Thus, 168182469c59SGabriel Krisman Bertazi * queue_count can be 0 here. 168282469c59SGabriel Krisman Bertazi */ 168382469c59SGabriel Krisman Bertazi if (dev->queue_count) 1684c21377f8SGabriel Krisman Bertazi nvme_suspend_queue(dev->queues[0]); 168557dacad5SJay Sternberg } else { 168670659060SKeith Busch nvme_disable_io_queues(dev, queues); 1687a5cdb68cSKeith Busch nvme_disable_admin_queue(dev, shutdown); 168857dacad5SJay Sternberg } 1689b00a726aSKeith Busch nvme_pci_disable(dev); 169057dacad5SJay Sternberg 1691e1958e65SMing Lin blk_mq_tagset_busy_iter(&dev->tagset, nvme_cancel_request, &dev->ctrl); 1692e1958e65SMing Lin blk_mq_tagset_busy_iter(&dev->admin_tagset, nvme_cancel_request, &dev->ctrl); 1693302ad8ccSKeith Busch 1694302ad8ccSKeith Busch /* 1695302ad8ccSKeith Busch * The driver will not be starting up queues again if shutting down so 1696302ad8ccSKeith Busch * must flush all entered requests to their failed completion to avoid 1697302ad8ccSKeith Busch * deadlocking blk-mq hot-cpu notifier. 1698302ad8ccSKeith Busch */ 1699302ad8ccSKeith Busch if (shutdown) 1700302ad8ccSKeith Busch nvme_start_queues(&dev->ctrl); 170177bf25eaSKeith Busch mutex_unlock(&dev->shutdown_lock); 170257dacad5SJay Sternberg } 170357dacad5SJay Sternberg 170457dacad5SJay Sternberg static int nvme_setup_prp_pools(struct nvme_dev *dev) 170557dacad5SJay Sternberg { 170657dacad5SJay Sternberg dev->prp_page_pool = dma_pool_create("prp list page", dev->dev, 170757dacad5SJay Sternberg PAGE_SIZE, PAGE_SIZE, 0); 170857dacad5SJay Sternberg if (!dev->prp_page_pool) 170957dacad5SJay Sternberg return -ENOMEM; 171057dacad5SJay Sternberg 171157dacad5SJay Sternberg /* Optimisation for I/Os between 4k and 128k */ 171257dacad5SJay Sternberg dev->prp_small_pool = dma_pool_create("prp list 256", dev->dev, 171357dacad5SJay Sternberg 256, 256, 0); 171457dacad5SJay Sternberg if (!dev->prp_small_pool) { 171557dacad5SJay Sternberg dma_pool_destroy(dev->prp_page_pool); 171657dacad5SJay Sternberg return -ENOMEM; 171757dacad5SJay Sternberg } 171857dacad5SJay Sternberg return 0; 171957dacad5SJay Sternberg } 172057dacad5SJay Sternberg 172157dacad5SJay Sternberg static void nvme_release_prp_pools(struct nvme_dev *dev) 172257dacad5SJay Sternberg { 172357dacad5SJay Sternberg dma_pool_destroy(dev->prp_page_pool); 172457dacad5SJay Sternberg dma_pool_destroy(dev->prp_small_pool); 172557dacad5SJay Sternberg } 172657dacad5SJay Sternberg 17271673f1f0SChristoph Hellwig static void nvme_pci_free_ctrl(struct nvme_ctrl *ctrl) 172857dacad5SJay Sternberg { 17291673f1f0SChristoph Hellwig struct nvme_dev *dev = to_nvme_dev(ctrl); 173057dacad5SJay Sternberg 173157dacad5SJay Sternberg put_device(dev->dev); 173257dacad5SJay Sternberg if (dev->tagset.tags) 173357dacad5SJay Sternberg blk_mq_free_tag_set(&dev->tagset); 17341c63dc66SChristoph Hellwig if (dev->ctrl.admin_q) 17351c63dc66SChristoph Hellwig blk_put_queue(dev->ctrl.admin_q); 173657dacad5SJay Sternberg kfree(dev->queues); 1737e286bcfcSScott Bauer free_opal_dev(dev->ctrl.opal_dev); 173857dacad5SJay Sternberg kfree(dev); 173957dacad5SJay Sternberg } 174057dacad5SJay Sternberg 1741f58944e2SKeith Busch static void nvme_remove_dead_ctrl(struct nvme_dev *dev, int status) 1742f58944e2SKeith Busch { 1743237045fcSLinus Torvalds dev_warn(dev->ctrl.device, "Removing after probe failure status: %d\n", status); 1744f58944e2SKeith Busch 1745f58944e2SKeith Busch kref_get(&dev->ctrl.kref); 174669d9a99cSKeith Busch nvme_dev_disable(dev, false); 1747f58944e2SKeith Busch if (!schedule_work(&dev->remove_work)) 1748f58944e2SKeith Busch nvme_put_ctrl(&dev->ctrl); 1749f58944e2SKeith Busch } 1750f58944e2SKeith Busch 1751fd634f41SChristoph Hellwig static void nvme_reset_work(struct work_struct *work) 175257dacad5SJay Sternberg { 1753fd634f41SChristoph Hellwig struct nvme_dev *dev = container_of(work, struct nvme_dev, reset_work); 1754a98e58e5SScott Bauer bool was_suspend = !!(dev->ctrl.ctrl_config & NVME_CC_SHN_NORMAL); 1755f58944e2SKeith Busch int result = -ENODEV; 175657dacad5SJay Sternberg 1757bb8d261eSChristoph Hellwig if (WARN_ON(dev->ctrl.state == NVME_CTRL_RESETTING)) 1758fd634f41SChristoph Hellwig goto out; 1759fd634f41SChristoph Hellwig 1760fd634f41SChristoph Hellwig /* 1761fd634f41SChristoph Hellwig * If we're called to reset a live controller first shut it down before 1762fd634f41SChristoph Hellwig * moving on. 1763fd634f41SChristoph Hellwig */ 1764b00a726aSKeith Busch if (dev->ctrl.ctrl_config & NVME_CC_ENABLE) 1765a5cdb68cSKeith Busch nvme_dev_disable(dev, false); 1766fd634f41SChristoph Hellwig 1767bb8d261eSChristoph Hellwig if (!nvme_change_ctrl_state(&dev->ctrl, NVME_CTRL_RESETTING)) 17689bf2b972SKeith Busch goto out; 17699bf2b972SKeith Busch 1770b00a726aSKeith Busch result = nvme_pci_enable(dev); 177157dacad5SJay Sternberg if (result) 177257dacad5SJay Sternberg goto out; 177357dacad5SJay Sternberg 177457dacad5SJay Sternberg result = nvme_configure_admin_queue(dev); 177557dacad5SJay Sternberg if (result) 1776f58944e2SKeith Busch goto out; 177757dacad5SJay Sternberg 177857dacad5SJay Sternberg nvme_init_queue(dev->queues[0], 0); 177957dacad5SJay Sternberg result = nvme_alloc_admin_tags(dev); 178057dacad5SJay Sternberg if (result) 1781f58944e2SKeith Busch goto out; 178257dacad5SJay Sternberg 1783ce4541f4SChristoph Hellwig result = nvme_init_identify(&dev->ctrl); 1784ce4541f4SChristoph Hellwig if (result) 1785f58944e2SKeith Busch goto out; 1786ce4541f4SChristoph Hellwig 1787e286bcfcSScott Bauer if (dev->ctrl.oacs & NVME_CTRL_OACS_SEC_SUPP) { 1788e286bcfcSScott Bauer if (!dev->ctrl.opal_dev) 17894f1244c8SChristoph Hellwig dev->ctrl.opal_dev = 17904f1244c8SChristoph Hellwig init_opal_dev(&dev->ctrl, &nvme_sec_submit); 1791e286bcfcSScott Bauer else if (was_suspend) 17924f1244c8SChristoph Hellwig opal_unlock_from_suspend(dev->ctrl.opal_dev); 1793e286bcfcSScott Bauer } else { 1794e286bcfcSScott Bauer free_opal_dev(dev->ctrl.opal_dev); 1795e286bcfcSScott Bauer dev->ctrl.opal_dev = NULL; 1796e286bcfcSScott Bauer } 1797a98e58e5SScott Bauer 179857dacad5SJay Sternberg result = nvme_setup_io_queues(dev); 179957dacad5SJay Sternberg if (result) 1800f58944e2SKeith Busch goto out; 180157dacad5SJay Sternberg 180221f033f7SKeith Busch /* 180321f033f7SKeith Busch * A controller that can not execute IO typically requires user 180421f033f7SKeith Busch * intervention to correct. For such degraded controllers, the driver 180521f033f7SKeith Busch * should not submit commands the user did not request, so skip 180621f033f7SKeith Busch * registering for asynchronous event notification on this condition. 180721f033f7SKeith Busch */ 1808f866fc42SChristoph Hellwig if (dev->online_queues > 1) 1809f866fc42SChristoph Hellwig nvme_queue_async_events(&dev->ctrl); 181057dacad5SJay Sternberg 18112d55cd5fSChristoph Hellwig mod_timer(&dev->watchdog_timer, round_jiffies(jiffies + HZ)); 181257dacad5SJay Sternberg 181357dacad5SJay Sternberg /* 181457dacad5SJay Sternberg * Keep the controller around but remove all namespaces if we don't have 181557dacad5SJay Sternberg * any working I/O queue. 181657dacad5SJay Sternberg */ 181757dacad5SJay Sternberg if (dev->online_queues < 2) { 18181b3c47c1SSagi Grimberg dev_warn(dev->ctrl.device, "IO queues not created\n"); 18193b24774eSKeith Busch nvme_kill_queues(&dev->ctrl); 18205bae7f73SChristoph Hellwig nvme_remove_namespaces(&dev->ctrl); 182157dacad5SJay Sternberg } else { 182225646264SKeith Busch nvme_start_queues(&dev->ctrl); 1823302ad8ccSKeith Busch nvme_wait_freeze(&dev->ctrl); 182457dacad5SJay Sternberg nvme_dev_add(dev); 1825302ad8ccSKeith Busch nvme_unfreeze(&dev->ctrl); 182657dacad5SJay Sternberg } 182757dacad5SJay Sternberg 1828bb8d261eSChristoph Hellwig if (!nvme_change_ctrl_state(&dev->ctrl, NVME_CTRL_LIVE)) { 1829bb8d261eSChristoph Hellwig dev_warn(dev->ctrl.device, "failed to mark controller live\n"); 1830bb8d261eSChristoph Hellwig goto out; 1831bb8d261eSChristoph Hellwig } 183292911a55SChristoph Hellwig 183392911a55SChristoph Hellwig if (dev->online_queues > 1) 18345955be21SChristoph Hellwig nvme_queue_scan(&dev->ctrl); 183557dacad5SJay Sternberg return; 183657dacad5SJay Sternberg 183757dacad5SJay Sternberg out: 1838f58944e2SKeith Busch nvme_remove_dead_ctrl(dev, result); 183957dacad5SJay Sternberg } 184057dacad5SJay Sternberg 18415c8809e6SChristoph Hellwig static void nvme_remove_dead_ctrl_work(struct work_struct *work) 184257dacad5SJay Sternberg { 18435c8809e6SChristoph Hellwig struct nvme_dev *dev = container_of(work, struct nvme_dev, remove_work); 184457dacad5SJay Sternberg struct pci_dev *pdev = to_pci_dev(dev->dev); 184557dacad5SJay Sternberg 184669d9a99cSKeith Busch nvme_kill_queues(&dev->ctrl); 184757dacad5SJay Sternberg if (pci_get_drvdata(pdev)) 1848921920abSKeith Busch device_release_driver(&pdev->dev); 18491673f1f0SChristoph Hellwig nvme_put_ctrl(&dev->ctrl); 185057dacad5SJay Sternberg } 185157dacad5SJay Sternberg 185257dacad5SJay Sternberg static int nvme_reset(struct nvme_dev *dev) 185357dacad5SJay Sternberg { 18541c63dc66SChristoph Hellwig if (!dev->ctrl.admin_q || blk_queue_dying(dev->ctrl.admin_q)) 185557dacad5SJay Sternberg return -ENODEV; 1856c5f6ce97SKeith Busch if (work_busy(&dev->reset_work)) 1857c5f6ce97SKeith Busch return -ENODEV; 1858846cc05fSChristoph Hellwig if (!queue_work(nvme_workq, &dev->reset_work)) 1859846cc05fSChristoph Hellwig return -EBUSY; 186057dacad5SJay Sternberg return 0; 186157dacad5SJay Sternberg } 186257dacad5SJay Sternberg 18631c63dc66SChristoph Hellwig static int nvme_pci_reg_read32(struct nvme_ctrl *ctrl, u32 off, u32 *val) 186457dacad5SJay Sternberg { 18651c63dc66SChristoph Hellwig *val = readl(to_nvme_dev(ctrl)->bar + off); 18661c63dc66SChristoph Hellwig return 0; 186757dacad5SJay Sternberg } 18681c63dc66SChristoph Hellwig 18695fd4ce1bSChristoph Hellwig static int nvme_pci_reg_write32(struct nvme_ctrl *ctrl, u32 off, u32 val) 18705fd4ce1bSChristoph Hellwig { 18715fd4ce1bSChristoph Hellwig writel(val, to_nvme_dev(ctrl)->bar + off); 18725fd4ce1bSChristoph Hellwig return 0; 18735fd4ce1bSChristoph Hellwig } 18745fd4ce1bSChristoph Hellwig 18757fd8930fSChristoph Hellwig static int nvme_pci_reg_read64(struct nvme_ctrl *ctrl, u32 off, u64 *val) 18767fd8930fSChristoph Hellwig { 18777fd8930fSChristoph Hellwig *val = readq(to_nvme_dev(ctrl)->bar + off); 18787fd8930fSChristoph Hellwig return 0; 18797fd8930fSChristoph Hellwig } 18807fd8930fSChristoph Hellwig 1881f3ca80fcSChristoph Hellwig static int nvme_pci_reset_ctrl(struct nvme_ctrl *ctrl) 1882f3ca80fcSChristoph Hellwig { 1883c5f6ce97SKeith Busch struct nvme_dev *dev = to_nvme_dev(ctrl); 1884c5f6ce97SKeith Busch int ret = nvme_reset(dev); 1885c5f6ce97SKeith Busch 1886c5f6ce97SKeith Busch if (!ret) 1887c5f6ce97SKeith Busch flush_work(&dev->reset_work); 1888c5f6ce97SKeith Busch return ret; 1889f3ca80fcSChristoph Hellwig } 1890f3ca80fcSChristoph Hellwig 18911c63dc66SChristoph Hellwig static const struct nvme_ctrl_ops nvme_pci_ctrl_ops = { 18921a353d85SMing Lin .name = "pcie", 1893e439bb12SSagi Grimberg .module = THIS_MODULE, 18941c63dc66SChristoph Hellwig .reg_read32 = nvme_pci_reg_read32, 18955fd4ce1bSChristoph Hellwig .reg_write32 = nvme_pci_reg_write32, 18967fd8930fSChristoph Hellwig .reg_read64 = nvme_pci_reg_read64, 1897f3ca80fcSChristoph Hellwig .reset_ctrl = nvme_pci_reset_ctrl, 18981673f1f0SChristoph Hellwig .free_ctrl = nvme_pci_free_ctrl, 1899f866fc42SChristoph Hellwig .submit_async_event = nvme_pci_submit_async_event, 19001c63dc66SChristoph Hellwig }; 190157dacad5SJay Sternberg 1902b00a726aSKeith Busch static int nvme_dev_map(struct nvme_dev *dev) 1903b00a726aSKeith Busch { 1904b00a726aSKeith Busch struct pci_dev *pdev = to_pci_dev(dev->dev); 1905b00a726aSKeith Busch 1906a1f447b3SJohannes Thumshirn if (pci_request_mem_regions(pdev, "nvme")) 1907b00a726aSKeith Busch return -ENODEV; 1908b00a726aSKeith Busch 1909b00a726aSKeith Busch dev->bar = ioremap(pci_resource_start(pdev, 0), 8192); 1910b00a726aSKeith Busch if (!dev->bar) 1911b00a726aSKeith Busch goto release; 1912b00a726aSKeith Busch 1913b00a726aSKeith Busch return 0; 1914b00a726aSKeith Busch release: 1915a1f447b3SJohannes Thumshirn pci_release_mem_regions(pdev); 1916b00a726aSKeith Busch return -ENODEV; 1917b00a726aSKeith Busch } 1918b00a726aSKeith Busch 191957dacad5SJay Sternberg static int nvme_probe(struct pci_dev *pdev, const struct pci_device_id *id) 192057dacad5SJay Sternberg { 192157dacad5SJay Sternberg int node, result = -ENOMEM; 192257dacad5SJay Sternberg struct nvme_dev *dev; 192357dacad5SJay Sternberg 192457dacad5SJay Sternberg node = dev_to_node(&pdev->dev); 192557dacad5SJay Sternberg if (node == NUMA_NO_NODE) 19262fa84351SMasayoshi Mizuma set_dev_node(&pdev->dev, first_memory_node); 192757dacad5SJay Sternberg 192857dacad5SJay Sternberg dev = kzalloc_node(sizeof(*dev), GFP_KERNEL, node); 192957dacad5SJay Sternberg if (!dev) 193057dacad5SJay Sternberg return -ENOMEM; 193157dacad5SJay Sternberg dev->queues = kzalloc_node((num_possible_cpus() + 1) * sizeof(void *), 193257dacad5SJay Sternberg GFP_KERNEL, node); 193357dacad5SJay Sternberg if (!dev->queues) 193457dacad5SJay Sternberg goto free; 193557dacad5SJay Sternberg 193657dacad5SJay Sternberg dev->dev = get_device(&pdev->dev); 193757dacad5SJay Sternberg pci_set_drvdata(pdev, dev); 193857dacad5SJay Sternberg 1939b00a726aSKeith Busch result = nvme_dev_map(dev); 1940b00a726aSKeith Busch if (result) 1941b00a726aSKeith Busch goto free; 1942b00a726aSKeith Busch 1943f3ca80fcSChristoph Hellwig INIT_WORK(&dev->reset_work, nvme_reset_work); 19445c8809e6SChristoph Hellwig INIT_WORK(&dev->remove_work, nvme_remove_dead_ctrl_work); 19452d55cd5fSChristoph Hellwig setup_timer(&dev->watchdog_timer, nvme_watchdog_timer, 19462d55cd5fSChristoph Hellwig (unsigned long)dev); 194777bf25eaSKeith Busch mutex_init(&dev->shutdown_lock); 1948db3cbfffSKeith Busch init_completion(&dev->ioq_wait); 1949f3ca80fcSChristoph Hellwig 1950f3ca80fcSChristoph Hellwig result = nvme_setup_prp_pools(dev); 1951f3ca80fcSChristoph Hellwig if (result) 1952f3ca80fcSChristoph Hellwig goto put_pci; 1953f3ca80fcSChristoph Hellwig 1954f3ca80fcSChristoph Hellwig result = nvme_init_ctrl(&dev->ctrl, &pdev->dev, &nvme_pci_ctrl_ops, 1955f3ca80fcSChristoph Hellwig id->driver_data); 1956f3ca80fcSChristoph Hellwig if (result) 1957f3ca80fcSChristoph Hellwig goto release_pools; 1958f3ca80fcSChristoph Hellwig 19591b3c47c1SSagi Grimberg dev_info(dev->ctrl.device, "pci function %s\n", dev_name(&pdev->dev)); 19601b3c47c1SSagi Grimberg 196192f7a162SKeith Busch queue_work(nvme_workq, &dev->reset_work); 196257dacad5SJay Sternberg return 0; 196357dacad5SJay Sternberg 196457dacad5SJay Sternberg release_pools: 196557dacad5SJay Sternberg nvme_release_prp_pools(dev); 196657dacad5SJay Sternberg put_pci: 196757dacad5SJay Sternberg put_device(dev->dev); 1968b00a726aSKeith Busch nvme_dev_unmap(dev); 196957dacad5SJay Sternberg free: 197057dacad5SJay Sternberg kfree(dev->queues); 197157dacad5SJay Sternberg kfree(dev); 197257dacad5SJay Sternberg return result; 197357dacad5SJay Sternberg } 197457dacad5SJay Sternberg 197557dacad5SJay Sternberg static void nvme_reset_notify(struct pci_dev *pdev, bool prepare) 197657dacad5SJay Sternberg { 197757dacad5SJay Sternberg struct nvme_dev *dev = pci_get_drvdata(pdev); 197857dacad5SJay Sternberg 197957dacad5SJay Sternberg if (prepare) 1980a5cdb68cSKeith Busch nvme_dev_disable(dev, false); 198157dacad5SJay Sternberg else 1982c5f6ce97SKeith Busch nvme_reset(dev); 198357dacad5SJay Sternberg } 198457dacad5SJay Sternberg 198557dacad5SJay Sternberg static void nvme_shutdown(struct pci_dev *pdev) 198657dacad5SJay Sternberg { 198757dacad5SJay Sternberg struct nvme_dev *dev = pci_get_drvdata(pdev); 1988a5cdb68cSKeith Busch nvme_dev_disable(dev, true); 198957dacad5SJay Sternberg } 199057dacad5SJay Sternberg 1991f58944e2SKeith Busch /* 1992f58944e2SKeith Busch * The driver's remove may be called on a device in a partially initialized 1993f58944e2SKeith Busch * state. This function must not have any dependencies on the device state in 1994f58944e2SKeith Busch * order to proceed. 1995f58944e2SKeith Busch */ 199657dacad5SJay Sternberg static void nvme_remove(struct pci_dev *pdev) 199757dacad5SJay Sternberg { 199857dacad5SJay Sternberg struct nvme_dev *dev = pci_get_drvdata(pdev); 199957dacad5SJay Sternberg 2000bb8d261eSChristoph Hellwig nvme_change_ctrl_state(&dev->ctrl, NVME_CTRL_DELETING); 2001bb8d261eSChristoph Hellwig 200257dacad5SJay Sternberg pci_set_drvdata(pdev, NULL); 20030ff9d4e1SKeith Busch 20046db28edaSKeith Busch if (!pci_device_is_present(pdev)) { 20050ff9d4e1SKeith Busch nvme_change_ctrl_state(&dev->ctrl, NVME_CTRL_DEAD); 20066db28edaSKeith Busch nvme_dev_disable(dev, false); 20076db28edaSKeith Busch } 20080ff9d4e1SKeith Busch 20099bf2b972SKeith Busch flush_work(&dev->reset_work); 201053029b04SKeith Busch nvme_uninit_ctrl(&dev->ctrl); 2011a5cdb68cSKeith Busch nvme_dev_disable(dev, true); 201257dacad5SJay Sternberg nvme_dev_remove_admin(dev); 201357dacad5SJay Sternberg nvme_free_queues(dev, 0); 201457dacad5SJay Sternberg nvme_release_cmb(dev); 201557dacad5SJay Sternberg nvme_release_prp_pools(dev); 2016b00a726aSKeith Busch nvme_dev_unmap(dev); 20171673f1f0SChristoph Hellwig nvme_put_ctrl(&dev->ctrl); 201857dacad5SJay Sternberg } 201957dacad5SJay Sternberg 202013880f5bSKeith Busch static int nvme_pci_sriov_configure(struct pci_dev *pdev, int numvfs) 202113880f5bSKeith Busch { 202213880f5bSKeith Busch int ret = 0; 202313880f5bSKeith Busch 202413880f5bSKeith Busch if (numvfs == 0) { 202513880f5bSKeith Busch if (pci_vfs_assigned(pdev)) { 202613880f5bSKeith Busch dev_warn(&pdev->dev, 202713880f5bSKeith Busch "Cannot disable SR-IOV VFs while assigned\n"); 202813880f5bSKeith Busch return -EPERM; 202913880f5bSKeith Busch } 203013880f5bSKeith Busch pci_disable_sriov(pdev); 203113880f5bSKeith Busch return 0; 203213880f5bSKeith Busch } 203313880f5bSKeith Busch 203413880f5bSKeith Busch ret = pci_enable_sriov(pdev, numvfs); 203513880f5bSKeith Busch return ret ? ret : numvfs; 203613880f5bSKeith Busch } 203713880f5bSKeith Busch 203857dacad5SJay Sternberg #ifdef CONFIG_PM_SLEEP 203957dacad5SJay Sternberg static int nvme_suspend(struct device *dev) 204057dacad5SJay Sternberg { 204157dacad5SJay Sternberg struct pci_dev *pdev = to_pci_dev(dev); 204257dacad5SJay Sternberg struct nvme_dev *ndev = pci_get_drvdata(pdev); 204357dacad5SJay Sternberg 2044a5cdb68cSKeith Busch nvme_dev_disable(ndev, true); 204557dacad5SJay Sternberg return 0; 204657dacad5SJay Sternberg } 204757dacad5SJay Sternberg 204857dacad5SJay Sternberg static int nvme_resume(struct device *dev) 204957dacad5SJay Sternberg { 205057dacad5SJay Sternberg struct pci_dev *pdev = to_pci_dev(dev); 205157dacad5SJay Sternberg struct nvme_dev *ndev = pci_get_drvdata(pdev); 205257dacad5SJay Sternberg 2053c5f6ce97SKeith Busch nvme_reset(ndev); 205457dacad5SJay Sternberg return 0; 205557dacad5SJay Sternberg } 205657dacad5SJay Sternberg #endif 205757dacad5SJay Sternberg 205857dacad5SJay Sternberg static SIMPLE_DEV_PM_OPS(nvme_dev_pm_ops, nvme_suspend, nvme_resume); 205957dacad5SJay Sternberg 2060a0a3408eSKeith Busch static pci_ers_result_t nvme_error_detected(struct pci_dev *pdev, 2061a0a3408eSKeith Busch pci_channel_state_t state) 2062a0a3408eSKeith Busch { 2063a0a3408eSKeith Busch struct nvme_dev *dev = pci_get_drvdata(pdev); 2064a0a3408eSKeith Busch 2065a0a3408eSKeith Busch /* 2066a0a3408eSKeith Busch * A frozen channel requires a reset. When detected, this method will 2067a0a3408eSKeith Busch * shutdown the controller to quiesce. The controller will be restarted 2068a0a3408eSKeith Busch * after the slot reset through driver's slot_reset callback. 2069a0a3408eSKeith Busch */ 2070a0a3408eSKeith Busch switch (state) { 2071a0a3408eSKeith Busch case pci_channel_io_normal: 2072a0a3408eSKeith Busch return PCI_ERS_RESULT_CAN_RECOVER; 2073a0a3408eSKeith Busch case pci_channel_io_frozen: 2074d011fb31SKeith Busch dev_warn(dev->ctrl.device, 2075d011fb31SKeith Busch "frozen state error detected, reset controller\n"); 2076a5cdb68cSKeith Busch nvme_dev_disable(dev, false); 2077a0a3408eSKeith Busch return PCI_ERS_RESULT_NEED_RESET; 2078a0a3408eSKeith Busch case pci_channel_io_perm_failure: 2079d011fb31SKeith Busch dev_warn(dev->ctrl.device, 2080d011fb31SKeith Busch "failure state error detected, request disconnect\n"); 2081a0a3408eSKeith Busch return PCI_ERS_RESULT_DISCONNECT; 2082a0a3408eSKeith Busch } 2083a0a3408eSKeith Busch return PCI_ERS_RESULT_NEED_RESET; 2084a0a3408eSKeith Busch } 2085a0a3408eSKeith Busch 2086a0a3408eSKeith Busch static pci_ers_result_t nvme_slot_reset(struct pci_dev *pdev) 2087a0a3408eSKeith Busch { 2088a0a3408eSKeith Busch struct nvme_dev *dev = pci_get_drvdata(pdev); 2089a0a3408eSKeith Busch 20901b3c47c1SSagi Grimberg dev_info(dev->ctrl.device, "restart after slot reset\n"); 2091a0a3408eSKeith Busch pci_restore_state(pdev); 2092c5f6ce97SKeith Busch nvme_reset(dev); 2093a0a3408eSKeith Busch return PCI_ERS_RESULT_RECOVERED; 2094a0a3408eSKeith Busch } 2095a0a3408eSKeith Busch 2096a0a3408eSKeith Busch static void nvme_error_resume(struct pci_dev *pdev) 2097a0a3408eSKeith Busch { 2098a0a3408eSKeith Busch pci_cleanup_aer_uncorrect_error_status(pdev); 2099a0a3408eSKeith Busch } 2100a0a3408eSKeith Busch 210157dacad5SJay Sternberg static const struct pci_error_handlers nvme_err_handler = { 210257dacad5SJay Sternberg .error_detected = nvme_error_detected, 210357dacad5SJay Sternberg .slot_reset = nvme_slot_reset, 210457dacad5SJay Sternberg .resume = nvme_error_resume, 210557dacad5SJay Sternberg .reset_notify = nvme_reset_notify, 210657dacad5SJay Sternberg }; 210757dacad5SJay Sternberg 210857dacad5SJay Sternberg static const struct pci_device_id nvme_id_table[] = { 2109106198edSChristoph Hellwig { PCI_VDEVICE(INTEL, 0x0953), 211008095e70SKeith Busch .driver_data = NVME_QUIRK_STRIPE_SIZE | 2111e850fd16SChristoph Hellwig NVME_QUIRK_DEALLOCATE_ZEROES, }, 211299466e70SKeith Busch { PCI_VDEVICE(INTEL, 0x0a53), 211399466e70SKeith Busch .driver_data = NVME_QUIRK_STRIPE_SIZE | 2114e850fd16SChristoph Hellwig NVME_QUIRK_DEALLOCATE_ZEROES, }, 211599466e70SKeith Busch { PCI_VDEVICE(INTEL, 0x0a54), 211699466e70SKeith Busch .driver_data = NVME_QUIRK_STRIPE_SIZE | 2117e850fd16SChristoph Hellwig NVME_QUIRK_DEALLOCATE_ZEROES, }, 2118540c801cSKeith Busch { PCI_VDEVICE(INTEL, 0x5845), /* Qemu emulated controller */ 2119540c801cSKeith Busch .driver_data = NVME_QUIRK_IDENTIFY_CNS, }, 212054adc010SGuilherme G. Piccoli { PCI_DEVICE(0x1c58, 0x0003), /* HGST adapter */ 212154adc010SGuilherme G. Piccoli .driver_data = NVME_QUIRK_DELAY_BEFORE_CHK_RDY, }, 2122015282c9SWenbo Wang { PCI_DEVICE(0x1c5f, 0x0540), /* Memblaze Pblaze4 adapter */ 2123015282c9SWenbo Wang .driver_data = NVME_QUIRK_DELAY_BEFORE_CHK_RDY, }, 212457dacad5SJay Sternberg { PCI_DEVICE_CLASS(PCI_CLASS_STORAGE_EXPRESS, 0xffffff) }, 2125c74dc780SStephan Günther { PCI_DEVICE(PCI_VENDOR_ID_APPLE, 0x2001) }, 2126124298bdSDaniel Roschka { PCI_DEVICE(PCI_VENDOR_ID_APPLE, 0x2003) }, 212757dacad5SJay Sternberg { 0, } 212857dacad5SJay Sternberg }; 212957dacad5SJay Sternberg MODULE_DEVICE_TABLE(pci, nvme_id_table); 213057dacad5SJay Sternberg 213157dacad5SJay Sternberg static struct pci_driver nvme_driver = { 213257dacad5SJay Sternberg .name = "nvme", 213357dacad5SJay Sternberg .id_table = nvme_id_table, 213457dacad5SJay Sternberg .probe = nvme_probe, 213557dacad5SJay Sternberg .remove = nvme_remove, 213657dacad5SJay Sternberg .shutdown = nvme_shutdown, 213757dacad5SJay Sternberg .driver = { 213857dacad5SJay Sternberg .pm = &nvme_dev_pm_ops, 213957dacad5SJay Sternberg }, 214013880f5bSKeith Busch .sriov_configure = nvme_pci_sriov_configure, 214157dacad5SJay Sternberg .err_handler = &nvme_err_handler, 214257dacad5SJay Sternberg }; 214357dacad5SJay Sternberg 214457dacad5SJay Sternberg static int __init nvme_init(void) 214557dacad5SJay Sternberg { 214657dacad5SJay Sternberg int result; 214757dacad5SJay Sternberg 214892f7a162SKeith Busch nvme_workq = alloc_workqueue("nvme", WQ_UNBOUND | WQ_MEM_RECLAIM, 0); 214957dacad5SJay Sternberg if (!nvme_workq) 215057dacad5SJay Sternberg return -ENOMEM; 215157dacad5SJay Sternberg 215257dacad5SJay Sternberg result = pci_register_driver(&nvme_driver); 215357dacad5SJay Sternberg if (result) 215457dacad5SJay Sternberg destroy_workqueue(nvme_workq); 215557dacad5SJay Sternberg return result; 215657dacad5SJay Sternberg } 215757dacad5SJay Sternberg 215857dacad5SJay Sternberg static void __exit nvme_exit(void) 215957dacad5SJay Sternberg { 216057dacad5SJay Sternberg pci_unregister_driver(&nvme_driver); 216157dacad5SJay Sternberg destroy_workqueue(nvme_workq); 216257dacad5SJay Sternberg _nvme_check_size(); 216357dacad5SJay Sternberg } 216457dacad5SJay Sternberg 216557dacad5SJay Sternberg MODULE_AUTHOR("Matthew Wilcox <willy@linux.intel.com>"); 216657dacad5SJay Sternberg MODULE_LICENSE("GPL"); 216757dacad5SJay Sternberg MODULE_VERSION("1.0"); 216857dacad5SJay Sternberg module_init(nvme_init); 216957dacad5SJay Sternberg module_exit(nvme_exit); 2170