157dacad5SJay Sternberg /* 257dacad5SJay Sternberg * NVM Express device driver 357dacad5SJay Sternberg * Copyright (c) 2011-2014, Intel Corporation. 457dacad5SJay Sternberg * 557dacad5SJay Sternberg * This program is free software; you can redistribute it and/or modify it 657dacad5SJay Sternberg * under the terms and conditions of the GNU General Public License, 757dacad5SJay Sternberg * version 2, as published by the Free Software Foundation. 857dacad5SJay Sternberg * 957dacad5SJay Sternberg * This program is distributed in the hope it will be useful, but WITHOUT 1057dacad5SJay Sternberg * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 1157dacad5SJay Sternberg * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 1257dacad5SJay Sternberg * more details. 1357dacad5SJay Sternberg */ 1457dacad5SJay Sternberg 15a0a3408eSKeith Busch #include <linux/aer.h> 1657dacad5SJay Sternberg #include <linux/bitops.h> 1757dacad5SJay Sternberg #include <linux/blkdev.h> 1857dacad5SJay Sternberg #include <linux/blk-mq.h> 19dca51e78SChristoph Hellwig #include <linux/blk-mq-pci.h> 2057dacad5SJay Sternberg #include <linux/cpu.h> 2157dacad5SJay Sternberg #include <linux/delay.h> 2257dacad5SJay Sternberg #include <linux/errno.h> 2357dacad5SJay Sternberg #include <linux/fs.h> 2457dacad5SJay Sternberg #include <linux/genhd.h> 2557dacad5SJay Sternberg #include <linux/hdreg.h> 2657dacad5SJay Sternberg #include <linux/idr.h> 2757dacad5SJay Sternberg #include <linux/init.h> 2857dacad5SJay Sternberg #include <linux/interrupt.h> 2957dacad5SJay Sternberg #include <linux/io.h> 3057dacad5SJay Sternberg #include <linux/kdev_t.h> 3157dacad5SJay Sternberg #include <linux/kernel.h> 3257dacad5SJay Sternberg #include <linux/mm.h> 3357dacad5SJay Sternberg #include <linux/module.h> 3457dacad5SJay Sternberg #include <linux/moduleparam.h> 3577bf25eaSKeith Busch #include <linux/mutex.h> 3657dacad5SJay Sternberg #include <linux/pci.h> 3757dacad5SJay Sternberg #include <linux/poison.h> 3857dacad5SJay Sternberg #include <linux/ptrace.h> 3957dacad5SJay Sternberg #include <linux/sched.h> 4057dacad5SJay Sternberg #include <linux/slab.h> 4157dacad5SJay Sternberg #include <linux/t10-pi.h> 422d55cd5fSChristoph Hellwig #include <linux/timer.h> 4357dacad5SJay Sternberg #include <linux/types.h> 449cf5c095SLinus Torvalds #include <linux/io-64-nonatomic-lo-hi.h> 451d277a63SKeith Busch #include <asm/unaligned.h> 46a98e58e5SScott Bauer #include <linux/sed-opal.h> 4757dacad5SJay Sternberg 4857dacad5SJay Sternberg #include "nvme.h" 4957dacad5SJay Sternberg 5057dacad5SJay Sternberg #define NVME_Q_DEPTH 1024 5157dacad5SJay Sternberg #define NVME_AQ_DEPTH 256 5257dacad5SJay Sternberg #define SQ_SIZE(depth) (depth * sizeof(struct nvme_command)) 5357dacad5SJay Sternberg #define CQ_SIZE(depth) (depth * sizeof(struct nvme_completion)) 5457dacad5SJay Sternberg 55adf68f21SChristoph Hellwig /* 56adf68f21SChristoph Hellwig * We handle AEN commands ourselves and don't even let the 57adf68f21SChristoph Hellwig * block layer know about them. 58adf68f21SChristoph Hellwig */ 59f866fc42SChristoph Hellwig #define NVME_AQ_BLKMQ_DEPTH (NVME_AQ_DEPTH - NVME_NR_AERS) 60adf68f21SChristoph Hellwig 6157dacad5SJay Sternberg static int use_threaded_interrupts; 6257dacad5SJay Sternberg module_param(use_threaded_interrupts, int, 0); 6357dacad5SJay Sternberg 6457dacad5SJay Sternberg static bool use_cmb_sqes = true; 6557dacad5SJay Sternberg module_param(use_cmb_sqes, bool, 0644); 6657dacad5SJay Sternberg MODULE_PARM_DESC(use_cmb_sqes, "use controller's memory buffer for I/O SQes"); 6757dacad5SJay Sternberg 6857dacad5SJay Sternberg static struct workqueue_struct *nvme_workq; 6957dacad5SJay Sternberg 701c63dc66SChristoph Hellwig struct nvme_dev; 711c63dc66SChristoph Hellwig struct nvme_queue; 7257dacad5SJay Sternberg 7357dacad5SJay Sternberg static int nvme_reset(struct nvme_dev *dev); 74a0fa9647SJens Axboe static void nvme_process_cq(struct nvme_queue *nvmeq); 75a5cdb68cSKeith Busch static void nvme_dev_disable(struct nvme_dev *dev, bool shutdown); 7657dacad5SJay Sternberg 7757dacad5SJay Sternberg /* 781c63dc66SChristoph Hellwig * Represents an NVM Express device. Each nvme_dev is a PCI function. 791c63dc66SChristoph Hellwig */ 801c63dc66SChristoph Hellwig struct nvme_dev { 811c63dc66SChristoph Hellwig struct nvme_queue **queues; 821c63dc66SChristoph Hellwig struct blk_mq_tag_set tagset; 831c63dc66SChristoph Hellwig struct blk_mq_tag_set admin_tagset; 841c63dc66SChristoph Hellwig u32 __iomem *dbs; 851c63dc66SChristoph Hellwig struct device *dev; 861c63dc66SChristoph Hellwig struct dma_pool *prp_page_pool; 871c63dc66SChristoph Hellwig struct dma_pool *prp_small_pool; 881c63dc66SChristoph Hellwig unsigned queue_count; 891c63dc66SChristoph Hellwig unsigned online_queues; 901c63dc66SChristoph Hellwig unsigned max_qid; 911c63dc66SChristoph Hellwig int q_depth; 921c63dc66SChristoph Hellwig u32 db_stride; 931c63dc66SChristoph Hellwig void __iomem *bar; 941c63dc66SChristoph Hellwig struct work_struct reset_work; 955c8809e6SChristoph Hellwig struct work_struct remove_work; 962d55cd5fSChristoph Hellwig struct timer_list watchdog_timer; 9777bf25eaSKeith Busch struct mutex shutdown_lock; 981c63dc66SChristoph Hellwig bool subsystem; 991c63dc66SChristoph Hellwig void __iomem *cmb; 1001c63dc66SChristoph Hellwig dma_addr_t cmb_dma_addr; 1011c63dc66SChristoph Hellwig u64 cmb_size; 1021c63dc66SChristoph Hellwig u32 cmbsz; 103202021c1SStephen Bates u32 cmbloc; 1041c63dc66SChristoph Hellwig struct nvme_ctrl ctrl; 105db3cbfffSKeith Busch struct completion ioq_wait; 106f9f38e33SHelen Koike u32 *dbbuf_dbs; 107f9f38e33SHelen Koike dma_addr_t dbbuf_dbs_dma_addr; 108f9f38e33SHelen Koike u32 *dbbuf_eis; 109f9f38e33SHelen Koike dma_addr_t dbbuf_eis_dma_addr; 11057dacad5SJay Sternberg }; 11157dacad5SJay Sternberg 112f9f38e33SHelen Koike static inline unsigned int sq_idx(unsigned int qid, u32 stride) 113f9f38e33SHelen Koike { 114f9f38e33SHelen Koike return qid * 2 * stride; 115f9f38e33SHelen Koike } 116f9f38e33SHelen Koike 117f9f38e33SHelen Koike static inline unsigned int cq_idx(unsigned int qid, u32 stride) 118f9f38e33SHelen Koike { 119f9f38e33SHelen Koike return (qid * 2 + 1) * stride; 120f9f38e33SHelen Koike } 121f9f38e33SHelen Koike 1221c63dc66SChristoph Hellwig static inline struct nvme_dev *to_nvme_dev(struct nvme_ctrl *ctrl) 1231c63dc66SChristoph Hellwig { 1241c63dc66SChristoph Hellwig return container_of(ctrl, struct nvme_dev, ctrl); 1251c63dc66SChristoph Hellwig } 1261c63dc66SChristoph Hellwig 12757dacad5SJay Sternberg /* 12857dacad5SJay Sternberg * An NVM Express queue. Each device has at least two (one for admin 12957dacad5SJay Sternberg * commands and one for I/O commands). 13057dacad5SJay Sternberg */ 13157dacad5SJay Sternberg struct nvme_queue { 13257dacad5SJay Sternberg struct device *q_dmadev; 13357dacad5SJay Sternberg struct nvme_dev *dev; 13457dacad5SJay Sternberg char irqname[24]; /* nvme4294967295-65535\0 */ 13557dacad5SJay Sternberg spinlock_t q_lock; 13657dacad5SJay Sternberg struct nvme_command *sq_cmds; 13757dacad5SJay Sternberg struct nvme_command __iomem *sq_cmds_io; 13857dacad5SJay Sternberg volatile struct nvme_completion *cqes; 13957dacad5SJay Sternberg struct blk_mq_tags **tags; 14057dacad5SJay Sternberg dma_addr_t sq_dma_addr; 14157dacad5SJay Sternberg dma_addr_t cq_dma_addr; 14257dacad5SJay Sternberg u32 __iomem *q_db; 14357dacad5SJay Sternberg u16 q_depth; 14457dacad5SJay Sternberg s16 cq_vector; 14557dacad5SJay Sternberg u16 sq_tail; 14657dacad5SJay Sternberg u16 cq_head; 14757dacad5SJay Sternberg u16 qid; 14857dacad5SJay Sternberg u8 cq_phase; 14957dacad5SJay Sternberg u8 cqe_seen; 150f9f38e33SHelen Koike u32 *dbbuf_sq_db; 151f9f38e33SHelen Koike u32 *dbbuf_cq_db; 152f9f38e33SHelen Koike u32 *dbbuf_sq_ei; 153f9f38e33SHelen Koike u32 *dbbuf_cq_ei; 15457dacad5SJay Sternberg }; 15557dacad5SJay Sternberg 15657dacad5SJay Sternberg /* 15771bd150cSChristoph Hellwig * The nvme_iod describes the data in an I/O, including the list of PRP 15871bd150cSChristoph Hellwig * entries. You can't see it in this data structure because C doesn't let 159f4800d6dSChristoph Hellwig * me express that. Use nvme_init_iod to ensure there's enough space 16071bd150cSChristoph Hellwig * allocated to store the PRP list. 16171bd150cSChristoph Hellwig */ 16271bd150cSChristoph Hellwig struct nvme_iod { 163d49187e9SChristoph Hellwig struct nvme_request req; 164f4800d6dSChristoph Hellwig struct nvme_queue *nvmeq; 165f4800d6dSChristoph Hellwig int aborted; 16671bd150cSChristoph Hellwig int npages; /* In the PRP list. 0 means small pool in use */ 16771bd150cSChristoph Hellwig int nents; /* Used in scatterlist */ 16871bd150cSChristoph Hellwig int length; /* Of data, in bytes */ 16971bd150cSChristoph Hellwig dma_addr_t first_dma; 170bf684057SChristoph Hellwig struct scatterlist meta_sg; /* metadata requires single contiguous buffer */ 171f4800d6dSChristoph Hellwig struct scatterlist *sg; 172f4800d6dSChristoph Hellwig struct scatterlist inline_sg[0]; 17357dacad5SJay Sternberg }; 17457dacad5SJay Sternberg 17557dacad5SJay Sternberg /* 17657dacad5SJay Sternberg * Check we didin't inadvertently grow the command struct 17757dacad5SJay Sternberg */ 17857dacad5SJay Sternberg static inline void _nvme_check_size(void) 17957dacad5SJay Sternberg { 18057dacad5SJay Sternberg BUILD_BUG_ON(sizeof(struct nvme_rw_command) != 64); 18157dacad5SJay Sternberg BUILD_BUG_ON(sizeof(struct nvme_create_cq) != 64); 18257dacad5SJay Sternberg BUILD_BUG_ON(sizeof(struct nvme_create_sq) != 64); 18357dacad5SJay Sternberg BUILD_BUG_ON(sizeof(struct nvme_delete_queue) != 64); 18457dacad5SJay Sternberg BUILD_BUG_ON(sizeof(struct nvme_features) != 64); 18557dacad5SJay Sternberg BUILD_BUG_ON(sizeof(struct nvme_format_cmd) != 64); 18657dacad5SJay Sternberg BUILD_BUG_ON(sizeof(struct nvme_abort_cmd) != 64); 18757dacad5SJay Sternberg BUILD_BUG_ON(sizeof(struct nvme_command) != 64); 18857dacad5SJay Sternberg BUILD_BUG_ON(sizeof(struct nvme_id_ctrl) != 4096); 18957dacad5SJay Sternberg BUILD_BUG_ON(sizeof(struct nvme_id_ns) != 4096); 19057dacad5SJay Sternberg BUILD_BUG_ON(sizeof(struct nvme_lba_range_type) != 64); 19157dacad5SJay Sternberg BUILD_BUG_ON(sizeof(struct nvme_smart_log) != 512); 192f9f38e33SHelen Koike BUILD_BUG_ON(sizeof(struct nvme_dbbuf) != 64); 193f9f38e33SHelen Koike } 194f9f38e33SHelen Koike 195f9f38e33SHelen Koike static inline unsigned int nvme_dbbuf_size(u32 stride) 196f9f38e33SHelen Koike { 197f9f38e33SHelen Koike return ((num_possible_cpus() + 1) * 8 * stride); 198f9f38e33SHelen Koike } 199f9f38e33SHelen Koike 200f9f38e33SHelen Koike static int nvme_dbbuf_dma_alloc(struct nvme_dev *dev) 201f9f38e33SHelen Koike { 202f9f38e33SHelen Koike unsigned int mem_size = nvme_dbbuf_size(dev->db_stride); 203f9f38e33SHelen Koike 204f9f38e33SHelen Koike if (dev->dbbuf_dbs) 205f9f38e33SHelen Koike return 0; 206f9f38e33SHelen Koike 207f9f38e33SHelen Koike dev->dbbuf_dbs = dma_alloc_coherent(dev->dev, mem_size, 208f9f38e33SHelen Koike &dev->dbbuf_dbs_dma_addr, 209f9f38e33SHelen Koike GFP_KERNEL); 210f9f38e33SHelen Koike if (!dev->dbbuf_dbs) 211f9f38e33SHelen Koike return -ENOMEM; 212f9f38e33SHelen Koike dev->dbbuf_eis = dma_alloc_coherent(dev->dev, mem_size, 213f9f38e33SHelen Koike &dev->dbbuf_eis_dma_addr, 214f9f38e33SHelen Koike GFP_KERNEL); 215f9f38e33SHelen Koike if (!dev->dbbuf_eis) { 216f9f38e33SHelen Koike dma_free_coherent(dev->dev, mem_size, 217f9f38e33SHelen Koike dev->dbbuf_dbs, dev->dbbuf_dbs_dma_addr); 218f9f38e33SHelen Koike dev->dbbuf_dbs = NULL; 219f9f38e33SHelen Koike return -ENOMEM; 220f9f38e33SHelen Koike } 221f9f38e33SHelen Koike 222f9f38e33SHelen Koike return 0; 223f9f38e33SHelen Koike } 224f9f38e33SHelen Koike 225f9f38e33SHelen Koike static void nvme_dbbuf_dma_free(struct nvme_dev *dev) 226f9f38e33SHelen Koike { 227f9f38e33SHelen Koike unsigned int mem_size = nvme_dbbuf_size(dev->db_stride); 228f9f38e33SHelen Koike 229f9f38e33SHelen Koike if (dev->dbbuf_dbs) { 230f9f38e33SHelen Koike dma_free_coherent(dev->dev, mem_size, 231f9f38e33SHelen Koike dev->dbbuf_dbs, dev->dbbuf_dbs_dma_addr); 232f9f38e33SHelen Koike dev->dbbuf_dbs = NULL; 233f9f38e33SHelen Koike } 234f9f38e33SHelen Koike if (dev->dbbuf_eis) { 235f9f38e33SHelen Koike dma_free_coherent(dev->dev, mem_size, 236f9f38e33SHelen Koike dev->dbbuf_eis, dev->dbbuf_eis_dma_addr); 237f9f38e33SHelen Koike dev->dbbuf_eis = NULL; 238f9f38e33SHelen Koike } 239f9f38e33SHelen Koike } 240f9f38e33SHelen Koike 241f9f38e33SHelen Koike static void nvme_dbbuf_init(struct nvme_dev *dev, 242f9f38e33SHelen Koike struct nvme_queue *nvmeq, int qid) 243f9f38e33SHelen Koike { 244f9f38e33SHelen Koike if (!dev->dbbuf_dbs || !qid) 245f9f38e33SHelen Koike return; 246f9f38e33SHelen Koike 247f9f38e33SHelen Koike nvmeq->dbbuf_sq_db = &dev->dbbuf_dbs[sq_idx(qid, dev->db_stride)]; 248f9f38e33SHelen Koike nvmeq->dbbuf_cq_db = &dev->dbbuf_dbs[cq_idx(qid, dev->db_stride)]; 249f9f38e33SHelen Koike nvmeq->dbbuf_sq_ei = &dev->dbbuf_eis[sq_idx(qid, dev->db_stride)]; 250f9f38e33SHelen Koike nvmeq->dbbuf_cq_ei = &dev->dbbuf_eis[cq_idx(qid, dev->db_stride)]; 251f9f38e33SHelen Koike } 252f9f38e33SHelen Koike 253f9f38e33SHelen Koike static void nvme_dbbuf_set(struct nvme_dev *dev) 254f9f38e33SHelen Koike { 255f9f38e33SHelen Koike struct nvme_command c; 256f9f38e33SHelen Koike 257f9f38e33SHelen Koike if (!dev->dbbuf_dbs) 258f9f38e33SHelen Koike return; 259f9f38e33SHelen Koike 260f9f38e33SHelen Koike memset(&c, 0, sizeof(c)); 261f9f38e33SHelen Koike c.dbbuf.opcode = nvme_admin_dbbuf; 262f9f38e33SHelen Koike c.dbbuf.prp1 = cpu_to_le64(dev->dbbuf_dbs_dma_addr); 263f9f38e33SHelen Koike c.dbbuf.prp2 = cpu_to_le64(dev->dbbuf_eis_dma_addr); 264f9f38e33SHelen Koike 265f9f38e33SHelen Koike if (nvme_submit_sync_cmd(dev->ctrl.admin_q, &c, NULL, 0)) { 266f9f38e33SHelen Koike dev_warn(dev->dev, "unable to set dbbuf\n"); 267f9f38e33SHelen Koike /* Free memory and continue on */ 268f9f38e33SHelen Koike nvme_dbbuf_dma_free(dev); 269f9f38e33SHelen Koike } 270f9f38e33SHelen Koike } 271f9f38e33SHelen Koike 272f9f38e33SHelen Koike static inline int nvme_dbbuf_need_event(u16 event_idx, u16 new_idx, u16 old) 273f9f38e33SHelen Koike { 274f9f38e33SHelen Koike return (u16)(new_idx - event_idx - 1) < (u16)(new_idx - old); 275f9f38e33SHelen Koike } 276f9f38e33SHelen Koike 277f9f38e33SHelen Koike /* Update dbbuf and return true if an MMIO is required */ 278f9f38e33SHelen Koike static bool nvme_dbbuf_update_and_check_event(u16 value, u32 *dbbuf_db, 279f9f38e33SHelen Koike volatile u32 *dbbuf_ei) 280f9f38e33SHelen Koike { 281f9f38e33SHelen Koike if (dbbuf_db) { 282f9f38e33SHelen Koike u16 old_value; 283f9f38e33SHelen Koike 284f9f38e33SHelen Koike /* 285f9f38e33SHelen Koike * Ensure that the queue is written before updating 286f9f38e33SHelen Koike * the doorbell in memory 287f9f38e33SHelen Koike */ 288f9f38e33SHelen Koike wmb(); 289f9f38e33SHelen Koike 290f9f38e33SHelen Koike old_value = *dbbuf_db; 291f9f38e33SHelen Koike *dbbuf_db = value; 292f9f38e33SHelen Koike 293f9f38e33SHelen Koike if (!nvme_dbbuf_need_event(*dbbuf_ei, value, old_value)) 294f9f38e33SHelen Koike return false; 295f9f38e33SHelen Koike } 296f9f38e33SHelen Koike 297f9f38e33SHelen Koike return true; 29857dacad5SJay Sternberg } 29957dacad5SJay Sternberg 30057dacad5SJay Sternberg /* 30157dacad5SJay Sternberg * Max size of iod being embedded in the request payload 30257dacad5SJay Sternberg */ 30357dacad5SJay Sternberg #define NVME_INT_PAGES 2 3045fd4ce1bSChristoph Hellwig #define NVME_INT_BYTES(dev) (NVME_INT_PAGES * (dev)->ctrl.page_size) 30557dacad5SJay Sternberg 30657dacad5SJay Sternberg /* 30757dacad5SJay Sternberg * Will slightly overestimate the number of pages needed. This is OK 30857dacad5SJay Sternberg * as it only leads to a small amount of wasted memory for the lifetime of 30957dacad5SJay Sternberg * the I/O. 31057dacad5SJay Sternberg */ 31157dacad5SJay Sternberg static int nvme_npages(unsigned size, struct nvme_dev *dev) 31257dacad5SJay Sternberg { 3135fd4ce1bSChristoph Hellwig unsigned nprps = DIV_ROUND_UP(size + dev->ctrl.page_size, 3145fd4ce1bSChristoph Hellwig dev->ctrl.page_size); 31557dacad5SJay Sternberg return DIV_ROUND_UP(8 * nprps, PAGE_SIZE - 8); 31657dacad5SJay Sternberg } 31757dacad5SJay Sternberg 318f4800d6dSChristoph Hellwig static unsigned int nvme_iod_alloc_size(struct nvme_dev *dev, 319f4800d6dSChristoph Hellwig unsigned int size, unsigned int nseg) 320f4800d6dSChristoph Hellwig { 321f4800d6dSChristoph Hellwig return sizeof(__le64 *) * nvme_npages(size, dev) + 322f4800d6dSChristoph Hellwig sizeof(struct scatterlist) * nseg; 323f4800d6dSChristoph Hellwig } 324f4800d6dSChristoph Hellwig 32557dacad5SJay Sternberg static unsigned int nvme_cmd_size(struct nvme_dev *dev) 32657dacad5SJay Sternberg { 327f4800d6dSChristoph Hellwig return sizeof(struct nvme_iod) + 328f4800d6dSChristoph Hellwig nvme_iod_alloc_size(dev, NVME_INT_BYTES(dev), NVME_INT_PAGES); 32957dacad5SJay Sternberg } 33057dacad5SJay Sternberg 331dca51e78SChristoph Hellwig static int nvmeq_irq(struct nvme_queue *nvmeq) 332dca51e78SChristoph Hellwig { 333dca51e78SChristoph Hellwig return pci_irq_vector(to_pci_dev(nvmeq->dev->dev), nvmeq->cq_vector); 334dca51e78SChristoph Hellwig } 335dca51e78SChristoph Hellwig 33657dacad5SJay Sternberg static int nvme_admin_init_hctx(struct blk_mq_hw_ctx *hctx, void *data, 33757dacad5SJay Sternberg unsigned int hctx_idx) 33857dacad5SJay Sternberg { 33957dacad5SJay Sternberg struct nvme_dev *dev = data; 34057dacad5SJay Sternberg struct nvme_queue *nvmeq = dev->queues[0]; 34157dacad5SJay Sternberg 34257dacad5SJay Sternberg WARN_ON(hctx_idx != 0); 34357dacad5SJay Sternberg WARN_ON(dev->admin_tagset.tags[0] != hctx->tags); 34457dacad5SJay Sternberg WARN_ON(nvmeq->tags); 34557dacad5SJay Sternberg 34657dacad5SJay Sternberg hctx->driver_data = nvmeq; 34757dacad5SJay Sternberg nvmeq->tags = &dev->admin_tagset.tags[0]; 34857dacad5SJay Sternberg return 0; 34957dacad5SJay Sternberg } 35057dacad5SJay Sternberg 35157dacad5SJay Sternberg static void nvme_admin_exit_hctx(struct blk_mq_hw_ctx *hctx, unsigned int hctx_idx) 35257dacad5SJay Sternberg { 35357dacad5SJay Sternberg struct nvme_queue *nvmeq = hctx->driver_data; 35457dacad5SJay Sternberg 35557dacad5SJay Sternberg nvmeq->tags = NULL; 35657dacad5SJay Sternberg } 35757dacad5SJay Sternberg 35857dacad5SJay Sternberg static int nvme_admin_init_request(void *data, struct request *req, 35957dacad5SJay Sternberg unsigned int hctx_idx, unsigned int rq_idx, 36057dacad5SJay Sternberg unsigned int numa_node) 36157dacad5SJay Sternberg { 36257dacad5SJay Sternberg struct nvme_dev *dev = data; 363f4800d6dSChristoph Hellwig struct nvme_iod *iod = blk_mq_rq_to_pdu(req); 36457dacad5SJay Sternberg struct nvme_queue *nvmeq = dev->queues[0]; 36557dacad5SJay Sternberg 36657dacad5SJay Sternberg BUG_ON(!nvmeq); 367f4800d6dSChristoph Hellwig iod->nvmeq = nvmeq; 36857dacad5SJay Sternberg return 0; 36957dacad5SJay Sternberg } 37057dacad5SJay Sternberg 37157dacad5SJay Sternberg static int nvme_init_hctx(struct blk_mq_hw_ctx *hctx, void *data, 37257dacad5SJay Sternberg unsigned int hctx_idx) 37357dacad5SJay Sternberg { 37457dacad5SJay Sternberg struct nvme_dev *dev = data; 37557dacad5SJay Sternberg struct nvme_queue *nvmeq = dev->queues[hctx_idx + 1]; 37657dacad5SJay Sternberg 37757dacad5SJay Sternberg if (!nvmeq->tags) 37857dacad5SJay Sternberg nvmeq->tags = &dev->tagset.tags[hctx_idx]; 37957dacad5SJay Sternberg 38057dacad5SJay Sternberg WARN_ON(dev->tagset.tags[hctx_idx] != hctx->tags); 38157dacad5SJay Sternberg hctx->driver_data = nvmeq; 38257dacad5SJay Sternberg return 0; 38357dacad5SJay Sternberg } 38457dacad5SJay Sternberg 38557dacad5SJay Sternberg static int nvme_init_request(void *data, struct request *req, 38657dacad5SJay Sternberg unsigned int hctx_idx, unsigned int rq_idx, 38757dacad5SJay Sternberg unsigned int numa_node) 38857dacad5SJay Sternberg { 38957dacad5SJay Sternberg struct nvme_dev *dev = data; 390f4800d6dSChristoph Hellwig struct nvme_iod *iod = blk_mq_rq_to_pdu(req); 39157dacad5SJay Sternberg struct nvme_queue *nvmeq = dev->queues[hctx_idx + 1]; 39257dacad5SJay Sternberg 39357dacad5SJay Sternberg BUG_ON(!nvmeq); 394f4800d6dSChristoph Hellwig iod->nvmeq = nvmeq; 39557dacad5SJay Sternberg return 0; 39657dacad5SJay Sternberg } 39757dacad5SJay Sternberg 398dca51e78SChristoph Hellwig static int nvme_pci_map_queues(struct blk_mq_tag_set *set) 399dca51e78SChristoph Hellwig { 400dca51e78SChristoph Hellwig struct nvme_dev *dev = set->driver_data; 401dca51e78SChristoph Hellwig 402dca51e78SChristoph Hellwig return blk_mq_pci_map_queues(set, to_pci_dev(dev->dev)); 403dca51e78SChristoph Hellwig } 404dca51e78SChristoph Hellwig 40557dacad5SJay Sternberg /** 406adf68f21SChristoph Hellwig * __nvme_submit_cmd() - Copy a command into a queue and ring the doorbell 40757dacad5SJay Sternberg * @nvmeq: The queue to use 40857dacad5SJay Sternberg * @cmd: The command to send 40957dacad5SJay Sternberg * 41057dacad5SJay Sternberg * Safe to use from interrupt context 41157dacad5SJay Sternberg */ 41257dacad5SJay Sternberg static void __nvme_submit_cmd(struct nvme_queue *nvmeq, 41357dacad5SJay Sternberg struct nvme_command *cmd) 41457dacad5SJay Sternberg { 41557dacad5SJay Sternberg u16 tail = nvmeq->sq_tail; 41657dacad5SJay Sternberg 41757dacad5SJay Sternberg if (nvmeq->sq_cmds_io) 41857dacad5SJay Sternberg memcpy_toio(&nvmeq->sq_cmds_io[tail], cmd, sizeof(*cmd)); 41957dacad5SJay Sternberg else 42057dacad5SJay Sternberg memcpy(&nvmeq->sq_cmds[tail], cmd, sizeof(*cmd)); 42157dacad5SJay Sternberg 42257dacad5SJay Sternberg if (++tail == nvmeq->q_depth) 42357dacad5SJay Sternberg tail = 0; 424f9f38e33SHelen Koike if (nvme_dbbuf_update_and_check_event(tail, nvmeq->dbbuf_sq_db, 425f9f38e33SHelen Koike nvmeq->dbbuf_sq_ei)) 42657dacad5SJay Sternberg writel(tail, nvmeq->q_db); 42757dacad5SJay Sternberg nvmeq->sq_tail = tail; 42857dacad5SJay Sternberg } 42957dacad5SJay Sternberg 430f4800d6dSChristoph Hellwig static __le64 **iod_list(struct request *req) 43157dacad5SJay Sternberg { 432f4800d6dSChristoph Hellwig struct nvme_iod *iod = blk_mq_rq_to_pdu(req); 433f9d03f96SChristoph Hellwig return (__le64 **)(iod->sg + blk_rq_nr_phys_segments(req)); 43457dacad5SJay Sternberg } 43557dacad5SJay Sternberg 436b131c61dSChristoph Hellwig static int nvme_init_iod(struct request *rq, struct nvme_dev *dev) 43757dacad5SJay Sternberg { 438f4800d6dSChristoph Hellwig struct nvme_iod *iod = blk_mq_rq_to_pdu(rq); 439f9d03f96SChristoph Hellwig int nseg = blk_rq_nr_phys_segments(rq); 440b131c61dSChristoph Hellwig unsigned int size = blk_rq_payload_bytes(rq); 441f4800d6dSChristoph Hellwig 442f4800d6dSChristoph Hellwig if (nseg > NVME_INT_PAGES || size > NVME_INT_BYTES(dev)) { 443f4800d6dSChristoph Hellwig iod->sg = kmalloc(nvme_iod_alloc_size(dev, size, nseg), GFP_ATOMIC); 444f4800d6dSChristoph Hellwig if (!iod->sg) 445f4800d6dSChristoph Hellwig return BLK_MQ_RQ_QUEUE_BUSY; 446f4800d6dSChristoph Hellwig } else { 447f4800d6dSChristoph Hellwig iod->sg = iod->inline_sg; 44857dacad5SJay Sternberg } 44957dacad5SJay Sternberg 450f4800d6dSChristoph Hellwig iod->aborted = 0; 45157dacad5SJay Sternberg iod->npages = -1; 45257dacad5SJay Sternberg iod->nents = 0; 453f4800d6dSChristoph Hellwig iod->length = size; 454f80ec966SKeith Busch 455bac0000aSOmar Sandoval return BLK_MQ_RQ_QUEUE_OK; 45657dacad5SJay Sternberg } 45757dacad5SJay Sternberg 458f4800d6dSChristoph Hellwig static void nvme_free_iod(struct nvme_dev *dev, struct request *req) 45957dacad5SJay Sternberg { 460f4800d6dSChristoph Hellwig struct nvme_iod *iod = blk_mq_rq_to_pdu(req); 4615fd4ce1bSChristoph Hellwig const int last_prp = dev->ctrl.page_size / 8 - 1; 46257dacad5SJay Sternberg int i; 463f4800d6dSChristoph Hellwig __le64 **list = iod_list(req); 46457dacad5SJay Sternberg dma_addr_t prp_dma = iod->first_dma; 46557dacad5SJay Sternberg 46657dacad5SJay Sternberg if (iod->npages == 0) 46757dacad5SJay Sternberg dma_pool_free(dev->prp_small_pool, list[0], prp_dma); 46857dacad5SJay Sternberg for (i = 0; i < iod->npages; i++) { 46957dacad5SJay Sternberg __le64 *prp_list = list[i]; 47057dacad5SJay Sternberg dma_addr_t next_prp_dma = le64_to_cpu(prp_list[last_prp]); 47157dacad5SJay Sternberg dma_pool_free(dev->prp_page_pool, prp_list, prp_dma); 47257dacad5SJay Sternberg prp_dma = next_prp_dma; 47357dacad5SJay Sternberg } 47457dacad5SJay Sternberg 475f4800d6dSChristoph Hellwig if (iod->sg != iod->inline_sg) 476f4800d6dSChristoph Hellwig kfree(iod->sg); 47757dacad5SJay Sternberg } 47857dacad5SJay Sternberg 47957dacad5SJay Sternberg #ifdef CONFIG_BLK_DEV_INTEGRITY 48057dacad5SJay Sternberg static void nvme_dif_prep(u32 p, u32 v, struct t10_pi_tuple *pi) 48157dacad5SJay Sternberg { 48257dacad5SJay Sternberg if (be32_to_cpu(pi->ref_tag) == v) 48357dacad5SJay Sternberg pi->ref_tag = cpu_to_be32(p); 48457dacad5SJay Sternberg } 48557dacad5SJay Sternberg 48657dacad5SJay Sternberg static void nvme_dif_complete(u32 p, u32 v, struct t10_pi_tuple *pi) 48757dacad5SJay Sternberg { 48857dacad5SJay Sternberg if (be32_to_cpu(pi->ref_tag) == p) 48957dacad5SJay Sternberg pi->ref_tag = cpu_to_be32(v); 49057dacad5SJay Sternberg } 49157dacad5SJay Sternberg 49257dacad5SJay Sternberg /** 49357dacad5SJay Sternberg * nvme_dif_remap - remaps ref tags to bip seed and physical lba 49457dacad5SJay Sternberg * 49557dacad5SJay Sternberg * The virtual start sector is the one that was originally submitted by the 49657dacad5SJay Sternberg * block layer. Due to partitioning, MD/DM cloning, etc. the actual physical 49757dacad5SJay Sternberg * start sector may be different. Remap protection information to match the 49857dacad5SJay Sternberg * physical LBA on writes, and back to the original seed on reads. 49957dacad5SJay Sternberg * 50057dacad5SJay Sternberg * Type 0 and 3 do not have a ref tag, so no remapping required. 50157dacad5SJay Sternberg */ 50257dacad5SJay Sternberg static void nvme_dif_remap(struct request *req, 50357dacad5SJay Sternberg void (*dif_swap)(u32 p, u32 v, struct t10_pi_tuple *pi)) 50457dacad5SJay Sternberg { 50557dacad5SJay Sternberg struct nvme_ns *ns = req->rq_disk->private_data; 50657dacad5SJay Sternberg struct bio_integrity_payload *bip; 50757dacad5SJay Sternberg struct t10_pi_tuple *pi; 50857dacad5SJay Sternberg void *p, *pmap; 50957dacad5SJay Sternberg u32 i, nlb, ts, phys, virt; 51057dacad5SJay Sternberg 51157dacad5SJay Sternberg if (!ns->pi_type || ns->pi_type == NVME_NS_DPS_PI_TYPE3) 51257dacad5SJay Sternberg return; 51357dacad5SJay Sternberg 51457dacad5SJay Sternberg bip = bio_integrity(req->bio); 51557dacad5SJay Sternberg if (!bip) 51657dacad5SJay Sternberg return; 51757dacad5SJay Sternberg 51857dacad5SJay Sternberg pmap = kmap_atomic(bip->bip_vec->bv_page) + bip->bip_vec->bv_offset; 51957dacad5SJay Sternberg 52057dacad5SJay Sternberg p = pmap; 52157dacad5SJay Sternberg virt = bip_get_seed(bip); 52257dacad5SJay Sternberg phys = nvme_block_nr(ns, blk_rq_pos(req)); 52357dacad5SJay Sternberg nlb = (blk_rq_bytes(req) >> ns->lba_shift); 524ac6fc48cSDan Williams ts = ns->disk->queue->integrity.tuple_size; 52557dacad5SJay Sternberg 52657dacad5SJay Sternberg for (i = 0; i < nlb; i++, virt++, phys++) { 52757dacad5SJay Sternberg pi = (struct t10_pi_tuple *)p; 52857dacad5SJay Sternberg dif_swap(phys, virt, pi); 52957dacad5SJay Sternberg p += ts; 53057dacad5SJay Sternberg } 53157dacad5SJay Sternberg kunmap_atomic(pmap); 53257dacad5SJay Sternberg } 53357dacad5SJay Sternberg #else /* CONFIG_BLK_DEV_INTEGRITY */ 53457dacad5SJay Sternberg static void nvme_dif_remap(struct request *req, 53557dacad5SJay Sternberg void (*dif_swap)(u32 p, u32 v, struct t10_pi_tuple *pi)) 53657dacad5SJay Sternberg { 53757dacad5SJay Sternberg } 53857dacad5SJay Sternberg static void nvme_dif_prep(u32 p, u32 v, struct t10_pi_tuple *pi) 53957dacad5SJay Sternberg { 54057dacad5SJay Sternberg } 54157dacad5SJay Sternberg static void nvme_dif_complete(u32 p, u32 v, struct t10_pi_tuple *pi) 54257dacad5SJay Sternberg { 54357dacad5SJay Sternberg } 54457dacad5SJay Sternberg #endif 54557dacad5SJay Sternberg 546b131c61dSChristoph Hellwig static bool nvme_setup_prps(struct nvme_dev *dev, struct request *req) 54757dacad5SJay Sternberg { 548f4800d6dSChristoph Hellwig struct nvme_iod *iod = blk_mq_rq_to_pdu(req); 54957dacad5SJay Sternberg struct dma_pool *pool; 550b131c61dSChristoph Hellwig int length = blk_rq_payload_bytes(req); 55157dacad5SJay Sternberg struct scatterlist *sg = iod->sg; 55257dacad5SJay Sternberg int dma_len = sg_dma_len(sg); 55357dacad5SJay Sternberg u64 dma_addr = sg_dma_address(sg); 5545fd4ce1bSChristoph Hellwig u32 page_size = dev->ctrl.page_size; 55557dacad5SJay Sternberg int offset = dma_addr & (page_size - 1); 55657dacad5SJay Sternberg __le64 *prp_list; 557f4800d6dSChristoph Hellwig __le64 **list = iod_list(req); 55857dacad5SJay Sternberg dma_addr_t prp_dma; 55957dacad5SJay Sternberg int nprps, i; 56057dacad5SJay Sternberg 56157dacad5SJay Sternberg length -= (page_size - offset); 56257dacad5SJay Sternberg if (length <= 0) 56369d2b571SChristoph Hellwig return true; 56457dacad5SJay Sternberg 56557dacad5SJay Sternberg dma_len -= (page_size - offset); 56657dacad5SJay Sternberg if (dma_len) { 56757dacad5SJay Sternberg dma_addr += (page_size - offset); 56857dacad5SJay Sternberg } else { 56957dacad5SJay Sternberg sg = sg_next(sg); 57057dacad5SJay Sternberg dma_addr = sg_dma_address(sg); 57157dacad5SJay Sternberg dma_len = sg_dma_len(sg); 57257dacad5SJay Sternberg } 57357dacad5SJay Sternberg 57457dacad5SJay Sternberg if (length <= page_size) { 57557dacad5SJay Sternberg iod->first_dma = dma_addr; 57669d2b571SChristoph Hellwig return true; 57757dacad5SJay Sternberg } 57857dacad5SJay Sternberg 57957dacad5SJay Sternberg nprps = DIV_ROUND_UP(length, page_size); 58057dacad5SJay Sternberg if (nprps <= (256 / 8)) { 58157dacad5SJay Sternberg pool = dev->prp_small_pool; 58257dacad5SJay Sternberg iod->npages = 0; 58357dacad5SJay Sternberg } else { 58457dacad5SJay Sternberg pool = dev->prp_page_pool; 58557dacad5SJay Sternberg iod->npages = 1; 58657dacad5SJay Sternberg } 58757dacad5SJay Sternberg 58869d2b571SChristoph Hellwig prp_list = dma_pool_alloc(pool, GFP_ATOMIC, &prp_dma); 58957dacad5SJay Sternberg if (!prp_list) { 59057dacad5SJay Sternberg iod->first_dma = dma_addr; 59157dacad5SJay Sternberg iod->npages = -1; 59269d2b571SChristoph Hellwig return false; 59357dacad5SJay Sternberg } 59457dacad5SJay Sternberg list[0] = prp_list; 59557dacad5SJay Sternberg iod->first_dma = prp_dma; 59657dacad5SJay Sternberg i = 0; 59757dacad5SJay Sternberg for (;;) { 59857dacad5SJay Sternberg if (i == page_size >> 3) { 59957dacad5SJay Sternberg __le64 *old_prp_list = prp_list; 60069d2b571SChristoph Hellwig prp_list = dma_pool_alloc(pool, GFP_ATOMIC, &prp_dma); 60157dacad5SJay Sternberg if (!prp_list) 60269d2b571SChristoph Hellwig return false; 60357dacad5SJay Sternberg list[iod->npages++] = prp_list; 60457dacad5SJay Sternberg prp_list[0] = old_prp_list[i - 1]; 60557dacad5SJay Sternberg old_prp_list[i - 1] = cpu_to_le64(prp_dma); 60657dacad5SJay Sternberg i = 1; 60757dacad5SJay Sternberg } 60857dacad5SJay Sternberg prp_list[i++] = cpu_to_le64(dma_addr); 60957dacad5SJay Sternberg dma_len -= page_size; 61057dacad5SJay Sternberg dma_addr += page_size; 61157dacad5SJay Sternberg length -= page_size; 61257dacad5SJay Sternberg if (length <= 0) 61357dacad5SJay Sternberg break; 61457dacad5SJay Sternberg if (dma_len > 0) 61557dacad5SJay Sternberg continue; 61657dacad5SJay Sternberg BUG_ON(dma_len < 0); 61757dacad5SJay Sternberg sg = sg_next(sg); 61857dacad5SJay Sternberg dma_addr = sg_dma_address(sg); 61957dacad5SJay Sternberg dma_len = sg_dma_len(sg); 62057dacad5SJay Sternberg } 62157dacad5SJay Sternberg 62269d2b571SChristoph Hellwig return true; 62357dacad5SJay Sternberg } 62457dacad5SJay Sternberg 625f4800d6dSChristoph Hellwig static int nvme_map_data(struct nvme_dev *dev, struct request *req, 626b131c61dSChristoph Hellwig struct nvme_command *cmnd) 62757dacad5SJay Sternberg { 628f4800d6dSChristoph Hellwig struct nvme_iod *iod = blk_mq_rq_to_pdu(req); 629ba1ca37eSChristoph Hellwig struct request_queue *q = req->q; 630ba1ca37eSChristoph Hellwig enum dma_data_direction dma_dir = rq_data_dir(req) ? 631ba1ca37eSChristoph Hellwig DMA_TO_DEVICE : DMA_FROM_DEVICE; 632ba1ca37eSChristoph Hellwig int ret = BLK_MQ_RQ_QUEUE_ERROR; 63357dacad5SJay Sternberg 634f9d03f96SChristoph Hellwig sg_init_table(iod->sg, blk_rq_nr_phys_segments(req)); 635ba1ca37eSChristoph Hellwig iod->nents = blk_rq_map_sg(q, req, iod->sg); 636ba1ca37eSChristoph Hellwig if (!iod->nents) 637ba1ca37eSChristoph Hellwig goto out; 638ba1ca37eSChristoph Hellwig 639ba1ca37eSChristoph Hellwig ret = BLK_MQ_RQ_QUEUE_BUSY; 6402b6b535dSMauricio Faria de Oliveira if (!dma_map_sg_attrs(dev->dev, iod->sg, iod->nents, dma_dir, 6412b6b535dSMauricio Faria de Oliveira DMA_ATTR_NO_WARN)) 642ba1ca37eSChristoph Hellwig goto out; 643ba1ca37eSChristoph Hellwig 644b131c61dSChristoph Hellwig if (!nvme_setup_prps(dev, req)) 645ba1ca37eSChristoph Hellwig goto out_unmap; 646ba1ca37eSChristoph Hellwig 647ba1ca37eSChristoph Hellwig ret = BLK_MQ_RQ_QUEUE_ERROR; 648ba1ca37eSChristoph Hellwig if (blk_integrity_rq(req)) { 649ba1ca37eSChristoph Hellwig if (blk_rq_count_integrity_sg(q, req->bio) != 1) 650ba1ca37eSChristoph Hellwig goto out_unmap; 651ba1ca37eSChristoph Hellwig 652bf684057SChristoph Hellwig sg_init_table(&iod->meta_sg, 1); 653bf684057SChristoph Hellwig if (blk_rq_map_integrity_sg(q, req->bio, &iod->meta_sg) != 1) 654ba1ca37eSChristoph Hellwig goto out_unmap; 655ba1ca37eSChristoph Hellwig 656ba1ca37eSChristoph Hellwig if (rq_data_dir(req)) 657ba1ca37eSChristoph Hellwig nvme_dif_remap(req, nvme_dif_prep); 658ba1ca37eSChristoph Hellwig 659bf684057SChristoph Hellwig if (!dma_map_sg(dev->dev, &iod->meta_sg, 1, dma_dir)) 660ba1ca37eSChristoph Hellwig goto out_unmap; 66157dacad5SJay Sternberg } 66257dacad5SJay Sternberg 663eb793e2cSChristoph Hellwig cmnd->rw.dptr.prp1 = cpu_to_le64(sg_dma_address(iod->sg)); 664eb793e2cSChristoph Hellwig cmnd->rw.dptr.prp2 = cpu_to_le64(iod->first_dma); 665ba1ca37eSChristoph Hellwig if (blk_integrity_rq(req)) 666bf684057SChristoph Hellwig cmnd->rw.metadata = cpu_to_le64(sg_dma_address(&iod->meta_sg)); 667ba1ca37eSChristoph Hellwig return BLK_MQ_RQ_QUEUE_OK; 668ba1ca37eSChristoph Hellwig 669ba1ca37eSChristoph Hellwig out_unmap: 670ba1ca37eSChristoph Hellwig dma_unmap_sg(dev->dev, iod->sg, iod->nents, dma_dir); 671ba1ca37eSChristoph Hellwig out: 672ba1ca37eSChristoph Hellwig return ret; 67357dacad5SJay Sternberg } 67457dacad5SJay Sternberg 675f4800d6dSChristoph Hellwig static void nvme_unmap_data(struct nvme_dev *dev, struct request *req) 676d4f6c3abSChristoph Hellwig { 677f4800d6dSChristoph Hellwig struct nvme_iod *iod = blk_mq_rq_to_pdu(req); 678d4f6c3abSChristoph Hellwig enum dma_data_direction dma_dir = rq_data_dir(req) ? 679d4f6c3abSChristoph Hellwig DMA_TO_DEVICE : DMA_FROM_DEVICE; 680d4f6c3abSChristoph Hellwig 681d4f6c3abSChristoph Hellwig if (iod->nents) { 682d4f6c3abSChristoph Hellwig dma_unmap_sg(dev->dev, iod->sg, iod->nents, dma_dir); 683d4f6c3abSChristoph Hellwig if (blk_integrity_rq(req)) { 684d4f6c3abSChristoph Hellwig if (!rq_data_dir(req)) 685d4f6c3abSChristoph Hellwig nvme_dif_remap(req, nvme_dif_complete); 686bf684057SChristoph Hellwig dma_unmap_sg(dev->dev, &iod->meta_sg, 1, dma_dir); 687d4f6c3abSChristoph Hellwig } 688d4f6c3abSChristoph Hellwig } 689d4f6c3abSChristoph Hellwig 690f9d03f96SChristoph Hellwig nvme_cleanup_cmd(req); 691f4800d6dSChristoph Hellwig nvme_free_iod(dev, req); 69257dacad5SJay Sternberg } 69357dacad5SJay Sternberg 69457dacad5SJay Sternberg /* 69557dacad5SJay Sternberg * NOTE: ns is NULL when called on the admin queue. 69657dacad5SJay Sternberg */ 69757dacad5SJay Sternberg static int nvme_queue_rq(struct blk_mq_hw_ctx *hctx, 69857dacad5SJay Sternberg const struct blk_mq_queue_data *bd) 69957dacad5SJay Sternberg { 70057dacad5SJay Sternberg struct nvme_ns *ns = hctx->queue->queuedata; 70157dacad5SJay Sternberg struct nvme_queue *nvmeq = hctx->driver_data; 70257dacad5SJay Sternberg struct nvme_dev *dev = nvmeq->dev; 70357dacad5SJay Sternberg struct request *req = bd->rq; 704ba1ca37eSChristoph Hellwig struct nvme_command cmnd; 705ba1ca37eSChristoph Hellwig int ret = BLK_MQ_RQ_QUEUE_OK; 70657dacad5SJay Sternberg 70757dacad5SJay Sternberg /* 70857dacad5SJay Sternberg * If formated with metadata, require the block layer provide a buffer 70957dacad5SJay Sternberg * unless this namespace is formated such that the metadata can be 71057dacad5SJay Sternberg * stripped/generated by the controller with PRACT=1. 71157dacad5SJay Sternberg */ 71257dacad5SJay Sternberg if (ns && ns->ms && !blk_integrity_rq(req)) { 71357dacad5SJay Sternberg if (!(ns->pi_type && ns->ms == 8) && 71457292b58SChristoph Hellwig !blk_rq_is_passthrough(req)) { 715eee417b0SChristoph Hellwig blk_mq_end_request(req, -EFAULT); 71657dacad5SJay Sternberg return BLK_MQ_RQ_QUEUE_OK; 71757dacad5SJay Sternberg } 71857dacad5SJay Sternberg } 71957dacad5SJay Sternberg 720f9d03f96SChristoph Hellwig ret = nvme_setup_cmd(ns, req, &cmnd); 721bac0000aSOmar Sandoval if (ret != BLK_MQ_RQ_QUEUE_OK) 722f4800d6dSChristoph Hellwig return ret; 72357dacad5SJay Sternberg 724b131c61dSChristoph Hellwig ret = nvme_init_iod(req, dev); 725bac0000aSOmar Sandoval if (ret != BLK_MQ_RQ_QUEUE_OK) 726f9d03f96SChristoph Hellwig goto out_free_cmd; 72757dacad5SJay Sternberg 728f9d03f96SChristoph Hellwig if (blk_rq_nr_phys_segments(req)) 729b131c61dSChristoph Hellwig ret = nvme_map_data(dev, req, &cmnd); 730ba1ca37eSChristoph Hellwig 731bac0000aSOmar Sandoval if (ret != BLK_MQ_RQ_QUEUE_OK) 732f9d03f96SChristoph Hellwig goto out_cleanup_iod; 733ba1ca37eSChristoph Hellwig 734aae239e1SChristoph Hellwig blk_mq_start_request(req); 735ba1ca37eSChristoph Hellwig 736ba1ca37eSChristoph Hellwig spin_lock_irq(&nvmeq->q_lock); 737ae1fba20SKeith Busch if (unlikely(nvmeq->cq_vector < 0)) { 73869d9a99cSKeith Busch ret = BLK_MQ_RQ_QUEUE_ERROR; 739ae1fba20SKeith Busch spin_unlock_irq(&nvmeq->q_lock); 740f9d03f96SChristoph Hellwig goto out_cleanup_iod; 741ae1fba20SKeith Busch } 742ba1ca37eSChristoph Hellwig __nvme_submit_cmd(nvmeq, &cmnd); 74357dacad5SJay Sternberg nvme_process_cq(nvmeq); 74457dacad5SJay Sternberg spin_unlock_irq(&nvmeq->q_lock); 74557dacad5SJay Sternberg return BLK_MQ_RQ_QUEUE_OK; 746f9d03f96SChristoph Hellwig out_cleanup_iod: 747f4800d6dSChristoph Hellwig nvme_free_iod(dev, req); 748f9d03f96SChristoph Hellwig out_free_cmd: 749f9d03f96SChristoph Hellwig nvme_cleanup_cmd(req); 750ba1ca37eSChristoph Hellwig return ret; 75157dacad5SJay Sternberg } 75257dacad5SJay Sternberg 75377f02a7aSChristoph Hellwig static void nvme_pci_complete_rq(struct request *req) 754eee417b0SChristoph Hellwig { 755f4800d6dSChristoph Hellwig struct nvme_iod *iod = blk_mq_rq_to_pdu(req); 756eee417b0SChristoph Hellwig 75777f02a7aSChristoph Hellwig nvme_unmap_data(iod->nvmeq->dev, req); 75877f02a7aSChristoph Hellwig nvme_complete_rq(req); 75957dacad5SJay Sternberg } 76057dacad5SJay Sternberg 761d783e0bdSMarta Rybczynska /* We read the CQE phase first to check if the rest of the entry is valid */ 762d783e0bdSMarta Rybczynska static inline bool nvme_cqe_valid(struct nvme_queue *nvmeq, u16 head, 763d783e0bdSMarta Rybczynska u16 phase) 764d783e0bdSMarta Rybczynska { 765d783e0bdSMarta Rybczynska return (le16_to_cpu(nvmeq->cqes[head].status) & 1) == phase; 766d783e0bdSMarta Rybczynska } 767d783e0bdSMarta Rybczynska 768a0fa9647SJens Axboe static void __nvme_process_cq(struct nvme_queue *nvmeq, unsigned int *tag) 76957dacad5SJay Sternberg { 77057dacad5SJay Sternberg u16 head, phase; 77157dacad5SJay Sternberg 77257dacad5SJay Sternberg head = nvmeq->cq_head; 77357dacad5SJay Sternberg phase = nvmeq->cq_phase; 77457dacad5SJay Sternberg 775d783e0bdSMarta Rybczynska while (nvme_cqe_valid(nvmeq, head, phase)) { 77657dacad5SJay Sternberg struct nvme_completion cqe = nvmeq->cqes[head]; 777eee417b0SChristoph Hellwig struct request *req; 778adf68f21SChristoph Hellwig 77957dacad5SJay Sternberg if (++head == nvmeq->q_depth) { 78057dacad5SJay Sternberg head = 0; 78157dacad5SJay Sternberg phase = !phase; 78257dacad5SJay Sternberg } 783adf68f21SChristoph Hellwig 784a0fa9647SJens Axboe if (tag && *tag == cqe.command_id) 785a0fa9647SJens Axboe *tag = -1; 786adf68f21SChristoph Hellwig 787aae239e1SChristoph Hellwig if (unlikely(cqe.command_id >= nvmeq->q_depth)) { 7881b3c47c1SSagi Grimberg dev_warn(nvmeq->dev->ctrl.device, 789aae239e1SChristoph Hellwig "invalid id %d completed on queue %d\n", 790aae239e1SChristoph Hellwig cqe.command_id, le16_to_cpu(cqe.sq_id)); 791aae239e1SChristoph Hellwig continue; 792aae239e1SChristoph Hellwig } 793aae239e1SChristoph Hellwig 794adf68f21SChristoph Hellwig /* 795adf68f21SChristoph Hellwig * AEN requests are special as they don't time out and can 796adf68f21SChristoph Hellwig * survive any kind of queue freeze and often don't respond to 797adf68f21SChristoph Hellwig * aborts. We don't even bother to allocate a struct request 798adf68f21SChristoph Hellwig * for them but rather special case them here. 799adf68f21SChristoph Hellwig */ 800adf68f21SChristoph Hellwig if (unlikely(nvmeq->qid == 0 && 801adf68f21SChristoph Hellwig cqe.command_id >= NVME_AQ_BLKMQ_DEPTH)) { 8027bf58533SChristoph Hellwig nvme_complete_async_event(&nvmeq->dev->ctrl, 8037bf58533SChristoph Hellwig cqe.status, &cqe.result); 804adf68f21SChristoph Hellwig continue; 805adf68f21SChristoph Hellwig } 806adf68f21SChristoph Hellwig 807eee417b0SChristoph Hellwig req = blk_mq_tag_to_rq(*nvmeq->tags, cqe.command_id); 80827fa9bc5SChristoph Hellwig nvme_end_request(req, cqe.status, cqe.result); 80957dacad5SJay Sternberg } 81057dacad5SJay Sternberg 81157dacad5SJay Sternberg if (head == nvmeq->cq_head && phase == nvmeq->cq_phase) 812a0fa9647SJens Axboe return; 81357dacad5SJay Sternberg 814604e8c8dSKeith Busch if (likely(nvmeq->cq_vector >= 0)) 815f9f38e33SHelen Koike if (nvme_dbbuf_update_and_check_event(head, nvmeq->dbbuf_cq_db, 816f9f38e33SHelen Koike nvmeq->dbbuf_cq_ei)) 81757dacad5SJay Sternberg writel(head, nvmeq->q_db + nvmeq->dev->db_stride); 81857dacad5SJay Sternberg nvmeq->cq_head = head; 81957dacad5SJay Sternberg nvmeq->cq_phase = phase; 82057dacad5SJay Sternberg 82157dacad5SJay Sternberg nvmeq->cqe_seen = 1; 822a0fa9647SJens Axboe } 823a0fa9647SJens Axboe 824a0fa9647SJens Axboe static void nvme_process_cq(struct nvme_queue *nvmeq) 825a0fa9647SJens Axboe { 826a0fa9647SJens Axboe __nvme_process_cq(nvmeq, NULL); 82757dacad5SJay Sternberg } 82857dacad5SJay Sternberg 82957dacad5SJay Sternberg static irqreturn_t nvme_irq(int irq, void *data) 83057dacad5SJay Sternberg { 83157dacad5SJay Sternberg irqreturn_t result; 83257dacad5SJay Sternberg struct nvme_queue *nvmeq = data; 83357dacad5SJay Sternberg spin_lock(&nvmeq->q_lock); 83457dacad5SJay Sternberg nvme_process_cq(nvmeq); 83557dacad5SJay Sternberg result = nvmeq->cqe_seen ? IRQ_HANDLED : IRQ_NONE; 83657dacad5SJay Sternberg nvmeq->cqe_seen = 0; 83757dacad5SJay Sternberg spin_unlock(&nvmeq->q_lock); 83857dacad5SJay Sternberg return result; 83957dacad5SJay Sternberg } 84057dacad5SJay Sternberg 84157dacad5SJay Sternberg static irqreturn_t nvme_irq_check(int irq, void *data) 84257dacad5SJay Sternberg { 84357dacad5SJay Sternberg struct nvme_queue *nvmeq = data; 844d783e0bdSMarta Rybczynska if (nvme_cqe_valid(nvmeq, nvmeq->cq_head, nvmeq->cq_phase)) 84557dacad5SJay Sternberg return IRQ_WAKE_THREAD; 846d783e0bdSMarta Rybczynska return IRQ_NONE; 84757dacad5SJay Sternberg } 84857dacad5SJay Sternberg 8497776db1cSKeith Busch static int __nvme_poll(struct nvme_queue *nvmeq, unsigned int tag) 850a0fa9647SJens Axboe { 851d783e0bdSMarta Rybczynska if (nvme_cqe_valid(nvmeq, nvmeq->cq_head, nvmeq->cq_phase)) { 852a0fa9647SJens Axboe spin_lock_irq(&nvmeq->q_lock); 853a0fa9647SJens Axboe __nvme_process_cq(nvmeq, &tag); 854a0fa9647SJens Axboe spin_unlock_irq(&nvmeq->q_lock); 855a0fa9647SJens Axboe 856a0fa9647SJens Axboe if (tag == -1) 857a0fa9647SJens Axboe return 1; 858a0fa9647SJens Axboe } 859a0fa9647SJens Axboe 860a0fa9647SJens Axboe return 0; 861a0fa9647SJens Axboe } 862a0fa9647SJens Axboe 8637776db1cSKeith Busch static int nvme_poll(struct blk_mq_hw_ctx *hctx, unsigned int tag) 8647776db1cSKeith Busch { 8657776db1cSKeith Busch struct nvme_queue *nvmeq = hctx->driver_data; 8667776db1cSKeith Busch 8677776db1cSKeith Busch return __nvme_poll(nvmeq, tag); 8687776db1cSKeith Busch } 8697776db1cSKeith Busch 870f866fc42SChristoph Hellwig static void nvme_pci_submit_async_event(struct nvme_ctrl *ctrl, int aer_idx) 87157dacad5SJay Sternberg { 872f866fc42SChristoph Hellwig struct nvme_dev *dev = to_nvme_dev(ctrl); 8739396dec9SChristoph Hellwig struct nvme_queue *nvmeq = dev->queues[0]; 87457dacad5SJay Sternberg struct nvme_command c; 87557dacad5SJay Sternberg 87657dacad5SJay Sternberg memset(&c, 0, sizeof(c)); 87757dacad5SJay Sternberg c.common.opcode = nvme_admin_async_event; 878f866fc42SChristoph Hellwig c.common.command_id = NVME_AQ_BLKMQ_DEPTH + aer_idx; 87957dacad5SJay Sternberg 8809396dec9SChristoph Hellwig spin_lock_irq(&nvmeq->q_lock); 8819396dec9SChristoph Hellwig __nvme_submit_cmd(nvmeq, &c); 8829396dec9SChristoph Hellwig spin_unlock_irq(&nvmeq->q_lock); 88357dacad5SJay Sternberg } 88457dacad5SJay Sternberg 88557dacad5SJay Sternberg static int adapter_delete_queue(struct nvme_dev *dev, u8 opcode, u16 id) 88657dacad5SJay Sternberg { 88757dacad5SJay Sternberg struct nvme_command c; 88857dacad5SJay Sternberg 88957dacad5SJay Sternberg memset(&c, 0, sizeof(c)); 89057dacad5SJay Sternberg c.delete_queue.opcode = opcode; 89157dacad5SJay Sternberg c.delete_queue.qid = cpu_to_le16(id); 89257dacad5SJay Sternberg 8931c63dc66SChristoph Hellwig return nvme_submit_sync_cmd(dev->ctrl.admin_q, &c, NULL, 0); 89457dacad5SJay Sternberg } 89557dacad5SJay Sternberg 89657dacad5SJay Sternberg static int adapter_alloc_cq(struct nvme_dev *dev, u16 qid, 89757dacad5SJay Sternberg struct nvme_queue *nvmeq) 89857dacad5SJay Sternberg { 89957dacad5SJay Sternberg struct nvme_command c; 90057dacad5SJay Sternberg int flags = NVME_QUEUE_PHYS_CONTIG | NVME_CQ_IRQ_ENABLED; 90157dacad5SJay Sternberg 90257dacad5SJay Sternberg /* 90357dacad5SJay Sternberg * Note: we (ab)use the fact the the prp fields survive if no data 90457dacad5SJay Sternberg * is attached to the request. 90557dacad5SJay Sternberg */ 90657dacad5SJay Sternberg memset(&c, 0, sizeof(c)); 90757dacad5SJay Sternberg c.create_cq.opcode = nvme_admin_create_cq; 90857dacad5SJay Sternberg c.create_cq.prp1 = cpu_to_le64(nvmeq->cq_dma_addr); 90957dacad5SJay Sternberg c.create_cq.cqid = cpu_to_le16(qid); 91057dacad5SJay Sternberg c.create_cq.qsize = cpu_to_le16(nvmeq->q_depth - 1); 91157dacad5SJay Sternberg c.create_cq.cq_flags = cpu_to_le16(flags); 91257dacad5SJay Sternberg c.create_cq.irq_vector = cpu_to_le16(nvmeq->cq_vector); 91357dacad5SJay Sternberg 9141c63dc66SChristoph Hellwig return nvme_submit_sync_cmd(dev->ctrl.admin_q, &c, NULL, 0); 91557dacad5SJay Sternberg } 91657dacad5SJay Sternberg 91757dacad5SJay Sternberg static int adapter_alloc_sq(struct nvme_dev *dev, u16 qid, 91857dacad5SJay Sternberg struct nvme_queue *nvmeq) 91957dacad5SJay Sternberg { 92057dacad5SJay Sternberg struct nvme_command c; 92181c1cd98SKeith Busch int flags = NVME_QUEUE_PHYS_CONTIG; 92257dacad5SJay Sternberg 92357dacad5SJay Sternberg /* 92457dacad5SJay Sternberg * Note: we (ab)use the fact the the prp fields survive if no data 92557dacad5SJay Sternberg * is attached to the request. 92657dacad5SJay Sternberg */ 92757dacad5SJay Sternberg memset(&c, 0, sizeof(c)); 92857dacad5SJay Sternberg c.create_sq.opcode = nvme_admin_create_sq; 92957dacad5SJay Sternberg c.create_sq.prp1 = cpu_to_le64(nvmeq->sq_dma_addr); 93057dacad5SJay Sternberg c.create_sq.sqid = cpu_to_le16(qid); 93157dacad5SJay Sternberg c.create_sq.qsize = cpu_to_le16(nvmeq->q_depth - 1); 93257dacad5SJay Sternberg c.create_sq.sq_flags = cpu_to_le16(flags); 93357dacad5SJay Sternberg c.create_sq.cqid = cpu_to_le16(qid); 93457dacad5SJay Sternberg 9351c63dc66SChristoph Hellwig return nvme_submit_sync_cmd(dev->ctrl.admin_q, &c, NULL, 0); 93657dacad5SJay Sternberg } 93757dacad5SJay Sternberg 93857dacad5SJay Sternberg static int adapter_delete_cq(struct nvme_dev *dev, u16 cqid) 93957dacad5SJay Sternberg { 94057dacad5SJay Sternberg return adapter_delete_queue(dev, nvme_admin_delete_cq, cqid); 94157dacad5SJay Sternberg } 94257dacad5SJay Sternberg 94357dacad5SJay Sternberg static int adapter_delete_sq(struct nvme_dev *dev, u16 sqid) 94457dacad5SJay Sternberg { 94557dacad5SJay Sternberg return adapter_delete_queue(dev, nvme_admin_delete_sq, sqid); 94657dacad5SJay Sternberg } 94757dacad5SJay Sternberg 948e7a2a87dSChristoph Hellwig static void abort_endio(struct request *req, int error) 94957dacad5SJay Sternberg { 950f4800d6dSChristoph Hellwig struct nvme_iod *iod = blk_mq_rq_to_pdu(req); 951f4800d6dSChristoph Hellwig struct nvme_queue *nvmeq = iod->nvmeq; 95257dacad5SJay Sternberg 95327fa9bc5SChristoph Hellwig dev_warn(nvmeq->dev->ctrl.device, 95427fa9bc5SChristoph Hellwig "Abort status: 0x%x", nvme_req(req)->status); 955e7a2a87dSChristoph Hellwig atomic_inc(&nvmeq->dev->ctrl.abort_limit); 956e7a2a87dSChristoph Hellwig blk_mq_free_request(req); 95757dacad5SJay Sternberg } 95857dacad5SJay Sternberg 95931c7c7d2SChristoph Hellwig static enum blk_eh_timer_return nvme_timeout(struct request *req, bool reserved) 96057dacad5SJay Sternberg { 961f4800d6dSChristoph Hellwig struct nvme_iod *iod = blk_mq_rq_to_pdu(req); 962f4800d6dSChristoph Hellwig struct nvme_queue *nvmeq = iod->nvmeq; 96357dacad5SJay Sternberg struct nvme_dev *dev = nvmeq->dev; 96457dacad5SJay Sternberg struct request *abort_req; 96557dacad5SJay Sternberg struct nvme_command cmd; 96657dacad5SJay Sternberg 96731c7c7d2SChristoph Hellwig /* 9687776db1cSKeith Busch * Did we miss an interrupt? 9697776db1cSKeith Busch */ 9707776db1cSKeith Busch if (__nvme_poll(nvmeq, req->tag)) { 9717776db1cSKeith Busch dev_warn(dev->ctrl.device, 9727776db1cSKeith Busch "I/O %d QID %d timeout, completion polled\n", 9737776db1cSKeith Busch req->tag, nvmeq->qid); 9747776db1cSKeith Busch return BLK_EH_HANDLED; 9757776db1cSKeith Busch } 9767776db1cSKeith Busch 9777776db1cSKeith Busch /* 978fd634f41SChristoph Hellwig * Shutdown immediately if controller times out while starting. The 979fd634f41SChristoph Hellwig * reset work will see the pci device disabled when it gets the forced 980fd634f41SChristoph Hellwig * cancellation error. All outstanding requests are completed on 981fd634f41SChristoph Hellwig * shutdown, so we return BLK_EH_HANDLED. 982fd634f41SChristoph Hellwig */ 983bb8d261eSChristoph Hellwig if (dev->ctrl.state == NVME_CTRL_RESETTING) { 9841b3c47c1SSagi Grimberg dev_warn(dev->ctrl.device, 985fd634f41SChristoph Hellwig "I/O %d QID %d timeout, disable controller\n", 986fd634f41SChristoph Hellwig req->tag, nvmeq->qid); 987a5cdb68cSKeith Busch nvme_dev_disable(dev, false); 98827fa9bc5SChristoph Hellwig nvme_req(req)->flags |= NVME_REQ_CANCELLED; 989fd634f41SChristoph Hellwig return BLK_EH_HANDLED; 990fd634f41SChristoph Hellwig } 991fd634f41SChristoph Hellwig 992fd634f41SChristoph Hellwig /* 993e1569a16SKeith Busch * Shutdown the controller immediately and schedule a reset if the 994e1569a16SKeith Busch * command was already aborted once before and still hasn't been 995e1569a16SKeith Busch * returned to the driver, or if this is the admin queue. 99631c7c7d2SChristoph Hellwig */ 997f4800d6dSChristoph Hellwig if (!nvmeq->qid || iod->aborted) { 9981b3c47c1SSagi Grimberg dev_warn(dev->ctrl.device, 99957dacad5SJay Sternberg "I/O %d QID %d timeout, reset controller\n", 100057dacad5SJay Sternberg req->tag, nvmeq->qid); 1001a5cdb68cSKeith Busch nvme_dev_disable(dev, false); 1002c5f6ce97SKeith Busch nvme_reset(dev); 1003e1569a16SKeith Busch 1004e1569a16SKeith Busch /* 1005e1569a16SKeith Busch * Mark the request as handled, since the inline shutdown 1006e1569a16SKeith Busch * forces all outstanding requests to complete. 1007e1569a16SKeith Busch */ 100827fa9bc5SChristoph Hellwig nvme_req(req)->flags |= NVME_REQ_CANCELLED; 1009e1569a16SKeith Busch return BLK_EH_HANDLED; 101057dacad5SJay Sternberg } 101157dacad5SJay Sternberg 1012e7a2a87dSChristoph Hellwig if (atomic_dec_return(&dev->ctrl.abort_limit) < 0) { 1013e7a2a87dSChristoph Hellwig atomic_inc(&dev->ctrl.abort_limit); 1014e7a2a87dSChristoph Hellwig return BLK_EH_RESET_TIMER; 1015e7a2a87dSChristoph Hellwig } 10167bf7d778SKeith Busch iod->aborted = 1; 101757dacad5SJay Sternberg 101857dacad5SJay Sternberg memset(&cmd, 0, sizeof(cmd)); 101957dacad5SJay Sternberg cmd.abort.opcode = nvme_admin_abort_cmd; 102057dacad5SJay Sternberg cmd.abort.cid = req->tag; 102157dacad5SJay Sternberg cmd.abort.sqid = cpu_to_le16(nvmeq->qid); 102257dacad5SJay Sternberg 10231b3c47c1SSagi Grimberg dev_warn(nvmeq->dev->ctrl.device, 10241b3c47c1SSagi Grimberg "I/O %d QID %d timeout, aborting\n", 102557dacad5SJay Sternberg req->tag, nvmeq->qid); 1026e7a2a87dSChristoph Hellwig 1027e7a2a87dSChristoph Hellwig abort_req = nvme_alloc_request(dev->ctrl.admin_q, &cmd, 1028eb71f435SChristoph Hellwig BLK_MQ_REQ_NOWAIT, NVME_QID_ANY); 10296bf25d16SChristoph Hellwig if (IS_ERR(abort_req)) { 10306bf25d16SChristoph Hellwig atomic_inc(&dev->ctrl.abort_limit); 103131c7c7d2SChristoph Hellwig return BLK_EH_RESET_TIMER; 103257dacad5SJay Sternberg } 103357dacad5SJay Sternberg 1034e7a2a87dSChristoph Hellwig abort_req->timeout = ADMIN_TIMEOUT; 1035e7a2a87dSChristoph Hellwig abort_req->end_io_data = NULL; 1036e7a2a87dSChristoph Hellwig blk_execute_rq_nowait(abort_req->q, NULL, abort_req, 0, abort_endio); 103757dacad5SJay Sternberg 103857dacad5SJay Sternberg /* 103957dacad5SJay Sternberg * The aborted req will be completed on receiving the abort req. 104057dacad5SJay Sternberg * We enable the timer again. If hit twice, it'll cause a device reset, 104157dacad5SJay Sternberg * as the device then is in a faulty state. 104257dacad5SJay Sternberg */ 104357dacad5SJay Sternberg return BLK_EH_RESET_TIMER; 104457dacad5SJay Sternberg } 104557dacad5SJay Sternberg 104657dacad5SJay Sternberg static void nvme_free_queue(struct nvme_queue *nvmeq) 104757dacad5SJay Sternberg { 104857dacad5SJay Sternberg dma_free_coherent(nvmeq->q_dmadev, CQ_SIZE(nvmeq->q_depth), 104957dacad5SJay Sternberg (void *)nvmeq->cqes, nvmeq->cq_dma_addr); 105057dacad5SJay Sternberg if (nvmeq->sq_cmds) 105157dacad5SJay Sternberg dma_free_coherent(nvmeq->q_dmadev, SQ_SIZE(nvmeq->q_depth), 105257dacad5SJay Sternberg nvmeq->sq_cmds, nvmeq->sq_dma_addr); 105357dacad5SJay Sternberg kfree(nvmeq); 105457dacad5SJay Sternberg } 105557dacad5SJay Sternberg 105657dacad5SJay Sternberg static void nvme_free_queues(struct nvme_dev *dev, int lowest) 105757dacad5SJay Sternberg { 105857dacad5SJay Sternberg int i; 105957dacad5SJay Sternberg 106057dacad5SJay Sternberg for (i = dev->queue_count - 1; i >= lowest; i--) { 106157dacad5SJay Sternberg struct nvme_queue *nvmeq = dev->queues[i]; 106257dacad5SJay Sternberg dev->queue_count--; 106357dacad5SJay Sternberg dev->queues[i] = NULL; 106457dacad5SJay Sternberg nvme_free_queue(nvmeq); 106557dacad5SJay Sternberg } 106657dacad5SJay Sternberg } 106757dacad5SJay Sternberg 106857dacad5SJay Sternberg /** 106957dacad5SJay Sternberg * nvme_suspend_queue - put queue into suspended state 107057dacad5SJay Sternberg * @nvmeq - queue to suspend 107157dacad5SJay Sternberg */ 107257dacad5SJay Sternberg static int nvme_suspend_queue(struct nvme_queue *nvmeq) 107357dacad5SJay Sternberg { 107457dacad5SJay Sternberg int vector; 107557dacad5SJay Sternberg 107657dacad5SJay Sternberg spin_lock_irq(&nvmeq->q_lock); 107757dacad5SJay Sternberg if (nvmeq->cq_vector == -1) { 107857dacad5SJay Sternberg spin_unlock_irq(&nvmeq->q_lock); 107957dacad5SJay Sternberg return 1; 108057dacad5SJay Sternberg } 1081dca51e78SChristoph Hellwig vector = nvmeq_irq(nvmeq); 108257dacad5SJay Sternberg nvmeq->dev->online_queues--; 108357dacad5SJay Sternberg nvmeq->cq_vector = -1; 108457dacad5SJay Sternberg spin_unlock_irq(&nvmeq->q_lock); 108557dacad5SJay Sternberg 10861c63dc66SChristoph Hellwig if (!nvmeq->qid && nvmeq->dev->ctrl.admin_q) 108725646264SKeith Busch blk_mq_stop_hw_queues(nvmeq->dev->ctrl.admin_q); 108857dacad5SJay Sternberg 108957dacad5SJay Sternberg free_irq(vector, nvmeq); 109057dacad5SJay Sternberg 109157dacad5SJay Sternberg return 0; 109257dacad5SJay Sternberg } 109357dacad5SJay Sternberg 1094a5cdb68cSKeith Busch static void nvme_disable_admin_queue(struct nvme_dev *dev, bool shutdown) 109557dacad5SJay Sternberg { 1096a5cdb68cSKeith Busch struct nvme_queue *nvmeq = dev->queues[0]; 109757dacad5SJay Sternberg 109857dacad5SJay Sternberg if (!nvmeq) 109957dacad5SJay Sternberg return; 110057dacad5SJay Sternberg if (nvme_suspend_queue(nvmeq)) 110157dacad5SJay Sternberg return; 110257dacad5SJay Sternberg 1103a5cdb68cSKeith Busch if (shutdown) 1104a5cdb68cSKeith Busch nvme_shutdown_ctrl(&dev->ctrl); 1105a5cdb68cSKeith Busch else 1106a5cdb68cSKeith Busch nvme_disable_ctrl(&dev->ctrl, lo_hi_readq( 1107a5cdb68cSKeith Busch dev->bar + NVME_REG_CAP)); 110857dacad5SJay Sternberg 110957dacad5SJay Sternberg spin_lock_irq(&nvmeq->q_lock); 111057dacad5SJay Sternberg nvme_process_cq(nvmeq); 111157dacad5SJay Sternberg spin_unlock_irq(&nvmeq->q_lock); 111257dacad5SJay Sternberg } 111357dacad5SJay Sternberg 111457dacad5SJay Sternberg static int nvme_cmb_qdepth(struct nvme_dev *dev, int nr_io_queues, 111557dacad5SJay Sternberg int entry_size) 111657dacad5SJay Sternberg { 111757dacad5SJay Sternberg int q_depth = dev->q_depth; 11185fd4ce1bSChristoph Hellwig unsigned q_size_aligned = roundup(q_depth * entry_size, 11195fd4ce1bSChristoph Hellwig dev->ctrl.page_size); 112057dacad5SJay Sternberg 112157dacad5SJay Sternberg if (q_size_aligned * nr_io_queues > dev->cmb_size) { 112257dacad5SJay Sternberg u64 mem_per_q = div_u64(dev->cmb_size, nr_io_queues); 11235fd4ce1bSChristoph Hellwig mem_per_q = round_down(mem_per_q, dev->ctrl.page_size); 112457dacad5SJay Sternberg q_depth = div_u64(mem_per_q, entry_size); 112557dacad5SJay Sternberg 112657dacad5SJay Sternberg /* 112757dacad5SJay Sternberg * Ensure the reduced q_depth is above some threshold where it 112857dacad5SJay Sternberg * would be better to map queues in system memory with the 112957dacad5SJay Sternberg * original depth 113057dacad5SJay Sternberg */ 113157dacad5SJay Sternberg if (q_depth < 64) 113257dacad5SJay Sternberg return -ENOMEM; 113357dacad5SJay Sternberg } 113457dacad5SJay Sternberg 113557dacad5SJay Sternberg return q_depth; 113657dacad5SJay Sternberg } 113757dacad5SJay Sternberg 113857dacad5SJay Sternberg static int nvme_alloc_sq_cmds(struct nvme_dev *dev, struct nvme_queue *nvmeq, 113957dacad5SJay Sternberg int qid, int depth) 114057dacad5SJay Sternberg { 114157dacad5SJay Sternberg if (qid && dev->cmb && use_cmb_sqes && NVME_CMB_SQS(dev->cmbsz)) { 11425fd4ce1bSChristoph Hellwig unsigned offset = (qid - 1) * roundup(SQ_SIZE(depth), 11435fd4ce1bSChristoph Hellwig dev->ctrl.page_size); 114457dacad5SJay Sternberg nvmeq->sq_dma_addr = dev->cmb_dma_addr + offset; 114557dacad5SJay Sternberg nvmeq->sq_cmds_io = dev->cmb + offset; 114657dacad5SJay Sternberg } else { 114757dacad5SJay Sternberg nvmeq->sq_cmds = dma_alloc_coherent(dev->dev, SQ_SIZE(depth), 114857dacad5SJay Sternberg &nvmeq->sq_dma_addr, GFP_KERNEL); 114957dacad5SJay Sternberg if (!nvmeq->sq_cmds) 115057dacad5SJay Sternberg return -ENOMEM; 115157dacad5SJay Sternberg } 115257dacad5SJay Sternberg 115357dacad5SJay Sternberg return 0; 115457dacad5SJay Sternberg } 115557dacad5SJay Sternberg 115657dacad5SJay Sternberg static struct nvme_queue *nvme_alloc_queue(struct nvme_dev *dev, int qid, 1157d3af3ecdSShaohua Li int depth, int node) 115857dacad5SJay Sternberg { 1159d3af3ecdSShaohua Li struct nvme_queue *nvmeq = kzalloc_node(sizeof(*nvmeq), GFP_KERNEL, 1160d3af3ecdSShaohua Li node); 116157dacad5SJay Sternberg if (!nvmeq) 116257dacad5SJay Sternberg return NULL; 116357dacad5SJay Sternberg 116457dacad5SJay Sternberg nvmeq->cqes = dma_zalloc_coherent(dev->dev, CQ_SIZE(depth), 116557dacad5SJay Sternberg &nvmeq->cq_dma_addr, GFP_KERNEL); 116657dacad5SJay Sternberg if (!nvmeq->cqes) 116757dacad5SJay Sternberg goto free_nvmeq; 116857dacad5SJay Sternberg 116957dacad5SJay Sternberg if (nvme_alloc_sq_cmds(dev, nvmeq, qid, depth)) 117057dacad5SJay Sternberg goto free_cqdma; 117157dacad5SJay Sternberg 117257dacad5SJay Sternberg nvmeq->q_dmadev = dev->dev; 117357dacad5SJay Sternberg nvmeq->dev = dev; 117457dacad5SJay Sternberg snprintf(nvmeq->irqname, sizeof(nvmeq->irqname), "nvme%dq%d", 11751c63dc66SChristoph Hellwig dev->ctrl.instance, qid); 117657dacad5SJay Sternberg spin_lock_init(&nvmeq->q_lock); 117757dacad5SJay Sternberg nvmeq->cq_head = 0; 117857dacad5SJay Sternberg nvmeq->cq_phase = 1; 117957dacad5SJay Sternberg nvmeq->q_db = &dev->dbs[qid * 2 * dev->db_stride]; 118057dacad5SJay Sternberg nvmeq->q_depth = depth; 118157dacad5SJay Sternberg nvmeq->qid = qid; 118257dacad5SJay Sternberg nvmeq->cq_vector = -1; 118357dacad5SJay Sternberg dev->queues[qid] = nvmeq; 118457dacad5SJay Sternberg dev->queue_count++; 118557dacad5SJay Sternberg 118657dacad5SJay Sternberg return nvmeq; 118757dacad5SJay Sternberg 118857dacad5SJay Sternberg free_cqdma: 118957dacad5SJay Sternberg dma_free_coherent(dev->dev, CQ_SIZE(depth), (void *)nvmeq->cqes, 119057dacad5SJay Sternberg nvmeq->cq_dma_addr); 119157dacad5SJay Sternberg free_nvmeq: 119257dacad5SJay Sternberg kfree(nvmeq); 119357dacad5SJay Sternberg return NULL; 119457dacad5SJay Sternberg } 119557dacad5SJay Sternberg 1196dca51e78SChristoph Hellwig static int queue_request_irq(struct nvme_queue *nvmeq) 119757dacad5SJay Sternberg { 119857dacad5SJay Sternberg if (use_threaded_interrupts) 1199dca51e78SChristoph Hellwig return request_threaded_irq(nvmeq_irq(nvmeq), nvme_irq_check, 1200dca51e78SChristoph Hellwig nvme_irq, IRQF_SHARED, nvmeq->irqname, nvmeq); 1201dca51e78SChristoph Hellwig else 1202dca51e78SChristoph Hellwig return request_irq(nvmeq_irq(nvmeq), nvme_irq, IRQF_SHARED, 1203dca51e78SChristoph Hellwig nvmeq->irqname, nvmeq); 120457dacad5SJay Sternberg } 120557dacad5SJay Sternberg 120657dacad5SJay Sternberg static void nvme_init_queue(struct nvme_queue *nvmeq, u16 qid) 120757dacad5SJay Sternberg { 120857dacad5SJay Sternberg struct nvme_dev *dev = nvmeq->dev; 120957dacad5SJay Sternberg 121057dacad5SJay Sternberg spin_lock_irq(&nvmeq->q_lock); 121157dacad5SJay Sternberg nvmeq->sq_tail = 0; 121257dacad5SJay Sternberg nvmeq->cq_head = 0; 121357dacad5SJay Sternberg nvmeq->cq_phase = 1; 121457dacad5SJay Sternberg nvmeq->q_db = &dev->dbs[qid * 2 * dev->db_stride]; 121557dacad5SJay Sternberg memset((void *)nvmeq->cqes, 0, CQ_SIZE(nvmeq->q_depth)); 1216f9f38e33SHelen Koike nvme_dbbuf_init(dev, nvmeq, qid); 121757dacad5SJay Sternberg dev->online_queues++; 121857dacad5SJay Sternberg spin_unlock_irq(&nvmeq->q_lock); 121957dacad5SJay Sternberg } 122057dacad5SJay Sternberg 122157dacad5SJay Sternberg static int nvme_create_queue(struct nvme_queue *nvmeq, int qid) 122257dacad5SJay Sternberg { 122357dacad5SJay Sternberg struct nvme_dev *dev = nvmeq->dev; 122457dacad5SJay Sternberg int result; 122557dacad5SJay Sternberg 122657dacad5SJay Sternberg nvmeq->cq_vector = qid - 1; 122757dacad5SJay Sternberg result = adapter_alloc_cq(dev, qid, nvmeq); 122857dacad5SJay Sternberg if (result < 0) 122957dacad5SJay Sternberg return result; 123057dacad5SJay Sternberg 123157dacad5SJay Sternberg result = adapter_alloc_sq(dev, qid, nvmeq); 123257dacad5SJay Sternberg if (result < 0) 123357dacad5SJay Sternberg goto release_cq; 123457dacad5SJay Sternberg 1235dca51e78SChristoph Hellwig result = queue_request_irq(nvmeq); 123657dacad5SJay Sternberg if (result < 0) 123757dacad5SJay Sternberg goto release_sq; 123857dacad5SJay Sternberg 123957dacad5SJay Sternberg nvme_init_queue(nvmeq, qid); 124057dacad5SJay Sternberg return result; 124157dacad5SJay Sternberg 124257dacad5SJay Sternberg release_sq: 124357dacad5SJay Sternberg adapter_delete_sq(dev, qid); 124457dacad5SJay Sternberg release_cq: 124557dacad5SJay Sternberg adapter_delete_cq(dev, qid); 124657dacad5SJay Sternberg return result; 124757dacad5SJay Sternberg } 124857dacad5SJay Sternberg 1249f363b089SEric Biggers static const struct blk_mq_ops nvme_mq_admin_ops = { 125057dacad5SJay Sternberg .queue_rq = nvme_queue_rq, 125177f02a7aSChristoph Hellwig .complete = nvme_pci_complete_rq, 125257dacad5SJay Sternberg .init_hctx = nvme_admin_init_hctx, 125357dacad5SJay Sternberg .exit_hctx = nvme_admin_exit_hctx, 125457dacad5SJay Sternberg .init_request = nvme_admin_init_request, 125557dacad5SJay Sternberg .timeout = nvme_timeout, 125657dacad5SJay Sternberg }; 125757dacad5SJay Sternberg 1258f363b089SEric Biggers static const struct blk_mq_ops nvme_mq_ops = { 125957dacad5SJay Sternberg .queue_rq = nvme_queue_rq, 126077f02a7aSChristoph Hellwig .complete = nvme_pci_complete_rq, 126157dacad5SJay Sternberg .init_hctx = nvme_init_hctx, 126257dacad5SJay Sternberg .init_request = nvme_init_request, 1263dca51e78SChristoph Hellwig .map_queues = nvme_pci_map_queues, 126457dacad5SJay Sternberg .timeout = nvme_timeout, 1265a0fa9647SJens Axboe .poll = nvme_poll, 126657dacad5SJay Sternberg }; 126757dacad5SJay Sternberg 126857dacad5SJay Sternberg static void nvme_dev_remove_admin(struct nvme_dev *dev) 126957dacad5SJay Sternberg { 12701c63dc66SChristoph Hellwig if (dev->ctrl.admin_q && !blk_queue_dying(dev->ctrl.admin_q)) { 127169d9a99cSKeith Busch /* 127269d9a99cSKeith Busch * If the controller was reset during removal, it's possible 127369d9a99cSKeith Busch * user requests may be waiting on a stopped queue. Start the 127469d9a99cSKeith Busch * queue to flush these to completion. 127569d9a99cSKeith Busch */ 127669d9a99cSKeith Busch blk_mq_start_stopped_hw_queues(dev->ctrl.admin_q, true); 12771c63dc66SChristoph Hellwig blk_cleanup_queue(dev->ctrl.admin_q); 127857dacad5SJay Sternberg blk_mq_free_tag_set(&dev->admin_tagset); 127957dacad5SJay Sternberg } 128057dacad5SJay Sternberg } 128157dacad5SJay Sternberg 128257dacad5SJay Sternberg static int nvme_alloc_admin_tags(struct nvme_dev *dev) 128357dacad5SJay Sternberg { 12841c63dc66SChristoph Hellwig if (!dev->ctrl.admin_q) { 128557dacad5SJay Sternberg dev->admin_tagset.ops = &nvme_mq_admin_ops; 128657dacad5SJay Sternberg dev->admin_tagset.nr_hw_queues = 1; 1287e3e9d50cSKeith Busch 1288e3e9d50cSKeith Busch /* 1289e3e9d50cSKeith Busch * Subtract one to leave an empty queue entry for 'Full Queue' 1290e3e9d50cSKeith Busch * condition. See NVM-Express 1.2 specification, section 4.1.2. 1291e3e9d50cSKeith Busch */ 1292e3e9d50cSKeith Busch dev->admin_tagset.queue_depth = NVME_AQ_BLKMQ_DEPTH - 1; 129357dacad5SJay Sternberg dev->admin_tagset.timeout = ADMIN_TIMEOUT; 129457dacad5SJay Sternberg dev->admin_tagset.numa_node = dev_to_node(dev->dev); 129557dacad5SJay Sternberg dev->admin_tagset.cmd_size = nvme_cmd_size(dev); 1296d3484991SJens Axboe dev->admin_tagset.flags = BLK_MQ_F_NO_SCHED; 129757dacad5SJay Sternberg dev->admin_tagset.driver_data = dev; 129857dacad5SJay Sternberg 129957dacad5SJay Sternberg if (blk_mq_alloc_tag_set(&dev->admin_tagset)) 130057dacad5SJay Sternberg return -ENOMEM; 130157dacad5SJay Sternberg 13021c63dc66SChristoph Hellwig dev->ctrl.admin_q = blk_mq_init_queue(&dev->admin_tagset); 13031c63dc66SChristoph Hellwig if (IS_ERR(dev->ctrl.admin_q)) { 130457dacad5SJay Sternberg blk_mq_free_tag_set(&dev->admin_tagset); 130557dacad5SJay Sternberg return -ENOMEM; 130657dacad5SJay Sternberg } 13071c63dc66SChristoph Hellwig if (!blk_get_queue(dev->ctrl.admin_q)) { 130857dacad5SJay Sternberg nvme_dev_remove_admin(dev); 13091c63dc66SChristoph Hellwig dev->ctrl.admin_q = NULL; 131057dacad5SJay Sternberg return -ENODEV; 131157dacad5SJay Sternberg } 131257dacad5SJay Sternberg } else 131325646264SKeith Busch blk_mq_start_stopped_hw_queues(dev->ctrl.admin_q, true); 131457dacad5SJay Sternberg 131557dacad5SJay Sternberg return 0; 131657dacad5SJay Sternberg } 131757dacad5SJay Sternberg 131857dacad5SJay Sternberg static int nvme_configure_admin_queue(struct nvme_dev *dev) 131957dacad5SJay Sternberg { 132057dacad5SJay Sternberg int result; 132157dacad5SJay Sternberg u32 aqa; 13227a67cbeaSChristoph Hellwig u64 cap = lo_hi_readq(dev->bar + NVME_REG_CAP); 132357dacad5SJay Sternberg struct nvme_queue *nvmeq; 132457dacad5SJay Sternberg 13258ef2074dSGabriel Krisman Bertazi dev->subsystem = readl(dev->bar + NVME_REG_VS) >= NVME_VS(1, 1, 0) ? 132657dacad5SJay Sternberg NVME_CAP_NSSRC(cap) : 0; 132757dacad5SJay Sternberg 13287a67cbeaSChristoph Hellwig if (dev->subsystem && 13297a67cbeaSChristoph Hellwig (readl(dev->bar + NVME_REG_CSTS) & NVME_CSTS_NSSRO)) 13307a67cbeaSChristoph Hellwig writel(NVME_CSTS_NSSRO, dev->bar + NVME_REG_CSTS); 133157dacad5SJay Sternberg 13325fd4ce1bSChristoph Hellwig result = nvme_disable_ctrl(&dev->ctrl, cap); 133357dacad5SJay Sternberg if (result < 0) 133457dacad5SJay Sternberg return result; 133557dacad5SJay Sternberg 133657dacad5SJay Sternberg nvmeq = dev->queues[0]; 133757dacad5SJay Sternberg if (!nvmeq) { 1338d3af3ecdSShaohua Li nvmeq = nvme_alloc_queue(dev, 0, NVME_AQ_DEPTH, 1339d3af3ecdSShaohua Li dev_to_node(dev->dev)); 134057dacad5SJay Sternberg if (!nvmeq) 134157dacad5SJay Sternberg return -ENOMEM; 134257dacad5SJay Sternberg } 134357dacad5SJay Sternberg 134457dacad5SJay Sternberg aqa = nvmeq->q_depth - 1; 134557dacad5SJay Sternberg aqa |= aqa << 16; 134657dacad5SJay Sternberg 13477a67cbeaSChristoph Hellwig writel(aqa, dev->bar + NVME_REG_AQA); 13487a67cbeaSChristoph Hellwig lo_hi_writeq(nvmeq->sq_dma_addr, dev->bar + NVME_REG_ASQ); 13497a67cbeaSChristoph Hellwig lo_hi_writeq(nvmeq->cq_dma_addr, dev->bar + NVME_REG_ACQ); 135057dacad5SJay Sternberg 13515fd4ce1bSChristoph Hellwig result = nvme_enable_ctrl(&dev->ctrl, cap); 135257dacad5SJay Sternberg if (result) 1353d4875622SKeith Busch return result; 135457dacad5SJay Sternberg 135557dacad5SJay Sternberg nvmeq->cq_vector = 0; 1356dca51e78SChristoph Hellwig result = queue_request_irq(nvmeq); 135757dacad5SJay Sternberg if (result) { 135857dacad5SJay Sternberg nvmeq->cq_vector = -1; 1359d4875622SKeith Busch return result; 136057dacad5SJay Sternberg } 136157dacad5SJay Sternberg 136257dacad5SJay Sternberg return result; 136357dacad5SJay Sternberg } 136457dacad5SJay Sternberg 1365c875a709SGuilherme G. Piccoli static bool nvme_should_reset(struct nvme_dev *dev, u32 csts) 1366c875a709SGuilherme G. Piccoli { 1367c875a709SGuilherme G. Piccoli 1368c875a709SGuilherme G. Piccoli /* If true, indicates loss of adapter communication, possibly by a 1369c875a709SGuilherme G. Piccoli * NVMe Subsystem reset. 1370c875a709SGuilherme G. Piccoli */ 1371c875a709SGuilherme G. Piccoli bool nssro = dev->subsystem && (csts & NVME_CSTS_NSSRO); 1372c875a709SGuilherme G. Piccoli 1373c875a709SGuilherme G. Piccoli /* If there is a reset ongoing, we shouldn't reset again. */ 1374c875a709SGuilherme G. Piccoli if (work_busy(&dev->reset_work)) 1375c875a709SGuilherme G. Piccoli return false; 1376c875a709SGuilherme G. Piccoli 1377c875a709SGuilherme G. Piccoli /* We shouldn't reset unless the controller is on fatal error state 1378c875a709SGuilherme G. Piccoli * _or_ if we lost the communication with it. 1379c875a709SGuilherme G. Piccoli */ 1380c875a709SGuilherme G. Piccoli if (!(csts & NVME_CSTS_CFS) && !nssro) 1381c875a709SGuilherme G. Piccoli return false; 1382c875a709SGuilherme G. Piccoli 1383c875a709SGuilherme G. Piccoli /* If PCI error recovery process is happening, we cannot reset or 1384c875a709SGuilherme G. Piccoli * the recovery mechanism will surely fail. 1385c875a709SGuilherme G. Piccoli */ 1386c875a709SGuilherme G. Piccoli if (pci_channel_offline(to_pci_dev(dev->dev))) 1387c875a709SGuilherme G. Piccoli return false; 1388c875a709SGuilherme G. Piccoli 1389c875a709SGuilherme G. Piccoli return true; 1390c875a709SGuilherme G. Piccoli } 1391c875a709SGuilherme G. Piccoli 1392d2a61918SAndy Lutomirski static void nvme_warn_reset(struct nvme_dev *dev, u32 csts) 1393d2a61918SAndy Lutomirski { 1394d2a61918SAndy Lutomirski /* Read a config register to help see what died. */ 1395d2a61918SAndy Lutomirski u16 pci_status; 1396d2a61918SAndy Lutomirski int result; 1397d2a61918SAndy Lutomirski 1398d2a61918SAndy Lutomirski result = pci_read_config_word(to_pci_dev(dev->dev), PCI_STATUS, 1399d2a61918SAndy Lutomirski &pci_status); 1400d2a61918SAndy Lutomirski if (result == PCIBIOS_SUCCESSFUL) 1401d2a61918SAndy Lutomirski dev_warn(dev->dev, 1402d2a61918SAndy Lutomirski "controller is down; will reset: CSTS=0x%x, PCI_STATUS=0x%hx\n", 1403d2a61918SAndy Lutomirski csts, pci_status); 1404d2a61918SAndy Lutomirski else 1405d2a61918SAndy Lutomirski dev_warn(dev->dev, 1406d2a61918SAndy Lutomirski "controller is down; will reset: CSTS=0x%x, PCI_STATUS read failed (%d)\n", 1407d2a61918SAndy Lutomirski csts, result); 1408d2a61918SAndy Lutomirski } 1409d2a61918SAndy Lutomirski 14102d55cd5fSChristoph Hellwig static void nvme_watchdog_timer(unsigned long data) 141157dacad5SJay Sternberg { 14122d55cd5fSChristoph Hellwig struct nvme_dev *dev = (struct nvme_dev *)data; 14137a67cbeaSChristoph Hellwig u32 csts = readl(dev->bar + NVME_REG_CSTS); 141457dacad5SJay Sternberg 1415c875a709SGuilherme G. Piccoli /* Skip controllers under certain specific conditions. */ 1416c875a709SGuilherme G. Piccoli if (nvme_should_reset(dev, csts)) { 1417c5f6ce97SKeith Busch if (!nvme_reset(dev)) 1418d2a61918SAndy Lutomirski nvme_warn_reset(dev, csts); 14192d55cd5fSChristoph Hellwig return; 142057dacad5SJay Sternberg } 142157dacad5SJay Sternberg 14222d55cd5fSChristoph Hellwig mod_timer(&dev->watchdog_timer, round_jiffies(jiffies + HZ)); 142357dacad5SJay Sternberg } 142457dacad5SJay Sternberg 1425749941f2SChristoph Hellwig static int nvme_create_io_queues(struct nvme_dev *dev) 142657dacad5SJay Sternberg { 1427949928c1SKeith Busch unsigned i, max; 1428749941f2SChristoph Hellwig int ret = 0; 142957dacad5SJay Sternberg 1430749941f2SChristoph Hellwig for (i = dev->queue_count; i <= dev->max_qid; i++) { 1431d3af3ecdSShaohua Li /* vector == qid - 1, match nvme_create_queue */ 1432d3af3ecdSShaohua Li if (!nvme_alloc_queue(dev, i, dev->q_depth, 1433d3af3ecdSShaohua Li pci_irq_get_node(to_pci_dev(dev->dev), i - 1))) { 1434749941f2SChristoph Hellwig ret = -ENOMEM; 143557dacad5SJay Sternberg break; 1436749941f2SChristoph Hellwig } 1437749941f2SChristoph Hellwig } 143857dacad5SJay Sternberg 1439949928c1SKeith Busch max = min(dev->max_qid, dev->queue_count - 1); 1440949928c1SKeith Busch for (i = dev->online_queues; i <= max; i++) { 1441749941f2SChristoph Hellwig ret = nvme_create_queue(dev->queues[i], i); 1442d4875622SKeith Busch if (ret) 144357dacad5SJay Sternberg break; 144457dacad5SJay Sternberg } 144557dacad5SJay Sternberg 1446749941f2SChristoph Hellwig /* 1447749941f2SChristoph Hellwig * Ignore failing Create SQ/CQ commands, we can continue with less 1448749941f2SChristoph Hellwig * than the desired aount of queues, and even a controller without 1449749941f2SChristoph Hellwig * I/O queues an still be used to issue admin commands. This might 1450749941f2SChristoph Hellwig * be useful to upgrade a buggy firmware for example. 1451749941f2SChristoph Hellwig */ 1452749941f2SChristoph Hellwig return ret >= 0 ? 0 : ret; 145357dacad5SJay Sternberg } 145457dacad5SJay Sternberg 1455202021c1SStephen Bates static ssize_t nvme_cmb_show(struct device *dev, 1456202021c1SStephen Bates struct device_attribute *attr, 1457202021c1SStephen Bates char *buf) 1458202021c1SStephen Bates { 1459202021c1SStephen Bates struct nvme_dev *ndev = to_nvme_dev(dev_get_drvdata(dev)); 1460202021c1SStephen Bates 1461c965809cSStephen Bates return scnprintf(buf, PAGE_SIZE, "cmbloc : x%08x\ncmbsz : x%08x\n", 1462202021c1SStephen Bates ndev->cmbloc, ndev->cmbsz); 1463202021c1SStephen Bates } 1464202021c1SStephen Bates static DEVICE_ATTR(cmb, S_IRUGO, nvme_cmb_show, NULL); 1465202021c1SStephen Bates 146657dacad5SJay Sternberg static void __iomem *nvme_map_cmb(struct nvme_dev *dev) 146757dacad5SJay Sternberg { 146857dacad5SJay Sternberg u64 szu, size, offset; 146957dacad5SJay Sternberg resource_size_t bar_size; 147057dacad5SJay Sternberg struct pci_dev *pdev = to_pci_dev(dev->dev); 147157dacad5SJay Sternberg void __iomem *cmb; 147257dacad5SJay Sternberg dma_addr_t dma_addr; 147357dacad5SJay Sternberg 14747a67cbeaSChristoph Hellwig dev->cmbsz = readl(dev->bar + NVME_REG_CMBSZ); 147557dacad5SJay Sternberg if (!(NVME_CMB_SZ(dev->cmbsz))) 147657dacad5SJay Sternberg return NULL; 1477202021c1SStephen Bates dev->cmbloc = readl(dev->bar + NVME_REG_CMBLOC); 147857dacad5SJay Sternberg 1479202021c1SStephen Bates if (!use_cmb_sqes) 1480202021c1SStephen Bates return NULL; 148157dacad5SJay Sternberg 148257dacad5SJay Sternberg szu = (u64)1 << (12 + 4 * NVME_CMB_SZU(dev->cmbsz)); 148357dacad5SJay Sternberg size = szu * NVME_CMB_SZ(dev->cmbsz); 1484202021c1SStephen Bates offset = szu * NVME_CMB_OFST(dev->cmbloc); 1485202021c1SStephen Bates bar_size = pci_resource_len(pdev, NVME_CMB_BIR(dev->cmbloc)); 148657dacad5SJay Sternberg 148757dacad5SJay Sternberg if (offset > bar_size) 148857dacad5SJay Sternberg return NULL; 148957dacad5SJay Sternberg 149057dacad5SJay Sternberg /* 149157dacad5SJay Sternberg * Controllers may support a CMB size larger than their BAR, 149257dacad5SJay Sternberg * for example, due to being behind a bridge. Reduce the CMB to 149357dacad5SJay Sternberg * the reported size of the BAR 149457dacad5SJay Sternberg */ 149557dacad5SJay Sternberg if (size > bar_size - offset) 149657dacad5SJay Sternberg size = bar_size - offset; 149757dacad5SJay Sternberg 1498202021c1SStephen Bates dma_addr = pci_resource_start(pdev, NVME_CMB_BIR(dev->cmbloc)) + offset; 149957dacad5SJay Sternberg cmb = ioremap_wc(dma_addr, size); 150057dacad5SJay Sternberg if (!cmb) 150157dacad5SJay Sternberg return NULL; 150257dacad5SJay Sternberg 150357dacad5SJay Sternberg dev->cmb_dma_addr = dma_addr; 150457dacad5SJay Sternberg dev->cmb_size = size; 150557dacad5SJay Sternberg return cmb; 150657dacad5SJay Sternberg } 150757dacad5SJay Sternberg 150857dacad5SJay Sternberg static inline void nvme_release_cmb(struct nvme_dev *dev) 150957dacad5SJay Sternberg { 151057dacad5SJay Sternberg if (dev->cmb) { 151157dacad5SJay Sternberg iounmap(dev->cmb); 151257dacad5SJay Sternberg dev->cmb = NULL; 151357dacad5SJay Sternberg } 151457dacad5SJay Sternberg } 151557dacad5SJay Sternberg 151657dacad5SJay Sternberg static size_t db_bar_size(struct nvme_dev *dev, unsigned nr_io_queues) 151757dacad5SJay Sternberg { 151857dacad5SJay Sternberg return 4096 + ((nr_io_queues + 1) * 8 * dev->db_stride); 151957dacad5SJay Sternberg } 152057dacad5SJay Sternberg 152157dacad5SJay Sternberg static int nvme_setup_io_queues(struct nvme_dev *dev) 152257dacad5SJay Sternberg { 152357dacad5SJay Sternberg struct nvme_queue *adminq = dev->queues[0]; 152457dacad5SJay Sternberg struct pci_dev *pdev = to_pci_dev(dev->dev); 1525dca51e78SChristoph Hellwig int result, nr_io_queues, size; 152657dacad5SJay Sternberg 15272800b8e7SKeith Busch nr_io_queues = num_online_cpus(); 15289a0be7abSChristoph Hellwig result = nvme_set_queue_count(&dev->ctrl, &nr_io_queues); 15299a0be7abSChristoph Hellwig if (result < 0) 153057dacad5SJay Sternberg return result; 15319a0be7abSChristoph Hellwig 1532f5fa90dcSChristoph Hellwig if (nr_io_queues == 0) 1533a5229050SKeith Busch return 0; 153457dacad5SJay Sternberg 153557dacad5SJay Sternberg if (dev->cmb && NVME_CMB_SQS(dev->cmbsz)) { 153657dacad5SJay Sternberg result = nvme_cmb_qdepth(dev, nr_io_queues, 153757dacad5SJay Sternberg sizeof(struct nvme_command)); 153857dacad5SJay Sternberg if (result > 0) 153957dacad5SJay Sternberg dev->q_depth = result; 154057dacad5SJay Sternberg else 154157dacad5SJay Sternberg nvme_release_cmb(dev); 154257dacad5SJay Sternberg } 154357dacad5SJay Sternberg 154457dacad5SJay Sternberg size = db_bar_size(dev, nr_io_queues); 154557dacad5SJay Sternberg if (size > 8192) { 154657dacad5SJay Sternberg iounmap(dev->bar); 154757dacad5SJay Sternberg do { 154857dacad5SJay Sternberg dev->bar = ioremap(pci_resource_start(pdev, 0), size); 154957dacad5SJay Sternberg if (dev->bar) 155057dacad5SJay Sternberg break; 155157dacad5SJay Sternberg if (!--nr_io_queues) 155257dacad5SJay Sternberg return -ENOMEM; 155357dacad5SJay Sternberg size = db_bar_size(dev, nr_io_queues); 155457dacad5SJay Sternberg } while (1); 15557a67cbeaSChristoph Hellwig dev->dbs = dev->bar + 4096; 155657dacad5SJay Sternberg adminq->q_db = dev->dbs; 155757dacad5SJay Sternberg } 155857dacad5SJay Sternberg 155957dacad5SJay Sternberg /* Deregister the admin queue's interrupt */ 1560dca51e78SChristoph Hellwig free_irq(pci_irq_vector(pdev, 0), adminq); 156157dacad5SJay Sternberg 156257dacad5SJay Sternberg /* 156357dacad5SJay Sternberg * If we enable msix early due to not intx, disable it again before 156457dacad5SJay Sternberg * setting up the full range we need. 156557dacad5SJay Sternberg */ 1566dca51e78SChristoph Hellwig pci_free_irq_vectors(pdev); 1567dca51e78SChristoph Hellwig nr_io_queues = pci_alloc_irq_vectors(pdev, 1, nr_io_queues, 1568dca51e78SChristoph Hellwig PCI_IRQ_ALL_TYPES | PCI_IRQ_AFFINITY); 1569dca51e78SChristoph Hellwig if (nr_io_queues <= 0) 1570dca51e78SChristoph Hellwig return -EIO; 1571dca51e78SChristoph Hellwig dev->max_qid = nr_io_queues; 157257dacad5SJay Sternberg 157357dacad5SJay Sternberg /* 157457dacad5SJay Sternberg * Should investigate if there's a performance win from allocating 157557dacad5SJay Sternberg * more queues than interrupt vectors; it might allow the submission 157657dacad5SJay Sternberg * path to scale better, even if the receive path is limited by the 157757dacad5SJay Sternberg * number of interrupts. 157857dacad5SJay Sternberg */ 157957dacad5SJay Sternberg 1580dca51e78SChristoph Hellwig result = queue_request_irq(adminq); 158157dacad5SJay Sternberg if (result) { 158257dacad5SJay Sternberg adminq->cq_vector = -1; 1583d4875622SKeith Busch return result; 158457dacad5SJay Sternberg } 1585749941f2SChristoph Hellwig return nvme_create_io_queues(dev); 158657dacad5SJay Sternberg } 158757dacad5SJay Sternberg 1588db3cbfffSKeith Busch static void nvme_del_queue_end(struct request *req, int error) 1589db3cbfffSKeith Busch { 1590db3cbfffSKeith Busch struct nvme_queue *nvmeq = req->end_io_data; 1591db3cbfffSKeith Busch 1592db3cbfffSKeith Busch blk_mq_free_request(req); 1593db3cbfffSKeith Busch complete(&nvmeq->dev->ioq_wait); 1594db3cbfffSKeith Busch } 1595db3cbfffSKeith Busch 1596db3cbfffSKeith Busch static void nvme_del_cq_end(struct request *req, int error) 1597db3cbfffSKeith Busch { 1598db3cbfffSKeith Busch struct nvme_queue *nvmeq = req->end_io_data; 1599db3cbfffSKeith Busch 1600db3cbfffSKeith Busch if (!error) { 1601db3cbfffSKeith Busch unsigned long flags; 1602db3cbfffSKeith Busch 16032e39e0f6SMing Lin /* 16042e39e0f6SMing Lin * We might be called with the AQ q_lock held 16052e39e0f6SMing Lin * and the I/O queue q_lock should always 16062e39e0f6SMing Lin * nest inside the AQ one. 16072e39e0f6SMing Lin */ 16082e39e0f6SMing Lin spin_lock_irqsave_nested(&nvmeq->q_lock, flags, 16092e39e0f6SMing Lin SINGLE_DEPTH_NESTING); 1610db3cbfffSKeith Busch nvme_process_cq(nvmeq); 1611db3cbfffSKeith Busch spin_unlock_irqrestore(&nvmeq->q_lock, flags); 1612db3cbfffSKeith Busch } 1613db3cbfffSKeith Busch 1614db3cbfffSKeith Busch nvme_del_queue_end(req, error); 1615db3cbfffSKeith Busch } 1616db3cbfffSKeith Busch 1617db3cbfffSKeith Busch static int nvme_delete_queue(struct nvme_queue *nvmeq, u8 opcode) 1618db3cbfffSKeith Busch { 1619db3cbfffSKeith Busch struct request_queue *q = nvmeq->dev->ctrl.admin_q; 1620db3cbfffSKeith Busch struct request *req; 1621db3cbfffSKeith Busch struct nvme_command cmd; 1622db3cbfffSKeith Busch 1623db3cbfffSKeith Busch memset(&cmd, 0, sizeof(cmd)); 1624db3cbfffSKeith Busch cmd.delete_queue.opcode = opcode; 1625db3cbfffSKeith Busch cmd.delete_queue.qid = cpu_to_le16(nvmeq->qid); 1626db3cbfffSKeith Busch 1627eb71f435SChristoph Hellwig req = nvme_alloc_request(q, &cmd, BLK_MQ_REQ_NOWAIT, NVME_QID_ANY); 1628db3cbfffSKeith Busch if (IS_ERR(req)) 1629db3cbfffSKeith Busch return PTR_ERR(req); 1630db3cbfffSKeith Busch 1631db3cbfffSKeith Busch req->timeout = ADMIN_TIMEOUT; 1632db3cbfffSKeith Busch req->end_io_data = nvmeq; 1633db3cbfffSKeith Busch 1634db3cbfffSKeith Busch blk_execute_rq_nowait(q, NULL, req, false, 1635db3cbfffSKeith Busch opcode == nvme_admin_delete_cq ? 1636db3cbfffSKeith Busch nvme_del_cq_end : nvme_del_queue_end); 1637db3cbfffSKeith Busch return 0; 1638db3cbfffSKeith Busch } 1639db3cbfffSKeith Busch 164070659060SKeith Busch static void nvme_disable_io_queues(struct nvme_dev *dev, int queues) 1641db3cbfffSKeith Busch { 164270659060SKeith Busch int pass; 1643db3cbfffSKeith Busch unsigned long timeout; 1644db3cbfffSKeith Busch u8 opcode = nvme_admin_delete_sq; 1645db3cbfffSKeith Busch 1646db3cbfffSKeith Busch for (pass = 0; pass < 2; pass++) { 1647014a0d60SKeith Busch int sent = 0, i = queues; 1648db3cbfffSKeith Busch 1649db3cbfffSKeith Busch reinit_completion(&dev->ioq_wait); 1650db3cbfffSKeith Busch retry: 1651db3cbfffSKeith Busch timeout = ADMIN_TIMEOUT; 1652c21377f8SGabriel Krisman Bertazi for (; i > 0; i--, sent++) 1653c21377f8SGabriel Krisman Bertazi if (nvme_delete_queue(dev->queues[i], opcode)) 1654db3cbfffSKeith Busch break; 1655c21377f8SGabriel Krisman Bertazi 1656db3cbfffSKeith Busch while (sent--) { 1657db3cbfffSKeith Busch timeout = wait_for_completion_io_timeout(&dev->ioq_wait, timeout); 1658db3cbfffSKeith Busch if (timeout == 0) 1659db3cbfffSKeith Busch return; 1660db3cbfffSKeith Busch if (i) 1661db3cbfffSKeith Busch goto retry; 1662db3cbfffSKeith Busch } 1663db3cbfffSKeith Busch opcode = nvme_admin_delete_cq; 1664db3cbfffSKeith Busch } 1665db3cbfffSKeith Busch } 1666db3cbfffSKeith Busch 166757dacad5SJay Sternberg /* 166857dacad5SJay Sternberg * Return: error value if an error occurred setting up the queues or calling 166957dacad5SJay Sternberg * Identify Device. 0 if these succeeded, even if adding some of the 167057dacad5SJay Sternberg * namespaces failed. At the moment, these failures are silent. TBD which 167157dacad5SJay Sternberg * failures should be reported. 167257dacad5SJay Sternberg */ 167357dacad5SJay Sternberg static int nvme_dev_add(struct nvme_dev *dev) 167457dacad5SJay Sternberg { 16755bae7f73SChristoph Hellwig if (!dev->ctrl.tagset) { 167657dacad5SJay Sternberg dev->tagset.ops = &nvme_mq_ops; 167757dacad5SJay Sternberg dev->tagset.nr_hw_queues = dev->online_queues - 1; 167857dacad5SJay Sternberg dev->tagset.timeout = NVME_IO_TIMEOUT; 167957dacad5SJay Sternberg dev->tagset.numa_node = dev_to_node(dev->dev); 168057dacad5SJay Sternberg dev->tagset.queue_depth = 168157dacad5SJay Sternberg min_t(int, dev->q_depth, BLK_MQ_MAX_DEPTH) - 1; 168257dacad5SJay Sternberg dev->tagset.cmd_size = nvme_cmd_size(dev); 168357dacad5SJay Sternberg dev->tagset.flags = BLK_MQ_F_SHOULD_MERGE; 168457dacad5SJay Sternberg dev->tagset.driver_data = dev; 168557dacad5SJay Sternberg 168657dacad5SJay Sternberg if (blk_mq_alloc_tag_set(&dev->tagset)) 168757dacad5SJay Sternberg return 0; 16885bae7f73SChristoph Hellwig dev->ctrl.tagset = &dev->tagset; 1689f9f38e33SHelen Koike 1690f9f38e33SHelen Koike nvme_dbbuf_set(dev); 1691949928c1SKeith Busch } else { 1692949928c1SKeith Busch blk_mq_update_nr_hw_queues(&dev->tagset, dev->online_queues - 1); 1693949928c1SKeith Busch 1694949928c1SKeith Busch /* Free previously allocated queues that are no longer usable */ 1695949928c1SKeith Busch nvme_free_queues(dev, dev->online_queues); 169657dacad5SJay Sternberg } 1697949928c1SKeith Busch 169857dacad5SJay Sternberg return 0; 169957dacad5SJay Sternberg } 170057dacad5SJay Sternberg 1701b00a726aSKeith Busch static int nvme_pci_enable(struct nvme_dev *dev) 170257dacad5SJay Sternberg { 170357dacad5SJay Sternberg u64 cap; 1704b00a726aSKeith Busch int result = -ENOMEM; 170557dacad5SJay Sternberg struct pci_dev *pdev = to_pci_dev(dev->dev); 170657dacad5SJay Sternberg 170757dacad5SJay Sternberg if (pci_enable_device_mem(pdev)) 170857dacad5SJay Sternberg return result; 170957dacad5SJay Sternberg 171057dacad5SJay Sternberg pci_set_master(pdev); 171157dacad5SJay Sternberg 171257dacad5SJay Sternberg if (dma_set_mask_and_coherent(dev->dev, DMA_BIT_MASK(64)) && 171357dacad5SJay Sternberg dma_set_mask_and_coherent(dev->dev, DMA_BIT_MASK(32))) 171457dacad5SJay Sternberg goto disable; 171557dacad5SJay Sternberg 17167a67cbeaSChristoph Hellwig if (readl(dev->bar + NVME_REG_CSTS) == -1) { 171757dacad5SJay Sternberg result = -ENODEV; 1718b00a726aSKeith Busch goto disable; 171957dacad5SJay Sternberg } 172057dacad5SJay Sternberg 172157dacad5SJay Sternberg /* 1722a5229050SKeith Busch * Some devices and/or platforms don't advertise or work with INTx 1723a5229050SKeith Busch * interrupts. Pre-enable a single MSIX or MSI vec for setup. We'll 1724a5229050SKeith Busch * adjust this later. 172557dacad5SJay Sternberg */ 1726dca51e78SChristoph Hellwig result = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_ALL_TYPES); 1727dca51e78SChristoph Hellwig if (result < 0) 1728dca51e78SChristoph Hellwig return result; 172957dacad5SJay Sternberg 17307a67cbeaSChristoph Hellwig cap = lo_hi_readq(dev->bar + NVME_REG_CAP); 17317a67cbeaSChristoph Hellwig 173257dacad5SJay Sternberg dev->q_depth = min_t(int, NVME_CAP_MQES(cap) + 1, NVME_Q_DEPTH); 173357dacad5SJay Sternberg dev->db_stride = 1 << NVME_CAP_STRIDE(cap); 17347a67cbeaSChristoph Hellwig dev->dbs = dev->bar + 4096; 17351f390c1fSStephan Günther 17361f390c1fSStephan Günther /* 17371f390c1fSStephan Günther * Temporary fix for the Apple controller found in the MacBook8,1 and 17381f390c1fSStephan Günther * some MacBook7,1 to avoid controller resets and data loss. 17391f390c1fSStephan Günther */ 17401f390c1fSStephan Günther if (pdev->vendor == PCI_VENDOR_ID_APPLE && pdev->device == 0x2001) { 17411f390c1fSStephan Günther dev->q_depth = 2; 17421f390c1fSStephan Günther dev_warn(dev->dev, "detected Apple NVMe controller, set " 17431f390c1fSStephan Günther "queue depth=%u to work around controller resets\n", 17441f390c1fSStephan Günther dev->q_depth); 17451f390c1fSStephan Günther } 17461f390c1fSStephan Günther 1747202021c1SStephen Bates /* 1748202021c1SStephen Bates * CMBs can currently only exist on >=1.2 PCIe devices. We only 1749202021c1SStephen Bates * populate sysfs if a CMB is implemented. Note that we add the 1750202021c1SStephen Bates * CMB attribute to the nvme_ctrl kobj which removes the need to remove 1751202021c1SStephen Bates * it on exit. Since nvme_dev_attrs_group has no name we can pass 1752202021c1SStephen Bates * NULL as final argument to sysfs_add_file_to_group. 1753202021c1SStephen Bates */ 1754202021c1SStephen Bates 17558ef2074dSGabriel Krisman Bertazi if (readl(dev->bar + NVME_REG_VS) >= NVME_VS(1, 2, 0)) { 175657dacad5SJay Sternberg dev->cmb = nvme_map_cmb(dev); 175757dacad5SJay Sternberg 1758202021c1SStephen Bates if (dev->cmbsz) { 1759202021c1SStephen Bates if (sysfs_add_file_to_group(&dev->ctrl.device->kobj, 1760202021c1SStephen Bates &dev_attr_cmb.attr, NULL)) 1761202021c1SStephen Bates dev_warn(dev->dev, 1762202021c1SStephen Bates "failed to add sysfs attribute for CMB\n"); 1763202021c1SStephen Bates } 1764202021c1SStephen Bates } 1765202021c1SStephen Bates 1766a0a3408eSKeith Busch pci_enable_pcie_error_reporting(pdev); 1767a0a3408eSKeith Busch pci_save_state(pdev); 176857dacad5SJay Sternberg return 0; 176957dacad5SJay Sternberg 177057dacad5SJay Sternberg disable: 177157dacad5SJay Sternberg pci_disable_device(pdev); 177257dacad5SJay Sternberg return result; 177357dacad5SJay Sternberg } 177457dacad5SJay Sternberg 177557dacad5SJay Sternberg static void nvme_dev_unmap(struct nvme_dev *dev) 177657dacad5SJay Sternberg { 1777b00a726aSKeith Busch if (dev->bar) 1778b00a726aSKeith Busch iounmap(dev->bar); 1779a1f447b3SJohannes Thumshirn pci_release_mem_regions(to_pci_dev(dev->dev)); 1780b00a726aSKeith Busch } 1781b00a726aSKeith Busch 1782b00a726aSKeith Busch static void nvme_pci_disable(struct nvme_dev *dev) 1783b00a726aSKeith Busch { 178457dacad5SJay Sternberg struct pci_dev *pdev = to_pci_dev(dev->dev); 178557dacad5SJay Sternberg 1786dca51e78SChristoph Hellwig pci_free_irq_vectors(pdev); 178757dacad5SJay Sternberg 1788a0a3408eSKeith Busch if (pci_is_enabled(pdev)) { 1789a0a3408eSKeith Busch pci_disable_pcie_error_reporting(pdev); 179057dacad5SJay Sternberg pci_disable_device(pdev); 179157dacad5SJay Sternberg } 1792a0a3408eSKeith Busch } 179357dacad5SJay Sternberg 1794a5cdb68cSKeith Busch static void nvme_dev_disable(struct nvme_dev *dev, bool shutdown) 179557dacad5SJay Sternberg { 179670659060SKeith Busch int i, queues; 1797302ad8ccSKeith Busch bool dead = true; 1798302ad8ccSKeith Busch struct pci_dev *pdev = to_pci_dev(dev->dev); 179957dacad5SJay Sternberg 18002d55cd5fSChristoph Hellwig del_timer_sync(&dev->watchdog_timer); 180157dacad5SJay Sternberg 180277bf25eaSKeith Busch mutex_lock(&dev->shutdown_lock); 1803302ad8ccSKeith Busch if (pci_is_enabled(pdev)) { 1804302ad8ccSKeith Busch u32 csts = readl(dev->bar + NVME_REG_CSTS); 1805302ad8ccSKeith Busch 1806302ad8ccSKeith Busch if (dev->ctrl.state == NVME_CTRL_LIVE) 1807302ad8ccSKeith Busch nvme_start_freeze(&dev->ctrl); 1808302ad8ccSKeith Busch dead = !!((csts & NVME_CSTS_CFS) || !(csts & NVME_CSTS_RDY) || 1809302ad8ccSKeith Busch pdev->error_state != pci_channel_io_normal); 181057dacad5SJay Sternberg } 1811c21377f8SGabriel Krisman Bertazi 1812302ad8ccSKeith Busch /* 1813302ad8ccSKeith Busch * Give the controller a chance to complete all entered requests if 1814302ad8ccSKeith Busch * doing a safe shutdown. 1815302ad8ccSKeith Busch */ 1816302ad8ccSKeith Busch if (!dead && shutdown) 1817302ad8ccSKeith Busch nvme_wait_freeze_timeout(&dev->ctrl, NVME_IO_TIMEOUT); 1818302ad8ccSKeith Busch nvme_stop_queues(&dev->ctrl); 1819302ad8ccSKeith Busch 182070659060SKeith Busch queues = dev->online_queues - 1; 1821c21377f8SGabriel Krisman Bertazi for (i = dev->queue_count - 1; i > 0; i--) 1822c21377f8SGabriel Krisman Bertazi nvme_suspend_queue(dev->queues[i]); 1823c21377f8SGabriel Krisman Bertazi 1824302ad8ccSKeith Busch if (dead) { 182582469c59SGabriel Krisman Bertazi /* A device might become IO incapable very soon during 182682469c59SGabriel Krisman Bertazi * probe, before the admin queue is configured. Thus, 182782469c59SGabriel Krisman Bertazi * queue_count can be 0 here. 182882469c59SGabriel Krisman Bertazi */ 182982469c59SGabriel Krisman Bertazi if (dev->queue_count) 1830c21377f8SGabriel Krisman Bertazi nvme_suspend_queue(dev->queues[0]); 183157dacad5SJay Sternberg } else { 183270659060SKeith Busch nvme_disable_io_queues(dev, queues); 1833a5cdb68cSKeith Busch nvme_disable_admin_queue(dev, shutdown); 183457dacad5SJay Sternberg } 1835b00a726aSKeith Busch nvme_pci_disable(dev); 183657dacad5SJay Sternberg 1837e1958e65SMing Lin blk_mq_tagset_busy_iter(&dev->tagset, nvme_cancel_request, &dev->ctrl); 1838e1958e65SMing Lin blk_mq_tagset_busy_iter(&dev->admin_tagset, nvme_cancel_request, &dev->ctrl); 1839302ad8ccSKeith Busch 1840302ad8ccSKeith Busch /* 1841302ad8ccSKeith Busch * The driver will not be starting up queues again if shutting down so 1842302ad8ccSKeith Busch * must flush all entered requests to their failed completion to avoid 1843302ad8ccSKeith Busch * deadlocking blk-mq hot-cpu notifier. 1844302ad8ccSKeith Busch */ 1845302ad8ccSKeith Busch if (shutdown) 1846302ad8ccSKeith Busch nvme_start_queues(&dev->ctrl); 184777bf25eaSKeith Busch mutex_unlock(&dev->shutdown_lock); 184857dacad5SJay Sternberg } 184957dacad5SJay Sternberg 185057dacad5SJay Sternberg static int nvme_setup_prp_pools(struct nvme_dev *dev) 185157dacad5SJay Sternberg { 185257dacad5SJay Sternberg dev->prp_page_pool = dma_pool_create("prp list page", dev->dev, 185357dacad5SJay Sternberg PAGE_SIZE, PAGE_SIZE, 0); 185457dacad5SJay Sternberg if (!dev->prp_page_pool) 185557dacad5SJay Sternberg return -ENOMEM; 185657dacad5SJay Sternberg 185757dacad5SJay Sternberg /* Optimisation for I/Os between 4k and 128k */ 185857dacad5SJay Sternberg dev->prp_small_pool = dma_pool_create("prp list 256", dev->dev, 185957dacad5SJay Sternberg 256, 256, 0); 186057dacad5SJay Sternberg if (!dev->prp_small_pool) { 186157dacad5SJay Sternberg dma_pool_destroy(dev->prp_page_pool); 186257dacad5SJay Sternberg return -ENOMEM; 186357dacad5SJay Sternberg } 186457dacad5SJay Sternberg return 0; 186557dacad5SJay Sternberg } 186657dacad5SJay Sternberg 186757dacad5SJay Sternberg static void nvme_release_prp_pools(struct nvme_dev *dev) 186857dacad5SJay Sternberg { 186957dacad5SJay Sternberg dma_pool_destroy(dev->prp_page_pool); 187057dacad5SJay Sternberg dma_pool_destroy(dev->prp_small_pool); 187157dacad5SJay Sternberg } 187257dacad5SJay Sternberg 18731673f1f0SChristoph Hellwig static void nvme_pci_free_ctrl(struct nvme_ctrl *ctrl) 187457dacad5SJay Sternberg { 18751673f1f0SChristoph Hellwig struct nvme_dev *dev = to_nvme_dev(ctrl); 187657dacad5SJay Sternberg 1877f9f38e33SHelen Koike nvme_dbbuf_dma_free(dev); 187857dacad5SJay Sternberg put_device(dev->dev); 187957dacad5SJay Sternberg if (dev->tagset.tags) 188057dacad5SJay Sternberg blk_mq_free_tag_set(&dev->tagset); 18811c63dc66SChristoph Hellwig if (dev->ctrl.admin_q) 18821c63dc66SChristoph Hellwig blk_put_queue(dev->ctrl.admin_q); 188357dacad5SJay Sternberg kfree(dev->queues); 1884e286bcfcSScott Bauer free_opal_dev(dev->ctrl.opal_dev); 188557dacad5SJay Sternberg kfree(dev); 188657dacad5SJay Sternberg } 188757dacad5SJay Sternberg 1888f58944e2SKeith Busch static void nvme_remove_dead_ctrl(struct nvme_dev *dev, int status) 1889f58944e2SKeith Busch { 1890237045fcSLinus Torvalds dev_warn(dev->ctrl.device, "Removing after probe failure status: %d\n", status); 1891f58944e2SKeith Busch 1892f58944e2SKeith Busch kref_get(&dev->ctrl.kref); 189369d9a99cSKeith Busch nvme_dev_disable(dev, false); 1894f58944e2SKeith Busch if (!schedule_work(&dev->remove_work)) 1895f58944e2SKeith Busch nvme_put_ctrl(&dev->ctrl); 1896f58944e2SKeith Busch } 1897f58944e2SKeith Busch 1898fd634f41SChristoph Hellwig static void nvme_reset_work(struct work_struct *work) 189957dacad5SJay Sternberg { 1900fd634f41SChristoph Hellwig struct nvme_dev *dev = container_of(work, struct nvme_dev, reset_work); 1901a98e58e5SScott Bauer bool was_suspend = !!(dev->ctrl.ctrl_config & NVME_CC_SHN_NORMAL); 1902f58944e2SKeith Busch int result = -ENODEV; 190357dacad5SJay Sternberg 1904bb8d261eSChristoph Hellwig if (WARN_ON(dev->ctrl.state == NVME_CTRL_RESETTING)) 1905fd634f41SChristoph Hellwig goto out; 1906fd634f41SChristoph Hellwig 1907fd634f41SChristoph Hellwig /* 1908fd634f41SChristoph Hellwig * If we're called to reset a live controller first shut it down before 1909fd634f41SChristoph Hellwig * moving on. 1910fd634f41SChristoph Hellwig */ 1911b00a726aSKeith Busch if (dev->ctrl.ctrl_config & NVME_CC_ENABLE) 1912a5cdb68cSKeith Busch nvme_dev_disable(dev, false); 1913fd634f41SChristoph Hellwig 1914bb8d261eSChristoph Hellwig if (!nvme_change_ctrl_state(&dev->ctrl, NVME_CTRL_RESETTING)) 19159bf2b972SKeith Busch goto out; 19169bf2b972SKeith Busch 1917b00a726aSKeith Busch result = nvme_pci_enable(dev); 191857dacad5SJay Sternberg if (result) 191957dacad5SJay Sternberg goto out; 192057dacad5SJay Sternberg 192157dacad5SJay Sternberg result = nvme_configure_admin_queue(dev); 192257dacad5SJay Sternberg if (result) 1923f58944e2SKeith Busch goto out; 192457dacad5SJay Sternberg 192557dacad5SJay Sternberg nvme_init_queue(dev->queues[0], 0); 192657dacad5SJay Sternberg result = nvme_alloc_admin_tags(dev); 192757dacad5SJay Sternberg if (result) 1928f58944e2SKeith Busch goto out; 192957dacad5SJay Sternberg 1930ce4541f4SChristoph Hellwig result = nvme_init_identify(&dev->ctrl); 1931ce4541f4SChristoph Hellwig if (result) 1932f58944e2SKeith Busch goto out; 1933ce4541f4SChristoph Hellwig 1934e286bcfcSScott Bauer if (dev->ctrl.oacs & NVME_CTRL_OACS_SEC_SUPP) { 1935e286bcfcSScott Bauer if (!dev->ctrl.opal_dev) 19364f1244c8SChristoph Hellwig dev->ctrl.opal_dev = 19374f1244c8SChristoph Hellwig init_opal_dev(&dev->ctrl, &nvme_sec_submit); 1938e286bcfcSScott Bauer else if (was_suspend) 19394f1244c8SChristoph Hellwig opal_unlock_from_suspend(dev->ctrl.opal_dev); 1940e286bcfcSScott Bauer } else { 1941e286bcfcSScott Bauer free_opal_dev(dev->ctrl.opal_dev); 1942e286bcfcSScott Bauer dev->ctrl.opal_dev = NULL; 1943e286bcfcSScott Bauer } 1944a98e58e5SScott Bauer 1945f9f38e33SHelen Koike if (dev->ctrl.oacs & NVME_CTRL_OACS_DBBUF_SUPP) { 1946f9f38e33SHelen Koike result = nvme_dbbuf_dma_alloc(dev); 1947f9f38e33SHelen Koike if (result) 1948f9f38e33SHelen Koike dev_warn(dev->dev, 1949f9f38e33SHelen Koike "unable to allocate dma for dbbuf\n"); 1950f9f38e33SHelen Koike } 1951f9f38e33SHelen Koike 195257dacad5SJay Sternberg result = nvme_setup_io_queues(dev); 195357dacad5SJay Sternberg if (result) 1954f58944e2SKeith Busch goto out; 195557dacad5SJay Sternberg 195621f033f7SKeith Busch /* 195721f033f7SKeith Busch * A controller that can not execute IO typically requires user 195821f033f7SKeith Busch * intervention to correct. For such degraded controllers, the driver 195921f033f7SKeith Busch * should not submit commands the user did not request, so skip 196021f033f7SKeith Busch * registering for asynchronous event notification on this condition. 196121f033f7SKeith Busch */ 1962f866fc42SChristoph Hellwig if (dev->online_queues > 1) 1963f866fc42SChristoph Hellwig nvme_queue_async_events(&dev->ctrl); 196457dacad5SJay Sternberg 19652d55cd5fSChristoph Hellwig mod_timer(&dev->watchdog_timer, round_jiffies(jiffies + HZ)); 196657dacad5SJay Sternberg 196757dacad5SJay Sternberg /* 196857dacad5SJay Sternberg * Keep the controller around but remove all namespaces if we don't have 196957dacad5SJay Sternberg * any working I/O queue. 197057dacad5SJay Sternberg */ 197157dacad5SJay Sternberg if (dev->online_queues < 2) { 19721b3c47c1SSagi Grimberg dev_warn(dev->ctrl.device, "IO queues not created\n"); 19733b24774eSKeith Busch nvme_kill_queues(&dev->ctrl); 19745bae7f73SChristoph Hellwig nvme_remove_namespaces(&dev->ctrl); 197557dacad5SJay Sternberg } else { 197625646264SKeith Busch nvme_start_queues(&dev->ctrl); 1977302ad8ccSKeith Busch nvme_wait_freeze(&dev->ctrl); 197857dacad5SJay Sternberg nvme_dev_add(dev); 1979302ad8ccSKeith Busch nvme_unfreeze(&dev->ctrl); 198057dacad5SJay Sternberg } 198157dacad5SJay Sternberg 1982bb8d261eSChristoph Hellwig if (!nvme_change_ctrl_state(&dev->ctrl, NVME_CTRL_LIVE)) { 1983bb8d261eSChristoph Hellwig dev_warn(dev->ctrl.device, "failed to mark controller live\n"); 1984bb8d261eSChristoph Hellwig goto out; 1985bb8d261eSChristoph Hellwig } 198692911a55SChristoph Hellwig 198792911a55SChristoph Hellwig if (dev->online_queues > 1) 19885955be21SChristoph Hellwig nvme_queue_scan(&dev->ctrl); 198957dacad5SJay Sternberg return; 199057dacad5SJay Sternberg 199157dacad5SJay Sternberg out: 1992f58944e2SKeith Busch nvme_remove_dead_ctrl(dev, result); 199357dacad5SJay Sternberg } 199457dacad5SJay Sternberg 19955c8809e6SChristoph Hellwig static void nvme_remove_dead_ctrl_work(struct work_struct *work) 199657dacad5SJay Sternberg { 19975c8809e6SChristoph Hellwig struct nvme_dev *dev = container_of(work, struct nvme_dev, remove_work); 199857dacad5SJay Sternberg struct pci_dev *pdev = to_pci_dev(dev->dev); 199957dacad5SJay Sternberg 200069d9a99cSKeith Busch nvme_kill_queues(&dev->ctrl); 200157dacad5SJay Sternberg if (pci_get_drvdata(pdev)) 2002921920abSKeith Busch device_release_driver(&pdev->dev); 20031673f1f0SChristoph Hellwig nvme_put_ctrl(&dev->ctrl); 200457dacad5SJay Sternberg } 200557dacad5SJay Sternberg 200657dacad5SJay Sternberg static int nvme_reset(struct nvme_dev *dev) 200757dacad5SJay Sternberg { 20081c63dc66SChristoph Hellwig if (!dev->ctrl.admin_q || blk_queue_dying(dev->ctrl.admin_q)) 200957dacad5SJay Sternberg return -ENODEV; 2010c5f6ce97SKeith Busch if (work_busy(&dev->reset_work)) 2011c5f6ce97SKeith Busch return -ENODEV; 2012846cc05fSChristoph Hellwig if (!queue_work(nvme_workq, &dev->reset_work)) 2013846cc05fSChristoph Hellwig return -EBUSY; 201457dacad5SJay Sternberg return 0; 201557dacad5SJay Sternberg } 201657dacad5SJay Sternberg 20171c63dc66SChristoph Hellwig static int nvme_pci_reg_read32(struct nvme_ctrl *ctrl, u32 off, u32 *val) 201857dacad5SJay Sternberg { 20191c63dc66SChristoph Hellwig *val = readl(to_nvme_dev(ctrl)->bar + off); 20201c63dc66SChristoph Hellwig return 0; 202157dacad5SJay Sternberg } 20221c63dc66SChristoph Hellwig 20235fd4ce1bSChristoph Hellwig static int nvme_pci_reg_write32(struct nvme_ctrl *ctrl, u32 off, u32 val) 20245fd4ce1bSChristoph Hellwig { 20255fd4ce1bSChristoph Hellwig writel(val, to_nvme_dev(ctrl)->bar + off); 20265fd4ce1bSChristoph Hellwig return 0; 20275fd4ce1bSChristoph Hellwig } 20285fd4ce1bSChristoph Hellwig 20297fd8930fSChristoph Hellwig static int nvme_pci_reg_read64(struct nvme_ctrl *ctrl, u32 off, u64 *val) 20307fd8930fSChristoph Hellwig { 20317fd8930fSChristoph Hellwig *val = readq(to_nvme_dev(ctrl)->bar + off); 20327fd8930fSChristoph Hellwig return 0; 20337fd8930fSChristoph Hellwig } 20347fd8930fSChristoph Hellwig 2035f3ca80fcSChristoph Hellwig static int nvme_pci_reset_ctrl(struct nvme_ctrl *ctrl) 2036f3ca80fcSChristoph Hellwig { 2037c5f6ce97SKeith Busch struct nvme_dev *dev = to_nvme_dev(ctrl); 2038c5f6ce97SKeith Busch int ret = nvme_reset(dev); 2039c5f6ce97SKeith Busch 2040c5f6ce97SKeith Busch if (!ret) 2041c5f6ce97SKeith Busch flush_work(&dev->reset_work); 2042c5f6ce97SKeith Busch return ret; 2043f3ca80fcSChristoph Hellwig } 2044f3ca80fcSChristoph Hellwig 20451c63dc66SChristoph Hellwig static const struct nvme_ctrl_ops nvme_pci_ctrl_ops = { 20461a353d85SMing Lin .name = "pcie", 2047e439bb12SSagi Grimberg .module = THIS_MODULE, 20481c63dc66SChristoph Hellwig .reg_read32 = nvme_pci_reg_read32, 20495fd4ce1bSChristoph Hellwig .reg_write32 = nvme_pci_reg_write32, 20507fd8930fSChristoph Hellwig .reg_read64 = nvme_pci_reg_read64, 2051f3ca80fcSChristoph Hellwig .reset_ctrl = nvme_pci_reset_ctrl, 20521673f1f0SChristoph Hellwig .free_ctrl = nvme_pci_free_ctrl, 2053f866fc42SChristoph Hellwig .submit_async_event = nvme_pci_submit_async_event, 20541c63dc66SChristoph Hellwig }; 205557dacad5SJay Sternberg 2056b00a726aSKeith Busch static int nvme_dev_map(struct nvme_dev *dev) 2057b00a726aSKeith Busch { 2058b00a726aSKeith Busch struct pci_dev *pdev = to_pci_dev(dev->dev); 2059b00a726aSKeith Busch 2060a1f447b3SJohannes Thumshirn if (pci_request_mem_regions(pdev, "nvme")) 2061b00a726aSKeith Busch return -ENODEV; 2062b00a726aSKeith Busch 2063b00a726aSKeith Busch dev->bar = ioremap(pci_resource_start(pdev, 0), 8192); 2064b00a726aSKeith Busch if (!dev->bar) 2065b00a726aSKeith Busch goto release; 2066b00a726aSKeith Busch 2067b00a726aSKeith Busch return 0; 2068b00a726aSKeith Busch release: 2069a1f447b3SJohannes Thumshirn pci_release_mem_regions(pdev); 2070b00a726aSKeith Busch return -ENODEV; 2071b00a726aSKeith Busch } 2072b00a726aSKeith Busch 207357dacad5SJay Sternberg static int nvme_probe(struct pci_dev *pdev, const struct pci_device_id *id) 207457dacad5SJay Sternberg { 207557dacad5SJay Sternberg int node, result = -ENOMEM; 207657dacad5SJay Sternberg struct nvme_dev *dev; 207757dacad5SJay Sternberg 207857dacad5SJay Sternberg node = dev_to_node(&pdev->dev); 207957dacad5SJay Sternberg if (node == NUMA_NO_NODE) 20802fa84351SMasayoshi Mizuma set_dev_node(&pdev->dev, first_memory_node); 208157dacad5SJay Sternberg 208257dacad5SJay Sternberg dev = kzalloc_node(sizeof(*dev), GFP_KERNEL, node); 208357dacad5SJay Sternberg if (!dev) 208457dacad5SJay Sternberg return -ENOMEM; 208557dacad5SJay Sternberg dev->queues = kzalloc_node((num_possible_cpus() + 1) * sizeof(void *), 208657dacad5SJay Sternberg GFP_KERNEL, node); 208757dacad5SJay Sternberg if (!dev->queues) 208857dacad5SJay Sternberg goto free; 208957dacad5SJay Sternberg 209057dacad5SJay Sternberg dev->dev = get_device(&pdev->dev); 209157dacad5SJay Sternberg pci_set_drvdata(pdev, dev); 209257dacad5SJay Sternberg 2093b00a726aSKeith Busch result = nvme_dev_map(dev); 2094b00a726aSKeith Busch if (result) 2095b00a726aSKeith Busch goto free; 2096b00a726aSKeith Busch 2097f3ca80fcSChristoph Hellwig INIT_WORK(&dev->reset_work, nvme_reset_work); 20985c8809e6SChristoph Hellwig INIT_WORK(&dev->remove_work, nvme_remove_dead_ctrl_work); 20992d55cd5fSChristoph Hellwig setup_timer(&dev->watchdog_timer, nvme_watchdog_timer, 21002d55cd5fSChristoph Hellwig (unsigned long)dev); 210177bf25eaSKeith Busch mutex_init(&dev->shutdown_lock); 2102db3cbfffSKeith Busch init_completion(&dev->ioq_wait); 2103f3ca80fcSChristoph Hellwig 2104f3ca80fcSChristoph Hellwig result = nvme_setup_prp_pools(dev); 2105f3ca80fcSChristoph Hellwig if (result) 2106f3ca80fcSChristoph Hellwig goto put_pci; 2107f3ca80fcSChristoph Hellwig 2108f3ca80fcSChristoph Hellwig result = nvme_init_ctrl(&dev->ctrl, &pdev->dev, &nvme_pci_ctrl_ops, 2109f3ca80fcSChristoph Hellwig id->driver_data); 2110f3ca80fcSChristoph Hellwig if (result) 2111f3ca80fcSChristoph Hellwig goto release_pools; 2112f3ca80fcSChristoph Hellwig 21131b3c47c1SSagi Grimberg dev_info(dev->ctrl.device, "pci function %s\n", dev_name(&pdev->dev)); 21141b3c47c1SSagi Grimberg 211592f7a162SKeith Busch queue_work(nvme_workq, &dev->reset_work); 211657dacad5SJay Sternberg return 0; 211757dacad5SJay Sternberg 211857dacad5SJay Sternberg release_pools: 211957dacad5SJay Sternberg nvme_release_prp_pools(dev); 212057dacad5SJay Sternberg put_pci: 212157dacad5SJay Sternberg put_device(dev->dev); 2122b00a726aSKeith Busch nvme_dev_unmap(dev); 212357dacad5SJay Sternberg free: 212457dacad5SJay Sternberg kfree(dev->queues); 212557dacad5SJay Sternberg kfree(dev); 212657dacad5SJay Sternberg return result; 212757dacad5SJay Sternberg } 212857dacad5SJay Sternberg 212957dacad5SJay Sternberg static void nvme_reset_notify(struct pci_dev *pdev, bool prepare) 213057dacad5SJay Sternberg { 213157dacad5SJay Sternberg struct nvme_dev *dev = pci_get_drvdata(pdev); 213257dacad5SJay Sternberg 213357dacad5SJay Sternberg if (prepare) 2134a5cdb68cSKeith Busch nvme_dev_disable(dev, false); 213557dacad5SJay Sternberg else 2136c5f6ce97SKeith Busch nvme_reset(dev); 213757dacad5SJay Sternberg } 213857dacad5SJay Sternberg 213957dacad5SJay Sternberg static void nvme_shutdown(struct pci_dev *pdev) 214057dacad5SJay Sternberg { 214157dacad5SJay Sternberg struct nvme_dev *dev = pci_get_drvdata(pdev); 2142a5cdb68cSKeith Busch nvme_dev_disable(dev, true); 214357dacad5SJay Sternberg } 214457dacad5SJay Sternberg 2145f58944e2SKeith Busch /* 2146f58944e2SKeith Busch * The driver's remove may be called on a device in a partially initialized 2147f58944e2SKeith Busch * state. This function must not have any dependencies on the device state in 2148f58944e2SKeith Busch * order to proceed. 2149f58944e2SKeith Busch */ 215057dacad5SJay Sternberg static void nvme_remove(struct pci_dev *pdev) 215157dacad5SJay Sternberg { 215257dacad5SJay Sternberg struct nvme_dev *dev = pci_get_drvdata(pdev); 215357dacad5SJay Sternberg 2154bb8d261eSChristoph Hellwig nvme_change_ctrl_state(&dev->ctrl, NVME_CTRL_DELETING); 2155bb8d261eSChristoph Hellwig 215657dacad5SJay Sternberg pci_set_drvdata(pdev, NULL); 21570ff9d4e1SKeith Busch 21586db28edaSKeith Busch if (!pci_device_is_present(pdev)) { 21590ff9d4e1SKeith Busch nvme_change_ctrl_state(&dev->ctrl, NVME_CTRL_DEAD); 21606db28edaSKeith Busch nvme_dev_disable(dev, false); 21616db28edaSKeith Busch } 21620ff9d4e1SKeith Busch 21639bf2b972SKeith Busch flush_work(&dev->reset_work); 216453029b04SKeith Busch nvme_uninit_ctrl(&dev->ctrl); 2165a5cdb68cSKeith Busch nvme_dev_disable(dev, true); 216657dacad5SJay Sternberg nvme_dev_remove_admin(dev); 216757dacad5SJay Sternberg nvme_free_queues(dev, 0); 216857dacad5SJay Sternberg nvme_release_cmb(dev); 216957dacad5SJay Sternberg nvme_release_prp_pools(dev); 2170b00a726aSKeith Busch nvme_dev_unmap(dev); 21711673f1f0SChristoph Hellwig nvme_put_ctrl(&dev->ctrl); 217257dacad5SJay Sternberg } 217357dacad5SJay Sternberg 217413880f5bSKeith Busch static int nvme_pci_sriov_configure(struct pci_dev *pdev, int numvfs) 217513880f5bSKeith Busch { 217613880f5bSKeith Busch int ret = 0; 217713880f5bSKeith Busch 217813880f5bSKeith Busch if (numvfs == 0) { 217913880f5bSKeith Busch if (pci_vfs_assigned(pdev)) { 218013880f5bSKeith Busch dev_warn(&pdev->dev, 218113880f5bSKeith Busch "Cannot disable SR-IOV VFs while assigned\n"); 218213880f5bSKeith Busch return -EPERM; 218313880f5bSKeith Busch } 218413880f5bSKeith Busch pci_disable_sriov(pdev); 218513880f5bSKeith Busch return 0; 218613880f5bSKeith Busch } 218713880f5bSKeith Busch 218813880f5bSKeith Busch ret = pci_enable_sriov(pdev, numvfs); 218913880f5bSKeith Busch return ret ? ret : numvfs; 219013880f5bSKeith Busch } 219113880f5bSKeith Busch 219257dacad5SJay Sternberg #ifdef CONFIG_PM_SLEEP 219357dacad5SJay Sternberg static int nvme_suspend(struct device *dev) 219457dacad5SJay Sternberg { 219557dacad5SJay Sternberg struct pci_dev *pdev = to_pci_dev(dev); 219657dacad5SJay Sternberg struct nvme_dev *ndev = pci_get_drvdata(pdev); 219757dacad5SJay Sternberg 2198a5cdb68cSKeith Busch nvme_dev_disable(ndev, true); 219957dacad5SJay Sternberg return 0; 220057dacad5SJay Sternberg } 220157dacad5SJay Sternberg 220257dacad5SJay Sternberg static int nvme_resume(struct device *dev) 220357dacad5SJay Sternberg { 220457dacad5SJay Sternberg struct pci_dev *pdev = to_pci_dev(dev); 220557dacad5SJay Sternberg struct nvme_dev *ndev = pci_get_drvdata(pdev); 220657dacad5SJay Sternberg 2207c5f6ce97SKeith Busch nvme_reset(ndev); 220857dacad5SJay Sternberg return 0; 220957dacad5SJay Sternberg } 221057dacad5SJay Sternberg #endif 221157dacad5SJay Sternberg 221257dacad5SJay Sternberg static SIMPLE_DEV_PM_OPS(nvme_dev_pm_ops, nvme_suspend, nvme_resume); 221357dacad5SJay Sternberg 2214a0a3408eSKeith Busch static pci_ers_result_t nvme_error_detected(struct pci_dev *pdev, 2215a0a3408eSKeith Busch pci_channel_state_t state) 2216a0a3408eSKeith Busch { 2217a0a3408eSKeith Busch struct nvme_dev *dev = pci_get_drvdata(pdev); 2218a0a3408eSKeith Busch 2219a0a3408eSKeith Busch /* 2220a0a3408eSKeith Busch * A frozen channel requires a reset. When detected, this method will 2221a0a3408eSKeith Busch * shutdown the controller to quiesce. The controller will be restarted 2222a0a3408eSKeith Busch * after the slot reset through driver's slot_reset callback. 2223a0a3408eSKeith Busch */ 2224a0a3408eSKeith Busch switch (state) { 2225a0a3408eSKeith Busch case pci_channel_io_normal: 2226a0a3408eSKeith Busch return PCI_ERS_RESULT_CAN_RECOVER; 2227a0a3408eSKeith Busch case pci_channel_io_frozen: 2228d011fb31SKeith Busch dev_warn(dev->ctrl.device, 2229d011fb31SKeith Busch "frozen state error detected, reset controller\n"); 2230a5cdb68cSKeith Busch nvme_dev_disable(dev, false); 2231a0a3408eSKeith Busch return PCI_ERS_RESULT_NEED_RESET; 2232a0a3408eSKeith Busch case pci_channel_io_perm_failure: 2233d011fb31SKeith Busch dev_warn(dev->ctrl.device, 2234d011fb31SKeith Busch "failure state error detected, request disconnect\n"); 2235a0a3408eSKeith Busch return PCI_ERS_RESULT_DISCONNECT; 2236a0a3408eSKeith Busch } 2237a0a3408eSKeith Busch return PCI_ERS_RESULT_NEED_RESET; 2238a0a3408eSKeith Busch } 2239a0a3408eSKeith Busch 2240a0a3408eSKeith Busch static pci_ers_result_t nvme_slot_reset(struct pci_dev *pdev) 2241a0a3408eSKeith Busch { 2242a0a3408eSKeith Busch struct nvme_dev *dev = pci_get_drvdata(pdev); 2243a0a3408eSKeith Busch 22441b3c47c1SSagi Grimberg dev_info(dev->ctrl.device, "restart after slot reset\n"); 2245a0a3408eSKeith Busch pci_restore_state(pdev); 2246c5f6ce97SKeith Busch nvme_reset(dev); 2247a0a3408eSKeith Busch return PCI_ERS_RESULT_RECOVERED; 2248a0a3408eSKeith Busch } 2249a0a3408eSKeith Busch 2250a0a3408eSKeith Busch static void nvme_error_resume(struct pci_dev *pdev) 2251a0a3408eSKeith Busch { 2252a0a3408eSKeith Busch pci_cleanup_aer_uncorrect_error_status(pdev); 2253a0a3408eSKeith Busch } 2254a0a3408eSKeith Busch 225557dacad5SJay Sternberg static const struct pci_error_handlers nvme_err_handler = { 225657dacad5SJay Sternberg .error_detected = nvme_error_detected, 225757dacad5SJay Sternberg .slot_reset = nvme_slot_reset, 225857dacad5SJay Sternberg .resume = nvme_error_resume, 225957dacad5SJay Sternberg .reset_notify = nvme_reset_notify, 226057dacad5SJay Sternberg }; 226157dacad5SJay Sternberg 226257dacad5SJay Sternberg static const struct pci_device_id nvme_id_table[] = { 2263106198edSChristoph Hellwig { PCI_VDEVICE(INTEL, 0x0953), 226408095e70SKeith Busch .driver_data = NVME_QUIRK_STRIPE_SIZE | 2265e850fd16SChristoph Hellwig NVME_QUIRK_DEALLOCATE_ZEROES, }, 226699466e70SKeith Busch { PCI_VDEVICE(INTEL, 0x0a53), 226799466e70SKeith Busch .driver_data = NVME_QUIRK_STRIPE_SIZE | 2268e850fd16SChristoph Hellwig NVME_QUIRK_DEALLOCATE_ZEROES, }, 226999466e70SKeith Busch { PCI_VDEVICE(INTEL, 0x0a54), 227099466e70SKeith Busch .driver_data = NVME_QUIRK_STRIPE_SIZE | 2271e850fd16SChristoph Hellwig NVME_QUIRK_DEALLOCATE_ZEROES, }, 2272540c801cSKeith Busch { PCI_VDEVICE(INTEL, 0x5845), /* Qemu emulated controller */ 2273540c801cSKeith Busch .driver_data = NVME_QUIRK_IDENTIFY_CNS, }, 227454adc010SGuilherme G. Piccoli { PCI_DEVICE(0x1c58, 0x0003), /* HGST adapter */ 227554adc010SGuilherme G. Piccoli .driver_data = NVME_QUIRK_DELAY_BEFORE_CHK_RDY, }, 2276015282c9SWenbo Wang { PCI_DEVICE(0x1c5f, 0x0540), /* Memblaze Pblaze4 adapter */ 2277015282c9SWenbo Wang .driver_data = NVME_QUIRK_DELAY_BEFORE_CHK_RDY, }, 227857dacad5SJay Sternberg { PCI_DEVICE_CLASS(PCI_CLASS_STORAGE_EXPRESS, 0xffffff) }, 2279c74dc780SStephan Günther { PCI_DEVICE(PCI_VENDOR_ID_APPLE, 0x2001) }, 2280124298bdSDaniel Roschka { PCI_DEVICE(PCI_VENDOR_ID_APPLE, 0x2003) }, 228157dacad5SJay Sternberg { 0, } 228257dacad5SJay Sternberg }; 228357dacad5SJay Sternberg MODULE_DEVICE_TABLE(pci, nvme_id_table); 228457dacad5SJay Sternberg 228557dacad5SJay Sternberg static struct pci_driver nvme_driver = { 228657dacad5SJay Sternberg .name = "nvme", 228757dacad5SJay Sternberg .id_table = nvme_id_table, 228857dacad5SJay Sternberg .probe = nvme_probe, 228957dacad5SJay Sternberg .remove = nvme_remove, 229057dacad5SJay Sternberg .shutdown = nvme_shutdown, 229157dacad5SJay Sternberg .driver = { 229257dacad5SJay Sternberg .pm = &nvme_dev_pm_ops, 229357dacad5SJay Sternberg }, 229413880f5bSKeith Busch .sriov_configure = nvme_pci_sriov_configure, 229557dacad5SJay Sternberg .err_handler = &nvme_err_handler, 229657dacad5SJay Sternberg }; 229757dacad5SJay Sternberg 229857dacad5SJay Sternberg static int __init nvme_init(void) 229957dacad5SJay Sternberg { 230057dacad5SJay Sternberg int result; 230157dacad5SJay Sternberg 230292f7a162SKeith Busch nvme_workq = alloc_workqueue("nvme", WQ_UNBOUND | WQ_MEM_RECLAIM, 0); 230357dacad5SJay Sternberg if (!nvme_workq) 230457dacad5SJay Sternberg return -ENOMEM; 230557dacad5SJay Sternberg 230657dacad5SJay Sternberg result = pci_register_driver(&nvme_driver); 230757dacad5SJay Sternberg if (result) 230857dacad5SJay Sternberg destroy_workqueue(nvme_workq); 230957dacad5SJay Sternberg return result; 231057dacad5SJay Sternberg } 231157dacad5SJay Sternberg 231257dacad5SJay Sternberg static void __exit nvme_exit(void) 231357dacad5SJay Sternberg { 231457dacad5SJay Sternberg pci_unregister_driver(&nvme_driver); 231557dacad5SJay Sternberg destroy_workqueue(nvme_workq); 231657dacad5SJay Sternberg _nvme_check_size(); 231757dacad5SJay Sternberg } 231857dacad5SJay Sternberg 231957dacad5SJay Sternberg MODULE_AUTHOR("Matthew Wilcox <willy@linux.intel.com>"); 232057dacad5SJay Sternberg MODULE_LICENSE("GPL"); 232157dacad5SJay Sternberg MODULE_VERSION("1.0"); 232257dacad5SJay Sternberg module_init(nvme_init); 232357dacad5SJay Sternberg module_exit(nvme_exit); 2324