157dacad5SJay Sternberg /* 257dacad5SJay Sternberg * NVM Express device driver 357dacad5SJay Sternberg * Copyright (c) 2011-2014, Intel Corporation. 457dacad5SJay Sternberg * 557dacad5SJay Sternberg * This program is free software; you can redistribute it and/or modify it 657dacad5SJay Sternberg * under the terms and conditions of the GNU General Public License, 757dacad5SJay Sternberg * version 2, as published by the Free Software Foundation. 857dacad5SJay Sternberg * 957dacad5SJay Sternberg * This program is distributed in the hope it will be useful, but WITHOUT 1057dacad5SJay Sternberg * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 1157dacad5SJay Sternberg * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 1257dacad5SJay Sternberg * more details. 1357dacad5SJay Sternberg */ 1457dacad5SJay Sternberg 15a0a3408eSKeith Busch #include <linux/aer.h> 1657dacad5SJay Sternberg #include <linux/bitops.h> 1757dacad5SJay Sternberg #include <linux/blkdev.h> 1857dacad5SJay Sternberg #include <linux/blk-mq.h> 19dca51e78SChristoph Hellwig #include <linux/blk-mq-pci.h> 2057dacad5SJay Sternberg #include <linux/cpu.h> 2157dacad5SJay Sternberg #include <linux/delay.h> 2257dacad5SJay Sternberg #include <linux/errno.h> 2357dacad5SJay Sternberg #include <linux/fs.h> 2457dacad5SJay Sternberg #include <linux/genhd.h> 2557dacad5SJay Sternberg #include <linux/hdreg.h> 2657dacad5SJay Sternberg #include <linux/idr.h> 2757dacad5SJay Sternberg #include <linux/init.h> 2857dacad5SJay Sternberg #include <linux/interrupt.h> 2957dacad5SJay Sternberg #include <linux/io.h> 3057dacad5SJay Sternberg #include <linux/kdev_t.h> 3157dacad5SJay Sternberg #include <linux/kernel.h> 3257dacad5SJay Sternberg #include <linux/mm.h> 3357dacad5SJay Sternberg #include <linux/module.h> 3457dacad5SJay Sternberg #include <linux/moduleparam.h> 3577bf25eaSKeith Busch #include <linux/mutex.h> 3657dacad5SJay Sternberg #include <linux/pci.h> 3757dacad5SJay Sternberg #include <linux/poison.h> 3857dacad5SJay Sternberg #include <linux/ptrace.h> 3957dacad5SJay Sternberg #include <linux/sched.h> 4057dacad5SJay Sternberg #include <linux/slab.h> 4157dacad5SJay Sternberg #include <linux/t10-pi.h> 422d55cd5fSChristoph Hellwig #include <linux/timer.h> 4357dacad5SJay Sternberg #include <linux/types.h> 449cf5c095SLinus Torvalds #include <linux/io-64-nonatomic-lo-hi.h> 451d277a63SKeith Busch #include <asm/unaligned.h> 46a98e58e5SScott Bauer #include <linux/sed-opal.h> 4757dacad5SJay Sternberg 4857dacad5SJay Sternberg #include "nvme.h" 4957dacad5SJay Sternberg 5057dacad5SJay Sternberg #define NVME_Q_DEPTH 1024 5157dacad5SJay Sternberg #define NVME_AQ_DEPTH 256 5257dacad5SJay Sternberg #define SQ_SIZE(depth) (depth * sizeof(struct nvme_command)) 5357dacad5SJay Sternberg #define CQ_SIZE(depth) (depth * sizeof(struct nvme_completion)) 5457dacad5SJay Sternberg 55adf68f21SChristoph Hellwig /* 56adf68f21SChristoph Hellwig * We handle AEN commands ourselves and don't even let the 57adf68f21SChristoph Hellwig * block layer know about them. 58adf68f21SChristoph Hellwig */ 59f866fc42SChristoph Hellwig #define NVME_AQ_BLKMQ_DEPTH (NVME_AQ_DEPTH - NVME_NR_AERS) 60adf68f21SChristoph Hellwig 6157dacad5SJay Sternberg static int use_threaded_interrupts; 6257dacad5SJay Sternberg module_param(use_threaded_interrupts, int, 0); 6357dacad5SJay Sternberg 6457dacad5SJay Sternberg static bool use_cmb_sqes = true; 6557dacad5SJay Sternberg module_param(use_cmb_sqes, bool, 0644); 6657dacad5SJay Sternberg MODULE_PARM_DESC(use_cmb_sqes, "use controller's memory buffer for I/O SQes"); 6757dacad5SJay Sternberg 6857dacad5SJay Sternberg static struct workqueue_struct *nvme_workq; 6957dacad5SJay Sternberg 701c63dc66SChristoph Hellwig struct nvme_dev; 711c63dc66SChristoph Hellwig struct nvme_queue; 7257dacad5SJay Sternberg 7357dacad5SJay Sternberg static int nvme_reset(struct nvme_dev *dev); 74a0fa9647SJens Axboe static void nvme_process_cq(struct nvme_queue *nvmeq); 75a5cdb68cSKeith Busch static void nvme_dev_disable(struct nvme_dev *dev, bool shutdown); 7657dacad5SJay Sternberg 7757dacad5SJay Sternberg /* 781c63dc66SChristoph Hellwig * Represents an NVM Express device. Each nvme_dev is a PCI function. 791c63dc66SChristoph Hellwig */ 801c63dc66SChristoph Hellwig struct nvme_dev { 811c63dc66SChristoph Hellwig struct nvme_queue **queues; 821c63dc66SChristoph Hellwig struct blk_mq_tag_set tagset; 831c63dc66SChristoph Hellwig struct blk_mq_tag_set admin_tagset; 841c63dc66SChristoph Hellwig u32 __iomem *dbs; 851c63dc66SChristoph Hellwig struct device *dev; 861c63dc66SChristoph Hellwig struct dma_pool *prp_page_pool; 871c63dc66SChristoph Hellwig struct dma_pool *prp_small_pool; 881c63dc66SChristoph Hellwig unsigned queue_count; 891c63dc66SChristoph Hellwig unsigned online_queues; 901c63dc66SChristoph Hellwig unsigned max_qid; 911c63dc66SChristoph Hellwig int q_depth; 921c63dc66SChristoph Hellwig u32 db_stride; 931c63dc66SChristoph Hellwig void __iomem *bar; 941c63dc66SChristoph Hellwig struct work_struct reset_work; 955c8809e6SChristoph Hellwig struct work_struct remove_work; 962d55cd5fSChristoph Hellwig struct timer_list watchdog_timer; 9777bf25eaSKeith Busch struct mutex shutdown_lock; 981c63dc66SChristoph Hellwig bool subsystem; 991c63dc66SChristoph Hellwig void __iomem *cmb; 1001c63dc66SChristoph Hellwig dma_addr_t cmb_dma_addr; 1011c63dc66SChristoph Hellwig u64 cmb_size; 1021c63dc66SChristoph Hellwig u32 cmbsz; 103202021c1SStephen Bates u32 cmbloc; 1041c63dc66SChristoph Hellwig struct nvme_ctrl ctrl; 105db3cbfffSKeith Busch struct completion ioq_wait; 10657dacad5SJay Sternberg }; 10757dacad5SJay Sternberg 1081c63dc66SChristoph Hellwig static inline struct nvme_dev *to_nvme_dev(struct nvme_ctrl *ctrl) 1091c63dc66SChristoph Hellwig { 1101c63dc66SChristoph Hellwig return container_of(ctrl, struct nvme_dev, ctrl); 1111c63dc66SChristoph Hellwig } 1121c63dc66SChristoph Hellwig 11357dacad5SJay Sternberg /* 11457dacad5SJay Sternberg * An NVM Express queue. Each device has at least two (one for admin 11557dacad5SJay Sternberg * commands and one for I/O commands). 11657dacad5SJay Sternberg */ 11757dacad5SJay Sternberg struct nvme_queue { 11857dacad5SJay Sternberg struct device *q_dmadev; 11957dacad5SJay Sternberg struct nvme_dev *dev; 12057dacad5SJay Sternberg char irqname[24]; /* nvme4294967295-65535\0 */ 12157dacad5SJay Sternberg spinlock_t q_lock; 12257dacad5SJay Sternberg struct nvme_command *sq_cmds; 12357dacad5SJay Sternberg struct nvme_command __iomem *sq_cmds_io; 12457dacad5SJay Sternberg volatile struct nvme_completion *cqes; 12557dacad5SJay Sternberg struct blk_mq_tags **tags; 12657dacad5SJay Sternberg dma_addr_t sq_dma_addr; 12757dacad5SJay Sternberg dma_addr_t cq_dma_addr; 12857dacad5SJay Sternberg u32 __iomem *q_db; 12957dacad5SJay Sternberg u16 q_depth; 13057dacad5SJay Sternberg s16 cq_vector; 13157dacad5SJay Sternberg u16 sq_tail; 13257dacad5SJay Sternberg u16 cq_head; 13357dacad5SJay Sternberg u16 qid; 13457dacad5SJay Sternberg u8 cq_phase; 13557dacad5SJay Sternberg u8 cqe_seen; 13657dacad5SJay Sternberg }; 13757dacad5SJay Sternberg 13857dacad5SJay Sternberg /* 13971bd150cSChristoph Hellwig * The nvme_iod describes the data in an I/O, including the list of PRP 14071bd150cSChristoph Hellwig * entries. You can't see it in this data structure because C doesn't let 141f4800d6dSChristoph Hellwig * me express that. Use nvme_init_iod to ensure there's enough space 14271bd150cSChristoph Hellwig * allocated to store the PRP list. 14371bd150cSChristoph Hellwig */ 14471bd150cSChristoph Hellwig struct nvme_iod { 145d49187e9SChristoph Hellwig struct nvme_request req; 146f4800d6dSChristoph Hellwig struct nvme_queue *nvmeq; 147f4800d6dSChristoph Hellwig int aborted; 14871bd150cSChristoph Hellwig int npages; /* In the PRP list. 0 means small pool in use */ 14971bd150cSChristoph Hellwig int nents; /* Used in scatterlist */ 15071bd150cSChristoph Hellwig int length; /* Of data, in bytes */ 15171bd150cSChristoph Hellwig dma_addr_t first_dma; 152bf684057SChristoph Hellwig struct scatterlist meta_sg; /* metadata requires single contiguous buffer */ 153f4800d6dSChristoph Hellwig struct scatterlist *sg; 154f4800d6dSChristoph Hellwig struct scatterlist inline_sg[0]; 15557dacad5SJay Sternberg }; 15657dacad5SJay Sternberg 15757dacad5SJay Sternberg /* 15857dacad5SJay Sternberg * Check we didin't inadvertently grow the command struct 15957dacad5SJay Sternberg */ 16057dacad5SJay Sternberg static inline void _nvme_check_size(void) 16157dacad5SJay Sternberg { 16257dacad5SJay Sternberg BUILD_BUG_ON(sizeof(struct nvme_rw_command) != 64); 16357dacad5SJay Sternberg BUILD_BUG_ON(sizeof(struct nvme_create_cq) != 64); 16457dacad5SJay Sternberg BUILD_BUG_ON(sizeof(struct nvme_create_sq) != 64); 16557dacad5SJay Sternberg BUILD_BUG_ON(sizeof(struct nvme_delete_queue) != 64); 16657dacad5SJay Sternberg BUILD_BUG_ON(sizeof(struct nvme_features) != 64); 16757dacad5SJay Sternberg BUILD_BUG_ON(sizeof(struct nvme_format_cmd) != 64); 16857dacad5SJay Sternberg BUILD_BUG_ON(sizeof(struct nvme_abort_cmd) != 64); 16957dacad5SJay Sternberg BUILD_BUG_ON(sizeof(struct nvme_command) != 64); 17057dacad5SJay Sternberg BUILD_BUG_ON(sizeof(struct nvme_id_ctrl) != 4096); 17157dacad5SJay Sternberg BUILD_BUG_ON(sizeof(struct nvme_id_ns) != 4096); 17257dacad5SJay Sternberg BUILD_BUG_ON(sizeof(struct nvme_lba_range_type) != 64); 17357dacad5SJay Sternberg BUILD_BUG_ON(sizeof(struct nvme_smart_log) != 512); 17457dacad5SJay Sternberg } 17557dacad5SJay Sternberg 17657dacad5SJay Sternberg /* 17757dacad5SJay Sternberg * Max size of iod being embedded in the request payload 17857dacad5SJay Sternberg */ 17957dacad5SJay Sternberg #define NVME_INT_PAGES 2 1805fd4ce1bSChristoph Hellwig #define NVME_INT_BYTES(dev) (NVME_INT_PAGES * (dev)->ctrl.page_size) 18157dacad5SJay Sternberg 18257dacad5SJay Sternberg /* 18357dacad5SJay Sternberg * Will slightly overestimate the number of pages needed. This is OK 18457dacad5SJay Sternberg * as it only leads to a small amount of wasted memory for the lifetime of 18557dacad5SJay Sternberg * the I/O. 18657dacad5SJay Sternberg */ 18757dacad5SJay Sternberg static int nvme_npages(unsigned size, struct nvme_dev *dev) 18857dacad5SJay Sternberg { 1895fd4ce1bSChristoph Hellwig unsigned nprps = DIV_ROUND_UP(size + dev->ctrl.page_size, 1905fd4ce1bSChristoph Hellwig dev->ctrl.page_size); 19157dacad5SJay Sternberg return DIV_ROUND_UP(8 * nprps, PAGE_SIZE - 8); 19257dacad5SJay Sternberg } 19357dacad5SJay Sternberg 194f4800d6dSChristoph Hellwig static unsigned int nvme_iod_alloc_size(struct nvme_dev *dev, 195f4800d6dSChristoph Hellwig unsigned int size, unsigned int nseg) 196f4800d6dSChristoph Hellwig { 197f4800d6dSChristoph Hellwig return sizeof(__le64 *) * nvme_npages(size, dev) + 198f4800d6dSChristoph Hellwig sizeof(struct scatterlist) * nseg; 199f4800d6dSChristoph Hellwig } 200f4800d6dSChristoph Hellwig 20157dacad5SJay Sternberg static unsigned int nvme_cmd_size(struct nvme_dev *dev) 20257dacad5SJay Sternberg { 203f4800d6dSChristoph Hellwig return sizeof(struct nvme_iod) + 204f4800d6dSChristoph Hellwig nvme_iod_alloc_size(dev, NVME_INT_BYTES(dev), NVME_INT_PAGES); 20557dacad5SJay Sternberg } 20657dacad5SJay Sternberg 207dca51e78SChristoph Hellwig static int nvmeq_irq(struct nvme_queue *nvmeq) 208dca51e78SChristoph Hellwig { 209dca51e78SChristoph Hellwig return pci_irq_vector(to_pci_dev(nvmeq->dev->dev), nvmeq->cq_vector); 210dca51e78SChristoph Hellwig } 211dca51e78SChristoph Hellwig 21257dacad5SJay Sternberg static int nvme_admin_init_hctx(struct blk_mq_hw_ctx *hctx, void *data, 21357dacad5SJay Sternberg unsigned int hctx_idx) 21457dacad5SJay Sternberg { 21557dacad5SJay Sternberg struct nvme_dev *dev = data; 21657dacad5SJay Sternberg struct nvme_queue *nvmeq = dev->queues[0]; 21757dacad5SJay Sternberg 21857dacad5SJay Sternberg WARN_ON(hctx_idx != 0); 21957dacad5SJay Sternberg WARN_ON(dev->admin_tagset.tags[0] != hctx->tags); 22057dacad5SJay Sternberg WARN_ON(nvmeq->tags); 22157dacad5SJay Sternberg 22257dacad5SJay Sternberg hctx->driver_data = nvmeq; 22357dacad5SJay Sternberg nvmeq->tags = &dev->admin_tagset.tags[0]; 22457dacad5SJay Sternberg return 0; 22557dacad5SJay Sternberg } 22657dacad5SJay Sternberg 22757dacad5SJay Sternberg static void nvme_admin_exit_hctx(struct blk_mq_hw_ctx *hctx, unsigned int hctx_idx) 22857dacad5SJay Sternberg { 22957dacad5SJay Sternberg struct nvme_queue *nvmeq = hctx->driver_data; 23057dacad5SJay Sternberg 23157dacad5SJay Sternberg nvmeq->tags = NULL; 23257dacad5SJay Sternberg } 23357dacad5SJay Sternberg 23457dacad5SJay Sternberg static int nvme_admin_init_request(void *data, struct request *req, 23557dacad5SJay Sternberg unsigned int hctx_idx, unsigned int rq_idx, 23657dacad5SJay Sternberg unsigned int numa_node) 23757dacad5SJay Sternberg { 23857dacad5SJay Sternberg struct nvme_dev *dev = data; 239f4800d6dSChristoph Hellwig struct nvme_iod *iod = blk_mq_rq_to_pdu(req); 24057dacad5SJay Sternberg struct nvme_queue *nvmeq = dev->queues[0]; 24157dacad5SJay Sternberg 24257dacad5SJay Sternberg BUG_ON(!nvmeq); 243f4800d6dSChristoph Hellwig iod->nvmeq = nvmeq; 24457dacad5SJay Sternberg return 0; 24557dacad5SJay Sternberg } 24657dacad5SJay Sternberg 24757dacad5SJay Sternberg static int nvme_init_hctx(struct blk_mq_hw_ctx *hctx, void *data, 24857dacad5SJay Sternberg unsigned int hctx_idx) 24957dacad5SJay Sternberg { 25057dacad5SJay Sternberg struct nvme_dev *dev = data; 25157dacad5SJay Sternberg struct nvme_queue *nvmeq = dev->queues[hctx_idx + 1]; 25257dacad5SJay Sternberg 25357dacad5SJay Sternberg if (!nvmeq->tags) 25457dacad5SJay Sternberg nvmeq->tags = &dev->tagset.tags[hctx_idx]; 25557dacad5SJay Sternberg 25657dacad5SJay Sternberg WARN_ON(dev->tagset.tags[hctx_idx] != hctx->tags); 25757dacad5SJay Sternberg hctx->driver_data = nvmeq; 25857dacad5SJay Sternberg return 0; 25957dacad5SJay Sternberg } 26057dacad5SJay Sternberg 26157dacad5SJay Sternberg static int nvme_init_request(void *data, struct request *req, 26257dacad5SJay Sternberg unsigned int hctx_idx, unsigned int rq_idx, 26357dacad5SJay Sternberg unsigned int numa_node) 26457dacad5SJay Sternberg { 26557dacad5SJay Sternberg struct nvme_dev *dev = data; 266f4800d6dSChristoph Hellwig struct nvme_iod *iod = blk_mq_rq_to_pdu(req); 26757dacad5SJay Sternberg struct nvme_queue *nvmeq = dev->queues[hctx_idx + 1]; 26857dacad5SJay Sternberg 26957dacad5SJay Sternberg BUG_ON(!nvmeq); 270f4800d6dSChristoph Hellwig iod->nvmeq = nvmeq; 27157dacad5SJay Sternberg return 0; 27257dacad5SJay Sternberg } 27357dacad5SJay Sternberg 274dca51e78SChristoph Hellwig static int nvme_pci_map_queues(struct blk_mq_tag_set *set) 275dca51e78SChristoph Hellwig { 276dca51e78SChristoph Hellwig struct nvme_dev *dev = set->driver_data; 277dca51e78SChristoph Hellwig 278dca51e78SChristoph Hellwig return blk_mq_pci_map_queues(set, to_pci_dev(dev->dev)); 279dca51e78SChristoph Hellwig } 280dca51e78SChristoph Hellwig 28157dacad5SJay Sternberg /** 282adf68f21SChristoph Hellwig * __nvme_submit_cmd() - Copy a command into a queue and ring the doorbell 28357dacad5SJay Sternberg * @nvmeq: The queue to use 28457dacad5SJay Sternberg * @cmd: The command to send 28557dacad5SJay Sternberg * 28657dacad5SJay Sternberg * Safe to use from interrupt context 28757dacad5SJay Sternberg */ 28857dacad5SJay Sternberg static void __nvme_submit_cmd(struct nvme_queue *nvmeq, 28957dacad5SJay Sternberg struct nvme_command *cmd) 29057dacad5SJay Sternberg { 29157dacad5SJay Sternberg u16 tail = nvmeq->sq_tail; 29257dacad5SJay Sternberg 29357dacad5SJay Sternberg if (nvmeq->sq_cmds_io) 29457dacad5SJay Sternberg memcpy_toio(&nvmeq->sq_cmds_io[tail], cmd, sizeof(*cmd)); 29557dacad5SJay Sternberg else 29657dacad5SJay Sternberg memcpy(&nvmeq->sq_cmds[tail], cmd, sizeof(*cmd)); 29757dacad5SJay Sternberg 29857dacad5SJay Sternberg if (++tail == nvmeq->q_depth) 29957dacad5SJay Sternberg tail = 0; 30057dacad5SJay Sternberg writel(tail, nvmeq->q_db); 30157dacad5SJay Sternberg nvmeq->sq_tail = tail; 30257dacad5SJay Sternberg } 30357dacad5SJay Sternberg 304f4800d6dSChristoph Hellwig static __le64 **iod_list(struct request *req) 30557dacad5SJay Sternberg { 306f4800d6dSChristoph Hellwig struct nvme_iod *iod = blk_mq_rq_to_pdu(req); 307f9d03f96SChristoph Hellwig return (__le64 **)(iod->sg + blk_rq_nr_phys_segments(req)); 30857dacad5SJay Sternberg } 30957dacad5SJay Sternberg 310b131c61dSChristoph Hellwig static int nvme_init_iod(struct request *rq, struct nvme_dev *dev) 31157dacad5SJay Sternberg { 312f4800d6dSChristoph Hellwig struct nvme_iod *iod = blk_mq_rq_to_pdu(rq); 313f9d03f96SChristoph Hellwig int nseg = blk_rq_nr_phys_segments(rq); 314b131c61dSChristoph Hellwig unsigned int size = blk_rq_payload_bytes(rq); 315f4800d6dSChristoph Hellwig 316f4800d6dSChristoph Hellwig if (nseg > NVME_INT_PAGES || size > NVME_INT_BYTES(dev)) { 317f4800d6dSChristoph Hellwig iod->sg = kmalloc(nvme_iod_alloc_size(dev, size, nseg), GFP_ATOMIC); 318f4800d6dSChristoph Hellwig if (!iod->sg) 319f4800d6dSChristoph Hellwig return BLK_MQ_RQ_QUEUE_BUSY; 320f4800d6dSChristoph Hellwig } else { 321f4800d6dSChristoph Hellwig iod->sg = iod->inline_sg; 32257dacad5SJay Sternberg } 32357dacad5SJay Sternberg 324f4800d6dSChristoph Hellwig iod->aborted = 0; 32557dacad5SJay Sternberg iod->npages = -1; 32657dacad5SJay Sternberg iod->nents = 0; 327f4800d6dSChristoph Hellwig iod->length = size; 328f80ec966SKeith Busch 329e8064021SChristoph Hellwig if (!(rq->rq_flags & RQF_DONTPREP)) { 330f80ec966SKeith Busch rq->retries = 0; 331e8064021SChristoph Hellwig rq->rq_flags |= RQF_DONTPREP; 332f80ec966SKeith Busch } 333bac0000aSOmar Sandoval return BLK_MQ_RQ_QUEUE_OK; 33457dacad5SJay Sternberg } 33557dacad5SJay Sternberg 336f4800d6dSChristoph Hellwig static void nvme_free_iod(struct nvme_dev *dev, struct request *req) 33757dacad5SJay Sternberg { 338f4800d6dSChristoph Hellwig struct nvme_iod *iod = blk_mq_rq_to_pdu(req); 3395fd4ce1bSChristoph Hellwig const int last_prp = dev->ctrl.page_size / 8 - 1; 34057dacad5SJay Sternberg int i; 341f4800d6dSChristoph Hellwig __le64 **list = iod_list(req); 34257dacad5SJay Sternberg dma_addr_t prp_dma = iod->first_dma; 34357dacad5SJay Sternberg 34457dacad5SJay Sternberg if (iod->npages == 0) 34557dacad5SJay Sternberg dma_pool_free(dev->prp_small_pool, list[0], prp_dma); 34657dacad5SJay Sternberg for (i = 0; i < iod->npages; i++) { 34757dacad5SJay Sternberg __le64 *prp_list = list[i]; 34857dacad5SJay Sternberg dma_addr_t next_prp_dma = le64_to_cpu(prp_list[last_prp]); 34957dacad5SJay Sternberg dma_pool_free(dev->prp_page_pool, prp_list, prp_dma); 35057dacad5SJay Sternberg prp_dma = next_prp_dma; 35157dacad5SJay Sternberg } 35257dacad5SJay Sternberg 353f4800d6dSChristoph Hellwig if (iod->sg != iod->inline_sg) 354f4800d6dSChristoph Hellwig kfree(iod->sg); 35557dacad5SJay Sternberg } 35657dacad5SJay Sternberg 35757dacad5SJay Sternberg #ifdef CONFIG_BLK_DEV_INTEGRITY 35857dacad5SJay Sternberg static void nvme_dif_prep(u32 p, u32 v, struct t10_pi_tuple *pi) 35957dacad5SJay Sternberg { 36057dacad5SJay Sternberg if (be32_to_cpu(pi->ref_tag) == v) 36157dacad5SJay Sternberg pi->ref_tag = cpu_to_be32(p); 36257dacad5SJay Sternberg } 36357dacad5SJay Sternberg 36457dacad5SJay Sternberg static void nvme_dif_complete(u32 p, u32 v, struct t10_pi_tuple *pi) 36557dacad5SJay Sternberg { 36657dacad5SJay Sternberg if (be32_to_cpu(pi->ref_tag) == p) 36757dacad5SJay Sternberg pi->ref_tag = cpu_to_be32(v); 36857dacad5SJay Sternberg } 36957dacad5SJay Sternberg 37057dacad5SJay Sternberg /** 37157dacad5SJay Sternberg * nvme_dif_remap - remaps ref tags to bip seed and physical lba 37257dacad5SJay Sternberg * 37357dacad5SJay Sternberg * The virtual start sector is the one that was originally submitted by the 37457dacad5SJay Sternberg * block layer. Due to partitioning, MD/DM cloning, etc. the actual physical 37557dacad5SJay Sternberg * start sector may be different. Remap protection information to match the 37657dacad5SJay Sternberg * physical LBA on writes, and back to the original seed on reads. 37757dacad5SJay Sternberg * 37857dacad5SJay Sternberg * Type 0 and 3 do not have a ref tag, so no remapping required. 37957dacad5SJay Sternberg */ 38057dacad5SJay Sternberg static void nvme_dif_remap(struct request *req, 38157dacad5SJay Sternberg void (*dif_swap)(u32 p, u32 v, struct t10_pi_tuple *pi)) 38257dacad5SJay Sternberg { 38357dacad5SJay Sternberg struct nvme_ns *ns = req->rq_disk->private_data; 38457dacad5SJay Sternberg struct bio_integrity_payload *bip; 38557dacad5SJay Sternberg struct t10_pi_tuple *pi; 38657dacad5SJay Sternberg void *p, *pmap; 38757dacad5SJay Sternberg u32 i, nlb, ts, phys, virt; 38857dacad5SJay Sternberg 38957dacad5SJay Sternberg if (!ns->pi_type || ns->pi_type == NVME_NS_DPS_PI_TYPE3) 39057dacad5SJay Sternberg return; 39157dacad5SJay Sternberg 39257dacad5SJay Sternberg bip = bio_integrity(req->bio); 39357dacad5SJay Sternberg if (!bip) 39457dacad5SJay Sternberg return; 39557dacad5SJay Sternberg 39657dacad5SJay Sternberg pmap = kmap_atomic(bip->bip_vec->bv_page) + bip->bip_vec->bv_offset; 39757dacad5SJay Sternberg 39857dacad5SJay Sternberg p = pmap; 39957dacad5SJay Sternberg virt = bip_get_seed(bip); 40057dacad5SJay Sternberg phys = nvme_block_nr(ns, blk_rq_pos(req)); 40157dacad5SJay Sternberg nlb = (blk_rq_bytes(req) >> ns->lba_shift); 402ac6fc48cSDan Williams ts = ns->disk->queue->integrity.tuple_size; 40357dacad5SJay Sternberg 40457dacad5SJay Sternberg for (i = 0; i < nlb; i++, virt++, phys++) { 40557dacad5SJay Sternberg pi = (struct t10_pi_tuple *)p; 40657dacad5SJay Sternberg dif_swap(phys, virt, pi); 40757dacad5SJay Sternberg p += ts; 40857dacad5SJay Sternberg } 40957dacad5SJay Sternberg kunmap_atomic(pmap); 41057dacad5SJay Sternberg } 41157dacad5SJay Sternberg #else /* CONFIG_BLK_DEV_INTEGRITY */ 41257dacad5SJay Sternberg static void nvme_dif_remap(struct request *req, 41357dacad5SJay Sternberg void (*dif_swap)(u32 p, u32 v, struct t10_pi_tuple *pi)) 41457dacad5SJay Sternberg { 41557dacad5SJay Sternberg } 41657dacad5SJay Sternberg static void nvme_dif_prep(u32 p, u32 v, struct t10_pi_tuple *pi) 41757dacad5SJay Sternberg { 41857dacad5SJay Sternberg } 41957dacad5SJay Sternberg static void nvme_dif_complete(u32 p, u32 v, struct t10_pi_tuple *pi) 42057dacad5SJay Sternberg { 42157dacad5SJay Sternberg } 42257dacad5SJay Sternberg #endif 42357dacad5SJay Sternberg 424b131c61dSChristoph Hellwig static bool nvme_setup_prps(struct nvme_dev *dev, struct request *req) 42557dacad5SJay Sternberg { 426f4800d6dSChristoph Hellwig struct nvme_iod *iod = blk_mq_rq_to_pdu(req); 42757dacad5SJay Sternberg struct dma_pool *pool; 428b131c61dSChristoph Hellwig int length = blk_rq_payload_bytes(req); 42957dacad5SJay Sternberg struct scatterlist *sg = iod->sg; 43057dacad5SJay Sternberg int dma_len = sg_dma_len(sg); 43157dacad5SJay Sternberg u64 dma_addr = sg_dma_address(sg); 4325fd4ce1bSChristoph Hellwig u32 page_size = dev->ctrl.page_size; 43357dacad5SJay Sternberg int offset = dma_addr & (page_size - 1); 43457dacad5SJay Sternberg __le64 *prp_list; 435f4800d6dSChristoph Hellwig __le64 **list = iod_list(req); 43657dacad5SJay Sternberg dma_addr_t prp_dma; 43757dacad5SJay Sternberg int nprps, i; 43857dacad5SJay Sternberg 43957dacad5SJay Sternberg length -= (page_size - offset); 44057dacad5SJay Sternberg if (length <= 0) 44169d2b571SChristoph Hellwig return true; 44257dacad5SJay Sternberg 44357dacad5SJay Sternberg dma_len -= (page_size - offset); 44457dacad5SJay Sternberg if (dma_len) { 44557dacad5SJay Sternberg dma_addr += (page_size - offset); 44657dacad5SJay Sternberg } else { 44757dacad5SJay Sternberg sg = sg_next(sg); 44857dacad5SJay Sternberg dma_addr = sg_dma_address(sg); 44957dacad5SJay Sternberg dma_len = sg_dma_len(sg); 45057dacad5SJay Sternberg } 45157dacad5SJay Sternberg 45257dacad5SJay Sternberg if (length <= page_size) { 45357dacad5SJay Sternberg iod->first_dma = dma_addr; 45469d2b571SChristoph Hellwig return true; 45557dacad5SJay Sternberg } 45657dacad5SJay Sternberg 45757dacad5SJay Sternberg nprps = DIV_ROUND_UP(length, page_size); 45857dacad5SJay Sternberg if (nprps <= (256 / 8)) { 45957dacad5SJay Sternberg pool = dev->prp_small_pool; 46057dacad5SJay Sternberg iod->npages = 0; 46157dacad5SJay Sternberg } else { 46257dacad5SJay Sternberg pool = dev->prp_page_pool; 46357dacad5SJay Sternberg iod->npages = 1; 46457dacad5SJay Sternberg } 46557dacad5SJay Sternberg 46669d2b571SChristoph Hellwig prp_list = dma_pool_alloc(pool, GFP_ATOMIC, &prp_dma); 46757dacad5SJay Sternberg if (!prp_list) { 46857dacad5SJay Sternberg iod->first_dma = dma_addr; 46957dacad5SJay Sternberg iod->npages = -1; 47069d2b571SChristoph Hellwig return false; 47157dacad5SJay Sternberg } 47257dacad5SJay Sternberg list[0] = prp_list; 47357dacad5SJay Sternberg iod->first_dma = prp_dma; 47457dacad5SJay Sternberg i = 0; 47557dacad5SJay Sternberg for (;;) { 47657dacad5SJay Sternberg if (i == page_size >> 3) { 47757dacad5SJay Sternberg __le64 *old_prp_list = prp_list; 47869d2b571SChristoph Hellwig prp_list = dma_pool_alloc(pool, GFP_ATOMIC, &prp_dma); 47957dacad5SJay Sternberg if (!prp_list) 48069d2b571SChristoph Hellwig return false; 48157dacad5SJay Sternberg list[iod->npages++] = prp_list; 48257dacad5SJay Sternberg prp_list[0] = old_prp_list[i - 1]; 48357dacad5SJay Sternberg old_prp_list[i - 1] = cpu_to_le64(prp_dma); 48457dacad5SJay Sternberg i = 1; 48557dacad5SJay Sternberg } 48657dacad5SJay Sternberg prp_list[i++] = cpu_to_le64(dma_addr); 48757dacad5SJay Sternberg dma_len -= page_size; 48857dacad5SJay Sternberg dma_addr += page_size; 48957dacad5SJay Sternberg length -= page_size; 49057dacad5SJay Sternberg if (length <= 0) 49157dacad5SJay Sternberg break; 49257dacad5SJay Sternberg if (dma_len > 0) 49357dacad5SJay Sternberg continue; 49457dacad5SJay Sternberg BUG_ON(dma_len < 0); 49557dacad5SJay Sternberg sg = sg_next(sg); 49657dacad5SJay Sternberg dma_addr = sg_dma_address(sg); 49757dacad5SJay Sternberg dma_len = sg_dma_len(sg); 49857dacad5SJay Sternberg } 49957dacad5SJay Sternberg 50069d2b571SChristoph Hellwig return true; 50157dacad5SJay Sternberg } 50257dacad5SJay Sternberg 503f4800d6dSChristoph Hellwig static int nvme_map_data(struct nvme_dev *dev, struct request *req, 504b131c61dSChristoph Hellwig struct nvme_command *cmnd) 50557dacad5SJay Sternberg { 506f4800d6dSChristoph Hellwig struct nvme_iod *iod = blk_mq_rq_to_pdu(req); 507ba1ca37eSChristoph Hellwig struct request_queue *q = req->q; 508ba1ca37eSChristoph Hellwig enum dma_data_direction dma_dir = rq_data_dir(req) ? 509ba1ca37eSChristoph Hellwig DMA_TO_DEVICE : DMA_FROM_DEVICE; 510ba1ca37eSChristoph Hellwig int ret = BLK_MQ_RQ_QUEUE_ERROR; 51157dacad5SJay Sternberg 512f9d03f96SChristoph Hellwig sg_init_table(iod->sg, blk_rq_nr_phys_segments(req)); 513ba1ca37eSChristoph Hellwig iod->nents = blk_rq_map_sg(q, req, iod->sg); 514ba1ca37eSChristoph Hellwig if (!iod->nents) 515ba1ca37eSChristoph Hellwig goto out; 516ba1ca37eSChristoph Hellwig 517ba1ca37eSChristoph Hellwig ret = BLK_MQ_RQ_QUEUE_BUSY; 5182b6b535dSMauricio Faria de Oliveira if (!dma_map_sg_attrs(dev->dev, iod->sg, iod->nents, dma_dir, 5192b6b535dSMauricio Faria de Oliveira DMA_ATTR_NO_WARN)) 520ba1ca37eSChristoph Hellwig goto out; 521ba1ca37eSChristoph Hellwig 522b131c61dSChristoph Hellwig if (!nvme_setup_prps(dev, req)) 523ba1ca37eSChristoph Hellwig goto out_unmap; 524ba1ca37eSChristoph Hellwig 525ba1ca37eSChristoph Hellwig ret = BLK_MQ_RQ_QUEUE_ERROR; 526ba1ca37eSChristoph Hellwig if (blk_integrity_rq(req)) { 527ba1ca37eSChristoph Hellwig if (blk_rq_count_integrity_sg(q, req->bio) != 1) 528ba1ca37eSChristoph Hellwig goto out_unmap; 529ba1ca37eSChristoph Hellwig 530bf684057SChristoph Hellwig sg_init_table(&iod->meta_sg, 1); 531bf684057SChristoph Hellwig if (blk_rq_map_integrity_sg(q, req->bio, &iod->meta_sg) != 1) 532ba1ca37eSChristoph Hellwig goto out_unmap; 533ba1ca37eSChristoph Hellwig 534ba1ca37eSChristoph Hellwig if (rq_data_dir(req)) 535ba1ca37eSChristoph Hellwig nvme_dif_remap(req, nvme_dif_prep); 536ba1ca37eSChristoph Hellwig 537bf684057SChristoph Hellwig if (!dma_map_sg(dev->dev, &iod->meta_sg, 1, dma_dir)) 538ba1ca37eSChristoph Hellwig goto out_unmap; 53957dacad5SJay Sternberg } 54057dacad5SJay Sternberg 541eb793e2cSChristoph Hellwig cmnd->rw.dptr.prp1 = cpu_to_le64(sg_dma_address(iod->sg)); 542eb793e2cSChristoph Hellwig cmnd->rw.dptr.prp2 = cpu_to_le64(iod->first_dma); 543ba1ca37eSChristoph Hellwig if (blk_integrity_rq(req)) 544bf684057SChristoph Hellwig cmnd->rw.metadata = cpu_to_le64(sg_dma_address(&iod->meta_sg)); 545ba1ca37eSChristoph Hellwig return BLK_MQ_RQ_QUEUE_OK; 546ba1ca37eSChristoph Hellwig 547ba1ca37eSChristoph Hellwig out_unmap: 548ba1ca37eSChristoph Hellwig dma_unmap_sg(dev->dev, iod->sg, iod->nents, dma_dir); 549ba1ca37eSChristoph Hellwig out: 550ba1ca37eSChristoph Hellwig return ret; 55157dacad5SJay Sternberg } 55257dacad5SJay Sternberg 553f4800d6dSChristoph Hellwig static void nvme_unmap_data(struct nvme_dev *dev, struct request *req) 554d4f6c3abSChristoph Hellwig { 555f4800d6dSChristoph Hellwig struct nvme_iod *iod = blk_mq_rq_to_pdu(req); 556d4f6c3abSChristoph Hellwig enum dma_data_direction dma_dir = rq_data_dir(req) ? 557d4f6c3abSChristoph Hellwig DMA_TO_DEVICE : DMA_FROM_DEVICE; 558d4f6c3abSChristoph Hellwig 559d4f6c3abSChristoph Hellwig if (iod->nents) { 560d4f6c3abSChristoph Hellwig dma_unmap_sg(dev->dev, iod->sg, iod->nents, dma_dir); 561d4f6c3abSChristoph Hellwig if (blk_integrity_rq(req)) { 562d4f6c3abSChristoph Hellwig if (!rq_data_dir(req)) 563d4f6c3abSChristoph Hellwig nvme_dif_remap(req, nvme_dif_complete); 564bf684057SChristoph Hellwig dma_unmap_sg(dev->dev, &iod->meta_sg, 1, dma_dir); 565d4f6c3abSChristoph Hellwig } 566d4f6c3abSChristoph Hellwig } 567d4f6c3abSChristoph Hellwig 568f9d03f96SChristoph Hellwig nvme_cleanup_cmd(req); 569f4800d6dSChristoph Hellwig nvme_free_iod(dev, req); 57057dacad5SJay Sternberg } 57157dacad5SJay Sternberg 57257dacad5SJay Sternberg /* 57357dacad5SJay Sternberg * NOTE: ns is NULL when called on the admin queue. 57457dacad5SJay Sternberg */ 57557dacad5SJay Sternberg static int nvme_queue_rq(struct blk_mq_hw_ctx *hctx, 57657dacad5SJay Sternberg const struct blk_mq_queue_data *bd) 57757dacad5SJay Sternberg { 57857dacad5SJay Sternberg struct nvme_ns *ns = hctx->queue->queuedata; 57957dacad5SJay Sternberg struct nvme_queue *nvmeq = hctx->driver_data; 58057dacad5SJay Sternberg struct nvme_dev *dev = nvmeq->dev; 58157dacad5SJay Sternberg struct request *req = bd->rq; 582ba1ca37eSChristoph Hellwig struct nvme_command cmnd; 583ba1ca37eSChristoph Hellwig int ret = BLK_MQ_RQ_QUEUE_OK; 58457dacad5SJay Sternberg 58557dacad5SJay Sternberg /* 58657dacad5SJay Sternberg * If formated with metadata, require the block layer provide a buffer 58757dacad5SJay Sternberg * unless this namespace is formated such that the metadata can be 58857dacad5SJay Sternberg * stripped/generated by the controller with PRACT=1. 58957dacad5SJay Sternberg */ 59057dacad5SJay Sternberg if (ns && ns->ms && !blk_integrity_rq(req)) { 59157dacad5SJay Sternberg if (!(ns->pi_type && ns->ms == 8) && 59257292b58SChristoph Hellwig !blk_rq_is_passthrough(req)) { 593eee417b0SChristoph Hellwig blk_mq_end_request(req, -EFAULT); 59457dacad5SJay Sternberg return BLK_MQ_RQ_QUEUE_OK; 59557dacad5SJay Sternberg } 59657dacad5SJay Sternberg } 59757dacad5SJay Sternberg 598f9d03f96SChristoph Hellwig ret = nvme_setup_cmd(ns, req, &cmnd); 599bac0000aSOmar Sandoval if (ret != BLK_MQ_RQ_QUEUE_OK) 600f4800d6dSChristoph Hellwig return ret; 60157dacad5SJay Sternberg 602b131c61dSChristoph Hellwig ret = nvme_init_iod(req, dev); 603bac0000aSOmar Sandoval if (ret != BLK_MQ_RQ_QUEUE_OK) 604f9d03f96SChristoph Hellwig goto out_free_cmd; 60557dacad5SJay Sternberg 606f9d03f96SChristoph Hellwig if (blk_rq_nr_phys_segments(req)) 607b131c61dSChristoph Hellwig ret = nvme_map_data(dev, req, &cmnd); 608ba1ca37eSChristoph Hellwig 609bac0000aSOmar Sandoval if (ret != BLK_MQ_RQ_QUEUE_OK) 610f9d03f96SChristoph Hellwig goto out_cleanup_iod; 611ba1ca37eSChristoph Hellwig 612aae239e1SChristoph Hellwig blk_mq_start_request(req); 613ba1ca37eSChristoph Hellwig 614ba1ca37eSChristoph Hellwig spin_lock_irq(&nvmeq->q_lock); 615ae1fba20SKeith Busch if (unlikely(nvmeq->cq_vector < 0)) { 61669d9a99cSKeith Busch ret = BLK_MQ_RQ_QUEUE_ERROR; 617ae1fba20SKeith Busch spin_unlock_irq(&nvmeq->q_lock); 618f9d03f96SChristoph Hellwig goto out_cleanup_iod; 619ae1fba20SKeith Busch } 620ba1ca37eSChristoph Hellwig __nvme_submit_cmd(nvmeq, &cmnd); 62157dacad5SJay Sternberg nvme_process_cq(nvmeq); 62257dacad5SJay Sternberg spin_unlock_irq(&nvmeq->q_lock); 62357dacad5SJay Sternberg return BLK_MQ_RQ_QUEUE_OK; 624f9d03f96SChristoph Hellwig out_cleanup_iod: 625f4800d6dSChristoph Hellwig nvme_free_iod(dev, req); 626f9d03f96SChristoph Hellwig out_free_cmd: 627f9d03f96SChristoph Hellwig nvme_cleanup_cmd(req); 628ba1ca37eSChristoph Hellwig return ret; 62957dacad5SJay Sternberg } 63057dacad5SJay Sternberg 631eee417b0SChristoph Hellwig static void nvme_complete_rq(struct request *req) 632eee417b0SChristoph Hellwig { 633f4800d6dSChristoph Hellwig struct nvme_iod *iod = blk_mq_rq_to_pdu(req); 634f4800d6dSChristoph Hellwig struct nvme_dev *dev = iod->nvmeq->dev; 635eee417b0SChristoph Hellwig int error = 0; 636eee417b0SChristoph Hellwig 637f4800d6dSChristoph Hellwig nvme_unmap_data(dev, req); 638eee417b0SChristoph Hellwig 639eee417b0SChristoph Hellwig if (unlikely(req->errors)) { 640eee417b0SChristoph Hellwig if (nvme_req_needs_retry(req, req->errors)) { 641f80ec966SKeith Busch req->retries++; 642eee417b0SChristoph Hellwig nvme_requeue_req(req); 643eee417b0SChristoph Hellwig return; 644eee417b0SChristoph Hellwig } 645eee417b0SChristoph Hellwig 64657292b58SChristoph Hellwig if (blk_rq_is_passthrough(req)) 647eee417b0SChristoph Hellwig error = req->errors; 648eee417b0SChristoph Hellwig else 649eee417b0SChristoph Hellwig error = nvme_error_status(req->errors); 650eee417b0SChristoph Hellwig } 651eee417b0SChristoph Hellwig 652f4800d6dSChristoph Hellwig if (unlikely(iod->aborted)) { 6531b3c47c1SSagi Grimberg dev_warn(dev->ctrl.device, 654eee417b0SChristoph Hellwig "completing aborted command with status: %04x\n", 655eee417b0SChristoph Hellwig req->errors); 656eee417b0SChristoph Hellwig } 657eee417b0SChristoph Hellwig 658eee417b0SChristoph Hellwig blk_mq_end_request(req, error); 65957dacad5SJay Sternberg } 66057dacad5SJay Sternberg 661d783e0bdSMarta Rybczynska /* We read the CQE phase first to check if the rest of the entry is valid */ 662d783e0bdSMarta Rybczynska static inline bool nvme_cqe_valid(struct nvme_queue *nvmeq, u16 head, 663d783e0bdSMarta Rybczynska u16 phase) 664d783e0bdSMarta Rybczynska { 665d783e0bdSMarta Rybczynska return (le16_to_cpu(nvmeq->cqes[head].status) & 1) == phase; 666d783e0bdSMarta Rybczynska } 667d783e0bdSMarta Rybczynska 668a0fa9647SJens Axboe static void __nvme_process_cq(struct nvme_queue *nvmeq, unsigned int *tag) 66957dacad5SJay Sternberg { 67057dacad5SJay Sternberg u16 head, phase; 67157dacad5SJay Sternberg 67257dacad5SJay Sternberg head = nvmeq->cq_head; 67357dacad5SJay Sternberg phase = nvmeq->cq_phase; 67457dacad5SJay Sternberg 675d783e0bdSMarta Rybczynska while (nvme_cqe_valid(nvmeq, head, phase)) { 67657dacad5SJay Sternberg struct nvme_completion cqe = nvmeq->cqes[head]; 677eee417b0SChristoph Hellwig struct request *req; 678adf68f21SChristoph Hellwig 67957dacad5SJay Sternberg if (++head == nvmeq->q_depth) { 68057dacad5SJay Sternberg head = 0; 68157dacad5SJay Sternberg phase = !phase; 68257dacad5SJay Sternberg } 683adf68f21SChristoph Hellwig 684a0fa9647SJens Axboe if (tag && *tag == cqe.command_id) 685a0fa9647SJens Axboe *tag = -1; 686adf68f21SChristoph Hellwig 687aae239e1SChristoph Hellwig if (unlikely(cqe.command_id >= nvmeq->q_depth)) { 6881b3c47c1SSagi Grimberg dev_warn(nvmeq->dev->ctrl.device, 689aae239e1SChristoph Hellwig "invalid id %d completed on queue %d\n", 690aae239e1SChristoph Hellwig cqe.command_id, le16_to_cpu(cqe.sq_id)); 691aae239e1SChristoph Hellwig continue; 692aae239e1SChristoph Hellwig } 693aae239e1SChristoph Hellwig 694adf68f21SChristoph Hellwig /* 695adf68f21SChristoph Hellwig * AEN requests are special as they don't time out and can 696adf68f21SChristoph Hellwig * survive any kind of queue freeze and often don't respond to 697adf68f21SChristoph Hellwig * aborts. We don't even bother to allocate a struct request 698adf68f21SChristoph Hellwig * for them but rather special case them here. 699adf68f21SChristoph Hellwig */ 700adf68f21SChristoph Hellwig if (unlikely(nvmeq->qid == 0 && 701adf68f21SChristoph Hellwig cqe.command_id >= NVME_AQ_BLKMQ_DEPTH)) { 7027bf58533SChristoph Hellwig nvme_complete_async_event(&nvmeq->dev->ctrl, 7037bf58533SChristoph Hellwig cqe.status, &cqe.result); 704adf68f21SChristoph Hellwig continue; 705adf68f21SChristoph Hellwig } 706adf68f21SChristoph Hellwig 707eee417b0SChristoph Hellwig req = blk_mq_tag_to_rq(*nvmeq->tags, cqe.command_id); 708d49187e9SChristoph Hellwig nvme_req(req)->result = cqe.result; 709d783e0bdSMarta Rybczynska blk_mq_complete_request(req, le16_to_cpu(cqe.status) >> 1); 71057dacad5SJay Sternberg } 71157dacad5SJay Sternberg 71257dacad5SJay Sternberg if (head == nvmeq->cq_head && phase == nvmeq->cq_phase) 713a0fa9647SJens Axboe return; 71457dacad5SJay Sternberg 715604e8c8dSKeith Busch if (likely(nvmeq->cq_vector >= 0)) 71657dacad5SJay Sternberg writel(head, nvmeq->q_db + nvmeq->dev->db_stride); 71757dacad5SJay Sternberg nvmeq->cq_head = head; 71857dacad5SJay Sternberg nvmeq->cq_phase = phase; 71957dacad5SJay Sternberg 72057dacad5SJay Sternberg nvmeq->cqe_seen = 1; 721a0fa9647SJens Axboe } 722a0fa9647SJens Axboe 723a0fa9647SJens Axboe static void nvme_process_cq(struct nvme_queue *nvmeq) 724a0fa9647SJens Axboe { 725a0fa9647SJens Axboe __nvme_process_cq(nvmeq, NULL); 72657dacad5SJay Sternberg } 72757dacad5SJay Sternberg 72857dacad5SJay Sternberg static irqreturn_t nvme_irq(int irq, void *data) 72957dacad5SJay Sternberg { 73057dacad5SJay Sternberg irqreturn_t result; 73157dacad5SJay Sternberg struct nvme_queue *nvmeq = data; 73257dacad5SJay Sternberg spin_lock(&nvmeq->q_lock); 73357dacad5SJay Sternberg nvme_process_cq(nvmeq); 73457dacad5SJay Sternberg result = nvmeq->cqe_seen ? IRQ_HANDLED : IRQ_NONE; 73557dacad5SJay Sternberg nvmeq->cqe_seen = 0; 73657dacad5SJay Sternberg spin_unlock(&nvmeq->q_lock); 73757dacad5SJay Sternberg return result; 73857dacad5SJay Sternberg } 73957dacad5SJay Sternberg 74057dacad5SJay Sternberg static irqreturn_t nvme_irq_check(int irq, void *data) 74157dacad5SJay Sternberg { 74257dacad5SJay Sternberg struct nvme_queue *nvmeq = data; 743d783e0bdSMarta Rybczynska if (nvme_cqe_valid(nvmeq, nvmeq->cq_head, nvmeq->cq_phase)) 74457dacad5SJay Sternberg return IRQ_WAKE_THREAD; 745d783e0bdSMarta Rybczynska return IRQ_NONE; 74657dacad5SJay Sternberg } 74757dacad5SJay Sternberg 748a0fa9647SJens Axboe static int nvme_poll(struct blk_mq_hw_ctx *hctx, unsigned int tag) 749a0fa9647SJens Axboe { 750a0fa9647SJens Axboe struct nvme_queue *nvmeq = hctx->driver_data; 751a0fa9647SJens Axboe 752d783e0bdSMarta Rybczynska if (nvme_cqe_valid(nvmeq, nvmeq->cq_head, nvmeq->cq_phase)) { 753a0fa9647SJens Axboe spin_lock_irq(&nvmeq->q_lock); 754a0fa9647SJens Axboe __nvme_process_cq(nvmeq, &tag); 755a0fa9647SJens Axboe spin_unlock_irq(&nvmeq->q_lock); 756a0fa9647SJens Axboe 757a0fa9647SJens Axboe if (tag == -1) 758a0fa9647SJens Axboe return 1; 759a0fa9647SJens Axboe } 760a0fa9647SJens Axboe 761a0fa9647SJens Axboe return 0; 762a0fa9647SJens Axboe } 763a0fa9647SJens Axboe 764f866fc42SChristoph Hellwig static void nvme_pci_submit_async_event(struct nvme_ctrl *ctrl, int aer_idx) 76557dacad5SJay Sternberg { 766f866fc42SChristoph Hellwig struct nvme_dev *dev = to_nvme_dev(ctrl); 7679396dec9SChristoph Hellwig struct nvme_queue *nvmeq = dev->queues[0]; 76857dacad5SJay Sternberg struct nvme_command c; 76957dacad5SJay Sternberg 77057dacad5SJay Sternberg memset(&c, 0, sizeof(c)); 77157dacad5SJay Sternberg c.common.opcode = nvme_admin_async_event; 772f866fc42SChristoph Hellwig c.common.command_id = NVME_AQ_BLKMQ_DEPTH + aer_idx; 77357dacad5SJay Sternberg 7749396dec9SChristoph Hellwig spin_lock_irq(&nvmeq->q_lock); 7759396dec9SChristoph Hellwig __nvme_submit_cmd(nvmeq, &c); 7769396dec9SChristoph Hellwig spin_unlock_irq(&nvmeq->q_lock); 77757dacad5SJay Sternberg } 77857dacad5SJay Sternberg 77957dacad5SJay Sternberg static int adapter_delete_queue(struct nvme_dev *dev, u8 opcode, u16 id) 78057dacad5SJay Sternberg { 78157dacad5SJay Sternberg struct nvme_command c; 78257dacad5SJay Sternberg 78357dacad5SJay Sternberg memset(&c, 0, sizeof(c)); 78457dacad5SJay Sternberg c.delete_queue.opcode = opcode; 78557dacad5SJay Sternberg c.delete_queue.qid = cpu_to_le16(id); 78657dacad5SJay Sternberg 7871c63dc66SChristoph Hellwig return nvme_submit_sync_cmd(dev->ctrl.admin_q, &c, NULL, 0); 78857dacad5SJay Sternberg } 78957dacad5SJay Sternberg 79057dacad5SJay Sternberg static int adapter_alloc_cq(struct nvme_dev *dev, u16 qid, 79157dacad5SJay Sternberg struct nvme_queue *nvmeq) 79257dacad5SJay Sternberg { 79357dacad5SJay Sternberg struct nvme_command c; 79457dacad5SJay Sternberg int flags = NVME_QUEUE_PHYS_CONTIG | NVME_CQ_IRQ_ENABLED; 79557dacad5SJay Sternberg 79657dacad5SJay Sternberg /* 79757dacad5SJay Sternberg * Note: we (ab)use the fact the the prp fields survive if no data 79857dacad5SJay Sternberg * is attached to the request. 79957dacad5SJay Sternberg */ 80057dacad5SJay Sternberg memset(&c, 0, sizeof(c)); 80157dacad5SJay Sternberg c.create_cq.opcode = nvme_admin_create_cq; 80257dacad5SJay Sternberg c.create_cq.prp1 = cpu_to_le64(nvmeq->cq_dma_addr); 80357dacad5SJay Sternberg c.create_cq.cqid = cpu_to_le16(qid); 80457dacad5SJay Sternberg c.create_cq.qsize = cpu_to_le16(nvmeq->q_depth - 1); 80557dacad5SJay Sternberg c.create_cq.cq_flags = cpu_to_le16(flags); 80657dacad5SJay Sternberg c.create_cq.irq_vector = cpu_to_le16(nvmeq->cq_vector); 80757dacad5SJay Sternberg 8081c63dc66SChristoph Hellwig return nvme_submit_sync_cmd(dev->ctrl.admin_q, &c, NULL, 0); 80957dacad5SJay Sternberg } 81057dacad5SJay Sternberg 81157dacad5SJay Sternberg static int adapter_alloc_sq(struct nvme_dev *dev, u16 qid, 81257dacad5SJay Sternberg struct nvme_queue *nvmeq) 81357dacad5SJay Sternberg { 81457dacad5SJay Sternberg struct nvme_command c; 81557dacad5SJay Sternberg int flags = NVME_QUEUE_PHYS_CONTIG | NVME_SQ_PRIO_MEDIUM; 81657dacad5SJay Sternberg 81757dacad5SJay Sternberg /* 81857dacad5SJay Sternberg * Note: we (ab)use the fact the the prp fields survive if no data 81957dacad5SJay Sternberg * is attached to the request. 82057dacad5SJay Sternberg */ 82157dacad5SJay Sternberg memset(&c, 0, sizeof(c)); 82257dacad5SJay Sternberg c.create_sq.opcode = nvme_admin_create_sq; 82357dacad5SJay Sternberg c.create_sq.prp1 = cpu_to_le64(nvmeq->sq_dma_addr); 82457dacad5SJay Sternberg c.create_sq.sqid = cpu_to_le16(qid); 82557dacad5SJay Sternberg c.create_sq.qsize = cpu_to_le16(nvmeq->q_depth - 1); 82657dacad5SJay Sternberg c.create_sq.sq_flags = cpu_to_le16(flags); 82757dacad5SJay Sternberg c.create_sq.cqid = cpu_to_le16(qid); 82857dacad5SJay Sternberg 8291c63dc66SChristoph Hellwig return nvme_submit_sync_cmd(dev->ctrl.admin_q, &c, NULL, 0); 83057dacad5SJay Sternberg } 83157dacad5SJay Sternberg 83257dacad5SJay Sternberg static int adapter_delete_cq(struct nvme_dev *dev, u16 cqid) 83357dacad5SJay Sternberg { 83457dacad5SJay Sternberg return adapter_delete_queue(dev, nvme_admin_delete_cq, cqid); 83557dacad5SJay Sternberg } 83657dacad5SJay Sternberg 83757dacad5SJay Sternberg static int adapter_delete_sq(struct nvme_dev *dev, u16 sqid) 83857dacad5SJay Sternberg { 83957dacad5SJay Sternberg return adapter_delete_queue(dev, nvme_admin_delete_sq, sqid); 84057dacad5SJay Sternberg } 84157dacad5SJay Sternberg 842e7a2a87dSChristoph Hellwig static void abort_endio(struct request *req, int error) 84357dacad5SJay Sternberg { 844f4800d6dSChristoph Hellwig struct nvme_iod *iod = blk_mq_rq_to_pdu(req); 845f4800d6dSChristoph Hellwig struct nvme_queue *nvmeq = iod->nvmeq; 846e7a2a87dSChristoph Hellwig u16 status = req->errors; 84757dacad5SJay Sternberg 8481cb3cce5SChristoph Hellwig dev_warn(nvmeq->dev->ctrl.device, "Abort status: 0x%x", status); 849e7a2a87dSChristoph Hellwig atomic_inc(&nvmeq->dev->ctrl.abort_limit); 850e7a2a87dSChristoph Hellwig blk_mq_free_request(req); 85157dacad5SJay Sternberg } 85257dacad5SJay Sternberg 85331c7c7d2SChristoph Hellwig static enum blk_eh_timer_return nvme_timeout(struct request *req, bool reserved) 85457dacad5SJay Sternberg { 855f4800d6dSChristoph Hellwig struct nvme_iod *iod = blk_mq_rq_to_pdu(req); 856f4800d6dSChristoph Hellwig struct nvme_queue *nvmeq = iod->nvmeq; 85757dacad5SJay Sternberg struct nvme_dev *dev = nvmeq->dev; 85857dacad5SJay Sternberg struct request *abort_req; 85957dacad5SJay Sternberg struct nvme_command cmd; 86057dacad5SJay Sternberg 86131c7c7d2SChristoph Hellwig /* 862fd634f41SChristoph Hellwig * Shutdown immediately if controller times out while starting. The 863fd634f41SChristoph Hellwig * reset work will see the pci device disabled when it gets the forced 864fd634f41SChristoph Hellwig * cancellation error. All outstanding requests are completed on 865fd634f41SChristoph Hellwig * shutdown, so we return BLK_EH_HANDLED. 866fd634f41SChristoph Hellwig */ 867bb8d261eSChristoph Hellwig if (dev->ctrl.state == NVME_CTRL_RESETTING) { 8681b3c47c1SSagi Grimberg dev_warn(dev->ctrl.device, 869fd634f41SChristoph Hellwig "I/O %d QID %d timeout, disable controller\n", 870fd634f41SChristoph Hellwig req->tag, nvmeq->qid); 871a5cdb68cSKeith Busch nvme_dev_disable(dev, false); 872fd634f41SChristoph Hellwig req->errors = NVME_SC_CANCELLED; 873fd634f41SChristoph Hellwig return BLK_EH_HANDLED; 874fd634f41SChristoph Hellwig } 875fd634f41SChristoph Hellwig 876fd634f41SChristoph Hellwig /* 877e1569a16SKeith Busch * Shutdown the controller immediately and schedule a reset if the 878e1569a16SKeith Busch * command was already aborted once before and still hasn't been 879e1569a16SKeith Busch * returned to the driver, or if this is the admin queue. 88031c7c7d2SChristoph Hellwig */ 881f4800d6dSChristoph Hellwig if (!nvmeq->qid || iod->aborted) { 8821b3c47c1SSagi Grimberg dev_warn(dev->ctrl.device, 88357dacad5SJay Sternberg "I/O %d QID %d timeout, reset controller\n", 88457dacad5SJay Sternberg req->tag, nvmeq->qid); 885a5cdb68cSKeith Busch nvme_dev_disable(dev, false); 886c5f6ce97SKeith Busch nvme_reset(dev); 887e1569a16SKeith Busch 888e1569a16SKeith Busch /* 889e1569a16SKeith Busch * Mark the request as handled, since the inline shutdown 890e1569a16SKeith Busch * forces all outstanding requests to complete. 891e1569a16SKeith Busch */ 892e1569a16SKeith Busch req->errors = NVME_SC_CANCELLED; 893e1569a16SKeith Busch return BLK_EH_HANDLED; 89457dacad5SJay Sternberg } 89557dacad5SJay Sternberg 896e7a2a87dSChristoph Hellwig if (atomic_dec_return(&dev->ctrl.abort_limit) < 0) { 897e7a2a87dSChristoph Hellwig atomic_inc(&dev->ctrl.abort_limit); 898e7a2a87dSChristoph Hellwig return BLK_EH_RESET_TIMER; 899e7a2a87dSChristoph Hellwig } 9007bf7d778SKeith Busch iod->aborted = 1; 90157dacad5SJay Sternberg 90257dacad5SJay Sternberg memset(&cmd, 0, sizeof(cmd)); 90357dacad5SJay Sternberg cmd.abort.opcode = nvme_admin_abort_cmd; 90457dacad5SJay Sternberg cmd.abort.cid = req->tag; 90557dacad5SJay Sternberg cmd.abort.sqid = cpu_to_le16(nvmeq->qid); 90657dacad5SJay Sternberg 9071b3c47c1SSagi Grimberg dev_warn(nvmeq->dev->ctrl.device, 9081b3c47c1SSagi Grimberg "I/O %d QID %d timeout, aborting\n", 90957dacad5SJay Sternberg req->tag, nvmeq->qid); 910e7a2a87dSChristoph Hellwig 911e7a2a87dSChristoph Hellwig abort_req = nvme_alloc_request(dev->ctrl.admin_q, &cmd, 912eb71f435SChristoph Hellwig BLK_MQ_REQ_NOWAIT, NVME_QID_ANY); 9136bf25d16SChristoph Hellwig if (IS_ERR(abort_req)) { 9146bf25d16SChristoph Hellwig atomic_inc(&dev->ctrl.abort_limit); 91531c7c7d2SChristoph Hellwig return BLK_EH_RESET_TIMER; 91657dacad5SJay Sternberg } 91757dacad5SJay Sternberg 918e7a2a87dSChristoph Hellwig abort_req->timeout = ADMIN_TIMEOUT; 919e7a2a87dSChristoph Hellwig abort_req->end_io_data = NULL; 920e7a2a87dSChristoph Hellwig blk_execute_rq_nowait(abort_req->q, NULL, abort_req, 0, abort_endio); 92157dacad5SJay Sternberg 92257dacad5SJay Sternberg /* 92357dacad5SJay Sternberg * The aborted req will be completed on receiving the abort req. 92457dacad5SJay Sternberg * We enable the timer again. If hit twice, it'll cause a device reset, 92557dacad5SJay Sternberg * as the device then is in a faulty state. 92657dacad5SJay Sternberg */ 92757dacad5SJay Sternberg return BLK_EH_RESET_TIMER; 92857dacad5SJay Sternberg } 92957dacad5SJay Sternberg 93057dacad5SJay Sternberg static void nvme_free_queue(struct nvme_queue *nvmeq) 93157dacad5SJay Sternberg { 93257dacad5SJay Sternberg dma_free_coherent(nvmeq->q_dmadev, CQ_SIZE(nvmeq->q_depth), 93357dacad5SJay Sternberg (void *)nvmeq->cqes, nvmeq->cq_dma_addr); 93457dacad5SJay Sternberg if (nvmeq->sq_cmds) 93557dacad5SJay Sternberg dma_free_coherent(nvmeq->q_dmadev, SQ_SIZE(nvmeq->q_depth), 93657dacad5SJay Sternberg nvmeq->sq_cmds, nvmeq->sq_dma_addr); 93757dacad5SJay Sternberg kfree(nvmeq); 93857dacad5SJay Sternberg } 93957dacad5SJay Sternberg 94057dacad5SJay Sternberg static void nvme_free_queues(struct nvme_dev *dev, int lowest) 94157dacad5SJay Sternberg { 94257dacad5SJay Sternberg int i; 94357dacad5SJay Sternberg 94457dacad5SJay Sternberg for (i = dev->queue_count - 1; i >= lowest; i--) { 94557dacad5SJay Sternberg struct nvme_queue *nvmeq = dev->queues[i]; 94657dacad5SJay Sternberg dev->queue_count--; 94757dacad5SJay Sternberg dev->queues[i] = NULL; 94857dacad5SJay Sternberg nvme_free_queue(nvmeq); 94957dacad5SJay Sternberg } 95057dacad5SJay Sternberg } 95157dacad5SJay Sternberg 95257dacad5SJay Sternberg /** 95357dacad5SJay Sternberg * nvme_suspend_queue - put queue into suspended state 95457dacad5SJay Sternberg * @nvmeq - queue to suspend 95557dacad5SJay Sternberg */ 95657dacad5SJay Sternberg static int nvme_suspend_queue(struct nvme_queue *nvmeq) 95757dacad5SJay Sternberg { 95857dacad5SJay Sternberg int vector; 95957dacad5SJay Sternberg 96057dacad5SJay Sternberg spin_lock_irq(&nvmeq->q_lock); 96157dacad5SJay Sternberg if (nvmeq->cq_vector == -1) { 96257dacad5SJay Sternberg spin_unlock_irq(&nvmeq->q_lock); 96357dacad5SJay Sternberg return 1; 96457dacad5SJay Sternberg } 965dca51e78SChristoph Hellwig vector = nvmeq_irq(nvmeq); 96657dacad5SJay Sternberg nvmeq->dev->online_queues--; 96757dacad5SJay Sternberg nvmeq->cq_vector = -1; 96857dacad5SJay Sternberg spin_unlock_irq(&nvmeq->q_lock); 96957dacad5SJay Sternberg 9701c63dc66SChristoph Hellwig if (!nvmeq->qid && nvmeq->dev->ctrl.admin_q) 97125646264SKeith Busch blk_mq_stop_hw_queues(nvmeq->dev->ctrl.admin_q); 97257dacad5SJay Sternberg 97357dacad5SJay Sternberg free_irq(vector, nvmeq); 97457dacad5SJay Sternberg 97557dacad5SJay Sternberg return 0; 97657dacad5SJay Sternberg } 97757dacad5SJay Sternberg 978a5cdb68cSKeith Busch static void nvme_disable_admin_queue(struct nvme_dev *dev, bool shutdown) 97957dacad5SJay Sternberg { 980a5cdb68cSKeith Busch struct nvme_queue *nvmeq = dev->queues[0]; 98157dacad5SJay Sternberg 98257dacad5SJay Sternberg if (!nvmeq) 98357dacad5SJay Sternberg return; 98457dacad5SJay Sternberg if (nvme_suspend_queue(nvmeq)) 98557dacad5SJay Sternberg return; 98657dacad5SJay Sternberg 987a5cdb68cSKeith Busch if (shutdown) 988a5cdb68cSKeith Busch nvme_shutdown_ctrl(&dev->ctrl); 989a5cdb68cSKeith Busch else 990a5cdb68cSKeith Busch nvme_disable_ctrl(&dev->ctrl, lo_hi_readq( 991a5cdb68cSKeith Busch dev->bar + NVME_REG_CAP)); 99257dacad5SJay Sternberg 99357dacad5SJay Sternberg spin_lock_irq(&nvmeq->q_lock); 99457dacad5SJay Sternberg nvme_process_cq(nvmeq); 99557dacad5SJay Sternberg spin_unlock_irq(&nvmeq->q_lock); 99657dacad5SJay Sternberg } 99757dacad5SJay Sternberg 99857dacad5SJay Sternberg static int nvme_cmb_qdepth(struct nvme_dev *dev, int nr_io_queues, 99957dacad5SJay Sternberg int entry_size) 100057dacad5SJay Sternberg { 100157dacad5SJay Sternberg int q_depth = dev->q_depth; 10025fd4ce1bSChristoph Hellwig unsigned q_size_aligned = roundup(q_depth * entry_size, 10035fd4ce1bSChristoph Hellwig dev->ctrl.page_size); 100457dacad5SJay Sternberg 100557dacad5SJay Sternberg if (q_size_aligned * nr_io_queues > dev->cmb_size) { 100657dacad5SJay Sternberg u64 mem_per_q = div_u64(dev->cmb_size, nr_io_queues); 10075fd4ce1bSChristoph Hellwig mem_per_q = round_down(mem_per_q, dev->ctrl.page_size); 100857dacad5SJay Sternberg q_depth = div_u64(mem_per_q, entry_size); 100957dacad5SJay Sternberg 101057dacad5SJay Sternberg /* 101157dacad5SJay Sternberg * Ensure the reduced q_depth is above some threshold where it 101257dacad5SJay Sternberg * would be better to map queues in system memory with the 101357dacad5SJay Sternberg * original depth 101457dacad5SJay Sternberg */ 101557dacad5SJay Sternberg if (q_depth < 64) 101657dacad5SJay Sternberg return -ENOMEM; 101757dacad5SJay Sternberg } 101857dacad5SJay Sternberg 101957dacad5SJay Sternberg return q_depth; 102057dacad5SJay Sternberg } 102157dacad5SJay Sternberg 102257dacad5SJay Sternberg static int nvme_alloc_sq_cmds(struct nvme_dev *dev, struct nvme_queue *nvmeq, 102357dacad5SJay Sternberg int qid, int depth) 102457dacad5SJay Sternberg { 102557dacad5SJay Sternberg if (qid && dev->cmb && use_cmb_sqes && NVME_CMB_SQS(dev->cmbsz)) { 10265fd4ce1bSChristoph Hellwig unsigned offset = (qid - 1) * roundup(SQ_SIZE(depth), 10275fd4ce1bSChristoph Hellwig dev->ctrl.page_size); 102857dacad5SJay Sternberg nvmeq->sq_dma_addr = dev->cmb_dma_addr + offset; 102957dacad5SJay Sternberg nvmeq->sq_cmds_io = dev->cmb + offset; 103057dacad5SJay Sternberg } else { 103157dacad5SJay Sternberg nvmeq->sq_cmds = dma_alloc_coherent(dev->dev, SQ_SIZE(depth), 103257dacad5SJay Sternberg &nvmeq->sq_dma_addr, GFP_KERNEL); 103357dacad5SJay Sternberg if (!nvmeq->sq_cmds) 103457dacad5SJay Sternberg return -ENOMEM; 103557dacad5SJay Sternberg } 103657dacad5SJay Sternberg 103757dacad5SJay Sternberg return 0; 103857dacad5SJay Sternberg } 103957dacad5SJay Sternberg 104057dacad5SJay Sternberg static struct nvme_queue *nvme_alloc_queue(struct nvme_dev *dev, int qid, 104157dacad5SJay Sternberg int depth) 104257dacad5SJay Sternberg { 104357dacad5SJay Sternberg struct nvme_queue *nvmeq = kzalloc(sizeof(*nvmeq), GFP_KERNEL); 104457dacad5SJay Sternberg if (!nvmeq) 104557dacad5SJay Sternberg return NULL; 104657dacad5SJay Sternberg 104757dacad5SJay Sternberg nvmeq->cqes = dma_zalloc_coherent(dev->dev, CQ_SIZE(depth), 104857dacad5SJay Sternberg &nvmeq->cq_dma_addr, GFP_KERNEL); 104957dacad5SJay Sternberg if (!nvmeq->cqes) 105057dacad5SJay Sternberg goto free_nvmeq; 105157dacad5SJay Sternberg 105257dacad5SJay Sternberg if (nvme_alloc_sq_cmds(dev, nvmeq, qid, depth)) 105357dacad5SJay Sternberg goto free_cqdma; 105457dacad5SJay Sternberg 105557dacad5SJay Sternberg nvmeq->q_dmadev = dev->dev; 105657dacad5SJay Sternberg nvmeq->dev = dev; 105757dacad5SJay Sternberg snprintf(nvmeq->irqname, sizeof(nvmeq->irqname), "nvme%dq%d", 10581c63dc66SChristoph Hellwig dev->ctrl.instance, qid); 105957dacad5SJay Sternberg spin_lock_init(&nvmeq->q_lock); 106057dacad5SJay Sternberg nvmeq->cq_head = 0; 106157dacad5SJay Sternberg nvmeq->cq_phase = 1; 106257dacad5SJay Sternberg nvmeq->q_db = &dev->dbs[qid * 2 * dev->db_stride]; 106357dacad5SJay Sternberg nvmeq->q_depth = depth; 106457dacad5SJay Sternberg nvmeq->qid = qid; 106557dacad5SJay Sternberg nvmeq->cq_vector = -1; 106657dacad5SJay Sternberg dev->queues[qid] = nvmeq; 106757dacad5SJay Sternberg dev->queue_count++; 106857dacad5SJay Sternberg 106957dacad5SJay Sternberg return nvmeq; 107057dacad5SJay Sternberg 107157dacad5SJay Sternberg free_cqdma: 107257dacad5SJay Sternberg dma_free_coherent(dev->dev, CQ_SIZE(depth), (void *)nvmeq->cqes, 107357dacad5SJay Sternberg nvmeq->cq_dma_addr); 107457dacad5SJay Sternberg free_nvmeq: 107557dacad5SJay Sternberg kfree(nvmeq); 107657dacad5SJay Sternberg return NULL; 107757dacad5SJay Sternberg } 107857dacad5SJay Sternberg 1079dca51e78SChristoph Hellwig static int queue_request_irq(struct nvme_queue *nvmeq) 108057dacad5SJay Sternberg { 108157dacad5SJay Sternberg if (use_threaded_interrupts) 1082dca51e78SChristoph Hellwig return request_threaded_irq(nvmeq_irq(nvmeq), nvme_irq_check, 1083dca51e78SChristoph Hellwig nvme_irq, IRQF_SHARED, nvmeq->irqname, nvmeq); 1084dca51e78SChristoph Hellwig else 1085dca51e78SChristoph Hellwig return request_irq(nvmeq_irq(nvmeq), nvme_irq, IRQF_SHARED, 1086dca51e78SChristoph Hellwig nvmeq->irqname, nvmeq); 108757dacad5SJay Sternberg } 108857dacad5SJay Sternberg 108957dacad5SJay Sternberg static void nvme_init_queue(struct nvme_queue *nvmeq, u16 qid) 109057dacad5SJay Sternberg { 109157dacad5SJay Sternberg struct nvme_dev *dev = nvmeq->dev; 109257dacad5SJay Sternberg 109357dacad5SJay Sternberg spin_lock_irq(&nvmeq->q_lock); 109457dacad5SJay Sternberg nvmeq->sq_tail = 0; 109557dacad5SJay Sternberg nvmeq->cq_head = 0; 109657dacad5SJay Sternberg nvmeq->cq_phase = 1; 109757dacad5SJay Sternberg nvmeq->q_db = &dev->dbs[qid * 2 * dev->db_stride]; 109857dacad5SJay Sternberg memset((void *)nvmeq->cqes, 0, CQ_SIZE(nvmeq->q_depth)); 109957dacad5SJay Sternberg dev->online_queues++; 110057dacad5SJay Sternberg spin_unlock_irq(&nvmeq->q_lock); 110157dacad5SJay Sternberg } 110257dacad5SJay Sternberg 110357dacad5SJay Sternberg static int nvme_create_queue(struct nvme_queue *nvmeq, int qid) 110457dacad5SJay Sternberg { 110557dacad5SJay Sternberg struct nvme_dev *dev = nvmeq->dev; 110657dacad5SJay Sternberg int result; 110757dacad5SJay Sternberg 110857dacad5SJay Sternberg nvmeq->cq_vector = qid - 1; 110957dacad5SJay Sternberg result = adapter_alloc_cq(dev, qid, nvmeq); 111057dacad5SJay Sternberg if (result < 0) 111157dacad5SJay Sternberg return result; 111257dacad5SJay Sternberg 111357dacad5SJay Sternberg result = adapter_alloc_sq(dev, qid, nvmeq); 111457dacad5SJay Sternberg if (result < 0) 111557dacad5SJay Sternberg goto release_cq; 111657dacad5SJay Sternberg 1117dca51e78SChristoph Hellwig result = queue_request_irq(nvmeq); 111857dacad5SJay Sternberg if (result < 0) 111957dacad5SJay Sternberg goto release_sq; 112057dacad5SJay Sternberg 112157dacad5SJay Sternberg nvme_init_queue(nvmeq, qid); 112257dacad5SJay Sternberg return result; 112357dacad5SJay Sternberg 112457dacad5SJay Sternberg release_sq: 112557dacad5SJay Sternberg adapter_delete_sq(dev, qid); 112657dacad5SJay Sternberg release_cq: 112757dacad5SJay Sternberg adapter_delete_cq(dev, qid); 112857dacad5SJay Sternberg return result; 112957dacad5SJay Sternberg } 113057dacad5SJay Sternberg 113157dacad5SJay Sternberg static struct blk_mq_ops nvme_mq_admin_ops = { 113257dacad5SJay Sternberg .queue_rq = nvme_queue_rq, 1133eee417b0SChristoph Hellwig .complete = nvme_complete_rq, 113457dacad5SJay Sternberg .init_hctx = nvme_admin_init_hctx, 113557dacad5SJay Sternberg .exit_hctx = nvme_admin_exit_hctx, 113657dacad5SJay Sternberg .init_request = nvme_admin_init_request, 113757dacad5SJay Sternberg .timeout = nvme_timeout, 113857dacad5SJay Sternberg }; 113957dacad5SJay Sternberg 114057dacad5SJay Sternberg static struct blk_mq_ops nvme_mq_ops = { 114157dacad5SJay Sternberg .queue_rq = nvme_queue_rq, 1142eee417b0SChristoph Hellwig .complete = nvme_complete_rq, 114357dacad5SJay Sternberg .init_hctx = nvme_init_hctx, 114457dacad5SJay Sternberg .init_request = nvme_init_request, 1145dca51e78SChristoph Hellwig .map_queues = nvme_pci_map_queues, 114657dacad5SJay Sternberg .timeout = nvme_timeout, 1147a0fa9647SJens Axboe .poll = nvme_poll, 114857dacad5SJay Sternberg }; 114957dacad5SJay Sternberg 115057dacad5SJay Sternberg static void nvme_dev_remove_admin(struct nvme_dev *dev) 115157dacad5SJay Sternberg { 11521c63dc66SChristoph Hellwig if (dev->ctrl.admin_q && !blk_queue_dying(dev->ctrl.admin_q)) { 115369d9a99cSKeith Busch /* 115469d9a99cSKeith Busch * If the controller was reset during removal, it's possible 115569d9a99cSKeith Busch * user requests may be waiting on a stopped queue. Start the 115669d9a99cSKeith Busch * queue to flush these to completion. 115769d9a99cSKeith Busch */ 115869d9a99cSKeith Busch blk_mq_start_stopped_hw_queues(dev->ctrl.admin_q, true); 11591c63dc66SChristoph Hellwig blk_cleanup_queue(dev->ctrl.admin_q); 116057dacad5SJay Sternberg blk_mq_free_tag_set(&dev->admin_tagset); 116157dacad5SJay Sternberg } 116257dacad5SJay Sternberg } 116357dacad5SJay Sternberg 116457dacad5SJay Sternberg static int nvme_alloc_admin_tags(struct nvme_dev *dev) 116557dacad5SJay Sternberg { 11661c63dc66SChristoph Hellwig if (!dev->ctrl.admin_q) { 116757dacad5SJay Sternberg dev->admin_tagset.ops = &nvme_mq_admin_ops; 116857dacad5SJay Sternberg dev->admin_tagset.nr_hw_queues = 1; 1169e3e9d50cSKeith Busch 1170e3e9d50cSKeith Busch /* 1171e3e9d50cSKeith Busch * Subtract one to leave an empty queue entry for 'Full Queue' 1172e3e9d50cSKeith Busch * condition. See NVM-Express 1.2 specification, section 4.1.2. 1173e3e9d50cSKeith Busch */ 1174e3e9d50cSKeith Busch dev->admin_tagset.queue_depth = NVME_AQ_BLKMQ_DEPTH - 1; 117557dacad5SJay Sternberg dev->admin_tagset.timeout = ADMIN_TIMEOUT; 117657dacad5SJay Sternberg dev->admin_tagset.numa_node = dev_to_node(dev->dev); 117757dacad5SJay Sternberg dev->admin_tagset.cmd_size = nvme_cmd_size(dev); 1178d3484991SJens Axboe dev->admin_tagset.flags = BLK_MQ_F_NO_SCHED; 117957dacad5SJay Sternberg dev->admin_tagset.driver_data = dev; 118057dacad5SJay Sternberg 118157dacad5SJay Sternberg if (blk_mq_alloc_tag_set(&dev->admin_tagset)) 118257dacad5SJay Sternberg return -ENOMEM; 118357dacad5SJay Sternberg 11841c63dc66SChristoph Hellwig dev->ctrl.admin_q = blk_mq_init_queue(&dev->admin_tagset); 11851c63dc66SChristoph Hellwig if (IS_ERR(dev->ctrl.admin_q)) { 118657dacad5SJay Sternberg blk_mq_free_tag_set(&dev->admin_tagset); 118757dacad5SJay Sternberg return -ENOMEM; 118857dacad5SJay Sternberg } 11891c63dc66SChristoph Hellwig if (!blk_get_queue(dev->ctrl.admin_q)) { 119057dacad5SJay Sternberg nvme_dev_remove_admin(dev); 11911c63dc66SChristoph Hellwig dev->ctrl.admin_q = NULL; 119257dacad5SJay Sternberg return -ENODEV; 119357dacad5SJay Sternberg } 119457dacad5SJay Sternberg } else 119525646264SKeith Busch blk_mq_start_stopped_hw_queues(dev->ctrl.admin_q, true); 119657dacad5SJay Sternberg 119757dacad5SJay Sternberg return 0; 119857dacad5SJay Sternberg } 119957dacad5SJay Sternberg 120057dacad5SJay Sternberg static int nvme_configure_admin_queue(struct nvme_dev *dev) 120157dacad5SJay Sternberg { 120257dacad5SJay Sternberg int result; 120357dacad5SJay Sternberg u32 aqa; 12047a67cbeaSChristoph Hellwig u64 cap = lo_hi_readq(dev->bar + NVME_REG_CAP); 120557dacad5SJay Sternberg struct nvme_queue *nvmeq; 120657dacad5SJay Sternberg 12078ef2074dSGabriel Krisman Bertazi dev->subsystem = readl(dev->bar + NVME_REG_VS) >= NVME_VS(1, 1, 0) ? 120857dacad5SJay Sternberg NVME_CAP_NSSRC(cap) : 0; 120957dacad5SJay Sternberg 12107a67cbeaSChristoph Hellwig if (dev->subsystem && 12117a67cbeaSChristoph Hellwig (readl(dev->bar + NVME_REG_CSTS) & NVME_CSTS_NSSRO)) 12127a67cbeaSChristoph Hellwig writel(NVME_CSTS_NSSRO, dev->bar + NVME_REG_CSTS); 121357dacad5SJay Sternberg 12145fd4ce1bSChristoph Hellwig result = nvme_disable_ctrl(&dev->ctrl, cap); 121557dacad5SJay Sternberg if (result < 0) 121657dacad5SJay Sternberg return result; 121757dacad5SJay Sternberg 121857dacad5SJay Sternberg nvmeq = dev->queues[0]; 121957dacad5SJay Sternberg if (!nvmeq) { 122057dacad5SJay Sternberg nvmeq = nvme_alloc_queue(dev, 0, NVME_AQ_DEPTH); 122157dacad5SJay Sternberg if (!nvmeq) 122257dacad5SJay Sternberg return -ENOMEM; 122357dacad5SJay Sternberg } 122457dacad5SJay Sternberg 122557dacad5SJay Sternberg aqa = nvmeq->q_depth - 1; 122657dacad5SJay Sternberg aqa |= aqa << 16; 122757dacad5SJay Sternberg 12287a67cbeaSChristoph Hellwig writel(aqa, dev->bar + NVME_REG_AQA); 12297a67cbeaSChristoph Hellwig lo_hi_writeq(nvmeq->sq_dma_addr, dev->bar + NVME_REG_ASQ); 12307a67cbeaSChristoph Hellwig lo_hi_writeq(nvmeq->cq_dma_addr, dev->bar + NVME_REG_ACQ); 123157dacad5SJay Sternberg 12325fd4ce1bSChristoph Hellwig result = nvme_enable_ctrl(&dev->ctrl, cap); 123357dacad5SJay Sternberg if (result) 1234d4875622SKeith Busch return result; 123557dacad5SJay Sternberg 123657dacad5SJay Sternberg nvmeq->cq_vector = 0; 1237dca51e78SChristoph Hellwig result = queue_request_irq(nvmeq); 123857dacad5SJay Sternberg if (result) { 123957dacad5SJay Sternberg nvmeq->cq_vector = -1; 1240d4875622SKeith Busch return result; 124157dacad5SJay Sternberg } 124257dacad5SJay Sternberg 124357dacad5SJay Sternberg return result; 124457dacad5SJay Sternberg } 124557dacad5SJay Sternberg 1246c875a709SGuilherme G. Piccoli static bool nvme_should_reset(struct nvme_dev *dev, u32 csts) 1247c875a709SGuilherme G. Piccoli { 1248c875a709SGuilherme G. Piccoli 1249c875a709SGuilherme G. Piccoli /* If true, indicates loss of adapter communication, possibly by a 1250c875a709SGuilherme G. Piccoli * NVMe Subsystem reset. 1251c875a709SGuilherme G. Piccoli */ 1252c875a709SGuilherme G. Piccoli bool nssro = dev->subsystem && (csts & NVME_CSTS_NSSRO); 1253c875a709SGuilherme G. Piccoli 1254c875a709SGuilherme G. Piccoli /* If there is a reset ongoing, we shouldn't reset again. */ 1255c875a709SGuilherme G. Piccoli if (work_busy(&dev->reset_work)) 1256c875a709SGuilherme G. Piccoli return false; 1257c875a709SGuilherme G. Piccoli 1258c875a709SGuilherme G. Piccoli /* We shouldn't reset unless the controller is on fatal error state 1259c875a709SGuilherme G. Piccoli * _or_ if we lost the communication with it. 1260c875a709SGuilherme G. Piccoli */ 1261c875a709SGuilherme G. Piccoli if (!(csts & NVME_CSTS_CFS) && !nssro) 1262c875a709SGuilherme G. Piccoli return false; 1263c875a709SGuilherme G. Piccoli 1264c875a709SGuilherme G. Piccoli /* If PCI error recovery process is happening, we cannot reset or 1265c875a709SGuilherme G. Piccoli * the recovery mechanism will surely fail. 1266c875a709SGuilherme G. Piccoli */ 1267c875a709SGuilherme G. Piccoli if (pci_channel_offline(to_pci_dev(dev->dev))) 1268c875a709SGuilherme G. Piccoli return false; 1269c875a709SGuilherme G. Piccoli 1270c875a709SGuilherme G. Piccoli return true; 1271c875a709SGuilherme G. Piccoli } 1272c875a709SGuilherme G. Piccoli 1273d2a61918SAndy Lutomirski static void nvme_warn_reset(struct nvme_dev *dev, u32 csts) 1274d2a61918SAndy Lutomirski { 1275d2a61918SAndy Lutomirski /* Read a config register to help see what died. */ 1276d2a61918SAndy Lutomirski u16 pci_status; 1277d2a61918SAndy Lutomirski int result; 1278d2a61918SAndy Lutomirski 1279d2a61918SAndy Lutomirski result = pci_read_config_word(to_pci_dev(dev->dev), PCI_STATUS, 1280d2a61918SAndy Lutomirski &pci_status); 1281d2a61918SAndy Lutomirski if (result == PCIBIOS_SUCCESSFUL) 1282d2a61918SAndy Lutomirski dev_warn(dev->dev, 1283d2a61918SAndy Lutomirski "controller is down; will reset: CSTS=0x%x, PCI_STATUS=0x%hx\n", 1284d2a61918SAndy Lutomirski csts, pci_status); 1285d2a61918SAndy Lutomirski else 1286d2a61918SAndy Lutomirski dev_warn(dev->dev, 1287d2a61918SAndy Lutomirski "controller is down; will reset: CSTS=0x%x, PCI_STATUS read failed (%d)\n", 1288d2a61918SAndy Lutomirski csts, result); 1289d2a61918SAndy Lutomirski } 1290d2a61918SAndy Lutomirski 12912d55cd5fSChristoph Hellwig static void nvme_watchdog_timer(unsigned long data) 129257dacad5SJay Sternberg { 12932d55cd5fSChristoph Hellwig struct nvme_dev *dev = (struct nvme_dev *)data; 12947a67cbeaSChristoph Hellwig u32 csts = readl(dev->bar + NVME_REG_CSTS); 129557dacad5SJay Sternberg 1296c875a709SGuilherme G. Piccoli /* Skip controllers under certain specific conditions. */ 1297c875a709SGuilherme G. Piccoli if (nvme_should_reset(dev, csts)) { 1298c5f6ce97SKeith Busch if (!nvme_reset(dev)) 1299d2a61918SAndy Lutomirski nvme_warn_reset(dev, csts); 13002d55cd5fSChristoph Hellwig return; 130157dacad5SJay Sternberg } 130257dacad5SJay Sternberg 13032d55cd5fSChristoph Hellwig mod_timer(&dev->watchdog_timer, round_jiffies(jiffies + HZ)); 130457dacad5SJay Sternberg } 130557dacad5SJay Sternberg 1306749941f2SChristoph Hellwig static int nvme_create_io_queues(struct nvme_dev *dev) 130757dacad5SJay Sternberg { 1308949928c1SKeith Busch unsigned i, max; 1309749941f2SChristoph Hellwig int ret = 0; 131057dacad5SJay Sternberg 1311749941f2SChristoph Hellwig for (i = dev->queue_count; i <= dev->max_qid; i++) { 1312749941f2SChristoph Hellwig if (!nvme_alloc_queue(dev, i, dev->q_depth)) { 1313749941f2SChristoph Hellwig ret = -ENOMEM; 131457dacad5SJay Sternberg break; 1315749941f2SChristoph Hellwig } 1316749941f2SChristoph Hellwig } 131757dacad5SJay Sternberg 1318949928c1SKeith Busch max = min(dev->max_qid, dev->queue_count - 1); 1319949928c1SKeith Busch for (i = dev->online_queues; i <= max; i++) { 1320749941f2SChristoph Hellwig ret = nvme_create_queue(dev->queues[i], i); 1321d4875622SKeith Busch if (ret) 132257dacad5SJay Sternberg break; 132357dacad5SJay Sternberg } 132457dacad5SJay Sternberg 1325749941f2SChristoph Hellwig /* 1326749941f2SChristoph Hellwig * Ignore failing Create SQ/CQ commands, we can continue with less 1327749941f2SChristoph Hellwig * than the desired aount of queues, and even a controller without 1328749941f2SChristoph Hellwig * I/O queues an still be used to issue admin commands. This might 1329749941f2SChristoph Hellwig * be useful to upgrade a buggy firmware for example. 1330749941f2SChristoph Hellwig */ 1331749941f2SChristoph Hellwig return ret >= 0 ? 0 : ret; 133257dacad5SJay Sternberg } 133357dacad5SJay Sternberg 1334202021c1SStephen Bates static ssize_t nvme_cmb_show(struct device *dev, 1335202021c1SStephen Bates struct device_attribute *attr, 1336202021c1SStephen Bates char *buf) 1337202021c1SStephen Bates { 1338202021c1SStephen Bates struct nvme_dev *ndev = to_nvme_dev(dev_get_drvdata(dev)); 1339202021c1SStephen Bates 1340c965809cSStephen Bates return scnprintf(buf, PAGE_SIZE, "cmbloc : x%08x\ncmbsz : x%08x\n", 1341202021c1SStephen Bates ndev->cmbloc, ndev->cmbsz); 1342202021c1SStephen Bates } 1343202021c1SStephen Bates static DEVICE_ATTR(cmb, S_IRUGO, nvme_cmb_show, NULL); 1344202021c1SStephen Bates 134557dacad5SJay Sternberg static void __iomem *nvme_map_cmb(struct nvme_dev *dev) 134657dacad5SJay Sternberg { 134757dacad5SJay Sternberg u64 szu, size, offset; 134857dacad5SJay Sternberg resource_size_t bar_size; 134957dacad5SJay Sternberg struct pci_dev *pdev = to_pci_dev(dev->dev); 135057dacad5SJay Sternberg void __iomem *cmb; 135157dacad5SJay Sternberg dma_addr_t dma_addr; 135257dacad5SJay Sternberg 13537a67cbeaSChristoph Hellwig dev->cmbsz = readl(dev->bar + NVME_REG_CMBSZ); 135457dacad5SJay Sternberg if (!(NVME_CMB_SZ(dev->cmbsz))) 135557dacad5SJay Sternberg return NULL; 1356202021c1SStephen Bates dev->cmbloc = readl(dev->bar + NVME_REG_CMBLOC); 135757dacad5SJay Sternberg 1358202021c1SStephen Bates if (!use_cmb_sqes) 1359202021c1SStephen Bates return NULL; 136057dacad5SJay Sternberg 136157dacad5SJay Sternberg szu = (u64)1 << (12 + 4 * NVME_CMB_SZU(dev->cmbsz)); 136257dacad5SJay Sternberg size = szu * NVME_CMB_SZ(dev->cmbsz); 1363202021c1SStephen Bates offset = szu * NVME_CMB_OFST(dev->cmbloc); 1364202021c1SStephen Bates bar_size = pci_resource_len(pdev, NVME_CMB_BIR(dev->cmbloc)); 136557dacad5SJay Sternberg 136657dacad5SJay Sternberg if (offset > bar_size) 136757dacad5SJay Sternberg return NULL; 136857dacad5SJay Sternberg 136957dacad5SJay Sternberg /* 137057dacad5SJay Sternberg * Controllers may support a CMB size larger than their BAR, 137157dacad5SJay Sternberg * for example, due to being behind a bridge. Reduce the CMB to 137257dacad5SJay Sternberg * the reported size of the BAR 137357dacad5SJay Sternberg */ 137457dacad5SJay Sternberg if (size > bar_size - offset) 137557dacad5SJay Sternberg size = bar_size - offset; 137657dacad5SJay Sternberg 1377202021c1SStephen Bates dma_addr = pci_resource_start(pdev, NVME_CMB_BIR(dev->cmbloc)) + offset; 137857dacad5SJay Sternberg cmb = ioremap_wc(dma_addr, size); 137957dacad5SJay Sternberg if (!cmb) 138057dacad5SJay Sternberg return NULL; 138157dacad5SJay Sternberg 138257dacad5SJay Sternberg dev->cmb_dma_addr = dma_addr; 138357dacad5SJay Sternberg dev->cmb_size = size; 138457dacad5SJay Sternberg return cmb; 138557dacad5SJay Sternberg } 138657dacad5SJay Sternberg 138757dacad5SJay Sternberg static inline void nvme_release_cmb(struct nvme_dev *dev) 138857dacad5SJay Sternberg { 138957dacad5SJay Sternberg if (dev->cmb) { 139057dacad5SJay Sternberg iounmap(dev->cmb); 139157dacad5SJay Sternberg dev->cmb = NULL; 139257dacad5SJay Sternberg } 139357dacad5SJay Sternberg } 139457dacad5SJay Sternberg 139557dacad5SJay Sternberg static size_t db_bar_size(struct nvme_dev *dev, unsigned nr_io_queues) 139657dacad5SJay Sternberg { 139757dacad5SJay Sternberg return 4096 + ((nr_io_queues + 1) * 8 * dev->db_stride); 139857dacad5SJay Sternberg } 139957dacad5SJay Sternberg 140057dacad5SJay Sternberg static int nvme_setup_io_queues(struct nvme_dev *dev) 140157dacad5SJay Sternberg { 140257dacad5SJay Sternberg struct nvme_queue *adminq = dev->queues[0]; 140357dacad5SJay Sternberg struct pci_dev *pdev = to_pci_dev(dev->dev); 1404dca51e78SChristoph Hellwig int result, nr_io_queues, size; 140557dacad5SJay Sternberg 14062800b8e7SKeith Busch nr_io_queues = num_online_cpus(); 14079a0be7abSChristoph Hellwig result = nvme_set_queue_count(&dev->ctrl, &nr_io_queues); 14089a0be7abSChristoph Hellwig if (result < 0) 140957dacad5SJay Sternberg return result; 14109a0be7abSChristoph Hellwig 1411f5fa90dcSChristoph Hellwig if (nr_io_queues == 0) 1412a5229050SKeith Busch return 0; 141357dacad5SJay Sternberg 141457dacad5SJay Sternberg if (dev->cmb && NVME_CMB_SQS(dev->cmbsz)) { 141557dacad5SJay Sternberg result = nvme_cmb_qdepth(dev, nr_io_queues, 141657dacad5SJay Sternberg sizeof(struct nvme_command)); 141757dacad5SJay Sternberg if (result > 0) 141857dacad5SJay Sternberg dev->q_depth = result; 141957dacad5SJay Sternberg else 142057dacad5SJay Sternberg nvme_release_cmb(dev); 142157dacad5SJay Sternberg } 142257dacad5SJay Sternberg 142357dacad5SJay Sternberg size = db_bar_size(dev, nr_io_queues); 142457dacad5SJay Sternberg if (size > 8192) { 142557dacad5SJay Sternberg iounmap(dev->bar); 142657dacad5SJay Sternberg do { 142757dacad5SJay Sternberg dev->bar = ioremap(pci_resource_start(pdev, 0), size); 142857dacad5SJay Sternberg if (dev->bar) 142957dacad5SJay Sternberg break; 143057dacad5SJay Sternberg if (!--nr_io_queues) 143157dacad5SJay Sternberg return -ENOMEM; 143257dacad5SJay Sternberg size = db_bar_size(dev, nr_io_queues); 143357dacad5SJay Sternberg } while (1); 14347a67cbeaSChristoph Hellwig dev->dbs = dev->bar + 4096; 143557dacad5SJay Sternberg adminq->q_db = dev->dbs; 143657dacad5SJay Sternberg } 143757dacad5SJay Sternberg 143857dacad5SJay Sternberg /* Deregister the admin queue's interrupt */ 1439dca51e78SChristoph Hellwig free_irq(pci_irq_vector(pdev, 0), adminq); 144057dacad5SJay Sternberg 144157dacad5SJay Sternberg /* 144257dacad5SJay Sternberg * If we enable msix early due to not intx, disable it again before 144357dacad5SJay Sternberg * setting up the full range we need. 144457dacad5SJay Sternberg */ 1445dca51e78SChristoph Hellwig pci_free_irq_vectors(pdev); 1446dca51e78SChristoph Hellwig nr_io_queues = pci_alloc_irq_vectors(pdev, 1, nr_io_queues, 1447dca51e78SChristoph Hellwig PCI_IRQ_ALL_TYPES | PCI_IRQ_AFFINITY); 1448dca51e78SChristoph Hellwig if (nr_io_queues <= 0) 1449dca51e78SChristoph Hellwig return -EIO; 1450dca51e78SChristoph Hellwig dev->max_qid = nr_io_queues; 145157dacad5SJay Sternberg 145257dacad5SJay Sternberg /* 145357dacad5SJay Sternberg * Should investigate if there's a performance win from allocating 145457dacad5SJay Sternberg * more queues than interrupt vectors; it might allow the submission 145557dacad5SJay Sternberg * path to scale better, even if the receive path is limited by the 145657dacad5SJay Sternberg * number of interrupts. 145757dacad5SJay Sternberg */ 145857dacad5SJay Sternberg 1459dca51e78SChristoph Hellwig result = queue_request_irq(adminq); 146057dacad5SJay Sternberg if (result) { 146157dacad5SJay Sternberg adminq->cq_vector = -1; 1462d4875622SKeith Busch return result; 146357dacad5SJay Sternberg } 1464749941f2SChristoph Hellwig return nvme_create_io_queues(dev); 146557dacad5SJay Sternberg } 146657dacad5SJay Sternberg 1467db3cbfffSKeith Busch static void nvme_del_queue_end(struct request *req, int error) 1468db3cbfffSKeith Busch { 1469db3cbfffSKeith Busch struct nvme_queue *nvmeq = req->end_io_data; 1470db3cbfffSKeith Busch 1471db3cbfffSKeith Busch blk_mq_free_request(req); 1472db3cbfffSKeith Busch complete(&nvmeq->dev->ioq_wait); 1473db3cbfffSKeith Busch } 1474db3cbfffSKeith Busch 1475db3cbfffSKeith Busch static void nvme_del_cq_end(struct request *req, int error) 1476db3cbfffSKeith Busch { 1477db3cbfffSKeith Busch struct nvme_queue *nvmeq = req->end_io_data; 1478db3cbfffSKeith Busch 1479db3cbfffSKeith Busch if (!error) { 1480db3cbfffSKeith Busch unsigned long flags; 1481db3cbfffSKeith Busch 14822e39e0f6SMing Lin /* 14832e39e0f6SMing Lin * We might be called with the AQ q_lock held 14842e39e0f6SMing Lin * and the I/O queue q_lock should always 14852e39e0f6SMing Lin * nest inside the AQ one. 14862e39e0f6SMing Lin */ 14872e39e0f6SMing Lin spin_lock_irqsave_nested(&nvmeq->q_lock, flags, 14882e39e0f6SMing Lin SINGLE_DEPTH_NESTING); 1489db3cbfffSKeith Busch nvme_process_cq(nvmeq); 1490db3cbfffSKeith Busch spin_unlock_irqrestore(&nvmeq->q_lock, flags); 1491db3cbfffSKeith Busch } 1492db3cbfffSKeith Busch 1493db3cbfffSKeith Busch nvme_del_queue_end(req, error); 1494db3cbfffSKeith Busch } 1495db3cbfffSKeith Busch 1496db3cbfffSKeith Busch static int nvme_delete_queue(struct nvme_queue *nvmeq, u8 opcode) 1497db3cbfffSKeith Busch { 1498db3cbfffSKeith Busch struct request_queue *q = nvmeq->dev->ctrl.admin_q; 1499db3cbfffSKeith Busch struct request *req; 1500db3cbfffSKeith Busch struct nvme_command cmd; 1501db3cbfffSKeith Busch 1502db3cbfffSKeith Busch memset(&cmd, 0, sizeof(cmd)); 1503db3cbfffSKeith Busch cmd.delete_queue.opcode = opcode; 1504db3cbfffSKeith Busch cmd.delete_queue.qid = cpu_to_le16(nvmeq->qid); 1505db3cbfffSKeith Busch 1506eb71f435SChristoph Hellwig req = nvme_alloc_request(q, &cmd, BLK_MQ_REQ_NOWAIT, NVME_QID_ANY); 1507db3cbfffSKeith Busch if (IS_ERR(req)) 1508db3cbfffSKeith Busch return PTR_ERR(req); 1509db3cbfffSKeith Busch 1510db3cbfffSKeith Busch req->timeout = ADMIN_TIMEOUT; 1511db3cbfffSKeith Busch req->end_io_data = nvmeq; 1512db3cbfffSKeith Busch 1513db3cbfffSKeith Busch blk_execute_rq_nowait(q, NULL, req, false, 1514db3cbfffSKeith Busch opcode == nvme_admin_delete_cq ? 1515db3cbfffSKeith Busch nvme_del_cq_end : nvme_del_queue_end); 1516db3cbfffSKeith Busch return 0; 1517db3cbfffSKeith Busch } 1518db3cbfffSKeith Busch 151970659060SKeith Busch static void nvme_disable_io_queues(struct nvme_dev *dev, int queues) 1520db3cbfffSKeith Busch { 152170659060SKeith Busch int pass; 1522db3cbfffSKeith Busch unsigned long timeout; 1523db3cbfffSKeith Busch u8 opcode = nvme_admin_delete_sq; 1524db3cbfffSKeith Busch 1525db3cbfffSKeith Busch for (pass = 0; pass < 2; pass++) { 1526014a0d60SKeith Busch int sent = 0, i = queues; 1527db3cbfffSKeith Busch 1528db3cbfffSKeith Busch reinit_completion(&dev->ioq_wait); 1529db3cbfffSKeith Busch retry: 1530db3cbfffSKeith Busch timeout = ADMIN_TIMEOUT; 1531c21377f8SGabriel Krisman Bertazi for (; i > 0; i--, sent++) 1532c21377f8SGabriel Krisman Bertazi if (nvme_delete_queue(dev->queues[i], opcode)) 1533db3cbfffSKeith Busch break; 1534c21377f8SGabriel Krisman Bertazi 1535db3cbfffSKeith Busch while (sent--) { 1536db3cbfffSKeith Busch timeout = wait_for_completion_io_timeout(&dev->ioq_wait, timeout); 1537db3cbfffSKeith Busch if (timeout == 0) 1538db3cbfffSKeith Busch return; 1539db3cbfffSKeith Busch if (i) 1540db3cbfffSKeith Busch goto retry; 1541db3cbfffSKeith Busch } 1542db3cbfffSKeith Busch opcode = nvme_admin_delete_cq; 1543db3cbfffSKeith Busch } 1544db3cbfffSKeith Busch } 1545db3cbfffSKeith Busch 154657dacad5SJay Sternberg /* 154757dacad5SJay Sternberg * Return: error value if an error occurred setting up the queues or calling 154857dacad5SJay Sternberg * Identify Device. 0 if these succeeded, even if adding some of the 154957dacad5SJay Sternberg * namespaces failed. At the moment, these failures are silent. TBD which 155057dacad5SJay Sternberg * failures should be reported. 155157dacad5SJay Sternberg */ 155257dacad5SJay Sternberg static int nvme_dev_add(struct nvme_dev *dev) 155357dacad5SJay Sternberg { 15545bae7f73SChristoph Hellwig if (!dev->ctrl.tagset) { 155557dacad5SJay Sternberg dev->tagset.ops = &nvme_mq_ops; 155657dacad5SJay Sternberg dev->tagset.nr_hw_queues = dev->online_queues - 1; 155757dacad5SJay Sternberg dev->tagset.timeout = NVME_IO_TIMEOUT; 155857dacad5SJay Sternberg dev->tagset.numa_node = dev_to_node(dev->dev); 155957dacad5SJay Sternberg dev->tagset.queue_depth = 156057dacad5SJay Sternberg min_t(int, dev->q_depth, BLK_MQ_MAX_DEPTH) - 1; 156157dacad5SJay Sternberg dev->tagset.cmd_size = nvme_cmd_size(dev); 156257dacad5SJay Sternberg dev->tagset.flags = BLK_MQ_F_SHOULD_MERGE; 156357dacad5SJay Sternberg dev->tagset.driver_data = dev; 156457dacad5SJay Sternberg 156557dacad5SJay Sternberg if (blk_mq_alloc_tag_set(&dev->tagset)) 156657dacad5SJay Sternberg return 0; 15675bae7f73SChristoph Hellwig dev->ctrl.tagset = &dev->tagset; 1568949928c1SKeith Busch } else { 1569949928c1SKeith Busch blk_mq_update_nr_hw_queues(&dev->tagset, dev->online_queues - 1); 1570949928c1SKeith Busch 1571949928c1SKeith Busch /* Free previously allocated queues that are no longer usable */ 1572949928c1SKeith Busch nvme_free_queues(dev, dev->online_queues); 157357dacad5SJay Sternberg } 1574949928c1SKeith Busch 157557dacad5SJay Sternberg return 0; 157657dacad5SJay Sternberg } 157757dacad5SJay Sternberg 1578b00a726aSKeith Busch static int nvme_pci_enable(struct nvme_dev *dev) 157957dacad5SJay Sternberg { 158057dacad5SJay Sternberg u64 cap; 1581b00a726aSKeith Busch int result = -ENOMEM; 158257dacad5SJay Sternberg struct pci_dev *pdev = to_pci_dev(dev->dev); 158357dacad5SJay Sternberg 158457dacad5SJay Sternberg if (pci_enable_device_mem(pdev)) 158557dacad5SJay Sternberg return result; 158657dacad5SJay Sternberg 158757dacad5SJay Sternberg pci_set_master(pdev); 158857dacad5SJay Sternberg 158957dacad5SJay Sternberg if (dma_set_mask_and_coherent(dev->dev, DMA_BIT_MASK(64)) && 159057dacad5SJay Sternberg dma_set_mask_and_coherent(dev->dev, DMA_BIT_MASK(32))) 159157dacad5SJay Sternberg goto disable; 159257dacad5SJay Sternberg 15937a67cbeaSChristoph Hellwig if (readl(dev->bar + NVME_REG_CSTS) == -1) { 159457dacad5SJay Sternberg result = -ENODEV; 1595b00a726aSKeith Busch goto disable; 159657dacad5SJay Sternberg } 159757dacad5SJay Sternberg 159857dacad5SJay Sternberg /* 1599a5229050SKeith Busch * Some devices and/or platforms don't advertise or work with INTx 1600a5229050SKeith Busch * interrupts. Pre-enable a single MSIX or MSI vec for setup. We'll 1601a5229050SKeith Busch * adjust this later. 160257dacad5SJay Sternberg */ 1603dca51e78SChristoph Hellwig result = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_ALL_TYPES); 1604dca51e78SChristoph Hellwig if (result < 0) 1605dca51e78SChristoph Hellwig return result; 160657dacad5SJay Sternberg 16077a67cbeaSChristoph Hellwig cap = lo_hi_readq(dev->bar + NVME_REG_CAP); 16087a67cbeaSChristoph Hellwig 160957dacad5SJay Sternberg dev->q_depth = min_t(int, NVME_CAP_MQES(cap) + 1, NVME_Q_DEPTH); 161057dacad5SJay Sternberg dev->db_stride = 1 << NVME_CAP_STRIDE(cap); 16117a67cbeaSChristoph Hellwig dev->dbs = dev->bar + 4096; 16121f390c1fSStephan Günther 16131f390c1fSStephan Günther /* 16141f390c1fSStephan Günther * Temporary fix for the Apple controller found in the MacBook8,1 and 16151f390c1fSStephan Günther * some MacBook7,1 to avoid controller resets and data loss. 16161f390c1fSStephan Günther */ 16171f390c1fSStephan Günther if (pdev->vendor == PCI_VENDOR_ID_APPLE && pdev->device == 0x2001) { 16181f390c1fSStephan Günther dev->q_depth = 2; 16191f390c1fSStephan Günther dev_warn(dev->dev, "detected Apple NVMe controller, set " 16201f390c1fSStephan Günther "queue depth=%u to work around controller resets\n", 16211f390c1fSStephan Günther dev->q_depth); 16221f390c1fSStephan Günther } 16231f390c1fSStephan Günther 1624202021c1SStephen Bates /* 1625202021c1SStephen Bates * CMBs can currently only exist on >=1.2 PCIe devices. We only 1626202021c1SStephen Bates * populate sysfs if a CMB is implemented. Note that we add the 1627202021c1SStephen Bates * CMB attribute to the nvme_ctrl kobj which removes the need to remove 1628202021c1SStephen Bates * it on exit. Since nvme_dev_attrs_group has no name we can pass 1629202021c1SStephen Bates * NULL as final argument to sysfs_add_file_to_group. 1630202021c1SStephen Bates */ 1631202021c1SStephen Bates 16328ef2074dSGabriel Krisman Bertazi if (readl(dev->bar + NVME_REG_VS) >= NVME_VS(1, 2, 0)) { 163357dacad5SJay Sternberg dev->cmb = nvme_map_cmb(dev); 163457dacad5SJay Sternberg 1635202021c1SStephen Bates if (dev->cmbsz) { 1636202021c1SStephen Bates if (sysfs_add_file_to_group(&dev->ctrl.device->kobj, 1637202021c1SStephen Bates &dev_attr_cmb.attr, NULL)) 1638202021c1SStephen Bates dev_warn(dev->dev, 1639202021c1SStephen Bates "failed to add sysfs attribute for CMB\n"); 1640202021c1SStephen Bates } 1641202021c1SStephen Bates } 1642202021c1SStephen Bates 1643a0a3408eSKeith Busch pci_enable_pcie_error_reporting(pdev); 1644a0a3408eSKeith Busch pci_save_state(pdev); 164557dacad5SJay Sternberg return 0; 164657dacad5SJay Sternberg 164757dacad5SJay Sternberg disable: 164857dacad5SJay Sternberg pci_disable_device(pdev); 164957dacad5SJay Sternberg return result; 165057dacad5SJay Sternberg } 165157dacad5SJay Sternberg 165257dacad5SJay Sternberg static void nvme_dev_unmap(struct nvme_dev *dev) 165357dacad5SJay Sternberg { 1654b00a726aSKeith Busch if (dev->bar) 1655b00a726aSKeith Busch iounmap(dev->bar); 1656a1f447b3SJohannes Thumshirn pci_release_mem_regions(to_pci_dev(dev->dev)); 1657b00a726aSKeith Busch } 1658b00a726aSKeith Busch 1659b00a726aSKeith Busch static void nvme_pci_disable(struct nvme_dev *dev) 1660b00a726aSKeith Busch { 166157dacad5SJay Sternberg struct pci_dev *pdev = to_pci_dev(dev->dev); 166257dacad5SJay Sternberg 1663dca51e78SChristoph Hellwig pci_free_irq_vectors(pdev); 166457dacad5SJay Sternberg 1665a0a3408eSKeith Busch if (pci_is_enabled(pdev)) { 1666a0a3408eSKeith Busch pci_disable_pcie_error_reporting(pdev); 166757dacad5SJay Sternberg pci_disable_device(pdev); 166857dacad5SJay Sternberg } 1669a0a3408eSKeith Busch } 167057dacad5SJay Sternberg 1671a5cdb68cSKeith Busch static void nvme_dev_disable(struct nvme_dev *dev, bool shutdown) 167257dacad5SJay Sternberg { 167370659060SKeith Busch int i, queues; 167457dacad5SJay Sternberg u32 csts = -1; 167557dacad5SJay Sternberg 16762d55cd5fSChristoph Hellwig del_timer_sync(&dev->watchdog_timer); 167757dacad5SJay Sternberg 167877bf25eaSKeith Busch mutex_lock(&dev->shutdown_lock); 1679b00a726aSKeith Busch if (pci_is_enabled(to_pci_dev(dev->dev))) { 168025646264SKeith Busch nvme_stop_queues(&dev->ctrl); 16817a67cbeaSChristoph Hellwig csts = readl(dev->bar + NVME_REG_CSTS); 168257dacad5SJay Sternberg } 1683c21377f8SGabriel Krisman Bertazi 168470659060SKeith Busch queues = dev->online_queues - 1; 1685c21377f8SGabriel Krisman Bertazi for (i = dev->queue_count - 1; i > 0; i--) 1686c21377f8SGabriel Krisman Bertazi nvme_suspend_queue(dev->queues[i]); 1687c21377f8SGabriel Krisman Bertazi 168857dacad5SJay Sternberg if (csts & NVME_CSTS_CFS || !(csts & NVME_CSTS_RDY)) { 168982469c59SGabriel Krisman Bertazi /* A device might become IO incapable very soon during 169082469c59SGabriel Krisman Bertazi * probe, before the admin queue is configured. Thus, 169182469c59SGabriel Krisman Bertazi * queue_count can be 0 here. 169282469c59SGabriel Krisman Bertazi */ 169382469c59SGabriel Krisman Bertazi if (dev->queue_count) 1694c21377f8SGabriel Krisman Bertazi nvme_suspend_queue(dev->queues[0]); 169557dacad5SJay Sternberg } else { 169670659060SKeith Busch nvme_disable_io_queues(dev, queues); 1697a5cdb68cSKeith Busch nvme_disable_admin_queue(dev, shutdown); 169857dacad5SJay Sternberg } 1699b00a726aSKeith Busch nvme_pci_disable(dev); 170057dacad5SJay Sternberg 1701e1958e65SMing Lin blk_mq_tagset_busy_iter(&dev->tagset, nvme_cancel_request, &dev->ctrl); 1702e1958e65SMing Lin blk_mq_tagset_busy_iter(&dev->admin_tagset, nvme_cancel_request, &dev->ctrl); 170377bf25eaSKeith Busch mutex_unlock(&dev->shutdown_lock); 170457dacad5SJay Sternberg } 170557dacad5SJay Sternberg 170657dacad5SJay Sternberg static int nvme_setup_prp_pools(struct nvme_dev *dev) 170757dacad5SJay Sternberg { 170857dacad5SJay Sternberg dev->prp_page_pool = dma_pool_create("prp list page", dev->dev, 170957dacad5SJay Sternberg PAGE_SIZE, PAGE_SIZE, 0); 171057dacad5SJay Sternberg if (!dev->prp_page_pool) 171157dacad5SJay Sternberg return -ENOMEM; 171257dacad5SJay Sternberg 171357dacad5SJay Sternberg /* Optimisation for I/Os between 4k and 128k */ 171457dacad5SJay Sternberg dev->prp_small_pool = dma_pool_create("prp list 256", dev->dev, 171557dacad5SJay Sternberg 256, 256, 0); 171657dacad5SJay Sternberg if (!dev->prp_small_pool) { 171757dacad5SJay Sternberg dma_pool_destroy(dev->prp_page_pool); 171857dacad5SJay Sternberg return -ENOMEM; 171957dacad5SJay Sternberg } 172057dacad5SJay Sternberg return 0; 172157dacad5SJay Sternberg } 172257dacad5SJay Sternberg 172357dacad5SJay Sternberg static void nvme_release_prp_pools(struct nvme_dev *dev) 172457dacad5SJay Sternberg { 172557dacad5SJay Sternberg dma_pool_destroy(dev->prp_page_pool); 172657dacad5SJay Sternberg dma_pool_destroy(dev->prp_small_pool); 172757dacad5SJay Sternberg } 172857dacad5SJay Sternberg 17291673f1f0SChristoph Hellwig static void nvme_pci_free_ctrl(struct nvme_ctrl *ctrl) 173057dacad5SJay Sternberg { 17311673f1f0SChristoph Hellwig struct nvme_dev *dev = to_nvme_dev(ctrl); 173257dacad5SJay Sternberg 173357dacad5SJay Sternberg put_device(dev->dev); 173457dacad5SJay Sternberg if (dev->tagset.tags) 173557dacad5SJay Sternberg blk_mq_free_tag_set(&dev->tagset); 17361c63dc66SChristoph Hellwig if (dev->ctrl.admin_q) 17371c63dc66SChristoph Hellwig blk_put_queue(dev->ctrl.admin_q); 173857dacad5SJay Sternberg kfree(dev->queues); 17394f1244c8SChristoph Hellwig kfree(dev->ctrl.opal_dev); 174057dacad5SJay Sternberg kfree(dev); 174157dacad5SJay Sternberg } 174257dacad5SJay Sternberg 1743f58944e2SKeith Busch static void nvme_remove_dead_ctrl(struct nvme_dev *dev, int status) 1744f58944e2SKeith Busch { 1745237045fcSLinus Torvalds dev_warn(dev->ctrl.device, "Removing after probe failure status: %d\n", status); 1746f58944e2SKeith Busch 1747f58944e2SKeith Busch kref_get(&dev->ctrl.kref); 174869d9a99cSKeith Busch nvme_dev_disable(dev, false); 1749f58944e2SKeith Busch if (!schedule_work(&dev->remove_work)) 1750f58944e2SKeith Busch nvme_put_ctrl(&dev->ctrl); 1751f58944e2SKeith Busch } 1752f58944e2SKeith Busch 1753fd634f41SChristoph Hellwig static void nvme_reset_work(struct work_struct *work) 175457dacad5SJay Sternberg { 1755fd634f41SChristoph Hellwig struct nvme_dev *dev = container_of(work, struct nvme_dev, reset_work); 1756a98e58e5SScott Bauer bool was_suspend = !!(dev->ctrl.ctrl_config & NVME_CC_SHN_NORMAL); 1757f58944e2SKeith Busch int result = -ENODEV; 175857dacad5SJay Sternberg 1759bb8d261eSChristoph Hellwig if (WARN_ON(dev->ctrl.state == NVME_CTRL_RESETTING)) 1760fd634f41SChristoph Hellwig goto out; 1761fd634f41SChristoph Hellwig 1762fd634f41SChristoph Hellwig /* 1763fd634f41SChristoph Hellwig * If we're called to reset a live controller first shut it down before 1764fd634f41SChristoph Hellwig * moving on. 1765fd634f41SChristoph Hellwig */ 1766b00a726aSKeith Busch if (dev->ctrl.ctrl_config & NVME_CC_ENABLE) 1767a5cdb68cSKeith Busch nvme_dev_disable(dev, false); 1768fd634f41SChristoph Hellwig 1769bb8d261eSChristoph Hellwig if (!nvme_change_ctrl_state(&dev->ctrl, NVME_CTRL_RESETTING)) 17709bf2b972SKeith Busch goto out; 17719bf2b972SKeith Busch 1772b00a726aSKeith Busch result = nvme_pci_enable(dev); 177357dacad5SJay Sternberg if (result) 177457dacad5SJay Sternberg goto out; 177557dacad5SJay Sternberg 177657dacad5SJay Sternberg result = nvme_configure_admin_queue(dev); 177757dacad5SJay Sternberg if (result) 1778f58944e2SKeith Busch goto out; 177957dacad5SJay Sternberg 178057dacad5SJay Sternberg nvme_init_queue(dev->queues[0], 0); 178157dacad5SJay Sternberg result = nvme_alloc_admin_tags(dev); 178257dacad5SJay Sternberg if (result) 1783f58944e2SKeith Busch goto out; 178457dacad5SJay Sternberg 1785ce4541f4SChristoph Hellwig result = nvme_init_identify(&dev->ctrl); 1786ce4541f4SChristoph Hellwig if (result) 1787f58944e2SKeith Busch goto out; 1788ce4541f4SChristoph Hellwig 17898a9ae523SScott Bauer if ((dev->ctrl.oacs & NVME_CTRL_OACS_SEC_SUPP) && !dev->ctrl.opal_dev) { 17904f1244c8SChristoph Hellwig dev->ctrl.opal_dev = 17914f1244c8SChristoph Hellwig init_opal_dev(&dev->ctrl, &nvme_sec_submit); 17924f1244c8SChristoph Hellwig } 1793a98e58e5SScott Bauer 1794a98e58e5SScott Bauer if (was_suspend) 17954f1244c8SChristoph Hellwig opal_unlock_from_suspend(dev->ctrl.opal_dev); 1796a98e58e5SScott Bauer 179757dacad5SJay Sternberg result = nvme_setup_io_queues(dev); 179857dacad5SJay Sternberg if (result) 1799f58944e2SKeith Busch goto out; 180057dacad5SJay Sternberg 180121f033f7SKeith Busch /* 180221f033f7SKeith Busch * A controller that can not execute IO typically requires user 180321f033f7SKeith Busch * intervention to correct. For such degraded controllers, the driver 180421f033f7SKeith Busch * should not submit commands the user did not request, so skip 180521f033f7SKeith Busch * registering for asynchronous event notification on this condition. 180621f033f7SKeith Busch */ 1807f866fc42SChristoph Hellwig if (dev->online_queues > 1) 1808f866fc42SChristoph Hellwig nvme_queue_async_events(&dev->ctrl); 180957dacad5SJay Sternberg 18102d55cd5fSChristoph Hellwig mod_timer(&dev->watchdog_timer, round_jiffies(jiffies + HZ)); 181157dacad5SJay Sternberg 181257dacad5SJay Sternberg /* 181357dacad5SJay Sternberg * Keep the controller around but remove all namespaces if we don't have 181457dacad5SJay Sternberg * any working I/O queue. 181557dacad5SJay Sternberg */ 181657dacad5SJay Sternberg if (dev->online_queues < 2) { 18171b3c47c1SSagi Grimberg dev_warn(dev->ctrl.device, "IO queues not created\n"); 18183b24774eSKeith Busch nvme_kill_queues(&dev->ctrl); 18195bae7f73SChristoph Hellwig nvme_remove_namespaces(&dev->ctrl); 182057dacad5SJay Sternberg } else { 182125646264SKeith Busch nvme_start_queues(&dev->ctrl); 182257dacad5SJay Sternberg nvme_dev_add(dev); 182357dacad5SJay Sternberg } 182457dacad5SJay Sternberg 1825bb8d261eSChristoph Hellwig if (!nvme_change_ctrl_state(&dev->ctrl, NVME_CTRL_LIVE)) { 1826bb8d261eSChristoph Hellwig dev_warn(dev->ctrl.device, "failed to mark controller live\n"); 1827bb8d261eSChristoph Hellwig goto out; 1828bb8d261eSChristoph Hellwig } 182992911a55SChristoph Hellwig 183092911a55SChristoph Hellwig if (dev->online_queues > 1) 18315955be21SChristoph Hellwig nvme_queue_scan(&dev->ctrl); 183257dacad5SJay Sternberg return; 183357dacad5SJay Sternberg 183457dacad5SJay Sternberg out: 1835f58944e2SKeith Busch nvme_remove_dead_ctrl(dev, result); 183657dacad5SJay Sternberg } 183757dacad5SJay Sternberg 18385c8809e6SChristoph Hellwig static void nvme_remove_dead_ctrl_work(struct work_struct *work) 183957dacad5SJay Sternberg { 18405c8809e6SChristoph Hellwig struct nvme_dev *dev = container_of(work, struct nvme_dev, remove_work); 184157dacad5SJay Sternberg struct pci_dev *pdev = to_pci_dev(dev->dev); 184257dacad5SJay Sternberg 184369d9a99cSKeith Busch nvme_kill_queues(&dev->ctrl); 184457dacad5SJay Sternberg if (pci_get_drvdata(pdev)) 1845921920abSKeith Busch device_release_driver(&pdev->dev); 18461673f1f0SChristoph Hellwig nvme_put_ctrl(&dev->ctrl); 184757dacad5SJay Sternberg } 184857dacad5SJay Sternberg 184957dacad5SJay Sternberg static int nvme_reset(struct nvme_dev *dev) 185057dacad5SJay Sternberg { 18511c63dc66SChristoph Hellwig if (!dev->ctrl.admin_q || blk_queue_dying(dev->ctrl.admin_q)) 185257dacad5SJay Sternberg return -ENODEV; 1853c5f6ce97SKeith Busch if (work_busy(&dev->reset_work)) 1854c5f6ce97SKeith Busch return -ENODEV; 1855846cc05fSChristoph Hellwig if (!queue_work(nvme_workq, &dev->reset_work)) 1856846cc05fSChristoph Hellwig return -EBUSY; 185757dacad5SJay Sternberg return 0; 185857dacad5SJay Sternberg } 185957dacad5SJay Sternberg 18601c63dc66SChristoph Hellwig static int nvme_pci_reg_read32(struct nvme_ctrl *ctrl, u32 off, u32 *val) 186157dacad5SJay Sternberg { 18621c63dc66SChristoph Hellwig *val = readl(to_nvme_dev(ctrl)->bar + off); 18631c63dc66SChristoph Hellwig return 0; 186457dacad5SJay Sternberg } 18651c63dc66SChristoph Hellwig 18665fd4ce1bSChristoph Hellwig static int nvme_pci_reg_write32(struct nvme_ctrl *ctrl, u32 off, u32 val) 18675fd4ce1bSChristoph Hellwig { 18685fd4ce1bSChristoph Hellwig writel(val, to_nvme_dev(ctrl)->bar + off); 18695fd4ce1bSChristoph Hellwig return 0; 18705fd4ce1bSChristoph Hellwig } 18715fd4ce1bSChristoph Hellwig 18727fd8930fSChristoph Hellwig static int nvme_pci_reg_read64(struct nvme_ctrl *ctrl, u32 off, u64 *val) 18737fd8930fSChristoph Hellwig { 18747fd8930fSChristoph Hellwig *val = readq(to_nvme_dev(ctrl)->bar + off); 18757fd8930fSChristoph Hellwig return 0; 18767fd8930fSChristoph Hellwig } 18777fd8930fSChristoph Hellwig 1878f3ca80fcSChristoph Hellwig static int nvme_pci_reset_ctrl(struct nvme_ctrl *ctrl) 1879f3ca80fcSChristoph Hellwig { 1880c5f6ce97SKeith Busch struct nvme_dev *dev = to_nvme_dev(ctrl); 1881c5f6ce97SKeith Busch int ret = nvme_reset(dev); 1882c5f6ce97SKeith Busch 1883c5f6ce97SKeith Busch if (!ret) 1884c5f6ce97SKeith Busch flush_work(&dev->reset_work); 1885c5f6ce97SKeith Busch return ret; 1886f3ca80fcSChristoph Hellwig } 1887f3ca80fcSChristoph Hellwig 18881c63dc66SChristoph Hellwig static const struct nvme_ctrl_ops nvme_pci_ctrl_ops = { 18891a353d85SMing Lin .name = "pcie", 1890e439bb12SSagi Grimberg .module = THIS_MODULE, 18911c63dc66SChristoph Hellwig .reg_read32 = nvme_pci_reg_read32, 18925fd4ce1bSChristoph Hellwig .reg_write32 = nvme_pci_reg_write32, 18937fd8930fSChristoph Hellwig .reg_read64 = nvme_pci_reg_read64, 1894f3ca80fcSChristoph Hellwig .reset_ctrl = nvme_pci_reset_ctrl, 18951673f1f0SChristoph Hellwig .free_ctrl = nvme_pci_free_ctrl, 1896f866fc42SChristoph Hellwig .submit_async_event = nvme_pci_submit_async_event, 18971c63dc66SChristoph Hellwig }; 189857dacad5SJay Sternberg 1899b00a726aSKeith Busch static int nvme_dev_map(struct nvme_dev *dev) 1900b00a726aSKeith Busch { 1901b00a726aSKeith Busch struct pci_dev *pdev = to_pci_dev(dev->dev); 1902b00a726aSKeith Busch 1903a1f447b3SJohannes Thumshirn if (pci_request_mem_regions(pdev, "nvme")) 1904b00a726aSKeith Busch return -ENODEV; 1905b00a726aSKeith Busch 1906b00a726aSKeith Busch dev->bar = ioremap(pci_resource_start(pdev, 0), 8192); 1907b00a726aSKeith Busch if (!dev->bar) 1908b00a726aSKeith Busch goto release; 1909b00a726aSKeith Busch 1910b00a726aSKeith Busch return 0; 1911b00a726aSKeith Busch release: 1912a1f447b3SJohannes Thumshirn pci_release_mem_regions(pdev); 1913b00a726aSKeith Busch return -ENODEV; 1914b00a726aSKeith Busch } 1915b00a726aSKeith Busch 191657dacad5SJay Sternberg static int nvme_probe(struct pci_dev *pdev, const struct pci_device_id *id) 191757dacad5SJay Sternberg { 191857dacad5SJay Sternberg int node, result = -ENOMEM; 191957dacad5SJay Sternberg struct nvme_dev *dev; 192057dacad5SJay Sternberg 192157dacad5SJay Sternberg node = dev_to_node(&pdev->dev); 192257dacad5SJay Sternberg if (node == NUMA_NO_NODE) 19232fa84351SMasayoshi Mizuma set_dev_node(&pdev->dev, first_memory_node); 192457dacad5SJay Sternberg 192557dacad5SJay Sternberg dev = kzalloc_node(sizeof(*dev), GFP_KERNEL, node); 192657dacad5SJay Sternberg if (!dev) 192757dacad5SJay Sternberg return -ENOMEM; 192857dacad5SJay Sternberg dev->queues = kzalloc_node((num_possible_cpus() + 1) * sizeof(void *), 192957dacad5SJay Sternberg GFP_KERNEL, node); 193057dacad5SJay Sternberg if (!dev->queues) 193157dacad5SJay Sternberg goto free; 193257dacad5SJay Sternberg 193357dacad5SJay Sternberg dev->dev = get_device(&pdev->dev); 193457dacad5SJay Sternberg pci_set_drvdata(pdev, dev); 193557dacad5SJay Sternberg 1936b00a726aSKeith Busch result = nvme_dev_map(dev); 1937b00a726aSKeith Busch if (result) 1938b00a726aSKeith Busch goto free; 1939b00a726aSKeith Busch 1940f3ca80fcSChristoph Hellwig INIT_WORK(&dev->reset_work, nvme_reset_work); 19415c8809e6SChristoph Hellwig INIT_WORK(&dev->remove_work, nvme_remove_dead_ctrl_work); 19422d55cd5fSChristoph Hellwig setup_timer(&dev->watchdog_timer, nvme_watchdog_timer, 19432d55cd5fSChristoph Hellwig (unsigned long)dev); 194477bf25eaSKeith Busch mutex_init(&dev->shutdown_lock); 1945db3cbfffSKeith Busch init_completion(&dev->ioq_wait); 1946f3ca80fcSChristoph Hellwig 1947f3ca80fcSChristoph Hellwig result = nvme_setup_prp_pools(dev); 1948f3ca80fcSChristoph Hellwig if (result) 1949f3ca80fcSChristoph Hellwig goto put_pci; 1950f3ca80fcSChristoph Hellwig 1951f3ca80fcSChristoph Hellwig result = nvme_init_ctrl(&dev->ctrl, &pdev->dev, &nvme_pci_ctrl_ops, 1952f3ca80fcSChristoph Hellwig id->driver_data); 1953f3ca80fcSChristoph Hellwig if (result) 1954f3ca80fcSChristoph Hellwig goto release_pools; 1955f3ca80fcSChristoph Hellwig 19561b3c47c1SSagi Grimberg dev_info(dev->ctrl.device, "pci function %s\n", dev_name(&pdev->dev)); 19571b3c47c1SSagi Grimberg 195892f7a162SKeith Busch queue_work(nvme_workq, &dev->reset_work); 195957dacad5SJay Sternberg return 0; 196057dacad5SJay Sternberg 196157dacad5SJay Sternberg release_pools: 196257dacad5SJay Sternberg nvme_release_prp_pools(dev); 196357dacad5SJay Sternberg put_pci: 196457dacad5SJay Sternberg put_device(dev->dev); 1965b00a726aSKeith Busch nvme_dev_unmap(dev); 196657dacad5SJay Sternberg free: 196757dacad5SJay Sternberg kfree(dev->queues); 196857dacad5SJay Sternberg kfree(dev); 196957dacad5SJay Sternberg return result; 197057dacad5SJay Sternberg } 197157dacad5SJay Sternberg 197257dacad5SJay Sternberg static void nvme_reset_notify(struct pci_dev *pdev, bool prepare) 197357dacad5SJay Sternberg { 197457dacad5SJay Sternberg struct nvme_dev *dev = pci_get_drvdata(pdev); 197557dacad5SJay Sternberg 197657dacad5SJay Sternberg if (prepare) 1977a5cdb68cSKeith Busch nvme_dev_disable(dev, false); 197857dacad5SJay Sternberg else 1979c5f6ce97SKeith Busch nvme_reset(dev); 198057dacad5SJay Sternberg } 198157dacad5SJay Sternberg 198257dacad5SJay Sternberg static void nvme_shutdown(struct pci_dev *pdev) 198357dacad5SJay Sternberg { 198457dacad5SJay Sternberg struct nvme_dev *dev = pci_get_drvdata(pdev); 1985a5cdb68cSKeith Busch nvme_dev_disable(dev, true); 198657dacad5SJay Sternberg } 198757dacad5SJay Sternberg 1988f58944e2SKeith Busch /* 1989f58944e2SKeith Busch * The driver's remove may be called on a device in a partially initialized 1990f58944e2SKeith Busch * state. This function must not have any dependencies on the device state in 1991f58944e2SKeith Busch * order to proceed. 1992f58944e2SKeith Busch */ 199357dacad5SJay Sternberg static void nvme_remove(struct pci_dev *pdev) 199457dacad5SJay Sternberg { 199557dacad5SJay Sternberg struct nvme_dev *dev = pci_get_drvdata(pdev); 199657dacad5SJay Sternberg 1997bb8d261eSChristoph Hellwig nvme_change_ctrl_state(&dev->ctrl, NVME_CTRL_DELETING); 1998bb8d261eSChristoph Hellwig 199957dacad5SJay Sternberg pci_set_drvdata(pdev, NULL); 20000ff9d4e1SKeith Busch 20016db28edaSKeith Busch if (!pci_device_is_present(pdev)) { 20020ff9d4e1SKeith Busch nvme_change_ctrl_state(&dev->ctrl, NVME_CTRL_DEAD); 20036db28edaSKeith Busch nvme_dev_disable(dev, false); 20046db28edaSKeith Busch } 20050ff9d4e1SKeith Busch 20069bf2b972SKeith Busch flush_work(&dev->reset_work); 200753029b04SKeith Busch nvme_uninit_ctrl(&dev->ctrl); 2008a5cdb68cSKeith Busch nvme_dev_disable(dev, true); 200957dacad5SJay Sternberg nvme_dev_remove_admin(dev); 201057dacad5SJay Sternberg nvme_free_queues(dev, 0); 201157dacad5SJay Sternberg nvme_release_cmb(dev); 201257dacad5SJay Sternberg nvme_release_prp_pools(dev); 2013b00a726aSKeith Busch nvme_dev_unmap(dev); 20141673f1f0SChristoph Hellwig nvme_put_ctrl(&dev->ctrl); 201557dacad5SJay Sternberg } 201657dacad5SJay Sternberg 201713880f5bSKeith Busch static int nvme_pci_sriov_configure(struct pci_dev *pdev, int numvfs) 201813880f5bSKeith Busch { 201913880f5bSKeith Busch int ret = 0; 202013880f5bSKeith Busch 202113880f5bSKeith Busch if (numvfs == 0) { 202213880f5bSKeith Busch if (pci_vfs_assigned(pdev)) { 202313880f5bSKeith Busch dev_warn(&pdev->dev, 202413880f5bSKeith Busch "Cannot disable SR-IOV VFs while assigned\n"); 202513880f5bSKeith Busch return -EPERM; 202613880f5bSKeith Busch } 202713880f5bSKeith Busch pci_disable_sriov(pdev); 202813880f5bSKeith Busch return 0; 202913880f5bSKeith Busch } 203013880f5bSKeith Busch 203113880f5bSKeith Busch ret = pci_enable_sriov(pdev, numvfs); 203213880f5bSKeith Busch return ret ? ret : numvfs; 203313880f5bSKeith Busch } 203413880f5bSKeith Busch 203557dacad5SJay Sternberg #ifdef CONFIG_PM_SLEEP 203657dacad5SJay Sternberg static int nvme_suspend(struct device *dev) 203757dacad5SJay Sternberg { 203857dacad5SJay Sternberg struct pci_dev *pdev = to_pci_dev(dev); 203957dacad5SJay Sternberg struct nvme_dev *ndev = pci_get_drvdata(pdev); 204057dacad5SJay Sternberg 2041a5cdb68cSKeith Busch nvme_dev_disable(ndev, true); 204257dacad5SJay Sternberg return 0; 204357dacad5SJay Sternberg } 204457dacad5SJay Sternberg 204557dacad5SJay Sternberg static int nvme_resume(struct device *dev) 204657dacad5SJay Sternberg { 204757dacad5SJay Sternberg struct pci_dev *pdev = to_pci_dev(dev); 204857dacad5SJay Sternberg struct nvme_dev *ndev = pci_get_drvdata(pdev); 204957dacad5SJay Sternberg 2050c5f6ce97SKeith Busch nvme_reset(ndev); 205157dacad5SJay Sternberg return 0; 205257dacad5SJay Sternberg } 205357dacad5SJay Sternberg #endif 205457dacad5SJay Sternberg 205557dacad5SJay Sternberg static SIMPLE_DEV_PM_OPS(nvme_dev_pm_ops, nvme_suspend, nvme_resume); 205657dacad5SJay Sternberg 2057a0a3408eSKeith Busch static pci_ers_result_t nvme_error_detected(struct pci_dev *pdev, 2058a0a3408eSKeith Busch pci_channel_state_t state) 2059a0a3408eSKeith Busch { 2060a0a3408eSKeith Busch struct nvme_dev *dev = pci_get_drvdata(pdev); 2061a0a3408eSKeith Busch 2062a0a3408eSKeith Busch /* 2063a0a3408eSKeith Busch * A frozen channel requires a reset. When detected, this method will 2064a0a3408eSKeith Busch * shutdown the controller to quiesce. The controller will be restarted 2065a0a3408eSKeith Busch * after the slot reset through driver's slot_reset callback. 2066a0a3408eSKeith Busch */ 2067a0a3408eSKeith Busch switch (state) { 2068a0a3408eSKeith Busch case pci_channel_io_normal: 2069a0a3408eSKeith Busch return PCI_ERS_RESULT_CAN_RECOVER; 2070a0a3408eSKeith Busch case pci_channel_io_frozen: 2071d011fb31SKeith Busch dev_warn(dev->ctrl.device, 2072d011fb31SKeith Busch "frozen state error detected, reset controller\n"); 2073a5cdb68cSKeith Busch nvme_dev_disable(dev, false); 2074a0a3408eSKeith Busch return PCI_ERS_RESULT_NEED_RESET; 2075a0a3408eSKeith Busch case pci_channel_io_perm_failure: 2076d011fb31SKeith Busch dev_warn(dev->ctrl.device, 2077d011fb31SKeith Busch "failure state error detected, request disconnect\n"); 2078a0a3408eSKeith Busch return PCI_ERS_RESULT_DISCONNECT; 2079a0a3408eSKeith Busch } 2080a0a3408eSKeith Busch return PCI_ERS_RESULT_NEED_RESET; 2081a0a3408eSKeith Busch } 2082a0a3408eSKeith Busch 2083a0a3408eSKeith Busch static pci_ers_result_t nvme_slot_reset(struct pci_dev *pdev) 2084a0a3408eSKeith Busch { 2085a0a3408eSKeith Busch struct nvme_dev *dev = pci_get_drvdata(pdev); 2086a0a3408eSKeith Busch 20871b3c47c1SSagi Grimberg dev_info(dev->ctrl.device, "restart after slot reset\n"); 2088a0a3408eSKeith Busch pci_restore_state(pdev); 2089c5f6ce97SKeith Busch nvme_reset(dev); 2090a0a3408eSKeith Busch return PCI_ERS_RESULT_RECOVERED; 2091a0a3408eSKeith Busch } 2092a0a3408eSKeith Busch 2093a0a3408eSKeith Busch static void nvme_error_resume(struct pci_dev *pdev) 2094a0a3408eSKeith Busch { 2095a0a3408eSKeith Busch pci_cleanup_aer_uncorrect_error_status(pdev); 2096a0a3408eSKeith Busch } 2097a0a3408eSKeith Busch 209857dacad5SJay Sternberg static const struct pci_error_handlers nvme_err_handler = { 209957dacad5SJay Sternberg .error_detected = nvme_error_detected, 210057dacad5SJay Sternberg .slot_reset = nvme_slot_reset, 210157dacad5SJay Sternberg .resume = nvme_error_resume, 210257dacad5SJay Sternberg .reset_notify = nvme_reset_notify, 210357dacad5SJay Sternberg }; 210457dacad5SJay Sternberg 210557dacad5SJay Sternberg static const struct pci_device_id nvme_id_table[] = { 2106106198edSChristoph Hellwig { PCI_VDEVICE(INTEL, 0x0953), 210708095e70SKeith Busch .driver_data = NVME_QUIRK_STRIPE_SIZE | 210808095e70SKeith Busch NVME_QUIRK_DISCARD_ZEROES, }, 210999466e70SKeith Busch { PCI_VDEVICE(INTEL, 0x0a53), 211099466e70SKeith Busch .driver_data = NVME_QUIRK_STRIPE_SIZE | 211199466e70SKeith Busch NVME_QUIRK_DISCARD_ZEROES, }, 211299466e70SKeith Busch { PCI_VDEVICE(INTEL, 0x0a54), 211399466e70SKeith Busch .driver_data = NVME_QUIRK_STRIPE_SIZE | 211499466e70SKeith Busch NVME_QUIRK_DISCARD_ZEROES, }, 2115540c801cSKeith Busch { PCI_VDEVICE(INTEL, 0x5845), /* Qemu emulated controller */ 2116540c801cSKeith Busch .driver_data = NVME_QUIRK_IDENTIFY_CNS, }, 211754adc010SGuilherme G. Piccoli { PCI_DEVICE(0x1c58, 0x0003), /* HGST adapter */ 211854adc010SGuilherme G. Piccoli .driver_data = NVME_QUIRK_DELAY_BEFORE_CHK_RDY, }, 2119015282c9SWenbo Wang { PCI_DEVICE(0x1c5f, 0x0540), /* Memblaze Pblaze4 adapter */ 2120015282c9SWenbo Wang .driver_data = NVME_QUIRK_DELAY_BEFORE_CHK_RDY, }, 212157dacad5SJay Sternberg { PCI_DEVICE_CLASS(PCI_CLASS_STORAGE_EXPRESS, 0xffffff) }, 2122c74dc780SStephan Günther { PCI_DEVICE(PCI_VENDOR_ID_APPLE, 0x2001) }, 2123124298bdSDaniel Roschka { PCI_DEVICE(PCI_VENDOR_ID_APPLE, 0x2003) }, 212457dacad5SJay Sternberg { 0, } 212557dacad5SJay Sternberg }; 212657dacad5SJay Sternberg MODULE_DEVICE_TABLE(pci, nvme_id_table); 212757dacad5SJay Sternberg 212857dacad5SJay Sternberg static struct pci_driver nvme_driver = { 212957dacad5SJay Sternberg .name = "nvme", 213057dacad5SJay Sternberg .id_table = nvme_id_table, 213157dacad5SJay Sternberg .probe = nvme_probe, 213257dacad5SJay Sternberg .remove = nvme_remove, 213357dacad5SJay Sternberg .shutdown = nvme_shutdown, 213457dacad5SJay Sternberg .driver = { 213557dacad5SJay Sternberg .pm = &nvme_dev_pm_ops, 213657dacad5SJay Sternberg }, 213713880f5bSKeith Busch .sriov_configure = nvme_pci_sriov_configure, 213857dacad5SJay Sternberg .err_handler = &nvme_err_handler, 213957dacad5SJay Sternberg }; 214057dacad5SJay Sternberg 214157dacad5SJay Sternberg static int __init nvme_init(void) 214257dacad5SJay Sternberg { 214357dacad5SJay Sternberg int result; 214457dacad5SJay Sternberg 214592f7a162SKeith Busch nvme_workq = alloc_workqueue("nvme", WQ_UNBOUND | WQ_MEM_RECLAIM, 0); 214657dacad5SJay Sternberg if (!nvme_workq) 214757dacad5SJay Sternberg return -ENOMEM; 214857dacad5SJay Sternberg 214957dacad5SJay Sternberg result = pci_register_driver(&nvme_driver); 215057dacad5SJay Sternberg if (result) 215157dacad5SJay Sternberg destroy_workqueue(nvme_workq); 215257dacad5SJay Sternberg return result; 215357dacad5SJay Sternberg } 215457dacad5SJay Sternberg 215557dacad5SJay Sternberg static void __exit nvme_exit(void) 215657dacad5SJay Sternberg { 215757dacad5SJay Sternberg pci_unregister_driver(&nvme_driver); 215857dacad5SJay Sternberg destroy_workqueue(nvme_workq); 215957dacad5SJay Sternberg _nvme_check_size(); 216057dacad5SJay Sternberg } 216157dacad5SJay Sternberg 216257dacad5SJay Sternberg MODULE_AUTHOR("Matthew Wilcox <willy@linux.intel.com>"); 216357dacad5SJay Sternberg MODULE_LICENSE("GPL"); 216457dacad5SJay Sternberg MODULE_VERSION("1.0"); 216557dacad5SJay Sternberg module_init(nvme_init); 216657dacad5SJay Sternberg module_exit(nvme_exit); 2167