xref: /openbmc/linux/drivers/nvme/host/nvme.h (revision c0d3b831)
1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3  * Copyright (c) 2011-2014, Intel Corporation.
4  */
5 
6 #ifndef _NVME_H
7 #define _NVME_H
8 
9 #include <linux/nvme.h>
10 #include <linux/cdev.h>
11 #include <linux/pci.h>
12 #include <linux/kref.h>
13 #include <linux/blk-mq.h>
14 #include <linux/sed-opal.h>
15 #include <linux/fault-inject.h>
16 #include <linux/rcupdate.h>
17 #include <linux/wait.h>
18 #include <linux/t10-pi.h>
19 
20 #include <trace/events/block.h>
21 
22 extern unsigned int nvme_io_timeout;
23 #define NVME_IO_TIMEOUT	(nvme_io_timeout * HZ)
24 
25 extern unsigned int admin_timeout;
26 #define NVME_ADMIN_TIMEOUT	(admin_timeout * HZ)
27 
28 #define NVME_DEFAULT_KATO	5
29 
30 #ifdef CONFIG_ARCH_NO_SG_CHAIN
31 #define  NVME_INLINE_SG_CNT  0
32 #define  NVME_INLINE_METADATA_SG_CNT  0
33 #else
34 #define  NVME_INLINE_SG_CNT  2
35 #define  NVME_INLINE_METADATA_SG_CNT  1
36 #endif
37 
38 /*
39  * Default to a 4K page size, with the intention to update this
40  * path in the future to accommodate architectures with differing
41  * kernel and IO page sizes.
42  */
43 #define NVME_CTRL_PAGE_SHIFT	12
44 #define NVME_CTRL_PAGE_SIZE	(1 << NVME_CTRL_PAGE_SHIFT)
45 
46 extern struct workqueue_struct *nvme_wq;
47 extern struct workqueue_struct *nvme_reset_wq;
48 extern struct workqueue_struct *nvme_delete_wq;
49 
50 /*
51  * List of workarounds for devices that required behavior not specified in
52  * the standard.
53  */
54 enum nvme_quirks {
55 	/*
56 	 * Prefers I/O aligned to a stripe size specified in a vendor
57 	 * specific Identify field.
58 	 */
59 	NVME_QUIRK_STRIPE_SIZE			= (1 << 0),
60 
61 	/*
62 	 * The controller doesn't handle Identify value others than 0 or 1
63 	 * correctly.
64 	 */
65 	NVME_QUIRK_IDENTIFY_CNS			= (1 << 1),
66 
67 	/*
68 	 * The controller deterministically returns O's on reads to
69 	 * logical blocks that deallocate was called on.
70 	 */
71 	NVME_QUIRK_DEALLOCATE_ZEROES		= (1 << 2),
72 
73 	/*
74 	 * The controller needs a delay before starts checking the device
75 	 * readiness, which is done by reading the NVME_CSTS_RDY bit.
76 	 */
77 	NVME_QUIRK_DELAY_BEFORE_CHK_RDY		= (1 << 3),
78 
79 	/*
80 	 * APST should not be used.
81 	 */
82 	NVME_QUIRK_NO_APST			= (1 << 4),
83 
84 	/*
85 	 * The deepest sleep state should not be used.
86 	 */
87 	NVME_QUIRK_NO_DEEPEST_PS		= (1 << 5),
88 
89 	/*
90 	 * Set MEDIUM priority on SQ creation
91 	 */
92 	NVME_QUIRK_MEDIUM_PRIO_SQ		= (1 << 7),
93 
94 	/*
95 	 * Ignore device provided subnqn.
96 	 */
97 	NVME_QUIRK_IGNORE_DEV_SUBNQN		= (1 << 8),
98 
99 	/*
100 	 * Broken Write Zeroes.
101 	 */
102 	NVME_QUIRK_DISABLE_WRITE_ZEROES		= (1 << 9),
103 
104 	/*
105 	 * Force simple suspend/resume path.
106 	 */
107 	NVME_QUIRK_SIMPLE_SUSPEND		= (1 << 10),
108 
109 	/*
110 	 * Use only one interrupt vector for all queues
111 	 */
112 	NVME_QUIRK_SINGLE_VECTOR		= (1 << 11),
113 
114 	/*
115 	 * Use non-standard 128 bytes SQEs.
116 	 */
117 	NVME_QUIRK_128_BYTES_SQES		= (1 << 12),
118 
119 	/*
120 	 * Prevent tag overlap between queues
121 	 */
122 	NVME_QUIRK_SHARED_TAGS                  = (1 << 13),
123 
124 	/*
125 	 * Don't change the value of the temperature threshold feature
126 	 */
127 	NVME_QUIRK_NO_TEMP_THRESH_CHANGE	= (1 << 14),
128 
129 	/*
130 	 * The controller doesn't handle the Identify Namespace
131 	 * Identification Descriptor list subcommand despite claiming
132 	 * NVMe 1.3 compliance.
133 	 */
134 	NVME_QUIRK_NO_NS_DESC_LIST		= (1 << 15),
135 
136 	/*
137 	 * The controller does not properly handle DMA addresses over
138 	 * 48 bits.
139 	 */
140 	NVME_QUIRK_DMA_ADDRESS_BITS_48		= (1 << 16),
141 
142 	/*
143 	 * The controller requires the command_id value be limited, so skip
144 	 * encoding the generation sequence number.
145 	 */
146 	NVME_QUIRK_SKIP_CID_GEN			= (1 << 17),
147 
148 	/*
149 	 * Reports garbage in the namespace identifiers (eui64, nguid, uuid).
150 	 */
151 	NVME_QUIRK_BOGUS_NID			= (1 << 18),
152 };
153 
154 /*
155  * Common request structure for NVMe passthrough.  All drivers must have
156  * this structure as the first member of their request-private data.
157  */
158 struct nvme_request {
159 	struct nvme_command	*cmd;
160 	union nvme_result	result;
161 	u8			genctr;
162 	u8			retries;
163 	u8			flags;
164 	u16			status;
165 #ifdef CONFIG_NVME_MULTIPATH
166 	unsigned long		start_time;
167 #endif
168 	struct nvme_ctrl	*ctrl;
169 };
170 
171 /*
172  * Mark a bio as coming in through the mpath node.
173  */
174 #define REQ_NVME_MPATH		REQ_DRV
175 
176 enum {
177 	NVME_REQ_CANCELLED		= (1 << 0),
178 	NVME_REQ_USERCMD		= (1 << 1),
179 	NVME_MPATH_IO_STATS		= (1 << 2),
180 };
181 
182 static inline struct nvme_request *nvme_req(struct request *req)
183 {
184 	return blk_mq_rq_to_pdu(req);
185 }
186 
187 static inline u16 nvme_req_qid(struct request *req)
188 {
189 	if (!req->q->queuedata)
190 		return 0;
191 
192 	return req->mq_hctx->queue_num + 1;
193 }
194 
195 /* The below value is the specific amount of delay needed before checking
196  * readiness in case of the PCI_DEVICE(0x1c58, 0x0003), which needs the
197  * NVME_QUIRK_DELAY_BEFORE_CHK_RDY quirk enabled. The value (in ms) was
198  * found empirically.
199  */
200 #define NVME_QUIRK_DELAY_AMOUNT		2300
201 
202 /*
203  * enum nvme_ctrl_state: Controller state
204  *
205  * @NVME_CTRL_NEW:		New controller just allocated, initial state
206  * @NVME_CTRL_LIVE:		Controller is connected and I/O capable
207  * @NVME_CTRL_RESETTING:	Controller is resetting (or scheduled reset)
208  * @NVME_CTRL_CONNECTING:	Controller is disconnected, now connecting the
209  *				transport
210  * @NVME_CTRL_DELETING:		Controller is deleting (or scheduled deletion)
211  * @NVME_CTRL_DELETING_NOIO:	Controller is deleting and I/O is not
212  *				disabled/failed immediately. This state comes
213  * 				after all async event processing took place and
214  * 				before ns removal and the controller deletion
215  * 				progress
216  * @NVME_CTRL_DEAD:		Controller is non-present/unresponsive during
217  *				shutdown or removal. In this case we forcibly
218  *				kill all inflight I/O as they have no chance to
219  *				complete
220  */
221 enum nvme_ctrl_state {
222 	NVME_CTRL_NEW,
223 	NVME_CTRL_LIVE,
224 	NVME_CTRL_RESETTING,
225 	NVME_CTRL_CONNECTING,
226 	NVME_CTRL_DELETING,
227 	NVME_CTRL_DELETING_NOIO,
228 	NVME_CTRL_DEAD,
229 };
230 
231 struct nvme_fault_inject {
232 #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS
233 	struct fault_attr attr;
234 	struct dentry *parent;
235 	bool dont_retry;	/* DNR, do not retry */
236 	u16 status;		/* status code */
237 #endif
238 };
239 
240 enum nvme_ctrl_flags {
241 	NVME_CTRL_FAILFAST_EXPIRED	= 0,
242 	NVME_CTRL_ADMIN_Q_STOPPED	= 1,
243 	NVME_CTRL_STARTED_ONCE		= 2,
244 	NVME_CTRL_STOPPED		= 3,
245 };
246 
247 struct nvme_ctrl {
248 	bool comp_seen;
249 	enum nvme_ctrl_state state;
250 	bool identified;
251 	spinlock_t lock;
252 	struct mutex scan_lock;
253 	const struct nvme_ctrl_ops *ops;
254 	struct request_queue *admin_q;
255 	struct request_queue *connect_q;
256 	struct request_queue *fabrics_q;
257 	struct device *dev;
258 	int instance;
259 	int numa_node;
260 	struct blk_mq_tag_set *tagset;
261 	struct blk_mq_tag_set *admin_tagset;
262 	struct list_head namespaces;
263 	struct rw_semaphore namespaces_rwsem;
264 	struct device ctrl_device;
265 	struct device *device;	/* char device */
266 #ifdef CONFIG_NVME_HWMON
267 	struct device *hwmon_device;
268 #endif
269 	struct cdev cdev;
270 	struct work_struct reset_work;
271 	struct work_struct delete_work;
272 	wait_queue_head_t state_wq;
273 
274 	struct nvme_subsystem *subsys;
275 	struct list_head subsys_entry;
276 
277 	struct opal_dev *opal_dev;
278 
279 	char name[12];
280 	u16 cntlid;
281 
282 	u32 ctrl_config;
283 	u16 mtfa;
284 	u32 queue_count;
285 
286 	u64 cap;
287 	u32 max_hw_sectors;
288 	u32 max_segments;
289 	u32 max_integrity_segments;
290 	u32 max_discard_sectors;
291 	u32 max_discard_segments;
292 	u32 max_zeroes_sectors;
293 #ifdef CONFIG_BLK_DEV_ZONED
294 	u32 max_zone_append;
295 #endif
296 	u16 crdt[3];
297 	u16 oncs;
298 	u32 dmrsl;
299 	u16 oacs;
300 	u16 sqsize;
301 	u32 max_namespaces;
302 	atomic_t abort_limit;
303 	u8 vwc;
304 	u32 vs;
305 	u32 sgls;
306 	u16 kas;
307 	u8 npss;
308 	u8 apsta;
309 	u16 wctemp;
310 	u16 cctemp;
311 	u32 oaes;
312 	u32 aen_result;
313 	u32 ctratt;
314 	unsigned int shutdown_timeout;
315 	unsigned int kato;
316 	bool subsystem;
317 	unsigned long quirks;
318 	struct nvme_id_power_state psd[32];
319 	struct nvme_effects_log *effects;
320 	struct xarray cels;
321 	struct work_struct scan_work;
322 	struct work_struct async_event_work;
323 	struct delayed_work ka_work;
324 	struct delayed_work failfast_work;
325 	struct nvme_command ka_cmd;
326 	struct work_struct fw_act_work;
327 	unsigned long events;
328 
329 #ifdef CONFIG_NVME_MULTIPATH
330 	/* asymmetric namespace access: */
331 	u8 anacap;
332 	u8 anatt;
333 	u32 anagrpmax;
334 	u32 nanagrpid;
335 	struct mutex ana_lock;
336 	struct nvme_ana_rsp_hdr *ana_log_buf;
337 	size_t ana_log_size;
338 	struct timer_list anatt_timer;
339 	struct work_struct ana_work;
340 #endif
341 
342 #ifdef CONFIG_NVME_AUTH
343 	struct work_struct dhchap_auth_work;
344 	struct mutex dhchap_auth_mutex;
345 	struct nvme_dhchap_queue_context *dhchap_ctxs;
346 	struct nvme_dhchap_key *host_key;
347 	struct nvme_dhchap_key *ctrl_key;
348 	u16 transaction;
349 #endif
350 
351 	/* Power saving configuration */
352 	u64 ps_max_latency_us;
353 	bool apst_enabled;
354 
355 	/* PCIe only: */
356 	u32 hmpre;
357 	u32 hmmin;
358 	u32 hmminds;
359 	u16 hmmaxd;
360 
361 	/* Fabrics only */
362 	u32 ioccsz;
363 	u32 iorcsz;
364 	u16 icdoff;
365 	u16 maxcmd;
366 	int nr_reconnects;
367 	unsigned long flags;
368 	struct nvmf_ctrl_options *opts;
369 
370 	struct page *discard_page;
371 	unsigned long discard_page_busy;
372 
373 	struct nvme_fault_inject fault_inject;
374 
375 	enum nvme_ctrl_type cntrltype;
376 	enum nvme_dctype dctype;
377 };
378 
379 enum nvme_iopolicy {
380 	NVME_IOPOLICY_NUMA,
381 	NVME_IOPOLICY_RR,
382 };
383 
384 struct nvme_subsystem {
385 	int			instance;
386 	struct device		dev;
387 	/*
388 	 * Because we unregister the device on the last put we need
389 	 * a separate refcount.
390 	 */
391 	struct kref		ref;
392 	struct list_head	entry;
393 	struct mutex		lock;
394 	struct list_head	ctrls;
395 	struct list_head	nsheads;
396 	char			subnqn[NVMF_NQN_SIZE];
397 	char			serial[20];
398 	char			model[40];
399 	char			firmware_rev[8];
400 	u8			cmic;
401 	enum nvme_subsys_type	subtype;
402 	u16			vendor_id;
403 	u16			awupf;	/* 0's based awupf value. */
404 	struct ida		ns_ida;
405 #ifdef CONFIG_NVME_MULTIPATH
406 	enum nvme_iopolicy	iopolicy;
407 #endif
408 };
409 
410 /*
411  * Container structure for uniqueue namespace identifiers.
412  */
413 struct nvme_ns_ids {
414 	u8	eui64[8];
415 	u8	nguid[16];
416 	uuid_t	uuid;
417 	u8	csi;
418 };
419 
420 /*
421  * Anchor structure for namespaces.  There is one for each namespace in a
422  * NVMe subsystem that any of our controllers can see, and the namespace
423  * structure for each controller is chained of it.  For private namespaces
424  * there is a 1:1 relation to our namespace structures, that is ->list
425  * only ever has a single entry for private namespaces.
426  */
427 struct nvme_ns_head {
428 	struct list_head	list;
429 	struct srcu_struct      srcu;
430 	struct nvme_subsystem	*subsys;
431 	unsigned		ns_id;
432 	struct nvme_ns_ids	ids;
433 	struct list_head	entry;
434 	struct kref		ref;
435 	bool			shared;
436 	int			instance;
437 	struct nvme_effects_log *effects;
438 
439 	struct cdev		cdev;
440 	struct device		cdev_device;
441 
442 	struct gendisk		*disk;
443 #ifdef CONFIG_NVME_MULTIPATH
444 	struct bio_list		requeue_list;
445 	spinlock_t		requeue_lock;
446 	struct work_struct	requeue_work;
447 	struct mutex		lock;
448 	unsigned long		flags;
449 #define NVME_NSHEAD_DISK_LIVE	0
450 	struct nvme_ns __rcu	*current_path[];
451 #endif
452 };
453 
454 static inline bool nvme_ns_head_multipath(struct nvme_ns_head *head)
455 {
456 	return IS_ENABLED(CONFIG_NVME_MULTIPATH) && head->disk;
457 }
458 
459 enum nvme_ns_features {
460 	NVME_NS_EXT_LBAS = 1 << 0, /* support extended LBA format */
461 	NVME_NS_METADATA_SUPPORTED = 1 << 1, /* support getting generated md */
462 	NVME_NS_DEAC,		/* DEAC bit in Write Zeores supported */
463 };
464 
465 struct nvme_ns {
466 	struct list_head list;
467 
468 	struct nvme_ctrl *ctrl;
469 	struct request_queue *queue;
470 	struct gendisk *disk;
471 #ifdef CONFIG_NVME_MULTIPATH
472 	enum nvme_ana_state ana_state;
473 	u32 ana_grpid;
474 #endif
475 	struct list_head siblings;
476 	struct kref kref;
477 	struct nvme_ns_head *head;
478 
479 	int lba_shift;
480 	u16 ms;
481 	u16 pi_size;
482 	u16 sgs;
483 	u32 sws;
484 	u8 pi_type;
485 	u8 guard_type;
486 #ifdef CONFIG_BLK_DEV_ZONED
487 	u64 zsze;
488 #endif
489 	unsigned long features;
490 	unsigned long flags;
491 #define NVME_NS_REMOVING	0
492 #define NVME_NS_ANA_PENDING	2
493 #define NVME_NS_FORCE_RO	3
494 #define NVME_NS_READY		4
495 
496 	struct cdev		cdev;
497 	struct device		cdev_device;
498 
499 	struct nvme_fault_inject fault_inject;
500 
501 };
502 
503 /* NVMe ns supports metadata actions by the controller (generate/strip) */
504 static inline bool nvme_ns_has_pi(struct nvme_ns *ns)
505 {
506 	return ns->pi_type && ns->ms == ns->pi_size;
507 }
508 
509 struct nvme_ctrl_ops {
510 	const char *name;
511 	struct module *module;
512 	unsigned int flags;
513 #define NVME_F_FABRICS			(1 << 0)
514 #define NVME_F_METADATA_SUPPORTED	(1 << 1)
515 #define NVME_F_BLOCKING			(1 << 2)
516 
517 	const struct attribute_group **dev_attr_groups;
518 	int (*reg_read32)(struct nvme_ctrl *ctrl, u32 off, u32 *val);
519 	int (*reg_write32)(struct nvme_ctrl *ctrl, u32 off, u32 val);
520 	int (*reg_read64)(struct nvme_ctrl *ctrl, u32 off, u64 *val);
521 	void (*free_ctrl)(struct nvme_ctrl *ctrl);
522 	void (*submit_async_event)(struct nvme_ctrl *ctrl);
523 	void (*delete_ctrl)(struct nvme_ctrl *ctrl);
524 	void (*stop_ctrl)(struct nvme_ctrl *ctrl);
525 	int (*get_address)(struct nvme_ctrl *ctrl, char *buf, int size);
526 	void (*print_device_info)(struct nvme_ctrl *ctrl);
527 	bool (*supports_pci_p2pdma)(struct nvme_ctrl *ctrl);
528 };
529 
530 /*
531  * nvme command_id is constructed as such:
532  * | xxxx | xxxxxxxxxxxx |
533  *   gen    request tag
534  */
535 #define nvme_genctr_mask(gen)			(gen & 0xf)
536 #define nvme_cid_install_genctr(gen)		(nvme_genctr_mask(gen) << 12)
537 #define nvme_genctr_from_cid(cid)		((cid & 0xf000) >> 12)
538 #define nvme_tag_from_cid(cid)			(cid & 0xfff)
539 
540 static inline u16 nvme_cid(struct request *rq)
541 {
542 	return nvme_cid_install_genctr(nvme_req(rq)->genctr) | rq->tag;
543 }
544 
545 static inline struct request *nvme_find_rq(struct blk_mq_tags *tags,
546 		u16 command_id)
547 {
548 	u8 genctr = nvme_genctr_from_cid(command_id);
549 	u16 tag = nvme_tag_from_cid(command_id);
550 	struct request *rq;
551 
552 	rq = blk_mq_tag_to_rq(tags, tag);
553 	if (unlikely(!rq)) {
554 		pr_err("could not locate request for tag %#x\n",
555 			tag);
556 		return NULL;
557 	}
558 	if (unlikely(nvme_genctr_mask(nvme_req(rq)->genctr) != genctr)) {
559 		dev_err(nvme_req(rq)->ctrl->device,
560 			"request %#x genctr mismatch (got %#x expected %#x)\n",
561 			tag, genctr, nvme_genctr_mask(nvme_req(rq)->genctr));
562 		return NULL;
563 	}
564 	return rq;
565 }
566 
567 static inline struct request *nvme_cid_to_rq(struct blk_mq_tags *tags,
568                 u16 command_id)
569 {
570 	return blk_mq_tag_to_rq(tags, nvme_tag_from_cid(command_id));
571 }
572 
573 /*
574  * Return the length of the string without the space padding
575  */
576 static inline int nvme_strlen(char *s, int len)
577 {
578 	while (s[len - 1] == ' ')
579 		len--;
580 	return len;
581 }
582 
583 static inline void nvme_print_device_info(struct nvme_ctrl *ctrl)
584 {
585 	struct nvme_subsystem *subsys = ctrl->subsys;
586 
587 	if (ctrl->ops->print_device_info) {
588 		ctrl->ops->print_device_info(ctrl);
589 		return;
590 	}
591 
592 	dev_err(ctrl->device,
593 		"VID:%04x model:%.*s firmware:%.*s\n", subsys->vendor_id,
594 		nvme_strlen(subsys->model, sizeof(subsys->model)),
595 		subsys->model, nvme_strlen(subsys->firmware_rev,
596 					   sizeof(subsys->firmware_rev)),
597 		subsys->firmware_rev);
598 }
599 
600 #ifdef CONFIG_FAULT_INJECTION_DEBUG_FS
601 void nvme_fault_inject_init(struct nvme_fault_inject *fault_inj,
602 			    const char *dev_name);
603 void nvme_fault_inject_fini(struct nvme_fault_inject *fault_inject);
604 void nvme_should_fail(struct request *req);
605 #else
606 static inline void nvme_fault_inject_init(struct nvme_fault_inject *fault_inj,
607 					  const char *dev_name)
608 {
609 }
610 static inline void nvme_fault_inject_fini(struct nvme_fault_inject *fault_inj)
611 {
612 }
613 static inline void nvme_should_fail(struct request *req) {}
614 #endif
615 
616 bool nvme_wait_reset(struct nvme_ctrl *ctrl);
617 int nvme_try_sched_reset(struct nvme_ctrl *ctrl);
618 
619 static inline int nvme_reset_subsystem(struct nvme_ctrl *ctrl)
620 {
621 	int ret;
622 
623 	if (!ctrl->subsystem)
624 		return -ENOTTY;
625 	if (!nvme_wait_reset(ctrl))
626 		return -EBUSY;
627 
628 	ret = ctrl->ops->reg_write32(ctrl, NVME_REG_NSSR, 0x4E564D65);
629 	if (ret)
630 		return ret;
631 
632 	return nvme_try_sched_reset(ctrl);
633 }
634 
635 /*
636  * Convert a 512B sector number to a device logical block number.
637  */
638 static inline u64 nvme_sect_to_lba(struct nvme_ns *ns, sector_t sector)
639 {
640 	return sector >> (ns->lba_shift - SECTOR_SHIFT);
641 }
642 
643 /*
644  * Convert a device logical block number to a 512B sector number.
645  */
646 static inline sector_t nvme_lba_to_sect(struct nvme_ns *ns, u64 lba)
647 {
648 	return lba << (ns->lba_shift - SECTOR_SHIFT);
649 }
650 
651 /*
652  * Convert byte length to nvme's 0-based num dwords
653  */
654 static inline u32 nvme_bytes_to_numd(size_t len)
655 {
656 	return (len >> 2) - 1;
657 }
658 
659 static inline bool nvme_is_ana_error(u16 status)
660 {
661 	switch (status & 0x7ff) {
662 	case NVME_SC_ANA_TRANSITION:
663 	case NVME_SC_ANA_INACCESSIBLE:
664 	case NVME_SC_ANA_PERSISTENT_LOSS:
665 		return true;
666 	default:
667 		return false;
668 	}
669 }
670 
671 static inline bool nvme_is_path_error(u16 status)
672 {
673 	/* check for a status code type of 'path related status' */
674 	return (status & 0x700) == 0x300;
675 }
676 
677 /*
678  * Fill in the status and result information from the CQE, and then figure out
679  * if blk-mq will need to use IPI magic to complete the request, and if yes do
680  * so.  If not let the caller complete the request without an indirect function
681  * call.
682  */
683 static inline bool nvme_try_complete_req(struct request *req, __le16 status,
684 		union nvme_result result)
685 {
686 	struct nvme_request *rq = nvme_req(req);
687 	struct nvme_ctrl *ctrl = rq->ctrl;
688 
689 	if (!(ctrl->quirks & NVME_QUIRK_SKIP_CID_GEN))
690 		rq->genctr++;
691 
692 	rq->status = le16_to_cpu(status) >> 1;
693 	rq->result = result;
694 	/* inject error when permitted by fault injection framework */
695 	nvme_should_fail(req);
696 	if (unlikely(blk_should_fake_timeout(req->q)))
697 		return true;
698 	return blk_mq_complete_request_remote(req);
699 }
700 
701 static inline void nvme_get_ctrl(struct nvme_ctrl *ctrl)
702 {
703 	get_device(ctrl->device);
704 }
705 
706 static inline void nvme_put_ctrl(struct nvme_ctrl *ctrl)
707 {
708 	put_device(ctrl->device);
709 }
710 
711 static inline bool nvme_is_aen_req(u16 qid, __u16 command_id)
712 {
713 	return !qid &&
714 		nvme_tag_from_cid(command_id) >= NVME_AQ_BLK_MQ_DEPTH;
715 }
716 
717 void nvme_complete_rq(struct request *req);
718 void nvme_complete_batch_req(struct request *req);
719 
720 static __always_inline void nvme_complete_batch(struct io_comp_batch *iob,
721 						void (*fn)(struct request *rq))
722 {
723 	struct request *req;
724 
725 	rq_list_for_each(&iob->req_list, req) {
726 		fn(req);
727 		nvme_complete_batch_req(req);
728 	}
729 	blk_mq_end_request_batch(iob);
730 }
731 
732 blk_status_t nvme_host_path_error(struct request *req);
733 bool nvme_cancel_request(struct request *req, void *data);
734 void nvme_cancel_tagset(struct nvme_ctrl *ctrl);
735 void nvme_cancel_admin_tagset(struct nvme_ctrl *ctrl);
736 bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl,
737 		enum nvme_ctrl_state new_state);
738 int nvme_disable_ctrl(struct nvme_ctrl *ctrl, bool shutdown);
739 int nvme_enable_ctrl(struct nvme_ctrl *ctrl);
740 int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev,
741 		const struct nvme_ctrl_ops *ops, unsigned long quirks);
742 void nvme_uninit_ctrl(struct nvme_ctrl *ctrl);
743 void nvme_start_ctrl(struct nvme_ctrl *ctrl);
744 void nvme_stop_ctrl(struct nvme_ctrl *ctrl);
745 int nvme_init_ctrl_finish(struct nvme_ctrl *ctrl, bool was_suspended);
746 int nvme_alloc_admin_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set,
747 		const struct blk_mq_ops *ops, unsigned int cmd_size);
748 void nvme_remove_admin_tag_set(struct nvme_ctrl *ctrl);
749 int nvme_alloc_io_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set,
750 		const struct blk_mq_ops *ops, unsigned int nr_maps,
751 		unsigned int cmd_size);
752 void nvme_remove_io_tag_set(struct nvme_ctrl *ctrl);
753 
754 void nvme_remove_namespaces(struct nvme_ctrl *ctrl);
755 
756 void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status,
757 		volatile union nvme_result *res);
758 
759 void nvme_quiesce_io_queues(struct nvme_ctrl *ctrl);
760 void nvme_unquiesce_io_queues(struct nvme_ctrl *ctrl);
761 void nvme_quiesce_admin_queue(struct nvme_ctrl *ctrl);
762 void nvme_unquiesce_admin_queue(struct nvme_ctrl *ctrl);
763 void nvme_mark_namespaces_dead(struct nvme_ctrl *ctrl);
764 void nvme_sync_queues(struct nvme_ctrl *ctrl);
765 void nvme_sync_io_queues(struct nvme_ctrl *ctrl);
766 void nvme_unfreeze(struct nvme_ctrl *ctrl);
767 void nvme_wait_freeze(struct nvme_ctrl *ctrl);
768 int nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout);
769 void nvme_start_freeze(struct nvme_ctrl *ctrl);
770 
771 static inline enum req_op nvme_req_op(struct nvme_command *cmd)
772 {
773 	return nvme_is_write(cmd) ? REQ_OP_DRV_OUT : REQ_OP_DRV_IN;
774 }
775 
776 #define NVME_QID_ANY -1
777 void nvme_init_request(struct request *req, struct nvme_command *cmd);
778 void nvme_cleanup_cmd(struct request *req);
779 blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req);
780 blk_status_t nvme_fail_nonready_command(struct nvme_ctrl *ctrl,
781 		struct request *req);
782 bool __nvme_check_ready(struct nvme_ctrl *ctrl, struct request *rq,
783 		bool queue_live);
784 
785 static inline bool nvme_check_ready(struct nvme_ctrl *ctrl, struct request *rq,
786 		bool queue_live)
787 {
788 	if (likely(ctrl->state == NVME_CTRL_LIVE))
789 		return true;
790 	if (ctrl->ops->flags & NVME_F_FABRICS &&
791 	    ctrl->state == NVME_CTRL_DELETING)
792 		return queue_live;
793 	return __nvme_check_ready(ctrl, rq, queue_live);
794 }
795 
796 /*
797  * NSID shall be unique for all shared namespaces, or if at least one of the
798  * following conditions is met:
799  *   1. Namespace Management is supported by the controller
800  *   2. ANA is supported by the controller
801  *   3. NVM Set are supported by the controller
802  *
803  * In other case, private namespace are not required to report a unique NSID.
804  */
805 static inline bool nvme_is_unique_nsid(struct nvme_ctrl *ctrl,
806 		struct nvme_ns_head *head)
807 {
808 	return head->shared ||
809 		(ctrl->oacs & NVME_CTRL_OACS_NS_MNGT_SUPP) ||
810 		(ctrl->subsys->cmic & NVME_CTRL_CMIC_ANA) ||
811 		(ctrl->ctratt & NVME_CTRL_CTRATT_NVM_SETS);
812 }
813 
814 int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
815 		void *buf, unsigned bufflen);
816 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
817 		union nvme_result *result, void *buffer, unsigned bufflen,
818 		int qid, int at_head,
819 		blk_mq_req_flags_t flags);
820 int nvme_set_features(struct nvme_ctrl *dev, unsigned int fid,
821 		      unsigned int dword11, void *buffer, size_t buflen,
822 		      u32 *result);
823 int nvme_get_features(struct nvme_ctrl *dev, unsigned int fid,
824 		      unsigned int dword11, void *buffer, size_t buflen,
825 		      u32 *result);
826 int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count);
827 void nvme_stop_keep_alive(struct nvme_ctrl *ctrl);
828 int nvme_reset_ctrl(struct nvme_ctrl *ctrl);
829 int nvme_reset_ctrl_sync(struct nvme_ctrl *ctrl);
830 int nvme_delete_ctrl(struct nvme_ctrl *ctrl);
831 void nvme_queue_scan(struct nvme_ctrl *ctrl);
832 int nvme_get_log(struct nvme_ctrl *ctrl, u32 nsid, u8 log_page, u8 lsp, u8 csi,
833 		void *log, size_t size, u64 offset);
834 bool nvme_tryget_ns_head(struct nvme_ns_head *head);
835 void nvme_put_ns_head(struct nvme_ns_head *head);
836 int nvme_cdev_add(struct cdev *cdev, struct device *cdev_device,
837 		const struct file_operations *fops, struct module *owner);
838 void nvme_cdev_del(struct cdev *cdev, struct device *cdev_device);
839 int nvme_ioctl(struct block_device *bdev, fmode_t mode,
840 		unsigned int cmd, unsigned long arg);
841 long nvme_ns_chr_ioctl(struct file *file, unsigned int cmd, unsigned long arg);
842 int nvme_ns_head_ioctl(struct block_device *bdev, fmode_t mode,
843 		unsigned int cmd, unsigned long arg);
844 long nvme_ns_head_chr_ioctl(struct file *file, unsigned int cmd,
845 		unsigned long arg);
846 long nvme_dev_ioctl(struct file *file, unsigned int cmd,
847 		unsigned long arg);
848 int nvme_ns_chr_uring_cmd_iopoll(struct io_uring_cmd *ioucmd,
849 		struct io_comp_batch *iob, unsigned int poll_flags);
850 int nvme_ns_head_chr_uring_cmd_iopoll(struct io_uring_cmd *ioucmd,
851 		struct io_comp_batch *iob, unsigned int poll_flags);
852 int nvme_ns_chr_uring_cmd(struct io_uring_cmd *ioucmd,
853 		unsigned int issue_flags);
854 int nvme_ns_head_chr_uring_cmd(struct io_uring_cmd *ioucmd,
855 		unsigned int issue_flags);
856 int nvme_getgeo(struct block_device *bdev, struct hd_geometry *geo);
857 int nvme_dev_uring_cmd(struct io_uring_cmd *ioucmd, unsigned int issue_flags);
858 
859 extern const struct attribute_group *nvme_ns_id_attr_groups[];
860 extern const struct pr_ops nvme_pr_ops;
861 extern const struct block_device_operations nvme_ns_head_ops;
862 extern const struct attribute_group nvme_dev_attrs_group;
863 
864 struct nvme_ns *nvme_find_path(struct nvme_ns_head *head);
865 #ifdef CONFIG_NVME_MULTIPATH
866 static inline bool nvme_ctrl_use_ana(struct nvme_ctrl *ctrl)
867 {
868 	return ctrl->ana_log_buf != NULL;
869 }
870 
871 void nvme_mpath_unfreeze(struct nvme_subsystem *subsys);
872 void nvme_mpath_wait_freeze(struct nvme_subsystem *subsys);
873 void nvme_mpath_start_freeze(struct nvme_subsystem *subsys);
874 void nvme_mpath_default_iopolicy(struct nvme_subsystem *subsys);
875 void nvme_failover_req(struct request *req);
876 void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl);
877 int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl,struct nvme_ns_head *head);
878 void nvme_mpath_add_disk(struct nvme_ns *ns, __le32 anagrpid);
879 void nvme_mpath_remove_disk(struct nvme_ns_head *head);
880 int nvme_mpath_init_identify(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id);
881 void nvme_mpath_init_ctrl(struct nvme_ctrl *ctrl);
882 void nvme_mpath_update(struct nvme_ctrl *ctrl);
883 void nvme_mpath_uninit(struct nvme_ctrl *ctrl);
884 void nvme_mpath_stop(struct nvme_ctrl *ctrl);
885 bool nvme_mpath_clear_current_path(struct nvme_ns *ns);
886 void nvme_mpath_revalidate_paths(struct nvme_ns *ns);
887 void nvme_mpath_clear_ctrl_paths(struct nvme_ctrl *ctrl);
888 void nvme_mpath_shutdown_disk(struct nvme_ns_head *head);
889 void nvme_mpath_start_request(struct request *rq);
890 void nvme_mpath_end_request(struct request *rq);
891 
892 static inline void nvme_trace_bio_complete(struct request *req)
893 {
894 	struct nvme_ns *ns = req->q->queuedata;
895 
896 	if ((req->cmd_flags & REQ_NVME_MPATH) && req->bio)
897 		trace_block_bio_complete(ns->head->disk->queue, req->bio);
898 }
899 
900 extern bool multipath;
901 extern struct device_attribute dev_attr_ana_grpid;
902 extern struct device_attribute dev_attr_ana_state;
903 extern struct device_attribute subsys_attr_iopolicy;
904 
905 #else
906 #define multipath false
907 static inline bool nvme_ctrl_use_ana(struct nvme_ctrl *ctrl)
908 {
909 	return false;
910 }
911 static inline void nvme_failover_req(struct request *req)
912 {
913 }
914 static inline void nvme_kick_requeue_lists(struct nvme_ctrl *ctrl)
915 {
916 }
917 static inline int nvme_mpath_alloc_disk(struct nvme_ctrl *ctrl,
918 		struct nvme_ns_head *head)
919 {
920 	return 0;
921 }
922 static inline void nvme_mpath_add_disk(struct nvme_ns *ns, __le32 anagrpid)
923 {
924 }
925 static inline void nvme_mpath_remove_disk(struct nvme_ns_head *head)
926 {
927 }
928 static inline bool nvme_mpath_clear_current_path(struct nvme_ns *ns)
929 {
930 	return false;
931 }
932 static inline void nvme_mpath_revalidate_paths(struct nvme_ns *ns)
933 {
934 }
935 static inline void nvme_mpath_clear_ctrl_paths(struct nvme_ctrl *ctrl)
936 {
937 }
938 static inline void nvme_mpath_shutdown_disk(struct nvme_ns_head *head)
939 {
940 }
941 static inline void nvme_trace_bio_complete(struct request *req)
942 {
943 }
944 static inline void nvme_mpath_init_ctrl(struct nvme_ctrl *ctrl)
945 {
946 }
947 static inline int nvme_mpath_init_identify(struct nvme_ctrl *ctrl,
948 		struct nvme_id_ctrl *id)
949 {
950 	if (ctrl->subsys->cmic & NVME_CTRL_CMIC_ANA)
951 		dev_warn(ctrl->device,
952 "Please enable CONFIG_NVME_MULTIPATH for full support of multi-port devices.\n");
953 	return 0;
954 }
955 static inline void nvme_mpath_update(struct nvme_ctrl *ctrl)
956 {
957 }
958 static inline void nvme_mpath_uninit(struct nvme_ctrl *ctrl)
959 {
960 }
961 static inline void nvme_mpath_stop(struct nvme_ctrl *ctrl)
962 {
963 }
964 static inline void nvme_mpath_unfreeze(struct nvme_subsystem *subsys)
965 {
966 }
967 static inline void nvme_mpath_wait_freeze(struct nvme_subsystem *subsys)
968 {
969 }
970 static inline void nvme_mpath_start_freeze(struct nvme_subsystem *subsys)
971 {
972 }
973 static inline void nvme_mpath_default_iopolicy(struct nvme_subsystem *subsys)
974 {
975 }
976 static inline void nvme_mpath_start_request(struct request *rq)
977 {
978 }
979 static inline void nvme_mpath_end_request(struct request *rq)
980 {
981 }
982 #endif /* CONFIG_NVME_MULTIPATH */
983 
984 int nvme_revalidate_zones(struct nvme_ns *ns);
985 int nvme_ns_report_zones(struct nvme_ns *ns, sector_t sector,
986 		unsigned int nr_zones, report_zones_cb cb, void *data);
987 #ifdef CONFIG_BLK_DEV_ZONED
988 int nvme_update_zone_info(struct nvme_ns *ns, unsigned lbaf);
989 blk_status_t nvme_setup_zone_mgmt_send(struct nvme_ns *ns, struct request *req,
990 				       struct nvme_command *cmnd,
991 				       enum nvme_zone_mgmt_action action);
992 #else
993 static inline blk_status_t nvme_setup_zone_mgmt_send(struct nvme_ns *ns,
994 		struct request *req, struct nvme_command *cmnd,
995 		enum nvme_zone_mgmt_action action)
996 {
997 	return BLK_STS_NOTSUPP;
998 }
999 
1000 static inline int nvme_update_zone_info(struct nvme_ns *ns, unsigned lbaf)
1001 {
1002 	dev_warn(ns->ctrl->device,
1003 		 "Please enable CONFIG_BLK_DEV_ZONED to support ZNS devices\n");
1004 	return -EPROTONOSUPPORT;
1005 }
1006 #endif
1007 
1008 static inline struct nvme_ns *nvme_get_ns_from_dev(struct device *dev)
1009 {
1010 	return dev_to_disk(dev)->private_data;
1011 }
1012 
1013 #ifdef CONFIG_NVME_HWMON
1014 int nvme_hwmon_init(struct nvme_ctrl *ctrl);
1015 void nvme_hwmon_exit(struct nvme_ctrl *ctrl);
1016 #else
1017 static inline int nvme_hwmon_init(struct nvme_ctrl *ctrl)
1018 {
1019 	return 0;
1020 }
1021 
1022 static inline void nvme_hwmon_exit(struct nvme_ctrl *ctrl)
1023 {
1024 }
1025 #endif
1026 
1027 static inline void nvme_start_request(struct request *rq)
1028 {
1029 	if (rq->cmd_flags & REQ_NVME_MPATH)
1030 		nvme_mpath_start_request(rq);
1031 	blk_mq_start_request(rq);
1032 }
1033 
1034 static inline bool nvme_ctrl_sgl_supported(struct nvme_ctrl *ctrl)
1035 {
1036 	return ctrl->sgls & ((1 << 0) | (1 << 1));
1037 }
1038 
1039 #ifdef CONFIG_NVME_AUTH
1040 int __init nvme_init_auth(void);
1041 void __exit nvme_exit_auth(void);
1042 int nvme_auth_init_ctrl(struct nvme_ctrl *ctrl);
1043 void nvme_auth_stop(struct nvme_ctrl *ctrl);
1044 int nvme_auth_negotiate(struct nvme_ctrl *ctrl, int qid);
1045 int nvme_auth_wait(struct nvme_ctrl *ctrl, int qid);
1046 void nvme_auth_free(struct nvme_ctrl *ctrl);
1047 #else
1048 static inline int nvme_auth_init_ctrl(struct nvme_ctrl *ctrl)
1049 {
1050 	return 0;
1051 }
1052 static inline int __init nvme_init_auth(void)
1053 {
1054 	return 0;
1055 }
1056 static inline void __exit nvme_exit_auth(void)
1057 {
1058 }
1059 static inline void nvme_auth_stop(struct nvme_ctrl *ctrl) {};
1060 static inline int nvme_auth_negotiate(struct nvme_ctrl *ctrl, int qid)
1061 {
1062 	return -EPROTONOSUPPORT;
1063 }
1064 static inline int nvme_auth_wait(struct nvme_ctrl *ctrl, int qid)
1065 {
1066 	return NVME_SC_AUTH_REQUIRED;
1067 }
1068 static inline void nvme_auth_free(struct nvme_ctrl *ctrl) {};
1069 #endif
1070 
1071 u32 nvme_command_effects(struct nvme_ctrl *ctrl, struct nvme_ns *ns,
1072 			 u8 opcode);
1073 int nvme_execute_passthru_rq(struct request *rq, u32 *effects);
1074 void nvme_passthru_end(struct nvme_ctrl *ctrl, u32 effects,
1075 		       struct nvme_command *cmd, int status);
1076 struct nvme_ctrl *nvme_ctrl_from_file(struct file *file);
1077 struct nvme_ns *nvme_find_get_ns(struct nvme_ctrl *ctrl, unsigned nsid);
1078 void nvme_put_ns(struct nvme_ns *ns);
1079 
1080 static inline bool nvme_multi_css(struct nvme_ctrl *ctrl)
1081 {
1082 	return (ctrl->ctrl_config & NVME_CC_CSS_MASK) == NVME_CC_CSS_CSI;
1083 }
1084 
1085 #ifdef CONFIG_NVME_VERBOSE_ERRORS
1086 const unsigned char *nvme_get_error_status_str(u16 status);
1087 const unsigned char *nvme_get_opcode_str(u8 opcode);
1088 const unsigned char *nvme_get_admin_opcode_str(u8 opcode);
1089 #else /* CONFIG_NVME_VERBOSE_ERRORS */
1090 static inline const unsigned char *nvme_get_error_status_str(u16 status)
1091 {
1092 	return "I/O Error";
1093 }
1094 static inline const unsigned char *nvme_get_opcode_str(u8 opcode)
1095 {
1096 	return "I/O Cmd";
1097 }
1098 static inline const unsigned char *nvme_get_admin_opcode_str(u8 opcode)
1099 {
1100 	return "Admin Cmd";
1101 }
1102 #endif /* CONFIG_NVME_VERBOSE_ERRORS */
1103 
1104 #endif /* _NVME_H */
1105