1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * NVM Express device driver 4 * Copyright (c) 2011-2014, Intel Corporation. 5 */ 6 7 #include <linux/blkdev.h> 8 #include <linux/blk-mq.h> 9 #include <linux/blk-integrity.h> 10 #include <linux/compat.h> 11 #include <linux/delay.h> 12 #include <linux/errno.h> 13 #include <linux/hdreg.h> 14 #include <linux/kernel.h> 15 #include <linux/module.h> 16 #include <linux/backing-dev.h> 17 #include <linux/slab.h> 18 #include <linux/types.h> 19 #include <linux/pr.h> 20 #include <linux/ptrace.h> 21 #include <linux/nvme_ioctl.h> 22 #include <linux/pm_qos.h> 23 #include <asm/unaligned.h> 24 25 #include "nvme.h" 26 #include "fabrics.h" 27 #include <linux/nvme-auth.h> 28 29 #define CREATE_TRACE_POINTS 30 #include "trace.h" 31 32 #define NVME_MINORS (1U << MINORBITS) 33 34 struct nvme_ns_info { 35 struct nvme_ns_ids ids; 36 u32 nsid; 37 __le32 anagrpid; 38 bool is_shared; 39 bool is_readonly; 40 bool is_ready; 41 bool is_removed; 42 }; 43 44 unsigned int admin_timeout = 60; 45 module_param(admin_timeout, uint, 0644); 46 MODULE_PARM_DESC(admin_timeout, "timeout in seconds for admin commands"); 47 EXPORT_SYMBOL_GPL(admin_timeout); 48 49 unsigned int nvme_io_timeout = 30; 50 module_param_named(io_timeout, nvme_io_timeout, uint, 0644); 51 MODULE_PARM_DESC(io_timeout, "timeout in seconds for I/O"); 52 EXPORT_SYMBOL_GPL(nvme_io_timeout); 53 54 static unsigned char shutdown_timeout = 5; 55 module_param(shutdown_timeout, byte, 0644); 56 MODULE_PARM_DESC(shutdown_timeout, "timeout in seconds for controller shutdown"); 57 58 static u8 nvme_max_retries = 5; 59 module_param_named(max_retries, nvme_max_retries, byte, 0644); 60 MODULE_PARM_DESC(max_retries, "max number of retries a command may have"); 61 62 static unsigned long default_ps_max_latency_us = 100000; 63 module_param(default_ps_max_latency_us, ulong, 0644); 64 MODULE_PARM_DESC(default_ps_max_latency_us, 65 "max power saving latency for new devices; use PM QOS to change per device"); 66 67 static bool force_apst; 68 module_param(force_apst, bool, 0644); 69 MODULE_PARM_DESC(force_apst, "allow APST for newly enumerated devices even if quirked off"); 70 71 static unsigned long apst_primary_timeout_ms = 100; 72 module_param(apst_primary_timeout_ms, ulong, 0644); 73 MODULE_PARM_DESC(apst_primary_timeout_ms, 74 "primary APST timeout in ms"); 75 76 static unsigned long apst_secondary_timeout_ms = 2000; 77 module_param(apst_secondary_timeout_ms, ulong, 0644); 78 MODULE_PARM_DESC(apst_secondary_timeout_ms, 79 "secondary APST timeout in ms"); 80 81 static unsigned long apst_primary_latency_tol_us = 15000; 82 module_param(apst_primary_latency_tol_us, ulong, 0644); 83 MODULE_PARM_DESC(apst_primary_latency_tol_us, 84 "primary APST latency tolerance in us"); 85 86 static unsigned long apst_secondary_latency_tol_us = 100000; 87 module_param(apst_secondary_latency_tol_us, ulong, 0644); 88 MODULE_PARM_DESC(apst_secondary_latency_tol_us, 89 "secondary APST latency tolerance in us"); 90 91 /* 92 * nvme_wq - hosts nvme related works that are not reset or delete 93 * nvme_reset_wq - hosts nvme reset works 94 * nvme_delete_wq - hosts nvme delete works 95 * 96 * nvme_wq will host works such as scan, aen handling, fw activation, 97 * keep-alive, periodic reconnects etc. nvme_reset_wq 98 * runs reset works which also flush works hosted on nvme_wq for 99 * serialization purposes. nvme_delete_wq host controller deletion 100 * works which flush reset works for serialization. 101 */ 102 struct workqueue_struct *nvme_wq; 103 EXPORT_SYMBOL_GPL(nvme_wq); 104 105 struct workqueue_struct *nvme_reset_wq; 106 EXPORT_SYMBOL_GPL(nvme_reset_wq); 107 108 struct workqueue_struct *nvme_delete_wq; 109 EXPORT_SYMBOL_GPL(nvme_delete_wq); 110 111 static LIST_HEAD(nvme_subsystems); 112 DEFINE_MUTEX(nvme_subsystems_lock); 113 114 static DEFINE_IDA(nvme_instance_ida); 115 static dev_t nvme_ctrl_base_chr_devt; 116 static struct class *nvme_class; 117 static struct class *nvme_subsys_class; 118 119 static DEFINE_IDA(nvme_ns_chr_minor_ida); 120 static dev_t nvme_ns_chr_devt; 121 static struct class *nvme_ns_chr_class; 122 123 static void nvme_put_subsystem(struct nvme_subsystem *subsys); 124 static void nvme_remove_invalid_namespaces(struct nvme_ctrl *ctrl, 125 unsigned nsid); 126 static void nvme_update_keep_alive(struct nvme_ctrl *ctrl, 127 struct nvme_command *cmd); 128 129 void nvme_queue_scan(struct nvme_ctrl *ctrl) 130 { 131 /* 132 * Only new queue scan work when admin and IO queues are both alive 133 */ 134 if (nvme_ctrl_state(ctrl) == NVME_CTRL_LIVE && ctrl->tagset) 135 queue_work(nvme_wq, &ctrl->scan_work); 136 } 137 138 /* 139 * Use this function to proceed with scheduling reset_work for a controller 140 * that had previously been set to the resetting state. This is intended for 141 * code paths that can't be interrupted by other reset attempts. A hot removal 142 * may prevent this from succeeding. 143 */ 144 int nvme_try_sched_reset(struct nvme_ctrl *ctrl) 145 { 146 if (nvme_ctrl_state(ctrl) != NVME_CTRL_RESETTING) 147 return -EBUSY; 148 if (!queue_work(nvme_reset_wq, &ctrl->reset_work)) 149 return -EBUSY; 150 return 0; 151 } 152 EXPORT_SYMBOL_GPL(nvme_try_sched_reset); 153 154 static void nvme_failfast_work(struct work_struct *work) 155 { 156 struct nvme_ctrl *ctrl = container_of(to_delayed_work(work), 157 struct nvme_ctrl, failfast_work); 158 159 if (nvme_ctrl_state(ctrl) != NVME_CTRL_CONNECTING) 160 return; 161 162 set_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags); 163 dev_info(ctrl->device, "failfast expired\n"); 164 nvme_kick_requeue_lists(ctrl); 165 } 166 167 static inline void nvme_start_failfast_work(struct nvme_ctrl *ctrl) 168 { 169 if (!ctrl->opts || ctrl->opts->fast_io_fail_tmo == -1) 170 return; 171 172 schedule_delayed_work(&ctrl->failfast_work, 173 ctrl->opts->fast_io_fail_tmo * HZ); 174 } 175 176 static inline void nvme_stop_failfast_work(struct nvme_ctrl *ctrl) 177 { 178 if (!ctrl->opts) 179 return; 180 181 cancel_delayed_work_sync(&ctrl->failfast_work); 182 clear_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags); 183 } 184 185 186 int nvme_reset_ctrl(struct nvme_ctrl *ctrl) 187 { 188 if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING)) 189 return -EBUSY; 190 if (!queue_work(nvme_reset_wq, &ctrl->reset_work)) 191 return -EBUSY; 192 return 0; 193 } 194 EXPORT_SYMBOL_GPL(nvme_reset_ctrl); 195 196 int nvme_reset_ctrl_sync(struct nvme_ctrl *ctrl) 197 { 198 int ret; 199 200 ret = nvme_reset_ctrl(ctrl); 201 if (!ret) { 202 flush_work(&ctrl->reset_work); 203 if (nvme_ctrl_state(ctrl) != NVME_CTRL_LIVE) 204 ret = -ENETRESET; 205 } 206 207 return ret; 208 } 209 210 static void nvme_do_delete_ctrl(struct nvme_ctrl *ctrl) 211 { 212 dev_info(ctrl->device, 213 "Removing ctrl: NQN \"%s\"\n", nvmf_ctrl_subsysnqn(ctrl)); 214 215 flush_work(&ctrl->reset_work); 216 nvme_stop_ctrl(ctrl); 217 nvme_remove_namespaces(ctrl); 218 ctrl->ops->delete_ctrl(ctrl); 219 nvme_uninit_ctrl(ctrl); 220 } 221 222 static void nvme_delete_ctrl_work(struct work_struct *work) 223 { 224 struct nvme_ctrl *ctrl = 225 container_of(work, struct nvme_ctrl, delete_work); 226 227 nvme_do_delete_ctrl(ctrl); 228 } 229 230 int nvme_delete_ctrl(struct nvme_ctrl *ctrl) 231 { 232 if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_DELETING)) 233 return -EBUSY; 234 if (!queue_work(nvme_delete_wq, &ctrl->delete_work)) 235 return -EBUSY; 236 return 0; 237 } 238 EXPORT_SYMBOL_GPL(nvme_delete_ctrl); 239 240 void nvme_delete_ctrl_sync(struct nvme_ctrl *ctrl) 241 { 242 /* 243 * Keep a reference until nvme_do_delete_ctrl() complete, 244 * since ->delete_ctrl can free the controller. 245 */ 246 nvme_get_ctrl(ctrl); 247 if (nvme_change_ctrl_state(ctrl, NVME_CTRL_DELETING)) 248 nvme_do_delete_ctrl(ctrl); 249 nvme_put_ctrl(ctrl); 250 } 251 252 static blk_status_t nvme_error_status(u16 status) 253 { 254 switch (status & 0x7ff) { 255 case NVME_SC_SUCCESS: 256 return BLK_STS_OK; 257 case NVME_SC_CAP_EXCEEDED: 258 return BLK_STS_NOSPC; 259 case NVME_SC_LBA_RANGE: 260 case NVME_SC_CMD_INTERRUPTED: 261 case NVME_SC_NS_NOT_READY: 262 return BLK_STS_TARGET; 263 case NVME_SC_BAD_ATTRIBUTES: 264 case NVME_SC_ONCS_NOT_SUPPORTED: 265 case NVME_SC_INVALID_OPCODE: 266 case NVME_SC_INVALID_FIELD: 267 case NVME_SC_INVALID_NS: 268 return BLK_STS_NOTSUPP; 269 case NVME_SC_WRITE_FAULT: 270 case NVME_SC_READ_ERROR: 271 case NVME_SC_UNWRITTEN_BLOCK: 272 case NVME_SC_ACCESS_DENIED: 273 case NVME_SC_READ_ONLY: 274 case NVME_SC_COMPARE_FAILED: 275 return BLK_STS_MEDIUM; 276 case NVME_SC_GUARD_CHECK: 277 case NVME_SC_APPTAG_CHECK: 278 case NVME_SC_REFTAG_CHECK: 279 case NVME_SC_INVALID_PI: 280 return BLK_STS_PROTECTION; 281 case NVME_SC_RESERVATION_CONFLICT: 282 return BLK_STS_RESV_CONFLICT; 283 case NVME_SC_HOST_PATH_ERROR: 284 return BLK_STS_TRANSPORT; 285 case NVME_SC_ZONE_TOO_MANY_ACTIVE: 286 return BLK_STS_ZONE_ACTIVE_RESOURCE; 287 case NVME_SC_ZONE_TOO_MANY_OPEN: 288 return BLK_STS_ZONE_OPEN_RESOURCE; 289 default: 290 return BLK_STS_IOERR; 291 } 292 } 293 294 static void nvme_retry_req(struct request *req) 295 { 296 unsigned long delay = 0; 297 u16 crd; 298 299 /* The mask and shift result must be <= 3 */ 300 crd = (nvme_req(req)->status & NVME_SC_CRD) >> 11; 301 if (crd) 302 delay = nvme_req(req)->ctrl->crdt[crd - 1] * 100; 303 304 nvme_req(req)->retries++; 305 blk_mq_requeue_request(req, false); 306 blk_mq_delay_kick_requeue_list(req->q, delay); 307 } 308 309 static void nvme_log_error(struct request *req) 310 { 311 struct nvme_ns *ns = req->q->queuedata; 312 struct nvme_request *nr = nvme_req(req); 313 314 if (ns) { 315 pr_err_ratelimited("%s: %s(0x%x) @ LBA %llu, %llu blocks, %s (sct 0x%x / sc 0x%x) %s%s\n", 316 ns->disk ? ns->disk->disk_name : "?", 317 nvme_get_opcode_str(nr->cmd->common.opcode), 318 nr->cmd->common.opcode, 319 (unsigned long long)nvme_sect_to_lba(ns, blk_rq_pos(req)), 320 (unsigned long long)blk_rq_bytes(req) >> ns->lba_shift, 321 nvme_get_error_status_str(nr->status), 322 nr->status >> 8 & 7, /* Status Code Type */ 323 nr->status & 0xff, /* Status Code */ 324 nr->status & NVME_SC_MORE ? "MORE " : "", 325 nr->status & NVME_SC_DNR ? "DNR " : ""); 326 return; 327 } 328 329 pr_err_ratelimited("%s: %s(0x%x), %s (sct 0x%x / sc 0x%x) %s%s\n", 330 dev_name(nr->ctrl->device), 331 nvme_get_admin_opcode_str(nr->cmd->common.opcode), 332 nr->cmd->common.opcode, 333 nvme_get_error_status_str(nr->status), 334 nr->status >> 8 & 7, /* Status Code Type */ 335 nr->status & 0xff, /* Status Code */ 336 nr->status & NVME_SC_MORE ? "MORE " : "", 337 nr->status & NVME_SC_DNR ? "DNR " : ""); 338 } 339 340 enum nvme_disposition { 341 COMPLETE, 342 RETRY, 343 FAILOVER, 344 AUTHENTICATE, 345 }; 346 347 static inline enum nvme_disposition nvme_decide_disposition(struct request *req) 348 { 349 if (likely(nvme_req(req)->status == 0)) 350 return COMPLETE; 351 352 if ((nvme_req(req)->status & 0x7ff) == NVME_SC_AUTH_REQUIRED) 353 return AUTHENTICATE; 354 355 if (blk_noretry_request(req) || 356 (nvme_req(req)->status & NVME_SC_DNR) || 357 nvme_req(req)->retries >= nvme_max_retries) 358 return COMPLETE; 359 360 if (req->cmd_flags & REQ_NVME_MPATH) { 361 if (nvme_is_path_error(nvme_req(req)->status) || 362 blk_queue_dying(req->q)) 363 return FAILOVER; 364 } else { 365 if (blk_queue_dying(req->q)) 366 return COMPLETE; 367 } 368 369 return RETRY; 370 } 371 372 static inline void nvme_end_req_zoned(struct request *req) 373 { 374 if (IS_ENABLED(CONFIG_BLK_DEV_ZONED) && 375 req_op(req) == REQ_OP_ZONE_APPEND) 376 req->__sector = nvme_lba_to_sect(req->q->queuedata, 377 le64_to_cpu(nvme_req(req)->result.u64)); 378 } 379 380 void nvme_end_req(struct request *req) 381 { 382 blk_status_t status = nvme_error_status(nvme_req(req)->status); 383 384 if (unlikely(nvme_req(req)->status && !(req->rq_flags & RQF_QUIET))) 385 nvme_log_error(req); 386 nvme_end_req_zoned(req); 387 nvme_trace_bio_complete(req); 388 if (req->cmd_flags & REQ_NVME_MPATH) 389 nvme_mpath_end_request(req); 390 blk_mq_end_request(req, status); 391 } 392 393 void nvme_complete_rq(struct request *req) 394 { 395 struct nvme_ctrl *ctrl = nvme_req(req)->ctrl; 396 397 trace_nvme_complete_rq(req); 398 nvme_cleanup_cmd(req); 399 400 /* 401 * Completions of long-running commands should not be able to 402 * defer sending of periodic keep alives, since the controller 403 * may have completed processing such commands a long time ago 404 * (arbitrarily close to command submission time). 405 * req->deadline - req->timeout is the command submission time 406 * in jiffies. 407 */ 408 if (ctrl->kas && 409 req->deadline - req->timeout >= ctrl->ka_last_check_time) 410 ctrl->comp_seen = true; 411 412 switch (nvme_decide_disposition(req)) { 413 case COMPLETE: 414 nvme_end_req(req); 415 return; 416 case RETRY: 417 nvme_retry_req(req); 418 return; 419 case FAILOVER: 420 nvme_failover_req(req); 421 return; 422 case AUTHENTICATE: 423 #ifdef CONFIG_NVME_AUTH 424 queue_work(nvme_wq, &ctrl->dhchap_auth_work); 425 nvme_retry_req(req); 426 #else 427 nvme_end_req(req); 428 #endif 429 return; 430 } 431 } 432 EXPORT_SYMBOL_GPL(nvme_complete_rq); 433 434 void nvme_complete_batch_req(struct request *req) 435 { 436 trace_nvme_complete_rq(req); 437 nvme_cleanup_cmd(req); 438 nvme_end_req_zoned(req); 439 } 440 EXPORT_SYMBOL_GPL(nvme_complete_batch_req); 441 442 /* 443 * Called to unwind from ->queue_rq on a failed command submission so that the 444 * multipathing code gets called to potentially failover to another path. 445 * The caller needs to unwind all transport specific resource allocations and 446 * must return propagate the return value. 447 */ 448 blk_status_t nvme_host_path_error(struct request *req) 449 { 450 nvme_req(req)->status = NVME_SC_HOST_PATH_ERROR; 451 blk_mq_set_request_complete(req); 452 nvme_complete_rq(req); 453 return BLK_STS_OK; 454 } 455 EXPORT_SYMBOL_GPL(nvme_host_path_error); 456 457 bool nvme_cancel_request(struct request *req, void *data) 458 { 459 dev_dbg_ratelimited(((struct nvme_ctrl *) data)->device, 460 "Cancelling I/O %d", req->tag); 461 462 /* don't abort one completed or idle request */ 463 if (blk_mq_rq_state(req) != MQ_RQ_IN_FLIGHT) 464 return true; 465 466 nvme_req(req)->status = NVME_SC_HOST_ABORTED_CMD; 467 nvme_req(req)->flags |= NVME_REQ_CANCELLED; 468 blk_mq_complete_request(req); 469 return true; 470 } 471 EXPORT_SYMBOL_GPL(nvme_cancel_request); 472 473 void nvme_cancel_tagset(struct nvme_ctrl *ctrl) 474 { 475 if (ctrl->tagset) { 476 blk_mq_tagset_busy_iter(ctrl->tagset, 477 nvme_cancel_request, ctrl); 478 blk_mq_tagset_wait_completed_request(ctrl->tagset); 479 } 480 } 481 EXPORT_SYMBOL_GPL(nvme_cancel_tagset); 482 483 void nvme_cancel_admin_tagset(struct nvme_ctrl *ctrl) 484 { 485 if (ctrl->admin_tagset) { 486 blk_mq_tagset_busy_iter(ctrl->admin_tagset, 487 nvme_cancel_request, ctrl); 488 blk_mq_tagset_wait_completed_request(ctrl->admin_tagset); 489 } 490 } 491 EXPORT_SYMBOL_GPL(nvme_cancel_admin_tagset); 492 493 bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl, 494 enum nvme_ctrl_state new_state) 495 { 496 enum nvme_ctrl_state old_state; 497 unsigned long flags; 498 bool changed = false; 499 500 spin_lock_irqsave(&ctrl->lock, flags); 501 502 old_state = nvme_ctrl_state(ctrl); 503 switch (new_state) { 504 case NVME_CTRL_LIVE: 505 switch (old_state) { 506 case NVME_CTRL_NEW: 507 case NVME_CTRL_RESETTING: 508 case NVME_CTRL_CONNECTING: 509 changed = true; 510 fallthrough; 511 default: 512 break; 513 } 514 break; 515 case NVME_CTRL_RESETTING: 516 switch (old_state) { 517 case NVME_CTRL_NEW: 518 case NVME_CTRL_LIVE: 519 changed = true; 520 fallthrough; 521 default: 522 break; 523 } 524 break; 525 case NVME_CTRL_CONNECTING: 526 switch (old_state) { 527 case NVME_CTRL_NEW: 528 case NVME_CTRL_RESETTING: 529 changed = true; 530 fallthrough; 531 default: 532 break; 533 } 534 break; 535 case NVME_CTRL_DELETING: 536 switch (old_state) { 537 case NVME_CTRL_LIVE: 538 case NVME_CTRL_RESETTING: 539 case NVME_CTRL_CONNECTING: 540 changed = true; 541 fallthrough; 542 default: 543 break; 544 } 545 break; 546 case NVME_CTRL_DELETING_NOIO: 547 switch (old_state) { 548 case NVME_CTRL_DELETING: 549 case NVME_CTRL_DEAD: 550 changed = true; 551 fallthrough; 552 default: 553 break; 554 } 555 break; 556 case NVME_CTRL_DEAD: 557 switch (old_state) { 558 case NVME_CTRL_DELETING: 559 changed = true; 560 fallthrough; 561 default: 562 break; 563 } 564 break; 565 default: 566 break; 567 } 568 569 if (changed) { 570 WRITE_ONCE(ctrl->state, new_state); 571 wake_up_all(&ctrl->state_wq); 572 } 573 574 spin_unlock_irqrestore(&ctrl->lock, flags); 575 if (!changed) 576 return false; 577 578 if (new_state == NVME_CTRL_LIVE) { 579 if (old_state == NVME_CTRL_CONNECTING) 580 nvme_stop_failfast_work(ctrl); 581 nvme_kick_requeue_lists(ctrl); 582 } else if (new_state == NVME_CTRL_CONNECTING && 583 old_state == NVME_CTRL_RESETTING) { 584 nvme_start_failfast_work(ctrl); 585 } 586 return changed; 587 } 588 EXPORT_SYMBOL_GPL(nvme_change_ctrl_state); 589 590 /* 591 * Waits for the controller state to be resetting, or returns false if it is 592 * not possible to ever transition to that state. 593 */ 594 bool nvme_wait_reset(struct nvme_ctrl *ctrl) 595 { 596 wait_event(ctrl->state_wq, 597 nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING) || 598 nvme_state_terminal(ctrl)); 599 return nvme_ctrl_state(ctrl) == NVME_CTRL_RESETTING; 600 } 601 EXPORT_SYMBOL_GPL(nvme_wait_reset); 602 603 static void nvme_free_ns_head(struct kref *ref) 604 { 605 struct nvme_ns_head *head = 606 container_of(ref, struct nvme_ns_head, ref); 607 608 nvme_mpath_remove_disk(head); 609 ida_free(&head->subsys->ns_ida, head->instance); 610 cleanup_srcu_struct(&head->srcu); 611 nvme_put_subsystem(head->subsys); 612 kfree(head); 613 } 614 615 bool nvme_tryget_ns_head(struct nvme_ns_head *head) 616 { 617 return kref_get_unless_zero(&head->ref); 618 } 619 620 void nvme_put_ns_head(struct nvme_ns_head *head) 621 { 622 kref_put(&head->ref, nvme_free_ns_head); 623 } 624 625 static void nvme_free_ns(struct kref *kref) 626 { 627 struct nvme_ns *ns = container_of(kref, struct nvme_ns, kref); 628 629 put_disk(ns->disk); 630 nvme_put_ns_head(ns->head); 631 nvme_put_ctrl(ns->ctrl); 632 kfree(ns); 633 } 634 635 bool nvme_get_ns(struct nvme_ns *ns) 636 { 637 return kref_get_unless_zero(&ns->kref); 638 } 639 640 void nvme_put_ns(struct nvme_ns *ns) 641 { 642 kref_put(&ns->kref, nvme_free_ns); 643 } 644 EXPORT_SYMBOL_NS_GPL(nvme_put_ns, NVME_TARGET_PASSTHRU); 645 646 static inline void nvme_clear_nvme_request(struct request *req) 647 { 648 nvme_req(req)->status = 0; 649 nvme_req(req)->retries = 0; 650 nvme_req(req)->flags = 0; 651 req->rq_flags |= RQF_DONTPREP; 652 } 653 654 /* initialize a passthrough request */ 655 void nvme_init_request(struct request *req, struct nvme_command *cmd) 656 { 657 if (req->q->queuedata) 658 req->timeout = NVME_IO_TIMEOUT; 659 else /* no queuedata implies admin queue */ 660 req->timeout = NVME_ADMIN_TIMEOUT; 661 662 /* passthru commands should let the driver set the SGL flags */ 663 cmd->common.flags &= ~NVME_CMD_SGL_ALL; 664 665 req->cmd_flags |= REQ_FAILFAST_DRIVER; 666 if (req->mq_hctx->type == HCTX_TYPE_POLL) 667 req->cmd_flags |= REQ_POLLED; 668 nvme_clear_nvme_request(req); 669 req->rq_flags |= RQF_QUIET; 670 memcpy(nvme_req(req)->cmd, cmd, sizeof(*cmd)); 671 } 672 EXPORT_SYMBOL_GPL(nvme_init_request); 673 674 /* 675 * For something we're not in a state to send to the device the default action 676 * is to busy it and retry it after the controller state is recovered. However, 677 * if the controller is deleting or if anything is marked for failfast or 678 * nvme multipath it is immediately failed. 679 * 680 * Note: commands used to initialize the controller will be marked for failfast. 681 * Note: nvme cli/ioctl commands are marked for failfast. 682 */ 683 blk_status_t nvme_fail_nonready_command(struct nvme_ctrl *ctrl, 684 struct request *rq) 685 { 686 enum nvme_ctrl_state state = nvme_ctrl_state(ctrl); 687 688 if (state != NVME_CTRL_DELETING_NOIO && 689 state != NVME_CTRL_DELETING && 690 state != NVME_CTRL_DEAD && 691 !test_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags) && 692 !blk_noretry_request(rq) && !(rq->cmd_flags & REQ_NVME_MPATH)) 693 return BLK_STS_RESOURCE; 694 return nvme_host_path_error(rq); 695 } 696 EXPORT_SYMBOL_GPL(nvme_fail_nonready_command); 697 698 bool __nvme_check_ready(struct nvme_ctrl *ctrl, struct request *rq, 699 bool queue_live) 700 { 701 struct nvme_request *req = nvme_req(rq); 702 703 /* 704 * currently we have a problem sending passthru commands 705 * on the admin_q if the controller is not LIVE because we can't 706 * make sure that they are going out after the admin connect, 707 * controller enable and/or other commands in the initialization 708 * sequence. until the controller will be LIVE, fail with 709 * BLK_STS_RESOURCE so that they will be rescheduled. 710 */ 711 if (rq->q == ctrl->admin_q && (req->flags & NVME_REQ_USERCMD)) 712 return false; 713 714 if (ctrl->ops->flags & NVME_F_FABRICS) { 715 /* 716 * Only allow commands on a live queue, except for the connect 717 * command, which is require to set the queue live in the 718 * appropinquate states. 719 */ 720 switch (nvme_ctrl_state(ctrl)) { 721 case NVME_CTRL_CONNECTING: 722 if (blk_rq_is_passthrough(rq) && nvme_is_fabrics(req->cmd) && 723 (req->cmd->fabrics.fctype == nvme_fabrics_type_connect || 724 req->cmd->fabrics.fctype == nvme_fabrics_type_auth_send || 725 req->cmd->fabrics.fctype == nvme_fabrics_type_auth_receive)) 726 return true; 727 break; 728 default: 729 break; 730 case NVME_CTRL_DEAD: 731 return false; 732 } 733 } 734 735 return queue_live; 736 } 737 EXPORT_SYMBOL_GPL(__nvme_check_ready); 738 739 static inline void nvme_setup_flush(struct nvme_ns *ns, 740 struct nvme_command *cmnd) 741 { 742 memset(cmnd, 0, sizeof(*cmnd)); 743 cmnd->common.opcode = nvme_cmd_flush; 744 cmnd->common.nsid = cpu_to_le32(ns->head->ns_id); 745 } 746 747 static blk_status_t nvme_setup_discard(struct nvme_ns *ns, struct request *req, 748 struct nvme_command *cmnd) 749 { 750 unsigned short segments = blk_rq_nr_discard_segments(req), n = 0; 751 struct nvme_dsm_range *range; 752 struct bio *bio; 753 754 /* 755 * Some devices do not consider the DSM 'Number of Ranges' field when 756 * determining how much data to DMA. Always allocate memory for maximum 757 * number of segments to prevent device reading beyond end of buffer. 758 */ 759 static const size_t alloc_size = sizeof(*range) * NVME_DSM_MAX_RANGES; 760 761 range = kzalloc(alloc_size, GFP_ATOMIC | __GFP_NOWARN); 762 if (!range) { 763 /* 764 * If we fail allocation our range, fallback to the controller 765 * discard page. If that's also busy, it's safe to return 766 * busy, as we know we can make progress once that's freed. 767 */ 768 if (test_and_set_bit_lock(0, &ns->ctrl->discard_page_busy)) 769 return BLK_STS_RESOURCE; 770 771 range = page_address(ns->ctrl->discard_page); 772 } 773 774 if (queue_max_discard_segments(req->q) == 1) { 775 u64 slba = nvme_sect_to_lba(ns, blk_rq_pos(req)); 776 u32 nlb = blk_rq_sectors(req) >> (ns->lba_shift - 9); 777 778 range[0].cattr = cpu_to_le32(0); 779 range[0].nlb = cpu_to_le32(nlb); 780 range[0].slba = cpu_to_le64(slba); 781 n = 1; 782 } else { 783 __rq_for_each_bio(bio, req) { 784 u64 slba = nvme_sect_to_lba(ns, bio->bi_iter.bi_sector); 785 u32 nlb = bio->bi_iter.bi_size >> ns->lba_shift; 786 787 if (n < segments) { 788 range[n].cattr = cpu_to_le32(0); 789 range[n].nlb = cpu_to_le32(nlb); 790 range[n].slba = cpu_to_le64(slba); 791 } 792 n++; 793 } 794 } 795 796 if (WARN_ON_ONCE(n != segments)) { 797 if (virt_to_page(range) == ns->ctrl->discard_page) 798 clear_bit_unlock(0, &ns->ctrl->discard_page_busy); 799 else 800 kfree(range); 801 return BLK_STS_IOERR; 802 } 803 804 memset(cmnd, 0, sizeof(*cmnd)); 805 cmnd->dsm.opcode = nvme_cmd_dsm; 806 cmnd->dsm.nsid = cpu_to_le32(ns->head->ns_id); 807 cmnd->dsm.nr = cpu_to_le32(segments - 1); 808 cmnd->dsm.attributes = cpu_to_le32(NVME_DSMGMT_AD); 809 810 bvec_set_virt(&req->special_vec, range, alloc_size); 811 req->rq_flags |= RQF_SPECIAL_PAYLOAD; 812 813 return BLK_STS_OK; 814 } 815 816 static void nvme_set_ref_tag(struct nvme_ns *ns, struct nvme_command *cmnd, 817 struct request *req) 818 { 819 u32 upper, lower; 820 u64 ref48; 821 822 /* both rw and write zeroes share the same reftag format */ 823 switch (ns->guard_type) { 824 case NVME_NVM_NS_16B_GUARD: 825 cmnd->rw.reftag = cpu_to_le32(t10_pi_ref_tag(req)); 826 break; 827 case NVME_NVM_NS_64B_GUARD: 828 ref48 = ext_pi_ref_tag(req); 829 lower = lower_32_bits(ref48); 830 upper = upper_32_bits(ref48); 831 832 cmnd->rw.reftag = cpu_to_le32(lower); 833 cmnd->rw.cdw3 = cpu_to_le32(upper); 834 break; 835 default: 836 break; 837 } 838 } 839 840 static inline blk_status_t nvme_setup_write_zeroes(struct nvme_ns *ns, 841 struct request *req, struct nvme_command *cmnd) 842 { 843 memset(cmnd, 0, sizeof(*cmnd)); 844 845 if (ns->ctrl->quirks & NVME_QUIRK_DEALLOCATE_ZEROES) 846 return nvme_setup_discard(ns, req, cmnd); 847 848 cmnd->write_zeroes.opcode = nvme_cmd_write_zeroes; 849 cmnd->write_zeroes.nsid = cpu_to_le32(ns->head->ns_id); 850 cmnd->write_zeroes.slba = 851 cpu_to_le64(nvme_sect_to_lba(ns, blk_rq_pos(req))); 852 cmnd->write_zeroes.length = 853 cpu_to_le16((blk_rq_bytes(req) >> ns->lba_shift) - 1); 854 855 if (!(req->cmd_flags & REQ_NOUNMAP) && (ns->features & NVME_NS_DEAC)) 856 cmnd->write_zeroes.control |= cpu_to_le16(NVME_WZ_DEAC); 857 858 if (nvme_ns_has_pi(ns)) { 859 cmnd->write_zeroes.control |= cpu_to_le16(NVME_RW_PRINFO_PRACT); 860 861 switch (ns->pi_type) { 862 case NVME_NS_DPS_PI_TYPE1: 863 case NVME_NS_DPS_PI_TYPE2: 864 nvme_set_ref_tag(ns, cmnd, req); 865 break; 866 } 867 } 868 869 return BLK_STS_OK; 870 } 871 872 static inline blk_status_t nvme_setup_rw(struct nvme_ns *ns, 873 struct request *req, struct nvme_command *cmnd, 874 enum nvme_opcode op) 875 { 876 u16 control = 0; 877 u32 dsmgmt = 0; 878 879 if (req->cmd_flags & REQ_FUA) 880 control |= NVME_RW_FUA; 881 if (req->cmd_flags & (REQ_FAILFAST_DEV | REQ_RAHEAD)) 882 control |= NVME_RW_LR; 883 884 if (req->cmd_flags & REQ_RAHEAD) 885 dsmgmt |= NVME_RW_DSM_FREQ_PREFETCH; 886 887 cmnd->rw.opcode = op; 888 cmnd->rw.flags = 0; 889 cmnd->rw.nsid = cpu_to_le32(ns->head->ns_id); 890 cmnd->rw.cdw2 = 0; 891 cmnd->rw.cdw3 = 0; 892 cmnd->rw.metadata = 0; 893 cmnd->rw.slba = cpu_to_le64(nvme_sect_to_lba(ns, blk_rq_pos(req))); 894 cmnd->rw.length = cpu_to_le16((blk_rq_bytes(req) >> ns->lba_shift) - 1); 895 cmnd->rw.reftag = 0; 896 cmnd->rw.apptag = 0; 897 cmnd->rw.appmask = 0; 898 899 if (ns->ms) { 900 /* 901 * If formated with metadata, the block layer always provides a 902 * metadata buffer if CONFIG_BLK_DEV_INTEGRITY is enabled. Else 903 * we enable the PRACT bit for protection information or set the 904 * namespace capacity to zero to prevent any I/O. 905 */ 906 if (!blk_integrity_rq(req)) { 907 if (WARN_ON_ONCE(!nvme_ns_has_pi(ns))) 908 return BLK_STS_NOTSUPP; 909 control |= NVME_RW_PRINFO_PRACT; 910 } 911 912 switch (ns->pi_type) { 913 case NVME_NS_DPS_PI_TYPE3: 914 control |= NVME_RW_PRINFO_PRCHK_GUARD; 915 break; 916 case NVME_NS_DPS_PI_TYPE1: 917 case NVME_NS_DPS_PI_TYPE2: 918 control |= NVME_RW_PRINFO_PRCHK_GUARD | 919 NVME_RW_PRINFO_PRCHK_REF; 920 if (op == nvme_cmd_zone_append) 921 control |= NVME_RW_APPEND_PIREMAP; 922 nvme_set_ref_tag(ns, cmnd, req); 923 break; 924 } 925 } 926 927 cmnd->rw.control = cpu_to_le16(control); 928 cmnd->rw.dsmgmt = cpu_to_le32(dsmgmt); 929 return 0; 930 } 931 932 void nvme_cleanup_cmd(struct request *req) 933 { 934 if (req->rq_flags & RQF_SPECIAL_PAYLOAD) { 935 struct nvme_ctrl *ctrl = nvme_req(req)->ctrl; 936 937 if (req->special_vec.bv_page == ctrl->discard_page) 938 clear_bit_unlock(0, &ctrl->discard_page_busy); 939 else 940 kfree(bvec_virt(&req->special_vec)); 941 req->rq_flags &= ~RQF_SPECIAL_PAYLOAD; 942 } 943 } 944 EXPORT_SYMBOL_GPL(nvme_cleanup_cmd); 945 946 blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req) 947 { 948 struct nvme_command *cmd = nvme_req(req)->cmd; 949 blk_status_t ret = BLK_STS_OK; 950 951 if (!(req->rq_flags & RQF_DONTPREP)) 952 nvme_clear_nvme_request(req); 953 954 switch (req_op(req)) { 955 case REQ_OP_DRV_IN: 956 case REQ_OP_DRV_OUT: 957 /* these are setup prior to execution in nvme_init_request() */ 958 break; 959 case REQ_OP_FLUSH: 960 nvme_setup_flush(ns, cmd); 961 break; 962 case REQ_OP_ZONE_RESET_ALL: 963 case REQ_OP_ZONE_RESET: 964 ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_RESET); 965 break; 966 case REQ_OP_ZONE_OPEN: 967 ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_OPEN); 968 break; 969 case REQ_OP_ZONE_CLOSE: 970 ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_CLOSE); 971 break; 972 case REQ_OP_ZONE_FINISH: 973 ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_FINISH); 974 break; 975 case REQ_OP_WRITE_ZEROES: 976 ret = nvme_setup_write_zeroes(ns, req, cmd); 977 break; 978 case REQ_OP_DISCARD: 979 ret = nvme_setup_discard(ns, req, cmd); 980 break; 981 case REQ_OP_READ: 982 ret = nvme_setup_rw(ns, req, cmd, nvme_cmd_read); 983 break; 984 case REQ_OP_WRITE: 985 ret = nvme_setup_rw(ns, req, cmd, nvme_cmd_write); 986 break; 987 case REQ_OP_ZONE_APPEND: 988 ret = nvme_setup_rw(ns, req, cmd, nvme_cmd_zone_append); 989 break; 990 default: 991 WARN_ON_ONCE(1); 992 return BLK_STS_IOERR; 993 } 994 995 cmd->common.command_id = nvme_cid(req); 996 trace_nvme_setup_cmd(req, cmd); 997 return ret; 998 } 999 EXPORT_SYMBOL_GPL(nvme_setup_cmd); 1000 1001 /* 1002 * Return values: 1003 * 0: success 1004 * >0: nvme controller's cqe status response 1005 * <0: kernel error in lieu of controller response 1006 */ 1007 int nvme_execute_rq(struct request *rq, bool at_head) 1008 { 1009 blk_status_t status; 1010 1011 status = blk_execute_rq(rq, at_head); 1012 if (nvme_req(rq)->flags & NVME_REQ_CANCELLED) 1013 return -EINTR; 1014 if (nvme_req(rq)->status) 1015 return nvme_req(rq)->status; 1016 return blk_status_to_errno(status); 1017 } 1018 EXPORT_SYMBOL_NS_GPL(nvme_execute_rq, NVME_TARGET_PASSTHRU); 1019 1020 /* 1021 * Returns 0 on success. If the result is negative, it's a Linux error code; 1022 * if the result is positive, it's an NVM Express status code 1023 */ 1024 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 1025 union nvme_result *result, void *buffer, unsigned bufflen, 1026 int qid, int at_head, blk_mq_req_flags_t flags) 1027 { 1028 struct request *req; 1029 int ret; 1030 1031 if (qid == NVME_QID_ANY) 1032 req = blk_mq_alloc_request(q, nvme_req_op(cmd), flags); 1033 else 1034 req = blk_mq_alloc_request_hctx(q, nvme_req_op(cmd), flags, 1035 qid - 1); 1036 1037 if (IS_ERR(req)) 1038 return PTR_ERR(req); 1039 nvme_init_request(req, cmd); 1040 1041 if (buffer && bufflen) { 1042 ret = blk_rq_map_kern(q, req, buffer, bufflen, GFP_KERNEL); 1043 if (ret) 1044 goto out; 1045 } 1046 1047 ret = nvme_execute_rq(req, at_head); 1048 if (result && ret >= 0) 1049 *result = nvme_req(req)->result; 1050 out: 1051 blk_mq_free_request(req); 1052 return ret; 1053 } 1054 EXPORT_SYMBOL_GPL(__nvme_submit_sync_cmd); 1055 1056 int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 1057 void *buffer, unsigned bufflen) 1058 { 1059 return __nvme_submit_sync_cmd(q, cmd, NULL, buffer, bufflen, 1060 NVME_QID_ANY, 0, 0); 1061 } 1062 EXPORT_SYMBOL_GPL(nvme_submit_sync_cmd); 1063 1064 u32 nvme_command_effects(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u8 opcode) 1065 { 1066 u32 effects = 0; 1067 1068 if (ns) { 1069 effects = le32_to_cpu(ns->head->effects->iocs[opcode]); 1070 if (effects & ~(NVME_CMD_EFFECTS_CSUPP | NVME_CMD_EFFECTS_LBCC)) 1071 dev_warn_once(ctrl->device, 1072 "IO command:%02x has unusual effects:%08x\n", 1073 opcode, effects); 1074 1075 /* 1076 * NVME_CMD_EFFECTS_CSE_MASK causes a freeze all I/O queues, 1077 * which would deadlock when done on an I/O command. Note that 1078 * We already warn about an unusual effect above. 1079 */ 1080 effects &= ~NVME_CMD_EFFECTS_CSE_MASK; 1081 } else { 1082 effects = le32_to_cpu(ctrl->effects->acs[opcode]); 1083 } 1084 1085 return effects; 1086 } 1087 EXPORT_SYMBOL_NS_GPL(nvme_command_effects, NVME_TARGET_PASSTHRU); 1088 1089 u32 nvme_passthru_start(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u8 opcode) 1090 { 1091 u32 effects = nvme_command_effects(ctrl, ns, opcode); 1092 1093 /* 1094 * For simplicity, IO to all namespaces is quiesced even if the command 1095 * effects say only one namespace is affected. 1096 */ 1097 if (effects & NVME_CMD_EFFECTS_CSE_MASK) { 1098 mutex_lock(&ctrl->scan_lock); 1099 mutex_lock(&ctrl->subsys->lock); 1100 nvme_mpath_start_freeze(ctrl->subsys); 1101 nvme_mpath_wait_freeze(ctrl->subsys); 1102 nvme_start_freeze(ctrl); 1103 nvme_wait_freeze(ctrl); 1104 } 1105 return effects; 1106 } 1107 EXPORT_SYMBOL_NS_GPL(nvme_passthru_start, NVME_TARGET_PASSTHRU); 1108 1109 void nvme_passthru_end(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u32 effects, 1110 struct nvme_command *cmd, int status) 1111 { 1112 if (effects & NVME_CMD_EFFECTS_CSE_MASK) { 1113 nvme_unfreeze(ctrl); 1114 nvme_mpath_unfreeze(ctrl->subsys); 1115 mutex_unlock(&ctrl->subsys->lock); 1116 mutex_unlock(&ctrl->scan_lock); 1117 } 1118 if (effects & NVME_CMD_EFFECTS_CCC) { 1119 if (!test_and_set_bit(NVME_CTRL_DIRTY_CAPABILITY, 1120 &ctrl->flags)) { 1121 dev_info(ctrl->device, 1122 "controller capabilities changed, reset may be required to take effect.\n"); 1123 } 1124 } 1125 if (effects & (NVME_CMD_EFFECTS_NIC | NVME_CMD_EFFECTS_NCC)) { 1126 nvme_queue_scan(ctrl); 1127 flush_work(&ctrl->scan_work); 1128 } 1129 if (ns) 1130 return; 1131 1132 switch (cmd->common.opcode) { 1133 case nvme_admin_set_features: 1134 switch (le32_to_cpu(cmd->common.cdw10) & 0xFF) { 1135 case NVME_FEAT_KATO: 1136 /* 1137 * Keep alive commands interval on the host should be 1138 * updated when KATO is modified by Set Features 1139 * commands. 1140 */ 1141 if (!status) 1142 nvme_update_keep_alive(ctrl, cmd); 1143 break; 1144 default: 1145 break; 1146 } 1147 break; 1148 default: 1149 break; 1150 } 1151 } 1152 EXPORT_SYMBOL_NS_GPL(nvme_passthru_end, NVME_TARGET_PASSTHRU); 1153 1154 /* 1155 * Recommended frequency for KATO commands per NVMe 1.4 section 7.12.1: 1156 * 1157 * The host should send Keep Alive commands at half of the Keep Alive Timeout 1158 * accounting for transport roundtrip times [..]. 1159 */ 1160 static unsigned long nvme_keep_alive_work_period(struct nvme_ctrl *ctrl) 1161 { 1162 unsigned long delay = ctrl->kato * HZ / 2; 1163 1164 /* 1165 * When using Traffic Based Keep Alive, we need to run 1166 * nvme_keep_alive_work at twice the normal frequency, as one 1167 * command completion can postpone sending a keep alive command 1168 * by up to twice the delay between runs. 1169 */ 1170 if (ctrl->ctratt & NVME_CTRL_ATTR_TBKAS) 1171 delay /= 2; 1172 return delay; 1173 } 1174 1175 static void nvme_queue_keep_alive_work(struct nvme_ctrl *ctrl) 1176 { 1177 queue_delayed_work(nvme_wq, &ctrl->ka_work, 1178 nvme_keep_alive_work_period(ctrl)); 1179 } 1180 1181 static enum rq_end_io_ret nvme_keep_alive_end_io(struct request *rq, 1182 blk_status_t status) 1183 { 1184 struct nvme_ctrl *ctrl = rq->end_io_data; 1185 unsigned long rtt = jiffies - (rq->deadline - rq->timeout); 1186 unsigned long delay = nvme_keep_alive_work_period(ctrl); 1187 enum nvme_ctrl_state state = nvme_ctrl_state(ctrl); 1188 1189 /* 1190 * Subtract off the keepalive RTT so nvme_keep_alive_work runs 1191 * at the desired frequency. 1192 */ 1193 if (rtt <= delay) { 1194 delay -= rtt; 1195 } else { 1196 dev_warn(ctrl->device, "long keepalive RTT (%u ms)\n", 1197 jiffies_to_msecs(rtt)); 1198 delay = 0; 1199 } 1200 1201 blk_mq_free_request(rq); 1202 1203 if (status) { 1204 dev_err(ctrl->device, 1205 "failed nvme_keep_alive_end_io error=%d\n", 1206 status); 1207 return RQ_END_IO_NONE; 1208 } 1209 1210 ctrl->ka_last_check_time = jiffies; 1211 ctrl->comp_seen = false; 1212 if (state == NVME_CTRL_LIVE || state == NVME_CTRL_CONNECTING) 1213 queue_delayed_work(nvme_wq, &ctrl->ka_work, delay); 1214 return RQ_END_IO_NONE; 1215 } 1216 1217 static void nvme_keep_alive_work(struct work_struct *work) 1218 { 1219 struct nvme_ctrl *ctrl = container_of(to_delayed_work(work), 1220 struct nvme_ctrl, ka_work); 1221 bool comp_seen = ctrl->comp_seen; 1222 struct request *rq; 1223 1224 ctrl->ka_last_check_time = jiffies; 1225 1226 if ((ctrl->ctratt & NVME_CTRL_ATTR_TBKAS) && comp_seen) { 1227 dev_dbg(ctrl->device, 1228 "reschedule traffic based keep-alive timer\n"); 1229 ctrl->comp_seen = false; 1230 nvme_queue_keep_alive_work(ctrl); 1231 return; 1232 } 1233 1234 rq = blk_mq_alloc_request(ctrl->admin_q, nvme_req_op(&ctrl->ka_cmd), 1235 BLK_MQ_REQ_RESERVED | BLK_MQ_REQ_NOWAIT); 1236 if (IS_ERR(rq)) { 1237 /* allocation failure, reset the controller */ 1238 dev_err(ctrl->device, "keep-alive failed: %ld\n", PTR_ERR(rq)); 1239 nvme_reset_ctrl(ctrl); 1240 return; 1241 } 1242 nvme_init_request(rq, &ctrl->ka_cmd); 1243 1244 rq->timeout = ctrl->kato * HZ; 1245 rq->end_io = nvme_keep_alive_end_io; 1246 rq->end_io_data = ctrl; 1247 blk_execute_rq_nowait(rq, false); 1248 } 1249 1250 static void nvme_start_keep_alive(struct nvme_ctrl *ctrl) 1251 { 1252 if (unlikely(ctrl->kato == 0)) 1253 return; 1254 1255 nvme_queue_keep_alive_work(ctrl); 1256 } 1257 1258 void nvme_stop_keep_alive(struct nvme_ctrl *ctrl) 1259 { 1260 if (unlikely(ctrl->kato == 0)) 1261 return; 1262 1263 cancel_delayed_work_sync(&ctrl->ka_work); 1264 } 1265 EXPORT_SYMBOL_GPL(nvme_stop_keep_alive); 1266 1267 static void nvme_update_keep_alive(struct nvme_ctrl *ctrl, 1268 struct nvme_command *cmd) 1269 { 1270 unsigned int new_kato = 1271 DIV_ROUND_UP(le32_to_cpu(cmd->common.cdw11), 1000); 1272 1273 dev_info(ctrl->device, 1274 "keep alive interval updated from %u ms to %u ms\n", 1275 ctrl->kato * 1000 / 2, new_kato * 1000 / 2); 1276 1277 nvme_stop_keep_alive(ctrl); 1278 ctrl->kato = new_kato; 1279 nvme_start_keep_alive(ctrl); 1280 } 1281 1282 /* 1283 * In NVMe 1.0 the CNS field was just a binary controller or namespace 1284 * flag, thus sending any new CNS opcodes has a big chance of not working. 1285 * Qemu unfortunately had that bug after reporting a 1.1 version compliance 1286 * (but not for any later version). 1287 */ 1288 static bool nvme_ctrl_limited_cns(struct nvme_ctrl *ctrl) 1289 { 1290 if (ctrl->quirks & NVME_QUIRK_IDENTIFY_CNS) 1291 return ctrl->vs < NVME_VS(1, 2, 0); 1292 return ctrl->vs < NVME_VS(1, 1, 0); 1293 } 1294 1295 static int nvme_identify_ctrl(struct nvme_ctrl *dev, struct nvme_id_ctrl **id) 1296 { 1297 struct nvme_command c = { }; 1298 int error; 1299 1300 /* gcc-4.4.4 (at least) has issues with initializers and anon unions */ 1301 c.identify.opcode = nvme_admin_identify; 1302 c.identify.cns = NVME_ID_CNS_CTRL; 1303 1304 *id = kmalloc(sizeof(struct nvme_id_ctrl), GFP_KERNEL); 1305 if (!*id) 1306 return -ENOMEM; 1307 1308 error = nvme_submit_sync_cmd(dev->admin_q, &c, *id, 1309 sizeof(struct nvme_id_ctrl)); 1310 if (error) { 1311 kfree(*id); 1312 *id = NULL; 1313 } 1314 return error; 1315 } 1316 1317 static int nvme_process_ns_desc(struct nvme_ctrl *ctrl, struct nvme_ns_ids *ids, 1318 struct nvme_ns_id_desc *cur, bool *csi_seen) 1319 { 1320 const char *warn_str = "ctrl returned bogus length:"; 1321 void *data = cur; 1322 1323 switch (cur->nidt) { 1324 case NVME_NIDT_EUI64: 1325 if (cur->nidl != NVME_NIDT_EUI64_LEN) { 1326 dev_warn(ctrl->device, "%s %d for NVME_NIDT_EUI64\n", 1327 warn_str, cur->nidl); 1328 return -1; 1329 } 1330 if (ctrl->quirks & NVME_QUIRK_BOGUS_NID) 1331 return NVME_NIDT_EUI64_LEN; 1332 memcpy(ids->eui64, data + sizeof(*cur), NVME_NIDT_EUI64_LEN); 1333 return NVME_NIDT_EUI64_LEN; 1334 case NVME_NIDT_NGUID: 1335 if (cur->nidl != NVME_NIDT_NGUID_LEN) { 1336 dev_warn(ctrl->device, "%s %d for NVME_NIDT_NGUID\n", 1337 warn_str, cur->nidl); 1338 return -1; 1339 } 1340 if (ctrl->quirks & NVME_QUIRK_BOGUS_NID) 1341 return NVME_NIDT_NGUID_LEN; 1342 memcpy(ids->nguid, data + sizeof(*cur), NVME_NIDT_NGUID_LEN); 1343 return NVME_NIDT_NGUID_LEN; 1344 case NVME_NIDT_UUID: 1345 if (cur->nidl != NVME_NIDT_UUID_LEN) { 1346 dev_warn(ctrl->device, "%s %d for NVME_NIDT_UUID\n", 1347 warn_str, cur->nidl); 1348 return -1; 1349 } 1350 if (ctrl->quirks & NVME_QUIRK_BOGUS_NID) 1351 return NVME_NIDT_UUID_LEN; 1352 uuid_copy(&ids->uuid, data + sizeof(*cur)); 1353 return NVME_NIDT_UUID_LEN; 1354 case NVME_NIDT_CSI: 1355 if (cur->nidl != NVME_NIDT_CSI_LEN) { 1356 dev_warn(ctrl->device, "%s %d for NVME_NIDT_CSI\n", 1357 warn_str, cur->nidl); 1358 return -1; 1359 } 1360 memcpy(&ids->csi, data + sizeof(*cur), NVME_NIDT_CSI_LEN); 1361 *csi_seen = true; 1362 return NVME_NIDT_CSI_LEN; 1363 default: 1364 /* Skip unknown types */ 1365 return cur->nidl; 1366 } 1367 } 1368 1369 static int nvme_identify_ns_descs(struct nvme_ctrl *ctrl, 1370 struct nvme_ns_info *info) 1371 { 1372 struct nvme_command c = { }; 1373 bool csi_seen = false; 1374 int status, pos, len; 1375 void *data; 1376 1377 if (ctrl->vs < NVME_VS(1, 3, 0) && !nvme_multi_css(ctrl)) 1378 return 0; 1379 if (ctrl->quirks & NVME_QUIRK_NO_NS_DESC_LIST) 1380 return 0; 1381 1382 c.identify.opcode = nvme_admin_identify; 1383 c.identify.nsid = cpu_to_le32(info->nsid); 1384 c.identify.cns = NVME_ID_CNS_NS_DESC_LIST; 1385 1386 data = kzalloc(NVME_IDENTIFY_DATA_SIZE, GFP_KERNEL); 1387 if (!data) 1388 return -ENOMEM; 1389 1390 status = nvme_submit_sync_cmd(ctrl->admin_q, &c, data, 1391 NVME_IDENTIFY_DATA_SIZE); 1392 if (status) { 1393 dev_warn(ctrl->device, 1394 "Identify Descriptors failed (nsid=%u, status=0x%x)\n", 1395 info->nsid, status); 1396 goto free_data; 1397 } 1398 1399 for (pos = 0; pos < NVME_IDENTIFY_DATA_SIZE; pos += len) { 1400 struct nvme_ns_id_desc *cur = data + pos; 1401 1402 if (cur->nidl == 0) 1403 break; 1404 1405 len = nvme_process_ns_desc(ctrl, &info->ids, cur, &csi_seen); 1406 if (len < 0) 1407 break; 1408 1409 len += sizeof(*cur); 1410 } 1411 1412 if (nvme_multi_css(ctrl) && !csi_seen) { 1413 dev_warn(ctrl->device, "Command set not reported for nsid:%d\n", 1414 info->nsid); 1415 status = -EINVAL; 1416 } 1417 1418 free_data: 1419 kfree(data); 1420 return status; 1421 } 1422 1423 static int nvme_identify_ns(struct nvme_ctrl *ctrl, unsigned nsid, 1424 struct nvme_id_ns **id) 1425 { 1426 struct nvme_command c = { }; 1427 int error; 1428 1429 /* gcc-4.4.4 (at least) has issues with initializers and anon unions */ 1430 c.identify.opcode = nvme_admin_identify; 1431 c.identify.nsid = cpu_to_le32(nsid); 1432 c.identify.cns = NVME_ID_CNS_NS; 1433 1434 *id = kmalloc(sizeof(**id), GFP_KERNEL); 1435 if (!*id) 1436 return -ENOMEM; 1437 1438 error = nvme_submit_sync_cmd(ctrl->admin_q, &c, *id, sizeof(**id)); 1439 if (error) { 1440 dev_warn(ctrl->device, "Identify namespace failed (%d)\n", error); 1441 kfree(*id); 1442 *id = NULL; 1443 } 1444 return error; 1445 } 1446 1447 static int nvme_ns_info_from_identify(struct nvme_ctrl *ctrl, 1448 struct nvme_ns_info *info) 1449 { 1450 struct nvme_ns_ids *ids = &info->ids; 1451 struct nvme_id_ns *id; 1452 int ret; 1453 1454 ret = nvme_identify_ns(ctrl, info->nsid, &id); 1455 if (ret) 1456 return ret; 1457 1458 if (id->ncap == 0) { 1459 /* namespace not allocated or attached */ 1460 info->is_removed = true; 1461 ret = -ENODEV; 1462 goto error; 1463 } 1464 1465 info->anagrpid = id->anagrpid; 1466 info->is_shared = id->nmic & NVME_NS_NMIC_SHARED; 1467 info->is_readonly = id->nsattr & NVME_NS_ATTR_RO; 1468 info->is_ready = true; 1469 if (ctrl->quirks & NVME_QUIRK_BOGUS_NID) { 1470 dev_info(ctrl->device, 1471 "Ignoring bogus Namespace Identifiers\n"); 1472 } else { 1473 if (ctrl->vs >= NVME_VS(1, 1, 0) && 1474 !memchr_inv(ids->eui64, 0, sizeof(ids->eui64))) 1475 memcpy(ids->eui64, id->eui64, sizeof(ids->eui64)); 1476 if (ctrl->vs >= NVME_VS(1, 2, 0) && 1477 !memchr_inv(ids->nguid, 0, sizeof(ids->nguid))) 1478 memcpy(ids->nguid, id->nguid, sizeof(ids->nguid)); 1479 } 1480 1481 error: 1482 kfree(id); 1483 return ret; 1484 } 1485 1486 static int nvme_ns_info_from_id_cs_indep(struct nvme_ctrl *ctrl, 1487 struct nvme_ns_info *info) 1488 { 1489 struct nvme_id_ns_cs_indep *id; 1490 struct nvme_command c = { 1491 .identify.opcode = nvme_admin_identify, 1492 .identify.nsid = cpu_to_le32(info->nsid), 1493 .identify.cns = NVME_ID_CNS_NS_CS_INDEP, 1494 }; 1495 int ret; 1496 1497 id = kmalloc(sizeof(*id), GFP_KERNEL); 1498 if (!id) 1499 return -ENOMEM; 1500 1501 ret = nvme_submit_sync_cmd(ctrl->admin_q, &c, id, sizeof(*id)); 1502 if (!ret) { 1503 info->anagrpid = id->anagrpid; 1504 info->is_shared = id->nmic & NVME_NS_NMIC_SHARED; 1505 info->is_readonly = id->nsattr & NVME_NS_ATTR_RO; 1506 info->is_ready = id->nstat & NVME_NSTAT_NRDY; 1507 } 1508 kfree(id); 1509 return ret; 1510 } 1511 1512 static int nvme_features(struct nvme_ctrl *dev, u8 op, unsigned int fid, 1513 unsigned int dword11, void *buffer, size_t buflen, u32 *result) 1514 { 1515 union nvme_result res = { 0 }; 1516 struct nvme_command c = { }; 1517 int ret; 1518 1519 c.features.opcode = op; 1520 c.features.fid = cpu_to_le32(fid); 1521 c.features.dword11 = cpu_to_le32(dword11); 1522 1523 ret = __nvme_submit_sync_cmd(dev->admin_q, &c, &res, 1524 buffer, buflen, NVME_QID_ANY, 0, 0); 1525 if (ret >= 0 && result) 1526 *result = le32_to_cpu(res.u32); 1527 return ret; 1528 } 1529 1530 int nvme_set_features(struct nvme_ctrl *dev, unsigned int fid, 1531 unsigned int dword11, void *buffer, size_t buflen, 1532 u32 *result) 1533 { 1534 return nvme_features(dev, nvme_admin_set_features, fid, dword11, buffer, 1535 buflen, result); 1536 } 1537 EXPORT_SYMBOL_GPL(nvme_set_features); 1538 1539 int nvme_get_features(struct nvme_ctrl *dev, unsigned int fid, 1540 unsigned int dword11, void *buffer, size_t buflen, 1541 u32 *result) 1542 { 1543 return nvme_features(dev, nvme_admin_get_features, fid, dword11, buffer, 1544 buflen, result); 1545 } 1546 EXPORT_SYMBOL_GPL(nvme_get_features); 1547 1548 int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count) 1549 { 1550 u32 q_count = (*count - 1) | ((*count - 1) << 16); 1551 u32 result; 1552 int status, nr_io_queues; 1553 1554 status = nvme_set_features(ctrl, NVME_FEAT_NUM_QUEUES, q_count, NULL, 0, 1555 &result); 1556 if (status < 0) 1557 return status; 1558 1559 /* 1560 * Degraded controllers might return an error when setting the queue 1561 * count. We still want to be able to bring them online and offer 1562 * access to the admin queue, as that might be only way to fix them up. 1563 */ 1564 if (status > 0) { 1565 dev_err(ctrl->device, "Could not set queue count (%d)\n", status); 1566 *count = 0; 1567 } else { 1568 nr_io_queues = min(result & 0xffff, result >> 16) + 1; 1569 *count = min(*count, nr_io_queues); 1570 } 1571 1572 return 0; 1573 } 1574 EXPORT_SYMBOL_GPL(nvme_set_queue_count); 1575 1576 #define NVME_AEN_SUPPORTED \ 1577 (NVME_AEN_CFG_NS_ATTR | NVME_AEN_CFG_FW_ACT | \ 1578 NVME_AEN_CFG_ANA_CHANGE | NVME_AEN_CFG_DISC_CHANGE) 1579 1580 static void nvme_enable_aen(struct nvme_ctrl *ctrl) 1581 { 1582 u32 result, supported_aens = ctrl->oaes & NVME_AEN_SUPPORTED; 1583 int status; 1584 1585 if (!supported_aens) 1586 return; 1587 1588 status = nvme_set_features(ctrl, NVME_FEAT_ASYNC_EVENT, supported_aens, 1589 NULL, 0, &result); 1590 if (status) 1591 dev_warn(ctrl->device, "Failed to configure AEN (cfg %x)\n", 1592 supported_aens); 1593 1594 queue_work(nvme_wq, &ctrl->async_event_work); 1595 } 1596 1597 static int nvme_ns_open(struct nvme_ns *ns) 1598 { 1599 1600 /* should never be called due to GENHD_FL_HIDDEN */ 1601 if (WARN_ON_ONCE(nvme_ns_head_multipath(ns->head))) 1602 goto fail; 1603 if (!nvme_get_ns(ns)) 1604 goto fail; 1605 if (!try_module_get(ns->ctrl->ops->module)) 1606 goto fail_put_ns; 1607 1608 return 0; 1609 1610 fail_put_ns: 1611 nvme_put_ns(ns); 1612 fail: 1613 return -ENXIO; 1614 } 1615 1616 static void nvme_ns_release(struct nvme_ns *ns) 1617 { 1618 1619 module_put(ns->ctrl->ops->module); 1620 nvme_put_ns(ns); 1621 } 1622 1623 static int nvme_open(struct gendisk *disk, blk_mode_t mode) 1624 { 1625 return nvme_ns_open(disk->private_data); 1626 } 1627 1628 static void nvme_release(struct gendisk *disk) 1629 { 1630 nvme_ns_release(disk->private_data); 1631 } 1632 1633 int nvme_getgeo(struct block_device *bdev, struct hd_geometry *geo) 1634 { 1635 /* some standard values */ 1636 geo->heads = 1 << 6; 1637 geo->sectors = 1 << 5; 1638 geo->cylinders = get_capacity(bdev->bd_disk) >> 11; 1639 return 0; 1640 } 1641 1642 #ifdef CONFIG_BLK_DEV_INTEGRITY 1643 static void nvme_init_integrity(struct gendisk *disk, struct nvme_ns *ns, 1644 u32 max_integrity_segments) 1645 { 1646 struct blk_integrity integrity = { }; 1647 1648 switch (ns->pi_type) { 1649 case NVME_NS_DPS_PI_TYPE3: 1650 switch (ns->guard_type) { 1651 case NVME_NVM_NS_16B_GUARD: 1652 integrity.profile = &t10_pi_type3_crc; 1653 integrity.tag_size = sizeof(u16) + sizeof(u32); 1654 integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE; 1655 break; 1656 case NVME_NVM_NS_64B_GUARD: 1657 integrity.profile = &ext_pi_type3_crc64; 1658 integrity.tag_size = sizeof(u16) + 6; 1659 integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE; 1660 break; 1661 default: 1662 integrity.profile = NULL; 1663 break; 1664 } 1665 break; 1666 case NVME_NS_DPS_PI_TYPE1: 1667 case NVME_NS_DPS_PI_TYPE2: 1668 switch (ns->guard_type) { 1669 case NVME_NVM_NS_16B_GUARD: 1670 integrity.profile = &t10_pi_type1_crc; 1671 integrity.tag_size = sizeof(u16); 1672 integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE; 1673 break; 1674 case NVME_NVM_NS_64B_GUARD: 1675 integrity.profile = &ext_pi_type1_crc64; 1676 integrity.tag_size = sizeof(u16); 1677 integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE; 1678 break; 1679 default: 1680 integrity.profile = NULL; 1681 break; 1682 } 1683 break; 1684 default: 1685 integrity.profile = NULL; 1686 break; 1687 } 1688 1689 integrity.tuple_size = ns->ms; 1690 blk_integrity_register(disk, &integrity); 1691 blk_queue_max_integrity_segments(disk->queue, max_integrity_segments); 1692 } 1693 #else 1694 static void nvme_init_integrity(struct gendisk *disk, struct nvme_ns *ns, 1695 u32 max_integrity_segments) 1696 { 1697 } 1698 #endif /* CONFIG_BLK_DEV_INTEGRITY */ 1699 1700 static void nvme_config_discard(struct gendisk *disk, struct nvme_ns *ns) 1701 { 1702 struct nvme_ctrl *ctrl = ns->ctrl; 1703 struct request_queue *queue = disk->queue; 1704 u32 size = queue_logical_block_size(queue); 1705 1706 if (ctrl->dmrsl && ctrl->dmrsl <= nvme_sect_to_lba(ns, UINT_MAX)) 1707 ctrl->max_discard_sectors = nvme_lba_to_sect(ns, ctrl->dmrsl); 1708 1709 if (ctrl->max_discard_sectors == 0) { 1710 blk_queue_max_discard_sectors(queue, 0); 1711 return; 1712 } 1713 1714 BUILD_BUG_ON(PAGE_SIZE / sizeof(struct nvme_dsm_range) < 1715 NVME_DSM_MAX_RANGES); 1716 1717 queue->limits.discard_granularity = size; 1718 1719 /* If discard is already enabled, don't reset queue limits */ 1720 if (queue->limits.max_discard_sectors) 1721 return; 1722 1723 blk_queue_max_discard_sectors(queue, ctrl->max_discard_sectors); 1724 blk_queue_max_discard_segments(queue, ctrl->max_discard_segments); 1725 1726 if (ctrl->quirks & NVME_QUIRK_DEALLOCATE_ZEROES) 1727 blk_queue_max_write_zeroes_sectors(queue, UINT_MAX); 1728 } 1729 1730 static bool nvme_ns_ids_equal(struct nvme_ns_ids *a, struct nvme_ns_ids *b) 1731 { 1732 return uuid_equal(&a->uuid, &b->uuid) && 1733 memcmp(&a->nguid, &b->nguid, sizeof(a->nguid)) == 0 && 1734 memcmp(&a->eui64, &b->eui64, sizeof(a->eui64)) == 0 && 1735 a->csi == b->csi; 1736 } 1737 1738 static int nvme_init_ms(struct nvme_ns *ns, struct nvme_id_ns *id) 1739 { 1740 bool first = id->dps & NVME_NS_DPS_PI_FIRST; 1741 unsigned lbaf = nvme_lbaf_index(id->flbas); 1742 struct nvme_ctrl *ctrl = ns->ctrl; 1743 struct nvme_command c = { }; 1744 struct nvme_id_ns_nvm *nvm; 1745 int ret = 0; 1746 u32 elbaf; 1747 1748 ns->pi_size = 0; 1749 ns->ms = le16_to_cpu(id->lbaf[lbaf].ms); 1750 if (!(ctrl->ctratt & NVME_CTRL_ATTR_ELBAS)) { 1751 ns->pi_size = sizeof(struct t10_pi_tuple); 1752 ns->guard_type = NVME_NVM_NS_16B_GUARD; 1753 goto set_pi; 1754 } 1755 1756 nvm = kzalloc(sizeof(*nvm), GFP_KERNEL); 1757 if (!nvm) 1758 return -ENOMEM; 1759 1760 c.identify.opcode = nvme_admin_identify; 1761 c.identify.nsid = cpu_to_le32(ns->head->ns_id); 1762 c.identify.cns = NVME_ID_CNS_CS_NS; 1763 c.identify.csi = NVME_CSI_NVM; 1764 1765 ret = nvme_submit_sync_cmd(ns->ctrl->admin_q, &c, nvm, sizeof(*nvm)); 1766 if (ret) 1767 goto free_data; 1768 1769 elbaf = le32_to_cpu(nvm->elbaf[lbaf]); 1770 1771 /* no support for storage tag formats right now */ 1772 if (nvme_elbaf_sts(elbaf)) 1773 goto free_data; 1774 1775 ns->guard_type = nvme_elbaf_guard_type(elbaf); 1776 switch (ns->guard_type) { 1777 case NVME_NVM_NS_64B_GUARD: 1778 ns->pi_size = sizeof(struct crc64_pi_tuple); 1779 break; 1780 case NVME_NVM_NS_16B_GUARD: 1781 ns->pi_size = sizeof(struct t10_pi_tuple); 1782 break; 1783 default: 1784 break; 1785 } 1786 1787 free_data: 1788 kfree(nvm); 1789 set_pi: 1790 if (ns->pi_size && (first || ns->ms == ns->pi_size)) 1791 ns->pi_type = id->dps & NVME_NS_DPS_PI_MASK; 1792 else 1793 ns->pi_type = 0; 1794 1795 return ret; 1796 } 1797 1798 static int nvme_configure_metadata(struct nvme_ns *ns, struct nvme_id_ns *id) 1799 { 1800 struct nvme_ctrl *ctrl = ns->ctrl; 1801 int ret; 1802 1803 ret = nvme_init_ms(ns, id); 1804 if (ret) 1805 return ret; 1806 1807 ns->features &= ~(NVME_NS_METADATA_SUPPORTED | NVME_NS_EXT_LBAS); 1808 if (!ns->ms || !(ctrl->ops->flags & NVME_F_METADATA_SUPPORTED)) 1809 return 0; 1810 1811 if (ctrl->ops->flags & NVME_F_FABRICS) { 1812 /* 1813 * The NVMe over Fabrics specification only supports metadata as 1814 * part of the extended data LBA. We rely on HCA/HBA support to 1815 * remap the separate metadata buffer from the block layer. 1816 */ 1817 if (WARN_ON_ONCE(!(id->flbas & NVME_NS_FLBAS_META_EXT))) 1818 return 0; 1819 1820 ns->features |= NVME_NS_EXT_LBAS; 1821 1822 /* 1823 * The current fabrics transport drivers support namespace 1824 * metadata formats only if nvme_ns_has_pi() returns true. 1825 * Suppress support for all other formats so the namespace will 1826 * have a 0 capacity and not be usable through the block stack. 1827 * 1828 * Note, this check will need to be modified if any drivers 1829 * gain the ability to use other metadata formats. 1830 */ 1831 if (ctrl->max_integrity_segments && nvme_ns_has_pi(ns)) 1832 ns->features |= NVME_NS_METADATA_SUPPORTED; 1833 } else { 1834 /* 1835 * For PCIe controllers, we can't easily remap the separate 1836 * metadata buffer from the block layer and thus require a 1837 * separate metadata buffer for block layer metadata/PI support. 1838 * We allow extended LBAs for the passthrough interface, though. 1839 */ 1840 if (id->flbas & NVME_NS_FLBAS_META_EXT) 1841 ns->features |= NVME_NS_EXT_LBAS; 1842 else 1843 ns->features |= NVME_NS_METADATA_SUPPORTED; 1844 } 1845 return 0; 1846 } 1847 1848 static void nvme_set_queue_limits(struct nvme_ctrl *ctrl, 1849 struct request_queue *q) 1850 { 1851 bool vwc = ctrl->vwc & NVME_CTRL_VWC_PRESENT; 1852 1853 if (ctrl->max_hw_sectors) { 1854 u32 max_segments = 1855 (ctrl->max_hw_sectors / (NVME_CTRL_PAGE_SIZE >> 9)) + 1; 1856 1857 max_segments = min_not_zero(max_segments, ctrl->max_segments); 1858 blk_queue_max_hw_sectors(q, ctrl->max_hw_sectors); 1859 blk_queue_max_segments(q, min_t(u32, max_segments, USHRT_MAX)); 1860 } 1861 blk_queue_virt_boundary(q, NVME_CTRL_PAGE_SIZE - 1); 1862 blk_queue_dma_alignment(q, 3); 1863 blk_queue_write_cache(q, vwc, vwc); 1864 } 1865 1866 static void nvme_update_disk_info(struct gendisk *disk, 1867 struct nvme_ns *ns, struct nvme_id_ns *id) 1868 { 1869 sector_t capacity = nvme_lba_to_sect(ns, le64_to_cpu(id->nsze)); 1870 u32 bs = 1U << ns->lba_shift; 1871 u32 atomic_bs, phys_bs, io_opt = 0; 1872 1873 /* 1874 * The block layer can't support LBA sizes larger than the page size 1875 * or smaller than a sector size yet, so catch this early and don't 1876 * allow block I/O. 1877 */ 1878 if (ns->lba_shift > PAGE_SHIFT || ns->lba_shift < SECTOR_SHIFT) { 1879 capacity = 0; 1880 bs = (1 << 9); 1881 } 1882 1883 blk_integrity_unregister(disk); 1884 1885 atomic_bs = phys_bs = bs; 1886 if (id->nabo == 0) { 1887 /* 1888 * Bit 1 indicates whether NAWUPF is defined for this namespace 1889 * and whether it should be used instead of AWUPF. If NAWUPF == 1890 * 0 then AWUPF must be used instead. 1891 */ 1892 if (id->nsfeat & NVME_NS_FEAT_ATOMICS && id->nawupf) 1893 atomic_bs = (1 + le16_to_cpu(id->nawupf)) * bs; 1894 else 1895 atomic_bs = (1 + ns->ctrl->subsys->awupf) * bs; 1896 } 1897 1898 if (id->nsfeat & NVME_NS_FEAT_IO_OPT) { 1899 /* NPWG = Namespace Preferred Write Granularity */ 1900 phys_bs = bs * (1 + le16_to_cpu(id->npwg)); 1901 /* NOWS = Namespace Optimal Write Size */ 1902 io_opt = bs * (1 + le16_to_cpu(id->nows)); 1903 } 1904 1905 blk_queue_logical_block_size(disk->queue, bs); 1906 /* 1907 * Linux filesystems assume writing a single physical block is 1908 * an atomic operation. Hence limit the physical block size to the 1909 * value of the Atomic Write Unit Power Fail parameter. 1910 */ 1911 blk_queue_physical_block_size(disk->queue, min(phys_bs, atomic_bs)); 1912 blk_queue_io_min(disk->queue, phys_bs); 1913 blk_queue_io_opt(disk->queue, io_opt); 1914 1915 /* 1916 * Register a metadata profile for PI, or the plain non-integrity NVMe 1917 * metadata masquerading as Type 0 if supported, otherwise reject block 1918 * I/O to namespaces with metadata except when the namespace supports 1919 * PI, as it can strip/insert in that case. 1920 */ 1921 if (ns->ms) { 1922 if (IS_ENABLED(CONFIG_BLK_DEV_INTEGRITY) && 1923 (ns->features & NVME_NS_METADATA_SUPPORTED)) 1924 nvme_init_integrity(disk, ns, 1925 ns->ctrl->max_integrity_segments); 1926 else if (!nvme_ns_has_pi(ns)) 1927 capacity = 0; 1928 } 1929 1930 set_capacity_and_notify(disk, capacity); 1931 1932 nvme_config_discard(disk, ns); 1933 blk_queue_max_write_zeroes_sectors(disk->queue, 1934 ns->ctrl->max_zeroes_sectors); 1935 } 1936 1937 static bool nvme_ns_is_readonly(struct nvme_ns *ns, struct nvme_ns_info *info) 1938 { 1939 return info->is_readonly || test_bit(NVME_NS_FORCE_RO, &ns->flags); 1940 } 1941 1942 static inline bool nvme_first_scan(struct gendisk *disk) 1943 { 1944 /* nvme_alloc_ns() scans the disk prior to adding it */ 1945 return !disk_live(disk); 1946 } 1947 1948 static void nvme_set_chunk_sectors(struct nvme_ns *ns, struct nvme_id_ns *id) 1949 { 1950 struct nvme_ctrl *ctrl = ns->ctrl; 1951 u32 iob; 1952 1953 if ((ctrl->quirks & NVME_QUIRK_STRIPE_SIZE) && 1954 is_power_of_2(ctrl->max_hw_sectors)) 1955 iob = ctrl->max_hw_sectors; 1956 else 1957 iob = nvme_lba_to_sect(ns, le16_to_cpu(id->noiob)); 1958 1959 if (!iob) 1960 return; 1961 1962 if (!is_power_of_2(iob)) { 1963 if (nvme_first_scan(ns->disk)) 1964 pr_warn("%s: ignoring unaligned IO boundary:%u\n", 1965 ns->disk->disk_name, iob); 1966 return; 1967 } 1968 1969 if (blk_queue_is_zoned(ns->disk->queue)) { 1970 if (nvme_first_scan(ns->disk)) 1971 pr_warn("%s: ignoring zoned namespace IO boundary\n", 1972 ns->disk->disk_name); 1973 return; 1974 } 1975 1976 blk_queue_chunk_sectors(ns->queue, iob); 1977 } 1978 1979 static int nvme_update_ns_info_generic(struct nvme_ns *ns, 1980 struct nvme_ns_info *info) 1981 { 1982 blk_mq_freeze_queue(ns->disk->queue); 1983 nvme_set_queue_limits(ns->ctrl, ns->queue); 1984 set_disk_ro(ns->disk, nvme_ns_is_readonly(ns, info)); 1985 blk_mq_unfreeze_queue(ns->disk->queue); 1986 1987 if (nvme_ns_head_multipath(ns->head)) { 1988 blk_mq_freeze_queue(ns->head->disk->queue); 1989 set_disk_ro(ns->head->disk, nvme_ns_is_readonly(ns, info)); 1990 nvme_mpath_revalidate_paths(ns); 1991 blk_stack_limits(&ns->head->disk->queue->limits, 1992 &ns->queue->limits, 0); 1993 ns->head->disk->flags |= GENHD_FL_HIDDEN; 1994 blk_mq_unfreeze_queue(ns->head->disk->queue); 1995 } 1996 1997 /* Hide the block-interface for these devices */ 1998 ns->disk->flags |= GENHD_FL_HIDDEN; 1999 set_bit(NVME_NS_READY, &ns->flags); 2000 2001 return 0; 2002 } 2003 2004 static int nvme_update_ns_info_block(struct nvme_ns *ns, 2005 struct nvme_ns_info *info) 2006 { 2007 struct nvme_id_ns *id; 2008 unsigned lbaf; 2009 int ret; 2010 2011 ret = nvme_identify_ns(ns->ctrl, info->nsid, &id); 2012 if (ret) 2013 return ret; 2014 2015 if (id->ncap == 0) { 2016 /* namespace not allocated or attached */ 2017 info->is_removed = true; 2018 ret = -ENODEV; 2019 goto error; 2020 } 2021 2022 blk_mq_freeze_queue(ns->disk->queue); 2023 lbaf = nvme_lbaf_index(id->flbas); 2024 ns->lba_shift = id->lbaf[lbaf].ds; 2025 nvme_set_queue_limits(ns->ctrl, ns->queue); 2026 2027 ret = nvme_configure_metadata(ns, id); 2028 if (ret < 0) { 2029 blk_mq_unfreeze_queue(ns->disk->queue); 2030 goto out; 2031 } 2032 nvme_set_chunk_sectors(ns, id); 2033 nvme_update_disk_info(ns->disk, ns, id); 2034 2035 if (ns->head->ids.csi == NVME_CSI_ZNS) { 2036 ret = nvme_update_zone_info(ns, lbaf); 2037 if (ret) { 2038 blk_mq_unfreeze_queue(ns->disk->queue); 2039 goto out; 2040 } 2041 } 2042 2043 /* 2044 * Only set the DEAC bit if the device guarantees that reads from 2045 * deallocated data return zeroes. While the DEAC bit does not 2046 * require that, it must be a no-op if reads from deallocated data 2047 * do not return zeroes. 2048 */ 2049 if ((id->dlfeat & 0x7) == 0x1 && (id->dlfeat & (1 << 3))) 2050 ns->features |= NVME_NS_DEAC; 2051 set_disk_ro(ns->disk, nvme_ns_is_readonly(ns, info)); 2052 set_bit(NVME_NS_READY, &ns->flags); 2053 blk_mq_unfreeze_queue(ns->disk->queue); 2054 2055 if (blk_queue_is_zoned(ns->queue)) { 2056 ret = nvme_revalidate_zones(ns); 2057 if (ret && !nvme_first_scan(ns->disk)) 2058 goto out; 2059 } 2060 2061 if (nvme_ns_head_multipath(ns->head)) { 2062 blk_mq_freeze_queue(ns->head->disk->queue); 2063 nvme_update_disk_info(ns->head->disk, ns, id); 2064 set_disk_ro(ns->head->disk, nvme_ns_is_readonly(ns, info)); 2065 nvme_mpath_revalidate_paths(ns); 2066 blk_stack_limits(&ns->head->disk->queue->limits, 2067 &ns->queue->limits, 0); 2068 disk_update_readahead(ns->head->disk); 2069 blk_mq_unfreeze_queue(ns->head->disk->queue); 2070 } 2071 2072 ret = 0; 2073 out: 2074 /* 2075 * If probing fails due an unsupported feature, hide the block device, 2076 * but still allow other access. 2077 */ 2078 if (ret == -ENODEV) { 2079 ns->disk->flags |= GENHD_FL_HIDDEN; 2080 set_bit(NVME_NS_READY, &ns->flags); 2081 ret = 0; 2082 } 2083 2084 error: 2085 kfree(id); 2086 return ret; 2087 } 2088 2089 static int nvme_update_ns_info(struct nvme_ns *ns, struct nvme_ns_info *info) 2090 { 2091 switch (info->ids.csi) { 2092 case NVME_CSI_ZNS: 2093 if (!IS_ENABLED(CONFIG_BLK_DEV_ZONED)) { 2094 dev_info(ns->ctrl->device, 2095 "block device for nsid %u not supported without CONFIG_BLK_DEV_ZONED\n", 2096 info->nsid); 2097 return nvme_update_ns_info_generic(ns, info); 2098 } 2099 return nvme_update_ns_info_block(ns, info); 2100 case NVME_CSI_NVM: 2101 return nvme_update_ns_info_block(ns, info); 2102 default: 2103 dev_info(ns->ctrl->device, 2104 "block device for nsid %u not supported (csi %u)\n", 2105 info->nsid, info->ids.csi); 2106 return nvme_update_ns_info_generic(ns, info); 2107 } 2108 } 2109 2110 #ifdef CONFIG_BLK_SED_OPAL 2111 static int nvme_sec_submit(void *data, u16 spsp, u8 secp, void *buffer, size_t len, 2112 bool send) 2113 { 2114 struct nvme_ctrl *ctrl = data; 2115 struct nvme_command cmd = { }; 2116 2117 if (send) 2118 cmd.common.opcode = nvme_admin_security_send; 2119 else 2120 cmd.common.opcode = nvme_admin_security_recv; 2121 cmd.common.nsid = 0; 2122 cmd.common.cdw10 = cpu_to_le32(((u32)secp) << 24 | ((u32)spsp) << 8); 2123 cmd.common.cdw11 = cpu_to_le32(len); 2124 2125 return __nvme_submit_sync_cmd(ctrl->admin_q, &cmd, NULL, buffer, len, 2126 NVME_QID_ANY, 1, 0); 2127 } 2128 2129 static void nvme_configure_opal(struct nvme_ctrl *ctrl, bool was_suspended) 2130 { 2131 if (ctrl->oacs & NVME_CTRL_OACS_SEC_SUPP) { 2132 if (!ctrl->opal_dev) 2133 ctrl->opal_dev = init_opal_dev(ctrl, &nvme_sec_submit); 2134 else if (was_suspended) 2135 opal_unlock_from_suspend(ctrl->opal_dev); 2136 } else { 2137 free_opal_dev(ctrl->opal_dev); 2138 ctrl->opal_dev = NULL; 2139 } 2140 } 2141 #else 2142 static void nvme_configure_opal(struct nvme_ctrl *ctrl, bool was_suspended) 2143 { 2144 } 2145 #endif /* CONFIG_BLK_SED_OPAL */ 2146 2147 #ifdef CONFIG_BLK_DEV_ZONED 2148 static int nvme_report_zones(struct gendisk *disk, sector_t sector, 2149 unsigned int nr_zones, report_zones_cb cb, void *data) 2150 { 2151 return nvme_ns_report_zones(disk->private_data, sector, nr_zones, cb, 2152 data); 2153 } 2154 #else 2155 #define nvme_report_zones NULL 2156 #endif /* CONFIG_BLK_DEV_ZONED */ 2157 2158 const struct block_device_operations nvme_bdev_ops = { 2159 .owner = THIS_MODULE, 2160 .ioctl = nvme_ioctl, 2161 .compat_ioctl = blkdev_compat_ptr_ioctl, 2162 .open = nvme_open, 2163 .release = nvme_release, 2164 .getgeo = nvme_getgeo, 2165 .report_zones = nvme_report_zones, 2166 .pr_ops = &nvme_pr_ops, 2167 }; 2168 2169 static int nvme_wait_ready(struct nvme_ctrl *ctrl, u32 mask, u32 val, 2170 u32 timeout, const char *op) 2171 { 2172 unsigned long timeout_jiffies = jiffies + timeout * HZ; 2173 u32 csts; 2174 int ret; 2175 2176 while ((ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts)) == 0) { 2177 if (csts == ~0) 2178 return -ENODEV; 2179 if ((csts & mask) == val) 2180 break; 2181 2182 usleep_range(1000, 2000); 2183 if (fatal_signal_pending(current)) 2184 return -EINTR; 2185 if (time_after(jiffies, timeout_jiffies)) { 2186 dev_err(ctrl->device, 2187 "Device not ready; aborting %s, CSTS=0x%x\n", 2188 op, csts); 2189 return -ENODEV; 2190 } 2191 } 2192 2193 return ret; 2194 } 2195 2196 int nvme_disable_ctrl(struct nvme_ctrl *ctrl, bool shutdown) 2197 { 2198 int ret; 2199 2200 ctrl->ctrl_config &= ~NVME_CC_SHN_MASK; 2201 if (shutdown) 2202 ctrl->ctrl_config |= NVME_CC_SHN_NORMAL; 2203 else 2204 ctrl->ctrl_config &= ~NVME_CC_ENABLE; 2205 2206 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config); 2207 if (ret) 2208 return ret; 2209 2210 if (shutdown) { 2211 return nvme_wait_ready(ctrl, NVME_CSTS_SHST_MASK, 2212 NVME_CSTS_SHST_CMPLT, 2213 ctrl->shutdown_timeout, "shutdown"); 2214 } 2215 if (ctrl->quirks & NVME_QUIRK_DELAY_BEFORE_CHK_RDY) 2216 msleep(NVME_QUIRK_DELAY_AMOUNT); 2217 return nvme_wait_ready(ctrl, NVME_CSTS_RDY, 0, 2218 (NVME_CAP_TIMEOUT(ctrl->cap) + 1) / 2, "reset"); 2219 } 2220 EXPORT_SYMBOL_GPL(nvme_disable_ctrl); 2221 2222 int nvme_enable_ctrl(struct nvme_ctrl *ctrl) 2223 { 2224 unsigned dev_page_min; 2225 u32 timeout; 2226 int ret; 2227 2228 ret = ctrl->ops->reg_read64(ctrl, NVME_REG_CAP, &ctrl->cap); 2229 if (ret) { 2230 dev_err(ctrl->device, "Reading CAP failed (%d)\n", ret); 2231 return ret; 2232 } 2233 dev_page_min = NVME_CAP_MPSMIN(ctrl->cap) + 12; 2234 2235 if (NVME_CTRL_PAGE_SHIFT < dev_page_min) { 2236 dev_err(ctrl->device, 2237 "Minimum device page size %u too large for host (%u)\n", 2238 1 << dev_page_min, 1 << NVME_CTRL_PAGE_SHIFT); 2239 return -ENODEV; 2240 } 2241 2242 if (NVME_CAP_CSS(ctrl->cap) & NVME_CAP_CSS_CSI) 2243 ctrl->ctrl_config = NVME_CC_CSS_CSI; 2244 else 2245 ctrl->ctrl_config = NVME_CC_CSS_NVM; 2246 2247 /* 2248 * Setting CRIME results in CSTS.RDY before the media is ready. This 2249 * makes it possible for media related commands to return the error 2250 * NVME_SC_ADMIN_COMMAND_MEDIA_NOT_READY. Until the driver is 2251 * restructured to handle retries, disable CC.CRIME. 2252 */ 2253 ctrl->ctrl_config &= ~NVME_CC_CRIME; 2254 2255 ctrl->ctrl_config |= (NVME_CTRL_PAGE_SHIFT - 12) << NVME_CC_MPS_SHIFT; 2256 ctrl->ctrl_config |= NVME_CC_AMS_RR | NVME_CC_SHN_NONE; 2257 ctrl->ctrl_config |= NVME_CC_IOSQES | NVME_CC_IOCQES; 2258 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config); 2259 if (ret) 2260 return ret; 2261 2262 /* Flush write to device (required if transport is PCI) */ 2263 ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CC, &ctrl->ctrl_config); 2264 if (ret) 2265 return ret; 2266 2267 /* CAP value may change after initial CC write */ 2268 ret = ctrl->ops->reg_read64(ctrl, NVME_REG_CAP, &ctrl->cap); 2269 if (ret) 2270 return ret; 2271 2272 timeout = NVME_CAP_TIMEOUT(ctrl->cap); 2273 if (ctrl->cap & NVME_CAP_CRMS_CRWMS) { 2274 u32 crto, ready_timeout; 2275 2276 ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CRTO, &crto); 2277 if (ret) { 2278 dev_err(ctrl->device, "Reading CRTO failed (%d)\n", 2279 ret); 2280 return ret; 2281 } 2282 2283 /* 2284 * CRTO should always be greater or equal to CAP.TO, but some 2285 * devices are known to get this wrong. Use the larger of the 2286 * two values. 2287 */ 2288 ready_timeout = NVME_CRTO_CRWMT(crto); 2289 2290 if (ready_timeout < timeout) 2291 dev_warn_once(ctrl->device, "bad crto:%x cap:%llx\n", 2292 crto, ctrl->cap); 2293 else 2294 timeout = ready_timeout; 2295 } 2296 2297 ctrl->ctrl_config |= NVME_CC_ENABLE; 2298 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config); 2299 if (ret) 2300 return ret; 2301 return nvme_wait_ready(ctrl, NVME_CSTS_RDY, NVME_CSTS_RDY, 2302 (timeout + 1) / 2, "initialisation"); 2303 } 2304 EXPORT_SYMBOL_GPL(nvme_enable_ctrl); 2305 2306 static int nvme_configure_timestamp(struct nvme_ctrl *ctrl) 2307 { 2308 __le64 ts; 2309 int ret; 2310 2311 if (!(ctrl->oncs & NVME_CTRL_ONCS_TIMESTAMP)) 2312 return 0; 2313 2314 ts = cpu_to_le64(ktime_to_ms(ktime_get_real())); 2315 ret = nvme_set_features(ctrl, NVME_FEAT_TIMESTAMP, 0, &ts, sizeof(ts), 2316 NULL); 2317 if (ret) 2318 dev_warn_once(ctrl->device, 2319 "could not set timestamp (%d)\n", ret); 2320 return ret; 2321 } 2322 2323 static int nvme_configure_host_options(struct nvme_ctrl *ctrl) 2324 { 2325 struct nvme_feat_host_behavior *host; 2326 u8 acre = 0, lbafee = 0; 2327 int ret; 2328 2329 /* Don't bother enabling the feature if retry delay is not reported */ 2330 if (ctrl->crdt[0]) 2331 acre = NVME_ENABLE_ACRE; 2332 if (ctrl->ctratt & NVME_CTRL_ATTR_ELBAS) 2333 lbafee = NVME_ENABLE_LBAFEE; 2334 2335 if (!acre && !lbafee) 2336 return 0; 2337 2338 host = kzalloc(sizeof(*host), GFP_KERNEL); 2339 if (!host) 2340 return 0; 2341 2342 host->acre = acre; 2343 host->lbafee = lbafee; 2344 ret = nvme_set_features(ctrl, NVME_FEAT_HOST_BEHAVIOR, 0, 2345 host, sizeof(*host), NULL); 2346 kfree(host); 2347 return ret; 2348 } 2349 2350 /* 2351 * The function checks whether the given total (exlat + enlat) latency of 2352 * a power state allows the latter to be used as an APST transition target. 2353 * It does so by comparing the latency to the primary and secondary latency 2354 * tolerances defined by module params. If there's a match, the corresponding 2355 * timeout value is returned and the matching tolerance index (1 or 2) is 2356 * reported. 2357 */ 2358 static bool nvme_apst_get_transition_time(u64 total_latency, 2359 u64 *transition_time, unsigned *last_index) 2360 { 2361 if (total_latency <= apst_primary_latency_tol_us) { 2362 if (*last_index == 1) 2363 return false; 2364 *last_index = 1; 2365 *transition_time = apst_primary_timeout_ms; 2366 return true; 2367 } 2368 if (apst_secondary_timeout_ms && 2369 total_latency <= apst_secondary_latency_tol_us) { 2370 if (*last_index <= 2) 2371 return false; 2372 *last_index = 2; 2373 *transition_time = apst_secondary_timeout_ms; 2374 return true; 2375 } 2376 return false; 2377 } 2378 2379 /* 2380 * APST (Autonomous Power State Transition) lets us program a table of power 2381 * state transitions that the controller will perform automatically. 2382 * 2383 * Depending on module params, one of the two supported techniques will be used: 2384 * 2385 * - If the parameters provide explicit timeouts and tolerances, they will be 2386 * used to build a table with up to 2 non-operational states to transition to. 2387 * The default parameter values were selected based on the values used by 2388 * Microsoft's and Intel's NVMe drivers. Yet, since we don't implement dynamic 2389 * regeneration of the APST table in the event of switching between external 2390 * and battery power, the timeouts and tolerances reflect a compromise 2391 * between values used by Microsoft for AC and battery scenarios. 2392 * - If not, we'll configure the table with a simple heuristic: we are willing 2393 * to spend at most 2% of the time transitioning between power states. 2394 * Therefore, when running in any given state, we will enter the next 2395 * lower-power non-operational state after waiting 50 * (enlat + exlat) 2396 * microseconds, as long as that state's exit latency is under the requested 2397 * maximum latency. 2398 * 2399 * We will not autonomously enter any non-operational state for which the total 2400 * latency exceeds ps_max_latency_us. 2401 * 2402 * Users can set ps_max_latency_us to zero to turn off APST. 2403 */ 2404 static int nvme_configure_apst(struct nvme_ctrl *ctrl) 2405 { 2406 struct nvme_feat_auto_pst *table; 2407 unsigned apste = 0; 2408 u64 max_lat_us = 0; 2409 __le64 target = 0; 2410 int max_ps = -1; 2411 int state; 2412 int ret; 2413 unsigned last_lt_index = UINT_MAX; 2414 2415 /* 2416 * If APST isn't supported or if we haven't been initialized yet, 2417 * then don't do anything. 2418 */ 2419 if (!ctrl->apsta) 2420 return 0; 2421 2422 if (ctrl->npss > 31) { 2423 dev_warn(ctrl->device, "NPSS is invalid; not using APST\n"); 2424 return 0; 2425 } 2426 2427 table = kzalloc(sizeof(*table), GFP_KERNEL); 2428 if (!table) 2429 return 0; 2430 2431 if (!ctrl->apst_enabled || ctrl->ps_max_latency_us == 0) { 2432 /* Turn off APST. */ 2433 dev_dbg(ctrl->device, "APST disabled\n"); 2434 goto done; 2435 } 2436 2437 /* 2438 * Walk through all states from lowest- to highest-power. 2439 * According to the spec, lower-numbered states use more power. NPSS, 2440 * despite the name, is the index of the lowest-power state, not the 2441 * number of states. 2442 */ 2443 for (state = (int)ctrl->npss; state >= 0; state--) { 2444 u64 total_latency_us, exit_latency_us, transition_ms; 2445 2446 if (target) 2447 table->entries[state] = target; 2448 2449 /* 2450 * Don't allow transitions to the deepest state if it's quirked 2451 * off. 2452 */ 2453 if (state == ctrl->npss && 2454 (ctrl->quirks & NVME_QUIRK_NO_DEEPEST_PS)) 2455 continue; 2456 2457 /* 2458 * Is this state a useful non-operational state for higher-power 2459 * states to autonomously transition to? 2460 */ 2461 if (!(ctrl->psd[state].flags & NVME_PS_FLAGS_NON_OP_STATE)) 2462 continue; 2463 2464 exit_latency_us = (u64)le32_to_cpu(ctrl->psd[state].exit_lat); 2465 if (exit_latency_us > ctrl->ps_max_latency_us) 2466 continue; 2467 2468 total_latency_us = exit_latency_us + 2469 le32_to_cpu(ctrl->psd[state].entry_lat); 2470 2471 /* 2472 * This state is good. It can be used as the APST idle target 2473 * for higher power states. 2474 */ 2475 if (apst_primary_timeout_ms && apst_primary_latency_tol_us) { 2476 if (!nvme_apst_get_transition_time(total_latency_us, 2477 &transition_ms, &last_lt_index)) 2478 continue; 2479 } else { 2480 transition_ms = total_latency_us + 19; 2481 do_div(transition_ms, 20); 2482 if (transition_ms > (1 << 24) - 1) 2483 transition_ms = (1 << 24) - 1; 2484 } 2485 2486 target = cpu_to_le64((state << 3) | (transition_ms << 8)); 2487 if (max_ps == -1) 2488 max_ps = state; 2489 if (total_latency_us > max_lat_us) 2490 max_lat_us = total_latency_us; 2491 } 2492 2493 if (max_ps == -1) 2494 dev_dbg(ctrl->device, "APST enabled but no non-operational states are available\n"); 2495 else 2496 dev_dbg(ctrl->device, "APST enabled: max PS = %d, max round-trip latency = %lluus, table = %*phN\n", 2497 max_ps, max_lat_us, (int)sizeof(*table), table); 2498 apste = 1; 2499 2500 done: 2501 ret = nvme_set_features(ctrl, NVME_FEAT_AUTO_PST, apste, 2502 table, sizeof(*table), NULL); 2503 if (ret) 2504 dev_err(ctrl->device, "failed to set APST feature (%d)\n", ret); 2505 kfree(table); 2506 return ret; 2507 } 2508 2509 static void nvme_set_latency_tolerance(struct device *dev, s32 val) 2510 { 2511 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 2512 u64 latency; 2513 2514 switch (val) { 2515 case PM_QOS_LATENCY_TOLERANCE_NO_CONSTRAINT: 2516 case PM_QOS_LATENCY_ANY: 2517 latency = U64_MAX; 2518 break; 2519 2520 default: 2521 latency = val; 2522 } 2523 2524 if (ctrl->ps_max_latency_us != latency) { 2525 ctrl->ps_max_latency_us = latency; 2526 if (nvme_ctrl_state(ctrl) == NVME_CTRL_LIVE) 2527 nvme_configure_apst(ctrl); 2528 } 2529 } 2530 2531 struct nvme_core_quirk_entry { 2532 /* 2533 * NVMe model and firmware strings are padded with spaces. For 2534 * simplicity, strings in the quirk table are padded with NULLs 2535 * instead. 2536 */ 2537 u16 vid; 2538 const char *mn; 2539 const char *fr; 2540 unsigned long quirks; 2541 }; 2542 2543 static const struct nvme_core_quirk_entry core_quirks[] = { 2544 { 2545 /* 2546 * This Toshiba device seems to die using any APST states. See: 2547 * https://bugs.launchpad.net/ubuntu/+source/linux/+bug/1678184/comments/11 2548 */ 2549 .vid = 0x1179, 2550 .mn = "THNSF5256GPUK TOSHIBA", 2551 .quirks = NVME_QUIRK_NO_APST, 2552 }, 2553 { 2554 /* 2555 * This LiteON CL1-3D*-Q11 firmware version has a race 2556 * condition associated with actions related to suspend to idle 2557 * LiteON has resolved the problem in future firmware 2558 */ 2559 .vid = 0x14a4, 2560 .fr = "22301111", 2561 .quirks = NVME_QUIRK_SIMPLE_SUSPEND, 2562 }, 2563 { 2564 /* 2565 * This Kioxia CD6-V Series / HPE PE8030 device times out and 2566 * aborts I/O during any load, but more easily reproducible 2567 * with discards (fstrim). 2568 * 2569 * The device is left in a state where it is also not possible 2570 * to use "nvme set-feature" to disable APST, but booting with 2571 * nvme_core.default_ps_max_latency=0 works. 2572 */ 2573 .vid = 0x1e0f, 2574 .mn = "KCD6XVUL6T40", 2575 .quirks = NVME_QUIRK_NO_APST, 2576 }, 2577 { 2578 /* 2579 * The external Samsung X5 SSD fails initialization without a 2580 * delay before checking if it is ready and has a whole set of 2581 * other problems. To make this even more interesting, it 2582 * shares the PCI ID with internal Samsung 970 Evo Plus that 2583 * does not need or want these quirks. 2584 */ 2585 .vid = 0x144d, 2586 .mn = "Samsung Portable SSD X5", 2587 .quirks = NVME_QUIRK_DELAY_BEFORE_CHK_RDY | 2588 NVME_QUIRK_NO_DEEPEST_PS | 2589 NVME_QUIRK_IGNORE_DEV_SUBNQN, 2590 } 2591 }; 2592 2593 /* match is null-terminated but idstr is space-padded. */ 2594 static bool string_matches(const char *idstr, const char *match, size_t len) 2595 { 2596 size_t matchlen; 2597 2598 if (!match) 2599 return true; 2600 2601 matchlen = strlen(match); 2602 WARN_ON_ONCE(matchlen > len); 2603 2604 if (memcmp(idstr, match, matchlen)) 2605 return false; 2606 2607 for (; matchlen < len; matchlen++) 2608 if (idstr[matchlen] != ' ') 2609 return false; 2610 2611 return true; 2612 } 2613 2614 static bool quirk_matches(const struct nvme_id_ctrl *id, 2615 const struct nvme_core_quirk_entry *q) 2616 { 2617 return q->vid == le16_to_cpu(id->vid) && 2618 string_matches(id->mn, q->mn, sizeof(id->mn)) && 2619 string_matches(id->fr, q->fr, sizeof(id->fr)); 2620 } 2621 2622 static void nvme_init_subnqn(struct nvme_subsystem *subsys, struct nvme_ctrl *ctrl, 2623 struct nvme_id_ctrl *id) 2624 { 2625 size_t nqnlen; 2626 int off; 2627 2628 if(!(ctrl->quirks & NVME_QUIRK_IGNORE_DEV_SUBNQN)) { 2629 nqnlen = strnlen(id->subnqn, NVMF_NQN_SIZE); 2630 if (nqnlen > 0 && nqnlen < NVMF_NQN_SIZE) { 2631 strscpy(subsys->subnqn, id->subnqn, NVMF_NQN_SIZE); 2632 return; 2633 } 2634 2635 if (ctrl->vs >= NVME_VS(1, 2, 1)) 2636 dev_warn(ctrl->device, "missing or invalid SUBNQN field.\n"); 2637 } 2638 2639 /* 2640 * Generate a "fake" NQN similar to the one in Section 4.5 of the NVMe 2641 * Base Specification 2.0. It is slightly different from the format 2642 * specified there due to historic reasons, and we can't change it now. 2643 */ 2644 off = snprintf(subsys->subnqn, NVMF_NQN_SIZE, 2645 "nqn.2014.08.org.nvmexpress:%04x%04x", 2646 le16_to_cpu(id->vid), le16_to_cpu(id->ssvid)); 2647 memcpy(subsys->subnqn + off, id->sn, sizeof(id->sn)); 2648 off += sizeof(id->sn); 2649 memcpy(subsys->subnqn + off, id->mn, sizeof(id->mn)); 2650 off += sizeof(id->mn); 2651 memset(subsys->subnqn + off, 0, sizeof(subsys->subnqn) - off); 2652 } 2653 2654 static void nvme_release_subsystem(struct device *dev) 2655 { 2656 struct nvme_subsystem *subsys = 2657 container_of(dev, struct nvme_subsystem, dev); 2658 2659 if (subsys->instance >= 0) 2660 ida_free(&nvme_instance_ida, subsys->instance); 2661 kfree(subsys); 2662 } 2663 2664 static void nvme_destroy_subsystem(struct kref *ref) 2665 { 2666 struct nvme_subsystem *subsys = 2667 container_of(ref, struct nvme_subsystem, ref); 2668 2669 mutex_lock(&nvme_subsystems_lock); 2670 list_del(&subsys->entry); 2671 mutex_unlock(&nvme_subsystems_lock); 2672 2673 ida_destroy(&subsys->ns_ida); 2674 device_del(&subsys->dev); 2675 put_device(&subsys->dev); 2676 } 2677 2678 static void nvme_put_subsystem(struct nvme_subsystem *subsys) 2679 { 2680 kref_put(&subsys->ref, nvme_destroy_subsystem); 2681 } 2682 2683 static struct nvme_subsystem *__nvme_find_get_subsystem(const char *subsysnqn) 2684 { 2685 struct nvme_subsystem *subsys; 2686 2687 lockdep_assert_held(&nvme_subsystems_lock); 2688 2689 /* 2690 * Fail matches for discovery subsystems. This results 2691 * in each discovery controller bound to a unique subsystem. 2692 * This avoids issues with validating controller values 2693 * that can only be true when there is a single unique subsystem. 2694 * There may be multiple and completely independent entities 2695 * that provide discovery controllers. 2696 */ 2697 if (!strcmp(subsysnqn, NVME_DISC_SUBSYS_NAME)) 2698 return NULL; 2699 2700 list_for_each_entry(subsys, &nvme_subsystems, entry) { 2701 if (strcmp(subsys->subnqn, subsysnqn)) 2702 continue; 2703 if (!kref_get_unless_zero(&subsys->ref)) 2704 continue; 2705 return subsys; 2706 } 2707 2708 return NULL; 2709 } 2710 2711 static inline bool nvme_discovery_ctrl(struct nvme_ctrl *ctrl) 2712 { 2713 return ctrl->opts && ctrl->opts->discovery_nqn; 2714 } 2715 2716 static bool nvme_validate_cntlid(struct nvme_subsystem *subsys, 2717 struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id) 2718 { 2719 struct nvme_ctrl *tmp; 2720 2721 lockdep_assert_held(&nvme_subsystems_lock); 2722 2723 list_for_each_entry(tmp, &subsys->ctrls, subsys_entry) { 2724 if (nvme_state_terminal(tmp)) 2725 continue; 2726 2727 if (tmp->cntlid == ctrl->cntlid) { 2728 dev_err(ctrl->device, 2729 "Duplicate cntlid %u with %s, subsys %s, rejecting\n", 2730 ctrl->cntlid, dev_name(tmp->device), 2731 subsys->subnqn); 2732 return false; 2733 } 2734 2735 if ((id->cmic & NVME_CTRL_CMIC_MULTI_CTRL) || 2736 nvme_discovery_ctrl(ctrl)) 2737 continue; 2738 2739 dev_err(ctrl->device, 2740 "Subsystem does not support multiple controllers\n"); 2741 return false; 2742 } 2743 2744 return true; 2745 } 2746 2747 static int nvme_init_subsystem(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id) 2748 { 2749 struct nvme_subsystem *subsys, *found; 2750 int ret; 2751 2752 subsys = kzalloc(sizeof(*subsys), GFP_KERNEL); 2753 if (!subsys) 2754 return -ENOMEM; 2755 2756 subsys->instance = -1; 2757 mutex_init(&subsys->lock); 2758 kref_init(&subsys->ref); 2759 INIT_LIST_HEAD(&subsys->ctrls); 2760 INIT_LIST_HEAD(&subsys->nsheads); 2761 nvme_init_subnqn(subsys, ctrl, id); 2762 memcpy(subsys->serial, id->sn, sizeof(subsys->serial)); 2763 memcpy(subsys->model, id->mn, sizeof(subsys->model)); 2764 subsys->vendor_id = le16_to_cpu(id->vid); 2765 subsys->cmic = id->cmic; 2766 2767 /* Versions prior to 1.4 don't necessarily report a valid type */ 2768 if (id->cntrltype == NVME_CTRL_DISC || 2769 !strcmp(subsys->subnqn, NVME_DISC_SUBSYS_NAME)) 2770 subsys->subtype = NVME_NQN_DISC; 2771 else 2772 subsys->subtype = NVME_NQN_NVME; 2773 2774 if (nvme_discovery_ctrl(ctrl) && subsys->subtype != NVME_NQN_DISC) { 2775 dev_err(ctrl->device, 2776 "Subsystem %s is not a discovery controller", 2777 subsys->subnqn); 2778 kfree(subsys); 2779 return -EINVAL; 2780 } 2781 subsys->awupf = le16_to_cpu(id->awupf); 2782 nvme_mpath_default_iopolicy(subsys); 2783 2784 subsys->dev.class = nvme_subsys_class; 2785 subsys->dev.release = nvme_release_subsystem; 2786 subsys->dev.groups = nvme_subsys_attrs_groups; 2787 dev_set_name(&subsys->dev, "nvme-subsys%d", ctrl->instance); 2788 device_initialize(&subsys->dev); 2789 2790 mutex_lock(&nvme_subsystems_lock); 2791 found = __nvme_find_get_subsystem(subsys->subnqn); 2792 if (found) { 2793 put_device(&subsys->dev); 2794 subsys = found; 2795 2796 if (!nvme_validate_cntlid(subsys, ctrl, id)) { 2797 ret = -EINVAL; 2798 goto out_put_subsystem; 2799 } 2800 } else { 2801 ret = device_add(&subsys->dev); 2802 if (ret) { 2803 dev_err(ctrl->device, 2804 "failed to register subsystem device.\n"); 2805 put_device(&subsys->dev); 2806 goto out_unlock; 2807 } 2808 ida_init(&subsys->ns_ida); 2809 list_add_tail(&subsys->entry, &nvme_subsystems); 2810 } 2811 2812 ret = sysfs_create_link(&subsys->dev.kobj, &ctrl->device->kobj, 2813 dev_name(ctrl->device)); 2814 if (ret) { 2815 dev_err(ctrl->device, 2816 "failed to create sysfs link from subsystem.\n"); 2817 goto out_put_subsystem; 2818 } 2819 2820 if (!found) 2821 subsys->instance = ctrl->instance; 2822 ctrl->subsys = subsys; 2823 list_add_tail(&ctrl->subsys_entry, &subsys->ctrls); 2824 mutex_unlock(&nvme_subsystems_lock); 2825 return 0; 2826 2827 out_put_subsystem: 2828 nvme_put_subsystem(subsys); 2829 out_unlock: 2830 mutex_unlock(&nvme_subsystems_lock); 2831 return ret; 2832 } 2833 2834 int nvme_get_log(struct nvme_ctrl *ctrl, u32 nsid, u8 log_page, u8 lsp, u8 csi, 2835 void *log, size_t size, u64 offset) 2836 { 2837 struct nvme_command c = { }; 2838 u32 dwlen = nvme_bytes_to_numd(size); 2839 2840 c.get_log_page.opcode = nvme_admin_get_log_page; 2841 c.get_log_page.nsid = cpu_to_le32(nsid); 2842 c.get_log_page.lid = log_page; 2843 c.get_log_page.lsp = lsp; 2844 c.get_log_page.numdl = cpu_to_le16(dwlen & ((1 << 16) - 1)); 2845 c.get_log_page.numdu = cpu_to_le16(dwlen >> 16); 2846 c.get_log_page.lpol = cpu_to_le32(lower_32_bits(offset)); 2847 c.get_log_page.lpou = cpu_to_le32(upper_32_bits(offset)); 2848 c.get_log_page.csi = csi; 2849 2850 return nvme_submit_sync_cmd(ctrl->admin_q, &c, log, size); 2851 } 2852 2853 static int nvme_get_effects_log(struct nvme_ctrl *ctrl, u8 csi, 2854 struct nvme_effects_log **log) 2855 { 2856 struct nvme_effects_log *old, *cel = xa_load(&ctrl->cels, csi); 2857 int ret; 2858 2859 if (cel) 2860 goto out; 2861 2862 cel = kzalloc(sizeof(*cel), GFP_KERNEL); 2863 if (!cel) 2864 return -ENOMEM; 2865 2866 ret = nvme_get_log(ctrl, 0x00, NVME_LOG_CMD_EFFECTS, 0, csi, 2867 cel, sizeof(*cel), 0); 2868 if (ret) { 2869 kfree(cel); 2870 return ret; 2871 } 2872 2873 old = xa_store(&ctrl->cels, csi, cel, GFP_KERNEL); 2874 if (xa_is_err(old)) { 2875 kfree(cel); 2876 return xa_err(old); 2877 } 2878 out: 2879 *log = cel; 2880 return 0; 2881 } 2882 2883 static inline u32 nvme_mps_to_sectors(struct nvme_ctrl *ctrl, u32 units) 2884 { 2885 u32 page_shift = NVME_CAP_MPSMIN(ctrl->cap) + 12, val; 2886 2887 if (check_shl_overflow(1U, units + page_shift - 9, &val)) 2888 return UINT_MAX; 2889 return val; 2890 } 2891 2892 static int nvme_init_non_mdts_limits(struct nvme_ctrl *ctrl) 2893 { 2894 struct nvme_command c = { }; 2895 struct nvme_id_ctrl_nvm *id; 2896 int ret; 2897 2898 if (ctrl->oncs & NVME_CTRL_ONCS_DSM) { 2899 ctrl->max_discard_sectors = UINT_MAX; 2900 ctrl->max_discard_segments = NVME_DSM_MAX_RANGES; 2901 } else { 2902 ctrl->max_discard_sectors = 0; 2903 ctrl->max_discard_segments = 0; 2904 } 2905 2906 /* 2907 * Even though NVMe spec explicitly states that MDTS is not applicable 2908 * to the write-zeroes, we are cautious and limit the size to the 2909 * controllers max_hw_sectors value, which is based on the MDTS field 2910 * and possibly other limiting factors. 2911 */ 2912 if ((ctrl->oncs & NVME_CTRL_ONCS_WRITE_ZEROES) && 2913 !(ctrl->quirks & NVME_QUIRK_DISABLE_WRITE_ZEROES)) 2914 ctrl->max_zeroes_sectors = ctrl->max_hw_sectors; 2915 else 2916 ctrl->max_zeroes_sectors = 0; 2917 2918 if (ctrl->subsys->subtype != NVME_NQN_NVME || 2919 nvme_ctrl_limited_cns(ctrl) || 2920 test_bit(NVME_CTRL_SKIP_ID_CNS_CS, &ctrl->flags)) 2921 return 0; 2922 2923 id = kzalloc(sizeof(*id), GFP_KERNEL); 2924 if (!id) 2925 return -ENOMEM; 2926 2927 c.identify.opcode = nvme_admin_identify; 2928 c.identify.cns = NVME_ID_CNS_CS_CTRL; 2929 c.identify.csi = NVME_CSI_NVM; 2930 2931 ret = nvme_submit_sync_cmd(ctrl->admin_q, &c, id, sizeof(*id)); 2932 if (ret) 2933 goto free_data; 2934 2935 if (id->dmrl) 2936 ctrl->max_discard_segments = id->dmrl; 2937 ctrl->dmrsl = le32_to_cpu(id->dmrsl); 2938 if (id->wzsl) 2939 ctrl->max_zeroes_sectors = nvme_mps_to_sectors(ctrl, id->wzsl); 2940 2941 free_data: 2942 if (ret > 0) 2943 set_bit(NVME_CTRL_SKIP_ID_CNS_CS, &ctrl->flags); 2944 kfree(id); 2945 return ret; 2946 } 2947 2948 static int nvme_init_effects_log(struct nvme_ctrl *ctrl, 2949 u8 csi, struct nvme_effects_log **log) 2950 { 2951 struct nvme_effects_log *effects, *old; 2952 2953 effects = kzalloc(sizeof(*effects), GFP_KERNEL); 2954 if (!effects) 2955 return -ENOMEM; 2956 2957 old = xa_store(&ctrl->cels, csi, effects, GFP_KERNEL); 2958 if (xa_is_err(old)) { 2959 kfree(effects); 2960 return xa_err(old); 2961 } 2962 2963 *log = effects; 2964 return 0; 2965 } 2966 2967 static void nvme_init_known_nvm_effects(struct nvme_ctrl *ctrl) 2968 { 2969 struct nvme_effects_log *log = ctrl->effects; 2970 2971 log->acs[nvme_admin_format_nvm] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC | 2972 NVME_CMD_EFFECTS_NCC | 2973 NVME_CMD_EFFECTS_CSE_MASK); 2974 log->acs[nvme_admin_sanitize_nvm] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC | 2975 NVME_CMD_EFFECTS_CSE_MASK); 2976 2977 /* 2978 * The spec says the result of a security receive command depends on 2979 * the previous security send command. As such, many vendors log this 2980 * command as one to submitted only when no other commands to the same 2981 * namespace are outstanding. The intention is to tell the host to 2982 * prevent mixing security send and receive. 2983 * 2984 * This driver can only enforce such exclusive access against IO 2985 * queues, though. We are not readily able to enforce such a rule for 2986 * two commands to the admin queue, which is the only queue that 2987 * matters for this command. 2988 * 2989 * Rather than blindly freezing the IO queues for this effect that 2990 * doesn't even apply to IO, mask it off. 2991 */ 2992 log->acs[nvme_admin_security_recv] &= cpu_to_le32(~NVME_CMD_EFFECTS_CSE_MASK); 2993 2994 log->iocs[nvme_cmd_write] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC); 2995 log->iocs[nvme_cmd_write_zeroes] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC); 2996 log->iocs[nvme_cmd_write_uncor] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC); 2997 } 2998 2999 static int nvme_init_effects(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id) 3000 { 3001 int ret = 0; 3002 3003 if (ctrl->effects) 3004 return 0; 3005 3006 if (id->lpa & NVME_CTRL_LPA_CMD_EFFECTS_LOG) { 3007 ret = nvme_get_effects_log(ctrl, NVME_CSI_NVM, &ctrl->effects); 3008 if (ret < 0) 3009 return ret; 3010 } 3011 3012 if (!ctrl->effects) { 3013 ret = nvme_init_effects_log(ctrl, NVME_CSI_NVM, &ctrl->effects); 3014 if (ret < 0) 3015 return ret; 3016 } 3017 3018 nvme_init_known_nvm_effects(ctrl); 3019 return 0; 3020 } 3021 3022 static int nvme_init_identify(struct nvme_ctrl *ctrl) 3023 { 3024 struct nvme_id_ctrl *id; 3025 u32 max_hw_sectors; 3026 bool prev_apst_enabled; 3027 int ret; 3028 3029 ret = nvme_identify_ctrl(ctrl, &id); 3030 if (ret) { 3031 dev_err(ctrl->device, "Identify Controller failed (%d)\n", ret); 3032 return -EIO; 3033 } 3034 3035 if (!(ctrl->ops->flags & NVME_F_FABRICS)) 3036 ctrl->cntlid = le16_to_cpu(id->cntlid); 3037 3038 if (!ctrl->identified) { 3039 unsigned int i; 3040 3041 /* 3042 * Check for quirks. Quirk can depend on firmware version, 3043 * so, in principle, the set of quirks present can change 3044 * across a reset. As a possible future enhancement, we 3045 * could re-scan for quirks every time we reinitialize 3046 * the device, but we'd have to make sure that the driver 3047 * behaves intelligently if the quirks change. 3048 */ 3049 for (i = 0; i < ARRAY_SIZE(core_quirks); i++) { 3050 if (quirk_matches(id, &core_quirks[i])) 3051 ctrl->quirks |= core_quirks[i].quirks; 3052 } 3053 3054 ret = nvme_init_subsystem(ctrl, id); 3055 if (ret) 3056 goto out_free; 3057 3058 ret = nvme_init_effects(ctrl, id); 3059 if (ret) 3060 goto out_free; 3061 } 3062 memcpy(ctrl->subsys->firmware_rev, id->fr, 3063 sizeof(ctrl->subsys->firmware_rev)); 3064 3065 if (force_apst && (ctrl->quirks & NVME_QUIRK_NO_DEEPEST_PS)) { 3066 dev_warn(ctrl->device, "forcibly allowing all power states due to nvme_core.force_apst -- use at your own risk\n"); 3067 ctrl->quirks &= ~NVME_QUIRK_NO_DEEPEST_PS; 3068 } 3069 3070 ctrl->crdt[0] = le16_to_cpu(id->crdt1); 3071 ctrl->crdt[1] = le16_to_cpu(id->crdt2); 3072 ctrl->crdt[2] = le16_to_cpu(id->crdt3); 3073 3074 ctrl->oacs = le16_to_cpu(id->oacs); 3075 ctrl->oncs = le16_to_cpu(id->oncs); 3076 ctrl->mtfa = le16_to_cpu(id->mtfa); 3077 ctrl->oaes = le32_to_cpu(id->oaes); 3078 ctrl->wctemp = le16_to_cpu(id->wctemp); 3079 ctrl->cctemp = le16_to_cpu(id->cctemp); 3080 3081 atomic_set(&ctrl->abort_limit, id->acl + 1); 3082 ctrl->vwc = id->vwc; 3083 if (id->mdts) 3084 max_hw_sectors = nvme_mps_to_sectors(ctrl, id->mdts); 3085 else 3086 max_hw_sectors = UINT_MAX; 3087 ctrl->max_hw_sectors = 3088 min_not_zero(ctrl->max_hw_sectors, max_hw_sectors); 3089 3090 nvme_set_queue_limits(ctrl, ctrl->admin_q); 3091 ctrl->sgls = le32_to_cpu(id->sgls); 3092 ctrl->kas = le16_to_cpu(id->kas); 3093 ctrl->max_namespaces = le32_to_cpu(id->mnan); 3094 ctrl->ctratt = le32_to_cpu(id->ctratt); 3095 3096 ctrl->cntrltype = id->cntrltype; 3097 ctrl->dctype = id->dctype; 3098 3099 if (id->rtd3e) { 3100 /* us -> s */ 3101 u32 transition_time = le32_to_cpu(id->rtd3e) / USEC_PER_SEC; 3102 3103 ctrl->shutdown_timeout = clamp_t(unsigned int, transition_time, 3104 shutdown_timeout, 60); 3105 3106 if (ctrl->shutdown_timeout != shutdown_timeout) 3107 dev_info(ctrl->device, 3108 "Shutdown timeout set to %u seconds\n", 3109 ctrl->shutdown_timeout); 3110 } else 3111 ctrl->shutdown_timeout = shutdown_timeout; 3112 3113 ctrl->npss = id->npss; 3114 ctrl->apsta = id->apsta; 3115 prev_apst_enabled = ctrl->apst_enabled; 3116 if (ctrl->quirks & NVME_QUIRK_NO_APST) { 3117 if (force_apst && id->apsta) { 3118 dev_warn(ctrl->device, "forcibly allowing APST due to nvme_core.force_apst -- use at your own risk\n"); 3119 ctrl->apst_enabled = true; 3120 } else { 3121 ctrl->apst_enabled = false; 3122 } 3123 } else { 3124 ctrl->apst_enabled = id->apsta; 3125 } 3126 memcpy(ctrl->psd, id->psd, sizeof(ctrl->psd)); 3127 3128 if (ctrl->ops->flags & NVME_F_FABRICS) { 3129 ctrl->icdoff = le16_to_cpu(id->icdoff); 3130 ctrl->ioccsz = le32_to_cpu(id->ioccsz); 3131 ctrl->iorcsz = le32_to_cpu(id->iorcsz); 3132 ctrl->maxcmd = le16_to_cpu(id->maxcmd); 3133 3134 /* 3135 * In fabrics we need to verify the cntlid matches the 3136 * admin connect 3137 */ 3138 if (ctrl->cntlid != le16_to_cpu(id->cntlid)) { 3139 dev_err(ctrl->device, 3140 "Mismatching cntlid: Connect %u vs Identify " 3141 "%u, rejecting\n", 3142 ctrl->cntlid, le16_to_cpu(id->cntlid)); 3143 ret = -EINVAL; 3144 goto out_free; 3145 } 3146 3147 if (!nvme_discovery_ctrl(ctrl) && !ctrl->kas) { 3148 dev_err(ctrl->device, 3149 "keep-alive support is mandatory for fabrics\n"); 3150 ret = -EINVAL; 3151 goto out_free; 3152 } 3153 } else { 3154 ctrl->hmpre = le32_to_cpu(id->hmpre); 3155 ctrl->hmmin = le32_to_cpu(id->hmmin); 3156 ctrl->hmminds = le32_to_cpu(id->hmminds); 3157 ctrl->hmmaxd = le16_to_cpu(id->hmmaxd); 3158 } 3159 3160 ret = nvme_mpath_init_identify(ctrl, id); 3161 if (ret < 0) 3162 goto out_free; 3163 3164 if (ctrl->apst_enabled && !prev_apst_enabled) 3165 dev_pm_qos_expose_latency_tolerance(ctrl->device); 3166 else if (!ctrl->apst_enabled && prev_apst_enabled) 3167 dev_pm_qos_hide_latency_tolerance(ctrl->device); 3168 3169 out_free: 3170 kfree(id); 3171 return ret; 3172 } 3173 3174 /* 3175 * Initialize the cached copies of the Identify data and various controller 3176 * register in our nvme_ctrl structure. This should be called as soon as 3177 * the admin queue is fully up and running. 3178 */ 3179 int nvme_init_ctrl_finish(struct nvme_ctrl *ctrl, bool was_suspended) 3180 { 3181 int ret; 3182 3183 ret = ctrl->ops->reg_read32(ctrl, NVME_REG_VS, &ctrl->vs); 3184 if (ret) { 3185 dev_err(ctrl->device, "Reading VS failed (%d)\n", ret); 3186 return ret; 3187 } 3188 3189 ctrl->sqsize = min_t(u16, NVME_CAP_MQES(ctrl->cap), ctrl->sqsize); 3190 3191 if (ctrl->vs >= NVME_VS(1, 1, 0)) 3192 ctrl->subsystem = NVME_CAP_NSSRC(ctrl->cap); 3193 3194 ret = nvme_init_identify(ctrl); 3195 if (ret) 3196 return ret; 3197 3198 ret = nvme_configure_apst(ctrl); 3199 if (ret < 0) 3200 return ret; 3201 3202 ret = nvme_configure_timestamp(ctrl); 3203 if (ret < 0) 3204 return ret; 3205 3206 ret = nvme_configure_host_options(ctrl); 3207 if (ret < 0) 3208 return ret; 3209 3210 nvme_configure_opal(ctrl, was_suspended); 3211 3212 if (!ctrl->identified && !nvme_discovery_ctrl(ctrl)) { 3213 /* 3214 * Do not return errors unless we are in a controller reset, 3215 * the controller works perfectly fine without hwmon. 3216 */ 3217 ret = nvme_hwmon_init(ctrl); 3218 if (ret == -EINTR) 3219 return ret; 3220 } 3221 3222 clear_bit(NVME_CTRL_DIRTY_CAPABILITY, &ctrl->flags); 3223 ctrl->identified = true; 3224 3225 return 0; 3226 } 3227 EXPORT_SYMBOL_GPL(nvme_init_ctrl_finish); 3228 3229 static int nvme_dev_open(struct inode *inode, struct file *file) 3230 { 3231 struct nvme_ctrl *ctrl = 3232 container_of(inode->i_cdev, struct nvme_ctrl, cdev); 3233 3234 switch (nvme_ctrl_state(ctrl)) { 3235 case NVME_CTRL_LIVE: 3236 break; 3237 default: 3238 return -EWOULDBLOCK; 3239 } 3240 3241 nvme_get_ctrl(ctrl); 3242 if (!try_module_get(ctrl->ops->module)) { 3243 nvme_put_ctrl(ctrl); 3244 return -EINVAL; 3245 } 3246 3247 file->private_data = ctrl; 3248 return 0; 3249 } 3250 3251 static int nvme_dev_release(struct inode *inode, struct file *file) 3252 { 3253 struct nvme_ctrl *ctrl = 3254 container_of(inode->i_cdev, struct nvme_ctrl, cdev); 3255 3256 module_put(ctrl->ops->module); 3257 nvme_put_ctrl(ctrl); 3258 return 0; 3259 } 3260 3261 static const struct file_operations nvme_dev_fops = { 3262 .owner = THIS_MODULE, 3263 .open = nvme_dev_open, 3264 .release = nvme_dev_release, 3265 .unlocked_ioctl = nvme_dev_ioctl, 3266 .compat_ioctl = compat_ptr_ioctl, 3267 .uring_cmd = nvme_dev_uring_cmd, 3268 }; 3269 3270 static struct nvme_ns_head *nvme_find_ns_head(struct nvme_ctrl *ctrl, 3271 unsigned nsid) 3272 { 3273 struct nvme_ns_head *h; 3274 3275 lockdep_assert_held(&ctrl->subsys->lock); 3276 3277 list_for_each_entry(h, &ctrl->subsys->nsheads, entry) { 3278 /* 3279 * Private namespaces can share NSIDs under some conditions. 3280 * In that case we can't use the same ns_head for namespaces 3281 * with the same NSID. 3282 */ 3283 if (h->ns_id != nsid || !nvme_is_unique_nsid(ctrl, h)) 3284 continue; 3285 if (!list_empty(&h->list) && nvme_tryget_ns_head(h)) 3286 return h; 3287 } 3288 3289 return NULL; 3290 } 3291 3292 static int nvme_subsys_check_duplicate_ids(struct nvme_subsystem *subsys, 3293 struct nvme_ns_ids *ids) 3294 { 3295 bool has_uuid = !uuid_is_null(&ids->uuid); 3296 bool has_nguid = memchr_inv(ids->nguid, 0, sizeof(ids->nguid)); 3297 bool has_eui64 = memchr_inv(ids->eui64, 0, sizeof(ids->eui64)); 3298 struct nvme_ns_head *h; 3299 3300 lockdep_assert_held(&subsys->lock); 3301 3302 list_for_each_entry(h, &subsys->nsheads, entry) { 3303 if (has_uuid && uuid_equal(&ids->uuid, &h->ids.uuid)) 3304 return -EINVAL; 3305 if (has_nguid && 3306 memcmp(&ids->nguid, &h->ids.nguid, sizeof(ids->nguid)) == 0) 3307 return -EINVAL; 3308 if (has_eui64 && 3309 memcmp(&ids->eui64, &h->ids.eui64, sizeof(ids->eui64)) == 0) 3310 return -EINVAL; 3311 } 3312 3313 return 0; 3314 } 3315 3316 static void nvme_cdev_rel(struct device *dev) 3317 { 3318 ida_free(&nvme_ns_chr_minor_ida, MINOR(dev->devt)); 3319 } 3320 3321 void nvme_cdev_del(struct cdev *cdev, struct device *cdev_device) 3322 { 3323 cdev_device_del(cdev, cdev_device); 3324 put_device(cdev_device); 3325 } 3326 3327 int nvme_cdev_add(struct cdev *cdev, struct device *cdev_device, 3328 const struct file_operations *fops, struct module *owner) 3329 { 3330 int minor, ret; 3331 3332 minor = ida_alloc(&nvme_ns_chr_minor_ida, GFP_KERNEL); 3333 if (minor < 0) 3334 return minor; 3335 cdev_device->devt = MKDEV(MAJOR(nvme_ns_chr_devt), minor); 3336 cdev_device->class = nvme_ns_chr_class; 3337 cdev_device->release = nvme_cdev_rel; 3338 device_initialize(cdev_device); 3339 cdev_init(cdev, fops); 3340 cdev->owner = owner; 3341 ret = cdev_device_add(cdev, cdev_device); 3342 if (ret) 3343 put_device(cdev_device); 3344 3345 return ret; 3346 } 3347 3348 static int nvme_ns_chr_open(struct inode *inode, struct file *file) 3349 { 3350 return nvme_ns_open(container_of(inode->i_cdev, struct nvme_ns, cdev)); 3351 } 3352 3353 static int nvme_ns_chr_release(struct inode *inode, struct file *file) 3354 { 3355 nvme_ns_release(container_of(inode->i_cdev, struct nvme_ns, cdev)); 3356 return 0; 3357 } 3358 3359 static const struct file_operations nvme_ns_chr_fops = { 3360 .owner = THIS_MODULE, 3361 .open = nvme_ns_chr_open, 3362 .release = nvme_ns_chr_release, 3363 .unlocked_ioctl = nvme_ns_chr_ioctl, 3364 .compat_ioctl = compat_ptr_ioctl, 3365 .uring_cmd = nvme_ns_chr_uring_cmd, 3366 .uring_cmd_iopoll = nvme_ns_chr_uring_cmd_iopoll, 3367 }; 3368 3369 static int nvme_add_ns_cdev(struct nvme_ns *ns) 3370 { 3371 int ret; 3372 3373 ns->cdev_device.parent = ns->ctrl->device; 3374 ret = dev_set_name(&ns->cdev_device, "ng%dn%d", 3375 ns->ctrl->instance, ns->head->instance); 3376 if (ret) 3377 return ret; 3378 3379 return nvme_cdev_add(&ns->cdev, &ns->cdev_device, &nvme_ns_chr_fops, 3380 ns->ctrl->ops->module); 3381 } 3382 3383 static struct nvme_ns_head *nvme_alloc_ns_head(struct nvme_ctrl *ctrl, 3384 struct nvme_ns_info *info) 3385 { 3386 struct nvme_ns_head *head; 3387 size_t size = sizeof(*head); 3388 int ret = -ENOMEM; 3389 3390 #ifdef CONFIG_NVME_MULTIPATH 3391 size += num_possible_nodes() * sizeof(struct nvme_ns *); 3392 #endif 3393 3394 head = kzalloc(size, GFP_KERNEL); 3395 if (!head) 3396 goto out; 3397 ret = ida_alloc_min(&ctrl->subsys->ns_ida, 1, GFP_KERNEL); 3398 if (ret < 0) 3399 goto out_free_head; 3400 head->instance = ret; 3401 INIT_LIST_HEAD(&head->list); 3402 ret = init_srcu_struct(&head->srcu); 3403 if (ret) 3404 goto out_ida_remove; 3405 head->subsys = ctrl->subsys; 3406 head->ns_id = info->nsid; 3407 head->ids = info->ids; 3408 head->shared = info->is_shared; 3409 kref_init(&head->ref); 3410 3411 if (head->ids.csi) { 3412 ret = nvme_get_effects_log(ctrl, head->ids.csi, &head->effects); 3413 if (ret) 3414 goto out_cleanup_srcu; 3415 } else 3416 head->effects = ctrl->effects; 3417 3418 ret = nvme_mpath_alloc_disk(ctrl, head); 3419 if (ret) 3420 goto out_cleanup_srcu; 3421 3422 list_add_tail(&head->entry, &ctrl->subsys->nsheads); 3423 3424 kref_get(&ctrl->subsys->ref); 3425 3426 return head; 3427 out_cleanup_srcu: 3428 cleanup_srcu_struct(&head->srcu); 3429 out_ida_remove: 3430 ida_free(&ctrl->subsys->ns_ida, head->instance); 3431 out_free_head: 3432 kfree(head); 3433 out: 3434 if (ret > 0) 3435 ret = blk_status_to_errno(nvme_error_status(ret)); 3436 return ERR_PTR(ret); 3437 } 3438 3439 static int nvme_global_check_duplicate_ids(struct nvme_subsystem *this, 3440 struct nvme_ns_ids *ids) 3441 { 3442 struct nvme_subsystem *s; 3443 int ret = 0; 3444 3445 /* 3446 * Note that this check is racy as we try to avoid holding the global 3447 * lock over the whole ns_head creation. But it is only intended as 3448 * a sanity check anyway. 3449 */ 3450 mutex_lock(&nvme_subsystems_lock); 3451 list_for_each_entry(s, &nvme_subsystems, entry) { 3452 if (s == this) 3453 continue; 3454 mutex_lock(&s->lock); 3455 ret = nvme_subsys_check_duplicate_ids(s, ids); 3456 mutex_unlock(&s->lock); 3457 if (ret) 3458 break; 3459 } 3460 mutex_unlock(&nvme_subsystems_lock); 3461 3462 return ret; 3463 } 3464 3465 static int nvme_init_ns_head(struct nvme_ns *ns, struct nvme_ns_info *info) 3466 { 3467 struct nvme_ctrl *ctrl = ns->ctrl; 3468 struct nvme_ns_head *head = NULL; 3469 int ret; 3470 3471 ret = nvme_global_check_duplicate_ids(ctrl->subsys, &info->ids); 3472 if (ret) { 3473 /* 3474 * We've found two different namespaces on two different 3475 * subsystems that report the same ID. This is pretty nasty 3476 * for anything that actually requires unique device 3477 * identification. In the kernel we need this for multipathing, 3478 * and in user space the /dev/disk/by-id/ links rely on it. 3479 * 3480 * If the device also claims to be multi-path capable back off 3481 * here now and refuse the probe the second device as this is a 3482 * recipe for data corruption. If not this is probably a 3483 * cheap consumer device if on the PCIe bus, so let the user 3484 * proceed and use the shiny toy, but warn that with changing 3485 * probing order (which due to our async probing could just be 3486 * device taking longer to startup) the other device could show 3487 * up at any time. 3488 */ 3489 nvme_print_device_info(ctrl); 3490 if ((ns->ctrl->ops->flags & NVME_F_FABRICS) || /* !PCIe */ 3491 ((ns->ctrl->subsys->cmic & NVME_CTRL_CMIC_MULTI_CTRL) && 3492 info->is_shared)) { 3493 dev_err(ctrl->device, 3494 "ignoring nsid %d because of duplicate IDs\n", 3495 info->nsid); 3496 return ret; 3497 } 3498 3499 dev_err(ctrl->device, 3500 "clearing duplicate IDs for nsid %d\n", info->nsid); 3501 dev_err(ctrl->device, 3502 "use of /dev/disk/by-id/ may cause data corruption\n"); 3503 memset(&info->ids.nguid, 0, sizeof(info->ids.nguid)); 3504 memset(&info->ids.uuid, 0, sizeof(info->ids.uuid)); 3505 memset(&info->ids.eui64, 0, sizeof(info->ids.eui64)); 3506 ctrl->quirks |= NVME_QUIRK_BOGUS_NID; 3507 } 3508 3509 mutex_lock(&ctrl->subsys->lock); 3510 head = nvme_find_ns_head(ctrl, info->nsid); 3511 if (!head) { 3512 ret = nvme_subsys_check_duplicate_ids(ctrl->subsys, &info->ids); 3513 if (ret) { 3514 dev_err(ctrl->device, 3515 "duplicate IDs in subsystem for nsid %d\n", 3516 info->nsid); 3517 goto out_unlock; 3518 } 3519 head = nvme_alloc_ns_head(ctrl, info); 3520 if (IS_ERR(head)) { 3521 ret = PTR_ERR(head); 3522 goto out_unlock; 3523 } 3524 } else { 3525 ret = -EINVAL; 3526 if (!info->is_shared || !head->shared) { 3527 dev_err(ctrl->device, 3528 "Duplicate unshared namespace %d\n", 3529 info->nsid); 3530 goto out_put_ns_head; 3531 } 3532 if (!nvme_ns_ids_equal(&head->ids, &info->ids)) { 3533 dev_err(ctrl->device, 3534 "IDs don't match for shared namespace %d\n", 3535 info->nsid); 3536 goto out_put_ns_head; 3537 } 3538 3539 if (!multipath) { 3540 dev_warn(ctrl->device, 3541 "Found shared namespace %d, but multipathing not supported.\n", 3542 info->nsid); 3543 dev_warn_once(ctrl->device, 3544 "Support for shared namespaces without CONFIG_NVME_MULTIPATH is deprecated and will be removed in Linux 6.0.\n"); 3545 } 3546 } 3547 3548 list_add_tail_rcu(&ns->siblings, &head->list); 3549 ns->head = head; 3550 mutex_unlock(&ctrl->subsys->lock); 3551 return 0; 3552 3553 out_put_ns_head: 3554 nvme_put_ns_head(head); 3555 out_unlock: 3556 mutex_unlock(&ctrl->subsys->lock); 3557 return ret; 3558 } 3559 3560 struct nvme_ns *nvme_find_get_ns(struct nvme_ctrl *ctrl, unsigned nsid) 3561 { 3562 struct nvme_ns *ns, *ret = NULL; 3563 int srcu_idx; 3564 3565 srcu_idx = srcu_read_lock(&ctrl->srcu); 3566 list_for_each_entry_srcu(ns, &ctrl->namespaces, list, 3567 srcu_read_lock_held(&ctrl->srcu)) { 3568 if (ns->head->ns_id == nsid) { 3569 if (!nvme_get_ns(ns)) 3570 continue; 3571 ret = ns; 3572 break; 3573 } 3574 if (ns->head->ns_id > nsid) 3575 break; 3576 } 3577 srcu_read_unlock(&ctrl->srcu, srcu_idx); 3578 return ret; 3579 } 3580 EXPORT_SYMBOL_NS_GPL(nvme_find_get_ns, NVME_TARGET_PASSTHRU); 3581 3582 /* 3583 * Add the namespace to the controller list while keeping the list ordered. 3584 */ 3585 static void nvme_ns_add_to_ctrl_list(struct nvme_ns *ns) 3586 { 3587 struct nvme_ns *tmp; 3588 3589 list_for_each_entry_reverse(tmp, &ns->ctrl->namespaces, list) { 3590 if (tmp->head->ns_id < ns->head->ns_id) { 3591 list_add_rcu(&ns->list, &tmp->list); 3592 return; 3593 } 3594 } 3595 list_add(&ns->list, &ns->ctrl->namespaces); 3596 } 3597 3598 static void nvme_alloc_ns(struct nvme_ctrl *ctrl, struct nvme_ns_info *info) 3599 { 3600 struct nvme_ns *ns; 3601 struct gendisk *disk; 3602 int node = ctrl->numa_node; 3603 3604 ns = kzalloc_node(sizeof(*ns), GFP_KERNEL, node); 3605 if (!ns) 3606 return; 3607 3608 disk = blk_mq_alloc_disk(ctrl->tagset, ns); 3609 if (IS_ERR(disk)) 3610 goto out_free_ns; 3611 disk->fops = &nvme_bdev_ops; 3612 disk->private_data = ns; 3613 3614 ns->disk = disk; 3615 ns->queue = disk->queue; 3616 3617 if (ctrl->opts && ctrl->opts->data_digest) 3618 blk_queue_flag_set(QUEUE_FLAG_STABLE_WRITES, ns->queue); 3619 3620 blk_queue_flag_set(QUEUE_FLAG_NONROT, ns->queue); 3621 if (ctrl->ops->supports_pci_p2pdma && 3622 ctrl->ops->supports_pci_p2pdma(ctrl)) 3623 blk_queue_flag_set(QUEUE_FLAG_PCI_P2PDMA, ns->queue); 3624 3625 ns->ctrl = ctrl; 3626 kref_init(&ns->kref); 3627 3628 if (nvme_init_ns_head(ns, info)) 3629 goto out_cleanup_disk; 3630 3631 /* 3632 * If multipathing is enabled, the device name for all disks and not 3633 * just those that represent shared namespaces needs to be based on the 3634 * subsystem instance. Using the controller instance for private 3635 * namespaces could lead to naming collisions between shared and private 3636 * namespaces if they don't use a common numbering scheme. 3637 * 3638 * If multipathing is not enabled, disk names must use the controller 3639 * instance as shared namespaces will show up as multiple block 3640 * devices. 3641 */ 3642 if (nvme_ns_head_multipath(ns->head)) { 3643 sprintf(disk->disk_name, "nvme%dc%dn%d", ctrl->subsys->instance, 3644 ctrl->instance, ns->head->instance); 3645 disk->flags |= GENHD_FL_HIDDEN; 3646 } else if (multipath) { 3647 sprintf(disk->disk_name, "nvme%dn%d", ctrl->subsys->instance, 3648 ns->head->instance); 3649 } else { 3650 sprintf(disk->disk_name, "nvme%dn%d", ctrl->instance, 3651 ns->head->instance); 3652 } 3653 3654 if (nvme_update_ns_info(ns, info)) 3655 goto out_unlink_ns; 3656 3657 mutex_lock(&ctrl->namespaces_lock); 3658 /* 3659 * Ensure that no namespaces are added to the ctrl list after the queues 3660 * are frozen, thereby avoiding a deadlock between scan and reset. 3661 */ 3662 if (test_bit(NVME_CTRL_FROZEN, &ctrl->flags)) { 3663 mutex_unlock(&ctrl->namespaces_lock); 3664 goto out_unlink_ns; 3665 } 3666 nvme_ns_add_to_ctrl_list(ns); 3667 mutex_unlock(&ctrl->namespaces_lock); 3668 synchronize_srcu(&ctrl->srcu); 3669 nvme_get_ctrl(ctrl); 3670 3671 if (device_add_disk(ctrl->device, ns->disk, nvme_ns_id_attr_groups)) 3672 goto out_cleanup_ns_from_list; 3673 3674 if (!nvme_ns_head_multipath(ns->head)) 3675 nvme_add_ns_cdev(ns); 3676 3677 nvme_mpath_add_disk(ns, info->anagrpid); 3678 nvme_fault_inject_init(&ns->fault_inject, ns->disk->disk_name); 3679 3680 return; 3681 3682 out_cleanup_ns_from_list: 3683 nvme_put_ctrl(ctrl); 3684 mutex_lock(&ctrl->namespaces_lock); 3685 list_del_rcu(&ns->list); 3686 mutex_unlock(&ctrl->namespaces_lock); 3687 synchronize_srcu(&ctrl->srcu); 3688 out_unlink_ns: 3689 mutex_lock(&ctrl->subsys->lock); 3690 list_del_rcu(&ns->siblings); 3691 if (list_empty(&ns->head->list)) 3692 list_del_init(&ns->head->entry); 3693 mutex_unlock(&ctrl->subsys->lock); 3694 nvme_put_ns_head(ns->head); 3695 out_cleanup_disk: 3696 put_disk(disk); 3697 out_free_ns: 3698 kfree(ns); 3699 } 3700 3701 static void nvme_ns_remove(struct nvme_ns *ns) 3702 { 3703 bool last_path = false; 3704 3705 if (test_and_set_bit(NVME_NS_REMOVING, &ns->flags)) 3706 return; 3707 3708 clear_bit(NVME_NS_READY, &ns->flags); 3709 set_capacity(ns->disk, 0); 3710 nvme_fault_inject_fini(&ns->fault_inject); 3711 3712 /* 3713 * Ensure that !NVME_NS_READY is seen by other threads to prevent 3714 * this ns going back into current_path. 3715 */ 3716 synchronize_srcu(&ns->head->srcu); 3717 3718 /* wait for concurrent submissions */ 3719 if (nvme_mpath_clear_current_path(ns)) 3720 synchronize_srcu(&ns->head->srcu); 3721 3722 mutex_lock(&ns->ctrl->subsys->lock); 3723 list_del_rcu(&ns->siblings); 3724 if (list_empty(&ns->head->list)) { 3725 list_del_init(&ns->head->entry); 3726 last_path = true; 3727 } 3728 mutex_unlock(&ns->ctrl->subsys->lock); 3729 3730 /* guarantee not available in head->list */ 3731 synchronize_srcu(&ns->head->srcu); 3732 3733 if (!nvme_ns_head_multipath(ns->head)) 3734 nvme_cdev_del(&ns->cdev, &ns->cdev_device); 3735 del_gendisk(ns->disk); 3736 3737 mutex_lock(&ns->ctrl->namespaces_lock); 3738 list_del_rcu(&ns->list); 3739 mutex_unlock(&ns->ctrl->namespaces_lock); 3740 synchronize_srcu(&ns->ctrl->srcu); 3741 3742 if (last_path) 3743 nvme_mpath_shutdown_disk(ns->head); 3744 nvme_put_ns(ns); 3745 } 3746 3747 static void nvme_ns_remove_by_nsid(struct nvme_ctrl *ctrl, u32 nsid) 3748 { 3749 struct nvme_ns *ns = nvme_find_get_ns(ctrl, nsid); 3750 3751 if (ns) { 3752 nvme_ns_remove(ns); 3753 nvme_put_ns(ns); 3754 } 3755 } 3756 3757 static void nvme_validate_ns(struct nvme_ns *ns, struct nvme_ns_info *info) 3758 { 3759 int ret = NVME_SC_INVALID_NS | NVME_SC_DNR; 3760 3761 if (!nvme_ns_ids_equal(&ns->head->ids, &info->ids)) { 3762 dev_err(ns->ctrl->device, 3763 "identifiers changed for nsid %d\n", ns->head->ns_id); 3764 goto out; 3765 } 3766 3767 ret = nvme_update_ns_info(ns, info); 3768 out: 3769 /* 3770 * Only remove the namespace if we got a fatal error back from the 3771 * device, otherwise ignore the error and just move on. 3772 * 3773 * TODO: we should probably schedule a delayed retry here. 3774 */ 3775 if (ret > 0 && (ret & NVME_SC_DNR)) 3776 nvme_ns_remove(ns); 3777 } 3778 3779 static void nvme_scan_ns(struct nvme_ctrl *ctrl, unsigned nsid) 3780 { 3781 struct nvme_ns_info info = { .nsid = nsid }; 3782 struct nvme_ns *ns; 3783 int ret; 3784 3785 if (nvme_identify_ns_descs(ctrl, &info)) 3786 return; 3787 3788 if (info.ids.csi != NVME_CSI_NVM && !nvme_multi_css(ctrl)) { 3789 dev_warn(ctrl->device, 3790 "command set not reported for nsid: %d\n", nsid); 3791 return; 3792 } 3793 3794 /* 3795 * If available try to use the Command Set Idependent Identify Namespace 3796 * data structure to find all the generic information that is needed to 3797 * set up a namespace. If not fall back to the legacy version. 3798 */ 3799 if ((ctrl->cap & NVME_CAP_CRMS_CRIMS) || 3800 (info.ids.csi != NVME_CSI_NVM && info.ids.csi != NVME_CSI_ZNS)) 3801 ret = nvme_ns_info_from_id_cs_indep(ctrl, &info); 3802 else 3803 ret = nvme_ns_info_from_identify(ctrl, &info); 3804 3805 if (info.is_removed) 3806 nvme_ns_remove_by_nsid(ctrl, nsid); 3807 3808 /* 3809 * Ignore the namespace if it is not ready. We will get an AEN once it 3810 * becomes ready and restart the scan. 3811 */ 3812 if (ret || !info.is_ready) 3813 return; 3814 3815 ns = nvme_find_get_ns(ctrl, nsid); 3816 if (ns) { 3817 nvme_validate_ns(ns, &info); 3818 nvme_put_ns(ns); 3819 } else { 3820 nvme_alloc_ns(ctrl, &info); 3821 } 3822 } 3823 3824 static void nvme_remove_invalid_namespaces(struct nvme_ctrl *ctrl, 3825 unsigned nsid) 3826 { 3827 struct nvme_ns *ns, *next; 3828 LIST_HEAD(rm_list); 3829 3830 mutex_lock(&ctrl->namespaces_lock); 3831 list_for_each_entry_safe(ns, next, &ctrl->namespaces, list) { 3832 if (ns->head->ns_id > nsid) { 3833 list_del_rcu(&ns->list); 3834 synchronize_srcu(&ctrl->srcu); 3835 list_add_tail_rcu(&ns->list, &rm_list); 3836 } 3837 } 3838 mutex_unlock(&ctrl->namespaces_lock); 3839 3840 list_for_each_entry_safe(ns, next, &rm_list, list) 3841 nvme_ns_remove(ns); 3842 } 3843 3844 static int nvme_scan_ns_list(struct nvme_ctrl *ctrl) 3845 { 3846 const int nr_entries = NVME_IDENTIFY_DATA_SIZE / sizeof(__le32); 3847 __le32 *ns_list; 3848 u32 prev = 0; 3849 int ret = 0, i; 3850 3851 ns_list = kzalloc(NVME_IDENTIFY_DATA_SIZE, GFP_KERNEL); 3852 if (!ns_list) 3853 return -ENOMEM; 3854 3855 for (;;) { 3856 struct nvme_command cmd = { 3857 .identify.opcode = nvme_admin_identify, 3858 .identify.cns = NVME_ID_CNS_NS_ACTIVE_LIST, 3859 .identify.nsid = cpu_to_le32(prev), 3860 }; 3861 3862 ret = nvme_submit_sync_cmd(ctrl->admin_q, &cmd, ns_list, 3863 NVME_IDENTIFY_DATA_SIZE); 3864 if (ret) { 3865 dev_warn(ctrl->device, 3866 "Identify NS List failed (status=0x%x)\n", ret); 3867 goto free; 3868 } 3869 3870 for (i = 0; i < nr_entries; i++) { 3871 u32 nsid = le32_to_cpu(ns_list[i]); 3872 3873 if (!nsid) /* end of the list? */ 3874 goto out; 3875 nvme_scan_ns(ctrl, nsid); 3876 while (++prev < nsid) 3877 nvme_ns_remove_by_nsid(ctrl, prev); 3878 } 3879 } 3880 out: 3881 nvme_remove_invalid_namespaces(ctrl, prev); 3882 free: 3883 kfree(ns_list); 3884 return ret; 3885 } 3886 3887 static void nvme_scan_ns_sequential(struct nvme_ctrl *ctrl) 3888 { 3889 struct nvme_id_ctrl *id; 3890 u32 nn, i; 3891 3892 if (nvme_identify_ctrl(ctrl, &id)) 3893 return; 3894 nn = le32_to_cpu(id->nn); 3895 kfree(id); 3896 3897 for (i = 1; i <= nn; i++) 3898 nvme_scan_ns(ctrl, i); 3899 3900 nvme_remove_invalid_namespaces(ctrl, nn); 3901 } 3902 3903 static void nvme_clear_changed_ns_log(struct nvme_ctrl *ctrl) 3904 { 3905 size_t log_size = NVME_MAX_CHANGED_NAMESPACES * sizeof(__le32); 3906 __le32 *log; 3907 int error; 3908 3909 log = kzalloc(log_size, GFP_KERNEL); 3910 if (!log) 3911 return; 3912 3913 /* 3914 * We need to read the log to clear the AEN, but we don't want to rely 3915 * on it for the changed namespace information as userspace could have 3916 * raced with us in reading the log page, which could cause us to miss 3917 * updates. 3918 */ 3919 error = nvme_get_log(ctrl, NVME_NSID_ALL, NVME_LOG_CHANGED_NS, 0, 3920 NVME_CSI_NVM, log, log_size, 0); 3921 if (error) 3922 dev_warn(ctrl->device, 3923 "reading changed ns log failed: %d\n", error); 3924 3925 kfree(log); 3926 } 3927 3928 static void nvme_scan_work(struct work_struct *work) 3929 { 3930 struct nvme_ctrl *ctrl = 3931 container_of(work, struct nvme_ctrl, scan_work); 3932 int ret; 3933 3934 /* No tagset on a live ctrl means IO queues could not created */ 3935 if (nvme_ctrl_state(ctrl) != NVME_CTRL_LIVE || !ctrl->tagset) 3936 return; 3937 3938 /* 3939 * Identify controller limits can change at controller reset due to 3940 * new firmware download, even though it is not common we cannot ignore 3941 * such scenario. Controller's non-mdts limits are reported in the unit 3942 * of logical blocks that is dependent on the format of attached 3943 * namespace. Hence re-read the limits at the time of ns allocation. 3944 */ 3945 ret = nvme_init_non_mdts_limits(ctrl); 3946 if (ret < 0) { 3947 dev_warn(ctrl->device, 3948 "reading non-mdts-limits failed: %d\n", ret); 3949 return; 3950 } 3951 3952 if (test_and_clear_bit(NVME_AER_NOTICE_NS_CHANGED, &ctrl->events)) { 3953 dev_info(ctrl->device, "rescanning namespaces.\n"); 3954 nvme_clear_changed_ns_log(ctrl); 3955 } 3956 3957 mutex_lock(&ctrl->scan_lock); 3958 if (nvme_ctrl_limited_cns(ctrl)) { 3959 nvme_scan_ns_sequential(ctrl); 3960 } else { 3961 /* 3962 * Fall back to sequential scan if DNR is set to handle broken 3963 * devices which should support Identify NS List (as per the VS 3964 * they report) but don't actually support it. 3965 */ 3966 ret = nvme_scan_ns_list(ctrl); 3967 if (ret > 0 && ret & NVME_SC_DNR) 3968 nvme_scan_ns_sequential(ctrl); 3969 } 3970 mutex_unlock(&ctrl->scan_lock); 3971 } 3972 3973 /* 3974 * This function iterates the namespace list unlocked to allow recovery from 3975 * controller failure. It is up to the caller to ensure the namespace list is 3976 * not modified by scan work while this function is executing. 3977 */ 3978 void nvme_remove_namespaces(struct nvme_ctrl *ctrl) 3979 { 3980 struct nvme_ns *ns, *next; 3981 LIST_HEAD(ns_list); 3982 3983 /* 3984 * make sure to requeue I/O to all namespaces as these 3985 * might result from the scan itself and must complete 3986 * for the scan_work to make progress 3987 */ 3988 nvme_mpath_clear_ctrl_paths(ctrl); 3989 3990 /* 3991 * Unquiesce io queues so any pending IO won't hang, especially 3992 * those submitted from scan work 3993 */ 3994 nvme_unquiesce_io_queues(ctrl); 3995 3996 /* prevent racing with ns scanning */ 3997 flush_work(&ctrl->scan_work); 3998 3999 /* 4000 * The dead states indicates the controller was not gracefully 4001 * disconnected. In that case, we won't be able to flush any data while 4002 * removing the namespaces' disks; fail all the queues now to avoid 4003 * potentially having to clean up the failed sync later. 4004 */ 4005 if (nvme_ctrl_state(ctrl) == NVME_CTRL_DEAD) 4006 nvme_mark_namespaces_dead(ctrl); 4007 4008 /* this is a no-op when called from the controller reset handler */ 4009 nvme_change_ctrl_state(ctrl, NVME_CTRL_DELETING_NOIO); 4010 4011 mutex_lock(&ctrl->namespaces_lock); 4012 list_splice_init_rcu(&ctrl->namespaces, &ns_list, synchronize_rcu); 4013 mutex_unlock(&ctrl->namespaces_lock); 4014 synchronize_srcu(&ctrl->srcu); 4015 4016 list_for_each_entry_safe(ns, next, &ns_list, list) 4017 nvme_ns_remove(ns); 4018 } 4019 EXPORT_SYMBOL_GPL(nvme_remove_namespaces); 4020 4021 static int nvme_class_uevent(const struct device *dev, struct kobj_uevent_env *env) 4022 { 4023 const struct nvme_ctrl *ctrl = 4024 container_of(dev, struct nvme_ctrl, ctrl_device); 4025 struct nvmf_ctrl_options *opts = ctrl->opts; 4026 int ret; 4027 4028 ret = add_uevent_var(env, "NVME_TRTYPE=%s", ctrl->ops->name); 4029 if (ret) 4030 return ret; 4031 4032 if (opts) { 4033 ret = add_uevent_var(env, "NVME_TRADDR=%s", opts->traddr); 4034 if (ret) 4035 return ret; 4036 4037 ret = add_uevent_var(env, "NVME_TRSVCID=%s", 4038 opts->trsvcid ?: "none"); 4039 if (ret) 4040 return ret; 4041 4042 ret = add_uevent_var(env, "NVME_HOST_TRADDR=%s", 4043 opts->host_traddr ?: "none"); 4044 if (ret) 4045 return ret; 4046 4047 ret = add_uevent_var(env, "NVME_HOST_IFACE=%s", 4048 opts->host_iface ?: "none"); 4049 } 4050 return ret; 4051 } 4052 4053 static void nvme_change_uevent(struct nvme_ctrl *ctrl, char *envdata) 4054 { 4055 char *envp[2] = { envdata, NULL }; 4056 4057 kobject_uevent_env(&ctrl->device->kobj, KOBJ_CHANGE, envp); 4058 } 4059 4060 static void nvme_aen_uevent(struct nvme_ctrl *ctrl) 4061 { 4062 char *envp[2] = { NULL, NULL }; 4063 u32 aen_result = ctrl->aen_result; 4064 4065 ctrl->aen_result = 0; 4066 if (!aen_result) 4067 return; 4068 4069 envp[0] = kasprintf(GFP_KERNEL, "NVME_AEN=%#08x", aen_result); 4070 if (!envp[0]) 4071 return; 4072 kobject_uevent_env(&ctrl->device->kobj, KOBJ_CHANGE, envp); 4073 kfree(envp[0]); 4074 } 4075 4076 static void nvme_async_event_work(struct work_struct *work) 4077 { 4078 struct nvme_ctrl *ctrl = 4079 container_of(work, struct nvme_ctrl, async_event_work); 4080 4081 nvme_aen_uevent(ctrl); 4082 4083 /* 4084 * The transport drivers must guarantee AER submission here is safe by 4085 * flushing ctrl async_event_work after changing the controller state 4086 * from LIVE and before freeing the admin queue. 4087 */ 4088 if (nvme_ctrl_state(ctrl) == NVME_CTRL_LIVE) 4089 ctrl->ops->submit_async_event(ctrl); 4090 } 4091 4092 static bool nvme_ctrl_pp_status(struct nvme_ctrl *ctrl) 4093 { 4094 4095 u32 csts; 4096 4097 if (ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts)) 4098 return false; 4099 4100 if (csts == ~0) 4101 return false; 4102 4103 return ((ctrl->ctrl_config & NVME_CC_ENABLE) && (csts & NVME_CSTS_PP)); 4104 } 4105 4106 static void nvme_get_fw_slot_info(struct nvme_ctrl *ctrl) 4107 { 4108 struct nvme_fw_slot_info_log *log; 4109 4110 log = kmalloc(sizeof(*log), GFP_KERNEL); 4111 if (!log) 4112 return; 4113 4114 if (nvme_get_log(ctrl, NVME_NSID_ALL, NVME_LOG_FW_SLOT, 0, NVME_CSI_NVM, 4115 log, sizeof(*log), 0)) 4116 dev_warn(ctrl->device, "Get FW SLOT INFO log error\n"); 4117 kfree(log); 4118 } 4119 4120 static void nvme_fw_act_work(struct work_struct *work) 4121 { 4122 struct nvme_ctrl *ctrl = container_of(work, 4123 struct nvme_ctrl, fw_act_work); 4124 unsigned long fw_act_timeout; 4125 4126 nvme_auth_stop(ctrl); 4127 4128 if (ctrl->mtfa) 4129 fw_act_timeout = jiffies + 4130 msecs_to_jiffies(ctrl->mtfa * 100); 4131 else 4132 fw_act_timeout = jiffies + 4133 msecs_to_jiffies(admin_timeout * 1000); 4134 4135 nvme_quiesce_io_queues(ctrl); 4136 while (nvme_ctrl_pp_status(ctrl)) { 4137 if (time_after(jiffies, fw_act_timeout)) { 4138 dev_warn(ctrl->device, 4139 "Fw activation timeout, reset controller\n"); 4140 nvme_try_sched_reset(ctrl); 4141 return; 4142 } 4143 msleep(100); 4144 } 4145 4146 if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_LIVE)) 4147 return; 4148 4149 nvme_unquiesce_io_queues(ctrl); 4150 /* read FW slot information to clear the AER */ 4151 nvme_get_fw_slot_info(ctrl); 4152 4153 queue_work(nvme_wq, &ctrl->async_event_work); 4154 } 4155 4156 static u32 nvme_aer_type(u32 result) 4157 { 4158 return result & 0x7; 4159 } 4160 4161 static u32 nvme_aer_subtype(u32 result) 4162 { 4163 return (result & 0xff00) >> 8; 4164 } 4165 4166 static bool nvme_handle_aen_notice(struct nvme_ctrl *ctrl, u32 result) 4167 { 4168 u32 aer_notice_type = nvme_aer_subtype(result); 4169 bool requeue = true; 4170 4171 switch (aer_notice_type) { 4172 case NVME_AER_NOTICE_NS_CHANGED: 4173 set_bit(NVME_AER_NOTICE_NS_CHANGED, &ctrl->events); 4174 nvme_queue_scan(ctrl); 4175 break; 4176 case NVME_AER_NOTICE_FW_ACT_STARTING: 4177 /* 4178 * We are (ab)using the RESETTING state to prevent subsequent 4179 * recovery actions from interfering with the controller's 4180 * firmware activation. 4181 */ 4182 if (nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING)) { 4183 requeue = false; 4184 queue_work(nvme_wq, &ctrl->fw_act_work); 4185 } 4186 break; 4187 #ifdef CONFIG_NVME_MULTIPATH 4188 case NVME_AER_NOTICE_ANA: 4189 if (!ctrl->ana_log_buf) 4190 break; 4191 queue_work(nvme_wq, &ctrl->ana_work); 4192 break; 4193 #endif 4194 case NVME_AER_NOTICE_DISC_CHANGED: 4195 ctrl->aen_result = result; 4196 break; 4197 default: 4198 dev_warn(ctrl->device, "async event result %08x\n", result); 4199 } 4200 return requeue; 4201 } 4202 4203 static void nvme_handle_aer_persistent_error(struct nvme_ctrl *ctrl) 4204 { 4205 dev_warn(ctrl->device, "resetting controller due to AER\n"); 4206 nvme_reset_ctrl(ctrl); 4207 } 4208 4209 void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status, 4210 volatile union nvme_result *res) 4211 { 4212 u32 result = le32_to_cpu(res->u32); 4213 u32 aer_type = nvme_aer_type(result); 4214 u32 aer_subtype = nvme_aer_subtype(result); 4215 bool requeue = true; 4216 4217 if (le16_to_cpu(status) >> 1 != NVME_SC_SUCCESS) 4218 return; 4219 4220 trace_nvme_async_event(ctrl, result); 4221 switch (aer_type) { 4222 case NVME_AER_NOTICE: 4223 requeue = nvme_handle_aen_notice(ctrl, result); 4224 break; 4225 case NVME_AER_ERROR: 4226 /* 4227 * For a persistent internal error, don't run async_event_work 4228 * to submit a new AER. The controller reset will do it. 4229 */ 4230 if (aer_subtype == NVME_AER_ERROR_PERSIST_INT_ERR) { 4231 nvme_handle_aer_persistent_error(ctrl); 4232 return; 4233 } 4234 fallthrough; 4235 case NVME_AER_SMART: 4236 case NVME_AER_CSS: 4237 case NVME_AER_VS: 4238 ctrl->aen_result = result; 4239 break; 4240 default: 4241 break; 4242 } 4243 4244 if (requeue) 4245 queue_work(nvme_wq, &ctrl->async_event_work); 4246 } 4247 EXPORT_SYMBOL_GPL(nvme_complete_async_event); 4248 4249 int nvme_alloc_admin_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set, 4250 const struct blk_mq_ops *ops, unsigned int cmd_size) 4251 { 4252 int ret; 4253 4254 memset(set, 0, sizeof(*set)); 4255 set->ops = ops; 4256 set->queue_depth = NVME_AQ_MQ_TAG_DEPTH; 4257 if (ctrl->ops->flags & NVME_F_FABRICS) 4258 /* Reserved for fabric connect and keep alive */ 4259 set->reserved_tags = 2; 4260 set->numa_node = ctrl->numa_node; 4261 set->flags = BLK_MQ_F_NO_SCHED; 4262 if (ctrl->ops->flags & NVME_F_BLOCKING) 4263 set->flags |= BLK_MQ_F_BLOCKING; 4264 set->cmd_size = cmd_size; 4265 set->driver_data = ctrl; 4266 set->nr_hw_queues = 1; 4267 set->timeout = NVME_ADMIN_TIMEOUT; 4268 ret = blk_mq_alloc_tag_set(set); 4269 if (ret) 4270 return ret; 4271 4272 ctrl->admin_q = blk_mq_init_queue(set); 4273 if (IS_ERR(ctrl->admin_q)) { 4274 ret = PTR_ERR(ctrl->admin_q); 4275 goto out_free_tagset; 4276 } 4277 4278 if (ctrl->ops->flags & NVME_F_FABRICS) { 4279 ctrl->fabrics_q = blk_mq_init_queue(set); 4280 if (IS_ERR(ctrl->fabrics_q)) { 4281 ret = PTR_ERR(ctrl->fabrics_q); 4282 goto out_cleanup_admin_q; 4283 } 4284 } 4285 4286 ctrl->admin_tagset = set; 4287 return 0; 4288 4289 out_cleanup_admin_q: 4290 blk_mq_destroy_queue(ctrl->admin_q); 4291 blk_put_queue(ctrl->admin_q); 4292 out_free_tagset: 4293 blk_mq_free_tag_set(set); 4294 ctrl->admin_q = NULL; 4295 ctrl->fabrics_q = NULL; 4296 return ret; 4297 } 4298 EXPORT_SYMBOL_GPL(nvme_alloc_admin_tag_set); 4299 4300 void nvme_remove_admin_tag_set(struct nvme_ctrl *ctrl) 4301 { 4302 blk_mq_destroy_queue(ctrl->admin_q); 4303 blk_put_queue(ctrl->admin_q); 4304 if (ctrl->ops->flags & NVME_F_FABRICS) { 4305 blk_mq_destroy_queue(ctrl->fabrics_q); 4306 blk_put_queue(ctrl->fabrics_q); 4307 } 4308 blk_mq_free_tag_set(ctrl->admin_tagset); 4309 } 4310 EXPORT_SYMBOL_GPL(nvme_remove_admin_tag_set); 4311 4312 int nvme_alloc_io_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set, 4313 const struct blk_mq_ops *ops, unsigned int nr_maps, 4314 unsigned int cmd_size) 4315 { 4316 int ret; 4317 4318 memset(set, 0, sizeof(*set)); 4319 set->ops = ops; 4320 set->queue_depth = min_t(unsigned, ctrl->sqsize, BLK_MQ_MAX_DEPTH - 1); 4321 /* 4322 * Some Apple controllers requires tags to be unique across admin and 4323 * the (only) I/O queue, so reserve the first 32 tags of the I/O queue. 4324 */ 4325 if (ctrl->quirks & NVME_QUIRK_SHARED_TAGS) 4326 set->reserved_tags = NVME_AQ_DEPTH; 4327 else if (ctrl->ops->flags & NVME_F_FABRICS) 4328 /* Reserved for fabric connect */ 4329 set->reserved_tags = 1; 4330 set->numa_node = ctrl->numa_node; 4331 set->flags = BLK_MQ_F_SHOULD_MERGE; 4332 if (ctrl->ops->flags & NVME_F_BLOCKING) 4333 set->flags |= BLK_MQ_F_BLOCKING; 4334 set->cmd_size = cmd_size, 4335 set->driver_data = ctrl; 4336 set->nr_hw_queues = ctrl->queue_count - 1; 4337 set->timeout = NVME_IO_TIMEOUT; 4338 set->nr_maps = nr_maps; 4339 ret = blk_mq_alloc_tag_set(set); 4340 if (ret) 4341 return ret; 4342 4343 if (ctrl->ops->flags & NVME_F_FABRICS) { 4344 ctrl->connect_q = blk_mq_init_queue(set); 4345 if (IS_ERR(ctrl->connect_q)) { 4346 ret = PTR_ERR(ctrl->connect_q); 4347 goto out_free_tag_set; 4348 } 4349 blk_queue_flag_set(QUEUE_FLAG_SKIP_TAGSET_QUIESCE, 4350 ctrl->connect_q); 4351 } 4352 4353 ctrl->tagset = set; 4354 return 0; 4355 4356 out_free_tag_set: 4357 blk_mq_free_tag_set(set); 4358 ctrl->connect_q = NULL; 4359 return ret; 4360 } 4361 EXPORT_SYMBOL_GPL(nvme_alloc_io_tag_set); 4362 4363 void nvme_remove_io_tag_set(struct nvme_ctrl *ctrl) 4364 { 4365 if (ctrl->ops->flags & NVME_F_FABRICS) { 4366 blk_mq_destroy_queue(ctrl->connect_q); 4367 blk_put_queue(ctrl->connect_q); 4368 } 4369 blk_mq_free_tag_set(ctrl->tagset); 4370 } 4371 EXPORT_SYMBOL_GPL(nvme_remove_io_tag_set); 4372 4373 void nvme_stop_ctrl(struct nvme_ctrl *ctrl) 4374 { 4375 nvme_mpath_stop(ctrl); 4376 nvme_auth_stop(ctrl); 4377 nvme_stop_keep_alive(ctrl); 4378 nvme_stop_failfast_work(ctrl); 4379 flush_work(&ctrl->async_event_work); 4380 cancel_work_sync(&ctrl->fw_act_work); 4381 if (ctrl->ops->stop_ctrl) 4382 ctrl->ops->stop_ctrl(ctrl); 4383 } 4384 EXPORT_SYMBOL_GPL(nvme_stop_ctrl); 4385 4386 void nvme_start_ctrl(struct nvme_ctrl *ctrl) 4387 { 4388 nvme_start_keep_alive(ctrl); 4389 4390 nvme_enable_aen(ctrl); 4391 4392 /* 4393 * persistent discovery controllers need to send indication to userspace 4394 * to re-read the discovery log page to learn about possible changes 4395 * that were missed. We identify persistent discovery controllers by 4396 * checking that they started once before, hence are reconnecting back. 4397 */ 4398 if (test_bit(NVME_CTRL_STARTED_ONCE, &ctrl->flags) && 4399 nvme_discovery_ctrl(ctrl)) 4400 nvme_change_uevent(ctrl, "NVME_EVENT=rediscover"); 4401 4402 if (ctrl->queue_count > 1) { 4403 nvme_queue_scan(ctrl); 4404 nvme_unquiesce_io_queues(ctrl); 4405 nvme_mpath_update(ctrl); 4406 } 4407 4408 nvme_change_uevent(ctrl, "NVME_EVENT=connected"); 4409 set_bit(NVME_CTRL_STARTED_ONCE, &ctrl->flags); 4410 } 4411 EXPORT_SYMBOL_GPL(nvme_start_ctrl); 4412 4413 void nvme_uninit_ctrl(struct nvme_ctrl *ctrl) 4414 { 4415 nvme_hwmon_exit(ctrl); 4416 nvme_fault_inject_fini(&ctrl->fault_inject); 4417 dev_pm_qos_hide_latency_tolerance(ctrl->device); 4418 cdev_device_del(&ctrl->cdev, ctrl->device); 4419 nvme_put_ctrl(ctrl); 4420 } 4421 EXPORT_SYMBOL_GPL(nvme_uninit_ctrl); 4422 4423 static void nvme_free_cels(struct nvme_ctrl *ctrl) 4424 { 4425 struct nvme_effects_log *cel; 4426 unsigned long i; 4427 4428 xa_for_each(&ctrl->cels, i, cel) { 4429 xa_erase(&ctrl->cels, i); 4430 kfree(cel); 4431 } 4432 4433 xa_destroy(&ctrl->cels); 4434 } 4435 4436 static void nvme_free_ctrl(struct device *dev) 4437 { 4438 struct nvme_ctrl *ctrl = 4439 container_of(dev, struct nvme_ctrl, ctrl_device); 4440 struct nvme_subsystem *subsys = ctrl->subsys; 4441 4442 if (!subsys || ctrl->instance != subsys->instance) 4443 ida_free(&nvme_instance_ida, ctrl->instance); 4444 4445 nvme_free_cels(ctrl); 4446 nvme_mpath_uninit(ctrl); 4447 cleanup_srcu_struct(&ctrl->srcu); 4448 nvme_auth_stop(ctrl); 4449 nvme_auth_free(ctrl); 4450 __free_page(ctrl->discard_page); 4451 free_opal_dev(ctrl->opal_dev); 4452 4453 if (subsys) { 4454 mutex_lock(&nvme_subsystems_lock); 4455 list_del(&ctrl->subsys_entry); 4456 sysfs_remove_link(&subsys->dev.kobj, dev_name(ctrl->device)); 4457 mutex_unlock(&nvme_subsystems_lock); 4458 } 4459 4460 ctrl->ops->free_ctrl(ctrl); 4461 4462 if (subsys) 4463 nvme_put_subsystem(subsys); 4464 } 4465 4466 /* 4467 * Initialize a NVMe controller structures. This needs to be called during 4468 * earliest initialization so that we have the initialized structured around 4469 * during probing. 4470 */ 4471 int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev, 4472 const struct nvme_ctrl_ops *ops, unsigned long quirks) 4473 { 4474 int ret; 4475 4476 WRITE_ONCE(ctrl->state, NVME_CTRL_NEW); 4477 clear_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags); 4478 spin_lock_init(&ctrl->lock); 4479 mutex_init(&ctrl->namespaces_lock); 4480 4481 ret = init_srcu_struct(&ctrl->srcu); 4482 if (ret) 4483 return ret; 4484 4485 mutex_init(&ctrl->scan_lock); 4486 INIT_LIST_HEAD(&ctrl->namespaces); 4487 xa_init(&ctrl->cels); 4488 ctrl->dev = dev; 4489 ctrl->ops = ops; 4490 ctrl->quirks = quirks; 4491 ctrl->numa_node = NUMA_NO_NODE; 4492 INIT_WORK(&ctrl->scan_work, nvme_scan_work); 4493 INIT_WORK(&ctrl->async_event_work, nvme_async_event_work); 4494 INIT_WORK(&ctrl->fw_act_work, nvme_fw_act_work); 4495 INIT_WORK(&ctrl->delete_work, nvme_delete_ctrl_work); 4496 init_waitqueue_head(&ctrl->state_wq); 4497 4498 INIT_DELAYED_WORK(&ctrl->ka_work, nvme_keep_alive_work); 4499 INIT_DELAYED_WORK(&ctrl->failfast_work, nvme_failfast_work); 4500 memset(&ctrl->ka_cmd, 0, sizeof(ctrl->ka_cmd)); 4501 ctrl->ka_cmd.common.opcode = nvme_admin_keep_alive; 4502 4503 BUILD_BUG_ON(NVME_DSM_MAX_RANGES * sizeof(struct nvme_dsm_range) > 4504 PAGE_SIZE); 4505 ctrl->discard_page = alloc_page(GFP_KERNEL); 4506 if (!ctrl->discard_page) { 4507 ret = -ENOMEM; 4508 goto out; 4509 } 4510 4511 ret = ida_alloc(&nvme_instance_ida, GFP_KERNEL); 4512 if (ret < 0) 4513 goto out; 4514 ctrl->instance = ret; 4515 4516 device_initialize(&ctrl->ctrl_device); 4517 ctrl->device = &ctrl->ctrl_device; 4518 ctrl->device->devt = MKDEV(MAJOR(nvme_ctrl_base_chr_devt), 4519 ctrl->instance); 4520 ctrl->device->class = nvme_class; 4521 ctrl->device->parent = ctrl->dev; 4522 if (ops->dev_attr_groups) 4523 ctrl->device->groups = ops->dev_attr_groups; 4524 else 4525 ctrl->device->groups = nvme_dev_attr_groups; 4526 ctrl->device->release = nvme_free_ctrl; 4527 dev_set_drvdata(ctrl->device, ctrl); 4528 ret = dev_set_name(ctrl->device, "nvme%d", ctrl->instance); 4529 if (ret) 4530 goto out_release_instance; 4531 4532 nvme_get_ctrl(ctrl); 4533 cdev_init(&ctrl->cdev, &nvme_dev_fops); 4534 ctrl->cdev.owner = ops->module; 4535 ret = cdev_device_add(&ctrl->cdev, ctrl->device); 4536 if (ret) 4537 goto out_free_name; 4538 4539 /* 4540 * Initialize latency tolerance controls. The sysfs files won't 4541 * be visible to userspace unless the device actually supports APST. 4542 */ 4543 ctrl->device->power.set_latency_tolerance = nvme_set_latency_tolerance; 4544 dev_pm_qos_update_user_latency_tolerance(ctrl->device, 4545 min(default_ps_max_latency_us, (unsigned long)S32_MAX)); 4546 4547 nvme_fault_inject_init(&ctrl->fault_inject, dev_name(ctrl->device)); 4548 nvme_mpath_init_ctrl(ctrl); 4549 ret = nvme_auth_init_ctrl(ctrl); 4550 if (ret) 4551 goto out_free_cdev; 4552 4553 return 0; 4554 out_free_cdev: 4555 nvme_fault_inject_fini(&ctrl->fault_inject); 4556 dev_pm_qos_hide_latency_tolerance(ctrl->device); 4557 cdev_device_del(&ctrl->cdev, ctrl->device); 4558 out_free_name: 4559 nvme_put_ctrl(ctrl); 4560 kfree_const(ctrl->device->kobj.name); 4561 out_release_instance: 4562 ida_free(&nvme_instance_ida, ctrl->instance); 4563 out: 4564 if (ctrl->discard_page) 4565 __free_page(ctrl->discard_page); 4566 cleanup_srcu_struct(&ctrl->srcu); 4567 return ret; 4568 } 4569 EXPORT_SYMBOL_GPL(nvme_init_ctrl); 4570 4571 /* let I/O to all namespaces fail in preparation for surprise removal */ 4572 void nvme_mark_namespaces_dead(struct nvme_ctrl *ctrl) 4573 { 4574 struct nvme_ns *ns; 4575 int srcu_idx; 4576 4577 srcu_idx = srcu_read_lock(&ctrl->srcu); 4578 list_for_each_entry_srcu(ns, &ctrl->namespaces, list, 4579 srcu_read_lock_held(&ctrl->srcu)) 4580 blk_mark_disk_dead(ns->disk); 4581 srcu_read_unlock(&ctrl->srcu, srcu_idx); 4582 } 4583 EXPORT_SYMBOL_GPL(nvme_mark_namespaces_dead); 4584 4585 void nvme_unfreeze(struct nvme_ctrl *ctrl) 4586 { 4587 struct nvme_ns *ns; 4588 int srcu_idx; 4589 4590 srcu_idx = srcu_read_lock(&ctrl->srcu); 4591 list_for_each_entry_srcu(ns, &ctrl->namespaces, list, 4592 srcu_read_lock_held(&ctrl->srcu)) 4593 blk_mq_unfreeze_queue(ns->queue); 4594 srcu_read_unlock(&ctrl->srcu, srcu_idx); 4595 clear_bit(NVME_CTRL_FROZEN, &ctrl->flags); 4596 } 4597 EXPORT_SYMBOL_GPL(nvme_unfreeze); 4598 4599 int nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout) 4600 { 4601 struct nvme_ns *ns; 4602 int srcu_idx; 4603 4604 srcu_idx = srcu_read_lock(&ctrl->srcu); 4605 list_for_each_entry_srcu(ns, &ctrl->namespaces, list, 4606 srcu_read_lock_held(&ctrl->srcu)) { 4607 timeout = blk_mq_freeze_queue_wait_timeout(ns->queue, timeout); 4608 if (timeout <= 0) 4609 break; 4610 } 4611 srcu_read_unlock(&ctrl->srcu, srcu_idx); 4612 return timeout; 4613 } 4614 EXPORT_SYMBOL_GPL(nvme_wait_freeze_timeout); 4615 4616 void nvme_wait_freeze(struct nvme_ctrl *ctrl) 4617 { 4618 struct nvme_ns *ns; 4619 int srcu_idx; 4620 4621 srcu_idx = srcu_read_lock(&ctrl->srcu); 4622 list_for_each_entry_srcu(ns, &ctrl->namespaces, list, 4623 srcu_read_lock_held(&ctrl->srcu)) 4624 blk_mq_freeze_queue_wait(ns->queue); 4625 srcu_read_unlock(&ctrl->srcu, srcu_idx); 4626 } 4627 EXPORT_SYMBOL_GPL(nvme_wait_freeze); 4628 4629 void nvme_start_freeze(struct nvme_ctrl *ctrl) 4630 { 4631 struct nvme_ns *ns; 4632 int srcu_idx; 4633 4634 set_bit(NVME_CTRL_FROZEN, &ctrl->flags); 4635 srcu_idx = srcu_read_lock(&ctrl->srcu); 4636 list_for_each_entry_srcu(ns, &ctrl->namespaces, list, 4637 srcu_read_lock_held(&ctrl->srcu)) 4638 blk_freeze_queue_start(ns->queue); 4639 srcu_read_unlock(&ctrl->srcu, srcu_idx); 4640 } 4641 EXPORT_SYMBOL_GPL(nvme_start_freeze); 4642 4643 void nvme_quiesce_io_queues(struct nvme_ctrl *ctrl) 4644 { 4645 if (!ctrl->tagset) 4646 return; 4647 if (!test_and_set_bit(NVME_CTRL_STOPPED, &ctrl->flags)) 4648 blk_mq_quiesce_tagset(ctrl->tagset); 4649 else 4650 blk_mq_wait_quiesce_done(ctrl->tagset); 4651 } 4652 EXPORT_SYMBOL_GPL(nvme_quiesce_io_queues); 4653 4654 void nvme_unquiesce_io_queues(struct nvme_ctrl *ctrl) 4655 { 4656 if (!ctrl->tagset) 4657 return; 4658 if (test_and_clear_bit(NVME_CTRL_STOPPED, &ctrl->flags)) 4659 blk_mq_unquiesce_tagset(ctrl->tagset); 4660 } 4661 EXPORT_SYMBOL_GPL(nvme_unquiesce_io_queues); 4662 4663 void nvme_quiesce_admin_queue(struct nvme_ctrl *ctrl) 4664 { 4665 if (!test_and_set_bit(NVME_CTRL_ADMIN_Q_STOPPED, &ctrl->flags)) 4666 blk_mq_quiesce_queue(ctrl->admin_q); 4667 else 4668 blk_mq_wait_quiesce_done(ctrl->admin_q->tag_set); 4669 } 4670 EXPORT_SYMBOL_GPL(nvme_quiesce_admin_queue); 4671 4672 void nvme_unquiesce_admin_queue(struct nvme_ctrl *ctrl) 4673 { 4674 if (test_and_clear_bit(NVME_CTRL_ADMIN_Q_STOPPED, &ctrl->flags)) 4675 blk_mq_unquiesce_queue(ctrl->admin_q); 4676 } 4677 EXPORT_SYMBOL_GPL(nvme_unquiesce_admin_queue); 4678 4679 void nvme_sync_io_queues(struct nvme_ctrl *ctrl) 4680 { 4681 struct nvme_ns *ns; 4682 int srcu_idx; 4683 4684 srcu_idx = srcu_read_lock(&ctrl->srcu); 4685 list_for_each_entry_srcu(ns, &ctrl->namespaces, list, 4686 srcu_read_lock_held(&ctrl->srcu)) 4687 blk_sync_queue(ns->queue); 4688 srcu_read_unlock(&ctrl->srcu, srcu_idx); 4689 } 4690 EXPORT_SYMBOL_GPL(nvme_sync_io_queues); 4691 4692 void nvme_sync_queues(struct nvme_ctrl *ctrl) 4693 { 4694 nvme_sync_io_queues(ctrl); 4695 if (ctrl->admin_q) 4696 blk_sync_queue(ctrl->admin_q); 4697 } 4698 EXPORT_SYMBOL_GPL(nvme_sync_queues); 4699 4700 struct nvme_ctrl *nvme_ctrl_from_file(struct file *file) 4701 { 4702 if (file->f_op != &nvme_dev_fops) 4703 return NULL; 4704 return file->private_data; 4705 } 4706 EXPORT_SYMBOL_NS_GPL(nvme_ctrl_from_file, NVME_TARGET_PASSTHRU); 4707 4708 /* 4709 * Check we didn't inadvertently grow the command structure sizes: 4710 */ 4711 static inline void _nvme_check_size(void) 4712 { 4713 BUILD_BUG_ON(sizeof(struct nvme_common_command) != 64); 4714 BUILD_BUG_ON(sizeof(struct nvme_rw_command) != 64); 4715 BUILD_BUG_ON(sizeof(struct nvme_identify) != 64); 4716 BUILD_BUG_ON(sizeof(struct nvme_features) != 64); 4717 BUILD_BUG_ON(sizeof(struct nvme_download_firmware) != 64); 4718 BUILD_BUG_ON(sizeof(struct nvme_format_cmd) != 64); 4719 BUILD_BUG_ON(sizeof(struct nvme_dsm_cmd) != 64); 4720 BUILD_BUG_ON(sizeof(struct nvme_write_zeroes_cmd) != 64); 4721 BUILD_BUG_ON(sizeof(struct nvme_abort_cmd) != 64); 4722 BUILD_BUG_ON(sizeof(struct nvme_get_log_page_command) != 64); 4723 BUILD_BUG_ON(sizeof(struct nvme_command) != 64); 4724 BUILD_BUG_ON(sizeof(struct nvme_id_ctrl) != NVME_IDENTIFY_DATA_SIZE); 4725 BUILD_BUG_ON(sizeof(struct nvme_id_ns) != NVME_IDENTIFY_DATA_SIZE); 4726 BUILD_BUG_ON(sizeof(struct nvme_id_ns_cs_indep) != 4727 NVME_IDENTIFY_DATA_SIZE); 4728 BUILD_BUG_ON(sizeof(struct nvme_id_ns_zns) != NVME_IDENTIFY_DATA_SIZE); 4729 BUILD_BUG_ON(sizeof(struct nvme_id_ns_nvm) != NVME_IDENTIFY_DATA_SIZE); 4730 BUILD_BUG_ON(sizeof(struct nvme_id_ctrl_zns) != NVME_IDENTIFY_DATA_SIZE); 4731 BUILD_BUG_ON(sizeof(struct nvme_id_ctrl_nvm) != NVME_IDENTIFY_DATA_SIZE); 4732 BUILD_BUG_ON(sizeof(struct nvme_lba_range_type) != 64); 4733 BUILD_BUG_ON(sizeof(struct nvme_smart_log) != 512); 4734 BUILD_BUG_ON(sizeof(struct nvme_dbbuf) != 64); 4735 BUILD_BUG_ON(sizeof(struct nvme_directive_cmd) != 64); 4736 BUILD_BUG_ON(sizeof(struct nvme_feat_host_behavior) != 512); 4737 } 4738 4739 4740 static int __init nvme_core_init(void) 4741 { 4742 int result = -ENOMEM; 4743 4744 _nvme_check_size(); 4745 4746 nvme_wq = alloc_workqueue("nvme-wq", 4747 WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_SYSFS, 0); 4748 if (!nvme_wq) 4749 goto out; 4750 4751 nvme_reset_wq = alloc_workqueue("nvme-reset-wq", 4752 WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_SYSFS, 0); 4753 if (!nvme_reset_wq) 4754 goto destroy_wq; 4755 4756 nvme_delete_wq = alloc_workqueue("nvme-delete-wq", 4757 WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_SYSFS, 0); 4758 if (!nvme_delete_wq) 4759 goto destroy_reset_wq; 4760 4761 result = alloc_chrdev_region(&nvme_ctrl_base_chr_devt, 0, 4762 NVME_MINORS, "nvme"); 4763 if (result < 0) 4764 goto destroy_delete_wq; 4765 4766 nvme_class = class_create("nvme"); 4767 if (IS_ERR(nvme_class)) { 4768 result = PTR_ERR(nvme_class); 4769 goto unregister_chrdev; 4770 } 4771 nvme_class->dev_uevent = nvme_class_uevent; 4772 4773 nvme_subsys_class = class_create("nvme-subsystem"); 4774 if (IS_ERR(nvme_subsys_class)) { 4775 result = PTR_ERR(nvme_subsys_class); 4776 goto destroy_class; 4777 } 4778 4779 result = alloc_chrdev_region(&nvme_ns_chr_devt, 0, NVME_MINORS, 4780 "nvme-generic"); 4781 if (result < 0) 4782 goto destroy_subsys_class; 4783 4784 nvme_ns_chr_class = class_create("nvme-generic"); 4785 if (IS_ERR(nvme_ns_chr_class)) { 4786 result = PTR_ERR(nvme_ns_chr_class); 4787 goto unregister_generic_ns; 4788 } 4789 4790 result = nvme_init_auth(); 4791 if (result) 4792 goto destroy_ns_chr; 4793 return 0; 4794 4795 destroy_ns_chr: 4796 class_destroy(nvme_ns_chr_class); 4797 unregister_generic_ns: 4798 unregister_chrdev_region(nvme_ns_chr_devt, NVME_MINORS); 4799 destroy_subsys_class: 4800 class_destroy(nvme_subsys_class); 4801 destroy_class: 4802 class_destroy(nvme_class); 4803 unregister_chrdev: 4804 unregister_chrdev_region(nvme_ctrl_base_chr_devt, NVME_MINORS); 4805 destroy_delete_wq: 4806 destroy_workqueue(nvme_delete_wq); 4807 destroy_reset_wq: 4808 destroy_workqueue(nvme_reset_wq); 4809 destroy_wq: 4810 destroy_workqueue(nvme_wq); 4811 out: 4812 return result; 4813 } 4814 4815 static void __exit nvme_core_exit(void) 4816 { 4817 nvme_exit_auth(); 4818 class_destroy(nvme_ns_chr_class); 4819 class_destroy(nvme_subsys_class); 4820 class_destroy(nvme_class); 4821 unregister_chrdev_region(nvme_ns_chr_devt, NVME_MINORS); 4822 unregister_chrdev_region(nvme_ctrl_base_chr_devt, NVME_MINORS); 4823 destroy_workqueue(nvme_delete_wq); 4824 destroy_workqueue(nvme_reset_wq); 4825 destroy_workqueue(nvme_wq); 4826 ida_destroy(&nvme_ns_chr_minor_ida); 4827 ida_destroy(&nvme_instance_ida); 4828 } 4829 4830 MODULE_LICENSE("GPL"); 4831 MODULE_VERSION("1.0"); 4832 module_init(nvme_core_init); 4833 module_exit(nvme_core_exit); 4834