1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * NVM Express device driver 4 * Copyright (c) 2011-2014, Intel Corporation. 5 */ 6 7 #include <linux/blkdev.h> 8 #include <linux/blk-mq.h> 9 #include <linux/compat.h> 10 #include <linux/delay.h> 11 #include <linux/errno.h> 12 #include <linux/hdreg.h> 13 #include <linux/kernel.h> 14 #include <linux/module.h> 15 #include <linux/backing-dev.h> 16 #include <linux/list_sort.h> 17 #include <linux/slab.h> 18 #include <linux/types.h> 19 #include <linux/pr.h> 20 #include <linux/ptrace.h> 21 #include <linux/nvme_ioctl.h> 22 #include <linux/pm_qos.h> 23 #include <asm/unaligned.h> 24 25 #include "nvme.h" 26 #include "fabrics.h" 27 28 #define CREATE_TRACE_POINTS 29 #include "trace.h" 30 31 #define NVME_MINORS (1U << MINORBITS) 32 33 unsigned int admin_timeout = 60; 34 module_param(admin_timeout, uint, 0644); 35 MODULE_PARM_DESC(admin_timeout, "timeout in seconds for admin commands"); 36 EXPORT_SYMBOL_GPL(admin_timeout); 37 38 unsigned int nvme_io_timeout = 30; 39 module_param_named(io_timeout, nvme_io_timeout, uint, 0644); 40 MODULE_PARM_DESC(io_timeout, "timeout in seconds for I/O"); 41 EXPORT_SYMBOL_GPL(nvme_io_timeout); 42 43 static unsigned char shutdown_timeout = 5; 44 module_param(shutdown_timeout, byte, 0644); 45 MODULE_PARM_DESC(shutdown_timeout, "timeout in seconds for controller shutdown"); 46 47 static u8 nvme_max_retries = 5; 48 module_param_named(max_retries, nvme_max_retries, byte, 0644); 49 MODULE_PARM_DESC(max_retries, "max number of retries a command may have"); 50 51 static unsigned long default_ps_max_latency_us = 100000; 52 module_param(default_ps_max_latency_us, ulong, 0644); 53 MODULE_PARM_DESC(default_ps_max_latency_us, 54 "max power saving latency for new devices; use PM QOS to change per device"); 55 56 static bool force_apst; 57 module_param(force_apst, bool, 0644); 58 MODULE_PARM_DESC(force_apst, "allow APST for newly enumerated devices even if quirked off"); 59 60 static bool streams; 61 module_param(streams, bool, 0644); 62 MODULE_PARM_DESC(streams, "turn on support for Streams write directives"); 63 64 /* 65 * nvme_wq - hosts nvme related works that are not reset or delete 66 * nvme_reset_wq - hosts nvme reset works 67 * nvme_delete_wq - hosts nvme delete works 68 * 69 * nvme_wq will host works such as scan, aen handling, fw activation, 70 * keep-alive, periodic reconnects etc. nvme_reset_wq 71 * runs reset works which also flush works hosted on nvme_wq for 72 * serialization purposes. nvme_delete_wq host controller deletion 73 * works which flush reset works for serialization. 74 */ 75 struct workqueue_struct *nvme_wq; 76 EXPORT_SYMBOL_GPL(nvme_wq); 77 78 struct workqueue_struct *nvme_reset_wq; 79 EXPORT_SYMBOL_GPL(nvme_reset_wq); 80 81 struct workqueue_struct *nvme_delete_wq; 82 EXPORT_SYMBOL_GPL(nvme_delete_wq); 83 84 static LIST_HEAD(nvme_subsystems); 85 static DEFINE_MUTEX(nvme_subsystems_lock); 86 87 static DEFINE_IDA(nvme_instance_ida); 88 static dev_t nvme_ctrl_base_chr_devt; 89 static struct class *nvme_class; 90 static struct class *nvme_subsys_class; 91 92 static void nvme_put_subsystem(struct nvme_subsystem *subsys); 93 static void nvme_remove_invalid_namespaces(struct nvme_ctrl *ctrl, 94 unsigned nsid); 95 96 /* 97 * Prepare a queue for teardown. 98 * 99 * This must forcibly unquiesce queues to avoid blocking dispatch, and only set 100 * the capacity to 0 after that to avoid blocking dispatchers that may be 101 * holding bd_butex. This will end buffered writers dirtying pages that can't 102 * be synced. 103 */ 104 static void nvme_set_queue_dying(struct nvme_ns *ns) 105 { 106 if (test_and_set_bit(NVME_NS_DEAD, &ns->flags)) 107 return; 108 109 blk_set_queue_dying(ns->queue); 110 blk_mq_unquiesce_queue(ns->queue); 111 112 set_capacity_and_notify(ns->disk, 0); 113 } 114 115 static void nvme_queue_scan(struct nvme_ctrl *ctrl) 116 { 117 /* 118 * Only new queue scan work when admin and IO queues are both alive 119 */ 120 if (ctrl->state == NVME_CTRL_LIVE && ctrl->tagset) 121 queue_work(nvme_wq, &ctrl->scan_work); 122 } 123 124 /* 125 * Use this function to proceed with scheduling reset_work for a controller 126 * that had previously been set to the resetting state. This is intended for 127 * code paths that can't be interrupted by other reset attempts. A hot removal 128 * may prevent this from succeeding. 129 */ 130 int nvme_try_sched_reset(struct nvme_ctrl *ctrl) 131 { 132 if (ctrl->state != NVME_CTRL_RESETTING) 133 return -EBUSY; 134 if (!queue_work(nvme_reset_wq, &ctrl->reset_work)) 135 return -EBUSY; 136 return 0; 137 } 138 EXPORT_SYMBOL_GPL(nvme_try_sched_reset); 139 140 static void nvme_failfast_work(struct work_struct *work) 141 { 142 struct nvme_ctrl *ctrl = container_of(to_delayed_work(work), 143 struct nvme_ctrl, failfast_work); 144 145 if (ctrl->state != NVME_CTRL_CONNECTING) 146 return; 147 148 set_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags); 149 dev_info(ctrl->device, "failfast expired\n"); 150 nvme_kick_requeue_lists(ctrl); 151 } 152 153 static inline void nvme_start_failfast_work(struct nvme_ctrl *ctrl) 154 { 155 if (!ctrl->opts || ctrl->opts->fast_io_fail_tmo == -1) 156 return; 157 158 schedule_delayed_work(&ctrl->failfast_work, 159 ctrl->opts->fast_io_fail_tmo * HZ); 160 } 161 162 static inline void nvme_stop_failfast_work(struct nvme_ctrl *ctrl) 163 { 164 if (!ctrl->opts) 165 return; 166 167 cancel_delayed_work_sync(&ctrl->failfast_work); 168 clear_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags); 169 } 170 171 172 int nvme_reset_ctrl(struct nvme_ctrl *ctrl) 173 { 174 if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING)) 175 return -EBUSY; 176 if (!queue_work(nvme_reset_wq, &ctrl->reset_work)) 177 return -EBUSY; 178 return 0; 179 } 180 EXPORT_SYMBOL_GPL(nvme_reset_ctrl); 181 182 static int nvme_reset_ctrl_sync(struct nvme_ctrl *ctrl) 183 { 184 int ret; 185 186 ret = nvme_reset_ctrl(ctrl); 187 if (!ret) { 188 flush_work(&ctrl->reset_work); 189 if (ctrl->state != NVME_CTRL_LIVE) 190 ret = -ENETRESET; 191 } 192 193 return ret; 194 } 195 196 static void nvme_do_delete_ctrl(struct nvme_ctrl *ctrl) 197 { 198 dev_info(ctrl->device, 199 "Removing ctrl: NQN \"%s\"\n", ctrl->opts->subsysnqn); 200 201 flush_work(&ctrl->reset_work); 202 nvme_stop_ctrl(ctrl); 203 nvme_remove_namespaces(ctrl); 204 ctrl->ops->delete_ctrl(ctrl); 205 nvme_uninit_ctrl(ctrl); 206 } 207 208 static void nvme_delete_ctrl_work(struct work_struct *work) 209 { 210 struct nvme_ctrl *ctrl = 211 container_of(work, struct nvme_ctrl, delete_work); 212 213 nvme_do_delete_ctrl(ctrl); 214 } 215 216 int nvme_delete_ctrl(struct nvme_ctrl *ctrl) 217 { 218 if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_DELETING)) 219 return -EBUSY; 220 if (!queue_work(nvme_delete_wq, &ctrl->delete_work)) 221 return -EBUSY; 222 return 0; 223 } 224 EXPORT_SYMBOL_GPL(nvme_delete_ctrl); 225 226 static void nvme_delete_ctrl_sync(struct nvme_ctrl *ctrl) 227 { 228 /* 229 * Keep a reference until nvme_do_delete_ctrl() complete, 230 * since ->delete_ctrl can free the controller. 231 */ 232 nvme_get_ctrl(ctrl); 233 if (nvme_change_ctrl_state(ctrl, NVME_CTRL_DELETING)) 234 nvme_do_delete_ctrl(ctrl); 235 nvme_put_ctrl(ctrl); 236 } 237 238 static blk_status_t nvme_error_status(u16 status) 239 { 240 switch (status & 0x7ff) { 241 case NVME_SC_SUCCESS: 242 return BLK_STS_OK; 243 case NVME_SC_CAP_EXCEEDED: 244 return BLK_STS_NOSPC; 245 case NVME_SC_LBA_RANGE: 246 case NVME_SC_CMD_INTERRUPTED: 247 case NVME_SC_NS_NOT_READY: 248 return BLK_STS_TARGET; 249 case NVME_SC_BAD_ATTRIBUTES: 250 case NVME_SC_ONCS_NOT_SUPPORTED: 251 case NVME_SC_INVALID_OPCODE: 252 case NVME_SC_INVALID_FIELD: 253 case NVME_SC_INVALID_NS: 254 return BLK_STS_NOTSUPP; 255 case NVME_SC_WRITE_FAULT: 256 case NVME_SC_READ_ERROR: 257 case NVME_SC_UNWRITTEN_BLOCK: 258 case NVME_SC_ACCESS_DENIED: 259 case NVME_SC_READ_ONLY: 260 case NVME_SC_COMPARE_FAILED: 261 return BLK_STS_MEDIUM; 262 case NVME_SC_GUARD_CHECK: 263 case NVME_SC_APPTAG_CHECK: 264 case NVME_SC_REFTAG_CHECK: 265 case NVME_SC_INVALID_PI: 266 return BLK_STS_PROTECTION; 267 case NVME_SC_RESERVATION_CONFLICT: 268 return BLK_STS_NEXUS; 269 case NVME_SC_HOST_PATH_ERROR: 270 return BLK_STS_TRANSPORT; 271 case NVME_SC_ZONE_TOO_MANY_ACTIVE: 272 return BLK_STS_ZONE_ACTIVE_RESOURCE; 273 case NVME_SC_ZONE_TOO_MANY_OPEN: 274 return BLK_STS_ZONE_OPEN_RESOURCE; 275 default: 276 return BLK_STS_IOERR; 277 } 278 } 279 280 static void nvme_retry_req(struct request *req) 281 { 282 unsigned long delay = 0; 283 u16 crd; 284 285 /* The mask and shift result must be <= 3 */ 286 crd = (nvme_req(req)->status & NVME_SC_CRD) >> 11; 287 if (crd) 288 delay = nvme_req(req)->ctrl->crdt[crd - 1] * 100; 289 290 nvme_req(req)->retries++; 291 blk_mq_requeue_request(req, false); 292 blk_mq_delay_kick_requeue_list(req->q, delay); 293 } 294 295 enum nvme_disposition { 296 COMPLETE, 297 RETRY, 298 FAILOVER, 299 }; 300 301 static inline enum nvme_disposition nvme_decide_disposition(struct request *req) 302 { 303 if (likely(nvme_req(req)->status == 0)) 304 return COMPLETE; 305 306 if (blk_noretry_request(req) || 307 (nvme_req(req)->status & NVME_SC_DNR) || 308 nvme_req(req)->retries >= nvme_max_retries) 309 return COMPLETE; 310 311 if (req->cmd_flags & REQ_NVME_MPATH) { 312 if (nvme_is_path_error(nvme_req(req)->status) || 313 blk_queue_dying(req->q)) 314 return FAILOVER; 315 } else { 316 if (blk_queue_dying(req->q)) 317 return COMPLETE; 318 } 319 320 return RETRY; 321 } 322 323 static inline void nvme_end_req(struct request *req) 324 { 325 blk_status_t status = nvme_error_status(nvme_req(req)->status); 326 327 if (IS_ENABLED(CONFIG_BLK_DEV_ZONED) && 328 req_op(req) == REQ_OP_ZONE_APPEND) 329 req->__sector = nvme_lba_to_sect(req->q->queuedata, 330 le64_to_cpu(nvme_req(req)->result.u64)); 331 332 nvme_trace_bio_complete(req); 333 blk_mq_end_request(req, status); 334 } 335 336 void nvme_complete_rq(struct request *req) 337 { 338 trace_nvme_complete_rq(req); 339 nvme_cleanup_cmd(req); 340 341 if (nvme_req(req)->ctrl->kas) 342 nvme_req(req)->ctrl->comp_seen = true; 343 344 switch (nvme_decide_disposition(req)) { 345 case COMPLETE: 346 nvme_end_req(req); 347 return; 348 case RETRY: 349 nvme_retry_req(req); 350 return; 351 case FAILOVER: 352 nvme_failover_req(req); 353 return; 354 } 355 } 356 EXPORT_SYMBOL_GPL(nvme_complete_rq); 357 358 /* 359 * Called to unwind from ->queue_rq on a failed command submission so that the 360 * multipathing code gets called to potentially failover to another path. 361 * The caller needs to unwind all transport specific resource allocations and 362 * must return propagate the return value. 363 */ 364 blk_status_t nvme_host_path_error(struct request *req) 365 { 366 nvme_req(req)->status = NVME_SC_HOST_PATH_ERROR; 367 blk_mq_set_request_complete(req); 368 nvme_complete_rq(req); 369 return BLK_STS_OK; 370 } 371 EXPORT_SYMBOL_GPL(nvme_host_path_error); 372 373 bool nvme_cancel_request(struct request *req, void *data, bool reserved) 374 { 375 dev_dbg_ratelimited(((struct nvme_ctrl *) data)->device, 376 "Cancelling I/O %d", req->tag); 377 378 /* don't abort one completed request */ 379 if (blk_mq_request_completed(req)) 380 return true; 381 382 nvme_req(req)->status = NVME_SC_HOST_ABORTED_CMD; 383 blk_mq_complete_request(req); 384 return true; 385 } 386 EXPORT_SYMBOL_GPL(nvme_cancel_request); 387 388 void nvme_cancel_tagset(struct nvme_ctrl *ctrl) 389 { 390 if (ctrl->tagset) { 391 blk_mq_tagset_busy_iter(ctrl->tagset, 392 nvme_cancel_request, ctrl); 393 blk_mq_tagset_wait_completed_request(ctrl->tagset); 394 } 395 } 396 EXPORT_SYMBOL_GPL(nvme_cancel_tagset); 397 398 void nvme_cancel_admin_tagset(struct nvme_ctrl *ctrl) 399 { 400 if (ctrl->admin_tagset) { 401 blk_mq_tagset_busy_iter(ctrl->admin_tagset, 402 nvme_cancel_request, ctrl); 403 blk_mq_tagset_wait_completed_request(ctrl->admin_tagset); 404 } 405 } 406 EXPORT_SYMBOL_GPL(nvme_cancel_admin_tagset); 407 408 bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl, 409 enum nvme_ctrl_state new_state) 410 { 411 enum nvme_ctrl_state old_state; 412 unsigned long flags; 413 bool changed = false; 414 415 spin_lock_irqsave(&ctrl->lock, flags); 416 417 old_state = ctrl->state; 418 switch (new_state) { 419 case NVME_CTRL_LIVE: 420 switch (old_state) { 421 case NVME_CTRL_NEW: 422 case NVME_CTRL_RESETTING: 423 case NVME_CTRL_CONNECTING: 424 changed = true; 425 fallthrough; 426 default: 427 break; 428 } 429 break; 430 case NVME_CTRL_RESETTING: 431 switch (old_state) { 432 case NVME_CTRL_NEW: 433 case NVME_CTRL_LIVE: 434 changed = true; 435 fallthrough; 436 default: 437 break; 438 } 439 break; 440 case NVME_CTRL_CONNECTING: 441 switch (old_state) { 442 case NVME_CTRL_NEW: 443 case NVME_CTRL_RESETTING: 444 changed = true; 445 fallthrough; 446 default: 447 break; 448 } 449 break; 450 case NVME_CTRL_DELETING: 451 switch (old_state) { 452 case NVME_CTRL_LIVE: 453 case NVME_CTRL_RESETTING: 454 case NVME_CTRL_CONNECTING: 455 changed = true; 456 fallthrough; 457 default: 458 break; 459 } 460 break; 461 case NVME_CTRL_DELETING_NOIO: 462 switch (old_state) { 463 case NVME_CTRL_DELETING: 464 case NVME_CTRL_DEAD: 465 changed = true; 466 fallthrough; 467 default: 468 break; 469 } 470 break; 471 case NVME_CTRL_DEAD: 472 switch (old_state) { 473 case NVME_CTRL_DELETING: 474 changed = true; 475 fallthrough; 476 default: 477 break; 478 } 479 break; 480 default: 481 break; 482 } 483 484 if (changed) { 485 ctrl->state = new_state; 486 wake_up_all(&ctrl->state_wq); 487 } 488 489 spin_unlock_irqrestore(&ctrl->lock, flags); 490 if (!changed) 491 return false; 492 493 if (ctrl->state == NVME_CTRL_LIVE) { 494 if (old_state == NVME_CTRL_CONNECTING) 495 nvme_stop_failfast_work(ctrl); 496 nvme_kick_requeue_lists(ctrl); 497 } else if (ctrl->state == NVME_CTRL_CONNECTING && 498 old_state == NVME_CTRL_RESETTING) { 499 nvme_start_failfast_work(ctrl); 500 } 501 return changed; 502 } 503 EXPORT_SYMBOL_GPL(nvme_change_ctrl_state); 504 505 /* 506 * Returns true for sink states that can't ever transition back to live. 507 */ 508 static bool nvme_state_terminal(struct nvme_ctrl *ctrl) 509 { 510 switch (ctrl->state) { 511 case NVME_CTRL_NEW: 512 case NVME_CTRL_LIVE: 513 case NVME_CTRL_RESETTING: 514 case NVME_CTRL_CONNECTING: 515 return false; 516 case NVME_CTRL_DELETING: 517 case NVME_CTRL_DELETING_NOIO: 518 case NVME_CTRL_DEAD: 519 return true; 520 default: 521 WARN_ONCE(1, "Unhandled ctrl state:%d", ctrl->state); 522 return true; 523 } 524 } 525 526 /* 527 * Waits for the controller state to be resetting, or returns false if it is 528 * not possible to ever transition to that state. 529 */ 530 bool nvme_wait_reset(struct nvme_ctrl *ctrl) 531 { 532 wait_event(ctrl->state_wq, 533 nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING) || 534 nvme_state_terminal(ctrl)); 535 return ctrl->state == NVME_CTRL_RESETTING; 536 } 537 EXPORT_SYMBOL_GPL(nvme_wait_reset); 538 539 static void nvme_free_ns_head(struct kref *ref) 540 { 541 struct nvme_ns_head *head = 542 container_of(ref, struct nvme_ns_head, ref); 543 544 nvme_mpath_remove_disk(head); 545 ida_simple_remove(&head->subsys->ns_ida, head->instance); 546 cleanup_srcu_struct(&head->srcu); 547 nvme_put_subsystem(head->subsys); 548 kfree(head); 549 } 550 551 static void nvme_put_ns_head(struct nvme_ns_head *head) 552 { 553 kref_put(&head->ref, nvme_free_ns_head); 554 } 555 556 static void nvme_free_ns(struct kref *kref) 557 { 558 struct nvme_ns *ns = container_of(kref, struct nvme_ns, kref); 559 560 if (ns->ndev) 561 nvme_nvm_unregister(ns); 562 563 put_disk(ns->disk); 564 nvme_put_ns_head(ns->head); 565 nvme_put_ctrl(ns->ctrl); 566 kfree(ns); 567 } 568 569 void nvme_put_ns(struct nvme_ns *ns) 570 { 571 kref_put(&ns->kref, nvme_free_ns); 572 } 573 EXPORT_SYMBOL_NS_GPL(nvme_put_ns, NVME_TARGET_PASSTHRU); 574 575 static inline void nvme_clear_nvme_request(struct request *req) 576 { 577 if (!(req->rq_flags & RQF_DONTPREP)) { 578 nvme_req(req)->retries = 0; 579 nvme_req(req)->flags = 0; 580 req->rq_flags |= RQF_DONTPREP; 581 } 582 } 583 584 static inline unsigned int nvme_req_op(struct nvme_command *cmd) 585 { 586 return nvme_is_write(cmd) ? REQ_OP_DRV_OUT : REQ_OP_DRV_IN; 587 } 588 589 static inline void nvme_init_request(struct request *req, 590 struct nvme_command *cmd) 591 { 592 if (req->q->queuedata) 593 req->timeout = NVME_IO_TIMEOUT; 594 else /* no queuedata implies admin queue */ 595 req->timeout = NVME_ADMIN_TIMEOUT; 596 597 req->cmd_flags |= REQ_FAILFAST_DRIVER; 598 nvme_clear_nvme_request(req); 599 nvme_req(req)->cmd = cmd; 600 } 601 602 struct request *nvme_alloc_request(struct request_queue *q, 603 struct nvme_command *cmd, blk_mq_req_flags_t flags) 604 { 605 struct request *req; 606 607 req = blk_mq_alloc_request(q, nvme_req_op(cmd), flags); 608 if (!IS_ERR(req)) 609 nvme_init_request(req, cmd); 610 return req; 611 } 612 EXPORT_SYMBOL_GPL(nvme_alloc_request); 613 614 static struct request *nvme_alloc_request_qid(struct request_queue *q, 615 struct nvme_command *cmd, blk_mq_req_flags_t flags, int qid) 616 { 617 struct request *req; 618 619 req = blk_mq_alloc_request_hctx(q, nvme_req_op(cmd), flags, 620 qid ? qid - 1 : 0); 621 if (!IS_ERR(req)) 622 nvme_init_request(req, cmd); 623 return req; 624 } 625 626 static int nvme_toggle_streams(struct nvme_ctrl *ctrl, bool enable) 627 { 628 struct nvme_command c; 629 630 memset(&c, 0, sizeof(c)); 631 632 c.directive.opcode = nvme_admin_directive_send; 633 c.directive.nsid = cpu_to_le32(NVME_NSID_ALL); 634 c.directive.doper = NVME_DIR_SND_ID_OP_ENABLE; 635 c.directive.dtype = NVME_DIR_IDENTIFY; 636 c.directive.tdtype = NVME_DIR_STREAMS; 637 c.directive.endir = enable ? NVME_DIR_ENDIR : 0; 638 639 return nvme_submit_sync_cmd(ctrl->admin_q, &c, NULL, 0); 640 } 641 642 static int nvme_disable_streams(struct nvme_ctrl *ctrl) 643 { 644 return nvme_toggle_streams(ctrl, false); 645 } 646 647 static int nvme_enable_streams(struct nvme_ctrl *ctrl) 648 { 649 return nvme_toggle_streams(ctrl, true); 650 } 651 652 static int nvme_get_stream_params(struct nvme_ctrl *ctrl, 653 struct streams_directive_params *s, u32 nsid) 654 { 655 struct nvme_command c; 656 657 memset(&c, 0, sizeof(c)); 658 memset(s, 0, sizeof(*s)); 659 660 c.directive.opcode = nvme_admin_directive_recv; 661 c.directive.nsid = cpu_to_le32(nsid); 662 c.directive.numd = cpu_to_le32(nvme_bytes_to_numd(sizeof(*s))); 663 c.directive.doper = NVME_DIR_RCV_ST_OP_PARAM; 664 c.directive.dtype = NVME_DIR_STREAMS; 665 666 return nvme_submit_sync_cmd(ctrl->admin_q, &c, s, sizeof(*s)); 667 } 668 669 static int nvme_configure_directives(struct nvme_ctrl *ctrl) 670 { 671 struct streams_directive_params s; 672 int ret; 673 674 if (!(ctrl->oacs & NVME_CTRL_OACS_DIRECTIVES)) 675 return 0; 676 if (!streams) 677 return 0; 678 679 ret = nvme_enable_streams(ctrl); 680 if (ret) 681 return ret; 682 683 ret = nvme_get_stream_params(ctrl, &s, NVME_NSID_ALL); 684 if (ret) 685 goto out_disable_stream; 686 687 ctrl->nssa = le16_to_cpu(s.nssa); 688 if (ctrl->nssa < BLK_MAX_WRITE_HINTS - 1) { 689 dev_info(ctrl->device, "too few streams (%u) available\n", 690 ctrl->nssa); 691 goto out_disable_stream; 692 } 693 694 ctrl->nr_streams = min_t(u16, ctrl->nssa, BLK_MAX_WRITE_HINTS - 1); 695 dev_info(ctrl->device, "Using %u streams\n", ctrl->nr_streams); 696 return 0; 697 698 out_disable_stream: 699 nvme_disable_streams(ctrl); 700 return ret; 701 } 702 703 /* 704 * Check if 'req' has a write hint associated with it. If it does, assign 705 * a valid namespace stream to the write. 706 */ 707 static void nvme_assign_write_stream(struct nvme_ctrl *ctrl, 708 struct request *req, u16 *control, 709 u32 *dsmgmt) 710 { 711 enum rw_hint streamid = req->write_hint; 712 713 if (streamid == WRITE_LIFE_NOT_SET || streamid == WRITE_LIFE_NONE) 714 streamid = 0; 715 else { 716 streamid--; 717 if (WARN_ON_ONCE(streamid > ctrl->nr_streams)) 718 return; 719 720 *control |= NVME_RW_DTYPE_STREAMS; 721 *dsmgmt |= streamid << 16; 722 } 723 724 if (streamid < ARRAY_SIZE(req->q->write_hints)) 725 req->q->write_hints[streamid] += blk_rq_bytes(req) >> 9; 726 } 727 728 static void nvme_setup_passthrough(struct request *req, 729 struct nvme_command *cmd) 730 { 731 memcpy(cmd, nvme_req(req)->cmd, sizeof(*cmd)); 732 /* passthru commands should let the driver set the SGL flags */ 733 cmd->common.flags &= ~NVME_CMD_SGL_ALL; 734 } 735 736 static inline void nvme_setup_flush(struct nvme_ns *ns, 737 struct nvme_command *cmnd) 738 { 739 cmnd->common.opcode = nvme_cmd_flush; 740 cmnd->common.nsid = cpu_to_le32(ns->head->ns_id); 741 } 742 743 static blk_status_t nvme_setup_discard(struct nvme_ns *ns, struct request *req, 744 struct nvme_command *cmnd) 745 { 746 unsigned short segments = blk_rq_nr_discard_segments(req), n = 0; 747 struct nvme_dsm_range *range; 748 struct bio *bio; 749 750 /* 751 * Some devices do not consider the DSM 'Number of Ranges' field when 752 * determining how much data to DMA. Always allocate memory for maximum 753 * number of segments to prevent device reading beyond end of buffer. 754 */ 755 static const size_t alloc_size = sizeof(*range) * NVME_DSM_MAX_RANGES; 756 757 range = kzalloc(alloc_size, GFP_ATOMIC | __GFP_NOWARN); 758 if (!range) { 759 /* 760 * If we fail allocation our range, fallback to the controller 761 * discard page. If that's also busy, it's safe to return 762 * busy, as we know we can make progress once that's freed. 763 */ 764 if (test_and_set_bit_lock(0, &ns->ctrl->discard_page_busy)) 765 return BLK_STS_RESOURCE; 766 767 range = page_address(ns->ctrl->discard_page); 768 } 769 770 __rq_for_each_bio(bio, req) { 771 u64 slba = nvme_sect_to_lba(ns, bio->bi_iter.bi_sector); 772 u32 nlb = bio->bi_iter.bi_size >> ns->lba_shift; 773 774 if (n < segments) { 775 range[n].cattr = cpu_to_le32(0); 776 range[n].nlb = cpu_to_le32(nlb); 777 range[n].slba = cpu_to_le64(slba); 778 } 779 n++; 780 } 781 782 if (WARN_ON_ONCE(n != segments)) { 783 if (virt_to_page(range) == ns->ctrl->discard_page) 784 clear_bit_unlock(0, &ns->ctrl->discard_page_busy); 785 else 786 kfree(range); 787 return BLK_STS_IOERR; 788 } 789 790 cmnd->dsm.opcode = nvme_cmd_dsm; 791 cmnd->dsm.nsid = cpu_to_le32(ns->head->ns_id); 792 cmnd->dsm.nr = cpu_to_le32(segments - 1); 793 cmnd->dsm.attributes = cpu_to_le32(NVME_DSMGMT_AD); 794 795 req->special_vec.bv_page = virt_to_page(range); 796 req->special_vec.bv_offset = offset_in_page(range); 797 req->special_vec.bv_len = alloc_size; 798 req->rq_flags |= RQF_SPECIAL_PAYLOAD; 799 800 return BLK_STS_OK; 801 } 802 803 static inline blk_status_t nvme_setup_write_zeroes(struct nvme_ns *ns, 804 struct request *req, struct nvme_command *cmnd) 805 { 806 if (ns->ctrl->quirks & NVME_QUIRK_DEALLOCATE_ZEROES) 807 return nvme_setup_discard(ns, req, cmnd); 808 809 cmnd->write_zeroes.opcode = nvme_cmd_write_zeroes; 810 cmnd->write_zeroes.nsid = cpu_to_le32(ns->head->ns_id); 811 cmnd->write_zeroes.slba = 812 cpu_to_le64(nvme_sect_to_lba(ns, blk_rq_pos(req))); 813 cmnd->write_zeroes.length = 814 cpu_to_le16((blk_rq_bytes(req) >> ns->lba_shift) - 1); 815 cmnd->write_zeroes.control = 0; 816 return BLK_STS_OK; 817 } 818 819 static inline blk_status_t nvme_setup_rw(struct nvme_ns *ns, 820 struct request *req, struct nvme_command *cmnd, 821 enum nvme_opcode op) 822 { 823 struct nvme_ctrl *ctrl = ns->ctrl; 824 u16 control = 0; 825 u32 dsmgmt = 0; 826 827 if (req->cmd_flags & REQ_FUA) 828 control |= NVME_RW_FUA; 829 if (req->cmd_flags & (REQ_FAILFAST_DEV | REQ_RAHEAD)) 830 control |= NVME_RW_LR; 831 832 if (req->cmd_flags & REQ_RAHEAD) 833 dsmgmt |= NVME_RW_DSM_FREQ_PREFETCH; 834 835 cmnd->rw.opcode = op; 836 cmnd->rw.nsid = cpu_to_le32(ns->head->ns_id); 837 cmnd->rw.slba = cpu_to_le64(nvme_sect_to_lba(ns, blk_rq_pos(req))); 838 cmnd->rw.length = cpu_to_le16((blk_rq_bytes(req) >> ns->lba_shift) - 1); 839 840 if (req_op(req) == REQ_OP_WRITE && ctrl->nr_streams) 841 nvme_assign_write_stream(ctrl, req, &control, &dsmgmt); 842 843 if (ns->ms) { 844 /* 845 * If formated with metadata, the block layer always provides a 846 * metadata buffer if CONFIG_BLK_DEV_INTEGRITY is enabled. Else 847 * we enable the PRACT bit for protection information or set the 848 * namespace capacity to zero to prevent any I/O. 849 */ 850 if (!blk_integrity_rq(req)) { 851 if (WARN_ON_ONCE(!nvme_ns_has_pi(ns))) 852 return BLK_STS_NOTSUPP; 853 control |= NVME_RW_PRINFO_PRACT; 854 } 855 856 switch (ns->pi_type) { 857 case NVME_NS_DPS_PI_TYPE3: 858 control |= NVME_RW_PRINFO_PRCHK_GUARD; 859 break; 860 case NVME_NS_DPS_PI_TYPE1: 861 case NVME_NS_DPS_PI_TYPE2: 862 control |= NVME_RW_PRINFO_PRCHK_GUARD | 863 NVME_RW_PRINFO_PRCHK_REF; 864 if (op == nvme_cmd_zone_append) 865 control |= NVME_RW_APPEND_PIREMAP; 866 cmnd->rw.reftag = cpu_to_le32(t10_pi_ref_tag(req)); 867 break; 868 } 869 } 870 871 cmnd->rw.control = cpu_to_le16(control); 872 cmnd->rw.dsmgmt = cpu_to_le32(dsmgmt); 873 return 0; 874 } 875 876 void nvme_cleanup_cmd(struct request *req) 877 { 878 if (req->rq_flags & RQF_SPECIAL_PAYLOAD) { 879 struct nvme_ctrl *ctrl = nvme_req(req)->ctrl; 880 struct page *page = req->special_vec.bv_page; 881 882 if (page == ctrl->discard_page) 883 clear_bit_unlock(0, &ctrl->discard_page_busy); 884 else 885 kfree(page_address(page) + req->special_vec.bv_offset); 886 } 887 } 888 EXPORT_SYMBOL_GPL(nvme_cleanup_cmd); 889 890 blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req, 891 struct nvme_command *cmd) 892 { 893 blk_status_t ret = BLK_STS_OK; 894 895 nvme_clear_nvme_request(req); 896 897 memset(cmd, 0, sizeof(*cmd)); 898 switch (req_op(req)) { 899 case REQ_OP_DRV_IN: 900 case REQ_OP_DRV_OUT: 901 nvme_setup_passthrough(req, cmd); 902 break; 903 case REQ_OP_FLUSH: 904 nvme_setup_flush(ns, cmd); 905 break; 906 case REQ_OP_ZONE_RESET_ALL: 907 case REQ_OP_ZONE_RESET: 908 ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_RESET); 909 break; 910 case REQ_OP_ZONE_OPEN: 911 ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_OPEN); 912 break; 913 case REQ_OP_ZONE_CLOSE: 914 ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_CLOSE); 915 break; 916 case REQ_OP_ZONE_FINISH: 917 ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_FINISH); 918 break; 919 case REQ_OP_WRITE_ZEROES: 920 ret = nvme_setup_write_zeroes(ns, req, cmd); 921 break; 922 case REQ_OP_DISCARD: 923 ret = nvme_setup_discard(ns, req, cmd); 924 break; 925 case REQ_OP_READ: 926 ret = nvme_setup_rw(ns, req, cmd, nvme_cmd_read); 927 break; 928 case REQ_OP_WRITE: 929 ret = nvme_setup_rw(ns, req, cmd, nvme_cmd_write); 930 break; 931 case REQ_OP_ZONE_APPEND: 932 ret = nvme_setup_rw(ns, req, cmd, nvme_cmd_zone_append); 933 break; 934 default: 935 WARN_ON_ONCE(1); 936 return BLK_STS_IOERR; 937 } 938 939 cmd->common.command_id = req->tag; 940 trace_nvme_setup_cmd(req, cmd); 941 return ret; 942 } 943 EXPORT_SYMBOL_GPL(nvme_setup_cmd); 944 945 static void nvme_end_sync_rq(struct request *rq, blk_status_t error) 946 { 947 struct completion *waiting = rq->end_io_data; 948 949 rq->end_io_data = NULL; 950 complete(waiting); 951 } 952 953 static void nvme_execute_rq_polled(struct request_queue *q, 954 struct gendisk *bd_disk, struct request *rq, int at_head) 955 { 956 DECLARE_COMPLETION_ONSTACK(wait); 957 958 WARN_ON_ONCE(!test_bit(QUEUE_FLAG_POLL, &q->queue_flags)); 959 960 rq->cmd_flags |= REQ_HIPRI; 961 rq->end_io_data = &wait; 962 blk_execute_rq_nowait(bd_disk, rq, at_head, nvme_end_sync_rq); 963 964 while (!completion_done(&wait)) { 965 blk_poll(q, request_to_qc_t(rq->mq_hctx, rq), true); 966 cond_resched(); 967 } 968 } 969 970 /* 971 * Returns 0 on success. If the result is negative, it's a Linux error code; 972 * if the result is positive, it's an NVM Express status code 973 */ 974 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 975 union nvme_result *result, void *buffer, unsigned bufflen, 976 unsigned timeout, int qid, int at_head, 977 blk_mq_req_flags_t flags, bool poll) 978 { 979 struct request *req; 980 int ret; 981 982 if (qid == NVME_QID_ANY) 983 req = nvme_alloc_request(q, cmd, flags); 984 else 985 req = nvme_alloc_request_qid(q, cmd, flags, qid); 986 if (IS_ERR(req)) 987 return PTR_ERR(req); 988 989 if (timeout) 990 req->timeout = timeout; 991 992 if (buffer && bufflen) { 993 ret = blk_rq_map_kern(q, req, buffer, bufflen, GFP_KERNEL); 994 if (ret) 995 goto out; 996 } 997 998 if (poll) 999 nvme_execute_rq_polled(req->q, NULL, req, at_head); 1000 else 1001 blk_execute_rq(NULL, req, at_head); 1002 if (result) 1003 *result = nvme_req(req)->result; 1004 if (nvme_req(req)->flags & NVME_REQ_CANCELLED) 1005 ret = -EINTR; 1006 else 1007 ret = nvme_req(req)->status; 1008 out: 1009 blk_mq_free_request(req); 1010 return ret; 1011 } 1012 EXPORT_SYMBOL_GPL(__nvme_submit_sync_cmd); 1013 1014 int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 1015 void *buffer, unsigned bufflen) 1016 { 1017 return __nvme_submit_sync_cmd(q, cmd, NULL, buffer, bufflen, 0, 1018 NVME_QID_ANY, 0, 0, false); 1019 } 1020 EXPORT_SYMBOL_GPL(nvme_submit_sync_cmd); 1021 1022 static void *nvme_add_user_metadata(struct bio *bio, void __user *ubuf, 1023 unsigned len, u32 seed, bool write) 1024 { 1025 struct bio_integrity_payload *bip; 1026 int ret = -ENOMEM; 1027 void *buf; 1028 1029 buf = kmalloc(len, GFP_KERNEL); 1030 if (!buf) 1031 goto out; 1032 1033 ret = -EFAULT; 1034 if (write && copy_from_user(buf, ubuf, len)) 1035 goto out_free_meta; 1036 1037 bip = bio_integrity_alloc(bio, GFP_KERNEL, 1); 1038 if (IS_ERR(bip)) { 1039 ret = PTR_ERR(bip); 1040 goto out_free_meta; 1041 } 1042 1043 bip->bip_iter.bi_size = len; 1044 bip->bip_iter.bi_sector = seed; 1045 ret = bio_integrity_add_page(bio, virt_to_page(buf), len, 1046 offset_in_page(buf)); 1047 if (ret == len) 1048 return buf; 1049 ret = -ENOMEM; 1050 out_free_meta: 1051 kfree(buf); 1052 out: 1053 return ERR_PTR(ret); 1054 } 1055 1056 static u32 nvme_known_admin_effects(u8 opcode) 1057 { 1058 switch (opcode) { 1059 case nvme_admin_format_nvm: 1060 return NVME_CMD_EFFECTS_LBCC | NVME_CMD_EFFECTS_NCC | 1061 NVME_CMD_EFFECTS_CSE_MASK; 1062 case nvme_admin_sanitize_nvm: 1063 return NVME_CMD_EFFECTS_LBCC | NVME_CMD_EFFECTS_CSE_MASK; 1064 default: 1065 break; 1066 } 1067 return 0; 1068 } 1069 1070 u32 nvme_command_effects(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u8 opcode) 1071 { 1072 u32 effects = 0; 1073 1074 if (ns) { 1075 if (ns->head->effects) 1076 effects = le32_to_cpu(ns->head->effects->iocs[opcode]); 1077 if (effects & ~(NVME_CMD_EFFECTS_CSUPP | NVME_CMD_EFFECTS_LBCC)) 1078 dev_warn(ctrl->device, 1079 "IO command:%02x has unhandled effects:%08x\n", 1080 opcode, effects); 1081 return 0; 1082 } 1083 1084 if (ctrl->effects) 1085 effects = le32_to_cpu(ctrl->effects->acs[opcode]); 1086 effects |= nvme_known_admin_effects(opcode); 1087 1088 return effects; 1089 } 1090 EXPORT_SYMBOL_NS_GPL(nvme_command_effects, NVME_TARGET_PASSTHRU); 1091 1092 static u32 nvme_passthru_start(struct nvme_ctrl *ctrl, struct nvme_ns *ns, 1093 u8 opcode) 1094 { 1095 u32 effects = nvme_command_effects(ctrl, ns, opcode); 1096 1097 /* 1098 * For simplicity, IO to all namespaces is quiesced even if the command 1099 * effects say only one namespace is affected. 1100 */ 1101 if (effects & NVME_CMD_EFFECTS_CSE_MASK) { 1102 mutex_lock(&ctrl->scan_lock); 1103 mutex_lock(&ctrl->subsys->lock); 1104 nvme_mpath_start_freeze(ctrl->subsys); 1105 nvme_mpath_wait_freeze(ctrl->subsys); 1106 nvme_start_freeze(ctrl); 1107 nvme_wait_freeze(ctrl); 1108 } 1109 return effects; 1110 } 1111 1112 static void nvme_passthru_end(struct nvme_ctrl *ctrl, u32 effects) 1113 { 1114 if (effects & NVME_CMD_EFFECTS_CSE_MASK) { 1115 nvme_unfreeze(ctrl); 1116 nvme_mpath_unfreeze(ctrl->subsys); 1117 mutex_unlock(&ctrl->subsys->lock); 1118 nvme_remove_invalid_namespaces(ctrl, NVME_NSID_ALL); 1119 mutex_unlock(&ctrl->scan_lock); 1120 } 1121 if (effects & NVME_CMD_EFFECTS_CCC) 1122 nvme_init_identify(ctrl); 1123 if (effects & (NVME_CMD_EFFECTS_NIC | NVME_CMD_EFFECTS_NCC)) { 1124 nvme_queue_scan(ctrl); 1125 flush_work(&ctrl->scan_work); 1126 } 1127 } 1128 1129 void nvme_execute_passthru_rq(struct request *rq) 1130 { 1131 struct nvme_command *cmd = nvme_req(rq)->cmd; 1132 struct nvme_ctrl *ctrl = nvme_req(rq)->ctrl; 1133 struct nvme_ns *ns = rq->q->queuedata; 1134 struct gendisk *disk = ns ? ns->disk : NULL; 1135 u32 effects; 1136 1137 effects = nvme_passthru_start(ctrl, ns, cmd->common.opcode); 1138 blk_execute_rq(disk, rq, 0); 1139 nvme_passthru_end(ctrl, effects); 1140 } 1141 EXPORT_SYMBOL_NS_GPL(nvme_execute_passthru_rq, NVME_TARGET_PASSTHRU); 1142 1143 static int nvme_submit_user_cmd(struct request_queue *q, 1144 struct nvme_command *cmd, void __user *ubuffer, 1145 unsigned bufflen, void __user *meta_buffer, unsigned meta_len, 1146 u32 meta_seed, u64 *result, unsigned timeout) 1147 { 1148 bool write = nvme_is_write(cmd); 1149 struct nvme_ns *ns = q->queuedata; 1150 struct block_device *bdev = ns ? ns->disk->part0 : NULL; 1151 struct request *req; 1152 struct bio *bio = NULL; 1153 void *meta = NULL; 1154 int ret; 1155 1156 req = nvme_alloc_request(q, cmd, 0); 1157 if (IS_ERR(req)) 1158 return PTR_ERR(req); 1159 1160 if (timeout) 1161 req->timeout = timeout; 1162 nvme_req(req)->flags |= NVME_REQ_USERCMD; 1163 1164 if (ubuffer && bufflen) { 1165 ret = blk_rq_map_user(q, req, NULL, ubuffer, bufflen, 1166 GFP_KERNEL); 1167 if (ret) 1168 goto out; 1169 bio = req->bio; 1170 if (bdev) 1171 bio_set_dev(bio, bdev); 1172 if (bdev && meta_buffer && meta_len) { 1173 meta = nvme_add_user_metadata(bio, meta_buffer, meta_len, 1174 meta_seed, write); 1175 if (IS_ERR(meta)) { 1176 ret = PTR_ERR(meta); 1177 goto out_unmap; 1178 } 1179 req->cmd_flags |= REQ_INTEGRITY; 1180 } 1181 } 1182 1183 nvme_execute_passthru_rq(req); 1184 if (nvme_req(req)->flags & NVME_REQ_CANCELLED) 1185 ret = -EINTR; 1186 else 1187 ret = nvme_req(req)->status; 1188 if (result) 1189 *result = le64_to_cpu(nvme_req(req)->result.u64); 1190 if (meta && !ret && !write) { 1191 if (copy_to_user(meta_buffer, meta, meta_len)) 1192 ret = -EFAULT; 1193 } 1194 kfree(meta); 1195 out_unmap: 1196 if (bio) 1197 blk_rq_unmap_user(bio); 1198 out: 1199 blk_mq_free_request(req); 1200 return ret; 1201 } 1202 1203 static void nvme_keep_alive_end_io(struct request *rq, blk_status_t status) 1204 { 1205 struct nvme_ctrl *ctrl = rq->end_io_data; 1206 unsigned long flags; 1207 bool startka = false; 1208 1209 blk_mq_free_request(rq); 1210 1211 if (status) { 1212 dev_err(ctrl->device, 1213 "failed nvme_keep_alive_end_io error=%d\n", 1214 status); 1215 return; 1216 } 1217 1218 ctrl->comp_seen = false; 1219 spin_lock_irqsave(&ctrl->lock, flags); 1220 if (ctrl->state == NVME_CTRL_LIVE || 1221 ctrl->state == NVME_CTRL_CONNECTING) 1222 startka = true; 1223 spin_unlock_irqrestore(&ctrl->lock, flags); 1224 if (startka) 1225 queue_delayed_work(nvme_wq, &ctrl->ka_work, ctrl->kato * HZ); 1226 } 1227 1228 static int nvme_keep_alive(struct nvme_ctrl *ctrl) 1229 { 1230 struct request *rq; 1231 1232 rq = nvme_alloc_request(ctrl->admin_q, &ctrl->ka_cmd, 1233 BLK_MQ_REQ_RESERVED); 1234 if (IS_ERR(rq)) 1235 return PTR_ERR(rq); 1236 1237 rq->timeout = ctrl->kato * HZ; 1238 rq->end_io_data = ctrl; 1239 1240 blk_execute_rq_nowait(NULL, rq, 0, nvme_keep_alive_end_io); 1241 1242 return 0; 1243 } 1244 1245 static void nvme_keep_alive_work(struct work_struct *work) 1246 { 1247 struct nvme_ctrl *ctrl = container_of(to_delayed_work(work), 1248 struct nvme_ctrl, ka_work); 1249 bool comp_seen = ctrl->comp_seen; 1250 1251 if ((ctrl->ctratt & NVME_CTRL_ATTR_TBKAS) && comp_seen) { 1252 dev_dbg(ctrl->device, 1253 "reschedule traffic based keep-alive timer\n"); 1254 ctrl->comp_seen = false; 1255 queue_delayed_work(nvme_wq, &ctrl->ka_work, ctrl->kato * HZ); 1256 return; 1257 } 1258 1259 if (nvme_keep_alive(ctrl)) { 1260 /* allocation failure, reset the controller */ 1261 dev_err(ctrl->device, "keep-alive failed\n"); 1262 nvme_reset_ctrl(ctrl); 1263 return; 1264 } 1265 } 1266 1267 static void nvme_start_keep_alive(struct nvme_ctrl *ctrl) 1268 { 1269 if (unlikely(ctrl->kato == 0)) 1270 return; 1271 1272 queue_delayed_work(nvme_wq, &ctrl->ka_work, ctrl->kato * HZ); 1273 } 1274 1275 void nvme_stop_keep_alive(struct nvme_ctrl *ctrl) 1276 { 1277 if (unlikely(ctrl->kato == 0)) 1278 return; 1279 1280 cancel_delayed_work_sync(&ctrl->ka_work); 1281 } 1282 EXPORT_SYMBOL_GPL(nvme_stop_keep_alive); 1283 1284 /* 1285 * In NVMe 1.0 the CNS field was just a binary controller or namespace 1286 * flag, thus sending any new CNS opcodes has a big chance of not working. 1287 * Qemu unfortunately had that bug after reporting a 1.1 version compliance 1288 * (but not for any later version). 1289 */ 1290 static bool nvme_ctrl_limited_cns(struct nvme_ctrl *ctrl) 1291 { 1292 if (ctrl->quirks & NVME_QUIRK_IDENTIFY_CNS) 1293 return ctrl->vs < NVME_VS(1, 2, 0); 1294 return ctrl->vs < NVME_VS(1, 1, 0); 1295 } 1296 1297 static int nvme_identify_ctrl(struct nvme_ctrl *dev, struct nvme_id_ctrl **id) 1298 { 1299 struct nvme_command c = { }; 1300 int error; 1301 1302 /* gcc-4.4.4 (at least) has issues with initializers and anon unions */ 1303 c.identify.opcode = nvme_admin_identify; 1304 c.identify.cns = NVME_ID_CNS_CTRL; 1305 1306 *id = kmalloc(sizeof(struct nvme_id_ctrl), GFP_KERNEL); 1307 if (!*id) 1308 return -ENOMEM; 1309 1310 error = nvme_submit_sync_cmd(dev->admin_q, &c, *id, 1311 sizeof(struct nvme_id_ctrl)); 1312 if (error) 1313 kfree(*id); 1314 return error; 1315 } 1316 1317 static bool nvme_multi_css(struct nvme_ctrl *ctrl) 1318 { 1319 return (ctrl->ctrl_config & NVME_CC_CSS_MASK) == NVME_CC_CSS_CSI; 1320 } 1321 1322 static int nvme_process_ns_desc(struct nvme_ctrl *ctrl, struct nvme_ns_ids *ids, 1323 struct nvme_ns_id_desc *cur, bool *csi_seen) 1324 { 1325 const char *warn_str = "ctrl returned bogus length:"; 1326 void *data = cur; 1327 1328 switch (cur->nidt) { 1329 case NVME_NIDT_EUI64: 1330 if (cur->nidl != NVME_NIDT_EUI64_LEN) { 1331 dev_warn(ctrl->device, "%s %d for NVME_NIDT_EUI64\n", 1332 warn_str, cur->nidl); 1333 return -1; 1334 } 1335 memcpy(ids->eui64, data + sizeof(*cur), NVME_NIDT_EUI64_LEN); 1336 return NVME_NIDT_EUI64_LEN; 1337 case NVME_NIDT_NGUID: 1338 if (cur->nidl != NVME_NIDT_NGUID_LEN) { 1339 dev_warn(ctrl->device, "%s %d for NVME_NIDT_NGUID\n", 1340 warn_str, cur->nidl); 1341 return -1; 1342 } 1343 memcpy(ids->nguid, data + sizeof(*cur), NVME_NIDT_NGUID_LEN); 1344 return NVME_NIDT_NGUID_LEN; 1345 case NVME_NIDT_UUID: 1346 if (cur->nidl != NVME_NIDT_UUID_LEN) { 1347 dev_warn(ctrl->device, "%s %d for NVME_NIDT_UUID\n", 1348 warn_str, cur->nidl); 1349 return -1; 1350 } 1351 uuid_copy(&ids->uuid, data + sizeof(*cur)); 1352 return NVME_NIDT_UUID_LEN; 1353 case NVME_NIDT_CSI: 1354 if (cur->nidl != NVME_NIDT_CSI_LEN) { 1355 dev_warn(ctrl->device, "%s %d for NVME_NIDT_CSI\n", 1356 warn_str, cur->nidl); 1357 return -1; 1358 } 1359 memcpy(&ids->csi, data + sizeof(*cur), NVME_NIDT_CSI_LEN); 1360 *csi_seen = true; 1361 return NVME_NIDT_CSI_LEN; 1362 default: 1363 /* Skip unknown types */ 1364 return cur->nidl; 1365 } 1366 } 1367 1368 static int nvme_identify_ns_descs(struct nvme_ctrl *ctrl, unsigned nsid, 1369 struct nvme_ns_ids *ids) 1370 { 1371 struct nvme_command c = { }; 1372 bool csi_seen = false; 1373 int status, pos, len; 1374 void *data; 1375 1376 if (ctrl->vs < NVME_VS(1, 3, 0) && !nvme_multi_css(ctrl)) 1377 return 0; 1378 if (ctrl->quirks & NVME_QUIRK_NO_NS_DESC_LIST) 1379 return 0; 1380 1381 c.identify.opcode = nvme_admin_identify; 1382 c.identify.nsid = cpu_to_le32(nsid); 1383 c.identify.cns = NVME_ID_CNS_NS_DESC_LIST; 1384 1385 data = kzalloc(NVME_IDENTIFY_DATA_SIZE, GFP_KERNEL); 1386 if (!data) 1387 return -ENOMEM; 1388 1389 status = nvme_submit_sync_cmd(ctrl->admin_q, &c, data, 1390 NVME_IDENTIFY_DATA_SIZE); 1391 if (status) { 1392 dev_warn(ctrl->device, 1393 "Identify Descriptors failed (nsid=%u, status=0x%x)\n", 1394 nsid, status); 1395 goto free_data; 1396 } 1397 1398 for (pos = 0; pos < NVME_IDENTIFY_DATA_SIZE; pos += len) { 1399 struct nvme_ns_id_desc *cur = data + pos; 1400 1401 if (cur->nidl == 0) 1402 break; 1403 1404 len = nvme_process_ns_desc(ctrl, ids, cur, &csi_seen); 1405 if (len < 0) 1406 break; 1407 1408 len += sizeof(*cur); 1409 } 1410 1411 if (nvme_multi_css(ctrl) && !csi_seen) { 1412 dev_warn(ctrl->device, "Command set not reported for nsid:%d\n", 1413 nsid); 1414 status = -EINVAL; 1415 } 1416 1417 free_data: 1418 kfree(data); 1419 return status; 1420 } 1421 1422 static int nvme_identify_ns(struct nvme_ctrl *ctrl, unsigned nsid, 1423 struct nvme_ns_ids *ids, struct nvme_id_ns **id) 1424 { 1425 struct nvme_command c = { }; 1426 int error; 1427 1428 /* gcc-4.4.4 (at least) has issues with initializers and anon unions */ 1429 c.identify.opcode = nvme_admin_identify; 1430 c.identify.nsid = cpu_to_le32(nsid); 1431 c.identify.cns = NVME_ID_CNS_NS; 1432 1433 *id = kmalloc(sizeof(**id), GFP_KERNEL); 1434 if (!*id) 1435 return -ENOMEM; 1436 1437 error = nvme_submit_sync_cmd(ctrl->admin_q, &c, *id, sizeof(**id)); 1438 if (error) { 1439 dev_warn(ctrl->device, "Identify namespace failed (%d)\n", error); 1440 goto out_free_id; 1441 } 1442 1443 error = -ENODEV; 1444 if ((*id)->ncap == 0) /* namespace not allocated or attached */ 1445 goto out_free_id; 1446 1447 if (ctrl->vs >= NVME_VS(1, 1, 0) && 1448 !memchr_inv(ids->eui64, 0, sizeof(ids->eui64))) 1449 memcpy(ids->eui64, (*id)->eui64, sizeof(ids->eui64)); 1450 if (ctrl->vs >= NVME_VS(1, 2, 0) && 1451 !memchr_inv(ids->nguid, 0, sizeof(ids->nguid))) 1452 memcpy(ids->nguid, (*id)->nguid, sizeof(ids->nguid)); 1453 1454 return 0; 1455 1456 out_free_id: 1457 kfree(*id); 1458 return error; 1459 } 1460 1461 static int nvme_features(struct nvme_ctrl *dev, u8 op, unsigned int fid, 1462 unsigned int dword11, void *buffer, size_t buflen, u32 *result) 1463 { 1464 union nvme_result res = { 0 }; 1465 struct nvme_command c; 1466 int ret; 1467 1468 memset(&c, 0, sizeof(c)); 1469 c.features.opcode = op; 1470 c.features.fid = cpu_to_le32(fid); 1471 c.features.dword11 = cpu_to_le32(dword11); 1472 1473 ret = __nvme_submit_sync_cmd(dev->admin_q, &c, &res, 1474 buffer, buflen, 0, NVME_QID_ANY, 0, 0, false); 1475 if (ret >= 0 && result) 1476 *result = le32_to_cpu(res.u32); 1477 return ret; 1478 } 1479 1480 int nvme_set_features(struct nvme_ctrl *dev, unsigned int fid, 1481 unsigned int dword11, void *buffer, size_t buflen, 1482 u32 *result) 1483 { 1484 return nvme_features(dev, nvme_admin_set_features, fid, dword11, buffer, 1485 buflen, result); 1486 } 1487 EXPORT_SYMBOL_GPL(nvme_set_features); 1488 1489 int nvme_get_features(struct nvme_ctrl *dev, unsigned int fid, 1490 unsigned int dword11, void *buffer, size_t buflen, 1491 u32 *result) 1492 { 1493 return nvme_features(dev, nvme_admin_get_features, fid, dword11, buffer, 1494 buflen, result); 1495 } 1496 EXPORT_SYMBOL_GPL(nvme_get_features); 1497 1498 int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count) 1499 { 1500 u32 q_count = (*count - 1) | ((*count - 1) << 16); 1501 u32 result; 1502 int status, nr_io_queues; 1503 1504 status = nvme_set_features(ctrl, NVME_FEAT_NUM_QUEUES, q_count, NULL, 0, 1505 &result); 1506 if (status < 0) 1507 return status; 1508 1509 /* 1510 * Degraded controllers might return an error when setting the queue 1511 * count. We still want to be able to bring them online and offer 1512 * access to the admin queue, as that might be only way to fix them up. 1513 */ 1514 if (status > 0) { 1515 dev_err(ctrl->device, "Could not set queue count (%d)\n", status); 1516 *count = 0; 1517 } else { 1518 nr_io_queues = min(result & 0xffff, result >> 16) + 1; 1519 *count = min(*count, nr_io_queues); 1520 } 1521 1522 return 0; 1523 } 1524 EXPORT_SYMBOL_GPL(nvme_set_queue_count); 1525 1526 #define NVME_AEN_SUPPORTED \ 1527 (NVME_AEN_CFG_NS_ATTR | NVME_AEN_CFG_FW_ACT | \ 1528 NVME_AEN_CFG_ANA_CHANGE | NVME_AEN_CFG_DISC_CHANGE) 1529 1530 static void nvme_enable_aen(struct nvme_ctrl *ctrl) 1531 { 1532 u32 result, supported_aens = ctrl->oaes & NVME_AEN_SUPPORTED; 1533 int status; 1534 1535 if (!supported_aens) 1536 return; 1537 1538 status = nvme_set_features(ctrl, NVME_FEAT_ASYNC_EVENT, supported_aens, 1539 NULL, 0, &result); 1540 if (status) 1541 dev_warn(ctrl->device, "Failed to configure AEN (cfg %x)\n", 1542 supported_aens); 1543 1544 queue_work(nvme_wq, &ctrl->async_event_work); 1545 } 1546 1547 /* 1548 * Convert integer values from ioctl structures to user pointers, silently 1549 * ignoring the upper bits in the compat case to match behaviour of 32-bit 1550 * kernels. 1551 */ 1552 static void __user *nvme_to_user_ptr(uintptr_t ptrval) 1553 { 1554 if (in_compat_syscall()) 1555 ptrval = (compat_uptr_t)ptrval; 1556 return (void __user *)ptrval; 1557 } 1558 1559 static int nvme_submit_io(struct nvme_ns *ns, struct nvme_user_io __user *uio) 1560 { 1561 struct nvme_user_io io; 1562 struct nvme_command c; 1563 unsigned length, meta_len; 1564 void __user *metadata; 1565 1566 if (copy_from_user(&io, uio, sizeof(io))) 1567 return -EFAULT; 1568 if (io.flags) 1569 return -EINVAL; 1570 1571 switch (io.opcode) { 1572 case nvme_cmd_write: 1573 case nvme_cmd_read: 1574 case nvme_cmd_compare: 1575 break; 1576 default: 1577 return -EINVAL; 1578 } 1579 1580 length = (io.nblocks + 1) << ns->lba_shift; 1581 1582 if ((io.control & NVME_RW_PRINFO_PRACT) && 1583 ns->ms == sizeof(struct t10_pi_tuple)) { 1584 /* 1585 * Protection information is stripped/inserted by the 1586 * controller. 1587 */ 1588 if (nvme_to_user_ptr(io.metadata)) 1589 return -EINVAL; 1590 meta_len = 0; 1591 metadata = NULL; 1592 } else { 1593 meta_len = (io.nblocks + 1) * ns->ms; 1594 metadata = nvme_to_user_ptr(io.metadata); 1595 } 1596 1597 if (ns->features & NVME_NS_EXT_LBAS) { 1598 length += meta_len; 1599 meta_len = 0; 1600 } else if (meta_len) { 1601 if ((io.metadata & 3) || !io.metadata) 1602 return -EINVAL; 1603 } 1604 1605 memset(&c, 0, sizeof(c)); 1606 c.rw.opcode = io.opcode; 1607 c.rw.flags = io.flags; 1608 c.rw.nsid = cpu_to_le32(ns->head->ns_id); 1609 c.rw.slba = cpu_to_le64(io.slba); 1610 c.rw.length = cpu_to_le16(io.nblocks); 1611 c.rw.control = cpu_to_le16(io.control); 1612 c.rw.dsmgmt = cpu_to_le32(io.dsmgmt); 1613 c.rw.reftag = cpu_to_le32(io.reftag); 1614 c.rw.apptag = cpu_to_le16(io.apptag); 1615 c.rw.appmask = cpu_to_le16(io.appmask); 1616 1617 return nvme_submit_user_cmd(ns->queue, &c, 1618 nvme_to_user_ptr(io.addr), length, 1619 metadata, meta_len, lower_32_bits(io.slba), NULL, 0); 1620 } 1621 1622 static int nvme_user_cmd(struct nvme_ctrl *ctrl, struct nvme_ns *ns, 1623 struct nvme_passthru_cmd __user *ucmd) 1624 { 1625 struct nvme_passthru_cmd cmd; 1626 struct nvme_command c; 1627 unsigned timeout = 0; 1628 u64 result; 1629 int status; 1630 1631 if (!capable(CAP_SYS_ADMIN)) 1632 return -EACCES; 1633 if (copy_from_user(&cmd, ucmd, sizeof(cmd))) 1634 return -EFAULT; 1635 if (cmd.flags) 1636 return -EINVAL; 1637 1638 memset(&c, 0, sizeof(c)); 1639 c.common.opcode = cmd.opcode; 1640 c.common.flags = cmd.flags; 1641 c.common.nsid = cpu_to_le32(cmd.nsid); 1642 c.common.cdw2[0] = cpu_to_le32(cmd.cdw2); 1643 c.common.cdw2[1] = cpu_to_le32(cmd.cdw3); 1644 c.common.cdw10 = cpu_to_le32(cmd.cdw10); 1645 c.common.cdw11 = cpu_to_le32(cmd.cdw11); 1646 c.common.cdw12 = cpu_to_le32(cmd.cdw12); 1647 c.common.cdw13 = cpu_to_le32(cmd.cdw13); 1648 c.common.cdw14 = cpu_to_le32(cmd.cdw14); 1649 c.common.cdw15 = cpu_to_le32(cmd.cdw15); 1650 1651 if (cmd.timeout_ms) 1652 timeout = msecs_to_jiffies(cmd.timeout_ms); 1653 1654 status = nvme_submit_user_cmd(ns ? ns->queue : ctrl->admin_q, &c, 1655 nvme_to_user_ptr(cmd.addr), cmd.data_len, 1656 nvme_to_user_ptr(cmd.metadata), cmd.metadata_len, 1657 0, &result, timeout); 1658 1659 if (status >= 0) { 1660 if (put_user(result, &ucmd->result)) 1661 return -EFAULT; 1662 } 1663 1664 return status; 1665 } 1666 1667 static int nvme_user_cmd64(struct nvme_ctrl *ctrl, struct nvme_ns *ns, 1668 struct nvme_passthru_cmd64 __user *ucmd) 1669 { 1670 struct nvme_passthru_cmd64 cmd; 1671 struct nvme_command c; 1672 unsigned timeout = 0; 1673 int status; 1674 1675 if (!capable(CAP_SYS_ADMIN)) 1676 return -EACCES; 1677 if (copy_from_user(&cmd, ucmd, sizeof(cmd))) 1678 return -EFAULT; 1679 if (cmd.flags) 1680 return -EINVAL; 1681 1682 memset(&c, 0, sizeof(c)); 1683 c.common.opcode = cmd.opcode; 1684 c.common.flags = cmd.flags; 1685 c.common.nsid = cpu_to_le32(cmd.nsid); 1686 c.common.cdw2[0] = cpu_to_le32(cmd.cdw2); 1687 c.common.cdw2[1] = cpu_to_le32(cmd.cdw3); 1688 c.common.cdw10 = cpu_to_le32(cmd.cdw10); 1689 c.common.cdw11 = cpu_to_le32(cmd.cdw11); 1690 c.common.cdw12 = cpu_to_le32(cmd.cdw12); 1691 c.common.cdw13 = cpu_to_le32(cmd.cdw13); 1692 c.common.cdw14 = cpu_to_le32(cmd.cdw14); 1693 c.common.cdw15 = cpu_to_le32(cmd.cdw15); 1694 1695 if (cmd.timeout_ms) 1696 timeout = msecs_to_jiffies(cmd.timeout_ms); 1697 1698 status = nvme_submit_user_cmd(ns ? ns->queue : ctrl->admin_q, &c, 1699 nvme_to_user_ptr(cmd.addr), cmd.data_len, 1700 nvme_to_user_ptr(cmd.metadata), cmd.metadata_len, 1701 0, &cmd.result, timeout); 1702 1703 if (status >= 0) { 1704 if (put_user(cmd.result, &ucmd->result)) 1705 return -EFAULT; 1706 } 1707 1708 return status; 1709 } 1710 1711 /* 1712 * Issue ioctl requests on the first available path. Note that unlike normal 1713 * block layer requests we will not retry failed request on another controller. 1714 */ 1715 struct nvme_ns *nvme_get_ns_from_disk(struct gendisk *disk, 1716 struct nvme_ns_head **head, int *srcu_idx) 1717 { 1718 #ifdef CONFIG_NVME_MULTIPATH 1719 if (disk->fops == &nvme_ns_head_ops) { 1720 struct nvme_ns *ns; 1721 1722 *head = disk->private_data; 1723 *srcu_idx = srcu_read_lock(&(*head)->srcu); 1724 ns = nvme_find_path(*head); 1725 if (!ns) 1726 srcu_read_unlock(&(*head)->srcu, *srcu_idx); 1727 return ns; 1728 } 1729 #endif 1730 *head = NULL; 1731 *srcu_idx = -1; 1732 return disk->private_data; 1733 } 1734 1735 void nvme_put_ns_from_disk(struct nvme_ns_head *head, int idx) 1736 { 1737 if (head) 1738 srcu_read_unlock(&head->srcu, idx); 1739 } 1740 1741 static bool is_ctrl_ioctl(unsigned int cmd) 1742 { 1743 if (cmd == NVME_IOCTL_ADMIN_CMD || cmd == NVME_IOCTL_ADMIN64_CMD) 1744 return true; 1745 if (is_sed_ioctl(cmd)) 1746 return true; 1747 return false; 1748 } 1749 1750 static int nvme_handle_ctrl_ioctl(struct nvme_ns *ns, unsigned int cmd, 1751 void __user *argp, 1752 struct nvme_ns_head *head, 1753 int srcu_idx) 1754 { 1755 struct nvme_ctrl *ctrl = ns->ctrl; 1756 int ret; 1757 1758 nvme_get_ctrl(ns->ctrl); 1759 nvme_put_ns_from_disk(head, srcu_idx); 1760 1761 switch (cmd) { 1762 case NVME_IOCTL_ADMIN_CMD: 1763 ret = nvme_user_cmd(ctrl, NULL, argp); 1764 break; 1765 case NVME_IOCTL_ADMIN64_CMD: 1766 ret = nvme_user_cmd64(ctrl, NULL, argp); 1767 break; 1768 default: 1769 ret = sed_ioctl(ctrl->opal_dev, cmd, argp); 1770 break; 1771 } 1772 nvme_put_ctrl(ctrl); 1773 return ret; 1774 } 1775 1776 static int nvme_ioctl(struct block_device *bdev, fmode_t mode, 1777 unsigned int cmd, unsigned long arg) 1778 { 1779 struct nvme_ns_head *head = NULL; 1780 void __user *argp = (void __user *)arg; 1781 struct nvme_ns *ns; 1782 int srcu_idx, ret; 1783 1784 ns = nvme_get_ns_from_disk(bdev->bd_disk, &head, &srcu_idx); 1785 if (unlikely(!ns)) 1786 return -EWOULDBLOCK; 1787 1788 /* 1789 * Handle ioctls that apply to the controller instead of the namespace 1790 * seperately and drop the ns SRCU reference early. This avoids a 1791 * deadlock when deleting namespaces using the passthrough interface. 1792 */ 1793 if (is_ctrl_ioctl(cmd)) 1794 return nvme_handle_ctrl_ioctl(ns, cmd, argp, head, srcu_idx); 1795 1796 switch (cmd) { 1797 case NVME_IOCTL_ID: 1798 force_successful_syscall_return(); 1799 ret = ns->head->ns_id; 1800 break; 1801 case NVME_IOCTL_IO_CMD: 1802 ret = nvme_user_cmd(ns->ctrl, ns, argp); 1803 break; 1804 case NVME_IOCTL_SUBMIT_IO: 1805 ret = nvme_submit_io(ns, argp); 1806 break; 1807 case NVME_IOCTL_IO64_CMD: 1808 ret = nvme_user_cmd64(ns->ctrl, ns, argp); 1809 break; 1810 default: 1811 if (ns->ndev) 1812 ret = nvme_nvm_ioctl(ns, cmd, arg); 1813 else 1814 ret = -ENOTTY; 1815 } 1816 1817 nvme_put_ns_from_disk(head, srcu_idx); 1818 return ret; 1819 } 1820 1821 #ifdef CONFIG_COMPAT 1822 struct nvme_user_io32 { 1823 __u8 opcode; 1824 __u8 flags; 1825 __u16 control; 1826 __u16 nblocks; 1827 __u16 rsvd; 1828 __u64 metadata; 1829 __u64 addr; 1830 __u64 slba; 1831 __u32 dsmgmt; 1832 __u32 reftag; 1833 __u16 apptag; 1834 __u16 appmask; 1835 } __attribute__((__packed__)); 1836 1837 #define NVME_IOCTL_SUBMIT_IO32 _IOW('N', 0x42, struct nvme_user_io32) 1838 1839 static int nvme_compat_ioctl(struct block_device *bdev, fmode_t mode, 1840 unsigned int cmd, unsigned long arg) 1841 { 1842 /* 1843 * Corresponds to the difference of NVME_IOCTL_SUBMIT_IO 1844 * between 32 bit programs and 64 bit kernel. 1845 * The cause is that the results of sizeof(struct nvme_user_io), 1846 * which is used to define NVME_IOCTL_SUBMIT_IO, 1847 * are not same between 32 bit compiler and 64 bit compiler. 1848 * NVME_IOCTL_SUBMIT_IO32 is for 64 bit kernel handling 1849 * NVME_IOCTL_SUBMIT_IO issued from 32 bit programs. 1850 * Other IOCTL numbers are same between 32 bit and 64 bit. 1851 * So there is nothing to do regarding to other IOCTL numbers. 1852 */ 1853 if (cmd == NVME_IOCTL_SUBMIT_IO32) 1854 return nvme_ioctl(bdev, mode, NVME_IOCTL_SUBMIT_IO, arg); 1855 1856 return nvme_ioctl(bdev, mode, cmd, arg); 1857 } 1858 #else 1859 #define nvme_compat_ioctl NULL 1860 #endif /* CONFIG_COMPAT */ 1861 1862 static int nvme_open(struct block_device *bdev, fmode_t mode) 1863 { 1864 struct nvme_ns *ns = bdev->bd_disk->private_data; 1865 1866 #ifdef CONFIG_NVME_MULTIPATH 1867 /* should never be called due to GENHD_FL_HIDDEN */ 1868 if (WARN_ON_ONCE(ns->head->disk)) 1869 goto fail; 1870 #endif 1871 if (!kref_get_unless_zero(&ns->kref)) 1872 goto fail; 1873 if (!try_module_get(ns->ctrl->ops->module)) 1874 goto fail_put_ns; 1875 1876 return 0; 1877 1878 fail_put_ns: 1879 nvme_put_ns(ns); 1880 fail: 1881 return -ENXIO; 1882 } 1883 1884 static void nvme_release(struct gendisk *disk, fmode_t mode) 1885 { 1886 struct nvme_ns *ns = disk->private_data; 1887 1888 module_put(ns->ctrl->ops->module); 1889 nvme_put_ns(ns); 1890 } 1891 1892 static int nvme_getgeo(struct block_device *bdev, struct hd_geometry *geo) 1893 { 1894 /* some standard values */ 1895 geo->heads = 1 << 6; 1896 geo->sectors = 1 << 5; 1897 geo->cylinders = get_capacity(bdev->bd_disk) >> 11; 1898 return 0; 1899 } 1900 1901 #ifdef CONFIG_BLK_DEV_INTEGRITY 1902 static void nvme_init_integrity(struct gendisk *disk, u16 ms, u8 pi_type, 1903 u32 max_integrity_segments) 1904 { 1905 struct blk_integrity integrity; 1906 1907 memset(&integrity, 0, sizeof(integrity)); 1908 switch (pi_type) { 1909 case NVME_NS_DPS_PI_TYPE3: 1910 integrity.profile = &t10_pi_type3_crc; 1911 integrity.tag_size = sizeof(u16) + sizeof(u32); 1912 integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE; 1913 break; 1914 case NVME_NS_DPS_PI_TYPE1: 1915 case NVME_NS_DPS_PI_TYPE2: 1916 integrity.profile = &t10_pi_type1_crc; 1917 integrity.tag_size = sizeof(u16); 1918 integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE; 1919 break; 1920 default: 1921 integrity.profile = NULL; 1922 break; 1923 } 1924 integrity.tuple_size = ms; 1925 blk_integrity_register(disk, &integrity); 1926 blk_queue_max_integrity_segments(disk->queue, max_integrity_segments); 1927 } 1928 #else 1929 static void nvme_init_integrity(struct gendisk *disk, u16 ms, u8 pi_type, 1930 u32 max_integrity_segments) 1931 { 1932 } 1933 #endif /* CONFIG_BLK_DEV_INTEGRITY */ 1934 1935 static void nvme_config_discard(struct gendisk *disk, struct nvme_ns *ns) 1936 { 1937 struct nvme_ctrl *ctrl = ns->ctrl; 1938 struct request_queue *queue = disk->queue; 1939 u32 size = queue_logical_block_size(queue); 1940 1941 if (!(ctrl->oncs & NVME_CTRL_ONCS_DSM)) { 1942 blk_queue_flag_clear(QUEUE_FLAG_DISCARD, queue); 1943 return; 1944 } 1945 1946 if (ctrl->nr_streams && ns->sws && ns->sgs) 1947 size *= ns->sws * ns->sgs; 1948 1949 BUILD_BUG_ON(PAGE_SIZE / sizeof(struct nvme_dsm_range) < 1950 NVME_DSM_MAX_RANGES); 1951 1952 queue->limits.discard_alignment = 0; 1953 queue->limits.discard_granularity = size; 1954 1955 /* If discard is already enabled, don't reset queue limits */ 1956 if (blk_queue_flag_test_and_set(QUEUE_FLAG_DISCARD, queue)) 1957 return; 1958 1959 blk_queue_max_discard_sectors(queue, UINT_MAX); 1960 blk_queue_max_discard_segments(queue, NVME_DSM_MAX_RANGES); 1961 1962 if (ctrl->quirks & NVME_QUIRK_DEALLOCATE_ZEROES) 1963 blk_queue_max_write_zeroes_sectors(queue, UINT_MAX); 1964 } 1965 1966 static void nvme_config_write_zeroes(struct gendisk *disk, struct nvme_ns *ns) 1967 { 1968 u64 max_blocks; 1969 1970 if (!(ns->ctrl->oncs & NVME_CTRL_ONCS_WRITE_ZEROES) || 1971 (ns->ctrl->quirks & NVME_QUIRK_DISABLE_WRITE_ZEROES)) 1972 return; 1973 /* 1974 * Even though NVMe spec explicitly states that MDTS is not 1975 * applicable to the write-zeroes:- "The restriction does not apply to 1976 * commands that do not transfer data between the host and the 1977 * controller (e.g., Write Uncorrectable ro Write Zeroes command).". 1978 * In order to be more cautious use controller's max_hw_sectors value 1979 * to configure the maximum sectors for the write-zeroes which is 1980 * configured based on the controller's MDTS field in the 1981 * nvme_init_identify() if available. 1982 */ 1983 if (ns->ctrl->max_hw_sectors == UINT_MAX) 1984 max_blocks = (u64)USHRT_MAX + 1; 1985 else 1986 max_blocks = ns->ctrl->max_hw_sectors + 1; 1987 1988 blk_queue_max_write_zeroes_sectors(disk->queue, 1989 nvme_lba_to_sect(ns, max_blocks)); 1990 } 1991 1992 static bool nvme_ns_ids_valid(struct nvme_ns_ids *ids) 1993 { 1994 return !uuid_is_null(&ids->uuid) || 1995 memchr_inv(ids->nguid, 0, sizeof(ids->nguid)) || 1996 memchr_inv(ids->eui64, 0, sizeof(ids->eui64)); 1997 } 1998 1999 static bool nvme_ns_ids_equal(struct nvme_ns_ids *a, struct nvme_ns_ids *b) 2000 { 2001 return uuid_equal(&a->uuid, &b->uuid) && 2002 memcmp(&a->nguid, &b->nguid, sizeof(a->nguid)) == 0 && 2003 memcmp(&a->eui64, &b->eui64, sizeof(a->eui64)) == 0 && 2004 a->csi == b->csi; 2005 } 2006 2007 static int nvme_setup_streams_ns(struct nvme_ctrl *ctrl, struct nvme_ns *ns, 2008 u32 *phys_bs, u32 *io_opt) 2009 { 2010 struct streams_directive_params s; 2011 int ret; 2012 2013 if (!ctrl->nr_streams) 2014 return 0; 2015 2016 ret = nvme_get_stream_params(ctrl, &s, ns->head->ns_id); 2017 if (ret) 2018 return ret; 2019 2020 ns->sws = le32_to_cpu(s.sws); 2021 ns->sgs = le16_to_cpu(s.sgs); 2022 2023 if (ns->sws) { 2024 *phys_bs = ns->sws * (1 << ns->lba_shift); 2025 if (ns->sgs) 2026 *io_opt = *phys_bs * ns->sgs; 2027 } 2028 2029 return 0; 2030 } 2031 2032 static int nvme_configure_metadata(struct nvme_ns *ns, struct nvme_id_ns *id) 2033 { 2034 struct nvme_ctrl *ctrl = ns->ctrl; 2035 2036 /* 2037 * The PI implementation requires the metadata size to be equal to the 2038 * t10 pi tuple size. 2039 */ 2040 ns->ms = le16_to_cpu(id->lbaf[id->flbas & NVME_NS_FLBAS_LBA_MASK].ms); 2041 if (ns->ms == sizeof(struct t10_pi_tuple)) 2042 ns->pi_type = id->dps & NVME_NS_DPS_PI_MASK; 2043 else 2044 ns->pi_type = 0; 2045 2046 ns->features &= ~(NVME_NS_METADATA_SUPPORTED | NVME_NS_EXT_LBAS); 2047 if (!ns->ms || !(ctrl->ops->flags & NVME_F_METADATA_SUPPORTED)) 2048 return 0; 2049 if (ctrl->ops->flags & NVME_F_FABRICS) { 2050 /* 2051 * The NVMe over Fabrics specification only supports metadata as 2052 * part of the extended data LBA. We rely on HCA/HBA support to 2053 * remap the separate metadata buffer from the block layer. 2054 */ 2055 if (WARN_ON_ONCE(!(id->flbas & NVME_NS_FLBAS_META_EXT))) 2056 return -EINVAL; 2057 if (ctrl->max_integrity_segments) 2058 ns->features |= 2059 (NVME_NS_METADATA_SUPPORTED | NVME_NS_EXT_LBAS); 2060 } else { 2061 /* 2062 * For PCIe controllers, we can't easily remap the separate 2063 * metadata buffer from the block layer and thus require a 2064 * separate metadata buffer for block layer metadata/PI support. 2065 * We allow extended LBAs for the passthrough interface, though. 2066 */ 2067 if (id->flbas & NVME_NS_FLBAS_META_EXT) 2068 ns->features |= NVME_NS_EXT_LBAS; 2069 else 2070 ns->features |= NVME_NS_METADATA_SUPPORTED; 2071 } 2072 2073 return 0; 2074 } 2075 2076 static void nvme_set_queue_limits(struct nvme_ctrl *ctrl, 2077 struct request_queue *q) 2078 { 2079 bool vwc = ctrl->vwc & NVME_CTRL_VWC_PRESENT; 2080 2081 if (ctrl->max_hw_sectors) { 2082 u32 max_segments = 2083 (ctrl->max_hw_sectors / (NVME_CTRL_PAGE_SIZE >> 9)) + 1; 2084 2085 max_segments = min_not_zero(max_segments, ctrl->max_segments); 2086 blk_queue_max_hw_sectors(q, ctrl->max_hw_sectors); 2087 blk_queue_max_segments(q, min_t(u32, max_segments, USHRT_MAX)); 2088 } 2089 blk_queue_virt_boundary(q, NVME_CTRL_PAGE_SIZE - 1); 2090 blk_queue_dma_alignment(q, 7); 2091 blk_queue_write_cache(q, vwc, vwc); 2092 } 2093 2094 static void nvme_update_disk_info(struct gendisk *disk, 2095 struct nvme_ns *ns, struct nvme_id_ns *id) 2096 { 2097 sector_t capacity = nvme_lba_to_sect(ns, le64_to_cpu(id->nsze)); 2098 unsigned short bs = 1 << ns->lba_shift; 2099 u32 atomic_bs, phys_bs, io_opt = 0; 2100 2101 /* 2102 * The block layer can't support LBA sizes larger than the page size 2103 * yet, so catch this early and don't allow block I/O. 2104 */ 2105 if (ns->lba_shift > PAGE_SHIFT) { 2106 capacity = 0; 2107 bs = (1 << 9); 2108 } 2109 2110 blk_integrity_unregister(disk); 2111 2112 atomic_bs = phys_bs = bs; 2113 nvme_setup_streams_ns(ns->ctrl, ns, &phys_bs, &io_opt); 2114 if (id->nabo == 0) { 2115 /* 2116 * Bit 1 indicates whether NAWUPF is defined for this namespace 2117 * and whether it should be used instead of AWUPF. If NAWUPF == 2118 * 0 then AWUPF must be used instead. 2119 */ 2120 if (id->nsfeat & NVME_NS_FEAT_ATOMICS && id->nawupf) 2121 atomic_bs = (1 + le16_to_cpu(id->nawupf)) * bs; 2122 else 2123 atomic_bs = (1 + ns->ctrl->subsys->awupf) * bs; 2124 } 2125 2126 if (id->nsfeat & NVME_NS_FEAT_IO_OPT) { 2127 /* NPWG = Namespace Preferred Write Granularity */ 2128 phys_bs = bs * (1 + le16_to_cpu(id->npwg)); 2129 /* NOWS = Namespace Optimal Write Size */ 2130 io_opt = bs * (1 + le16_to_cpu(id->nows)); 2131 } 2132 2133 blk_queue_logical_block_size(disk->queue, bs); 2134 /* 2135 * Linux filesystems assume writing a single physical block is 2136 * an atomic operation. Hence limit the physical block size to the 2137 * value of the Atomic Write Unit Power Fail parameter. 2138 */ 2139 blk_queue_physical_block_size(disk->queue, min(phys_bs, atomic_bs)); 2140 blk_queue_io_min(disk->queue, phys_bs); 2141 blk_queue_io_opt(disk->queue, io_opt); 2142 2143 /* 2144 * Register a metadata profile for PI, or the plain non-integrity NVMe 2145 * metadata masquerading as Type 0 if supported, otherwise reject block 2146 * I/O to namespaces with metadata except when the namespace supports 2147 * PI, as it can strip/insert in that case. 2148 */ 2149 if (ns->ms) { 2150 if (IS_ENABLED(CONFIG_BLK_DEV_INTEGRITY) && 2151 (ns->features & NVME_NS_METADATA_SUPPORTED)) 2152 nvme_init_integrity(disk, ns->ms, ns->pi_type, 2153 ns->ctrl->max_integrity_segments); 2154 else if (!nvme_ns_has_pi(ns)) 2155 capacity = 0; 2156 } 2157 2158 set_capacity_and_notify(disk, capacity); 2159 2160 nvme_config_discard(disk, ns); 2161 nvme_config_write_zeroes(disk, ns); 2162 2163 set_disk_ro(disk, (id->nsattr & NVME_NS_ATTR_RO) || 2164 test_bit(NVME_NS_FORCE_RO, &ns->flags)); 2165 } 2166 2167 static inline bool nvme_first_scan(struct gendisk *disk) 2168 { 2169 /* nvme_alloc_ns() scans the disk prior to adding it */ 2170 return !(disk->flags & GENHD_FL_UP); 2171 } 2172 2173 static void nvme_set_chunk_sectors(struct nvme_ns *ns, struct nvme_id_ns *id) 2174 { 2175 struct nvme_ctrl *ctrl = ns->ctrl; 2176 u32 iob; 2177 2178 if ((ctrl->quirks & NVME_QUIRK_STRIPE_SIZE) && 2179 is_power_of_2(ctrl->max_hw_sectors)) 2180 iob = ctrl->max_hw_sectors; 2181 else 2182 iob = nvme_lba_to_sect(ns, le16_to_cpu(id->noiob)); 2183 2184 if (!iob) 2185 return; 2186 2187 if (!is_power_of_2(iob)) { 2188 if (nvme_first_scan(ns->disk)) 2189 pr_warn("%s: ignoring unaligned IO boundary:%u\n", 2190 ns->disk->disk_name, iob); 2191 return; 2192 } 2193 2194 if (blk_queue_is_zoned(ns->disk->queue)) { 2195 if (nvme_first_scan(ns->disk)) 2196 pr_warn("%s: ignoring zoned namespace IO boundary\n", 2197 ns->disk->disk_name); 2198 return; 2199 } 2200 2201 blk_queue_chunk_sectors(ns->queue, iob); 2202 } 2203 2204 static int nvme_update_ns_info(struct nvme_ns *ns, struct nvme_id_ns *id) 2205 { 2206 unsigned lbaf = id->flbas & NVME_NS_FLBAS_LBA_MASK; 2207 int ret; 2208 2209 blk_mq_freeze_queue(ns->disk->queue); 2210 ns->lba_shift = id->lbaf[lbaf].ds; 2211 nvme_set_queue_limits(ns->ctrl, ns->queue); 2212 2213 ret = nvme_configure_metadata(ns, id); 2214 if (ret) 2215 goto out_unfreeze; 2216 nvme_set_chunk_sectors(ns, id); 2217 nvme_update_disk_info(ns->disk, ns, id); 2218 2219 if (ns->head->ids.csi == NVME_CSI_ZNS) { 2220 ret = nvme_update_zone_info(ns, lbaf); 2221 if (ret) 2222 goto out_unfreeze; 2223 } 2224 2225 blk_mq_unfreeze_queue(ns->disk->queue); 2226 2227 if (blk_queue_is_zoned(ns->queue)) { 2228 ret = nvme_revalidate_zones(ns); 2229 if (ret && !nvme_first_scan(ns->disk)) 2230 return ret; 2231 } 2232 2233 #ifdef CONFIG_NVME_MULTIPATH 2234 if (ns->head->disk) { 2235 blk_mq_freeze_queue(ns->head->disk->queue); 2236 nvme_update_disk_info(ns->head->disk, ns, id); 2237 blk_stack_limits(&ns->head->disk->queue->limits, 2238 &ns->queue->limits, 0); 2239 blk_queue_update_readahead(ns->head->disk->queue); 2240 blk_mq_unfreeze_queue(ns->head->disk->queue); 2241 } 2242 #endif 2243 return 0; 2244 2245 out_unfreeze: 2246 blk_mq_unfreeze_queue(ns->disk->queue); 2247 return ret; 2248 } 2249 2250 static char nvme_pr_type(enum pr_type type) 2251 { 2252 switch (type) { 2253 case PR_WRITE_EXCLUSIVE: 2254 return 1; 2255 case PR_EXCLUSIVE_ACCESS: 2256 return 2; 2257 case PR_WRITE_EXCLUSIVE_REG_ONLY: 2258 return 3; 2259 case PR_EXCLUSIVE_ACCESS_REG_ONLY: 2260 return 4; 2261 case PR_WRITE_EXCLUSIVE_ALL_REGS: 2262 return 5; 2263 case PR_EXCLUSIVE_ACCESS_ALL_REGS: 2264 return 6; 2265 default: 2266 return 0; 2267 } 2268 }; 2269 2270 static int nvme_pr_command(struct block_device *bdev, u32 cdw10, 2271 u64 key, u64 sa_key, u8 op) 2272 { 2273 struct nvme_ns_head *head = NULL; 2274 struct nvme_ns *ns; 2275 struct nvme_command c; 2276 int srcu_idx, ret; 2277 u8 data[16] = { 0, }; 2278 2279 ns = nvme_get_ns_from_disk(bdev->bd_disk, &head, &srcu_idx); 2280 if (unlikely(!ns)) 2281 return -EWOULDBLOCK; 2282 2283 put_unaligned_le64(key, &data[0]); 2284 put_unaligned_le64(sa_key, &data[8]); 2285 2286 memset(&c, 0, sizeof(c)); 2287 c.common.opcode = op; 2288 c.common.nsid = cpu_to_le32(ns->head->ns_id); 2289 c.common.cdw10 = cpu_to_le32(cdw10); 2290 2291 ret = nvme_submit_sync_cmd(ns->queue, &c, data, 16); 2292 nvme_put_ns_from_disk(head, srcu_idx); 2293 return ret; 2294 } 2295 2296 static int nvme_pr_register(struct block_device *bdev, u64 old, 2297 u64 new, unsigned flags) 2298 { 2299 u32 cdw10; 2300 2301 if (flags & ~PR_FL_IGNORE_KEY) 2302 return -EOPNOTSUPP; 2303 2304 cdw10 = old ? 2 : 0; 2305 cdw10 |= (flags & PR_FL_IGNORE_KEY) ? 1 << 3 : 0; 2306 cdw10 |= (1 << 30) | (1 << 31); /* PTPL=1 */ 2307 return nvme_pr_command(bdev, cdw10, old, new, nvme_cmd_resv_register); 2308 } 2309 2310 static int nvme_pr_reserve(struct block_device *bdev, u64 key, 2311 enum pr_type type, unsigned flags) 2312 { 2313 u32 cdw10; 2314 2315 if (flags & ~PR_FL_IGNORE_KEY) 2316 return -EOPNOTSUPP; 2317 2318 cdw10 = nvme_pr_type(type) << 8; 2319 cdw10 |= ((flags & PR_FL_IGNORE_KEY) ? 1 << 3 : 0); 2320 return nvme_pr_command(bdev, cdw10, key, 0, nvme_cmd_resv_acquire); 2321 } 2322 2323 static int nvme_pr_preempt(struct block_device *bdev, u64 old, u64 new, 2324 enum pr_type type, bool abort) 2325 { 2326 u32 cdw10 = nvme_pr_type(type) << 8 | (abort ? 2 : 1); 2327 return nvme_pr_command(bdev, cdw10, old, new, nvme_cmd_resv_acquire); 2328 } 2329 2330 static int nvme_pr_clear(struct block_device *bdev, u64 key) 2331 { 2332 u32 cdw10 = 1 | (key ? 1 << 3 : 0); 2333 return nvme_pr_command(bdev, cdw10, key, 0, nvme_cmd_resv_register); 2334 } 2335 2336 static int nvme_pr_release(struct block_device *bdev, u64 key, enum pr_type type) 2337 { 2338 u32 cdw10 = nvme_pr_type(type) << 8 | (key ? 1 << 3 : 0); 2339 return nvme_pr_command(bdev, cdw10, key, 0, nvme_cmd_resv_release); 2340 } 2341 2342 static const struct pr_ops nvme_pr_ops = { 2343 .pr_register = nvme_pr_register, 2344 .pr_reserve = nvme_pr_reserve, 2345 .pr_release = nvme_pr_release, 2346 .pr_preempt = nvme_pr_preempt, 2347 .pr_clear = nvme_pr_clear, 2348 }; 2349 2350 #ifdef CONFIG_BLK_SED_OPAL 2351 int nvme_sec_submit(void *data, u16 spsp, u8 secp, void *buffer, size_t len, 2352 bool send) 2353 { 2354 struct nvme_ctrl *ctrl = data; 2355 struct nvme_command cmd; 2356 2357 memset(&cmd, 0, sizeof(cmd)); 2358 if (send) 2359 cmd.common.opcode = nvme_admin_security_send; 2360 else 2361 cmd.common.opcode = nvme_admin_security_recv; 2362 cmd.common.nsid = 0; 2363 cmd.common.cdw10 = cpu_to_le32(((u32)secp) << 24 | ((u32)spsp) << 8); 2364 cmd.common.cdw11 = cpu_to_le32(len); 2365 2366 return __nvme_submit_sync_cmd(ctrl->admin_q, &cmd, NULL, buffer, len, 0, 2367 NVME_QID_ANY, 1, 0, false); 2368 } 2369 EXPORT_SYMBOL_GPL(nvme_sec_submit); 2370 #endif /* CONFIG_BLK_SED_OPAL */ 2371 2372 static const struct block_device_operations nvme_bdev_ops = { 2373 .owner = THIS_MODULE, 2374 .ioctl = nvme_ioctl, 2375 .compat_ioctl = nvme_compat_ioctl, 2376 .open = nvme_open, 2377 .release = nvme_release, 2378 .getgeo = nvme_getgeo, 2379 .report_zones = nvme_report_zones, 2380 .pr_ops = &nvme_pr_ops, 2381 }; 2382 2383 #ifdef CONFIG_NVME_MULTIPATH 2384 static int nvme_ns_head_open(struct block_device *bdev, fmode_t mode) 2385 { 2386 struct nvme_ns_head *head = bdev->bd_disk->private_data; 2387 2388 if (!kref_get_unless_zero(&head->ref)) 2389 return -ENXIO; 2390 return 0; 2391 } 2392 2393 static void nvme_ns_head_release(struct gendisk *disk, fmode_t mode) 2394 { 2395 nvme_put_ns_head(disk->private_data); 2396 } 2397 2398 const struct block_device_operations nvme_ns_head_ops = { 2399 .owner = THIS_MODULE, 2400 .submit_bio = nvme_ns_head_submit_bio, 2401 .open = nvme_ns_head_open, 2402 .release = nvme_ns_head_release, 2403 .ioctl = nvme_ioctl, 2404 .compat_ioctl = nvme_compat_ioctl, 2405 .getgeo = nvme_getgeo, 2406 .report_zones = nvme_report_zones, 2407 .pr_ops = &nvme_pr_ops, 2408 }; 2409 #endif /* CONFIG_NVME_MULTIPATH */ 2410 2411 static int nvme_wait_ready(struct nvme_ctrl *ctrl, u64 cap, bool enabled) 2412 { 2413 unsigned long timeout = 2414 ((NVME_CAP_TIMEOUT(cap) + 1) * HZ / 2) + jiffies; 2415 u32 csts, bit = enabled ? NVME_CSTS_RDY : 0; 2416 int ret; 2417 2418 while ((ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts)) == 0) { 2419 if (csts == ~0) 2420 return -ENODEV; 2421 if ((csts & NVME_CSTS_RDY) == bit) 2422 break; 2423 2424 usleep_range(1000, 2000); 2425 if (fatal_signal_pending(current)) 2426 return -EINTR; 2427 if (time_after(jiffies, timeout)) { 2428 dev_err(ctrl->device, 2429 "Device not ready; aborting %s, CSTS=0x%x\n", 2430 enabled ? "initialisation" : "reset", csts); 2431 return -ENODEV; 2432 } 2433 } 2434 2435 return ret; 2436 } 2437 2438 /* 2439 * If the device has been passed off to us in an enabled state, just clear 2440 * the enabled bit. The spec says we should set the 'shutdown notification 2441 * bits', but doing so may cause the device to complete commands to the 2442 * admin queue ... and we don't know what memory that might be pointing at! 2443 */ 2444 int nvme_disable_ctrl(struct nvme_ctrl *ctrl) 2445 { 2446 int ret; 2447 2448 ctrl->ctrl_config &= ~NVME_CC_SHN_MASK; 2449 ctrl->ctrl_config &= ~NVME_CC_ENABLE; 2450 2451 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config); 2452 if (ret) 2453 return ret; 2454 2455 if (ctrl->quirks & NVME_QUIRK_DELAY_BEFORE_CHK_RDY) 2456 msleep(NVME_QUIRK_DELAY_AMOUNT); 2457 2458 return nvme_wait_ready(ctrl, ctrl->cap, false); 2459 } 2460 EXPORT_SYMBOL_GPL(nvme_disable_ctrl); 2461 2462 int nvme_enable_ctrl(struct nvme_ctrl *ctrl) 2463 { 2464 unsigned dev_page_min; 2465 int ret; 2466 2467 ret = ctrl->ops->reg_read64(ctrl, NVME_REG_CAP, &ctrl->cap); 2468 if (ret) { 2469 dev_err(ctrl->device, "Reading CAP failed (%d)\n", ret); 2470 return ret; 2471 } 2472 dev_page_min = NVME_CAP_MPSMIN(ctrl->cap) + 12; 2473 2474 if (NVME_CTRL_PAGE_SHIFT < dev_page_min) { 2475 dev_err(ctrl->device, 2476 "Minimum device page size %u too large for host (%u)\n", 2477 1 << dev_page_min, 1 << NVME_CTRL_PAGE_SHIFT); 2478 return -ENODEV; 2479 } 2480 2481 if (NVME_CAP_CSS(ctrl->cap) & NVME_CAP_CSS_CSI) 2482 ctrl->ctrl_config = NVME_CC_CSS_CSI; 2483 else 2484 ctrl->ctrl_config = NVME_CC_CSS_NVM; 2485 ctrl->ctrl_config |= (NVME_CTRL_PAGE_SHIFT - 12) << NVME_CC_MPS_SHIFT; 2486 ctrl->ctrl_config |= NVME_CC_AMS_RR | NVME_CC_SHN_NONE; 2487 ctrl->ctrl_config |= NVME_CC_IOSQES | NVME_CC_IOCQES; 2488 ctrl->ctrl_config |= NVME_CC_ENABLE; 2489 2490 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config); 2491 if (ret) 2492 return ret; 2493 return nvme_wait_ready(ctrl, ctrl->cap, true); 2494 } 2495 EXPORT_SYMBOL_GPL(nvme_enable_ctrl); 2496 2497 int nvme_shutdown_ctrl(struct nvme_ctrl *ctrl) 2498 { 2499 unsigned long timeout = jiffies + (ctrl->shutdown_timeout * HZ); 2500 u32 csts; 2501 int ret; 2502 2503 ctrl->ctrl_config &= ~NVME_CC_SHN_MASK; 2504 ctrl->ctrl_config |= NVME_CC_SHN_NORMAL; 2505 2506 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config); 2507 if (ret) 2508 return ret; 2509 2510 while ((ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts)) == 0) { 2511 if ((csts & NVME_CSTS_SHST_MASK) == NVME_CSTS_SHST_CMPLT) 2512 break; 2513 2514 msleep(100); 2515 if (fatal_signal_pending(current)) 2516 return -EINTR; 2517 if (time_after(jiffies, timeout)) { 2518 dev_err(ctrl->device, 2519 "Device shutdown incomplete; abort shutdown\n"); 2520 return -ENODEV; 2521 } 2522 } 2523 2524 return ret; 2525 } 2526 EXPORT_SYMBOL_GPL(nvme_shutdown_ctrl); 2527 2528 static int nvme_configure_timestamp(struct nvme_ctrl *ctrl) 2529 { 2530 __le64 ts; 2531 int ret; 2532 2533 if (!(ctrl->oncs & NVME_CTRL_ONCS_TIMESTAMP)) 2534 return 0; 2535 2536 ts = cpu_to_le64(ktime_to_ms(ktime_get_real())); 2537 ret = nvme_set_features(ctrl, NVME_FEAT_TIMESTAMP, 0, &ts, sizeof(ts), 2538 NULL); 2539 if (ret) 2540 dev_warn_once(ctrl->device, 2541 "could not set timestamp (%d)\n", ret); 2542 return ret; 2543 } 2544 2545 static int nvme_configure_acre(struct nvme_ctrl *ctrl) 2546 { 2547 struct nvme_feat_host_behavior *host; 2548 int ret; 2549 2550 /* Don't bother enabling the feature if retry delay is not reported */ 2551 if (!ctrl->crdt[0]) 2552 return 0; 2553 2554 host = kzalloc(sizeof(*host), GFP_KERNEL); 2555 if (!host) 2556 return 0; 2557 2558 host->acre = NVME_ENABLE_ACRE; 2559 ret = nvme_set_features(ctrl, NVME_FEAT_HOST_BEHAVIOR, 0, 2560 host, sizeof(*host), NULL); 2561 kfree(host); 2562 return ret; 2563 } 2564 2565 static int nvme_configure_apst(struct nvme_ctrl *ctrl) 2566 { 2567 /* 2568 * APST (Autonomous Power State Transition) lets us program a 2569 * table of power state transitions that the controller will 2570 * perform automatically. We configure it with a simple 2571 * heuristic: we are willing to spend at most 2% of the time 2572 * transitioning between power states. Therefore, when running 2573 * in any given state, we will enter the next lower-power 2574 * non-operational state after waiting 50 * (enlat + exlat) 2575 * microseconds, as long as that state's exit latency is under 2576 * the requested maximum latency. 2577 * 2578 * We will not autonomously enter any non-operational state for 2579 * which the total latency exceeds ps_max_latency_us. Users 2580 * can set ps_max_latency_us to zero to turn off APST. 2581 */ 2582 2583 unsigned apste; 2584 struct nvme_feat_auto_pst *table; 2585 u64 max_lat_us = 0; 2586 int max_ps = -1; 2587 int ret; 2588 2589 /* 2590 * If APST isn't supported or if we haven't been initialized yet, 2591 * then don't do anything. 2592 */ 2593 if (!ctrl->apsta) 2594 return 0; 2595 2596 if (ctrl->npss > 31) { 2597 dev_warn(ctrl->device, "NPSS is invalid; not using APST\n"); 2598 return 0; 2599 } 2600 2601 table = kzalloc(sizeof(*table), GFP_KERNEL); 2602 if (!table) 2603 return 0; 2604 2605 if (!ctrl->apst_enabled || ctrl->ps_max_latency_us == 0) { 2606 /* Turn off APST. */ 2607 apste = 0; 2608 dev_dbg(ctrl->device, "APST disabled\n"); 2609 } else { 2610 __le64 target = cpu_to_le64(0); 2611 int state; 2612 2613 /* 2614 * Walk through all states from lowest- to highest-power. 2615 * According to the spec, lower-numbered states use more 2616 * power. NPSS, despite the name, is the index of the 2617 * lowest-power state, not the number of states. 2618 */ 2619 for (state = (int)ctrl->npss; state >= 0; state--) { 2620 u64 total_latency_us, exit_latency_us, transition_ms; 2621 2622 if (target) 2623 table->entries[state] = target; 2624 2625 /* 2626 * Don't allow transitions to the deepest state 2627 * if it's quirked off. 2628 */ 2629 if (state == ctrl->npss && 2630 (ctrl->quirks & NVME_QUIRK_NO_DEEPEST_PS)) 2631 continue; 2632 2633 /* 2634 * Is this state a useful non-operational state for 2635 * higher-power states to autonomously transition to? 2636 */ 2637 if (!(ctrl->psd[state].flags & 2638 NVME_PS_FLAGS_NON_OP_STATE)) 2639 continue; 2640 2641 exit_latency_us = 2642 (u64)le32_to_cpu(ctrl->psd[state].exit_lat); 2643 if (exit_latency_us > ctrl->ps_max_latency_us) 2644 continue; 2645 2646 total_latency_us = 2647 exit_latency_us + 2648 le32_to_cpu(ctrl->psd[state].entry_lat); 2649 2650 /* 2651 * This state is good. Use it as the APST idle 2652 * target for higher power states. 2653 */ 2654 transition_ms = total_latency_us + 19; 2655 do_div(transition_ms, 20); 2656 if (transition_ms > (1 << 24) - 1) 2657 transition_ms = (1 << 24) - 1; 2658 2659 target = cpu_to_le64((state << 3) | 2660 (transition_ms << 8)); 2661 2662 if (max_ps == -1) 2663 max_ps = state; 2664 2665 if (total_latency_us > max_lat_us) 2666 max_lat_us = total_latency_us; 2667 } 2668 2669 apste = 1; 2670 2671 if (max_ps == -1) { 2672 dev_dbg(ctrl->device, "APST enabled but no non-operational states are available\n"); 2673 } else { 2674 dev_dbg(ctrl->device, "APST enabled: max PS = %d, max round-trip latency = %lluus, table = %*phN\n", 2675 max_ps, max_lat_us, (int)sizeof(*table), table); 2676 } 2677 } 2678 2679 ret = nvme_set_features(ctrl, NVME_FEAT_AUTO_PST, apste, 2680 table, sizeof(*table), NULL); 2681 if (ret) 2682 dev_err(ctrl->device, "failed to set APST feature (%d)\n", ret); 2683 2684 kfree(table); 2685 return ret; 2686 } 2687 2688 static void nvme_set_latency_tolerance(struct device *dev, s32 val) 2689 { 2690 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 2691 u64 latency; 2692 2693 switch (val) { 2694 case PM_QOS_LATENCY_TOLERANCE_NO_CONSTRAINT: 2695 case PM_QOS_LATENCY_ANY: 2696 latency = U64_MAX; 2697 break; 2698 2699 default: 2700 latency = val; 2701 } 2702 2703 if (ctrl->ps_max_latency_us != latency) { 2704 ctrl->ps_max_latency_us = latency; 2705 nvme_configure_apst(ctrl); 2706 } 2707 } 2708 2709 struct nvme_core_quirk_entry { 2710 /* 2711 * NVMe model and firmware strings are padded with spaces. For 2712 * simplicity, strings in the quirk table are padded with NULLs 2713 * instead. 2714 */ 2715 u16 vid; 2716 const char *mn; 2717 const char *fr; 2718 unsigned long quirks; 2719 }; 2720 2721 static const struct nvme_core_quirk_entry core_quirks[] = { 2722 { 2723 /* 2724 * This Toshiba device seems to die using any APST states. See: 2725 * https://bugs.launchpad.net/ubuntu/+source/linux/+bug/1678184/comments/11 2726 */ 2727 .vid = 0x1179, 2728 .mn = "THNSF5256GPUK TOSHIBA", 2729 .quirks = NVME_QUIRK_NO_APST, 2730 }, 2731 { 2732 /* 2733 * This LiteON CL1-3D*-Q11 firmware version has a race 2734 * condition associated with actions related to suspend to idle 2735 * LiteON has resolved the problem in future firmware 2736 */ 2737 .vid = 0x14a4, 2738 .fr = "22301111", 2739 .quirks = NVME_QUIRK_SIMPLE_SUSPEND, 2740 } 2741 }; 2742 2743 /* match is null-terminated but idstr is space-padded. */ 2744 static bool string_matches(const char *idstr, const char *match, size_t len) 2745 { 2746 size_t matchlen; 2747 2748 if (!match) 2749 return true; 2750 2751 matchlen = strlen(match); 2752 WARN_ON_ONCE(matchlen > len); 2753 2754 if (memcmp(idstr, match, matchlen)) 2755 return false; 2756 2757 for (; matchlen < len; matchlen++) 2758 if (idstr[matchlen] != ' ') 2759 return false; 2760 2761 return true; 2762 } 2763 2764 static bool quirk_matches(const struct nvme_id_ctrl *id, 2765 const struct nvme_core_quirk_entry *q) 2766 { 2767 return q->vid == le16_to_cpu(id->vid) && 2768 string_matches(id->mn, q->mn, sizeof(id->mn)) && 2769 string_matches(id->fr, q->fr, sizeof(id->fr)); 2770 } 2771 2772 static void nvme_init_subnqn(struct nvme_subsystem *subsys, struct nvme_ctrl *ctrl, 2773 struct nvme_id_ctrl *id) 2774 { 2775 size_t nqnlen; 2776 int off; 2777 2778 if(!(ctrl->quirks & NVME_QUIRK_IGNORE_DEV_SUBNQN)) { 2779 nqnlen = strnlen(id->subnqn, NVMF_NQN_SIZE); 2780 if (nqnlen > 0 && nqnlen < NVMF_NQN_SIZE) { 2781 strlcpy(subsys->subnqn, id->subnqn, NVMF_NQN_SIZE); 2782 return; 2783 } 2784 2785 if (ctrl->vs >= NVME_VS(1, 2, 1)) 2786 dev_warn(ctrl->device, "missing or invalid SUBNQN field.\n"); 2787 } 2788 2789 /* Generate a "fake" NQN per Figure 254 in NVMe 1.3 + ECN 001 */ 2790 off = snprintf(subsys->subnqn, NVMF_NQN_SIZE, 2791 "nqn.2014.08.org.nvmexpress:%04x%04x", 2792 le16_to_cpu(id->vid), le16_to_cpu(id->ssvid)); 2793 memcpy(subsys->subnqn + off, id->sn, sizeof(id->sn)); 2794 off += sizeof(id->sn); 2795 memcpy(subsys->subnqn + off, id->mn, sizeof(id->mn)); 2796 off += sizeof(id->mn); 2797 memset(subsys->subnqn + off, 0, sizeof(subsys->subnqn) - off); 2798 } 2799 2800 static void nvme_release_subsystem(struct device *dev) 2801 { 2802 struct nvme_subsystem *subsys = 2803 container_of(dev, struct nvme_subsystem, dev); 2804 2805 if (subsys->instance >= 0) 2806 ida_simple_remove(&nvme_instance_ida, subsys->instance); 2807 kfree(subsys); 2808 } 2809 2810 static void nvme_destroy_subsystem(struct kref *ref) 2811 { 2812 struct nvme_subsystem *subsys = 2813 container_of(ref, struct nvme_subsystem, ref); 2814 2815 mutex_lock(&nvme_subsystems_lock); 2816 list_del(&subsys->entry); 2817 mutex_unlock(&nvme_subsystems_lock); 2818 2819 ida_destroy(&subsys->ns_ida); 2820 device_del(&subsys->dev); 2821 put_device(&subsys->dev); 2822 } 2823 2824 static void nvme_put_subsystem(struct nvme_subsystem *subsys) 2825 { 2826 kref_put(&subsys->ref, nvme_destroy_subsystem); 2827 } 2828 2829 static struct nvme_subsystem *__nvme_find_get_subsystem(const char *subsysnqn) 2830 { 2831 struct nvme_subsystem *subsys; 2832 2833 lockdep_assert_held(&nvme_subsystems_lock); 2834 2835 /* 2836 * Fail matches for discovery subsystems. This results 2837 * in each discovery controller bound to a unique subsystem. 2838 * This avoids issues with validating controller values 2839 * that can only be true when there is a single unique subsystem. 2840 * There may be multiple and completely independent entities 2841 * that provide discovery controllers. 2842 */ 2843 if (!strcmp(subsysnqn, NVME_DISC_SUBSYS_NAME)) 2844 return NULL; 2845 2846 list_for_each_entry(subsys, &nvme_subsystems, entry) { 2847 if (strcmp(subsys->subnqn, subsysnqn)) 2848 continue; 2849 if (!kref_get_unless_zero(&subsys->ref)) 2850 continue; 2851 return subsys; 2852 } 2853 2854 return NULL; 2855 } 2856 2857 #define SUBSYS_ATTR_RO(_name, _mode, _show) \ 2858 struct device_attribute subsys_attr_##_name = \ 2859 __ATTR(_name, _mode, _show, NULL) 2860 2861 static ssize_t nvme_subsys_show_nqn(struct device *dev, 2862 struct device_attribute *attr, 2863 char *buf) 2864 { 2865 struct nvme_subsystem *subsys = 2866 container_of(dev, struct nvme_subsystem, dev); 2867 2868 return sysfs_emit(buf, "%s\n", subsys->subnqn); 2869 } 2870 static SUBSYS_ATTR_RO(subsysnqn, S_IRUGO, nvme_subsys_show_nqn); 2871 2872 #define nvme_subsys_show_str_function(field) \ 2873 static ssize_t subsys_##field##_show(struct device *dev, \ 2874 struct device_attribute *attr, char *buf) \ 2875 { \ 2876 struct nvme_subsystem *subsys = \ 2877 container_of(dev, struct nvme_subsystem, dev); \ 2878 return sprintf(buf, "%.*s\n", \ 2879 (int)sizeof(subsys->field), subsys->field); \ 2880 } \ 2881 static SUBSYS_ATTR_RO(field, S_IRUGO, subsys_##field##_show); 2882 2883 nvme_subsys_show_str_function(model); 2884 nvme_subsys_show_str_function(serial); 2885 nvme_subsys_show_str_function(firmware_rev); 2886 2887 static struct attribute *nvme_subsys_attrs[] = { 2888 &subsys_attr_model.attr, 2889 &subsys_attr_serial.attr, 2890 &subsys_attr_firmware_rev.attr, 2891 &subsys_attr_subsysnqn.attr, 2892 #ifdef CONFIG_NVME_MULTIPATH 2893 &subsys_attr_iopolicy.attr, 2894 #endif 2895 NULL, 2896 }; 2897 2898 static const struct attribute_group nvme_subsys_attrs_group = { 2899 .attrs = nvme_subsys_attrs, 2900 }; 2901 2902 static const struct attribute_group *nvme_subsys_attrs_groups[] = { 2903 &nvme_subsys_attrs_group, 2904 NULL, 2905 }; 2906 2907 static inline bool nvme_discovery_ctrl(struct nvme_ctrl *ctrl) 2908 { 2909 return ctrl->opts && ctrl->opts->discovery_nqn; 2910 } 2911 2912 static bool nvme_validate_cntlid(struct nvme_subsystem *subsys, 2913 struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id) 2914 { 2915 struct nvme_ctrl *tmp; 2916 2917 lockdep_assert_held(&nvme_subsystems_lock); 2918 2919 list_for_each_entry(tmp, &subsys->ctrls, subsys_entry) { 2920 if (nvme_state_terminal(tmp)) 2921 continue; 2922 2923 if (tmp->cntlid == ctrl->cntlid) { 2924 dev_err(ctrl->device, 2925 "Duplicate cntlid %u with %s, rejecting\n", 2926 ctrl->cntlid, dev_name(tmp->device)); 2927 return false; 2928 } 2929 2930 if ((id->cmic & NVME_CTRL_CMIC_MULTI_CTRL) || 2931 nvme_discovery_ctrl(ctrl)) 2932 continue; 2933 2934 dev_err(ctrl->device, 2935 "Subsystem does not support multiple controllers\n"); 2936 return false; 2937 } 2938 2939 return true; 2940 } 2941 2942 static int nvme_init_subsystem(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id) 2943 { 2944 struct nvme_subsystem *subsys, *found; 2945 int ret; 2946 2947 subsys = kzalloc(sizeof(*subsys), GFP_KERNEL); 2948 if (!subsys) 2949 return -ENOMEM; 2950 2951 subsys->instance = -1; 2952 mutex_init(&subsys->lock); 2953 kref_init(&subsys->ref); 2954 INIT_LIST_HEAD(&subsys->ctrls); 2955 INIT_LIST_HEAD(&subsys->nsheads); 2956 nvme_init_subnqn(subsys, ctrl, id); 2957 memcpy(subsys->serial, id->sn, sizeof(subsys->serial)); 2958 memcpy(subsys->model, id->mn, sizeof(subsys->model)); 2959 memcpy(subsys->firmware_rev, id->fr, sizeof(subsys->firmware_rev)); 2960 subsys->vendor_id = le16_to_cpu(id->vid); 2961 subsys->cmic = id->cmic; 2962 subsys->awupf = le16_to_cpu(id->awupf); 2963 #ifdef CONFIG_NVME_MULTIPATH 2964 subsys->iopolicy = NVME_IOPOLICY_NUMA; 2965 #endif 2966 2967 subsys->dev.class = nvme_subsys_class; 2968 subsys->dev.release = nvme_release_subsystem; 2969 subsys->dev.groups = nvme_subsys_attrs_groups; 2970 dev_set_name(&subsys->dev, "nvme-subsys%d", ctrl->instance); 2971 device_initialize(&subsys->dev); 2972 2973 mutex_lock(&nvme_subsystems_lock); 2974 found = __nvme_find_get_subsystem(subsys->subnqn); 2975 if (found) { 2976 put_device(&subsys->dev); 2977 subsys = found; 2978 2979 if (!nvme_validate_cntlid(subsys, ctrl, id)) { 2980 ret = -EINVAL; 2981 goto out_put_subsystem; 2982 } 2983 } else { 2984 ret = device_add(&subsys->dev); 2985 if (ret) { 2986 dev_err(ctrl->device, 2987 "failed to register subsystem device.\n"); 2988 put_device(&subsys->dev); 2989 goto out_unlock; 2990 } 2991 ida_init(&subsys->ns_ida); 2992 list_add_tail(&subsys->entry, &nvme_subsystems); 2993 } 2994 2995 ret = sysfs_create_link(&subsys->dev.kobj, &ctrl->device->kobj, 2996 dev_name(ctrl->device)); 2997 if (ret) { 2998 dev_err(ctrl->device, 2999 "failed to create sysfs link from subsystem.\n"); 3000 goto out_put_subsystem; 3001 } 3002 3003 if (!found) 3004 subsys->instance = ctrl->instance; 3005 ctrl->subsys = subsys; 3006 list_add_tail(&ctrl->subsys_entry, &subsys->ctrls); 3007 mutex_unlock(&nvme_subsystems_lock); 3008 return 0; 3009 3010 out_put_subsystem: 3011 nvme_put_subsystem(subsys); 3012 out_unlock: 3013 mutex_unlock(&nvme_subsystems_lock); 3014 return ret; 3015 } 3016 3017 int nvme_get_log(struct nvme_ctrl *ctrl, u32 nsid, u8 log_page, u8 lsp, u8 csi, 3018 void *log, size_t size, u64 offset) 3019 { 3020 struct nvme_command c = { }; 3021 u32 dwlen = nvme_bytes_to_numd(size); 3022 3023 c.get_log_page.opcode = nvme_admin_get_log_page; 3024 c.get_log_page.nsid = cpu_to_le32(nsid); 3025 c.get_log_page.lid = log_page; 3026 c.get_log_page.lsp = lsp; 3027 c.get_log_page.numdl = cpu_to_le16(dwlen & ((1 << 16) - 1)); 3028 c.get_log_page.numdu = cpu_to_le16(dwlen >> 16); 3029 c.get_log_page.lpol = cpu_to_le32(lower_32_bits(offset)); 3030 c.get_log_page.lpou = cpu_to_le32(upper_32_bits(offset)); 3031 c.get_log_page.csi = csi; 3032 3033 return nvme_submit_sync_cmd(ctrl->admin_q, &c, log, size); 3034 } 3035 3036 static int nvme_get_effects_log(struct nvme_ctrl *ctrl, u8 csi, 3037 struct nvme_effects_log **log) 3038 { 3039 struct nvme_effects_log *cel = xa_load(&ctrl->cels, csi); 3040 int ret; 3041 3042 if (cel) 3043 goto out; 3044 3045 cel = kzalloc(sizeof(*cel), GFP_KERNEL); 3046 if (!cel) 3047 return -ENOMEM; 3048 3049 ret = nvme_get_log(ctrl, 0x00, NVME_LOG_CMD_EFFECTS, 0, csi, 3050 cel, sizeof(*cel), 0); 3051 if (ret) { 3052 kfree(cel); 3053 return ret; 3054 } 3055 3056 xa_store(&ctrl->cels, csi, cel, GFP_KERNEL); 3057 out: 3058 *log = cel; 3059 return 0; 3060 } 3061 3062 /* 3063 * Initialize the cached copies of the Identify data and various controller 3064 * register in our nvme_ctrl structure. This should be called as soon as 3065 * the admin queue is fully up and running. 3066 */ 3067 int nvme_init_identify(struct nvme_ctrl *ctrl) 3068 { 3069 struct nvme_id_ctrl *id; 3070 int ret, page_shift; 3071 u32 max_hw_sectors; 3072 bool prev_apst_enabled; 3073 3074 ret = ctrl->ops->reg_read32(ctrl, NVME_REG_VS, &ctrl->vs); 3075 if (ret) { 3076 dev_err(ctrl->device, "Reading VS failed (%d)\n", ret); 3077 return ret; 3078 } 3079 page_shift = NVME_CAP_MPSMIN(ctrl->cap) + 12; 3080 ctrl->sqsize = min_t(u16, NVME_CAP_MQES(ctrl->cap), ctrl->sqsize); 3081 3082 if (ctrl->vs >= NVME_VS(1, 1, 0)) 3083 ctrl->subsystem = NVME_CAP_NSSRC(ctrl->cap); 3084 3085 ret = nvme_identify_ctrl(ctrl, &id); 3086 if (ret) { 3087 dev_err(ctrl->device, "Identify Controller failed (%d)\n", ret); 3088 return -EIO; 3089 } 3090 3091 if (id->lpa & NVME_CTRL_LPA_CMD_EFFECTS_LOG) { 3092 ret = nvme_get_effects_log(ctrl, NVME_CSI_NVM, &ctrl->effects); 3093 if (ret < 0) 3094 goto out_free; 3095 } 3096 3097 if (!(ctrl->ops->flags & NVME_F_FABRICS)) 3098 ctrl->cntlid = le16_to_cpu(id->cntlid); 3099 3100 if (!ctrl->identified) { 3101 int i; 3102 3103 ret = nvme_init_subsystem(ctrl, id); 3104 if (ret) 3105 goto out_free; 3106 3107 /* 3108 * Check for quirks. Quirk can depend on firmware version, 3109 * so, in principle, the set of quirks present can change 3110 * across a reset. As a possible future enhancement, we 3111 * could re-scan for quirks every time we reinitialize 3112 * the device, but we'd have to make sure that the driver 3113 * behaves intelligently if the quirks change. 3114 */ 3115 for (i = 0; i < ARRAY_SIZE(core_quirks); i++) { 3116 if (quirk_matches(id, &core_quirks[i])) 3117 ctrl->quirks |= core_quirks[i].quirks; 3118 } 3119 } 3120 3121 if (force_apst && (ctrl->quirks & NVME_QUIRK_NO_DEEPEST_PS)) { 3122 dev_warn(ctrl->device, "forcibly allowing all power states due to nvme_core.force_apst -- use at your own risk\n"); 3123 ctrl->quirks &= ~NVME_QUIRK_NO_DEEPEST_PS; 3124 } 3125 3126 ctrl->crdt[0] = le16_to_cpu(id->crdt1); 3127 ctrl->crdt[1] = le16_to_cpu(id->crdt2); 3128 ctrl->crdt[2] = le16_to_cpu(id->crdt3); 3129 3130 ctrl->oacs = le16_to_cpu(id->oacs); 3131 ctrl->oncs = le16_to_cpu(id->oncs); 3132 ctrl->mtfa = le16_to_cpu(id->mtfa); 3133 ctrl->oaes = le32_to_cpu(id->oaes); 3134 ctrl->wctemp = le16_to_cpu(id->wctemp); 3135 ctrl->cctemp = le16_to_cpu(id->cctemp); 3136 3137 atomic_set(&ctrl->abort_limit, id->acl + 1); 3138 ctrl->vwc = id->vwc; 3139 if (id->mdts) 3140 max_hw_sectors = 1 << (id->mdts + page_shift - 9); 3141 else 3142 max_hw_sectors = UINT_MAX; 3143 ctrl->max_hw_sectors = 3144 min_not_zero(ctrl->max_hw_sectors, max_hw_sectors); 3145 3146 nvme_set_queue_limits(ctrl, ctrl->admin_q); 3147 ctrl->sgls = le32_to_cpu(id->sgls); 3148 ctrl->kas = le16_to_cpu(id->kas); 3149 ctrl->max_namespaces = le32_to_cpu(id->mnan); 3150 ctrl->ctratt = le32_to_cpu(id->ctratt); 3151 3152 if (id->rtd3e) { 3153 /* us -> s */ 3154 u32 transition_time = le32_to_cpu(id->rtd3e) / USEC_PER_SEC; 3155 3156 ctrl->shutdown_timeout = clamp_t(unsigned int, transition_time, 3157 shutdown_timeout, 60); 3158 3159 if (ctrl->shutdown_timeout != shutdown_timeout) 3160 dev_info(ctrl->device, 3161 "Shutdown timeout set to %u seconds\n", 3162 ctrl->shutdown_timeout); 3163 } else 3164 ctrl->shutdown_timeout = shutdown_timeout; 3165 3166 ctrl->npss = id->npss; 3167 ctrl->apsta = id->apsta; 3168 prev_apst_enabled = ctrl->apst_enabled; 3169 if (ctrl->quirks & NVME_QUIRK_NO_APST) { 3170 if (force_apst && id->apsta) { 3171 dev_warn(ctrl->device, "forcibly allowing APST due to nvme_core.force_apst -- use at your own risk\n"); 3172 ctrl->apst_enabled = true; 3173 } else { 3174 ctrl->apst_enabled = false; 3175 } 3176 } else { 3177 ctrl->apst_enabled = id->apsta; 3178 } 3179 memcpy(ctrl->psd, id->psd, sizeof(ctrl->psd)); 3180 3181 if (ctrl->ops->flags & NVME_F_FABRICS) { 3182 ctrl->icdoff = le16_to_cpu(id->icdoff); 3183 ctrl->ioccsz = le32_to_cpu(id->ioccsz); 3184 ctrl->iorcsz = le32_to_cpu(id->iorcsz); 3185 ctrl->maxcmd = le16_to_cpu(id->maxcmd); 3186 3187 /* 3188 * In fabrics we need to verify the cntlid matches the 3189 * admin connect 3190 */ 3191 if (ctrl->cntlid != le16_to_cpu(id->cntlid)) { 3192 dev_err(ctrl->device, 3193 "Mismatching cntlid: Connect %u vs Identify " 3194 "%u, rejecting\n", 3195 ctrl->cntlid, le16_to_cpu(id->cntlid)); 3196 ret = -EINVAL; 3197 goto out_free; 3198 } 3199 3200 if (!nvme_discovery_ctrl(ctrl) && !ctrl->kas) { 3201 dev_err(ctrl->device, 3202 "keep-alive support is mandatory for fabrics\n"); 3203 ret = -EINVAL; 3204 goto out_free; 3205 } 3206 } else { 3207 ctrl->hmpre = le32_to_cpu(id->hmpre); 3208 ctrl->hmmin = le32_to_cpu(id->hmmin); 3209 ctrl->hmminds = le32_to_cpu(id->hmminds); 3210 ctrl->hmmaxd = le16_to_cpu(id->hmmaxd); 3211 } 3212 3213 ret = nvme_mpath_init(ctrl, id); 3214 kfree(id); 3215 3216 if (ret < 0) 3217 return ret; 3218 3219 if (ctrl->apst_enabled && !prev_apst_enabled) 3220 dev_pm_qos_expose_latency_tolerance(ctrl->device); 3221 else if (!ctrl->apst_enabled && prev_apst_enabled) 3222 dev_pm_qos_hide_latency_tolerance(ctrl->device); 3223 3224 ret = nvme_configure_apst(ctrl); 3225 if (ret < 0) 3226 return ret; 3227 3228 ret = nvme_configure_timestamp(ctrl); 3229 if (ret < 0) 3230 return ret; 3231 3232 ret = nvme_configure_directives(ctrl); 3233 if (ret < 0) 3234 return ret; 3235 3236 ret = nvme_configure_acre(ctrl); 3237 if (ret < 0) 3238 return ret; 3239 3240 if (!ctrl->identified && !nvme_discovery_ctrl(ctrl)) { 3241 ret = nvme_hwmon_init(ctrl); 3242 if (ret < 0) 3243 return ret; 3244 } 3245 3246 ctrl->identified = true; 3247 3248 return 0; 3249 3250 out_free: 3251 kfree(id); 3252 return ret; 3253 } 3254 EXPORT_SYMBOL_GPL(nvme_init_identify); 3255 3256 static int nvme_dev_open(struct inode *inode, struct file *file) 3257 { 3258 struct nvme_ctrl *ctrl = 3259 container_of(inode->i_cdev, struct nvme_ctrl, cdev); 3260 3261 switch (ctrl->state) { 3262 case NVME_CTRL_LIVE: 3263 break; 3264 default: 3265 return -EWOULDBLOCK; 3266 } 3267 3268 nvme_get_ctrl(ctrl); 3269 if (!try_module_get(ctrl->ops->module)) { 3270 nvme_put_ctrl(ctrl); 3271 return -EINVAL; 3272 } 3273 3274 file->private_data = ctrl; 3275 return 0; 3276 } 3277 3278 static int nvme_dev_release(struct inode *inode, struct file *file) 3279 { 3280 struct nvme_ctrl *ctrl = 3281 container_of(inode->i_cdev, struct nvme_ctrl, cdev); 3282 3283 module_put(ctrl->ops->module); 3284 nvme_put_ctrl(ctrl); 3285 return 0; 3286 } 3287 3288 static int nvme_dev_user_cmd(struct nvme_ctrl *ctrl, void __user *argp) 3289 { 3290 struct nvme_ns *ns; 3291 int ret; 3292 3293 down_read(&ctrl->namespaces_rwsem); 3294 if (list_empty(&ctrl->namespaces)) { 3295 ret = -ENOTTY; 3296 goto out_unlock; 3297 } 3298 3299 ns = list_first_entry(&ctrl->namespaces, struct nvme_ns, list); 3300 if (ns != list_last_entry(&ctrl->namespaces, struct nvme_ns, list)) { 3301 dev_warn(ctrl->device, 3302 "NVME_IOCTL_IO_CMD not supported when multiple namespaces present!\n"); 3303 ret = -EINVAL; 3304 goto out_unlock; 3305 } 3306 3307 dev_warn(ctrl->device, 3308 "using deprecated NVME_IOCTL_IO_CMD ioctl on the char device!\n"); 3309 kref_get(&ns->kref); 3310 up_read(&ctrl->namespaces_rwsem); 3311 3312 ret = nvme_user_cmd(ctrl, ns, argp); 3313 nvme_put_ns(ns); 3314 return ret; 3315 3316 out_unlock: 3317 up_read(&ctrl->namespaces_rwsem); 3318 return ret; 3319 } 3320 3321 static long nvme_dev_ioctl(struct file *file, unsigned int cmd, 3322 unsigned long arg) 3323 { 3324 struct nvme_ctrl *ctrl = file->private_data; 3325 void __user *argp = (void __user *)arg; 3326 3327 switch (cmd) { 3328 case NVME_IOCTL_ADMIN_CMD: 3329 return nvme_user_cmd(ctrl, NULL, argp); 3330 case NVME_IOCTL_ADMIN64_CMD: 3331 return nvme_user_cmd64(ctrl, NULL, argp); 3332 case NVME_IOCTL_IO_CMD: 3333 return nvme_dev_user_cmd(ctrl, argp); 3334 case NVME_IOCTL_RESET: 3335 dev_warn(ctrl->device, "resetting controller\n"); 3336 return nvme_reset_ctrl_sync(ctrl); 3337 case NVME_IOCTL_SUBSYS_RESET: 3338 return nvme_reset_subsystem(ctrl); 3339 case NVME_IOCTL_RESCAN: 3340 nvme_queue_scan(ctrl); 3341 return 0; 3342 default: 3343 return -ENOTTY; 3344 } 3345 } 3346 3347 static const struct file_operations nvme_dev_fops = { 3348 .owner = THIS_MODULE, 3349 .open = nvme_dev_open, 3350 .release = nvme_dev_release, 3351 .unlocked_ioctl = nvme_dev_ioctl, 3352 .compat_ioctl = compat_ptr_ioctl, 3353 }; 3354 3355 static ssize_t nvme_sysfs_reset(struct device *dev, 3356 struct device_attribute *attr, const char *buf, 3357 size_t count) 3358 { 3359 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 3360 int ret; 3361 3362 ret = nvme_reset_ctrl_sync(ctrl); 3363 if (ret < 0) 3364 return ret; 3365 return count; 3366 } 3367 static DEVICE_ATTR(reset_controller, S_IWUSR, NULL, nvme_sysfs_reset); 3368 3369 static ssize_t nvme_sysfs_rescan(struct device *dev, 3370 struct device_attribute *attr, const char *buf, 3371 size_t count) 3372 { 3373 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 3374 3375 nvme_queue_scan(ctrl); 3376 return count; 3377 } 3378 static DEVICE_ATTR(rescan_controller, S_IWUSR, NULL, nvme_sysfs_rescan); 3379 3380 static inline struct nvme_ns_head *dev_to_ns_head(struct device *dev) 3381 { 3382 struct gendisk *disk = dev_to_disk(dev); 3383 3384 if (disk->fops == &nvme_bdev_ops) 3385 return nvme_get_ns_from_dev(dev)->head; 3386 else 3387 return disk->private_data; 3388 } 3389 3390 static ssize_t wwid_show(struct device *dev, struct device_attribute *attr, 3391 char *buf) 3392 { 3393 struct nvme_ns_head *head = dev_to_ns_head(dev); 3394 struct nvme_ns_ids *ids = &head->ids; 3395 struct nvme_subsystem *subsys = head->subsys; 3396 int serial_len = sizeof(subsys->serial); 3397 int model_len = sizeof(subsys->model); 3398 3399 if (!uuid_is_null(&ids->uuid)) 3400 return sprintf(buf, "uuid.%pU\n", &ids->uuid); 3401 3402 if (memchr_inv(ids->nguid, 0, sizeof(ids->nguid))) 3403 return sprintf(buf, "eui.%16phN\n", ids->nguid); 3404 3405 if (memchr_inv(ids->eui64, 0, sizeof(ids->eui64))) 3406 return sprintf(buf, "eui.%8phN\n", ids->eui64); 3407 3408 while (serial_len > 0 && (subsys->serial[serial_len - 1] == ' ' || 3409 subsys->serial[serial_len - 1] == '\0')) 3410 serial_len--; 3411 while (model_len > 0 && (subsys->model[model_len - 1] == ' ' || 3412 subsys->model[model_len - 1] == '\0')) 3413 model_len--; 3414 3415 return sprintf(buf, "nvme.%04x-%*phN-%*phN-%08x\n", subsys->vendor_id, 3416 serial_len, subsys->serial, model_len, subsys->model, 3417 head->ns_id); 3418 } 3419 static DEVICE_ATTR_RO(wwid); 3420 3421 static ssize_t nguid_show(struct device *dev, struct device_attribute *attr, 3422 char *buf) 3423 { 3424 return sprintf(buf, "%pU\n", dev_to_ns_head(dev)->ids.nguid); 3425 } 3426 static DEVICE_ATTR_RO(nguid); 3427 3428 static ssize_t uuid_show(struct device *dev, struct device_attribute *attr, 3429 char *buf) 3430 { 3431 struct nvme_ns_ids *ids = &dev_to_ns_head(dev)->ids; 3432 3433 /* For backward compatibility expose the NGUID to userspace if 3434 * we have no UUID set 3435 */ 3436 if (uuid_is_null(&ids->uuid)) { 3437 printk_ratelimited(KERN_WARNING 3438 "No UUID available providing old NGUID\n"); 3439 return sprintf(buf, "%pU\n", ids->nguid); 3440 } 3441 return sprintf(buf, "%pU\n", &ids->uuid); 3442 } 3443 static DEVICE_ATTR_RO(uuid); 3444 3445 static ssize_t eui_show(struct device *dev, struct device_attribute *attr, 3446 char *buf) 3447 { 3448 return sprintf(buf, "%8ph\n", dev_to_ns_head(dev)->ids.eui64); 3449 } 3450 static DEVICE_ATTR_RO(eui); 3451 3452 static ssize_t nsid_show(struct device *dev, struct device_attribute *attr, 3453 char *buf) 3454 { 3455 return sprintf(buf, "%d\n", dev_to_ns_head(dev)->ns_id); 3456 } 3457 static DEVICE_ATTR_RO(nsid); 3458 3459 static struct attribute *nvme_ns_id_attrs[] = { 3460 &dev_attr_wwid.attr, 3461 &dev_attr_uuid.attr, 3462 &dev_attr_nguid.attr, 3463 &dev_attr_eui.attr, 3464 &dev_attr_nsid.attr, 3465 #ifdef CONFIG_NVME_MULTIPATH 3466 &dev_attr_ana_grpid.attr, 3467 &dev_attr_ana_state.attr, 3468 #endif 3469 NULL, 3470 }; 3471 3472 static umode_t nvme_ns_id_attrs_are_visible(struct kobject *kobj, 3473 struct attribute *a, int n) 3474 { 3475 struct device *dev = container_of(kobj, struct device, kobj); 3476 struct nvme_ns_ids *ids = &dev_to_ns_head(dev)->ids; 3477 3478 if (a == &dev_attr_uuid.attr) { 3479 if (uuid_is_null(&ids->uuid) && 3480 !memchr_inv(ids->nguid, 0, sizeof(ids->nguid))) 3481 return 0; 3482 } 3483 if (a == &dev_attr_nguid.attr) { 3484 if (!memchr_inv(ids->nguid, 0, sizeof(ids->nguid))) 3485 return 0; 3486 } 3487 if (a == &dev_attr_eui.attr) { 3488 if (!memchr_inv(ids->eui64, 0, sizeof(ids->eui64))) 3489 return 0; 3490 } 3491 #ifdef CONFIG_NVME_MULTIPATH 3492 if (a == &dev_attr_ana_grpid.attr || a == &dev_attr_ana_state.attr) { 3493 if (dev_to_disk(dev)->fops != &nvme_bdev_ops) /* per-path attr */ 3494 return 0; 3495 if (!nvme_ctrl_use_ana(nvme_get_ns_from_dev(dev)->ctrl)) 3496 return 0; 3497 } 3498 #endif 3499 return a->mode; 3500 } 3501 3502 static const struct attribute_group nvme_ns_id_attr_group = { 3503 .attrs = nvme_ns_id_attrs, 3504 .is_visible = nvme_ns_id_attrs_are_visible, 3505 }; 3506 3507 const struct attribute_group *nvme_ns_id_attr_groups[] = { 3508 &nvme_ns_id_attr_group, 3509 #ifdef CONFIG_NVM 3510 &nvme_nvm_attr_group, 3511 #endif 3512 NULL, 3513 }; 3514 3515 #define nvme_show_str_function(field) \ 3516 static ssize_t field##_show(struct device *dev, \ 3517 struct device_attribute *attr, char *buf) \ 3518 { \ 3519 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); \ 3520 return sprintf(buf, "%.*s\n", \ 3521 (int)sizeof(ctrl->subsys->field), ctrl->subsys->field); \ 3522 } \ 3523 static DEVICE_ATTR(field, S_IRUGO, field##_show, NULL); 3524 3525 nvme_show_str_function(model); 3526 nvme_show_str_function(serial); 3527 nvme_show_str_function(firmware_rev); 3528 3529 #define nvme_show_int_function(field) \ 3530 static ssize_t field##_show(struct device *dev, \ 3531 struct device_attribute *attr, char *buf) \ 3532 { \ 3533 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); \ 3534 return sprintf(buf, "%d\n", ctrl->field); \ 3535 } \ 3536 static DEVICE_ATTR(field, S_IRUGO, field##_show, NULL); 3537 3538 nvme_show_int_function(cntlid); 3539 nvme_show_int_function(numa_node); 3540 nvme_show_int_function(queue_count); 3541 nvme_show_int_function(sqsize); 3542 3543 static ssize_t nvme_sysfs_delete(struct device *dev, 3544 struct device_attribute *attr, const char *buf, 3545 size_t count) 3546 { 3547 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 3548 3549 if (device_remove_file_self(dev, attr)) 3550 nvme_delete_ctrl_sync(ctrl); 3551 return count; 3552 } 3553 static DEVICE_ATTR(delete_controller, S_IWUSR, NULL, nvme_sysfs_delete); 3554 3555 static ssize_t nvme_sysfs_show_transport(struct device *dev, 3556 struct device_attribute *attr, 3557 char *buf) 3558 { 3559 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 3560 3561 return sysfs_emit(buf, "%s\n", ctrl->ops->name); 3562 } 3563 static DEVICE_ATTR(transport, S_IRUGO, nvme_sysfs_show_transport, NULL); 3564 3565 static ssize_t nvme_sysfs_show_state(struct device *dev, 3566 struct device_attribute *attr, 3567 char *buf) 3568 { 3569 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 3570 static const char *const state_name[] = { 3571 [NVME_CTRL_NEW] = "new", 3572 [NVME_CTRL_LIVE] = "live", 3573 [NVME_CTRL_RESETTING] = "resetting", 3574 [NVME_CTRL_CONNECTING] = "connecting", 3575 [NVME_CTRL_DELETING] = "deleting", 3576 [NVME_CTRL_DELETING_NOIO]= "deleting (no IO)", 3577 [NVME_CTRL_DEAD] = "dead", 3578 }; 3579 3580 if ((unsigned)ctrl->state < ARRAY_SIZE(state_name) && 3581 state_name[ctrl->state]) 3582 return sprintf(buf, "%s\n", state_name[ctrl->state]); 3583 3584 return sprintf(buf, "unknown state\n"); 3585 } 3586 3587 static DEVICE_ATTR(state, S_IRUGO, nvme_sysfs_show_state, NULL); 3588 3589 static ssize_t nvme_sysfs_show_subsysnqn(struct device *dev, 3590 struct device_attribute *attr, 3591 char *buf) 3592 { 3593 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 3594 3595 return sysfs_emit(buf, "%s\n", ctrl->subsys->subnqn); 3596 } 3597 static DEVICE_ATTR(subsysnqn, S_IRUGO, nvme_sysfs_show_subsysnqn, NULL); 3598 3599 static ssize_t nvme_sysfs_show_hostnqn(struct device *dev, 3600 struct device_attribute *attr, 3601 char *buf) 3602 { 3603 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 3604 3605 return sysfs_emit(buf, "%s\n", ctrl->opts->host->nqn); 3606 } 3607 static DEVICE_ATTR(hostnqn, S_IRUGO, nvme_sysfs_show_hostnqn, NULL); 3608 3609 static ssize_t nvme_sysfs_show_hostid(struct device *dev, 3610 struct device_attribute *attr, 3611 char *buf) 3612 { 3613 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 3614 3615 return sysfs_emit(buf, "%pU\n", &ctrl->opts->host->id); 3616 } 3617 static DEVICE_ATTR(hostid, S_IRUGO, nvme_sysfs_show_hostid, NULL); 3618 3619 static ssize_t nvme_sysfs_show_address(struct device *dev, 3620 struct device_attribute *attr, 3621 char *buf) 3622 { 3623 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 3624 3625 return ctrl->ops->get_address(ctrl, buf, PAGE_SIZE); 3626 } 3627 static DEVICE_ATTR(address, S_IRUGO, nvme_sysfs_show_address, NULL); 3628 3629 static ssize_t nvme_ctrl_loss_tmo_show(struct device *dev, 3630 struct device_attribute *attr, char *buf) 3631 { 3632 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 3633 struct nvmf_ctrl_options *opts = ctrl->opts; 3634 3635 if (ctrl->opts->max_reconnects == -1) 3636 return sprintf(buf, "off\n"); 3637 return sprintf(buf, "%d\n", 3638 opts->max_reconnects * opts->reconnect_delay); 3639 } 3640 3641 static ssize_t nvme_ctrl_loss_tmo_store(struct device *dev, 3642 struct device_attribute *attr, const char *buf, size_t count) 3643 { 3644 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 3645 struct nvmf_ctrl_options *opts = ctrl->opts; 3646 int ctrl_loss_tmo, err; 3647 3648 err = kstrtoint(buf, 10, &ctrl_loss_tmo); 3649 if (err) 3650 return -EINVAL; 3651 3652 else if (ctrl_loss_tmo < 0) 3653 opts->max_reconnects = -1; 3654 else 3655 opts->max_reconnects = DIV_ROUND_UP(ctrl_loss_tmo, 3656 opts->reconnect_delay); 3657 return count; 3658 } 3659 static DEVICE_ATTR(ctrl_loss_tmo, S_IRUGO | S_IWUSR, 3660 nvme_ctrl_loss_tmo_show, nvme_ctrl_loss_tmo_store); 3661 3662 static ssize_t nvme_ctrl_reconnect_delay_show(struct device *dev, 3663 struct device_attribute *attr, char *buf) 3664 { 3665 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 3666 3667 if (ctrl->opts->reconnect_delay == -1) 3668 return sprintf(buf, "off\n"); 3669 return sprintf(buf, "%d\n", ctrl->opts->reconnect_delay); 3670 } 3671 3672 static ssize_t nvme_ctrl_reconnect_delay_store(struct device *dev, 3673 struct device_attribute *attr, const char *buf, size_t count) 3674 { 3675 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 3676 unsigned int v; 3677 int err; 3678 3679 err = kstrtou32(buf, 10, &v); 3680 if (err) 3681 return err; 3682 3683 ctrl->opts->reconnect_delay = v; 3684 return count; 3685 } 3686 static DEVICE_ATTR(reconnect_delay, S_IRUGO | S_IWUSR, 3687 nvme_ctrl_reconnect_delay_show, nvme_ctrl_reconnect_delay_store); 3688 3689 static struct attribute *nvme_dev_attrs[] = { 3690 &dev_attr_reset_controller.attr, 3691 &dev_attr_rescan_controller.attr, 3692 &dev_attr_model.attr, 3693 &dev_attr_serial.attr, 3694 &dev_attr_firmware_rev.attr, 3695 &dev_attr_cntlid.attr, 3696 &dev_attr_delete_controller.attr, 3697 &dev_attr_transport.attr, 3698 &dev_attr_subsysnqn.attr, 3699 &dev_attr_address.attr, 3700 &dev_attr_state.attr, 3701 &dev_attr_numa_node.attr, 3702 &dev_attr_queue_count.attr, 3703 &dev_attr_sqsize.attr, 3704 &dev_attr_hostnqn.attr, 3705 &dev_attr_hostid.attr, 3706 &dev_attr_ctrl_loss_tmo.attr, 3707 &dev_attr_reconnect_delay.attr, 3708 NULL 3709 }; 3710 3711 static umode_t nvme_dev_attrs_are_visible(struct kobject *kobj, 3712 struct attribute *a, int n) 3713 { 3714 struct device *dev = container_of(kobj, struct device, kobj); 3715 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 3716 3717 if (a == &dev_attr_delete_controller.attr && !ctrl->ops->delete_ctrl) 3718 return 0; 3719 if (a == &dev_attr_address.attr && !ctrl->ops->get_address) 3720 return 0; 3721 if (a == &dev_attr_hostnqn.attr && !ctrl->opts) 3722 return 0; 3723 if (a == &dev_attr_hostid.attr && !ctrl->opts) 3724 return 0; 3725 if (a == &dev_attr_ctrl_loss_tmo.attr && !ctrl->opts) 3726 return 0; 3727 if (a == &dev_attr_reconnect_delay.attr && !ctrl->opts) 3728 return 0; 3729 3730 return a->mode; 3731 } 3732 3733 static const struct attribute_group nvme_dev_attrs_group = { 3734 .attrs = nvme_dev_attrs, 3735 .is_visible = nvme_dev_attrs_are_visible, 3736 }; 3737 3738 static const struct attribute_group *nvme_dev_attr_groups[] = { 3739 &nvme_dev_attrs_group, 3740 NULL, 3741 }; 3742 3743 static struct nvme_ns_head *nvme_find_ns_head(struct nvme_subsystem *subsys, 3744 unsigned nsid) 3745 { 3746 struct nvme_ns_head *h; 3747 3748 lockdep_assert_held(&subsys->lock); 3749 3750 list_for_each_entry(h, &subsys->nsheads, entry) { 3751 if (h->ns_id == nsid && kref_get_unless_zero(&h->ref)) 3752 return h; 3753 } 3754 3755 return NULL; 3756 } 3757 3758 static int __nvme_check_ids(struct nvme_subsystem *subsys, 3759 struct nvme_ns_head *new) 3760 { 3761 struct nvme_ns_head *h; 3762 3763 lockdep_assert_held(&subsys->lock); 3764 3765 list_for_each_entry(h, &subsys->nsheads, entry) { 3766 if (nvme_ns_ids_valid(&new->ids) && 3767 nvme_ns_ids_equal(&new->ids, &h->ids)) 3768 return -EINVAL; 3769 } 3770 3771 return 0; 3772 } 3773 3774 static struct nvme_ns_head *nvme_alloc_ns_head(struct nvme_ctrl *ctrl, 3775 unsigned nsid, struct nvme_ns_ids *ids) 3776 { 3777 struct nvme_ns_head *head; 3778 size_t size = sizeof(*head); 3779 int ret = -ENOMEM; 3780 3781 #ifdef CONFIG_NVME_MULTIPATH 3782 size += num_possible_nodes() * sizeof(struct nvme_ns *); 3783 #endif 3784 3785 head = kzalloc(size, GFP_KERNEL); 3786 if (!head) 3787 goto out; 3788 ret = ida_simple_get(&ctrl->subsys->ns_ida, 1, 0, GFP_KERNEL); 3789 if (ret < 0) 3790 goto out_free_head; 3791 head->instance = ret; 3792 INIT_LIST_HEAD(&head->list); 3793 ret = init_srcu_struct(&head->srcu); 3794 if (ret) 3795 goto out_ida_remove; 3796 head->subsys = ctrl->subsys; 3797 head->ns_id = nsid; 3798 head->ids = *ids; 3799 kref_init(&head->ref); 3800 3801 ret = __nvme_check_ids(ctrl->subsys, head); 3802 if (ret) { 3803 dev_err(ctrl->device, 3804 "duplicate IDs for nsid %d\n", nsid); 3805 goto out_cleanup_srcu; 3806 } 3807 3808 if (head->ids.csi) { 3809 ret = nvme_get_effects_log(ctrl, head->ids.csi, &head->effects); 3810 if (ret) 3811 goto out_cleanup_srcu; 3812 } else 3813 head->effects = ctrl->effects; 3814 3815 ret = nvme_mpath_alloc_disk(ctrl, head); 3816 if (ret) 3817 goto out_cleanup_srcu; 3818 3819 list_add_tail(&head->entry, &ctrl->subsys->nsheads); 3820 3821 kref_get(&ctrl->subsys->ref); 3822 3823 return head; 3824 out_cleanup_srcu: 3825 cleanup_srcu_struct(&head->srcu); 3826 out_ida_remove: 3827 ida_simple_remove(&ctrl->subsys->ns_ida, head->instance); 3828 out_free_head: 3829 kfree(head); 3830 out: 3831 if (ret > 0) 3832 ret = blk_status_to_errno(nvme_error_status(ret)); 3833 return ERR_PTR(ret); 3834 } 3835 3836 static int nvme_init_ns_head(struct nvme_ns *ns, unsigned nsid, 3837 struct nvme_ns_ids *ids, bool is_shared) 3838 { 3839 struct nvme_ctrl *ctrl = ns->ctrl; 3840 struct nvme_ns_head *head = NULL; 3841 int ret = 0; 3842 3843 mutex_lock(&ctrl->subsys->lock); 3844 head = nvme_find_ns_head(ctrl->subsys, nsid); 3845 if (!head) { 3846 head = nvme_alloc_ns_head(ctrl, nsid, ids); 3847 if (IS_ERR(head)) { 3848 ret = PTR_ERR(head); 3849 goto out_unlock; 3850 } 3851 head->shared = is_shared; 3852 } else { 3853 ret = -EINVAL; 3854 if (!is_shared || !head->shared) { 3855 dev_err(ctrl->device, 3856 "Duplicate unshared namespace %d\n", nsid); 3857 goto out_put_ns_head; 3858 } 3859 if (!nvme_ns_ids_equal(&head->ids, ids)) { 3860 dev_err(ctrl->device, 3861 "IDs don't match for shared namespace %d\n", 3862 nsid); 3863 goto out_put_ns_head; 3864 } 3865 } 3866 3867 list_add_tail_rcu(&ns->siblings, &head->list); 3868 ns->head = head; 3869 mutex_unlock(&ctrl->subsys->lock); 3870 return 0; 3871 3872 out_put_ns_head: 3873 nvme_put_ns_head(head); 3874 out_unlock: 3875 mutex_unlock(&ctrl->subsys->lock); 3876 return ret; 3877 } 3878 3879 static int ns_cmp(void *priv, struct list_head *a, struct list_head *b) 3880 { 3881 struct nvme_ns *nsa = container_of(a, struct nvme_ns, list); 3882 struct nvme_ns *nsb = container_of(b, struct nvme_ns, list); 3883 3884 return nsa->head->ns_id - nsb->head->ns_id; 3885 } 3886 3887 struct nvme_ns *nvme_find_get_ns(struct nvme_ctrl *ctrl, unsigned nsid) 3888 { 3889 struct nvme_ns *ns, *ret = NULL; 3890 3891 down_read(&ctrl->namespaces_rwsem); 3892 list_for_each_entry(ns, &ctrl->namespaces, list) { 3893 if (ns->head->ns_id == nsid) { 3894 if (!kref_get_unless_zero(&ns->kref)) 3895 continue; 3896 ret = ns; 3897 break; 3898 } 3899 if (ns->head->ns_id > nsid) 3900 break; 3901 } 3902 up_read(&ctrl->namespaces_rwsem); 3903 return ret; 3904 } 3905 EXPORT_SYMBOL_NS_GPL(nvme_find_get_ns, NVME_TARGET_PASSTHRU); 3906 3907 static void nvme_alloc_ns(struct nvme_ctrl *ctrl, unsigned nsid, 3908 struct nvme_ns_ids *ids) 3909 { 3910 struct nvme_ns *ns; 3911 struct gendisk *disk; 3912 struct nvme_id_ns *id; 3913 char disk_name[DISK_NAME_LEN]; 3914 int node = ctrl->numa_node, flags = GENHD_FL_EXT_DEVT; 3915 3916 if (nvme_identify_ns(ctrl, nsid, ids, &id)) 3917 return; 3918 3919 ns = kzalloc_node(sizeof(*ns), GFP_KERNEL, node); 3920 if (!ns) 3921 goto out_free_id; 3922 3923 ns->queue = blk_mq_init_queue(ctrl->tagset); 3924 if (IS_ERR(ns->queue)) 3925 goto out_free_ns; 3926 3927 if (ctrl->opts && ctrl->opts->data_digest) 3928 blk_queue_flag_set(QUEUE_FLAG_STABLE_WRITES, ns->queue); 3929 3930 blk_queue_flag_set(QUEUE_FLAG_NONROT, ns->queue); 3931 if (ctrl->ops->flags & NVME_F_PCI_P2PDMA) 3932 blk_queue_flag_set(QUEUE_FLAG_PCI_P2PDMA, ns->queue); 3933 3934 ns->queue->queuedata = ns; 3935 ns->ctrl = ctrl; 3936 kref_init(&ns->kref); 3937 3938 if (nvme_init_ns_head(ns, nsid, ids, id->nmic & NVME_NS_NMIC_SHARED)) 3939 goto out_free_queue; 3940 nvme_set_disk_name(disk_name, ns, ctrl, &flags); 3941 3942 disk = alloc_disk_node(0, node); 3943 if (!disk) 3944 goto out_unlink_ns; 3945 3946 disk->fops = &nvme_bdev_ops; 3947 disk->private_data = ns; 3948 disk->queue = ns->queue; 3949 disk->flags = flags; 3950 memcpy(disk->disk_name, disk_name, DISK_NAME_LEN); 3951 ns->disk = disk; 3952 3953 if (nvme_update_ns_info(ns, id)) 3954 goto out_put_disk; 3955 3956 if ((ctrl->quirks & NVME_QUIRK_LIGHTNVM) && id->vs[0] == 0x1) { 3957 if (nvme_nvm_register(ns, disk_name, node)) { 3958 dev_warn(ctrl->device, "LightNVM init failure\n"); 3959 goto out_put_disk; 3960 } 3961 } 3962 3963 down_write(&ctrl->namespaces_rwsem); 3964 list_add_tail(&ns->list, &ctrl->namespaces); 3965 up_write(&ctrl->namespaces_rwsem); 3966 3967 nvme_get_ctrl(ctrl); 3968 3969 device_add_disk(ctrl->device, ns->disk, nvme_ns_id_attr_groups); 3970 3971 nvme_mpath_add_disk(ns, id); 3972 nvme_fault_inject_init(&ns->fault_inject, ns->disk->disk_name); 3973 kfree(id); 3974 3975 return; 3976 out_put_disk: 3977 /* prevent double queue cleanup */ 3978 ns->disk->queue = NULL; 3979 put_disk(ns->disk); 3980 out_unlink_ns: 3981 mutex_lock(&ctrl->subsys->lock); 3982 list_del_rcu(&ns->siblings); 3983 if (list_empty(&ns->head->list)) 3984 list_del_init(&ns->head->entry); 3985 mutex_unlock(&ctrl->subsys->lock); 3986 nvme_put_ns_head(ns->head); 3987 out_free_queue: 3988 blk_cleanup_queue(ns->queue); 3989 out_free_ns: 3990 kfree(ns); 3991 out_free_id: 3992 kfree(id); 3993 } 3994 3995 static void nvme_ns_remove(struct nvme_ns *ns) 3996 { 3997 if (test_and_set_bit(NVME_NS_REMOVING, &ns->flags)) 3998 return; 3999 4000 set_capacity(ns->disk, 0); 4001 nvme_fault_inject_fini(&ns->fault_inject); 4002 4003 mutex_lock(&ns->ctrl->subsys->lock); 4004 list_del_rcu(&ns->siblings); 4005 if (list_empty(&ns->head->list)) 4006 list_del_init(&ns->head->entry); 4007 mutex_unlock(&ns->ctrl->subsys->lock); 4008 4009 synchronize_rcu(); /* guarantee not available in head->list */ 4010 nvme_mpath_clear_current_path(ns); 4011 synchronize_srcu(&ns->head->srcu); /* wait for concurrent submissions */ 4012 4013 if (ns->disk->flags & GENHD_FL_UP) { 4014 del_gendisk(ns->disk); 4015 blk_cleanup_queue(ns->queue); 4016 if (blk_get_integrity(ns->disk)) 4017 blk_integrity_unregister(ns->disk); 4018 } 4019 4020 down_write(&ns->ctrl->namespaces_rwsem); 4021 list_del_init(&ns->list); 4022 up_write(&ns->ctrl->namespaces_rwsem); 4023 4024 nvme_mpath_check_last_path(ns); 4025 nvme_put_ns(ns); 4026 } 4027 4028 static void nvme_ns_remove_by_nsid(struct nvme_ctrl *ctrl, u32 nsid) 4029 { 4030 struct nvme_ns *ns = nvme_find_get_ns(ctrl, nsid); 4031 4032 if (ns) { 4033 nvme_ns_remove(ns); 4034 nvme_put_ns(ns); 4035 } 4036 } 4037 4038 static void nvme_validate_ns(struct nvme_ns *ns, struct nvme_ns_ids *ids) 4039 { 4040 struct nvme_id_ns *id; 4041 int ret = -ENODEV; 4042 4043 if (test_bit(NVME_NS_DEAD, &ns->flags)) 4044 goto out; 4045 4046 ret = nvme_identify_ns(ns->ctrl, ns->head->ns_id, ids, &id); 4047 if (ret) 4048 goto out; 4049 4050 ret = -ENODEV; 4051 if (!nvme_ns_ids_equal(&ns->head->ids, ids)) { 4052 dev_err(ns->ctrl->device, 4053 "identifiers changed for nsid %d\n", ns->head->ns_id); 4054 goto out_free_id; 4055 } 4056 4057 ret = nvme_update_ns_info(ns, id); 4058 4059 out_free_id: 4060 kfree(id); 4061 out: 4062 /* 4063 * Only remove the namespace if we got a fatal error back from the 4064 * device, otherwise ignore the error and just move on. 4065 * 4066 * TODO: we should probably schedule a delayed retry here. 4067 */ 4068 if (ret && ret != -ENOMEM && !(ret > 0 && !(ret & NVME_SC_DNR))) 4069 nvme_ns_remove(ns); 4070 } 4071 4072 static void nvme_validate_or_alloc_ns(struct nvme_ctrl *ctrl, unsigned nsid) 4073 { 4074 struct nvme_ns_ids ids = { }; 4075 struct nvme_ns *ns; 4076 4077 if (nvme_identify_ns_descs(ctrl, nsid, &ids)) 4078 return; 4079 4080 ns = nvme_find_get_ns(ctrl, nsid); 4081 if (ns) { 4082 nvme_validate_ns(ns, &ids); 4083 nvme_put_ns(ns); 4084 return; 4085 } 4086 4087 switch (ids.csi) { 4088 case NVME_CSI_NVM: 4089 nvme_alloc_ns(ctrl, nsid, &ids); 4090 break; 4091 case NVME_CSI_ZNS: 4092 if (!IS_ENABLED(CONFIG_BLK_DEV_ZONED)) { 4093 dev_warn(ctrl->device, 4094 "nsid %u not supported without CONFIG_BLK_DEV_ZONED\n", 4095 nsid); 4096 break; 4097 } 4098 nvme_alloc_ns(ctrl, nsid, &ids); 4099 break; 4100 default: 4101 dev_warn(ctrl->device, "unknown csi %u for nsid %u\n", 4102 ids.csi, nsid); 4103 break; 4104 } 4105 } 4106 4107 static void nvme_remove_invalid_namespaces(struct nvme_ctrl *ctrl, 4108 unsigned nsid) 4109 { 4110 struct nvme_ns *ns, *next; 4111 LIST_HEAD(rm_list); 4112 4113 down_write(&ctrl->namespaces_rwsem); 4114 list_for_each_entry_safe(ns, next, &ctrl->namespaces, list) { 4115 if (ns->head->ns_id > nsid || test_bit(NVME_NS_DEAD, &ns->flags)) 4116 list_move_tail(&ns->list, &rm_list); 4117 } 4118 up_write(&ctrl->namespaces_rwsem); 4119 4120 list_for_each_entry_safe(ns, next, &rm_list, list) 4121 nvme_ns_remove(ns); 4122 4123 } 4124 4125 static int nvme_scan_ns_list(struct nvme_ctrl *ctrl) 4126 { 4127 const int nr_entries = NVME_IDENTIFY_DATA_SIZE / sizeof(__le32); 4128 __le32 *ns_list; 4129 u32 prev = 0; 4130 int ret = 0, i; 4131 4132 if (nvme_ctrl_limited_cns(ctrl)) 4133 return -EOPNOTSUPP; 4134 4135 ns_list = kzalloc(NVME_IDENTIFY_DATA_SIZE, GFP_KERNEL); 4136 if (!ns_list) 4137 return -ENOMEM; 4138 4139 for (;;) { 4140 struct nvme_command cmd = { 4141 .identify.opcode = nvme_admin_identify, 4142 .identify.cns = NVME_ID_CNS_NS_ACTIVE_LIST, 4143 .identify.nsid = cpu_to_le32(prev), 4144 }; 4145 4146 ret = nvme_submit_sync_cmd(ctrl->admin_q, &cmd, ns_list, 4147 NVME_IDENTIFY_DATA_SIZE); 4148 if (ret) { 4149 dev_warn(ctrl->device, 4150 "Identify NS List failed (status=0x%x)\n", ret); 4151 goto free; 4152 } 4153 4154 for (i = 0; i < nr_entries; i++) { 4155 u32 nsid = le32_to_cpu(ns_list[i]); 4156 4157 if (!nsid) /* end of the list? */ 4158 goto out; 4159 nvme_validate_or_alloc_ns(ctrl, nsid); 4160 while (++prev < nsid) 4161 nvme_ns_remove_by_nsid(ctrl, prev); 4162 } 4163 } 4164 out: 4165 nvme_remove_invalid_namespaces(ctrl, prev); 4166 free: 4167 kfree(ns_list); 4168 return ret; 4169 } 4170 4171 static void nvme_scan_ns_sequential(struct nvme_ctrl *ctrl) 4172 { 4173 struct nvme_id_ctrl *id; 4174 u32 nn, i; 4175 4176 if (nvme_identify_ctrl(ctrl, &id)) 4177 return; 4178 nn = le32_to_cpu(id->nn); 4179 kfree(id); 4180 4181 for (i = 1; i <= nn; i++) 4182 nvme_validate_or_alloc_ns(ctrl, i); 4183 4184 nvme_remove_invalid_namespaces(ctrl, nn); 4185 } 4186 4187 static void nvme_clear_changed_ns_log(struct nvme_ctrl *ctrl) 4188 { 4189 size_t log_size = NVME_MAX_CHANGED_NAMESPACES * sizeof(__le32); 4190 __le32 *log; 4191 int error; 4192 4193 log = kzalloc(log_size, GFP_KERNEL); 4194 if (!log) 4195 return; 4196 4197 /* 4198 * We need to read the log to clear the AEN, but we don't want to rely 4199 * on it for the changed namespace information as userspace could have 4200 * raced with us in reading the log page, which could cause us to miss 4201 * updates. 4202 */ 4203 error = nvme_get_log(ctrl, NVME_NSID_ALL, NVME_LOG_CHANGED_NS, 0, 4204 NVME_CSI_NVM, log, log_size, 0); 4205 if (error) 4206 dev_warn(ctrl->device, 4207 "reading changed ns log failed: %d\n", error); 4208 4209 kfree(log); 4210 } 4211 4212 static void nvme_scan_work(struct work_struct *work) 4213 { 4214 struct nvme_ctrl *ctrl = 4215 container_of(work, struct nvme_ctrl, scan_work); 4216 4217 /* No tagset on a live ctrl means IO queues could not created */ 4218 if (ctrl->state != NVME_CTRL_LIVE || !ctrl->tagset) 4219 return; 4220 4221 if (test_and_clear_bit(NVME_AER_NOTICE_NS_CHANGED, &ctrl->events)) { 4222 dev_info(ctrl->device, "rescanning namespaces.\n"); 4223 nvme_clear_changed_ns_log(ctrl); 4224 } 4225 4226 mutex_lock(&ctrl->scan_lock); 4227 if (nvme_scan_ns_list(ctrl) != 0) 4228 nvme_scan_ns_sequential(ctrl); 4229 mutex_unlock(&ctrl->scan_lock); 4230 4231 down_write(&ctrl->namespaces_rwsem); 4232 list_sort(NULL, &ctrl->namespaces, ns_cmp); 4233 up_write(&ctrl->namespaces_rwsem); 4234 } 4235 4236 /* 4237 * This function iterates the namespace list unlocked to allow recovery from 4238 * controller failure. It is up to the caller to ensure the namespace list is 4239 * not modified by scan work while this function is executing. 4240 */ 4241 void nvme_remove_namespaces(struct nvme_ctrl *ctrl) 4242 { 4243 struct nvme_ns *ns, *next; 4244 LIST_HEAD(ns_list); 4245 4246 /* 4247 * make sure to requeue I/O to all namespaces as these 4248 * might result from the scan itself and must complete 4249 * for the scan_work to make progress 4250 */ 4251 nvme_mpath_clear_ctrl_paths(ctrl); 4252 4253 /* prevent racing with ns scanning */ 4254 flush_work(&ctrl->scan_work); 4255 4256 /* 4257 * The dead states indicates the controller was not gracefully 4258 * disconnected. In that case, we won't be able to flush any data while 4259 * removing the namespaces' disks; fail all the queues now to avoid 4260 * potentially having to clean up the failed sync later. 4261 */ 4262 if (ctrl->state == NVME_CTRL_DEAD) 4263 nvme_kill_queues(ctrl); 4264 4265 /* this is a no-op when called from the controller reset handler */ 4266 nvme_change_ctrl_state(ctrl, NVME_CTRL_DELETING_NOIO); 4267 4268 down_write(&ctrl->namespaces_rwsem); 4269 list_splice_init(&ctrl->namespaces, &ns_list); 4270 up_write(&ctrl->namespaces_rwsem); 4271 4272 list_for_each_entry_safe(ns, next, &ns_list, list) 4273 nvme_ns_remove(ns); 4274 } 4275 EXPORT_SYMBOL_GPL(nvme_remove_namespaces); 4276 4277 static int nvme_class_uevent(struct device *dev, struct kobj_uevent_env *env) 4278 { 4279 struct nvme_ctrl *ctrl = 4280 container_of(dev, struct nvme_ctrl, ctrl_device); 4281 struct nvmf_ctrl_options *opts = ctrl->opts; 4282 int ret; 4283 4284 ret = add_uevent_var(env, "NVME_TRTYPE=%s", ctrl->ops->name); 4285 if (ret) 4286 return ret; 4287 4288 if (opts) { 4289 ret = add_uevent_var(env, "NVME_TRADDR=%s", opts->traddr); 4290 if (ret) 4291 return ret; 4292 4293 ret = add_uevent_var(env, "NVME_TRSVCID=%s", 4294 opts->trsvcid ?: "none"); 4295 if (ret) 4296 return ret; 4297 4298 ret = add_uevent_var(env, "NVME_HOST_TRADDR=%s", 4299 opts->host_traddr ?: "none"); 4300 } 4301 return ret; 4302 } 4303 4304 static void nvme_aen_uevent(struct nvme_ctrl *ctrl) 4305 { 4306 char *envp[2] = { NULL, NULL }; 4307 u32 aen_result = ctrl->aen_result; 4308 4309 ctrl->aen_result = 0; 4310 if (!aen_result) 4311 return; 4312 4313 envp[0] = kasprintf(GFP_KERNEL, "NVME_AEN=%#08x", aen_result); 4314 if (!envp[0]) 4315 return; 4316 kobject_uevent_env(&ctrl->device->kobj, KOBJ_CHANGE, envp); 4317 kfree(envp[0]); 4318 } 4319 4320 static void nvme_async_event_work(struct work_struct *work) 4321 { 4322 struct nvme_ctrl *ctrl = 4323 container_of(work, struct nvme_ctrl, async_event_work); 4324 4325 nvme_aen_uevent(ctrl); 4326 ctrl->ops->submit_async_event(ctrl); 4327 } 4328 4329 static bool nvme_ctrl_pp_status(struct nvme_ctrl *ctrl) 4330 { 4331 4332 u32 csts; 4333 4334 if (ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts)) 4335 return false; 4336 4337 if (csts == ~0) 4338 return false; 4339 4340 return ((ctrl->ctrl_config & NVME_CC_ENABLE) && (csts & NVME_CSTS_PP)); 4341 } 4342 4343 static void nvme_get_fw_slot_info(struct nvme_ctrl *ctrl) 4344 { 4345 struct nvme_fw_slot_info_log *log; 4346 4347 log = kmalloc(sizeof(*log), GFP_KERNEL); 4348 if (!log) 4349 return; 4350 4351 if (nvme_get_log(ctrl, NVME_NSID_ALL, NVME_LOG_FW_SLOT, 0, NVME_CSI_NVM, 4352 log, sizeof(*log), 0)) 4353 dev_warn(ctrl->device, "Get FW SLOT INFO log error\n"); 4354 kfree(log); 4355 } 4356 4357 static void nvme_fw_act_work(struct work_struct *work) 4358 { 4359 struct nvme_ctrl *ctrl = container_of(work, 4360 struct nvme_ctrl, fw_act_work); 4361 unsigned long fw_act_timeout; 4362 4363 if (ctrl->mtfa) 4364 fw_act_timeout = jiffies + 4365 msecs_to_jiffies(ctrl->mtfa * 100); 4366 else 4367 fw_act_timeout = jiffies + 4368 msecs_to_jiffies(admin_timeout * 1000); 4369 4370 nvme_stop_queues(ctrl); 4371 while (nvme_ctrl_pp_status(ctrl)) { 4372 if (time_after(jiffies, fw_act_timeout)) { 4373 dev_warn(ctrl->device, 4374 "Fw activation timeout, reset controller\n"); 4375 nvme_try_sched_reset(ctrl); 4376 return; 4377 } 4378 msleep(100); 4379 } 4380 4381 if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_LIVE)) 4382 return; 4383 4384 nvme_start_queues(ctrl); 4385 /* read FW slot information to clear the AER */ 4386 nvme_get_fw_slot_info(ctrl); 4387 } 4388 4389 static void nvme_handle_aen_notice(struct nvme_ctrl *ctrl, u32 result) 4390 { 4391 u32 aer_notice_type = (result & 0xff00) >> 8; 4392 4393 trace_nvme_async_event(ctrl, aer_notice_type); 4394 4395 switch (aer_notice_type) { 4396 case NVME_AER_NOTICE_NS_CHANGED: 4397 set_bit(NVME_AER_NOTICE_NS_CHANGED, &ctrl->events); 4398 nvme_queue_scan(ctrl); 4399 break; 4400 case NVME_AER_NOTICE_FW_ACT_STARTING: 4401 /* 4402 * We are (ab)using the RESETTING state to prevent subsequent 4403 * recovery actions from interfering with the controller's 4404 * firmware activation. 4405 */ 4406 if (nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING)) 4407 queue_work(nvme_wq, &ctrl->fw_act_work); 4408 break; 4409 #ifdef CONFIG_NVME_MULTIPATH 4410 case NVME_AER_NOTICE_ANA: 4411 if (!ctrl->ana_log_buf) 4412 break; 4413 queue_work(nvme_wq, &ctrl->ana_work); 4414 break; 4415 #endif 4416 case NVME_AER_NOTICE_DISC_CHANGED: 4417 ctrl->aen_result = result; 4418 break; 4419 default: 4420 dev_warn(ctrl->device, "async event result %08x\n", result); 4421 } 4422 } 4423 4424 void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status, 4425 volatile union nvme_result *res) 4426 { 4427 u32 result = le32_to_cpu(res->u32); 4428 u32 aer_type = result & 0x07; 4429 4430 if (le16_to_cpu(status) >> 1 != NVME_SC_SUCCESS) 4431 return; 4432 4433 switch (aer_type) { 4434 case NVME_AER_NOTICE: 4435 nvme_handle_aen_notice(ctrl, result); 4436 break; 4437 case NVME_AER_ERROR: 4438 case NVME_AER_SMART: 4439 case NVME_AER_CSS: 4440 case NVME_AER_VS: 4441 trace_nvme_async_event(ctrl, aer_type); 4442 ctrl->aen_result = result; 4443 break; 4444 default: 4445 break; 4446 } 4447 queue_work(nvme_wq, &ctrl->async_event_work); 4448 } 4449 EXPORT_SYMBOL_GPL(nvme_complete_async_event); 4450 4451 void nvme_stop_ctrl(struct nvme_ctrl *ctrl) 4452 { 4453 nvme_mpath_stop(ctrl); 4454 nvme_stop_keep_alive(ctrl); 4455 nvme_stop_failfast_work(ctrl); 4456 flush_work(&ctrl->async_event_work); 4457 cancel_work_sync(&ctrl->fw_act_work); 4458 } 4459 EXPORT_SYMBOL_GPL(nvme_stop_ctrl); 4460 4461 void nvme_start_ctrl(struct nvme_ctrl *ctrl) 4462 { 4463 nvme_start_keep_alive(ctrl); 4464 4465 nvme_enable_aen(ctrl); 4466 4467 if (ctrl->queue_count > 1) { 4468 nvme_queue_scan(ctrl); 4469 nvme_start_queues(ctrl); 4470 } 4471 } 4472 EXPORT_SYMBOL_GPL(nvme_start_ctrl); 4473 4474 void nvme_uninit_ctrl(struct nvme_ctrl *ctrl) 4475 { 4476 nvme_hwmon_exit(ctrl); 4477 nvme_fault_inject_fini(&ctrl->fault_inject); 4478 dev_pm_qos_hide_latency_tolerance(ctrl->device); 4479 cdev_device_del(&ctrl->cdev, ctrl->device); 4480 nvme_put_ctrl(ctrl); 4481 } 4482 EXPORT_SYMBOL_GPL(nvme_uninit_ctrl); 4483 4484 static void nvme_free_cels(struct nvme_ctrl *ctrl) 4485 { 4486 struct nvme_effects_log *cel; 4487 unsigned long i; 4488 4489 xa_for_each(&ctrl->cels, i, cel) { 4490 xa_erase(&ctrl->cels, i); 4491 kfree(cel); 4492 } 4493 4494 xa_destroy(&ctrl->cels); 4495 } 4496 4497 static void nvme_free_ctrl(struct device *dev) 4498 { 4499 struct nvme_ctrl *ctrl = 4500 container_of(dev, struct nvme_ctrl, ctrl_device); 4501 struct nvme_subsystem *subsys = ctrl->subsys; 4502 4503 if (!subsys || ctrl->instance != subsys->instance) 4504 ida_simple_remove(&nvme_instance_ida, ctrl->instance); 4505 4506 nvme_free_cels(ctrl); 4507 nvme_mpath_uninit(ctrl); 4508 __free_page(ctrl->discard_page); 4509 4510 if (subsys) { 4511 mutex_lock(&nvme_subsystems_lock); 4512 list_del(&ctrl->subsys_entry); 4513 sysfs_remove_link(&subsys->dev.kobj, dev_name(ctrl->device)); 4514 mutex_unlock(&nvme_subsystems_lock); 4515 } 4516 4517 ctrl->ops->free_ctrl(ctrl); 4518 4519 if (subsys) 4520 nvme_put_subsystem(subsys); 4521 } 4522 4523 /* 4524 * Initialize a NVMe controller structures. This needs to be called during 4525 * earliest initialization so that we have the initialized structured around 4526 * during probing. 4527 */ 4528 int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev, 4529 const struct nvme_ctrl_ops *ops, unsigned long quirks) 4530 { 4531 int ret; 4532 4533 ctrl->state = NVME_CTRL_NEW; 4534 clear_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags); 4535 spin_lock_init(&ctrl->lock); 4536 mutex_init(&ctrl->scan_lock); 4537 INIT_LIST_HEAD(&ctrl->namespaces); 4538 xa_init(&ctrl->cels); 4539 init_rwsem(&ctrl->namespaces_rwsem); 4540 ctrl->dev = dev; 4541 ctrl->ops = ops; 4542 ctrl->quirks = quirks; 4543 ctrl->numa_node = NUMA_NO_NODE; 4544 INIT_WORK(&ctrl->scan_work, nvme_scan_work); 4545 INIT_WORK(&ctrl->async_event_work, nvme_async_event_work); 4546 INIT_WORK(&ctrl->fw_act_work, nvme_fw_act_work); 4547 INIT_WORK(&ctrl->delete_work, nvme_delete_ctrl_work); 4548 init_waitqueue_head(&ctrl->state_wq); 4549 4550 INIT_DELAYED_WORK(&ctrl->ka_work, nvme_keep_alive_work); 4551 INIT_DELAYED_WORK(&ctrl->failfast_work, nvme_failfast_work); 4552 memset(&ctrl->ka_cmd, 0, sizeof(ctrl->ka_cmd)); 4553 ctrl->ka_cmd.common.opcode = nvme_admin_keep_alive; 4554 4555 BUILD_BUG_ON(NVME_DSM_MAX_RANGES * sizeof(struct nvme_dsm_range) > 4556 PAGE_SIZE); 4557 ctrl->discard_page = alloc_page(GFP_KERNEL); 4558 if (!ctrl->discard_page) { 4559 ret = -ENOMEM; 4560 goto out; 4561 } 4562 4563 ret = ida_simple_get(&nvme_instance_ida, 0, 0, GFP_KERNEL); 4564 if (ret < 0) 4565 goto out; 4566 ctrl->instance = ret; 4567 4568 device_initialize(&ctrl->ctrl_device); 4569 ctrl->device = &ctrl->ctrl_device; 4570 ctrl->device->devt = MKDEV(MAJOR(nvme_ctrl_base_chr_devt), 4571 ctrl->instance); 4572 ctrl->device->class = nvme_class; 4573 ctrl->device->parent = ctrl->dev; 4574 ctrl->device->groups = nvme_dev_attr_groups; 4575 ctrl->device->release = nvme_free_ctrl; 4576 dev_set_drvdata(ctrl->device, ctrl); 4577 ret = dev_set_name(ctrl->device, "nvme%d", ctrl->instance); 4578 if (ret) 4579 goto out_release_instance; 4580 4581 nvme_get_ctrl(ctrl); 4582 cdev_init(&ctrl->cdev, &nvme_dev_fops); 4583 ctrl->cdev.owner = ops->module; 4584 ret = cdev_device_add(&ctrl->cdev, ctrl->device); 4585 if (ret) 4586 goto out_free_name; 4587 4588 /* 4589 * Initialize latency tolerance controls. The sysfs files won't 4590 * be visible to userspace unless the device actually supports APST. 4591 */ 4592 ctrl->device->power.set_latency_tolerance = nvme_set_latency_tolerance; 4593 dev_pm_qos_update_user_latency_tolerance(ctrl->device, 4594 min(default_ps_max_latency_us, (unsigned long)S32_MAX)); 4595 4596 nvme_fault_inject_init(&ctrl->fault_inject, dev_name(ctrl->device)); 4597 4598 return 0; 4599 out_free_name: 4600 nvme_put_ctrl(ctrl); 4601 kfree_const(ctrl->device->kobj.name); 4602 out_release_instance: 4603 ida_simple_remove(&nvme_instance_ida, ctrl->instance); 4604 out: 4605 if (ctrl->discard_page) 4606 __free_page(ctrl->discard_page); 4607 return ret; 4608 } 4609 EXPORT_SYMBOL_GPL(nvme_init_ctrl); 4610 4611 /** 4612 * nvme_kill_queues(): Ends all namespace queues 4613 * @ctrl: the dead controller that needs to end 4614 * 4615 * Call this function when the driver determines it is unable to get the 4616 * controller in a state capable of servicing IO. 4617 */ 4618 void nvme_kill_queues(struct nvme_ctrl *ctrl) 4619 { 4620 struct nvme_ns *ns; 4621 4622 down_read(&ctrl->namespaces_rwsem); 4623 4624 /* Forcibly unquiesce queues to avoid blocking dispatch */ 4625 if (ctrl->admin_q && !blk_queue_dying(ctrl->admin_q)) 4626 blk_mq_unquiesce_queue(ctrl->admin_q); 4627 4628 list_for_each_entry(ns, &ctrl->namespaces, list) 4629 nvme_set_queue_dying(ns); 4630 4631 up_read(&ctrl->namespaces_rwsem); 4632 } 4633 EXPORT_SYMBOL_GPL(nvme_kill_queues); 4634 4635 void nvme_unfreeze(struct nvme_ctrl *ctrl) 4636 { 4637 struct nvme_ns *ns; 4638 4639 down_read(&ctrl->namespaces_rwsem); 4640 list_for_each_entry(ns, &ctrl->namespaces, list) 4641 blk_mq_unfreeze_queue(ns->queue); 4642 up_read(&ctrl->namespaces_rwsem); 4643 } 4644 EXPORT_SYMBOL_GPL(nvme_unfreeze); 4645 4646 int nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout) 4647 { 4648 struct nvme_ns *ns; 4649 4650 down_read(&ctrl->namespaces_rwsem); 4651 list_for_each_entry(ns, &ctrl->namespaces, list) { 4652 timeout = blk_mq_freeze_queue_wait_timeout(ns->queue, timeout); 4653 if (timeout <= 0) 4654 break; 4655 } 4656 up_read(&ctrl->namespaces_rwsem); 4657 return timeout; 4658 } 4659 EXPORT_SYMBOL_GPL(nvme_wait_freeze_timeout); 4660 4661 void nvme_wait_freeze(struct nvme_ctrl *ctrl) 4662 { 4663 struct nvme_ns *ns; 4664 4665 down_read(&ctrl->namespaces_rwsem); 4666 list_for_each_entry(ns, &ctrl->namespaces, list) 4667 blk_mq_freeze_queue_wait(ns->queue); 4668 up_read(&ctrl->namespaces_rwsem); 4669 } 4670 EXPORT_SYMBOL_GPL(nvme_wait_freeze); 4671 4672 void nvme_start_freeze(struct nvme_ctrl *ctrl) 4673 { 4674 struct nvme_ns *ns; 4675 4676 down_read(&ctrl->namespaces_rwsem); 4677 list_for_each_entry(ns, &ctrl->namespaces, list) 4678 blk_freeze_queue_start(ns->queue); 4679 up_read(&ctrl->namespaces_rwsem); 4680 } 4681 EXPORT_SYMBOL_GPL(nvme_start_freeze); 4682 4683 void nvme_stop_queues(struct nvme_ctrl *ctrl) 4684 { 4685 struct nvme_ns *ns; 4686 4687 down_read(&ctrl->namespaces_rwsem); 4688 list_for_each_entry(ns, &ctrl->namespaces, list) 4689 blk_mq_quiesce_queue(ns->queue); 4690 up_read(&ctrl->namespaces_rwsem); 4691 } 4692 EXPORT_SYMBOL_GPL(nvme_stop_queues); 4693 4694 void nvme_start_queues(struct nvme_ctrl *ctrl) 4695 { 4696 struct nvme_ns *ns; 4697 4698 down_read(&ctrl->namespaces_rwsem); 4699 list_for_each_entry(ns, &ctrl->namespaces, list) 4700 blk_mq_unquiesce_queue(ns->queue); 4701 up_read(&ctrl->namespaces_rwsem); 4702 } 4703 EXPORT_SYMBOL_GPL(nvme_start_queues); 4704 4705 void nvme_sync_io_queues(struct nvme_ctrl *ctrl) 4706 { 4707 struct nvme_ns *ns; 4708 4709 down_read(&ctrl->namespaces_rwsem); 4710 list_for_each_entry(ns, &ctrl->namespaces, list) 4711 blk_sync_queue(ns->queue); 4712 up_read(&ctrl->namespaces_rwsem); 4713 } 4714 EXPORT_SYMBOL_GPL(nvme_sync_io_queues); 4715 4716 void nvme_sync_queues(struct nvme_ctrl *ctrl) 4717 { 4718 nvme_sync_io_queues(ctrl); 4719 if (ctrl->admin_q) 4720 blk_sync_queue(ctrl->admin_q); 4721 } 4722 EXPORT_SYMBOL_GPL(nvme_sync_queues); 4723 4724 struct nvme_ctrl *nvme_ctrl_from_file(struct file *file) 4725 { 4726 if (file->f_op != &nvme_dev_fops) 4727 return NULL; 4728 return file->private_data; 4729 } 4730 EXPORT_SYMBOL_NS_GPL(nvme_ctrl_from_file, NVME_TARGET_PASSTHRU); 4731 4732 /* 4733 * Check we didn't inadvertently grow the command structure sizes: 4734 */ 4735 static inline void _nvme_check_size(void) 4736 { 4737 BUILD_BUG_ON(sizeof(struct nvme_common_command) != 64); 4738 BUILD_BUG_ON(sizeof(struct nvme_rw_command) != 64); 4739 BUILD_BUG_ON(sizeof(struct nvme_identify) != 64); 4740 BUILD_BUG_ON(sizeof(struct nvme_features) != 64); 4741 BUILD_BUG_ON(sizeof(struct nvme_download_firmware) != 64); 4742 BUILD_BUG_ON(sizeof(struct nvme_format_cmd) != 64); 4743 BUILD_BUG_ON(sizeof(struct nvme_dsm_cmd) != 64); 4744 BUILD_BUG_ON(sizeof(struct nvme_write_zeroes_cmd) != 64); 4745 BUILD_BUG_ON(sizeof(struct nvme_abort_cmd) != 64); 4746 BUILD_BUG_ON(sizeof(struct nvme_get_log_page_command) != 64); 4747 BUILD_BUG_ON(sizeof(struct nvme_command) != 64); 4748 BUILD_BUG_ON(sizeof(struct nvme_id_ctrl) != NVME_IDENTIFY_DATA_SIZE); 4749 BUILD_BUG_ON(sizeof(struct nvme_id_ns) != NVME_IDENTIFY_DATA_SIZE); 4750 BUILD_BUG_ON(sizeof(struct nvme_id_ns_zns) != NVME_IDENTIFY_DATA_SIZE); 4751 BUILD_BUG_ON(sizeof(struct nvme_id_ctrl_zns) != NVME_IDENTIFY_DATA_SIZE); 4752 BUILD_BUG_ON(sizeof(struct nvme_lba_range_type) != 64); 4753 BUILD_BUG_ON(sizeof(struct nvme_smart_log) != 512); 4754 BUILD_BUG_ON(sizeof(struct nvme_dbbuf) != 64); 4755 BUILD_BUG_ON(sizeof(struct nvme_directive_cmd) != 64); 4756 } 4757 4758 4759 static int __init nvme_core_init(void) 4760 { 4761 int result = -ENOMEM; 4762 4763 _nvme_check_size(); 4764 4765 nvme_wq = alloc_workqueue("nvme-wq", 4766 WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_SYSFS, 0); 4767 if (!nvme_wq) 4768 goto out; 4769 4770 nvme_reset_wq = alloc_workqueue("nvme-reset-wq", 4771 WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_SYSFS, 0); 4772 if (!nvme_reset_wq) 4773 goto destroy_wq; 4774 4775 nvme_delete_wq = alloc_workqueue("nvme-delete-wq", 4776 WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_SYSFS, 0); 4777 if (!nvme_delete_wq) 4778 goto destroy_reset_wq; 4779 4780 result = alloc_chrdev_region(&nvme_ctrl_base_chr_devt, 0, 4781 NVME_MINORS, "nvme"); 4782 if (result < 0) 4783 goto destroy_delete_wq; 4784 4785 nvme_class = class_create(THIS_MODULE, "nvme"); 4786 if (IS_ERR(nvme_class)) { 4787 result = PTR_ERR(nvme_class); 4788 goto unregister_chrdev; 4789 } 4790 nvme_class->dev_uevent = nvme_class_uevent; 4791 4792 nvme_subsys_class = class_create(THIS_MODULE, "nvme-subsystem"); 4793 if (IS_ERR(nvme_subsys_class)) { 4794 result = PTR_ERR(nvme_subsys_class); 4795 goto destroy_class; 4796 } 4797 return 0; 4798 4799 destroy_class: 4800 class_destroy(nvme_class); 4801 unregister_chrdev: 4802 unregister_chrdev_region(nvme_ctrl_base_chr_devt, NVME_MINORS); 4803 destroy_delete_wq: 4804 destroy_workqueue(nvme_delete_wq); 4805 destroy_reset_wq: 4806 destroy_workqueue(nvme_reset_wq); 4807 destroy_wq: 4808 destroy_workqueue(nvme_wq); 4809 out: 4810 return result; 4811 } 4812 4813 static void __exit nvme_core_exit(void) 4814 { 4815 class_destroy(nvme_subsys_class); 4816 class_destroy(nvme_class); 4817 unregister_chrdev_region(nvme_ctrl_base_chr_devt, NVME_MINORS); 4818 destroy_workqueue(nvme_delete_wq); 4819 destroy_workqueue(nvme_reset_wq); 4820 destroy_workqueue(nvme_wq); 4821 ida_destroy(&nvme_instance_ida); 4822 } 4823 4824 MODULE_LICENSE("GPL"); 4825 MODULE_VERSION("1.0"); 4826 module_init(nvme_core_init); 4827 module_exit(nvme_core_exit); 4828