1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * NVM Express device driver 4 * Copyright (c) 2011-2014, Intel Corporation. 5 */ 6 7 #include <linux/blkdev.h> 8 #include <linux/blk-mq.h> 9 #include <linux/blk-integrity.h> 10 #include <linux/compat.h> 11 #include <linux/delay.h> 12 #include <linux/errno.h> 13 #include <linux/hdreg.h> 14 #include <linux/kernel.h> 15 #include <linux/module.h> 16 #include <linux/backing-dev.h> 17 #include <linux/slab.h> 18 #include <linux/types.h> 19 #include <linux/pr.h> 20 #include <linux/ptrace.h> 21 #include <linux/nvme_ioctl.h> 22 #include <linux/pm_qos.h> 23 #include <asm/unaligned.h> 24 25 #include "nvme.h" 26 #include "fabrics.h" 27 #include <linux/nvme-auth.h> 28 29 #define CREATE_TRACE_POINTS 30 #include "trace.h" 31 32 #define NVME_MINORS (1U << MINORBITS) 33 34 struct nvme_ns_info { 35 struct nvme_ns_ids ids; 36 u32 nsid; 37 __le32 anagrpid; 38 bool is_shared; 39 bool is_readonly; 40 bool is_ready; 41 }; 42 43 unsigned int admin_timeout = 60; 44 module_param(admin_timeout, uint, 0644); 45 MODULE_PARM_DESC(admin_timeout, "timeout in seconds for admin commands"); 46 EXPORT_SYMBOL_GPL(admin_timeout); 47 48 unsigned int nvme_io_timeout = 30; 49 module_param_named(io_timeout, nvme_io_timeout, uint, 0644); 50 MODULE_PARM_DESC(io_timeout, "timeout in seconds for I/O"); 51 EXPORT_SYMBOL_GPL(nvme_io_timeout); 52 53 static unsigned char shutdown_timeout = 5; 54 module_param(shutdown_timeout, byte, 0644); 55 MODULE_PARM_DESC(shutdown_timeout, "timeout in seconds for controller shutdown"); 56 57 static u8 nvme_max_retries = 5; 58 module_param_named(max_retries, nvme_max_retries, byte, 0644); 59 MODULE_PARM_DESC(max_retries, "max number of retries a command may have"); 60 61 static unsigned long default_ps_max_latency_us = 100000; 62 module_param(default_ps_max_latency_us, ulong, 0644); 63 MODULE_PARM_DESC(default_ps_max_latency_us, 64 "max power saving latency for new devices; use PM QOS to change per device"); 65 66 static bool force_apst; 67 module_param(force_apst, bool, 0644); 68 MODULE_PARM_DESC(force_apst, "allow APST for newly enumerated devices even if quirked off"); 69 70 static unsigned long apst_primary_timeout_ms = 100; 71 module_param(apst_primary_timeout_ms, ulong, 0644); 72 MODULE_PARM_DESC(apst_primary_timeout_ms, 73 "primary APST timeout in ms"); 74 75 static unsigned long apst_secondary_timeout_ms = 2000; 76 module_param(apst_secondary_timeout_ms, ulong, 0644); 77 MODULE_PARM_DESC(apst_secondary_timeout_ms, 78 "secondary APST timeout in ms"); 79 80 static unsigned long apst_primary_latency_tol_us = 15000; 81 module_param(apst_primary_latency_tol_us, ulong, 0644); 82 MODULE_PARM_DESC(apst_primary_latency_tol_us, 83 "primary APST latency tolerance in us"); 84 85 static unsigned long apst_secondary_latency_tol_us = 100000; 86 module_param(apst_secondary_latency_tol_us, ulong, 0644); 87 MODULE_PARM_DESC(apst_secondary_latency_tol_us, 88 "secondary APST latency tolerance in us"); 89 90 /* 91 * nvme_wq - hosts nvme related works that are not reset or delete 92 * nvme_reset_wq - hosts nvme reset works 93 * nvme_delete_wq - hosts nvme delete works 94 * 95 * nvme_wq will host works such as scan, aen handling, fw activation, 96 * keep-alive, periodic reconnects etc. nvme_reset_wq 97 * runs reset works which also flush works hosted on nvme_wq for 98 * serialization purposes. nvme_delete_wq host controller deletion 99 * works which flush reset works for serialization. 100 */ 101 struct workqueue_struct *nvme_wq; 102 EXPORT_SYMBOL_GPL(nvme_wq); 103 104 struct workqueue_struct *nvme_reset_wq; 105 EXPORT_SYMBOL_GPL(nvme_reset_wq); 106 107 struct workqueue_struct *nvme_delete_wq; 108 EXPORT_SYMBOL_GPL(nvme_delete_wq); 109 110 static LIST_HEAD(nvme_subsystems); 111 static DEFINE_MUTEX(nvme_subsystems_lock); 112 113 static DEFINE_IDA(nvme_instance_ida); 114 static dev_t nvme_ctrl_base_chr_devt; 115 static struct class *nvme_class; 116 static struct class *nvme_subsys_class; 117 118 static DEFINE_IDA(nvme_ns_chr_minor_ida); 119 static dev_t nvme_ns_chr_devt; 120 static struct class *nvme_ns_chr_class; 121 122 static void nvme_put_subsystem(struct nvme_subsystem *subsys); 123 static void nvme_remove_invalid_namespaces(struct nvme_ctrl *ctrl, 124 unsigned nsid); 125 static void nvme_update_keep_alive(struct nvme_ctrl *ctrl, 126 struct nvme_command *cmd); 127 128 void nvme_queue_scan(struct nvme_ctrl *ctrl) 129 { 130 /* 131 * Only new queue scan work when admin and IO queues are both alive 132 */ 133 if (ctrl->state == NVME_CTRL_LIVE && ctrl->tagset) 134 queue_work(nvme_wq, &ctrl->scan_work); 135 } 136 137 /* 138 * Use this function to proceed with scheduling reset_work for a controller 139 * that had previously been set to the resetting state. This is intended for 140 * code paths that can't be interrupted by other reset attempts. A hot removal 141 * may prevent this from succeeding. 142 */ 143 int nvme_try_sched_reset(struct nvme_ctrl *ctrl) 144 { 145 if (ctrl->state != NVME_CTRL_RESETTING) 146 return -EBUSY; 147 if (!queue_work(nvme_reset_wq, &ctrl->reset_work)) 148 return -EBUSY; 149 return 0; 150 } 151 EXPORT_SYMBOL_GPL(nvme_try_sched_reset); 152 153 static void nvme_failfast_work(struct work_struct *work) 154 { 155 struct nvme_ctrl *ctrl = container_of(to_delayed_work(work), 156 struct nvme_ctrl, failfast_work); 157 158 if (ctrl->state != NVME_CTRL_CONNECTING) 159 return; 160 161 set_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags); 162 dev_info(ctrl->device, "failfast expired\n"); 163 nvme_kick_requeue_lists(ctrl); 164 } 165 166 static inline void nvme_start_failfast_work(struct nvme_ctrl *ctrl) 167 { 168 if (!ctrl->opts || ctrl->opts->fast_io_fail_tmo == -1) 169 return; 170 171 schedule_delayed_work(&ctrl->failfast_work, 172 ctrl->opts->fast_io_fail_tmo * HZ); 173 } 174 175 static inline void nvme_stop_failfast_work(struct nvme_ctrl *ctrl) 176 { 177 if (!ctrl->opts) 178 return; 179 180 cancel_delayed_work_sync(&ctrl->failfast_work); 181 clear_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags); 182 } 183 184 185 int nvme_reset_ctrl(struct nvme_ctrl *ctrl) 186 { 187 if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING)) 188 return -EBUSY; 189 if (!queue_work(nvme_reset_wq, &ctrl->reset_work)) 190 return -EBUSY; 191 return 0; 192 } 193 EXPORT_SYMBOL_GPL(nvme_reset_ctrl); 194 195 int nvme_reset_ctrl_sync(struct nvme_ctrl *ctrl) 196 { 197 int ret; 198 199 ret = nvme_reset_ctrl(ctrl); 200 if (!ret) { 201 flush_work(&ctrl->reset_work); 202 if (ctrl->state != NVME_CTRL_LIVE) 203 ret = -ENETRESET; 204 } 205 206 return ret; 207 } 208 209 static void nvme_do_delete_ctrl(struct nvme_ctrl *ctrl) 210 { 211 dev_info(ctrl->device, 212 "Removing ctrl: NQN \"%s\"\n", nvmf_ctrl_subsysnqn(ctrl)); 213 214 flush_work(&ctrl->reset_work); 215 nvme_stop_ctrl(ctrl); 216 nvme_remove_namespaces(ctrl); 217 ctrl->ops->delete_ctrl(ctrl); 218 nvme_uninit_ctrl(ctrl); 219 } 220 221 static void nvme_delete_ctrl_work(struct work_struct *work) 222 { 223 struct nvme_ctrl *ctrl = 224 container_of(work, struct nvme_ctrl, delete_work); 225 226 nvme_do_delete_ctrl(ctrl); 227 } 228 229 int nvme_delete_ctrl(struct nvme_ctrl *ctrl) 230 { 231 if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_DELETING)) 232 return -EBUSY; 233 if (!queue_work(nvme_delete_wq, &ctrl->delete_work)) 234 return -EBUSY; 235 return 0; 236 } 237 EXPORT_SYMBOL_GPL(nvme_delete_ctrl); 238 239 static void nvme_delete_ctrl_sync(struct nvme_ctrl *ctrl) 240 { 241 /* 242 * Keep a reference until nvme_do_delete_ctrl() complete, 243 * since ->delete_ctrl can free the controller. 244 */ 245 nvme_get_ctrl(ctrl); 246 if (nvme_change_ctrl_state(ctrl, NVME_CTRL_DELETING)) 247 nvme_do_delete_ctrl(ctrl); 248 nvme_put_ctrl(ctrl); 249 } 250 251 static blk_status_t nvme_error_status(u16 status) 252 { 253 switch (status & 0x7ff) { 254 case NVME_SC_SUCCESS: 255 return BLK_STS_OK; 256 case NVME_SC_CAP_EXCEEDED: 257 return BLK_STS_NOSPC; 258 case NVME_SC_LBA_RANGE: 259 case NVME_SC_CMD_INTERRUPTED: 260 case NVME_SC_NS_NOT_READY: 261 return BLK_STS_TARGET; 262 case NVME_SC_BAD_ATTRIBUTES: 263 case NVME_SC_ONCS_NOT_SUPPORTED: 264 case NVME_SC_INVALID_OPCODE: 265 case NVME_SC_INVALID_FIELD: 266 case NVME_SC_INVALID_NS: 267 return BLK_STS_NOTSUPP; 268 case NVME_SC_WRITE_FAULT: 269 case NVME_SC_READ_ERROR: 270 case NVME_SC_UNWRITTEN_BLOCK: 271 case NVME_SC_ACCESS_DENIED: 272 case NVME_SC_READ_ONLY: 273 case NVME_SC_COMPARE_FAILED: 274 return BLK_STS_MEDIUM; 275 case NVME_SC_GUARD_CHECK: 276 case NVME_SC_APPTAG_CHECK: 277 case NVME_SC_REFTAG_CHECK: 278 case NVME_SC_INVALID_PI: 279 return BLK_STS_PROTECTION; 280 case NVME_SC_RESERVATION_CONFLICT: 281 return BLK_STS_NEXUS; 282 case NVME_SC_HOST_PATH_ERROR: 283 return BLK_STS_TRANSPORT; 284 case NVME_SC_ZONE_TOO_MANY_ACTIVE: 285 return BLK_STS_ZONE_ACTIVE_RESOURCE; 286 case NVME_SC_ZONE_TOO_MANY_OPEN: 287 return BLK_STS_ZONE_OPEN_RESOURCE; 288 default: 289 return BLK_STS_IOERR; 290 } 291 } 292 293 static void nvme_retry_req(struct request *req) 294 { 295 unsigned long delay = 0; 296 u16 crd; 297 298 /* The mask and shift result must be <= 3 */ 299 crd = (nvme_req(req)->status & NVME_SC_CRD) >> 11; 300 if (crd) 301 delay = nvme_req(req)->ctrl->crdt[crd - 1] * 100; 302 303 nvme_req(req)->retries++; 304 blk_mq_requeue_request(req, false); 305 blk_mq_delay_kick_requeue_list(req->q, delay); 306 } 307 308 static void nvme_log_error(struct request *req) 309 { 310 struct nvme_ns *ns = req->q->queuedata; 311 struct nvme_request *nr = nvme_req(req); 312 313 if (ns) { 314 pr_err_ratelimited("%s: %s(0x%x) @ LBA %llu, %llu blocks, %s (sct 0x%x / sc 0x%x) %s%s\n", 315 ns->disk ? ns->disk->disk_name : "?", 316 nvme_get_opcode_str(nr->cmd->common.opcode), 317 nr->cmd->common.opcode, 318 (unsigned long long)nvme_sect_to_lba(ns, blk_rq_pos(req)), 319 (unsigned long long)blk_rq_bytes(req) >> ns->lba_shift, 320 nvme_get_error_status_str(nr->status), 321 nr->status >> 8 & 7, /* Status Code Type */ 322 nr->status & 0xff, /* Status Code */ 323 nr->status & NVME_SC_MORE ? "MORE " : "", 324 nr->status & NVME_SC_DNR ? "DNR " : ""); 325 return; 326 } 327 328 pr_err_ratelimited("%s: %s(0x%x), %s (sct 0x%x / sc 0x%x) %s%s\n", 329 dev_name(nr->ctrl->device), 330 nvme_get_admin_opcode_str(nr->cmd->common.opcode), 331 nr->cmd->common.opcode, 332 nvme_get_error_status_str(nr->status), 333 nr->status >> 8 & 7, /* Status Code Type */ 334 nr->status & 0xff, /* Status Code */ 335 nr->status & NVME_SC_MORE ? "MORE " : "", 336 nr->status & NVME_SC_DNR ? "DNR " : ""); 337 } 338 339 enum nvme_disposition { 340 COMPLETE, 341 RETRY, 342 FAILOVER, 343 AUTHENTICATE, 344 }; 345 346 static inline enum nvme_disposition nvme_decide_disposition(struct request *req) 347 { 348 if (likely(nvme_req(req)->status == 0)) 349 return COMPLETE; 350 351 if ((nvme_req(req)->status & 0x7ff) == NVME_SC_AUTH_REQUIRED) 352 return AUTHENTICATE; 353 354 if (blk_noretry_request(req) || 355 (nvme_req(req)->status & NVME_SC_DNR) || 356 nvme_req(req)->retries >= nvme_max_retries) 357 return COMPLETE; 358 359 if (req->cmd_flags & REQ_NVME_MPATH) { 360 if (nvme_is_path_error(nvme_req(req)->status) || 361 blk_queue_dying(req->q)) 362 return FAILOVER; 363 } else { 364 if (blk_queue_dying(req->q)) 365 return COMPLETE; 366 } 367 368 return RETRY; 369 } 370 371 static inline void nvme_end_req_zoned(struct request *req) 372 { 373 if (IS_ENABLED(CONFIG_BLK_DEV_ZONED) && 374 req_op(req) == REQ_OP_ZONE_APPEND) 375 req->__sector = nvme_lba_to_sect(req->q->queuedata, 376 le64_to_cpu(nvme_req(req)->result.u64)); 377 } 378 379 static inline void nvme_end_req(struct request *req) 380 { 381 blk_status_t status = nvme_error_status(nvme_req(req)->status); 382 383 if (unlikely(nvme_req(req)->status && !(req->rq_flags & RQF_QUIET))) 384 nvme_log_error(req); 385 nvme_end_req_zoned(req); 386 nvme_trace_bio_complete(req); 387 if (req->cmd_flags & REQ_NVME_MPATH) 388 nvme_mpath_end_request(req); 389 blk_mq_end_request(req, status); 390 } 391 392 void nvme_complete_rq(struct request *req) 393 { 394 struct nvme_ctrl *ctrl = nvme_req(req)->ctrl; 395 396 trace_nvme_complete_rq(req); 397 nvme_cleanup_cmd(req); 398 399 if (ctrl->kas) 400 ctrl->comp_seen = true; 401 402 switch (nvme_decide_disposition(req)) { 403 case COMPLETE: 404 nvme_end_req(req); 405 return; 406 case RETRY: 407 nvme_retry_req(req); 408 return; 409 case FAILOVER: 410 nvme_failover_req(req); 411 return; 412 case AUTHENTICATE: 413 #ifdef CONFIG_NVME_AUTH 414 queue_work(nvme_wq, &ctrl->dhchap_auth_work); 415 nvme_retry_req(req); 416 #else 417 nvme_end_req(req); 418 #endif 419 return; 420 } 421 } 422 EXPORT_SYMBOL_GPL(nvme_complete_rq); 423 424 void nvme_complete_batch_req(struct request *req) 425 { 426 trace_nvme_complete_rq(req); 427 nvme_cleanup_cmd(req); 428 nvme_end_req_zoned(req); 429 } 430 EXPORT_SYMBOL_GPL(nvme_complete_batch_req); 431 432 /* 433 * Called to unwind from ->queue_rq on a failed command submission so that the 434 * multipathing code gets called to potentially failover to another path. 435 * The caller needs to unwind all transport specific resource allocations and 436 * must return propagate the return value. 437 */ 438 blk_status_t nvme_host_path_error(struct request *req) 439 { 440 nvme_req(req)->status = NVME_SC_HOST_PATH_ERROR; 441 blk_mq_set_request_complete(req); 442 nvme_complete_rq(req); 443 return BLK_STS_OK; 444 } 445 EXPORT_SYMBOL_GPL(nvme_host_path_error); 446 447 bool nvme_cancel_request(struct request *req, void *data) 448 { 449 dev_dbg_ratelimited(((struct nvme_ctrl *) data)->device, 450 "Cancelling I/O %d", req->tag); 451 452 /* don't abort one completed request */ 453 if (blk_mq_request_completed(req)) 454 return true; 455 456 nvme_req(req)->status = NVME_SC_HOST_ABORTED_CMD; 457 nvme_req(req)->flags |= NVME_REQ_CANCELLED; 458 blk_mq_complete_request(req); 459 return true; 460 } 461 EXPORT_SYMBOL_GPL(nvme_cancel_request); 462 463 void nvme_cancel_tagset(struct nvme_ctrl *ctrl) 464 { 465 if (ctrl->tagset) { 466 blk_mq_tagset_busy_iter(ctrl->tagset, 467 nvme_cancel_request, ctrl); 468 blk_mq_tagset_wait_completed_request(ctrl->tagset); 469 } 470 } 471 EXPORT_SYMBOL_GPL(nvme_cancel_tagset); 472 473 void nvme_cancel_admin_tagset(struct nvme_ctrl *ctrl) 474 { 475 if (ctrl->admin_tagset) { 476 blk_mq_tagset_busy_iter(ctrl->admin_tagset, 477 nvme_cancel_request, ctrl); 478 blk_mq_tagset_wait_completed_request(ctrl->admin_tagset); 479 } 480 } 481 EXPORT_SYMBOL_GPL(nvme_cancel_admin_tagset); 482 483 bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl, 484 enum nvme_ctrl_state new_state) 485 { 486 enum nvme_ctrl_state old_state; 487 unsigned long flags; 488 bool changed = false; 489 490 spin_lock_irqsave(&ctrl->lock, flags); 491 492 old_state = ctrl->state; 493 switch (new_state) { 494 case NVME_CTRL_LIVE: 495 switch (old_state) { 496 case NVME_CTRL_NEW: 497 case NVME_CTRL_RESETTING: 498 case NVME_CTRL_CONNECTING: 499 changed = true; 500 fallthrough; 501 default: 502 break; 503 } 504 break; 505 case NVME_CTRL_RESETTING: 506 switch (old_state) { 507 case NVME_CTRL_NEW: 508 case NVME_CTRL_LIVE: 509 changed = true; 510 fallthrough; 511 default: 512 break; 513 } 514 break; 515 case NVME_CTRL_CONNECTING: 516 switch (old_state) { 517 case NVME_CTRL_NEW: 518 case NVME_CTRL_RESETTING: 519 changed = true; 520 fallthrough; 521 default: 522 break; 523 } 524 break; 525 case NVME_CTRL_DELETING: 526 switch (old_state) { 527 case NVME_CTRL_LIVE: 528 case NVME_CTRL_RESETTING: 529 case NVME_CTRL_CONNECTING: 530 changed = true; 531 fallthrough; 532 default: 533 break; 534 } 535 break; 536 case NVME_CTRL_DELETING_NOIO: 537 switch (old_state) { 538 case NVME_CTRL_DELETING: 539 case NVME_CTRL_DEAD: 540 changed = true; 541 fallthrough; 542 default: 543 break; 544 } 545 break; 546 case NVME_CTRL_DEAD: 547 switch (old_state) { 548 case NVME_CTRL_DELETING: 549 changed = true; 550 fallthrough; 551 default: 552 break; 553 } 554 break; 555 default: 556 break; 557 } 558 559 if (changed) { 560 ctrl->state = new_state; 561 wake_up_all(&ctrl->state_wq); 562 } 563 564 spin_unlock_irqrestore(&ctrl->lock, flags); 565 if (!changed) 566 return false; 567 568 if (ctrl->state == NVME_CTRL_LIVE) { 569 if (old_state == NVME_CTRL_CONNECTING) 570 nvme_stop_failfast_work(ctrl); 571 nvme_kick_requeue_lists(ctrl); 572 } else if (ctrl->state == NVME_CTRL_CONNECTING && 573 old_state == NVME_CTRL_RESETTING) { 574 nvme_start_failfast_work(ctrl); 575 } 576 return changed; 577 } 578 EXPORT_SYMBOL_GPL(nvme_change_ctrl_state); 579 580 /* 581 * Returns true for sink states that can't ever transition back to live. 582 */ 583 static bool nvme_state_terminal(struct nvme_ctrl *ctrl) 584 { 585 switch (ctrl->state) { 586 case NVME_CTRL_NEW: 587 case NVME_CTRL_LIVE: 588 case NVME_CTRL_RESETTING: 589 case NVME_CTRL_CONNECTING: 590 return false; 591 case NVME_CTRL_DELETING: 592 case NVME_CTRL_DELETING_NOIO: 593 case NVME_CTRL_DEAD: 594 return true; 595 default: 596 WARN_ONCE(1, "Unhandled ctrl state:%d", ctrl->state); 597 return true; 598 } 599 } 600 601 /* 602 * Waits for the controller state to be resetting, or returns false if it is 603 * not possible to ever transition to that state. 604 */ 605 bool nvme_wait_reset(struct nvme_ctrl *ctrl) 606 { 607 wait_event(ctrl->state_wq, 608 nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING) || 609 nvme_state_terminal(ctrl)); 610 return ctrl->state == NVME_CTRL_RESETTING; 611 } 612 EXPORT_SYMBOL_GPL(nvme_wait_reset); 613 614 static void nvme_free_ns_head(struct kref *ref) 615 { 616 struct nvme_ns_head *head = 617 container_of(ref, struct nvme_ns_head, ref); 618 619 nvme_mpath_remove_disk(head); 620 ida_free(&head->subsys->ns_ida, head->instance); 621 cleanup_srcu_struct(&head->srcu); 622 nvme_put_subsystem(head->subsys); 623 kfree(head); 624 } 625 626 bool nvme_tryget_ns_head(struct nvme_ns_head *head) 627 { 628 return kref_get_unless_zero(&head->ref); 629 } 630 631 void nvme_put_ns_head(struct nvme_ns_head *head) 632 { 633 kref_put(&head->ref, nvme_free_ns_head); 634 } 635 636 static void nvme_free_ns(struct kref *kref) 637 { 638 struct nvme_ns *ns = container_of(kref, struct nvme_ns, kref); 639 640 put_disk(ns->disk); 641 nvme_put_ns_head(ns->head); 642 nvme_put_ctrl(ns->ctrl); 643 kfree(ns); 644 } 645 646 static inline bool nvme_get_ns(struct nvme_ns *ns) 647 { 648 return kref_get_unless_zero(&ns->kref); 649 } 650 651 void nvme_put_ns(struct nvme_ns *ns) 652 { 653 kref_put(&ns->kref, nvme_free_ns); 654 } 655 EXPORT_SYMBOL_NS_GPL(nvme_put_ns, NVME_TARGET_PASSTHRU); 656 657 static inline void nvme_clear_nvme_request(struct request *req) 658 { 659 nvme_req(req)->status = 0; 660 nvme_req(req)->retries = 0; 661 nvme_req(req)->flags = 0; 662 req->rq_flags |= RQF_DONTPREP; 663 } 664 665 /* initialize a passthrough request */ 666 void nvme_init_request(struct request *req, struct nvme_command *cmd) 667 { 668 if (req->q->queuedata) 669 req->timeout = NVME_IO_TIMEOUT; 670 else /* no queuedata implies admin queue */ 671 req->timeout = NVME_ADMIN_TIMEOUT; 672 673 /* passthru commands should let the driver set the SGL flags */ 674 cmd->common.flags &= ~NVME_CMD_SGL_ALL; 675 676 req->cmd_flags |= REQ_FAILFAST_DRIVER; 677 if (req->mq_hctx->type == HCTX_TYPE_POLL) 678 req->cmd_flags |= REQ_POLLED; 679 nvme_clear_nvme_request(req); 680 req->rq_flags |= RQF_QUIET; 681 memcpy(nvme_req(req)->cmd, cmd, sizeof(*cmd)); 682 } 683 EXPORT_SYMBOL_GPL(nvme_init_request); 684 685 /* 686 * For something we're not in a state to send to the device the default action 687 * is to busy it and retry it after the controller state is recovered. However, 688 * if the controller is deleting or if anything is marked for failfast or 689 * nvme multipath it is immediately failed. 690 * 691 * Note: commands used to initialize the controller will be marked for failfast. 692 * Note: nvme cli/ioctl commands are marked for failfast. 693 */ 694 blk_status_t nvme_fail_nonready_command(struct nvme_ctrl *ctrl, 695 struct request *rq) 696 { 697 if (ctrl->state != NVME_CTRL_DELETING_NOIO && 698 ctrl->state != NVME_CTRL_DELETING && 699 ctrl->state != NVME_CTRL_DEAD && 700 !test_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags) && 701 !blk_noretry_request(rq) && !(rq->cmd_flags & REQ_NVME_MPATH)) 702 return BLK_STS_RESOURCE; 703 return nvme_host_path_error(rq); 704 } 705 EXPORT_SYMBOL_GPL(nvme_fail_nonready_command); 706 707 bool __nvme_check_ready(struct nvme_ctrl *ctrl, struct request *rq, 708 bool queue_live) 709 { 710 struct nvme_request *req = nvme_req(rq); 711 712 /* 713 * currently we have a problem sending passthru commands 714 * on the admin_q if the controller is not LIVE because we can't 715 * make sure that they are going out after the admin connect, 716 * controller enable and/or other commands in the initialization 717 * sequence. until the controller will be LIVE, fail with 718 * BLK_STS_RESOURCE so that they will be rescheduled. 719 */ 720 if (rq->q == ctrl->admin_q && (req->flags & NVME_REQ_USERCMD)) 721 return false; 722 723 if (ctrl->ops->flags & NVME_F_FABRICS) { 724 /* 725 * Only allow commands on a live queue, except for the connect 726 * command, which is require to set the queue live in the 727 * appropinquate states. 728 */ 729 switch (ctrl->state) { 730 case NVME_CTRL_CONNECTING: 731 if (blk_rq_is_passthrough(rq) && nvme_is_fabrics(req->cmd) && 732 (req->cmd->fabrics.fctype == nvme_fabrics_type_connect || 733 req->cmd->fabrics.fctype == nvme_fabrics_type_auth_send || 734 req->cmd->fabrics.fctype == nvme_fabrics_type_auth_receive)) 735 return true; 736 break; 737 default: 738 break; 739 case NVME_CTRL_DEAD: 740 return false; 741 } 742 } 743 744 return queue_live; 745 } 746 EXPORT_SYMBOL_GPL(__nvme_check_ready); 747 748 static inline void nvme_setup_flush(struct nvme_ns *ns, 749 struct nvme_command *cmnd) 750 { 751 memset(cmnd, 0, sizeof(*cmnd)); 752 cmnd->common.opcode = nvme_cmd_flush; 753 cmnd->common.nsid = cpu_to_le32(ns->head->ns_id); 754 } 755 756 static blk_status_t nvme_setup_discard(struct nvme_ns *ns, struct request *req, 757 struct nvme_command *cmnd) 758 { 759 unsigned short segments = blk_rq_nr_discard_segments(req), n = 0; 760 struct nvme_dsm_range *range; 761 struct bio *bio; 762 763 /* 764 * Some devices do not consider the DSM 'Number of Ranges' field when 765 * determining how much data to DMA. Always allocate memory for maximum 766 * number of segments to prevent device reading beyond end of buffer. 767 */ 768 static const size_t alloc_size = sizeof(*range) * NVME_DSM_MAX_RANGES; 769 770 range = kzalloc(alloc_size, GFP_ATOMIC | __GFP_NOWARN); 771 if (!range) { 772 /* 773 * If we fail allocation our range, fallback to the controller 774 * discard page. If that's also busy, it's safe to return 775 * busy, as we know we can make progress once that's freed. 776 */ 777 if (test_and_set_bit_lock(0, &ns->ctrl->discard_page_busy)) 778 return BLK_STS_RESOURCE; 779 780 range = page_address(ns->ctrl->discard_page); 781 } 782 783 __rq_for_each_bio(bio, req) { 784 u64 slba = nvme_sect_to_lba(ns, bio->bi_iter.bi_sector); 785 u32 nlb = bio->bi_iter.bi_size >> ns->lba_shift; 786 787 if (n < segments) { 788 range[n].cattr = cpu_to_le32(0); 789 range[n].nlb = cpu_to_le32(nlb); 790 range[n].slba = cpu_to_le64(slba); 791 } 792 n++; 793 } 794 795 if (WARN_ON_ONCE(n != segments)) { 796 if (virt_to_page(range) == ns->ctrl->discard_page) 797 clear_bit_unlock(0, &ns->ctrl->discard_page_busy); 798 else 799 kfree(range); 800 return BLK_STS_IOERR; 801 } 802 803 memset(cmnd, 0, sizeof(*cmnd)); 804 cmnd->dsm.opcode = nvme_cmd_dsm; 805 cmnd->dsm.nsid = cpu_to_le32(ns->head->ns_id); 806 cmnd->dsm.nr = cpu_to_le32(segments - 1); 807 cmnd->dsm.attributes = cpu_to_le32(NVME_DSMGMT_AD); 808 809 req->special_vec.bv_page = virt_to_page(range); 810 req->special_vec.bv_offset = offset_in_page(range); 811 req->special_vec.bv_len = alloc_size; 812 req->rq_flags |= RQF_SPECIAL_PAYLOAD; 813 814 return BLK_STS_OK; 815 } 816 817 static void nvme_set_ref_tag(struct nvme_ns *ns, struct nvme_command *cmnd, 818 struct request *req) 819 { 820 u32 upper, lower; 821 u64 ref48; 822 823 /* both rw and write zeroes share the same reftag format */ 824 switch (ns->guard_type) { 825 case NVME_NVM_NS_16B_GUARD: 826 cmnd->rw.reftag = cpu_to_le32(t10_pi_ref_tag(req)); 827 break; 828 case NVME_NVM_NS_64B_GUARD: 829 ref48 = ext_pi_ref_tag(req); 830 lower = lower_32_bits(ref48); 831 upper = upper_32_bits(ref48); 832 833 cmnd->rw.reftag = cpu_to_le32(lower); 834 cmnd->rw.cdw3 = cpu_to_le32(upper); 835 break; 836 default: 837 break; 838 } 839 } 840 841 static inline blk_status_t nvme_setup_write_zeroes(struct nvme_ns *ns, 842 struct request *req, struct nvme_command *cmnd) 843 { 844 memset(cmnd, 0, sizeof(*cmnd)); 845 846 if (ns->ctrl->quirks & NVME_QUIRK_DEALLOCATE_ZEROES) 847 return nvme_setup_discard(ns, req, cmnd); 848 849 cmnd->write_zeroes.opcode = nvme_cmd_write_zeroes; 850 cmnd->write_zeroes.nsid = cpu_to_le32(ns->head->ns_id); 851 cmnd->write_zeroes.slba = 852 cpu_to_le64(nvme_sect_to_lba(ns, blk_rq_pos(req))); 853 cmnd->write_zeroes.length = 854 cpu_to_le16((blk_rq_bytes(req) >> ns->lba_shift) - 1); 855 856 if (!(req->cmd_flags & REQ_NOUNMAP) && (ns->features & NVME_NS_DEAC)) 857 cmnd->write_zeroes.control |= cpu_to_le16(NVME_WZ_DEAC); 858 859 if (nvme_ns_has_pi(ns)) { 860 cmnd->write_zeroes.control |= cpu_to_le16(NVME_RW_PRINFO_PRACT); 861 862 switch (ns->pi_type) { 863 case NVME_NS_DPS_PI_TYPE1: 864 case NVME_NS_DPS_PI_TYPE2: 865 nvme_set_ref_tag(ns, cmnd, req); 866 break; 867 } 868 } 869 870 return BLK_STS_OK; 871 } 872 873 static inline blk_status_t nvme_setup_rw(struct nvme_ns *ns, 874 struct request *req, struct nvme_command *cmnd, 875 enum nvme_opcode op) 876 { 877 u16 control = 0; 878 u32 dsmgmt = 0; 879 880 if (req->cmd_flags & REQ_FUA) 881 control |= NVME_RW_FUA; 882 if (req->cmd_flags & (REQ_FAILFAST_DEV | REQ_RAHEAD)) 883 control |= NVME_RW_LR; 884 885 if (req->cmd_flags & REQ_RAHEAD) 886 dsmgmt |= NVME_RW_DSM_FREQ_PREFETCH; 887 888 cmnd->rw.opcode = op; 889 cmnd->rw.flags = 0; 890 cmnd->rw.nsid = cpu_to_le32(ns->head->ns_id); 891 cmnd->rw.cdw2 = 0; 892 cmnd->rw.cdw3 = 0; 893 cmnd->rw.metadata = 0; 894 cmnd->rw.slba = cpu_to_le64(nvme_sect_to_lba(ns, blk_rq_pos(req))); 895 cmnd->rw.length = cpu_to_le16((blk_rq_bytes(req) >> ns->lba_shift) - 1); 896 cmnd->rw.reftag = 0; 897 cmnd->rw.apptag = 0; 898 cmnd->rw.appmask = 0; 899 900 if (ns->ms) { 901 /* 902 * If formated with metadata, the block layer always provides a 903 * metadata buffer if CONFIG_BLK_DEV_INTEGRITY is enabled. Else 904 * we enable the PRACT bit for protection information or set the 905 * namespace capacity to zero to prevent any I/O. 906 */ 907 if (!blk_integrity_rq(req)) { 908 if (WARN_ON_ONCE(!nvme_ns_has_pi(ns))) 909 return BLK_STS_NOTSUPP; 910 control |= NVME_RW_PRINFO_PRACT; 911 } 912 913 switch (ns->pi_type) { 914 case NVME_NS_DPS_PI_TYPE3: 915 control |= NVME_RW_PRINFO_PRCHK_GUARD; 916 break; 917 case NVME_NS_DPS_PI_TYPE1: 918 case NVME_NS_DPS_PI_TYPE2: 919 control |= NVME_RW_PRINFO_PRCHK_GUARD | 920 NVME_RW_PRINFO_PRCHK_REF; 921 if (op == nvme_cmd_zone_append) 922 control |= NVME_RW_APPEND_PIREMAP; 923 nvme_set_ref_tag(ns, cmnd, req); 924 break; 925 } 926 } 927 928 cmnd->rw.control = cpu_to_le16(control); 929 cmnd->rw.dsmgmt = cpu_to_le32(dsmgmt); 930 return 0; 931 } 932 933 void nvme_cleanup_cmd(struct request *req) 934 { 935 if (req->rq_flags & RQF_SPECIAL_PAYLOAD) { 936 struct nvme_ctrl *ctrl = nvme_req(req)->ctrl; 937 938 if (req->special_vec.bv_page == ctrl->discard_page) 939 clear_bit_unlock(0, &ctrl->discard_page_busy); 940 else 941 kfree(bvec_virt(&req->special_vec)); 942 } 943 } 944 EXPORT_SYMBOL_GPL(nvme_cleanup_cmd); 945 946 blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req) 947 { 948 struct nvme_command *cmd = nvme_req(req)->cmd; 949 blk_status_t ret = BLK_STS_OK; 950 951 if (!(req->rq_flags & RQF_DONTPREP)) 952 nvme_clear_nvme_request(req); 953 954 switch (req_op(req)) { 955 case REQ_OP_DRV_IN: 956 case REQ_OP_DRV_OUT: 957 /* these are setup prior to execution in nvme_init_request() */ 958 break; 959 case REQ_OP_FLUSH: 960 nvme_setup_flush(ns, cmd); 961 break; 962 case REQ_OP_ZONE_RESET_ALL: 963 case REQ_OP_ZONE_RESET: 964 ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_RESET); 965 break; 966 case REQ_OP_ZONE_OPEN: 967 ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_OPEN); 968 break; 969 case REQ_OP_ZONE_CLOSE: 970 ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_CLOSE); 971 break; 972 case REQ_OP_ZONE_FINISH: 973 ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_FINISH); 974 break; 975 case REQ_OP_WRITE_ZEROES: 976 ret = nvme_setup_write_zeroes(ns, req, cmd); 977 break; 978 case REQ_OP_DISCARD: 979 ret = nvme_setup_discard(ns, req, cmd); 980 break; 981 case REQ_OP_READ: 982 ret = nvme_setup_rw(ns, req, cmd, nvme_cmd_read); 983 break; 984 case REQ_OP_WRITE: 985 ret = nvme_setup_rw(ns, req, cmd, nvme_cmd_write); 986 break; 987 case REQ_OP_ZONE_APPEND: 988 ret = nvme_setup_rw(ns, req, cmd, nvme_cmd_zone_append); 989 break; 990 default: 991 WARN_ON_ONCE(1); 992 return BLK_STS_IOERR; 993 } 994 995 cmd->common.command_id = nvme_cid(req); 996 trace_nvme_setup_cmd(req, cmd); 997 return ret; 998 } 999 EXPORT_SYMBOL_GPL(nvme_setup_cmd); 1000 1001 /* 1002 * Return values: 1003 * 0: success 1004 * >0: nvme controller's cqe status response 1005 * <0: kernel error in lieu of controller response 1006 */ 1007 static int nvme_execute_rq(struct request *rq, bool at_head) 1008 { 1009 blk_status_t status; 1010 1011 status = blk_execute_rq(rq, at_head); 1012 if (nvme_req(rq)->flags & NVME_REQ_CANCELLED) 1013 return -EINTR; 1014 if (nvme_req(rq)->status) 1015 return nvme_req(rq)->status; 1016 return blk_status_to_errno(status); 1017 } 1018 1019 /* 1020 * Returns 0 on success. If the result is negative, it's a Linux error code; 1021 * if the result is positive, it's an NVM Express status code 1022 */ 1023 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 1024 union nvme_result *result, void *buffer, unsigned bufflen, 1025 int qid, int at_head, blk_mq_req_flags_t flags) 1026 { 1027 struct request *req; 1028 int ret; 1029 1030 if (qid == NVME_QID_ANY) 1031 req = blk_mq_alloc_request(q, nvme_req_op(cmd), flags); 1032 else 1033 req = blk_mq_alloc_request_hctx(q, nvme_req_op(cmd), flags, 1034 qid - 1); 1035 1036 if (IS_ERR(req)) 1037 return PTR_ERR(req); 1038 nvme_init_request(req, cmd); 1039 1040 if (buffer && bufflen) { 1041 ret = blk_rq_map_kern(q, req, buffer, bufflen, GFP_KERNEL); 1042 if (ret) 1043 goto out; 1044 } 1045 1046 ret = nvme_execute_rq(req, at_head); 1047 if (result && ret >= 0) 1048 *result = nvme_req(req)->result; 1049 out: 1050 blk_mq_free_request(req); 1051 return ret; 1052 } 1053 EXPORT_SYMBOL_GPL(__nvme_submit_sync_cmd); 1054 1055 int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 1056 void *buffer, unsigned bufflen) 1057 { 1058 return __nvme_submit_sync_cmd(q, cmd, NULL, buffer, bufflen, 1059 NVME_QID_ANY, 0, 0); 1060 } 1061 EXPORT_SYMBOL_GPL(nvme_submit_sync_cmd); 1062 1063 static u32 nvme_known_admin_effects(u8 opcode) 1064 { 1065 switch (opcode) { 1066 case nvme_admin_format_nvm: 1067 return NVME_CMD_EFFECTS_LBCC | NVME_CMD_EFFECTS_NCC | 1068 NVME_CMD_EFFECTS_CSE_MASK; 1069 case nvme_admin_sanitize_nvm: 1070 return NVME_CMD_EFFECTS_LBCC | NVME_CMD_EFFECTS_CSE_MASK; 1071 default: 1072 break; 1073 } 1074 return 0; 1075 } 1076 1077 u32 nvme_command_effects(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u8 opcode) 1078 { 1079 u32 effects = 0; 1080 1081 if (ns) { 1082 if (ns->head->effects) 1083 effects = le32_to_cpu(ns->head->effects->iocs[opcode]); 1084 if (effects & ~(NVME_CMD_EFFECTS_CSUPP | NVME_CMD_EFFECTS_LBCC)) 1085 dev_warn_once(ctrl->device, 1086 "IO command:%02x has unhandled effects:%08x\n", 1087 opcode, effects); 1088 return 0; 1089 } 1090 1091 if (ctrl->effects) 1092 effects = le32_to_cpu(ctrl->effects->acs[opcode]); 1093 effects |= nvme_known_admin_effects(opcode); 1094 1095 return effects; 1096 } 1097 EXPORT_SYMBOL_NS_GPL(nvme_command_effects, NVME_TARGET_PASSTHRU); 1098 1099 static u32 nvme_passthru_start(struct nvme_ctrl *ctrl, struct nvme_ns *ns, 1100 u8 opcode) 1101 { 1102 u32 effects = nvme_command_effects(ctrl, ns, opcode); 1103 1104 /* 1105 * For simplicity, IO to all namespaces is quiesced even if the command 1106 * effects say only one namespace is affected. 1107 */ 1108 if (effects & NVME_CMD_EFFECTS_CSE_MASK) { 1109 mutex_lock(&ctrl->scan_lock); 1110 mutex_lock(&ctrl->subsys->lock); 1111 nvme_mpath_start_freeze(ctrl->subsys); 1112 nvme_mpath_wait_freeze(ctrl->subsys); 1113 nvme_start_freeze(ctrl); 1114 nvme_wait_freeze(ctrl); 1115 } 1116 return effects; 1117 } 1118 1119 void nvme_passthru_end(struct nvme_ctrl *ctrl, u32 effects, 1120 struct nvme_command *cmd, int status) 1121 { 1122 if (effects & NVME_CMD_EFFECTS_CSE_MASK) { 1123 nvme_unfreeze(ctrl); 1124 nvme_mpath_unfreeze(ctrl->subsys); 1125 mutex_unlock(&ctrl->subsys->lock); 1126 mutex_unlock(&ctrl->scan_lock); 1127 } 1128 if (effects & NVME_CMD_EFFECTS_CCC) { 1129 dev_info(ctrl->device, 1130 "controller capabilities changed, reset may be required to take effect.\n"); 1131 } 1132 if (effects & (NVME_CMD_EFFECTS_NIC | NVME_CMD_EFFECTS_NCC)) { 1133 nvme_queue_scan(ctrl); 1134 flush_work(&ctrl->scan_work); 1135 } 1136 1137 switch (cmd->common.opcode) { 1138 case nvme_admin_set_features: 1139 switch (le32_to_cpu(cmd->common.cdw10) & 0xFF) { 1140 case NVME_FEAT_KATO: 1141 /* 1142 * Keep alive commands interval on the host should be 1143 * updated when KATO is modified by Set Features 1144 * commands. 1145 */ 1146 if (!status) 1147 nvme_update_keep_alive(ctrl, cmd); 1148 break; 1149 default: 1150 break; 1151 } 1152 break; 1153 default: 1154 break; 1155 } 1156 } 1157 EXPORT_SYMBOL_NS_GPL(nvme_passthru_end, NVME_TARGET_PASSTHRU); 1158 1159 int nvme_execute_passthru_rq(struct request *rq, u32 *effects) 1160 { 1161 struct nvme_command *cmd = nvme_req(rq)->cmd; 1162 struct nvme_ctrl *ctrl = nvme_req(rq)->ctrl; 1163 struct nvme_ns *ns = rq->q->queuedata; 1164 1165 *effects = nvme_passthru_start(ctrl, ns, cmd->common.opcode); 1166 return nvme_execute_rq(rq, false); 1167 } 1168 EXPORT_SYMBOL_NS_GPL(nvme_execute_passthru_rq, NVME_TARGET_PASSTHRU); 1169 1170 /* 1171 * Recommended frequency for KATO commands per NVMe 1.4 section 7.12.1: 1172 * 1173 * The host should send Keep Alive commands at half of the Keep Alive Timeout 1174 * accounting for transport roundtrip times [..]. 1175 */ 1176 static void nvme_queue_keep_alive_work(struct nvme_ctrl *ctrl) 1177 { 1178 queue_delayed_work(nvme_wq, &ctrl->ka_work, ctrl->kato * HZ / 2); 1179 } 1180 1181 static enum rq_end_io_ret nvme_keep_alive_end_io(struct request *rq, 1182 blk_status_t status) 1183 { 1184 struct nvme_ctrl *ctrl = rq->end_io_data; 1185 unsigned long flags; 1186 bool startka = false; 1187 1188 blk_mq_free_request(rq); 1189 1190 if (status) { 1191 dev_err(ctrl->device, 1192 "failed nvme_keep_alive_end_io error=%d\n", 1193 status); 1194 return RQ_END_IO_NONE; 1195 } 1196 1197 ctrl->comp_seen = false; 1198 spin_lock_irqsave(&ctrl->lock, flags); 1199 if (ctrl->state == NVME_CTRL_LIVE || 1200 ctrl->state == NVME_CTRL_CONNECTING) 1201 startka = true; 1202 spin_unlock_irqrestore(&ctrl->lock, flags); 1203 if (startka) 1204 nvme_queue_keep_alive_work(ctrl); 1205 return RQ_END_IO_NONE; 1206 } 1207 1208 static void nvme_keep_alive_work(struct work_struct *work) 1209 { 1210 struct nvme_ctrl *ctrl = container_of(to_delayed_work(work), 1211 struct nvme_ctrl, ka_work); 1212 bool comp_seen = ctrl->comp_seen; 1213 struct request *rq; 1214 1215 if ((ctrl->ctratt & NVME_CTRL_ATTR_TBKAS) && comp_seen) { 1216 dev_dbg(ctrl->device, 1217 "reschedule traffic based keep-alive timer\n"); 1218 ctrl->comp_seen = false; 1219 nvme_queue_keep_alive_work(ctrl); 1220 return; 1221 } 1222 1223 rq = blk_mq_alloc_request(ctrl->admin_q, nvme_req_op(&ctrl->ka_cmd), 1224 BLK_MQ_REQ_RESERVED | BLK_MQ_REQ_NOWAIT); 1225 if (IS_ERR(rq)) { 1226 /* allocation failure, reset the controller */ 1227 dev_err(ctrl->device, "keep-alive failed: %ld\n", PTR_ERR(rq)); 1228 nvme_reset_ctrl(ctrl); 1229 return; 1230 } 1231 nvme_init_request(rq, &ctrl->ka_cmd); 1232 1233 rq->timeout = ctrl->kato * HZ; 1234 rq->end_io = nvme_keep_alive_end_io; 1235 rq->end_io_data = ctrl; 1236 blk_execute_rq_nowait(rq, false); 1237 } 1238 1239 static void nvme_start_keep_alive(struct nvme_ctrl *ctrl) 1240 { 1241 if (unlikely(ctrl->kato == 0)) 1242 return; 1243 1244 nvme_queue_keep_alive_work(ctrl); 1245 } 1246 1247 void nvme_stop_keep_alive(struct nvme_ctrl *ctrl) 1248 { 1249 if (unlikely(ctrl->kato == 0)) 1250 return; 1251 1252 cancel_delayed_work_sync(&ctrl->ka_work); 1253 } 1254 EXPORT_SYMBOL_GPL(nvme_stop_keep_alive); 1255 1256 static void nvme_update_keep_alive(struct nvme_ctrl *ctrl, 1257 struct nvme_command *cmd) 1258 { 1259 unsigned int new_kato = 1260 DIV_ROUND_UP(le32_to_cpu(cmd->common.cdw11), 1000); 1261 1262 dev_info(ctrl->device, 1263 "keep alive interval updated from %u ms to %u ms\n", 1264 ctrl->kato * 1000 / 2, new_kato * 1000 / 2); 1265 1266 nvme_stop_keep_alive(ctrl); 1267 ctrl->kato = new_kato; 1268 nvme_start_keep_alive(ctrl); 1269 } 1270 1271 /* 1272 * In NVMe 1.0 the CNS field was just a binary controller or namespace 1273 * flag, thus sending any new CNS opcodes has a big chance of not working. 1274 * Qemu unfortunately had that bug after reporting a 1.1 version compliance 1275 * (but not for any later version). 1276 */ 1277 static bool nvme_ctrl_limited_cns(struct nvme_ctrl *ctrl) 1278 { 1279 if (ctrl->quirks & NVME_QUIRK_IDENTIFY_CNS) 1280 return ctrl->vs < NVME_VS(1, 2, 0); 1281 return ctrl->vs < NVME_VS(1, 1, 0); 1282 } 1283 1284 static int nvme_identify_ctrl(struct nvme_ctrl *dev, struct nvme_id_ctrl **id) 1285 { 1286 struct nvme_command c = { }; 1287 int error; 1288 1289 /* gcc-4.4.4 (at least) has issues with initializers and anon unions */ 1290 c.identify.opcode = nvme_admin_identify; 1291 c.identify.cns = NVME_ID_CNS_CTRL; 1292 1293 *id = kmalloc(sizeof(struct nvme_id_ctrl), GFP_KERNEL); 1294 if (!*id) 1295 return -ENOMEM; 1296 1297 error = nvme_submit_sync_cmd(dev->admin_q, &c, *id, 1298 sizeof(struct nvme_id_ctrl)); 1299 if (error) 1300 kfree(*id); 1301 return error; 1302 } 1303 1304 static int nvme_process_ns_desc(struct nvme_ctrl *ctrl, struct nvme_ns_ids *ids, 1305 struct nvme_ns_id_desc *cur, bool *csi_seen) 1306 { 1307 const char *warn_str = "ctrl returned bogus length:"; 1308 void *data = cur; 1309 1310 switch (cur->nidt) { 1311 case NVME_NIDT_EUI64: 1312 if (cur->nidl != NVME_NIDT_EUI64_LEN) { 1313 dev_warn(ctrl->device, "%s %d for NVME_NIDT_EUI64\n", 1314 warn_str, cur->nidl); 1315 return -1; 1316 } 1317 if (ctrl->quirks & NVME_QUIRK_BOGUS_NID) 1318 return NVME_NIDT_EUI64_LEN; 1319 memcpy(ids->eui64, data + sizeof(*cur), NVME_NIDT_EUI64_LEN); 1320 return NVME_NIDT_EUI64_LEN; 1321 case NVME_NIDT_NGUID: 1322 if (cur->nidl != NVME_NIDT_NGUID_LEN) { 1323 dev_warn(ctrl->device, "%s %d for NVME_NIDT_NGUID\n", 1324 warn_str, cur->nidl); 1325 return -1; 1326 } 1327 if (ctrl->quirks & NVME_QUIRK_BOGUS_NID) 1328 return NVME_NIDT_NGUID_LEN; 1329 memcpy(ids->nguid, data + sizeof(*cur), NVME_NIDT_NGUID_LEN); 1330 return NVME_NIDT_NGUID_LEN; 1331 case NVME_NIDT_UUID: 1332 if (cur->nidl != NVME_NIDT_UUID_LEN) { 1333 dev_warn(ctrl->device, "%s %d for NVME_NIDT_UUID\n", 1334 warn_str, cur->nidl); 1335 return -1; 1336 } 1337 if (ctrl->quirks & NVME_QUIRK_BOGUS_NID) 1338 return NVME_NIDT_UUID_LEN; 1339 uuid_copy(&ids->uuid, data + sizeof(*cur)); 1340 return NVME_NIDT_UUID_LEN; 1341 case NVME_NIDT_CSI: 1342 if (cur->nidl != NVME_NIDT_CSI_LEN) { 1343 dev_warn(ctrl->device, "%s %d for NVME_NIDT_CSI\n", 1344 warn_str, cur->nidl); 1345 return -1; 1346 } 1347 memcpy(&ids->csi, data + sizeof(*cur), NVME_NIDT_CSI_LEN); 1348 *csi_seen = true; 1349 return NVME_NIDT_CSI_LEN; 1350 default: 1351 /* Skip unknown types */ 1352 return cur->nidl; 1353 } 1354 } 1355 1356 static int nvme_identify_ns_descs(struct nvme_ctrl *ctrl, 1357 struct nvme_ns_info *info) 1358 { 1359 struct nvme_command c = { }; 1360 bool csi_seen = false; 1361 int status, pos, len; 1362 void *data; 1363 1364 if (ctrl->vs < NVME_VS(1, 3, 0) && !nvme_multi_css(ctrl)) 1365 return 0; 1366 if (ctrl->quirks & NVME_QUIRK_NO_NS_DESC_LIST) 1367 return 0; 1368 1369 c.identify.opcode = nvme_admin_identify; 1370 c.identify.nsid = cpu_to_le32(info->nsid); 1371 c.identify.cns = NVME_ID_CNS_NS_DESC_LIST; 1372 1373 data = kzalloc(NVME_IDENTIFY_DATA_SIZE, GFP_KERNEL); 1374 if (!data) 1375 return -ENOMEM; 1376 1377 status = nvme_submit_sync_cmd(ctrl->admin_q, &c, data, 1378 NVME_IDENTIFY_DATA_SIZE); 1379 if (status) { 1380 dev_warn(ctrl->device, 1381 "Identify Descriptors failed (nsid=%u, status=0x%x)\n", 1382 info->nsid, status); 1383 goto free_data; 1384 } 1385 1386 for (pos = 0; pos < NVME_IDENTIFY_DATA_SIZE; pos += len) { 1387 struct nvme_ns_id_desc *cur = data + pos; 1388 1389 if (cur->nidl == 0) 1390 break; 1391 1392 len = nvme_process_ns_desc(ctrl, &info->ids, cur, &csi_seen); 1393 if (len < 0) 1394 break; 1395 1396 len += sizeof(*cur); 1397 } 1398 1399 if (nvme_multi_css(ctrl) && !csi_seen) { 1400 dev_warn(ctrl->device, "Command set not reported for nsid:%d\n", 1401 info->nsid); 1402 status = -EINVAL; 1403 } 1404 1405 free_data: 1406 kfree(data); 1407 return status; 1408 } 1409 1410 static int nvme_identify_ns(struct nvme_ctrl *ctrl, unsigned nsid, 1411 struct nvme_id_ns **id) 1412 { 1413 struct nvme_command c = { }; 1414 int error; 1415 1416 /* gcc-4.4.4 (at least) has issues with initializers and anon unions */ 1417 c.identify.opcode = nvme_admin_identify; 1418 c.identify.nsid = cpu_to_le32(nsid); 1419 c.identify.cns = NVME_ID_CNS_NS; 1420 1421 *id = kmalloc(sizeof(**id), GFP_KERNEL); 1422 if (!*id) 1423 return -ENOMEM; 1424 1425 error = nvme_submit_sync_cmd(ctrl->admin_q, &c, *id, sizeof(**id)); 1426 if (error) { 1427 dev_warn(ctrl->device, "Identify namespace failed (%d)\n", error); 1428 goto out_free_id; 1429 } 1430 1431 error = NVME_SC_INVALID_NS | NVME_SC_DNR; 1432 if ((*id)->ncap == 0) /* namespace not allocated or attached */ 1433 goto out_free_id; 1434 return 0; 1435 1436 out_free_id: 1437 kfree(*id); 1438 return error; 1439 } 1440 1441 static int nvme_ns_info_from_identify(struct nvme_ctrl *ctrl, 1442 struct nvme_ns_info *info) 1443 { 1444 struct nvme_ns_ids *ids = &info->ids; 1445 struct nvme_id_ns *id; 1446 int ret; 1447 1448 ret = nvme_identify_ns(ctrl, info->nsid, &id); 1449 if (ret) 1450 return ret; 1451 info->anagrpid = id->anagrpid; 1452 info->is_shared = id->nmic & NVME_NS_NMIC_SHARED; 1453 info->is_readonly = id->nsattr & NVME_NS_ATTR_RO; 1454 info->is_ready = true; 1455 if (ctrl->quirks & NVME_QUIRK_BOGUS_NID) { 1456 dev_info(ctrl->device, 1457 "Ignoring bogus Namespace Identifiers\n"); 1458 } else { 1459 if (ctrl->vs >= NVME_VS(1, 1, 0) && 1460 !memchr_inv(ids->eui64, 0, sizeof(ids->eui64))) 1461 memcpy(ids->eui64, id->eui64, sizeof(ids->eui64)); 1462 if (ctrl->vs >= NVME_VS(1, 2, 0) && 1463 !memchr_inv(ids->nguid, 0, sizeof(ids->nguid))) 1464 memcpy(ids->nguid, id->nguid, sizeof(ids->nguid)); 1465 } 1466 kfree(id); 1467 return 0; 1468 } 1469 1470 static int nvme_ns_info_from_id_cs_indep(struct nvme_ctrl *ctrl, 1471 struct nvme_ns_info *info) 1472 { 1473 struct nvme_id_ns_cs_indep *id; 1474 struct nvme_command c = { 1475 .identify.opcode = nvme_admin_identify, 1476 .identify.nsid = cpu_to_le32(info->nsid), 1477 .identify.cns = NVME_ID_CNS_NS_CS_INDEP, 1478 }; 1479 int ret; 1480 1481 id = kmalloc(sizeof(*id), GFP_KERNEL); 1482 if (!id) 1483 return -ENOMEM; 1484 1485 ret = nvme_submit_sync_cmd(ctrl->admin_q, &c, id, sizeof(*id)); 1486 if (!ret) { 1487 info->anagrpid = id->anagrpid; 1488 info->is_shared = id->nmic & NVME_NS_NMIC_SHARED; 1489 info->is_readonly = id->nsattr & NVME_NS_ATTR_RO; 1490 info->is_ready = id->nstat & NVME_NSTAT_NRDY; 1491 } 1492 kfree(id); 1493 return ret; 1494 } 1495 1496 static int nvme_features(struct nvme_ctrl *dev, u8 op, unsigned int fid, 1497 unsigned int dword11, void *buffer, size_t buflen, u32 *result) 1498 { 1499 union nvme_result res = { 0 }; 1500 struct nvme_command c = { }; 1501 int ret; 1502 1503 c.features.opcode = op; 1504 c.features.fid = cpu_to_le32(fid); 1505 c.features.dword11 = cpu_to_le32(dword11); 1506 1507 ret = __nvme_submit_sync_cmd(dev->admin_q, &c, &res, 1508 buffer, buflen, NVME_QID_ANY, 0, 0); 1509 if (ret >= 0 && result) 1510 *result = le32_to_cpu(res.u32); 1511 return ret; 1512 } 1513 1514 int nvme_set_features(struct nvme_ctrl *dev, unsigned int fid, 1515 unsigned int dword11, void *buffer, size_t buflen, 1516 u32 *result) 1517 { 1518 return nvme_features(dev, nvme_admin_set_features, fid, dword11, buffer, 1519 buflen, result); 1520 } 1521 EXPORT_SYMBOL_GPL(nvme_set_features); 1522 1523 int nvme_get_features(struct nvme_ctrl *dev, unsigned int fid, 1524 unsigned int dword11, void *buffer, size_t buflen, 1525 u32 *result) 1526 { 1527 return nvme_features(dev, nvme_admin_get_features, fid, dword11, buffer, 1528 buflen, result); 1529 } 1530 EXPORT_SYMBOL_GPL(nvme_get_features); 1531 1532 int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count) 1533 { 1534 u32 q_count = (*count - 1) | ((*count - 1) << 16); 1535 u32 result; 1536 int status, nr_io_queues; 1537 1538 status = nvme_set_features(ctrl, NVME_FEAT_NUM_QUEUES, q_count, NULL, 0, 1539 &result); 1540 if (status < 0) 1541 return status; 1542 1543 /* 1544 * Degraded controllers might return an error when setting the queue 1545 * count. We still want to be able to bring them online and offer 1546 * access to the admin queue, as that might be only way to fix them up. 1547 */ 1548 if (status > 0) { 1549 dev_err(ctrl->device, "Could not set queue count (%d)\n", status); 1550 *count = 0; 1551 } else { 1552 nr_io_queues = min(result & 0xffff, result >> 16) + 1; 1553 *count = min(*count, nr_io_queues); 1554 } 1555 1556 return 0; 1557 } 1558 EXPORT_SYMBOL_GPL(nvme_set_queue_count); 1559 1560 #define NVME_AEN_SUPPORTED \ 1561 (NVME_AEN_CFG_NS_ATTR | NVME_AEN_CFG_FW_ACT | \ 1562 NVME_AEN_CFG_ANA_CHANGE | NVME_AEN_CFG_DISC_CHANGE) 1563 1564 static void nvme_enable_aen(struct nvme_ctrl *ctrl) 1565 { 1566 u32 result, supported_aens = ctrl->oaes & NVME_AEN_SUPPORTED; 1567 int status; 1568 1569 if (!supported_aens) 1570 return; 1571 1572 status = nvme_set_features(ctrl, NVME_FEAT_ASYNC_EVENT, supported_aens, 1573 NULL, 0, &result); 1574 if (status) 1575 dev_warn(ctrl->device, "Failed to configure AEN (cfg %x)\n", 1576 supported_aens); 1577 1578 queue_work(nvme_wq, &ctrl->async_event_work); 1579 } 1580 1581 static int nvme_ns_open(struct nvme_ns *ns) 1582 { 1583 1584 /* should never be called due to GENHD_FL_HIDDEN */ 1585 if (WARN_ON_ONCE(nvme_ns_head_multipath(ns->head))) 1586 goto fail; 1587 if (!nvme_get_ns(ns)) 1588 goto fail; 1589 if (!try_module_get(ns->ctrl->ops->module)) 1590 goto fail_put_ns; 1591 1592 return 0; 1593 1594 fail_put_ns: 1595 nvme_put_ns(ns); 1596 fail: 1597 return -ENXIO; 1598 } 1599 1600 static void nvme_ns_release(struct nvme_ns *ns) 1601 { 1602 1603 module_put(ns->ctrl->ops->module); 1604 nvme_put_ns(ns); 1605 } 1606 1607 static int nvme_open(struct block_device *bdev, fmode_t mode) 1608 { 1609 return nvme_ns_open(bdev->bd_disk->private_data); 1610 } 1611 1612 static void nvme_release(struct gendisk *disk, fmode_t mode) 1613 { 1614 nvme_ns_release(disk->private_data); 1615 } 1616 1617 int nvme_getgeo(struct block_device *bdev, struct hd_geometry *geo) 1618 { 1619 /* some standard values */ 1620 geo->heads = 1 << 6; 1621 geo->sectors = 1 << 5; 1622 geo->cylinders = get_capacity(bdev->bd_disk) >> 11; 1623 return 0; 1624 } 1625 1626 #ifdef CONFIG_BLK_DEV_INTEGRITY 1627 static void nvme_init_integrity(struct gendisk *disk, struct nvme_ns *ns, 1628 u32 max_integrity_segments) 1629 { 1630 struct blk_integrity integrity = { }; 1631 1632 switch (ns->pi_type) { 1633 case NVME_NS_DPS_PI_TYPE3: 1634 switch (ns->guard_type) { 1635 case NVME_NVM_NS_16B_GUARD: 1636 integrity.profile = &t10_pi_type3_crc; 1637 integrity.tag_size = sizeof(u16) + sizeof(u32); 1638 integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE; 1639 break; 1640 case NVME_NVM_NS_64B_GUARD: 1641 integrity.profile = &ext_pi_type3_crc64; 1642 integrity.tag_size = sizeof(u16) + 6; 1643 integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE; 1644 break; 1645 default: 1646 integrity.profile = NULL; 1647 break; 1648 } 1649 break; 1650 case NVME_NS_DPS_PI_TYPE1: 1651 case NVME_NS_DPS_PI_TYPE2: 1652 switch (ns->guard_type) { 1653 case NVME_NVM_NS_16B_GUARD: 1654 integrity.profile = &t10_pi_type1_crc; 1655 integrity.tag_size = sizeof(u16); 1656 integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE; 1657 break; 1658 case NVME_NVM_NS_64B_GUARD: 1659 integrity.profile = &ext_pi_type1_crc64; 1660 integrity.tag_size = sizeof(u16); 1661 integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE; 1662 break; 1663 default: 1664 integrity.profile = NULL; 1665 break; 1666 } 1667 break; 1668 default: 1669 integrity.profile = NULL; 1670 break; 1671 } 1672 1673 integrity.tuple_size = ns->ms; 1674 blk_integrity_register(disk, &integrity); 1675 blk_queue_max_integrity_segments(disk->queue, max_integrity_segments); 1676 } 1677 #else 1678 static void nvme_init_integrity(struct gendisk *disk, struct nvme_ns *ns, 1679 u32 max_integrity_segments) 1680 { 1681 } 1682 #endif /* CONFIG_BLK_DEV_INTEGRITY */ 1683 1684 static void nvme_config_discard(struct gendisk *disk, struct nvme_ns *ns) 1685 { 1686 struct nvme_ctrl *ctrl = ns->ctrl; 1687 struct request_queue *queue = disk->queue; 1688 u32 size = queue_logical_block_size(queue); 1689 1690 if (ctrl->max_discard_sectors == 0) { 1691 blk_queue_max_discard_sectors(queue, 0); 1692 return; 1693 } 1694 1695 BUILD_BUG_ON(PAGE_SIZE / sizeof(struct nvme_dsm_range) < 1696 NVME_DSM_MAX_RANGES); 1697 1698 queue->limits.discard_granularity = size; 1699 1700 /* If discard is already enabled, don't reset queue limits */ 1701 if (queue->limits.max_discard_sectors) 1702 return; 1703 1704 if (ctrl->dmrsl && ctrl->dmrsl <= nvme_sect_to_lba(ns, UINT_MAX)) 1705 ctrl->max_discard_sectors = nvme_lba_to_sect(ns, ctrl->dmrsl); 1706 1707 blk_queue_max_discard_sectors(queue, ctrl->max_discard_sectors); 1708 blk_queue_max_discard_segments(queue, ctrl->max_discard_segments); 1709 1710 if (ctrl->quirks & NVME_QUIRK_DEALLOCATE_ZEROES) 1711 blk_queue_max_write_zeroes_sectors(queue, UINT_MAX); 1712 } 1713 1714 static bool nvme_ns_ids_equal(struct nvme_ns_ids *a, struct nvme_ns_ids *b) 1715 { 1716 return uuid_equal(&a->uuid, &b->uuid) && 1717 memcmp(&a->nguid, &b->nguid, sizeof(a->nguid)) == 0 && 1718 memcmp(&a->eui64, &b->eui64, sizeof(a->eui64)) == 0 && 1719 a->csi == b->csi; 1720 } 1721 1722 static int nvme_init_ms(struct nvme_ns *ns, struct nvme_id_ns *id) 1723 { 1724 bool first = id->dps & NVME_NS_DPS_PI_FIRST; 1725 unsigned lbaf = nvme_lbaf_index(id->flbas); 1726 struct nvme_ctrl *ctrl = ns->ctrl; 1727 struct nvme_command c = { }; 1728 struct nvme_id_ns_nvm *nvm; 1729 int ret = 0; 1730 u32 elbaf; 1731 1732 ns->pi_size = 0; 1733 ns->ms = le16_to_cpu(id->lbaf[lbaf].ms); 1734 if (!(ctrl->ctratt & NVME_CTRL_ATTR_ELBAS)) { 1735 ns->pi_size = sizeof(struct t10_pi_tuple); 1736 ns->guard_type = NVME_NVM_NS_16B_GUARD; 1737 goto set_pi; 1738 } 1739 1740 nvm = kzalloc(sizeof(*nvm), GFP_KERNEL); 1741 if (!nvm) 1742 return -ENOMEM; 1743 1744 c.identify.opcode = nvme_admin_identify; 1745 c.identify.nsid = cpu_to_le32(ns->head->ns_id); 1746 c.identify.cns = NVME_ID_CNS_CS_NS; 1747 c.identify.csi = NVME_CSI_NVM; 1748 1749 ret = nvme_submit_sync_cmd(ns->ctrl->admin_q, &c, nvm, sizeof(*nvm)); 1750 if (ret) 1751 goto free_data; 1752 1753 elbaf = le32_to_cpu(nvm->elbaf[lbaf]); 1754 1755 /* no support for storage tag formats right now */ 1756 if (nvme_elbaf_sts(elbaf)) 1757 goto free_data; 1758 1759 ns->guard_type = nvme_elbaf_guard_type(elbaf); 1760 switch (ns->guard_type) { 1761 case NVME_NVM_NS_64B_GUARD: 1762 ns->pi_size = sizeof(struct crc64_pi_tuple); 1763 break; 1764 case NVME_NVM_NS_16B_GUARD: 1765 ns->pi_size = sizeof(struct t10_pi_tuple); 1766 break; 1767 default: 1768 break; 1769 } 1770 1771 free_data: 1772 kfree(nvm); 1773 set_pi: 1774 if (ns->pi_size && (first || ns->ms == ns->pi_size)) 1775 ns->pi_type = id->dps & NVME_NS_DPS_PI_MASK; 1776 else 1777 ns->pi_type = 0; 1778 1779 return ret; 1780 } 1781 1782 static void nvme_configure_metadata(struct nvme_ns *ns, struct nvme_id_ns *id) 1783 { 1784 struct nvme_ctrl *ctrl = ns->ctrl; 1785 1786 if (nvme_init_ms(ns, id)) 1787 return; 1788 1789 ns->features &= ~(NVME_NS_METADATA_SUPPORTED | NVME_NS_EXT_LBAS); 1790 if (!ns->ms || !(ctrl->ops->flags & NVME_F_METADATA_SUPPORTED)) 1791 return; 1792 1793 if (ctrl->ops->flags & NVME_F_FABRICS) { 1794 /* 1795 * The NVMe over Fabrics specification only supports metadata as 1796 * part of the extended data LBA. We rely on HCA/HBA support to 1797 * remap the separate metadata buffer from the block layer. 1798 */ 1799 if (WARN_ON_ONCE(!(id->flbas & NVME_NS_FLBAS_META_EXT))) 1800 return; 1801 1802 ns->features |= NVME_NS_EXT_LBAS; 1803 1804 /* 1805 * The current fabrics transport drivers support namespace 1806 * metadata formats only if nvme_ns_has_pi() returns true. 1807 * Suppress support for all other formats so the namespace will 1808 * have a 0 capacity and not be usable through the block stack. 1809 * 1810 * Note, this check will need to be modified if any drivers 1811 * gain the ability to use other metadata formats. 1812 */ 1813 if (ctrl->max_integrity_segments && nvme_ns_has_pi(ns)) 1814 ns->features |= NVME_NS_METADATA_SUPPORTED; 1815 } else { 1816 /* 1817 * For PCIe controllers, we can't easily remap the separate 1818 * metadata buffer from the block layer and thus require a 1819 * separate metadata buffer for block layer metadata/PI support. 1820 * We allow extended LBAs for the passthrough interface, though. 1821 */ 1822 if (id->flbas & NVME_NS_FLBAS_META_EXT) 1823 ns->features |= NVME_NS_EXT_LBAS; 1824 else 1825 ns->features |= NVME_NS_METADATA_SUPPORTED; 1826 } 1827 } 1828 1829 static void nvme_set_queue_limits(struct nvme_ctrl *ctrl, 1830 struct request_queue *q) 1831 { 1832 bool vwc = ctrl->vwc & NVME_CTRL_VWC_PRESENT; 1833 1834 if (ctrl->max_hw_sectors) { 1835 u32 max_segments = 1836 (ctrl->max_hw_sectors / (NVME_CTRL_PAGE_SIZE >> 9)) + 1; 1837 1838 max_segments = min_not_zero(max_segments, ctrl->max_segments); 1839 blk_queue_max_hw_sectors(q, ctrl->max_hw_sectors); 1840 blk_queue_max_segments(q, min_t(u32, max_segments, USHRT_MAX)); 1841 } 1842 blk_queue_virt_boundary(q, NVME_CTRL_PAGE_SIZE - 1); 1843 blk_queue_dma_alignment(q, 3); 1844 blk_queue_write_cache(q, vwc, vwc); 1845 } 1846 1847 static void nvme_update_disk_info(struct gendisk *disk, 1848 struct nvme_ns *ns, struct nvme_id_ns *id) 1849 { 1850 sector_t capacity = nvme_lba_to_sect(ns, le64_to_cpu(id->nsze)); 1851 unsigned short bs = 1 << ns->lba_shift; 1852 u32 atomic_bs, phys_bs, io_opt = 0; 1853 1854 /* 1855 * The block layer can't support LBA sizes larger than the page size 1856 * yet, so catch this early and don't allow block I/O. 1857 */ 1858 if (ns->lba_shift > PAGE_SHIFT) { 1859 capacity = 0; 1860 bs = (1 << 9); 1861 } 1862 1863 blk_integrity_unregister(disk); 1864 1865 atomic_bs = phys_bs = bs; 1866 if (id->nabo == 0) { 1867 /* 1868 * Bit 1 indicates whether NAWUPF is defined for this namespace 1869 * and whether it should be used instead of AWUPF. If NAWUPF == 1870 * 0 then AWUPF must be used instead. 1871 */ 1872 if (id->nsfeat & NVME_NS_FEAT_ATOMICS && id->nawupf) 1873 atomic_bs = (1 + le16_to_cpu(id->nawupf)) * bs; 1874 else 1875 atomic_bs = (1 + ns->ctrl->subsys->awupf) * bs; 1876 } 1877 1878 if (id->nsfeat & NVME_NS_FEAT_IO_OPT) { 1879 /* NPWG = Namespace Preferred Write Granularity */ 1880 phys_bs = bs * (1 + le16_to_cpu(id->npwg)); 1881 /* NOWS = Namespace Optimal Write Size */ 1882 io_opt = bs * (1 + le16_to_cpu(id->nows)); 1883 } 1884 1885 blk_queue_logical_block_size(disk->queue, bs); 1886 /* 1887 * Linux filesystems assume writing a single physical block is 1888 * an atomic operation. Hence limit the physical block size to the 1889 * value of the Atomic Write Unit Power Fail parameter. 1890 */ 1891 blk_queue_physical_block_size(disk->queue, min(phys_bs, atomic_bs)); 1892 blk_queue_io_min(disk->queue, phys_bs); 1893 blk_queue_io_opt(disk->queue, io_opt); 1894 1895 /* 1896 * Register a metadata profile for PI, or the plain non-integrity NVMe 1897 * metadata masquerading as Type 0 if supported, otherwise reject block 1898 * I/O to namespaces with metadata except when the namespace supports 1899 * PI, as it can strip/insert in that case. 1900 */ 1901 if (ns->ms) { 1902 if (IS_ENABLED(CONFIG_BLK_DEV_INTEGRITY) && 1903 (ns->features & NVME_NS_METADATA_SUPPORTED)) 1904 nvme_init_integrity(disk, ns, 1905 ns->ctrl->max_integrity_segments); 1906 else if (!nvme_ns_has_pi(ns)) 1907 capacity = 0; 1908 } 1909 1910 set_capacity_and_notify(disk, capacity); 1911 1912 nvme_config_discard(disk, ns); 1913 blk_queue_max_write_zeroes_sectors(disk->queue, 1914 ns->ctrl->max_zeroes_sectors); 1915 } 1916 1917 static bool nvme_ns_is_readonly(struct nvme_ns *ns, struct nvme_ns_info *info) 1918 { 1919 return info->is_readonly || test_bit(NVME_NS_FORCE_RO, &ns->flags); 1920 } 1921 1922 static inline bool nvme_first_scan(struct gendisk *disk) 1923 { 1924 /* nvme_alloc_ns() scans the disk prior to adding it */ 1925 return !disk_live(disk); 1926 } 1927 1928 static void nvme_set_chunk_sectors(struct nvme_ns *ns, struct nvme_id_ns *id) 1929 { 1930 struct nvme_ctrl *ctrl = ns->ctrl; 1931 u32 iob; 1932 1933 if ((ctrl->quirks & NVME_QUIRK_STRIPE_SIZE) && 1934 is_power_of_2(ctrl->max_hw_sectors)) 1935 iob = ctrl->max_hw_sectors; 1936 else 1937 iob = nvme_lba_to_sect(ns, le16_to_cpu(id->noiob)); 1938 1939 if (!iob) 1940 return; 1941 1942 if (!is_power_of_2(iob)) { 1943 if (nvme_first_scan(ns->disk)) 1944 pr_warn("%s: ignoring unaligned IO boundary:%u\n", 1945 ns->disk->disk_name, iob); 1946 return; 1947 } 1948 1949 if (blk_queue_is_zoned(ns->disk->queue)) { 1950 if (nvme_first_scan(ns->disk)) 1951 pr_warn("%s: ignoring zoned namespace IO boundary\n", 1952 ns->disk->disk_name); 1953 return; 1954 } 1955 1956 blk_queue_chunk_sectors(ns->queue, iob); 1957 } 1958 1959 static int nvme_update_ns_info_generic(struct nvme_ns *ns, 1960 struct nvme_ns_info *info) 1961 { 1962 blk_mq_freeze_queue(ns->disk->queue); 1963 nvme_set_queue_limits(ns->ctrl, ns->queue); 1964 set_disk_ro(ns->disk, nvme_ns_is_readonly(ns, info)); 1965 blk_mq_unfreeze_queue(ns->disk->queue); 1966 1967 if (nvme_ns_head_multipath(ns->head)) { 1968 blk_mq_freeze_queue(ns->head->disk->queue); 1969 set_disk_ro(ns->head->disk, nvme_ns_is_readonly(ns, info)); 1970 nvme_mpath_revalidate_paths(ns); 1971 blk_stack_limits(&ns->head->disk->queue->limits, 1972 &ns->queue->limits, 0); 1973 ns->head->disk->flags |= GENHD_FL_HIDDEN; 1974 blk_mq_unfreeze_queue(ns->head->disk->queue); 1975 } 1976 1977 /* Hide the block-interface for these devices */ 1978 ns->disk->flags |= GENHD_FL_HIDDEN; 1979 set_bit(NVME_NS_READY, &ns->flags); 1980 1981 return 0; 1982 } 1983 1984 static int nvme_update_ns_info_block(struct nvme_ns *ns, 1985 struct nvme_ns_info *info) 1986 { 1987 struct nvme_id_ns *id; 1988 unsigned lbaf; 1989 int ret; 1990 1991 ret = nvme_identify_ns(ns->ctrl, info->nsid, &id); 1992 if (ret) 1993 return ret; 1994 1995 blk_mq_freeze_queue(ns->disk->queue); 1996 lbaf = nvme_lbaf_index(id->flbas); 1997 ns->lba_shift = id->lbaf[lbaf].ds; 1998 nvme_set_queue_limits(ns->ctrl, ns->queue); 1999 2000 nvme_configure_metadata(ns, id); 2001 nvme_set_chunk_sectors(ns, id); 2002 nvme_update_disk_info(ns->disk, ns, id); 2003 2004 if (ns->head->ids.csi == NVME_CSI_ZNS) { 2005 ret = nvme_update_zone_info(ns, lbaf); 2006 if (ret) { 2007 blk_mq_unfreeze_queue(ns->disk->queue); 2008 goto out; 2009 } 2010 } 2011 2012 /* 2013 * Only set the DEAC bit if the device guarantees that reads from 2014 * deallocated data return zeroes. While the DEAC bit does not 2015 * require that, it must be a no-op if reads from deallocated data 2016 * do not return zeroes. 2017 */ 2018 if ((id->dlfeat & 0x7) == 0x1 && (id->dlfeat & (1 << 3))) 2019 ns->features |= NVME_NS_DEAC; 2020 set_disk_ro(ns->disk, nvme_ns_is_readonly(ns, info)); 2021 set_bit(NVME_NS_READY, &ns->flags); 2022 blk_mq_unfreeze_queue(ns->disk->queue); 2023 2024 if (blk_queue_is_zoned(ns->queue)) { 2025 ret = nvme_revalidate_zones(ns); 2026 if (ret && !nvme_first_scan(ns->disk)) 2027 goto out; 2028 } 2029 2030 if (nvme_ns_head_multipath(ns->head)) { 2031 blk_mq_freeze_queue(ns->head->disk->queue); 2032 nvme_update_disk_info(ns->head->disk, ns, id); 2033 set_disk_ro(ns->head->disk, nvme_ns_is_readonly(ns, info)); 2034 nvme_mpath_revalidate_paths(ns); 2035 blk_stack_limits(&ns->head->disk->queue->limits, 2036 &ns->queue->limits, 0); 2037 disk_update_readahead(ns->head->disk); 2038 blk_mq_unfreeze_queue(ns->head->disk->queue); 2039 } 2040 2041 ret = 0; 2042 out: 2043 /* 2044 * If probing fails due an unsupported feature, hide the block device, 2045 * but still allow other access. 2046 */ 2047 if (ret == -ENODEV) { 2048 ns->disk->flags |= GENHD_FL_HIDDEN; 2049 set_bit(NVME_NS_READY, &ns->flags); 2050 ret = 0; 2051 } 2052 kfree(id); 2053 return ret; 2054 } 2055 2056 static int nvme_update_ns_info(struct nvme_ns *ns, struct nvme_ns_info *info) 2057 { 2058 switch (info->ids.csi) { 2059 case NVME_CSI_ZNS: 2060 if (!IS_ENABLED(CONFIG_BLK_DEV_ZONED)) { 2061 dev_info(ns->ctrl->device, 2062 "block device for nsid %u not supported without CONFIG_BLK_DEV_ZONED\n", 2063 info->nsid); 2064 return nvme_update_ns_info_generic(ns, info); 2065 } 2066 return nvme_update_ns_info_block(ns, info); 2067 case NVME_CSI_NVM: 2068 return nvme_update_ns_info_block(ns, info); 2069 default: 2070 dev_info(ns->ctrl->device, 2071 "block device for nsid %u not supported (csi %u)\n", 2072 info->nsid, info->ids.csi); 2073 return nvme_update_ns_info_generic(ns, info); 2074 } 2075 } 2076 2077 static char nvme_pr_type(enum pr_type type) 2078 { 2079 switch (type) { 2080 case PR_WRITE_EXCLUSIVE: 2081 return 1; 2082 case PR_EXCLUSIVE_ACCESS: 2083 return 2; 2084 case PR_WRITE_EXCLUSIVE_REG_ONLY: 2085 return 3; 2086 case PR_EXCLUSIVE_ACCESS_REG_ONLY: 2087 return 4; 2088 case PR_WRITE_EXCLUSIVE_ALL_REGS: 2089 return 5; 2090 case PR_EXCLUSIVE_ACCESS_ALL_REGS: 2091 return 6; 2092 default: 2093 return 0; 2094 } 2095 } 2096 2097 static int nvme_send_ns_head_pr_command(struct block_device *bdev, 2098 struct nvme_command *c, u8 data[16]) 2099 { 2100 struct nvme_ns_head *head = bdev->bd_disk->private_data; 2101 int srcu_idx = srcu_read_lock(&head->srcu); 2102 struct nvme_ns *ns = nvme_find_path(head); 2103 int ret = -EWOULDBLOCK; 2104 2105 if (ns) { 2106 c->common.nsid = cpu_to_le32(ns->head->ns_id); 2107 ret = nvme_submit_sync_cmd(ns->queue, c, data, 16); 2108 } 2109 srcu_read_unlock(&head->srcu, srcu_idx); 2110 return ret; 2111 } 2112 2113 static int nvme_send_ns_pr_command(struct nvme_ns *ns, struct nvme_command *c, 2114 u8 data[16]) 2115 { 2116 c->common.nsid = cpu_to_le32(ns->head->ns_id); 2117 return nvme_submit_sync_cmd(ns->queue, c, data, 16); 2118 } 2119 2120 static int nvme_sc_to_pr_err(int nvme_sc) 2121 { 2122 if (nvme_is_path_error(nvme_sc)) 2123 return PR_STS_PATH_FAILED; 2124 2125 switch (nvme_sc) { 2126 case NVME_SC_SUCCESS: 2127 return PR_STS_SUCCESS; 2128 case NVME_SC_RESERVATION_CONFLICT: 2129 return PR_STS_RESERVATION_CONFLICT; 2130 case NVME_SC_ONCS_NOT_SUPPORTED: 2131 return -EOPNOTSUPP; 2132 case NVME_SC_BAD_ATTRIBUTES: 2133 case NVME_SC_INVALID_OPCODE: 2134 case NVME_SC_INVALID_FIELD: 2135 case NVME_SC_INVALID_NS: 2136 return -EINVAL; 2137 default: 2138 return PR_STS_IOERR; 2139 } 2140 } 2141 2142 static int nvme_pr_command(struct block_device *bdev, u32 cdw10, 2143 u64 key, u64 sa_key, u8 op) 2144 { 2145 struct nvme_command c = { }; 2146 u8 data[16] = { 0, }; 2147 int ret; 2148 2149 put_unaligned_le64(key, &data[0]); 2150 put_unaligned_le64(sa_key, &data[8]); 2151 2152 c.common.opcode = op; 2153 c.common.cdw10 = cpu_to_le32(cdw10); 2154 2155 if (IS_ENABLED(CONFIG_NVME_MULTIPATH) && 2156 bdev->bd_disk->fops == &nvme_ns_head_ops) 2157 ret = nvme_send_ns_head_pr_command(bdev, &c, data); 2158 else 2159 ret = nvme_send_ns_pr_command(bdev->bd_disk->private_data, &c, 2160 data); 2161 if (ret < 0) 2162 return ret; 2163 2164 return nvme_sc_to_pr_err(ret); 2165 } 2166 2167 static int nvme_pr_register(struct block_device *bdev, u64 old, 2168 u64 new, unsigned flags) 2169 { 2170 u32 cdw10; 2171 2172 if (flags & ~PR_FL_IGNORE_KEY) 2173 return -EOPNOTSUPP; 2174 2175 cdw10 = old ? 2 : 0; 2176 cdw10 |= (flags & PR_FL_IGNORE_KEY) ? 1 << 3 : 0; 2177 cdw10 |= (1 << 30) | (1 << 31); /* PTPL=1 */ 2178 return nvme_pr_command(bdev, cdw10, old, new, nvme_cmd_resv_register); 2179 } 2180 2181 static int nvme_pr_reserve(struct block_device *bdev, u64 key, 2182 enum pr_type type, unsigned flags) 2183 { 2184 u32 cdw10; 2185 2186 if (flags & ~PR_FL_IGNORE_KEY) 2187 return -EOPNOTSUPP; 2188 2189 cdw10 = nvme_pr_type(type) << 8; 2190 cdw10 |= ((flags & PR_FL_IGNORE_KEY) ? 1 << 3 : 0); 2191 return nvme_pr_command(bdev, cdw10, key, 0, nvme_cmd_resv_acquire); 2192 } 2193 2194 static int nvme_pr_preempt(struct block_device *bdev, u64 old, u64 new, 2195 enum pr_type type, bool abort) 2196 { 2197 u32 cdw10 = nvme_pr_type(type) << 8 | (abort ? 2 : 1); 2198 2199 return nvme_pr_command(bdev, cdw10, old, new, nvme_cmd_resv_acquire); 2200 } 2201 2202 static int nvme_pr_clear(struct block_device *bdev, u64 key) 2203 { 2204 u32 cdw10 = 1 | (key ? 0 : 1 << 3); 2205 2206 return nvme_pr_command(bdev, cdw10, key, 0, nvme_cmd_resv_release); 2207 } 2208 2209 static int nvme_pr_release(struct block_device *bdev, u64 key, enum pr_type type) 2210 { 2211 u32 cdw10 = nvme_pr_type(type) << 8 | (key ? 0 : 1 << 3); 2212 2213 return nvme_pr_command(bdev, cdw10, key, 0, nvme_cmd_resv_release); 2214 } 2215 2216 const struct pr_ops nvme_pr_ops = { 2217 .pr_register = nvme_pr_register, 2218 .pr_reserve = nvme_pr_reserve, 2219 .pr_release = nvme_pr_release, 2220 .pr_preempt = nvme_pr_preempt, 2221 .pr_clear = nvme_pr_clear, 2222 }; 2223 2224 #ifdef CONFIG_BLK_SED_OPAL 2225 static int nvme_sec_submit(void *data, u16 spsp, u8 secp, void *buffer, size_t len, 2226 bool send) 2227 { 2228 struct nvme_ctrl *ctrl = data; 2229 struct nvme_command cmd = { }; 2230 2231 if (send) 2232 cmd.common.opcode = nvme_admin_security_send; 2233 else 2234 cmd.common.opcode = nvme_admin_security_recv; 2235 cmd.common.nsid = 0; 2236 cmd.common.cdw10 = cpu_to_le32(((u32)secp) << 24 | ((u32)spsp) << 8); 2237 cmd.common.cdw11 = cpu_to_le32(len); 2238 2239 return __nvme_submit_sync_cmd(ctrl->admin_q, &cmd, NULL, buffer, len, 2240 NVME_QID_ANY, 1, 0); 2241 } 2242 2243 static void nvme_configure_opal(struct nvme_ctrl *ctrl, bool was_suspended) 2244 { 2245 if (ctrl->oacs & NVME_CTRL_OACS_SEC_SUPP) { 2246 if (!ctrl->opal_dev) 2247 ctrl->opal_dev = init_opal_dev(ctrl, &nvme_sec_submit); 2248 else if (was_suspended) 2249 opal_unlock_from_suspend(ctrl->opal_dev); 2250 } else { 2251 free_opal_dev(ctrl->opal_dev); 2252 ctrl->opal_dev = NULL; 2253 } 2254 } 2255 #else 2256 static void nvme_configure_opal(struct nvme_ctrl *ctrl, bool was_suspended) 2257 { 2258 } 2259 #endif /* CONFIG_BLK_SED_OPAL */ 2260 2261 #ifdef CONFIG_BLK_DEV_ZONED 2262 static int nvme_report_zones(struct gendisk *disk, sector_t sector, 2263 unsigned int nr_zones, report_zones_cb cb, void *data) 2264 { 2265 return nvme_ns_report_zones(disk->private_data, sector, nr_zones, cb, 2266 data); 2267 } 2268 #else 2269 #define nvme_report_zones NULL 2270 #endif /* CONFIG_BLK_DEV_ZONED */ 2271 2272 static const struct block_device_operations nvme_bdev_ops = { 2273 .owner = THIS_MODULE, 2274 .ioctl = nvme_ioctl, 2275 .compat_ioctl = blkdev_compat_ptr_ioctl, 2276 .open = nvme_open, 2277 .release = nvme_release, 2278 .getgeo = nvme_getgeo, 2279 .report_zones = nvme_report_zones, 2280 .pr_ops = &nvme_pr_ops, 2281 }; 2282 2283 static int nvme_wait_ready(struct nvme_ctrl *ctrl, u32 mask, u32 val, 2284 u32 timeout, const char *op) 2285 { 2286 unsigned long timeout_jiffies = jiffies + timeout * HZ; 2287 u32 csts; 2288 int ret; 2289 2290 while ((ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts)) == 0) { 2291 if (csts == ~0) 2292 return -ENODEV; 2293 if ((csts & mask) == val) 2294 break; 2295 2296 usleep_range(1000, 2000); 2297 if (fatal_signal_pending(current)) 2298 return -EINTR; 2299 if (time_after(jiffies, timeout_jiffies)) { 2300 dev_err(ctrl->device, 2301 "Device not ready; aborting %s, CSTS=0x%x\n", 2302 op, csts); 2303 return -ENODEV; 2304 } 2305 } 2306 2307 return ret; 2308 } 2309 2310 int nvme_disable_ctrl(struct nvme_ctrl *ctrl, bool shutdown) 2311 { 2312 int ret; 2313 2314 ctrl->ctrl_config &= ~NVME_CC_SHN_MASK; 2315 if (shutdown) 2316 ctrl->ctrl_config |= NVME_CC_SHN_NORMAL; 2317 else 2318 ctrl->ctrl_config &= ~NVME_CC_ENABLE; 2319 2320 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config); 2321 if (ret) 2322 return ret; 2323 2324 if (shutdown) { 2325 return nvme_wait_ready(ctrl, NVME_CSTS_SHST_MASK, 2326 NVME_CSTS_SHST_CMPLT, 2327 ctrl->shutdown_timeout, "shutdown"); 2328 } 2329 if (ctrl->quirks & NVME_QUIRK_DELAY_BEFORE_CHK_RDY) 2330 msleep(NVME_QUIRK_DELAY_AMOUNT); 2331 return nvme_wait_ready(ctrl, NVME_CSTS_RDY, 0, 2332 (NVME_CAP_TIMEOUT(ctrl->cap) + 1) / 2, "reset"); 2333 } 2334 EXPORT_SYMBOL_GPL(nvme_disable_ctrl); 2335 2336 int nvme_enable_ctrl(struct nvme_ctrl *ctrl) 2337 { 2338 unsigned dev_page_min; 2339 u32 timeout; 2340 int ret; 2341 2342 ret = ctrl->ops->reg_read64(ctrl, NVME_REG_CAP, &ctrl->cap); 2343 if (ret) { 2344 dev_err(ctrl->device, "Reading CAP failed (%d)\n", ret); 2345 return ret; 2346 } 2347 dev_page_min = NVME_CAP_MPSMIN(ctrl->cap) + 12; 2348 2349 if (NVME_CTRL_PAGE_SHIFT < dev_page_min) { 2350 dev_err(ctrl->device, 2351 "Minimum device page size %u too large for host (%u)\n", 2352 1 << dev_page_min, 1 << NVME_CTRL_PAGE_SHIFT); 2353 return -ENODEV; 2354 } 2355 2356 if (NVME_CAP_CSS(ctrl->cap) & NVME_CAP_CSS_CSI) 2357 ctrl->ctrl_config = NVME_CC_CSS_CSI; 2358 else 2359 ctrl->ctrl_config = NVME_CC_CSS_NVM; 2360 2361 if (ctrl->cap & NVME_CAP_CRMS_CRWMS) { 2362 u32 crto; 2363 2364 ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CRTO, &crto); 2365 if (ret) { 2366 dev_err(ctrl->device, "Reading CRTO failed (%d)\n", 2367 ret); 2368 return ret; 2369 } 2370 2371 if (ctrl->cap & NVME_CAP_CRMS_CRIMS) { 2372 ctrl->ctrl_config |= NVME_CC_CRIME; 2373 timeout = NVME_CRTO_CRIMT(crto); 2374 } else { 2375 timeout = NVME_CRTO_CRWMT(crto); 2376 } 2377 } else { 2378 timeout = NVME_CAP_TIMEOUT(ctrl->cap); 2379 } 2380 2381 ctrl->ctrl_config |= (NVME_CTRL_PAGE_SHIFT - 12) << NVME_CC_MPS_SHIFT; 2382 ctrl->ctrl_config |= NVME_CC_AMS_RR | NVME_CC_SHN_NONE; 2383 ctrl->ctrl_config |= NVME_CC_IOSQES | NVME_CC_IOCQES; 2384 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config); 2385 if (ret) 2386 return ret; 2387 2388 /* Flush write to device (required if transport is PCI) */ 2389 ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CC, &ctrl->ctrl_config); 2390 if (ret) 2391 return ret; 2392 2393 ctrl->ctrl_config |= NVME_CC_ENABLE; 2394 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config); 2395 if (ret) 2396 return ret; 2397 return nvme_wait_ready(ctrl, NVME_CSTS_RDY, NVME_CSTS_RDY, 2398 (timeout + 1) / 2, "initialisation"); 2399 } 2400 EXPORT_SYMBOL_GPL(nvme_enable_ctrl); 2401 2402 static int nvme_configure_timestamp(struct nvme_ctrl *ctrl) 2403 { 2404 __le64 ts; 2405 int ret; 2406 2407 if (!(ctrl->oncs & NVME_CTRL_ONCS_TIMESTAMP)) 2408 return 0; 2409 2410 ts = cpu_to_le64(ktime_to_ms(ktime_get_real())); 2411 ret = nvme_set_features(ctrl, NVME_FEAT_TIMESTAMP, 0, &ts, sizeof(ts), 2412 NULL); 2413 if (ret) 2414 dev_warn_once(ctrl->device, 2415 "could not set timestamp (%d)\n", ret); 2416 return ret; 2417 } 2418 2419 static int nvme_configure_host_options(struct nvme_ctrl *ctrl) 2420 { 2421 struct nvme_feat_host_behavior *host; 2422 u8 acre = 0, lbafee = 0; 2423 int ret; 2424 2425 /* Don't bother enabling the feature if retry delay is not reported */ 2426 if (ctrl->crdt[0]) 2427 acre = NVME_ENABLE_ACRE; 2428 if (ctrl->ctratt & NVME_CTRL_ATTR_ELBAS) 2429 lbafee = NVME_ENABLE_LBAFEE; 2430 2431 if (!acre && !lbafee) 2432 return 0; 2433 2434 host = kzalloc(sizeof(*host), GFP_KERNEL); 2435 if (!host) 2436 return 0; 2437 2438 host->acre = acre; 2439 host->lbafee = lbafee; 2440 ret = nvme_set_features(ctrl, NVME_FEAT_HOST_BEHAVIOR, 0, 2441 host, sizeof(*host), NULL); 2442 kfree(host); 2443 return ret; 2444 } 2445 2446 /* 2447 * The function checks whether the given total (exlat + enlat) latency of 2448 * a power state allows the latter to be used as an APST transition target. 2449 * It does so by comparing the latency to the primary and secondary latency 2450 * tolerances defined by module params. If there's a match, the corresponding 2451 * timeout value is returned and the matching tolerance index (1 or 2) is 2452 * reported. 2453 */ 2454 static bool nvme_apst_get_transition_time(u64 total_latency, 2455 u64 *transition_time, unsigned *last_index) 2456 { 2457 if (total_latency <= apst_primary_latency_tol_us) { 2458 if (*last_index == 1) 2459 return false; 2460 *last_index = 1; 2461 *transition_time = apst_primary_timeout_ms; 2462 return true; 2463 } 2464 if (apst_secondary_timeout_ms && 2465 total_latency <= apst_secondary_latency_tol_us) { 2466 if (*last_index <= 2) 2467 return false; 2468 *last_index = 2; 2469 *transition_time = apst_secondary_timeout_ms; 2470 return true; 2471 } 2472 return false; 2473 } 2474 2475 /* 2476 * APST (Autonomous Power State Transition) lets us program a table of power 2477 * state transitions that the controller will perform automatically. 2478 * 2479 * Depending on module params, one of the two supported techniques will be used: 2480 * 2481 * - If the parameters provide explicit timeouts and tolerances, they will be 2482 * used to build a table with up to 2 non-operational states to transition to. 2483 * The default parameter values were selected based on the values used by 2484 * Microsoft's and Intel's NVMe drivers. Yet, since we don't implement dynamic 2485 * regeneration of the APST table in the event of switching between external 2486 * and battery power, the timeouts and tolerances reflect a compromise 2487 * between values used by Microsoft for AC and battery scenarios. 2488 * - If not, we'll configure the table with a simple heuristic: we are willing 2489 * to spend at most 2% of the time transitioning between power states. 2490 * Therefore, when running in any given state, we will enter the next 2491 * lower-power non-operational state after waiting 50 * (enlat + exlat) 2492 * microseconds, as long as that state's exit latency is under the requested 2493 * maximum latency. 2494 * 2495 * We will not autonomously enter any non-operational state for which the total 2496 * latency exceeds ps_max_latency_us. 2497 * 2498 * Users can set ps_max_latency_us to zero to turn off APST. 2499 */ 2500 static int nvme_configure_apst(struct nvme_ctrl *ctrl) 2501 { 2502 struct nvme_feat_auto_pst *table; 2503 unsigned apste = 0; 2504 u64 max_lat_us = 0; 2505 __le64 target = 0; 2506 int max_ps = -1; 2507 int state; 2508 int ret; 2509 unsigned last_lt_index = UINT_MAX; 2510 2511 /* 2512 * If APST isn't supported or if we haven't been initialized yet, 2513 * then don't do anything. 2514 */ 2515 if (!ctrl->apsta) 2516 return 0; 2517 2518 if (ctrl->npss > 31) { 2519 dev_warn(ctrl->device, "NPSS is invalid; not using APST\n"); 2520 return 0; 2521 } 2522 2523 table = kzalloc(sizeof(*table), GFP_KERNEL); 2524 if (!table) 2525 return 0; 2526 2527 if (!ctrl->apst_enabled || ctrl->ps_max_latency_us == 0) { 2528 /* Turn off APST. */ 2529 dev_dbg(ctrl->device, "APST disabled\n"); 2530 goto done; 2531 } 2532 2533 /* 2534 * Walk through all states from lowest- to highest-power. 2535 * According to the spec, lower-numbered states use more power. NPSS, 2536 * despite the name, is the index of the lowest-power state, not the 2537 * number of states. 2538 */ 2539 for (state = (int)ctrl->npss; state >= 0; state--) { 2540 u64 total_latency_us, exit_latency_us, transition_ms; 2541 2542 if (target) 2543 table->entries[state] = target; 2544 2545 /* 2546 * Don't allow transitions to the deepest state if it's quirked 2547 * off. 2548 */ 2549 if (state == ctrl->npss && 2550 (ctrl->quirks & NVME_QUIRK_NO_DEEPEST_PS)) 2551 continue; 2552 2553 /* 2554 * Is this state a useful non-operational state for higher-power 2555 * states to autonomously transition to? 2556 */ 2557 if (!(ctrl->psd[state].flags & NVME_PS_FLAGS_NON_OP_STATE)) 2558 continue; 2559 2560 exit_latency_us = (u64)le32_to_cpu(ctrl->psd[state].exit_lat); 2561 if (exit_latency_us > ctrl->ps_max_latency_us) 2562 continue; 2563 2564 total_latency_us = exit_latency_us + 2565 le32_to_cpu(ctrl->psd[state].entry_lat); 2566 2567 /* 2568 * This state is good. It can be used as the APST idle target 2569 * for higher power states. 2570 */ 2571 if (apst_primary_timeout_ms && apst_primary_latency_tol_us) { 2572 if (!nvme_apst_get_transition_time(total_latency_us, 2573 &transition_ms, &last_lt_index)) 2574 continue; 2575 } else { 2576 transition_ms = total_latency_us + 19; 2577 do_div(transition_ms, 20); 2578 if (transition_ms > (1 << 24) - 1) 2579 transition_ms = (1 << 24) - 1; 2580 } 2581 2582 target = cpu_to_le64((state << 3) | (transition_ms << 8)); 2583 if (max_ps == -1) 2584 max_ps = state; 2585 if (total_latency_us > max_lat_us) 2586 max_lat_us = total_latency_us; 2587 } 2588 2589 if (max_ps == -1) 2590 dev_dbg(ctrl->device, "APST enabled but no non-operational states are available\n"); 2591 else 2592 dev_dbg(ctrl->device, "APST enabled: max PS = %d, max round-trip latency = %lluus, table = %*phN\n", 2593 max_ps, max_lat_us, (int)sizeof(*table), table); 2594 apste = 1; 2595 2596 done: 2597 ret = nvme_set_features(ctrl, NVME_FEAT_AUTO_PST, apste, 2598 table, sizeof(*table), NULL); 2599 if (ret) 2600 dev_err(ctrl->device, "failed to set APST feature (%d)\n", ret); 2601 kfree(table); 2602 return ret; 2603 } 2604 2605 static void nvme_set_latency_tolerance(struct device *dev, s32 val) 2606 { 2607 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 2608 u64 latency; 2609 2610 switch (val) { 2611 case PM_QOS_LATENCY_TOLERANCE_NO_CONSTRAINT: 2612 case PM_QOS_LATENCY_ANY: 2613 latency = U64_MAX; 2614 break; 2615 2616 default: 2617 latency = val; 2618 } 2619 2620 if (ctrl->ps_max_latency_us != latency) { 2621 ctrl->ps_max_latency_us = latency; 2622 if (ctrl->state == NVME_CTRL_LIVE) 2623 nvme_configure_apst(ctrl); 2624 } 2625 } 2626 2627 struct nvme_core_quirk_entry { 2628 /* 2629 * NVMe model and firmware strings are padded with spaces. For 2630 * simplicity, strings in the quirk table are padded with NULLs 2631 * instead. 2632 */ 2633 u16 vid; 2634 const char *mn; 2635 const char *fr; 2636 unsigned long quirks; 2637 }; 2638 2639 static const struct nvme_core_quirk_entry core_quirks[] = { 2640 { 2641 /* 2642 * This Toshiba device seems to die using any APST states. See: 2643 * https://bugs.launchpad.net/ubuntu/+source/linux/+bug/1678184/comments/11 2644 */ 2645 .vid = 0x1179, 2646 .mn = "THNSF5256GPUK TOSHIBA", 2647 .quirks = NVME_QUIRK_NO_APST, 2648 }, 2649 { 2650 /* 2651 * This LiteON CL1-3D*-Q11 firmware version has a race 2652 * condition associated with actions related to suspend to idle 2653 * LiteON has resolved the problem in future firmware 2654 */ 2655 .vid = 0x14a4, 2656 .fr = "22301111", 2657 .quirks = NVME_QUIRK_SIMPLE_SUSPEND, 2658 }, 2659 { 2660 /* 2661 * This Kioxia CD6-V Series / HPE PE8030 device times out and 2662 * aborts I/O during any load, but more easily reproducible 2663 * with discards (fstrim). 2664 * 2665 * The device is left in a state where it is also not possible 2666 * to use "nvme set-feature" to disable APST, but booting with 2667 * nvme_core.default_ps_max_latency=0 works. 2668 */ 2669 .vid = 0x1e0f, 2670 .mn = "KCD6XVUL6T40", 2671 .quirks = NVME_QUIRK_NO_APST, 2672 }, 2673 { 2674 /* 2675 * The external Samsung X5 SSD fails initialization without a 2676 * delay before checking if it is ready and has a whole set of 2677 * other problems. To make this even more interesting, it 2678 * shares the PCI ID with internal Samsung 970 Evo Plus that 2679 * does not need or want these quirks. 2680 */ 2681 .vid = 0x144d, 2682 .mn = "Samsung Portable SSD X5", 2683 .quirks = NVME_QUIRK_DELAY_BEFORE_CHK_RDY | 2684 NVME_QUIRK_NO_DEEPEST_PS | 2685 NVME_QUIRK_IGNORE_DEV_SUBNQN, 2686 } 2687 }; 2688 2689 /* match is null-terminated but idstr is space-padded. */ 2690 static bool string_matches(const char *idstr, const char *match, size_t len) 2691 { 2692 size_t matchlen; 2693 2694 if (!match) 2695 return true; 2696 2697 matchlen = strlen(match); 2698 WARN_ON_ONCE(matchlen > len); 2699 2700 if (memcmp(idstr, match, matchlen)) 2701 return false; 2702 2703 for (; matchlen < len; matchlen++) 2704 if (idstr[matchlen] != ' ') 2705 return false; 2706 2707 return true; 2708 } 2709 2710 static bool quirk_matches(const struct nvme_id_ctrl *id, 2711 const struct nvme_core_quirk_entry *q) 2712 { 2713 return q->vid == le16_to_cpu(id->vid) && 2714 string_matches(id->mn, q->mn, sizeof(id->mn)) && 2715 string_matches(id->fr, q->fr, sizeof(id->fr)); 2716 } 2717 2718 static void nvme_init_subnqn(struct nvme_subsystem *subsys, struct nvme_ctrl *ctrl, 2719 struct nvme_id_ctrl *id) 2720 { 2721 size_t nqnlen; 2722 int off; 2723 2724 if(!(ctrl->quirks & NVME_QUIRK_IGNORE_DEV_SUBNQN)) { 2725 nqnlen = strnlen(id->subnqn, NVMF_NQN_SIZE); 2726 if (nqnlen > 0 && nqnlen < NVMF_NQN_SIZE) { 2727 strscpy(subsys->subnqn, id->subnqn, NVMF_NQN_SIZE); 2728 return; 2729 } 2730 2731 if (ctrl->vs >= NVME_VS(1, 2, 1)) 2732 dev_warn(ctrl->device, "missing or invalid SUBNQN field.\n"); 2733 } 2734 2735 /* 2736 * Generate a "fake" NQN similar to the one in Section 4.5 of the NVMe 2737 * Base Specification 2.0. It is slightly different from the format 2738 * specified there due to historic reasons, and we can't change it now. 2739 */ 2740 off = snprintf(subsys->subnqn, NVMF_NQN_SIZE, 2741 "nqn.2014.08.org.nvmexpress:%04x%04x", 2742 le16_to_cpu(id->vid), le16_to_cpu(id->ssvid)); 2743 memcpy(subsys->subnqn + off, id->sn, sizeof(id->sn)); 2744 off += sizeof(id->sn); 2745 memcpy(subsys->subnqn + off, id->mn, sizeof(id->mn)); 2746 off += sizeof(id->mn); 2747 memset(subsys->subnqn + off, 0, sizeof(subsys->subnqn) - off); 2748 } 2749 2750 static void nvme_release_subsystem(struct device *dev) 2751 { 2752 struct nvme_subsystem *subsys = 2753 container_of(dev, struct nvme_subsystem, dev); 2754 2755 if (subsys->instance >= 0) 2756 ida_free(&nvme_instance_ida, subsys->instance); 2757 kfree(subsys); 2758 } 2759 2760 static void nvme_destroy_subsystem(struct kref *ref) 2761 { 2762 struct nvme_subsystem *subsys = 2763 container_of(ref, struct nvme_subsystem, ref); 2764 2765 mutex_lock(&nvme_subsystems_lock); 2766 list_del(&subsys->entry); 2767 mutex_unlock(&nvme_subsystems_lock); 2768 2769 ida_destroy(&subsys->ns_ida); 2770 device_del(&subsys->dev); 2771 put_device(&subsys->dev); 2772 } 2773 2774 static void nvme_put_subsystem(struct nvme_subsystem *subsys) 2775 { 2776 kref_put(&subsys->ref, nvme_destroy_subsystem); 2777 } 2778 2779 static struct nvme_subsystem *__nvme_find_get_subsystem(const char *subsysnqn) 2780 { 2781 struct nvme_subsystem *subsys; 2782 2783 lockdep_assert_held(&nvme_subsystems_lock); 2784 2785 /* 2786 * Fail matches for discovery subsystems. This results 2787 * in each discovery controller bound to a unique subsystem. 2788 * This avoids issues with validating controller values 2789 * that can only be true when there is a single unique subsystem. 2790 * There may be multiple and completely independent entities 2791 * that provide discovery controllers. 2792 */ 2793 if (!strcmp(subsysnqn, NVME_DISC_SUBSYS_NAME)) 2794 return NULL; 2795 2796 list_for_each_entry(subsys, &nvme_subsystems, entry) { 2797 if (strcmp(subsys->subnqn, subsysnqn)) 2798 continue; 2799 if (!kref_get_unless_zero(&subsys->ref)) 2800 continue; 2801 return subsys; 2802 } 2803 2804 return NULL; 2805 } 2806 2807 #define SUBSYS_ATTR_RO(_name, _mode, _show) \ 2808 struct device_attribute subsys_attr_##_name = \ 2809 __ATTR(_name, _mode, _show, NULL) 2810 2811 static ssize_t nvme_subsys_show_nqn(struct device *dev, 2812 struct device_attribute *attr, 2813 char *buf) 2814 { 2815 struct nvme_subsystem *subsys = 2816 container_of(dev, struct nvme_subsystem, dev); 2817 2818 return sysfs_emit(buf, "%s\n", subsys->subnqn); 2819 } 2820 static SUBSYS_ATTR_RO(subsysnqn, S_IRUGO, nvme_subsys_show_nqn); 2821 2822 static ssize_t nvme_subsys_show_type(struct device *dev, 2823 struct device_attribute *attr, 2824 char *buf) 2825 { 2826 struct nvme_subsystem *subsys = 2827 container_of(dev, struct nvme_subsystem, dev); 2828 2829 switch (subsys->subtype) { 2830 case NVME_NQN_DISC: 2831 return sysfs_emit(buf, "discovery\n"); 2832 case NVME_NQN_NVME: 2833 return sysfs_emit(buf, "nvm\n"); 2834 default: 2835 return sysfs_emit(buf, "reserved\n"); 2836 } 2837 } 2838 static SUBSYS_ATTR_RO(subsystype, S_IRUGO, nvme_subsys_show_type); 2839 2840 #define nvme_subsys_show_str_function(field) \ 2841 static ssize_t subsys_##field##_show(struct device *dev, \ 2842 struct device_attribute *attr, char *buf) \ 2843 { \ 2844 struct nvme_subsystem *subsys = \ 2845 container_of(dev, struct nvme_subsystem, dev); \ 2846 return sysfs_emit(buf, "%.*s\n", \ 2847 (int)sizeof(subsys->field), subsys->field); \ 2848 } \ 2849 static SUBSYS_ATTR_RO(field, S_IRUGO, subsys_##field##_show); 2850 2851 nvme_subsys_show_str_function(model); 2852 nvme_subsys_show_str_function(serial); 2853 nvme_subsys_show_str_function(firmware_rev); 2854 2855 static struct attribute *nvme_subsys_attrs[] = { 2856 &subsys_attr_model.attr, 2857 &subsys_attr_serial.attr, 2858 &subsys_attr_firmware_rev.attr, 2859 &subsys_attr_subsysnqn.attr, 2860 &subsys_attr_subsystype.attr, 2861 #ifdef CONFIG_NVME_MULTIPATH 2862 &subsys_attr_iopolicy.attr, 2863 #endif 2864 NULL, 2865 }; 2866 2867 static const struct attribute_group nvme_subsys_attrs_group = { 2868 .attrs = nvme_subsys_attrs, 2869 }; 2870 2871 static const struct attribute_group *nvme_subsys_attrs_groups[] = { 2872 &nvme_subsys_attrs_group, 2873 NULL, 2874 }; 2875 2876 static inline bool nvme_discovery_ctrl(struct nvme_ctrl *ctrl) 2877 { 2878 return ctrl->opts && ctrl->opts->discovery_nqn; 2879 } 2880 2881 static bool nvme_validate_cntlid(struct nvme_subsystem *subsys, 2882 struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id) 2883 { 2884 struct nvme_ctrl *tmp; 2885 2886 lockdep_assert_held(&nvme_subsystems_lock); 2887 2888 list_for_each_entry(tmp, &subsys->ctrls, subsys_entry) { 2889 if (nvme_state_terminal(tmp)) 2890 continue; 2891 2892 if (tmp->cntlid == ctrl->cntlid) { 2893 dev_err(ctrl->device, 2894 "Duplicate cntlid %u with %s, subsys %s, rejecting\n", 2895 ctrl->cntlid, dev_name(tmp->device), 2896 subsys->subnqn); 2897 return false; 2898 } 2899 2900 if ((id->cmic & NVME_CTRL_CMIC_MULTI_CTRL) || 2901 nvme_discovery_ctrl(ctrl)) 2902 continue; 2903 2904 dev_err(ctrl->device, 2905 "Subsystem does not support multiple controllers\n"); 2906 return false; 2907 } 2908 2909 return true; 2910 } 2911 2912 static int nvme_init_subsystem(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id) 2913 { 2914 struct nvme_subsystem *subsys, *found; 2915 int ret; 2916 2917 subsys = kzalloc(sizeof(*subsys), GFP_KERNEL); 2918 if (!subsys) 2919 return -ENOMEM; 2920 2921 subsys->instance = -1; 2922 mutex_init(&subsys->lock); 2923 kref_init(&subsys->ref); 2924 INIT_LIST_HEAD(&subsys->ctrls); 2925 INIT_LIST_HEAD(&subsys->nsheads); 2926 nvme_init_subnqn(subsys, ctrl, id); 2927 memcpy(subsys->serial, id->sn, sizeof(subsys->serial)); 2928 memcpy(subsys->model, id->mn, sizeof(subsys->model)); 2929 subsys->vendor_id = le16_to_cpu(id->vid); 2930 subsys->cmic = id->cmic; 2931 2932 /* Versions prior to 1.4 don't necessarily report a valid type */ 2933 if (id->cntrltype == NVME_CTRL_DISC || 2934 !strcmp(subsys->subnqn, NVME_DISC_SUBSYS_NAME)) 2935 subsys->subtype = NVME_NQN_DISC; 2936 else 2937 subsys->subtype = NVME_NQN_NVME; 2938 2939 if (nvme_discovery_ctrl(ctrl) && subsys->subtype != NVME_NQN_DISC) { 2940 dev_err(ctrl->device, 2941 "Subsystem %s is not a discovery controller", 2942 subsys->subnqn); 2943 kfree(subsys); 2944 return -EINVAL; 2945 } 2946 subsys->awupf = le16_to_cpu(id->awupf); 2947 nvme_mpath_default_iopolicy(subsys); 2948 2949 subsys->dev.class = nvme_subsys_class; 2950 subsys->dev.release = nvme_release_subsystem; 2951 subsys->dev.groups = nvme_subsys_attrs_groups; 2952 dev_set_name(&subsys->dev, "nvme-subsys%d", ctrl->instance); 2953 device_initialize(&subsys->dev); 2954 2955 mutex_lock(&nvme_subsystems_lock); 2956 found = __nvme_find_get_subsystem(subsys->subnqn); 2957 if (found) { 2958 put_device(&subsys->dev); 2959 subsys = found; 2960 2961 if (!nvme_validate_cntlid(subsys, ctrl, id)) { 2962 ret = -EINVAL; 2963 goto out_put_subsystem; 2964 } 2965 } else { 2966 ret = device_add(&subsys->dev); 2967 if (ret) { 2968 dev_err(ctrl->device, 2969 "failed to register subsystem device.\n"); 2970 put_device(&subsys->dev); 2971 goto out_unlock; 2972 } 2973 ida_init(&subsys->ns_ida); 2974 list_add_tail(&subsys->entry, &nvme_subsystems); 2975 } 2976 2977 ret = sysfs_create_link(&subsys->dev.kobj, &ctrl->device->kobj, 2978 dev_name(ctrl->device)); 2979 if (ret) { 2980 dev_err(ctrl->device, 2981 "failed to create sysfs link from subsystem.\n"); 2982 goto out_put_subsystem; 2983 } 2984 2985 if (!found) 2986 subsys->instance = ctrl->instance; 2987 ctrl->subsys = subsys; 2988 list_add_tail(&ctrl->subsys_entry, &subsys->ctrls); 2989 mutex_unlock(&nvme_subsystems_lock); 2990 return 0; 2991 2992 out_put_subsystem: 2993 nvme_put_subsystem(subsys); 2994 out_unlock: 2995 mutex_unlock(&nvme_subsystems_lock); 2996 return ret; 2997 } 2998 2999 int nvme_get_log(struct nvme_ctrl *ctrl, u32 nsid, u8 log_page, u8 lsp, u8 csi, 3000 void *log, size_t size, u64 offset) 3001 { 3002 struct nvme_command c = { }; 3003 u32 dwlen = nvme_bytes_to_numd(size); 3004 3005 c.get_log_page.opcode = nvme_admin_get_log_page; 3006 c.get_log_page.nsid = cpu_to_le32(nsid); 3007 c.get_log_page.lid = log_page; 3008 c.get_log_page.lsp = lsp; 3009 c.get_log_page.numdl = cpu_to_le16(dwlen & ((1 << 16) - 1)); 3010 c.get_log_page.numdu = cpu_to_le16(dwlen >> 16); 3011 c.get_log_page.lpol = cpu_to_le32(lower_32_bits(offset)); 3012 c.get_log_page.lpou = cpu_to_le32(upper_32_bits(offset)); 3013 c.get_log_page.csi = csi; 3014 3015 return nvme_submit_sync_cmd(ctrl->admin_q, &c, log, size); 3016 } 3017 3018 static int nvme_get_effects_log(struct nvme_ctrl *ctrl, u8 csi, 3019 struct nvme_effects_log **log) 3020 { 3021 struct nvme_effects_log *cel = xa_load(&ctrl->cels, csi); 3022 int ret; 3023 3024 if (cel) 3025 goto out; 3026 3027 cel = kzalloc(sizeof(*cel), GFP_KERNEL); 3028 if (!cel) 3029 return -ENOMEM; 3030 3031 ret = nvme_get_log(ctrl, 0x00, NVME_LOG_CMD_EFFECTS, 0, csi, 3032 cel, sizeof(*cel), 0); 3033 if (ret) { 3034 kfree(cel); 3035 return ret; 3036 } 3037 3038 xa_store(&ctrl->cels, csi, cel, GFP_KERNEL); 3039 out: 3040 *log = cel; 3041 return 0; 3042 } 3043 3044 static inline u32 nvme_mps_to_sectors(struct nvme_ctrl *ctrl, u32 units) 3045 { 3046 u32 page_shift = NVME_CAP_MPSMIN(ctrl->cap) + 12, val; 3047 3048 if (check_shl_overflow(1U, units + page_shift - 9, &val)) 3049 return UINT_MAX; 3050 return val; 3051 } 3052 3053 static int nvme_init_non_mdts_limits(struct nvme_ctrl *ctrl) 3054 { 3055 struct nvme_command c = { }; 3056 struct nvme_id_ctrl_nvm *id; 3057 int ret; 3058 3059 if (ctrl->oncs & NVME_CTRL_ONCS_DSM) { 3060 ctrl->max_discard_sectors = UINT_MAX; 3061 ctrl->max_discard_segments = NVME_DSM_MAX_RANGES; 3062 } else { 3063 ctrl->max_discard_sectors = 0; 3064 ctrl->max_discard_segments = 0; 3065 } 3066 3067 /* 3068 * Even though NVMe spec explicitly states that MDTS is not applicable 3069 * to the write-zeroes, we are cautious and limit the size to the 3070 * controllers max_hw_sectors value, which is based on the MDTS field 3071 * and possibly other limiting factors. 3072 */ 3073 if ((ctrl->oncs & NVME_CTRL_ONCS_WRITE_ZEROES) && 3074 !(ctrl->quirks & NVME_QUIRK_DISABLE_WRITE_ZEROES)) 3075 ctrl->max_zeroes_sectors = ctrl->max_hw_sectors; 3076 else 3077 ctrl->max_zeroes_sectors = 0; 3078 3079 if (nvme_ctrl_limited_cns(ctrl)) 3080 return 0; 3081 3082 id = kzalloc(sizeof(*id), GFP_KERNEL); 3083 if (!id) 3084 return -ENOMEM; 3085 3086 c.identify.opcode = nvme_admin_identify; 3087 c.identify.cns = NVME_ID_CNS_CS_CTRL; 3088 c.identify.csi = NVME_CSI_NVM; 3089 3090 ret = nvme_submit_sync_cmd(ctrl->admin_q, &c, id, sizeof(*id)); 3091 if (ret) 3092 goto free_data; 3093 3094 if (id->dmrl) 3095 ctrl->max_discard_segments = id->dmrl; 3096 ctrl->dmrsl = le32_to_cpu(id->dmrsl); 3097 if (id->wzsl) 3098 ctrl->max_zeroes_sectors = nvme_mps_to_sectors(ctrl, id->wzsl); 3099 3100 free_data: 3101 kfree(id); 3102 return ret; 3103 } 3104 3105 static int nvme_init_identify(struct nvme_ctrl *ctrl) 3106 { 3107 struct nvme_id_ctrl *id; 3108 u32 max_hw_sectors; 3109 bool prev_apst_enabled; 3110 int ret; 3111 3112 ret = nvme_identify_ctrl(ctrl, &id); 3113 if (ret) { 3114 dev_err(ctrl->device, "Identify Controller failed (%d)\n", ret); 3115 return -EIO; 3116 } 3117 3118 if (id->lpa & NVME_CTRL_LPA_CMD_EFFECTS_LOG) { 3119 ret = nvme_get_effects_log(ctrl, NVME_CSI_NVM, &ctrl->effects); 3120 if (ret < 0) 3121 goto out_free; 3122 } 3123 3124 if (!(ctrl->ops->flags & NVME_F_FABRICS)) 3125 ctrl->cntlid = le16_to_cpu(id->cntlid); 3126 3127 if (!ctrl->identified) { 3128 unsigned int i; 3129 3130 /* 3131 * Check for quirks. Quirk can depend on firmware version, 3132 * so, in principle, the set of quirks present can change 3133 * across a reset. As a possible future enhancement, we 3134 * could re-scan for quirks every time we reinitialize 3135 * the device, but we'd have to make sure that the driver 3136 * behaves intelligently if the quirks change. 3137 */ 3138 for (i = 0; i < ARRAY_SIZE(core_quirks); i++) { 3139 if (quirk_matches(id, &core_quirks[i])) 3140 ctrl->quirks |= core_quirks[i].quirks; 3141 } 3142 3143 ret = nvme_init_subsystem(ctrl, id); 3144 if (ret) 3145 goto out_free; 3146 } 3147 memcpy(ctrl->subsys->firmware_rev, id->fr, 3148 sizeof(ctrl->subsys->firmware_rev)); 3149 3150 if (force_apst && (ctrl->quirks & NVME_QUIRK_NO_DEEPEST_PS)) { 3151 dev_warn(ctrl->device, "forcibly allowing all power states due to nvme_core.force_apst -- use at your own risk\n"); 3152 ctrl->quirks &= ~NVME_QUIRK_NO_DEEPEST_PS; 3153 } 3154 3155 ctrl->crdt[0] = le16_to_cpu(id->crdt1); 3156 ctrl->crdt[1] = le16_to_cpu(id->crdt2); 3157 ctrl->crdt[2] = le16_to_cpu(id->crdt3); 3158 3159 ctrl->oacs = le16_to_cpu(id->oacs); 3160 ctrl->oncs = le16_to_cpu(id->oncs); 3161 ctrl->mtfa = le16_to_cpu(id->mtfa); 3162 ctrl->oaes = le32_to_cpu(id->oaes); 3163 ctrl->wctemp = le16_to_cpu(id->wctemp); 3164 ctrl->cctemp = le16_to_cpu(id->cctemp); 3165 3166 atomic_set(&ctrl->abort_limit, id->acl + 1); 3167 ctrl->vwc = id->vwc; 3168 if (id->mdts) 3169 max_hw_sectors = nvme_mps_to_sectors(ctrl, id->mdts); 3170 else 3171 max_hw_sectors = UINT_MAX; 3172 ctrl->max_hw_sectors = 3173 min_not_zero(ctrl->max_hw_sectors, max_hw_sectors); 3174 3175 nvme_set_queue_limits(ctrl, ctrl->admin_q); 3176 ctrl->sgls = le32_to_cpu(id->sgls); 3177 ctrl->kas = le16_to_cpu(id->kas); 3178 ctrl->max_namespaces = le32_to_cpu(id->mnan); 3179 ctrl->ctratt = le32_to_cpu(id->ctratt); 3180 3181 ctrl->cntrltype = id->cntrltype; 3182 ctrl->dctype = id->dctype; 3183 3184 if (id->rtd3e) { 3185 /* us -> s */ 3186 u32 transition_time = le32_to_cpu(id->rtd3e) / USEC_PER_SEC; 3187 3188 ctrl->shutdown_timeout = clamp_t(unsigned int, transition_time, 3189 shutdown_timeout, 60); 3190 3191 if (ctrl->shutdown_timeout != shutdown_timeout) 3192 dev_info(ctrl->device, 3193 "Shutdown timeout set to %u seconds\n", 3194 ctrl->shutdown_timeout); 3195 } else 3196 ctrl->shutdown_timeout = shutdown_timeout; 3197 3198 ctrl->npss = id->npss; 3199 ctrl->apsta = id->apsta; 3200 prev_apst_enabled = ctrl->apst_enabled; 3201 if (ctrl->quirks & NVME_QUIRK_NO_APST) { 3202 if (force_apst && id->apsta) { 3203 dev_warn(ctrl->device, "forcibly allowing APST due to nvme_core.force_apst -- use at your own risk\n"); 3204 ctrl->apst_enabled = true; 3205 } else { 3206 ctrl->apst_enabled = false; 3207 } 3208 } else { 3209 ctrl->apst_enabled = id->apsta; 3210 } 3211 memcpy(ctrl->psd, id->psd, sizeof(ctrl->psd)); 3212 3213 if (ctrl->ops->flags & NVME_F_FABRICS) { 3214 ctrl->icdoff = le16_to_cpu(id->icdoff); 3215 ctrl->ioccsz = le32_to_cpu(id->ioccsz); 3216 ctrl->iorcsz = le32_to_cpu(id->iorcsz); 3217 ctrl->maxcmd = le16_to_cpu(id->maxcmd); 3218 3219 /* 3220 * In fabrics we need to verify the cntlid matches the 3221 * admin connect 3222 */ 3223 if (ctrl->cntlid != le16_to_cpu(id->cntlid)) { 3224 dev_err(ctrl->device, 3225 "Mismatching cntlid: Connect %u vs Identify " 3226 "%u, rejecting\n", 3227 ctrl->cntlid, le16_to_cpu(id->cntlid)); 3228 ret = -EINVAL; 3229 goto out_free; 3230 } 3231 3232 if (!nvme_discovery_ctrl(ctrl) && !ctrl->kas) { 3233 dev_err(ctrl->device, 3234 "keep-alive support is mandatory for fabrics\n"); 3235 ret = -EINVAL; 3236 goto out_free; 3237 } 3238 } else { 3239 ctrl->hmpre = le32_to_cpu(id->hmpre); 3240 ctrl->hmmin = le32_to_cpu(id->hmmin); 3241 ctrl->hmminds = le32_to_cpu(id->hmminds); 3242 ctrl->hmmaxd = le16_to_cpu(id->hmmaxd); 3243 } 3244 3245 ret = nvme_mpath_init_identify(ctrl, id); 3246 if (ret < 0) 3247 goto out_free; 3248 3249 if (ctrl->apst_enabled && !prev_apst_enabled) 3250 dev_pm_qos_expose_latency_tolerance(ctrl->device); 3251 else if (!ctrl->apst_enabled && prev_apst_enabled) 3252 dev_pm_qos_hide_latency_tolerance(ctrl->device); 3253 3254 out_free: 3255 kfree(id); 3256 return ret; 3257 } 3258 3259 /* 3260 * Initialize the cached copies of the Identify data and various controller 3261 * register in our nvme_ctrl structure. This should be called as soon as 3262 * the admin queue is fully up and running. 3263 */ 3264 int nvme_init_ctrl_finish(struct nvme_ctrl *ctrl, bool was_suspended) 3265 { 3266 int ret; 3267 3268 ret = ctrl->ops->reg_read32(ctrl, NVME_REG_VS, &ctrl->vs); 3269 if (ret) { 3270 dev_err(ctrl->device, "Reading VS failed (%d)\n", ret); 3271 return ret; 3272 } 3273 3274 ctrl->sqsize = min_t(u16, NVME_CAP_MQES(ctrl->cap), ctrl->sqsize); 3275 3276 if (ctrl->vs >= NVME_VS(1, 1, 0)) 3277 ctrl->subsystem = NVME_CAP_NSSRC(ctrl->cap); 3278 3279 ret = nvme_init_identify(ctrl); 3280 if (ret) 3281 return ret; 3282 3283 ret = nvme_configure_apst(ctrl); 3284 if (ret < 0) 3285 return ret; 3286 3287 ret = nvme_configure_timestamp(ctrl); 3288 if (ret < 0) 3289 return ret; 3290 3291 ret = nvme_configure_host_options(ctrl); 3292 if (ret < 0) 3293 return ret; 3294 3295 nvme_configure_opal(ctrl, was_suspended); 3296 3297 if (!ctrl->identified && !nvme_discovery_ctrl(ctrl)) { 3298 /* 3299 * Do not return errors unless we are in a controller reset, 3300 * the controller works perfectly fine without hwmon. 3301 */ 3302 ret = nvme_hwmon_init(ctrl); 3303 if (ret == -EINTR) 3304 return ret; 3305 } 3306 3307 ctrl->identified = true; 3308 3309 return 0; 3310 } 3311 EXPORT_SYMBOL_GPL(nvme_init_ctrl_finish); 3312 3313 static int nvme_dev_open(struct inode *inode, struct file *file) 3314 { 3315 struct nvme_ctrl *ctrl = 3316 container_of(inode->i_cdev, struct nvme_ctrl, cdev); 3317 3318 switch (ctrl->state) { 3319 case NVME_CTRL_LIVE: 3320 break; 3321 default: 3322 return -EWOULDBLOCK; 3323 } 3324 3325 nvme_get_ctrl(ctrl); 3326 if (!try_module_get(ctrl->ops->module)) { 3327 nvme_put_ctrl(ctrl); 3328 return -EINVAL; 3329 } 3330 3331 file->private_data = ctrl; 3332 return 0; 3333 } 3334 3335 static int nvme_dev_release(struct inode *inode, struct file *file) 3336 { 3337 struct nvme_ctrl *ctrl = 3338 container_of(inode->i_cdev, struct nvme_ctrl, cdev); 3339 3340 module_put(ctrl->ops->module); 3341 nvme_put_ctrl(ctrl); 3342 return 0; 3343 } 3344 3345 static const struct file_operations nvme_dev_fops = { 3346 .owner = THIS_MODULE, 3347 .open = nvme_dev_open, 3348 .release = nvme_dev_release, 3349 .unlocked_ioctl = nvme_dev_ioctl, 3350 .compat_ioctl = compat_ptr_ioctl, 3351 .uring_cmd = nvme_dev_uring_cmd, 3352 }; 3353 3354 static ssize_t nvme_sysfs_reset(struct device *dev, 3355 struct device_attribute *attr, const char *buf, 3356 size_t count) 3357 { 3358 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 3359 int ret; 3360 3361 ret = nvme_reset_ctrl_sync(ctrl); 3362 if (ret < 0) 3363 return ret; 3364 return count; 3365 } 3366 static DEVICE_ATTR(reset_controller, S_IWUSR, NULL, nvme_sysfs_reset); 3367 3368 static ssize_t nvme_sysfs_rescan(struct device *dev, 3369 struct device_attribute *attr, const char *buf, 3370 size_t count) 3371 { 3372 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 3373 3374 nvme_queue_scan(ctrl); 3375 return count; 3376 } 3377 static DEVICE_ATTR(rescan_controller, S_IWUSR, NULL, nvme_sysfs_rescan); 3378 3379 static inline struct nvme_ns_head *dev_to_ns_head(struct device *dev) 3380 { 3381 struct gendisk *disk = dev_to_disk(dev); 3382 3383 if (disk->fops == &nvme_bdev_ops) 3384 return nvme_get_ns_from_dev(dev)->head; 3385 else 3386 return disk->private_data; 3387 } 3388 3389 static ssize_t wwid_show(struct device *dev, struct device_attribute *attr, 3390 char *buf) 3391 { 3392 struct nvme_ns_head *head = dev_to_ns_head(dev); 3393 struct nvme_ns_ids *ids = &head->ids; 3394 struct nvme_subsystem *subsys = head->subsys; 3395 int serial_len = sizeof(subsys->serial); 3396 int model_len = sizeof(subsys->model); 3397 3398 if (!uuid_is_null(&ids->uuid)) 3399 return sysfs_emit(buf, "uuid.%pU\n", &ids->uuid); 3400 3401 if (memchr_inv(ids->nguid, 0, sizeof(ids->nguid))) 3402 return sysfs_emit(buf, "eui.%16phN\n", ids->nguid); 3403 3404 if (memchr_inv(ids->eui64, 0, sizeof(ids->eui64))) 3405 return sysfs_emit(buf, "eui.%8phN\n", ids->eui64); 3406 3407 while (serial_len > 0 && (subsys->serial[serial_len - 1] == ' ' || 3408 subsys->serial[serial_len - 1] == '\0')) 3409 serial_len--; 3410 while (model_len > 0 && (subsys->model[model_len - 1] == ' ' || 3411 subsys->model[model_len - 1] == '\0')) 3412 model_len--; 3413 3414 return sysfs_emit(buf, "nvme.%04x-%*phN-%*phN-%08x\n", subsys->vendor_id, 3415 serial_len, subsys->serial, model_len, subsys->model, 3416 head->ns_id); 3417 } 3418 static DEVICE_ATTR_RO(wwid); 3419 3420 static ssize_t nguid_show(struct device *dev, struct device_attribute *attr, 3421 char *buf) 3422 { 3423 return sysfs_emit(buf, "%pU\n", dev_to_ns_head(dev)->ids.nguid); 3424 } 3425 static DEVICE_ATTR_RO(nguid); 3426 3427 static ssize_t uuid_show(struct device *dev, struct device_attribute *attr, 3428 char *buf) 3429 { 3430 struct nvme_ns_ids *ids = &dev_to_ns_head(dev)->ids; 3431 3432 /* For backward compatibility expose the NGUID to userspace if 3433 * we have no UUID set 3434 */ 3435 if (uuid_is_null(&ids->uuid)) { 3436 dev_warn_ratelimited(dev, 3437 "No UUID available providing old NGUID\n"); 3438 return sysfs_emit(buf, "%pU\n", ids->nguid); 3439 } 3440 return sysfs_emit(buf, "%pU\n", &ids->uuid); 3441 } 3442 static DEVICE_ATTR_RO(uuid); 3443 3444 static ssize_t eui_show(struct device *dev, struct device_attribute *attr, 3445 char *buf) 3446 { 3447 return sysfs_emit(buf, "%8ph\n", dev_to_ns_head(dev)->ids.eui64); 3448 } 3449 static DEVICE_ATTR_RO(eui); 3450 3451 static ssize_t nsid_show(struct device *dev, struct device_attribute *attr, 3452 char *buf) 3453 { 3454 return sysfs_emit(buf, "%d\n", dev_to_ns_head(dev)->ns_id); 3455 } 3456 static DEVICE_ATTR_RO(nsid); 3457 3458 static struct attribute *nvme_ns_id_attrs[] = { 3459 &dev_attr_wwid.attr, 3460 &dev_attr_uuid.attr, 3461 &dev_attr_nguid.attr, 3462 &dev_attr_eui.attr, 3463 &dev_attr_nsid.attr, 3464 #ifdef CONFIG_NVME_MULTIPATH 3465 &dev_attr_ana_grpid.attr, 3466 &dev_attr_ana_state.attr, 3467 #endif 3468 NULL, 3469 }; 3470 3471 static umode_t nvme_ns_id_attrs_are_visible(struct kobject *kobj, 3472 struct attribute *a, int n) 3473 { 3474 struct device *dev = container_of(kobj, struct device, kobj); 3475 struct nvme_ns_ids *ids = &dev_to_ns_head(dev)->ids; 3476 3477 if (a == &dev_attr_uuid.attr) { 3478 if (uuid_is_null(&ids->uuid) && 3479 !memchr_inv(ids->nguid, 0, sizeof(ids->nguid))) 3480 return 0; 3481 } 3482 if (a == &dev_attr_nguid.attr) { 3483 if (!memchr_inv(ids->nguid, 0, sizeof(ids->nguid))) 3484 return 0; 3485 } 3486 if (a == &dev_attr_eui.attr) { 3487 if (!memchr_inv(ids->eui64, 0, sizeof(ids->eui64))) 3488 return 0; 3489 } 3490 #ifdef CONFIG_NVME_MULTIPATH 3491 if (a == &dev_attr_ana_grpid.attr || a == &dev_attr_ana_state.attr) { 3492 if (dev_to_disk(dev)->fops != &nvme_bdev_ops) /* per-path attr */ 3493 return 0; 3494 if (!nvme_ctrl_use_ana(nvme_get_ns_from_dev(dev)->ctrl)) 3495 return 0; 3496 } 3497 #endif 3498 return a->mode; 3499 } 3500 3501 static const struct attribute_group nvme_ns_id_attr_group = { 3502 .attrs = nvme_ns_id_attrs, 3503 .is_visible = nvme_ns_id_attrs_are_visible, 3504 }; 3505 3506 const struct attribute_group *nvme_ns_id_attr_groups[] = { 3507 &nvme_ns_id_attr_group, 3508 NULL, 3509 }; 3510 3511 #define nvme_show_str_function(field) \ 3512 static ssize_t field##_show(struct device *dev, \ 3513 struct device_attribute *attr, char *buf) \ 3514 { \ 3515 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); \ 3516 return sysfs_emit(buf, "%.*s\n", \ 3517 (int)sizeof(ctrl->subsys->field), ctrl->subsys->field); \ 3518 } \ 3519 static DEVICE_ATTR(field, S_IRUGO, field##_show, NULL); 3520 3521 nvme_show_str_function(model); 3522 nvme_show_str_function(serial); 3523 nvme_show_str_function(firmware_rev); 3524 3525 #define nvme_show_int_function(field) \ 3526 static ssize_t field##_show(struct device *dev, \ 3527 struct device_attribute *attr, char *buf) \ 3528 { \ 3529 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); \ 3530 return sysfs_emit(buf, "%d\n", ctrl->field); \ 3531 } \ 3532 static DEVICE_ATTR(field, S_IRUGO, field##_show, NULL); 3533 3534 nvme_show_int_function(cntlid); 3535 nvme_show_int_function(numa_node); 3536 nvme_show_int_function(queue_count); 3537 nvme_show_int_function(sqsize); 3538 nvme_show_int_function(kato); 3539 3540 static ssize_t nvme_sysfs_delete(struct device *dev, 3541 struct device_attribute *attr, const char *buf, 3542 size_t count) 3543 { 3544 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 3545 3546 if (device_remove_file_self(dev, attr)) 3547 nvme_delete_ctrl_sync(ctrl); 3548 return count; 3549 } 3550 static DEVICE_ATTR(delete_controller, S_IWUSR, NULL, nvme_sysfs_delete); 3551 3552 static ssize_t nvme_sysfs_show_transport(struct device *dev, 3553 struct device_attribute *attr, 3554 char *buf) 3555 { 3556 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 3557 3558 return sysfs_emit(buf, "%s\n", ctrl->ops->name); 3559 } 3560 static DEVICE_ATTR(transport, S_IRUGO, nvme_sysfs_show_transport, NULL); 3561 3562 static ssize_t nvme_sysfs_show_state(struct device *dev, 3563 struct device_attribute *attr, 3564 char *buf) 3565 { 3566 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 3567 static const char *const state_name[] = { 3568 [NVME_CTRL_NEW] = "new", 3569 [NVME_CTRL_LIVE] = "live", 3570 [NVME_CTRL_RESETTING] = "resetting", 3571 [NVME_CTRL_CONNECTING] = "connecting", 3572 [NVME_CTRL_DELETING] = "deleting", 3573 [NVME_CTRL_DELETING_NOIO]= "deleting (no IO)", 3574 [NVME_CTRL_DEAD] = "dead", 3575 }; 3576 3577 if ((unsigned)ctrl->state < ARRAY_SIZE(state_name) && 3578 state_name[ctrl->state]) 3579 return sysfs_emit(buf, "%s\n", state_name[ctrl->state]); 3580 3581 return sysfs_emit(buf, "unknown state\n"); 3582 } 3583 3584 static DEVICE_ATTR(state, S_IRUGO, nvme_sysfs_show_state, NULL); 3585 3586 static ssize_t nvme_sysfs_show_subsysnqn(struct device *dev, 3587 struct device_attribute *attr, 3588 char *buf) 3589 { 3590 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 3591 3592 return sysfs_emit(buf, "%s\n", ctrl->subsys->subnqn); 3593 } 3594 static DEVICE_ATTR(subsysnqn, S_IRUGO, nvme_sysfs_show_subsysnqn, NULL); 3595 3596 static ssize_t nvme_sysfs_show_hostnqn(struct device *dev, 3597 struct device_attribute *attr, 3598 char *buf) 3599 { 3600 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 3601 3602 return sysfs_emit(buf, "%s\n", ctrl->opts->host->nqn); 3603 } 3604 static DEVICE_ATTR(hostnqn, S_IRUGO, nvme_sysfs_show_hostnqn, NULL); 3605 3606 static ssize_t nvme_sysfs_show_hostid(struct device *dev, 3607 struct device_attribute *attr, 3608 char *buf) 3609 { 3610 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 3611 3612 return sysfs_emit(buf, "%pU\n", &ctrl->opts->host->id); 3613 } 3614 static DEVICE_ATTR(hostid, S_IRUGO, nvme_sysfs_show_hostid, NULL); 3615 3616 static ssize_t nvme_sysfs_show_address(struct device *dev, 3617 struct device_attribute *attr, 3618 char *buf) 3619 { 3620 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 3621 3622 return ctrl->ops->get_address(ctrl, buf, PAGE_SIZE); 3623 } 3624 static DEVICE_ATTR(address, S_IRUGO, nvme_sysfs_show_address, NULL); 3625 3626 static ssize_t nvme_ctrl_loss_tmo_show(struct device *dev, 3627 struct device_attribute *attr, char *buf) 3628 { 3629 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 3630 struct nvmf_ctrl_options *opts = ctrl->opts; 3631 3632 if (ctrl->opts->max_reconnects == -1) 3633 return sysfs_emit(buf, "off\n"); 3634 return sysfs_emit(buf, "%d\n", 3635 opts->max_reconnects * opts->reconnect_delay); 3636 } 3637 3638 static ssize_t nvme_ctrl_loss_tmo_store(struct device *dev, 3639 struct device_attribute *attr, const char *buf, size_t count) 3640 { 3641 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 3642 struct nvmf_ctrl_options *opts = ctrl->opts; 3643 int ctrl_loss_tmo, err; 3644 3645 err = kstrtoint(buf, 10, &ctrl_loss_tmo); 3646 if (err) 3647 return -EINVAL; 3648 3649 if (ctrl_loss_tmo < 0) 3650 opts->max_reconnects = -1; 3651 else 3652 opts->max_reconnects = DIV_ROUND_UP(ctrl_loss_tmo, 3653 opts->reconnect_delay); 3654 return count; 3655 } 3656 static DEVICE_ATTR(ctrl_loss_tmo, S_IRUGO | S_IWUSR, 3657 nvme_ctrl_loss_tmo_show, nvme_ctrl_loss_tmo_store); 3658 3659 static ssize_t nvme_ctrl_reconnect_delay_show(struct device *dev, 3660 struct device_attribute *attr, char *buf) 3661 { 3662 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 3663 3664 if (ctrl->opts->reconnect_delay == -1) 3665 return sysfs_emit(buf, "off\n"); 3666 return sysfs_emit(buf, "%d\n", ctrl->opts->reconnect_delay); 3667 } 3668 3669 static ssize_t nvme_ctrl_reconnect_delay_store(struct device *dev, 3670 struct device_attribute *attr, const char *buf, size_t count) 3671 { 3672 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 3673 unsigned int v; 3674 int err; 3675 3676 err = kstrtou32(buf, 10, &v); 3677 if (err) 3678 return err; 3679 3680 ctrl->opts->reconnect_delay = v; 3681 return count; 3682 } 3683 static DEVICE_ATTR(reconnect_delay, S_IRUGO | S_IWUSR, 3684 nvme_ctrl_reconnect_delay_show, nvme_ctrl_reconnect_delay_store); 3685 3686 static ssize_t nvme_ctrl_fast_io_fail_tmo_show(struct device *dev, 3687 struct device_attribute *attr, char *buf) 3688 { 3689 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 3690 3691 if (ctrl->opts->fast_io_fail_tmo == -1) 3692 return sysfs_emit(buf, "off\n"); 3693 return sysfs_emit(buf, "%d\n", ctrl->opts->fast_io_fail_tmo); 3694 } 3695 3696 static ssize_t nvme_ctrl_fast_io_fail_tmo_store(struct device *dev, 3697 struct device_attribute *attr, const char *buf, size_t count) 3698 { 3699 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 3700 struct nvmf_ctrl_options *opts = ctrl->opts; 3701 int fast_io_fail_tmo, err; 3702 3703 err = kstrtoint(buf, 10, &fast_io_fail_tmo); 3704 if (err) 3705 return -EINVAL; 3706 3707 if (fast_io_fail_tmo < 0) 3708 opts->fast_io_fail_tmo = -1; 3709 else 3710 opts->fast_io_fail_tmo = fast_io_fail_tmo; 3711 return count; 3712 } 3713 static DEVICE_ATTR(fast_io_fail_tmo, S_IRUGO | S_IWUSR, 3714 nvme_ctrl_fast_io_fail_tmo_show, nvme_ctrl_fast_io_fail_tmo_store); 3715 3716 static ssize_t cntrltype_show(struct device *dev, 3717 struct device_attribute *attr, char *buf) 3718 { 3719 static const char * const type[] = { 3720 [NVME_CTRL_IO] = "io\n", 3721 [NVME_CTRL_DISC] = "discovery\n", 3722 [NVME_CTRL_ADMIN] = "admin\n", 3723 }; 3724 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 3725 3726 if (ctrl->cntrltype > NVME_CTRL_ADMIN || !type[ctrl->cntrltype]) 3727 return sysfs_emit(buf, "reserved\n"); 3728 3729 return sysfs_emit(buf, type[ctrl->cntrltype]); 3730 } 3731 static DEVICE_ATTR_RO(cntrltype); 3732 3733 static ssize_t dctype_show(struct device *dev, 3734 struct device_attribute *attr, char *buf) 3735 { 3736 static const char * const type[] = { 3737 [NVME_DCTYPE_NOT_REPORTED] = "none\n", 3738 [NVME_DCTYPE_DDC] = "ddc\n", 3739 [NVME_DCTYPE_CDC] = "cdc\n", 3740 }; 3741 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 3742 3743 if (ctrl->dctype > NVME_DCTYPE_CDC || !type[ctrl->dctype]) 3744 return sysfs_emit(buf, "reserved\n"); 3745 3746 return sysfs_emit(buf, type[ctrl->dctype]); 3747 } 3748 static DEVICE_ATTR_RO(dctype); 3749 3750 #ifdef CONFIG_NVME_AUTH 3751 static ssize_t nvme_ctrl_dhchap_secret_show(struct device *dev, 3752 struct device_attribute *attr, char *buf) 3753 { 3754 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 3755 struct nvmf_ctrl_options *opts = ctrl->opts; 3756 3757 if (!opts->dhchap_secret) 3758 return sysfs_emit(buf, "none\n"); 3759 return sysfs_emit(buf, "%s\n", opts->dhchap_secret); 3760 } 3761 3762 static ssize_t nvme_ctrl_dhchap_secret_store(struct device *dev, 3763 struct device_attribute *attr, const char *buf, size_t count) 3764 { 3765 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 3766 struct nvmf_ctrl_options *opts = ctrl->opts; 3767 char *dhchap_secret; 3768 3769 if (!ctrl->opts->dhchap_secret) 3770 return -EINVAL; 3771 if (count < 7) 3772 return -EINVAL; 3773 if (memcmp(buf, "DHHC-1:", 7)) 3774 return -EINVAL; 3775 3776 dhchap_secret = kzalloc(count + 1, GFP_KERNEL); 3777 if (!dhchap_secret) 3778 return -ENOMEM; 3779 memcpy(dhchap_secret, buf, count); 3780 nvme_auth_stop(ctrl); 3781 if (strcmp(dhchap_secret, opts->dhchap_secret)) { 3782 struct nvme_dhchap_key *key, *host_key; 3783 int ret; 3784 3785 ret = nvme_auth_generate_key(dhchap_secret, &key); 3786 if (ret) 3787 return ret; 3788 kfree(opts->dhchap_secret); 3789 opts->dhchap_secret = dhchap_secret; 3790 host_key = ctrl->host_key; 3791 mutex_lock(&ctrl->dhchap_auth_mutex); 3792 ctrl->host_key = key; 3793 mutex_unlock(&ctrl->dhchap_auth_mutex); 3794 nvme_auth_free_key(host_key); 3795 } 3796 /* Start re-authentication */ 3797 dev_info(ctrl->device, "re-authenticating controller\n"); 3798 queue_work(nvme_wq, &ctrl->dhchap_auth_work); 3799 3800 return count; 3801 } 3802 static DEVICE_ATTR(dhchap_secret, S_IRUGO | S_IWUSR, 3803 nvme_ctrl_dhchap_secret_show, nvme_ctrl_dhchap_secret_store); 3804 3805 static ssize_t nvme_ctrl_dhchap_ctrl_secret_show(struct device *dev, 3806 struct device_attribute *attr, char *buf) 3807 { 3808 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 3809 struct nvmf_ctrl_options *opts = ctrl->opts; 3810 3811 if (!opts->dhchap_ctrl_secret) 3812 return sysfs_emit(buf, "none\n"); 3813 return sysfs_emit(buf, "%s\n", opts->dhchap_ctrl_secret); 3814 } 3815 3816 static ssize_t nvme_ctrl_dhchap_ctrl_secret_store(struct device *dev, 3817 struct device_attribute *attr, const char *buf, size_t count) 3818 { 3819 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 3820 struct nvmf_ctrl_options *opts = ctrl->opts; 3821 char *dhchap_secret; 3822 3823 if (!ctrl->opts->dhchap_ctrl_secret) 3824 return -EINVAL; 3825 if (count < 7) 3826 return -EINVAL; 3827 if (memcmp(buf, "DHHC-1:", 7)) 3828 return -EINVAL; 3829 3830 dhchap_secret = kzalloc(count + 1, GFP_KERNEL); 3831 if (!dhchap_secret) 3832 return -ENOMEM; 3833 memcpy(dhchap_secret, buf, count); 3834 nvme_auth_stop(ctrl); 3835 if (strcmp(dhchap_secret, opts->dhchap_ctrl_secret)) { 3836 struct nvme_dhchap_key *key, *ctrl_key; 3837 int ret; 3838 3839 ret = nvme_auth_generate_key(dhchap_secret, &key); 3840 if (ret) 3841 return ret; 3842 kfree(opts->dhchap_ctrl_secret); 3843 opts->dhchap_ctrl_secret = dhchap_secret; 3844 ctrl_key = ctrl->ctrl_key; 3845 mutex_lock(&ctrl->dhchap_auth_mutex); 3846 ctrl->ctrl_key = key; 3847 mutex_unlock(&ctrl->dhchap_auth_mutex); 3848 nvme_auth_free_key(ctrl_key); 3849 } 3850 /* Start re-authentication */ 3851 dev_info(ctrl->device, "re-authenticating controller\n"); 3852 queue_work(nvme_wq, &ctrl->dhchap_auth_work); 3853 3854 return count; 3855 } 3856 static DEVICE_ATTR(dhchap_ctrl_secret, S_IRUGO | S_IWUSR, 3857 nvme_ctrl_dhchap_ctrl_secret_show, nvme_ctrl_dhchap_ctrl_secret_store); 3858 #endif 3859 3860 static struct attribute *nvme_dev_attrs[] = { 3861 &dev_attr_reset_controller.attr, 3862 &dev_attr_rescan_controller.attr, 3863 &dev_attr_model.attr, 3864 &dev_attr_serial.attr, 3865 &dev_attr_firmware_rev.attr, 3866 &dev_attr_cntlid.attr, 3867 &dev_attr_delete_controller.attr, 3868 &dev_attr_transport.attr, 3869 &dev_attr_subsysnqn.attr, 3870 &dev_attr_address.attr, 3871 &dev_attr_state.attr, 3872 &dev_attr_numa_node.attr, 3873 &dev_attr_queue_count.attr, 3874 &dev_attr_sqsize.attr, 3875 &dev_attr_hostnqn.attr, 3876 &dev_attr_hostid.attr, 3877 &dev_attr_ctrl_loss_tmo.attr, 3878 &dev_attr_reconnect_delay.attr, 3879 &dev_attr_fast_io_fail_tmo.attr, 3880 &dev_attr_kato.attr, 3881 &dev_attr_cntrltype.attr, 3882 &dev_attr_dctype.attr, 3883 #ifdef CONFIG_NVME_AUTH 3884 &dev_attr_dhchap_secret.attr, 3885 &dev_attr_dhchap_ctrl_secret.attr, 3886 #endif 3887 NULL 3888 }; 3889 3890 static umode_t nvme_dev_attrs_are_visible(struct kobject *kobj, 3891 struct attribute *a, int n) 3892 { 3893 struct device *dev = container_of(kobj, struct device, kobj); 3894 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 3895 3896 if (a == &dev_attr_delete_controller.attr && !ctrl->ops->delete_ctrl) 3897 return 0; 3898 if (a == &dev_attr_address.attr && !ctrl->ops->get_address) 3899 return 0; 3900 if (a == &dev_attr_hostnqn.attr && !ctrl->opts) 3901 return 0; 3902 if (a == &dev_attr_hostid.attr && !ctrl->opts) 3903 return 0; 3904 if (a == &dev_attr_ctrl_loss_tmo.attr && !ctrl->opts) 3905 return 0; 3906 if (a == &dev_attr_reconnect_delay.attr && !ctrl->opts) 3907 return 0; 3908 if (a == &dev_attr_fast_io_fail_tmo.attr && !ctrl->opts) 3909 return 0; 3910 #ifdef CONFIG_NVME_AUTH 3911 if (a == &dev_attr_dhchap_secret.attr && !ctrl->opts) 3912 return 0; 3913 if (a == &dev_attr_dhchap_ctrl_secret.attr && !ctrl->opts) 3914 return 0; 3915 #endif 3916 3917 return a->mode; 3918 } 3919 3920 const struct attribute_group nvme_dev_attrs_group = { 3921 .attrs = nvme_dev_attrs, 3922 .is_visible = nvme_dev_attrs_are_visible, 3923 }; 3924 EXPORT_SYMBOL_GPL(nvme_dev_attrs_group); 3925 3926 static const struct attribute_group *nvme_dev_attr_groups[] = { 3927 &nvme_dev_attrs_group, 3928 NULL, 3929 }; 3930 3931 static struct nvme_ns_head *nvme_find_ns_head(struct nvme_ctrl *ctrl, 3932 unsigned nsid) 3933 { 3934 struct nvme_ns_head *h; 3935 3936 lockdep_assert_held(&ctrl->subsys->lock); 3937 3938 list_for_each_entry(h, &ctrl->subsys->nsheads, entry) { 3939 /* 3940 * Private namespaces can share NSIDs under some conditions. 3941 * In that case we can't use the same ns_head for namespaces 3942 * with the same NSID. 3943 */ 3944 if (h->ns_id != nsid || !nvme_is_unique_nsid(ctrl, h)) 3945 continue; 3946 if (!list_empty(&h->list) && nvme_tryget_ns_head(h)) 3947 return h; 3948 } 3949 3950 return NULL; 3951 } 3952 3953 static int nvme_subsys_check_duplicate_ids(struct nvme_subsystem *subsys, 3954 struct nvme_ns_ids *ids) 3955 { 3956 bool has_uuid = !uuid_is_null(&ids->uuid); 3957 bool has_nguid = memchr_inv(ids->nguid, 0, sizeof(ids->nguid)); 3958 bool has_eui64 = memchr_inv(ids->eui64, 0, sizeof(ids->eui64)); 3959 struct nvme_ns_head *h; 3960 3961 lockdep_assert_held(&subsys->lock); 3962 3963 list_for_each_entry(h, &subsys->nsheads, entry) { 3964 if (has_uuid && uuid_equal(&ids->uuid, &h->ids.uuid)) 3965 return -EINVAL; 3966 if (has_nguid && 3967 memcmp(&ids->nguid, &h->ids.nguid, sizeof(ids->nguid)) == 0) 3968 return -EINVAL; 3969 if (has_eui64 && 3970 memcmp(&ids->eui64, &h->ids.eui64, sizeof(ids->eui64)) == 0) 3971 return -EINVAL; 3972 } 3973 3974 return 0; 3975 } 3976 3977 static void nvme_cdev_rel(struct device *dev) 3978 { 3979 ida_free(&nvme_ns_chr_minor_ida, MINOR(dev->devt)); 3980 } 3981 3982 void nvme_cdev_del(struct cdev *cdev, struct device *cdev_device) 3983 { 3984 cdev_device_del(cdev, cdev_device); 3985 put_device(cdev_device); 3986 } 3987 3988 int nvme_cdev_add(struct cdev *cdev, struct device *cdev_device, 3989 const struct file_operations *fops, struct module *owner) 3990 { 3991 int minor, ret; 3992 3993 minor = ida_alloc(&nvme_ns_chr_minor_ida, GFP_KERNEL); 3994 if (minor < 0) 3995 return minor; 3996 cdev_device->devt = MKDEV(MAJOR(nvme_ns_chr_devt), minor); 3997 cdev_device->class = nvme_ns_chr_class; 3998 cdev_device->release = nvme_cdev_rel; 3999 device_initialize(cdev_device); 4000 cdev_init(cdev, fops); 4001 cdev->owner = owner; 4002 ret = cdev_device_add(cdev, cdev_device); 4003 if (ret) 4004 put_device(cdev_device); 4005 4006 return ret; 4007 } 4008 4009 static int nvme_ns_chr_open(struct inode *inode, struct file *file) 4010 { 4011 return nvme_ns_open(container_of(inode->i_cdev, struct nvme_ns, cdev)); 4012 } 4013 4014 static int nvme_ns_chr_release(struct inode *inode, struct file *file) 4015 { 4016 nvme_ns_release(container_of(inode->i_cdev, struct nvme_ns, cdev)); 4017 return 0; 4018 } 4019 4020 static const struct file_operations nvme_ns_chr_fops = { 4021 .owner = THIS_MODULE, 4022 .open = nvme_ns_chr_open, 4023 .release = nvme_ns_chr_release, 4024 .unlocked_ioctl = nvme_ns_chr_ioctl, 4025 .compat_ioctl = compat_ptr_ioctl, 4026 .uring_cmd = nvme_ns_chr_uring_cmd, 4027 .uring_cmd_iopoll = nvme_ns_chr_uring_cmd_iopoll, 4028 }; 4029 4030 static int nvme_add_ns_cdev(struct nvme_ns *ns) 4031 { 4032 int ret; 4033 4034 ns->cdev_device.parent = ns->ctrl->device; 4035 ret = dev_set_name(&ns->cdev_device, "ng%dn%d", 4036 ns->ctrl->instance, ns->head->instance); 4037 if (ret) 4038 return ret; 4039 4040 return nvme_cdev_add(&ns->cdev, &ns->cdev_device, &nvme_ns_chr_fops, 4041 ns->ctrl->ops->module); 4042 } 4043 4044 static struct nvme_ns_head *nvme_alloc_ns_head(struct nvme_ctrl *ctrl, 4045 struct nvme_ns_info *info) 4046 { 4047 struct nvme_ns_head *head; 4048 size_t size = sizeof(*head); 4049 int ret = -ENOMEM; 4050 4051 #ifdef CONFIG_NVME_MULTIPATH 4052 size += num_possible_nodes() * sizeof(struct nvme_ns *); 4053 #endif 4054 4055 head = kzalloc(size, GFP_KERNEL); 4056 if (!head) 4057 goto out; 4058 ret = ida_alloc_min(&ctrl->subsys->ns_ida, 1, GFP_KERNEL); 4059 if (ret < 0) 4060 goto out_free_head; 4061 head->instance = ret; 4062 INIT_LIST_HEAD(&head->list); 4063 ret = init_srcu_struct(&head->srcu); 4064 if (ret) 4065 goto out_ida_remove; 4066 head->subsys = ctrl->subsys; 4067 head->ns_id = info->nsid; 4068 head->ids = info->ids; 4069 head->shared = info->is_shared; 4070 kref_init(&head->ref); 4071 4072 if (head->ids.csi) { 4073 ret = nvme_get_effects_log(ctrl, head->ids.csi, &head->effects); 4074 if (ret) 4075 goto out_cleanup_srcu; 4076 } else 4077 head->effects = ctrl->effects; 4078 4079 ret = nvme_mpath_alloc_disk(ctrl, head); 4080 if (ret) 4081 goto out_cleanup_srcu; 4082 4083 list_add_tail(&head->entry, &ctrl->subsys->nsheads); 4084 4085 kref_get(&ctrl->subsys->ref); 4086 4087 return head; 4088 out_cleanup_srcu: 4089 cleanup_srcu_struct(&head->srcu); 4090 out_ida_remove: 4091 ida_free(&ctrl->subsys->ns_ida, head->instance); 4092 out_free_head: 4093 kfree(head); 4094 out: 4095 if (ret > 0) 4096 ret = blk_status_to_errno(nvme_error_status(ret)); 4097 return ERR_PTR(ret); 4098 } 4099 4100 static int nvme_global_check_duplicate_ids(struct nvme_subsystem *this, 4101 struct nvme_ns_ids *ids) 4102 { 4103 struct nvme_subsystem *s; 4104 int ret = 0; 4105 4106 /* 4107 * Note that this check is racy as we try to avoid holding the global 4108 * lock over the whole ns_head creation. But it is only intended as 4109 * a sanity check anyway. 4110 */ 4111 mutex_lock(&nvme_subsystems_lock); 4112 list_for_each_entry(s, &nvme_subsystems, entry) { 4113 if (s == this) 4114 continue; 4115 mutex_lock(&s->lock); 4116 ret = nvme_subsys_check_duplicate_ids(s, ids); 4117 mutex_unlock(&s->lock); 4118 if (ret) 4119 break; 4120 } 4121 mutex_unlock(&nvme_subsystems_lock); 4122 4123 return ret; 4124 } 4125 4126 static int nvme_init_ns_head(struct nvme_ns *ns, struct nvme_ns_info *info) 4127 { 4128 struct nvme_ctrl *ctrl = ns->ctrl; 4129 struct nvme_ns_head *head = NULL; 4130 int ret; 4131 4132 ret = nvme_global_check_duplicate_ids(ctrl->subsys, &info->ids); 4133 if (ret) { 4134 dev_err(ctrl->device, 4135 "globally duplicate IDs for nsid %d\n", info->nsid); 4136 nvme_print_device_info(ctrl); 4137 return ret; 4138 } 4139 4140 mutex_lock(&ctrl->subsys->lock); 4141 head = nvme_find_ns_head(ctrl, info->nsid); 4142 if (!head) { 4143 ret = nvme_subsys_check_duplicate_ids(ctrl->subsys, &info->ids); 4144 if (ret) { 4145 dev_err(ctrl->device, 4146 "duplicate IDs in subsystem for nsid %d\n", 4147 info->nsid); 4148 goto out_unlock; 4149 } 4150 head = nvme_alloc_ns_head(ctrl, info); 4151 if (IS_ERR(head)) { 4152 ret = PTR_ERR(head); 4153 goto out_unlock; 4154 } 4155 } else { 4156 ret = -EINVAL; 4157 if (!info->is_shared || !head->shared) { 4158 dev_err(ctrl->device, 4159 "Duplicate unshared namespace %d\n", 4160 info->nsid); 4161 goto out_put_ns_head; 4162 } 4163 if (!nvme_ns_ids_equal(&head->ids, &info->ids)) { 4164 dev_err(ctrl->device, 4165 "IDs don't match for shared namespace %d\n", 4166 info->nsid); 4167 goto out_put_ns_head; 4168 } 4169 4170 if (!multipath && !list_empty(&head->list)) { 4171 dev_warn(ctrl->device, 4172 "Found shared namespace %d, but multipathing not supported.\n", 4173 info->nsid); 4174 dev_warn_once(ctrl->device, 4175 "Support for shared namespaces without CONFIG_NVME_MULTIPATH is deprecated and will be removed in Linux 6.0\n."); 4176 } 4177 } 4178 4179 list_add_tail_rcu(&ns->siblings, &head->list); 4180 ns->head = head; 4181 mutex_unlock(&ctrl->subsys->lock); 4182 return 0; 4183 4184 out_put_ns_head: 4185 nvme_put_ns_head(head); 4186 out_unlock: 4187 mutex_unlock(&ctrl->subsys->lock); 4188 return ret; 4189 } 4190 4191 struct nvme_ns *nvme_find_get_ns(struct nvme_ctrl *ctrl, unsigned nsid) 4192 { 4193 struct nvme_ns *ns, *ret = NULL; 4194 4195 down_read(&ctrl->namespaces_rwsem); 4196 list_for_each_entry(ns, &ctrl->namespaces, list) { 4197 if (ns->head->ns_id == nsid) { 4198 if (!nvme_get_ns(ns)) 4199 continue; 4200 ret = ns; 4201 break; 4202 } 4203 if (ns->head->ns_id > nsid) 4204 break; 4205 } 4206 up_read(&ctrl->namespaces_rwsem); 4207 return ret; 4208 } 4209 EXPORT_SYMBOL_NS_GPL(nvme_find_get_ns, NVME_TARGET_PASSTHRU); 4210 4211 /* 4212 * Add the namespace to the controller list while keeping the list ordered. 4213 */ 4214 static void nvme_ns_add_to_ctrl_list(struct nvme_ns *ns) 4215 { 4216 struct nvme_ns *tmp; 4217 4218 list_for_each_entry_reverse(tmp, &ns->ctrl->namespaces, list) { 4219 if (tmp->head->ns_id < ns->head->ns_id) { 4220 list_add(&ns->list, &tmp->list); 4221 return; 4222 } 4223 } 4224 list_add(&ns->list, &ns->ctrl->namespaces); 4225 } 4226 4227 static void nvme_alloc_ns(struct nvme_ctrl *ctrl, struct nvme_ns_info *info) 4228 { 4229 struct nvme_ns *ns; 4230 struct gendisk *disk; 4231 int node = ctrl->numa_node; 4232 4233 ns = kzalloc_node(sizeof(*ns), GFP_KERNEL, node); 4234 if (!ns) 4235 return; 4236 4237 disk = blk_mq_alloc_disk(ctrl->tagset, ns); 4238 if (IS_ERR(disk)) 4239 goto out_free_ns; 4240 disk->fops = &nvme_bdev_ops; 4241 disk->private_data = ns; 4242 4243 ns->disk = disk; 4244 ns->queue = disk->queue; 4245 4246 if (ctrl->opts && ctrl->opts->data_digest) 4247 blk_queue_flag_set(QUEUE_FLAG_STABLE_WRITES, ns->queue); 4248 4249 blk_queue_flag_set(QUEUE_FLAG_NONROT, ns->queue); 4250 if (ctrl->ops->supports_pci_p2pdma && 4251 ctrl->ops->supports_pci_p2pdma(ctrl)) 4252 blk_queue_flag_set(QUEUE_FLAG_PCI_P2PDMA, ns->queue); 4253 4254 ns->ctrl = ctrl; 4255 kref_init(&ns->kref); 4256 4257 if (nvme_init_ns_head(ns, info)) 4258 goto out_cleanup_disk; 4259 4260 /* 4261 * If multipathing is enabled, the device name for all disks and not 4262 * just those that represent shared namespaces needs to be based on the 4263 * subsystem instance. Using the controller instance for private 4264 * namespaces could lead to naming collisions between shared and private 4265 * namespaces if they don't use a common numbering scheme. 4266 * 4267 * If multipathing is not enabled, disk names must use the controller 4268 * instance as shared namespaces will show up as multiple block 4269 * devices. 4270 */ 4271 if (ns->head->disk) { 4272 sprintf(disk->disk_name, "nvme%dc%dn%d", ctrl->subsys->instance, 4273 ctrl->instance, ns->head->instance); 4274 disk->flags |= GENHD_FL_HIDDEN; 4275 } else if (multipath) { 4276 sprintf(disk->disk_name, "nvme%dn%d", ctrl->subsys->instance, 4277 ns->head->instance); 4278 } else { 4279 sprintf(disk->disk_name, "nvme%dn%d", ctrl->instance, 4280 ns->head->instance); 4281 } 4282 4283 if (nvme_update_ns_info(ns, info)) 4284 goto out_unlink_ns; 4285 4286 down_write(&ctrl->namespaces_rwsem); 4287 nvme_ns_add_to_ctrl_list(ns); 4288 up_write(&ctrl->namespaces_rwsem); 4289 nvme_get_ctrl(ctrl); 4290 4291 if (device_add_disk(ctrl->device, ns->disk, nvme_ns_id_attr_groups)) 4292 goto out_cleanup_ns_from_list; 4293 4294 if (!nvme_ns_head_multipath(ns->head)) 4295 nvme_add_ns_cdev(ns); 4296 4297 nvme_mpath_add_disk(ns, info->anagrpid); 4298 nvme_fault_inject_init(&ns->fault_inject, ns->disk->disk_name); 4299 4300 return; 4301 4302 out_cleanup_ns_from_list: 4303 nvme_put_ctrl(ctrl); 4304 down_write(&ctrl->namespaces_rwsem); 4305 list_del_init(&ns->list); 4306 up_write(&ctrl->namespaces_rwsem); 4307 out_unlink_ns: 4308 mutex_lock(&ctrl->subsys->lock); 4309 list_del_rcu(&ns->siblings); 4310 if (list_empty(&ns->head->list)) 4311 list_del_init(&ns->head->entry); 4312 mutex_unlock(&ctrl->subsys->lock); 4313 nvme_put_ns_head(ns->head); 4314 out_cleanup_disk: 4315 put_disk(disk); 4316 out_free_ns: 4317 kfree(ns); 4318 } 4319 4320 static void nvme_ns_remove(struct nvme_ns *ns) 4321 { 4322 bool last_path = false; 4323 4324 if (test_and_set_bit(NVME_NS_REMOVING, &ns->flags)) 4325 return; 4326 4327 clear_bit(NVME_NS_READY, &ns->flags); 4328 set_capacity(ns->disk, 0); 4329 nvme_fault_inject_fini(&ns->fault_inject); 4330 4331 /* 4332 * Ensure that !NVME_NS_READY is seen by other threads to prevent 4333 * this ns going back into current_path. 4334 */ 4335 synchronize_srcu(&ns->head->srcu); 4336 4337 /* wait for concurrent submissions */ 4338 if (nvme_mpath_clear_current_path(ns)) 4339 synchronize_srcu(&ns->head->srcu); 4340 4341 mutex_lock(&ns->ctrl->subsys->lock); 4342 list_del_rcu(&ns->siblings); 4343 if (list_empty(&ns->head->list)) { 4344 list_del_init(&ns->head->entry); 4345 last_path = true; 4346 } 4347 mutex_unlock(&ns->ctrl->subsys->lock); 4348 4349 /* guarantee not available in head->list */ 4350 synchronize_srcu(&ns->head->srcu); 4351 4352 if (!nvme_ns_head_multipath(ns->head)) 4353 nvme_cdev_del(&ns->cdev, &ns->cdev_device); 4354 del_gendisk(ns->disk); 4355 4356 down_write(&ns->ctrl->namespaces_rwsem); 4357 list_del_init(&ns->list); 4358 up_write(&ns->ctrl->namespaces_rwsem); 4359 4360 if (last_path) 4361 nvme_mpath_shutdown_disk(ns->head); 4362 nvme_put_ns(ns); 4363 } 4364 4365 static void nvme_ns_remove_by_nsid(struct nvme_ctrl *ctrl, u32 nsid) 4366 { 4367 struct nvme_ns *ns = nvme_find_get_ns(ctrl, nsid); 4368 4369 if (ns) { 4370 nvme_ns_remove(ns); 4371 nvme_put_ns(ns); 4372 } 4373 } 4374 4375 static void nvme_validate_ns(struct nvme_ns *ns, struct nvme_ns_info *info) 4376 { 4377 int ret = NVME_SC_INVALID_NS | NVME_SC_DNR; 4378 4379 if (!nvme_ns_ids_equal(&ns->head->ids, &info->ids)) { 4380 dev_err(ns->ctrl->device, 4381 "identifiers changed for nsid %d\n", ns->head->ns_id); 4382 goto out; 4383 } 4384 4385 ret = nvme_update_ns_info(ns, info); 4386 out: 4387 /* 4388 * Only remove the namespace if we got a fatal error back from the 4389 * device, otherwise ignore the error and just move on. 4390 * 4391 * TODO: we should probably schedule a delayed retry here. 4392 */ 4393 if (ret > 0 && (ret & NVME_SC_DNR)) 4394 nvme_ns_remove(ns); 4395 } 4396 4397 static void nvme_scan_ns(struct nvme_ctrl *ctrl, unsigned nsid) 4398 { 4399 struct nvme_ns_info info = { .nsid = nsid }; 4400 struct nvme_ns *ns; 4401 4402 if (nvme_identify_ns_descs(ctrl, &info)) 4403 return; 4404 4405 if (info.ids.csi != NVME_CSI_NVM && !nvme_multi_css(ctrl)) { 4406 dev_warn(ctrl->device, 4407 "command set not reported for nsid: %d\n", nsid); 4408 return; 4409 } 4410 4411 /* 4412 * If available try to use the Command Set Idependent Identify Namespace 4413 * data structure to find all the generic information that is needed to 4414 * set up a namespace. If not fall back to the legacy version. 4415 */ 4416 if ((ctrl->cap & NVME_CAP_CRMS_CRIMS) || 4417 (info.ids.csi != NVME_CSI_NVM && info.ids.csi != NVME_CSI_ZNS)) { 4418 if (nvme_ns_info_from_id_cs_indep(ctrl, &info)) 4419 return; 4420 } else { 4421 if (nvme_ns_info_from_identify(ctrl, &info)) 4422 return; 4423 } 4424 4425 /* 4426 * Ignore the namespace if it is not ready. We will get an AEN once it 4427 * becomes ready and restart the scan. 4428 */ 4429 if (!info.is_ready) 4430 return; 4431 4432 ns = nvme_find_get_ns(ctrl, nsid); 4433 if (ns) { 4434 nvme_validate_ns(ns, &info); 4435 nvme_put_ns(ns); 4436 } else { 4437 nvme_alloc_ns(ctrl, &info); 4438 } 4439 } 4440 4441 static void nvme_remove_invalid_namespaces(struct nvme_ctrl *ctrl, 4442 unsigned nsid) 4443 { 4444 struct nvme_ns *ns, *next; 4445 LIST_HEAD(rm_list); 4446 4447 down_write(&ctrl->namespaces_rwsem); 4448 list_for_each_entry_safe(ns, next, &ctrl->namespaces, list) { 4449 if (ns->head->ns_id > nsid) 4450 list_move_tail(&ns->list, &rm_list); 4451 } 4452 up_write(&ctrl->namespaces_rwsem); 4453 4454 list_for_each_entry_safe(ns, next, &rm_list, list) 4455 nvme_ns_remove(ns); 4456 4457 } 4458 4459 static int nvme_scan_ns_list(struct nvme_ctrl *ctrl) 4460 { 4461 const int nr_entries = NVME_IDENTIFY_DATA_SIZE / sizeof(__le32); 4462 __le32 *ns_list; 4463 u32 prev = 0; 4464 int ret = 0, i; 4465 4466 ns_list = kzalloc(NVME_IDENTIFY_DATA_SIZE, GFP_KERNEL); 4467 if (!ns_list) 4468 return -ENOMEM; 4469 4470 for (;;) { 4471 struct nvme_command cmd = { 4472 .identify.opcode = nvme_admin_identify, 4473 .identify.cns = NVME_ID_CNS_NS_ACTIVE_LIST, 4474 .identify.nsid = cpu_to_le32(prev), 4475 }; 4476 4477 ret = nvme_submit_sync_cmd(ctrl->admin_q, &cmd, ns_list, 4478 NVME_IDENTIFY_DATA_SIZE); 4479 if (ret) { 4480 dev_warn(ctrl->device, 4481 "Identify NS List failed (status=0x%x)\n", ret); 4482 goto free; 4483 } 4484 4485 for (i = 0; i < nr_entries; i++) { 4486 u32 nsid = le32_to_cpu(ns_list[i]); 4487 4488 if (!nsid) /* end of the list? */ 4489 goto out; 4490 nvme_scan_ns(ctrl, nsid); 4491 while (++prev < nsid) 4492 nvme_ns_remove_by_nsid(ctrl, prev); 4493 } 4494 } 4495 out: 4496 nvme_remove_invalid_namespaces(ctrl, prev); 4497 free: 4498 kfree(ns_list); 4499 return ret; 4500 } 4501 4502 static void nvme_scan_ns_sequential(struct nvme_ctrl *ctrl) 4503 { 4504 struct nvme_id_ctrl *id; 4505 u32 nn, i; 4506 4507 if (nvme_identify_ctrl(ctrl, &id)) 4508 return; 4509 nn = le32_to_cpu(id->nn); 4510 kfree(id); 4511 4512 for (i = 1; i <= nn; i++) 4513 nvme_scan_ns(ctrl, i); 4514 4515 nvme_remove_invalid_namespaces(ctrl, nn); 4516 } 4517 4518 static void nvme_clear_changed_ns_log(struct nvme_ctrl *ctrl) 4519 { 4520 size_t log_size = NVME_MAX_CHANGED_NAMESPACES * sizeof(__le32); 4521 __le32 *log; 4522 int error; 4523 4524 log = kzalloc(log_size, GFP_KERNEL); 4525 if (!log) 4526 return; 4527 4528 /* 4529 * We need to read the log to clear the AEN, but we don't want to rely 4530 * on it for the changed namespace information as userspace could have 4531 * raced with us in reading the log page, which could cause us to miss 4532 * updates. 4533 */ 4534 error = nvme_get_log(ctrl, NVME_NSID_ALL, NVME_LOG_CHANGED_NS, 0, 4535 NVME_CSI_NVM, log, log_size, 0); 4536 if (error) 4537 dev_warn(ctrl->device, 4538 "reading changed ns log failed: %d\n", error); 4539 4540 kfree(log); 4541 } 4542 4543 static void nvme_scan_work(struct work_struct *work) 4544 { 4545 struct nvme_ctrl *ctrl = 4546 container_of(work, struct nvme_ctrl, scan_work); 4547 int ret; 4548 4549 /* No tagset on a live ctrl means IO queues could not created */ 4550 if (ctrl->state != NVME_CTRL_LIVE || !ctrl->tagset) 4551 return; 4552 4553 /* 4554 * Identify controller limits can change at controller reset due to 4555 * new firmware download, even though it is not common we cannot ignore 4556 * such scenario. Controller's non-mdts limits are reported in the unit 4557 * of logical blocks that is dependent on the format of attached 4558 * namespace. Hence re-read the limits at the time of ns allocation. 4559 */ 4560 ret = nvme_init_non_mdts_limits(ctrl); 4561 if (ret < 0) { 4562 dev_warn(ctrl->device, 4563 "reading non-mdts-limits failed: %d\n", ret); 4564 return; 4565 } 4566 4567 if (test_and_clear_bit(NVME_AER_NOTICE_NS_CHANGED, &ctrl->events)) { 4568 dev_info(ctrl->device, "rescanning namespaces.\n"); 4569 nvme_clear_changed_ns_log(ctrl); 4570 } 4571 4572 mutex_lock(&ctrl->scan_lock); 4573 if (nvme_ctrl_limited_cns(ctrl)) { 4574 nvme_scan_ns_sequential(ctrl); 4575 } else { 4576 /* 4577 * Fall back to sequential scan if DNR is set to handle broken 4578 * devices which should support Identify NS List (as per the VS 4579 * they report) but don't actually support it. 4580 */ 4581 ret = nvme_scan_ns_list(ctrl); 4582 if (ret > 0 && ret & NVME_SC_DNR) 4583 nvme_scan_ns_sequential(ctrl); 4584 } 4585 mutex_unlock(&ctrl->scan_lock); 4586 } 4587 4588 /* 4589 * This function iterates the namespace list unlocked to allow recovery from 4590 * controller failure. It is up to the caller to ensure the namespace list is 4591 * not modified by scan work while this function is executing. 4592 */ 4593 void nvme_remove_namespaces(struct nvme_ctrl *ctrl) 4594 { 4595 struct nvme_ns *ns, *next; 4596 LIST_HEAD(ns_list); 4597 4598 /* 4599 * make sure to requeue I/O to all namespaces as these 4600 * might result from the scan itself and must complete 4601 * for the scan_work to make progress 4602 */ 4603 nvme_mpath_clear_ctrl_paths(ctrl); 4604 4605 /* prevent racing with ns scanning */ 4606 flush_work(&ctrl->scan_work); 4607 4608 /* 4609 * The dead states indicates the controller was not gracefully 4610 * disconnected. In that case, we won't be able to flush any data while 4611 * removing the namespaces' disks; fail all the queues now to avoid 4612 * potentially having to clean up the failed sync later. 4613 */ 4614 if (ctrl->state == NVME_CTRL_DEAD) { 4615 nvme_mark_namespaces_dead(ctrl); 4616 nvme_unquiesce_io_queues(ctrl); 4617 } 4618 4619 /* this is a no-op when called from the controller reset handler */ 4620 nvme_change_ctrl_state(ctrl, NVME_CTRL_DELETING_NOIO); 4621 4622 down_write(&ctrl->namespaces_rwsem); 4623 list_splice_init(&ctrl->namespaces, &ns_list); 4624 up_write(&ctrl->namespaces_rwsem); 4625 4626 list_for_each_entry_safe(ns, next, &ns_list, list) 4627 nvme_ns_remove(ns); 4628 } 4629 EXPORT_SYMBOL_GPL(nvme_remove_namespaces); 4630 4631 static int nvme_class_uevent(const struct device *dev, struct kobj_uevent_env *env) 4632 { 4633 const struct nvme_ctrl *ctrl = 4634 container_of(dev, struct nvme_ctrl, ctrl_device); 4635 struct nvmf_ctrl_options *opts = ctrl->opts; 4636 int ret; 4637 4638 ret = add_uevent_var(env, "NVME_TRTYPE=%s", ctrl->ops->name); 4639 if (ret) 4640 return ret; 4641 4642 if (opts) { 4643 ret = add_uevent_var(env, "NVME_TRADDR=%s", opts->traddr); 4644 if (ret) 4645 return ret; 4646 4647 ret = add_uevent_var(env, "NVME_TRSVCID=%s", 4648 opts->trsvcid ?: "none"); 4649 if (ret) 4650 return ret; 4651 4652 ret = add_uevent_var(env, "NVME_HOST_TRADDR=%s", 4653 opts->host_traddr ?: "none"); 4654 if (ret) 4655 return ret; 4656 4657 ret = add_uevent_var(env, "NVME_HOST_IFACE=%s", 4658 opts->host_iface ?: "none"); 4659 } 4660 return ret; 4661 } 4662 4663 static void nvme_change_uevent(struct nvme_ctrl *ctrl, char *envdata) 4664 { 4665 char *envp[2] = { envdata, NULL }; 4666 4667 kobject_uevent_env(&ctrl->device->kobj, KOBJ_CHANGE, envp); 4668 } 4669 4670 static void nvme_aen_uevent(struct nvme_ctrl *ctrl) 4671 { 4672 char *envp[2] = { NULL, NULL }; 4673 u32 aen_result = ctrl->aen_result; 4674 4675 ctrl->aen_result = 0; 4676 if (!aen_result) 4677 return; 4678 4679 envp[0] = kasprintf(GFP_KERNEL, "NVME_AEN=%#08x", aen_result); 4680 if (!envp[0]) 4681 return; 4682 kobject_uevent_env(&ctrl->device->kobj, KOBJ_CHANGE, envp); 4683 kfree(envp[0]); 4684 } 4685 4686 static void nvme_async_event_work(struct work_struct *work) 4687 { 4688 struct nvme_ctrl *ctrl = 4689 container_of(work, struct nvme_ctrl, async_event_work); 4690 4691 nvme_aen_uevent(ctrl); 4692 4693 /* 4694 * The transport drivers must guarantee AER submission here is safe by 4695 * flushing ctrl async_event_work after changing the controller state 4696 * from LIVE and before freeing the admin queue. 4697 */ 4698 if (ctrl->state == NVME_CTRL_LIVE) 4699 ctrl->ops->submit_async_event(ctrl); 4700 } 4701 4702 static bool nvme_ctrl_pp_status(struct nvme_ctrl *ctrl) 4703 { 4704 4705 u32 csts; 4706 4707 if (ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts)) 4708 return false; 4709 4710 if (csts == ~0) 4711 return false; 4712 4713 return ((ctrl->ctrl_config & NVME_CC_ENABLE) && (csts & NVME_CSTS_PP)); 4714 } 4715 4716 static void nvme_get_fw_slot_info(struct nvme_ctrl *ctrl) 4717 { 4718 struct nvme_fw_slot_info_log *log; 4719 4720 log = kmalloc(sizeof(*log), GFP_KERNEL); 4721 if (!log) 4722 return; 4723 4724 if (nvme_get_log(ctrl, NVME_NSID_ALL, NVME_LOG_FW_SLOT, 0, NVME_CSI_NVM, 4725 log, sizeof(*log), 0)) 4726 dev_warn(ctrl->device, "Get FW SLOT INFO log error\n"); 4727 kfree(log); 4728 } 4729 4730 static void nvme_fw_act_work(struct work_struct *work) 4731 { 4732 struct nvme_ctrl *ctrl = container_of(work, 4733 struct nvme_ctrl, fw_act_work); 4734 unsigned long fw_act_timeout; 4735 4736 if (ctrl->mtfa) 4737 fw_act_timeout = jiffies + 4738 msecs_to_jiffies(ctrl->mtfa * 100); 4739 else 4740 fw_act_timeout = jiffies + 4741 msecs_to_jiffies(admin_timeout * 1000); 4742 4743 nvme_quiesce_io_queues(ctrl); 4744 while (nvme_ctrl_pp_status(ctrl)) { 4745 if (time_after(jiffies, fw_act_timeout)) { 4746 dev_warn(ctrl->device, 4747 "Fw activation timeout, reset controller\n"); 4748 nvme_try_sched_reset(ctrl); 4749 return; 4750 } 4751 msleep(100); 4752 } 4753 4754 if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_LIVE)) 4755 return; 4756 4757 nvme_unquiesce_io_queues(ctrl); 4758 /* read FW slot information to clear the AER */ 4759 nvme_get_fw_slot_info(ctrl); 4760 4761 queue_work(nvme_wq, &ctrl->async_event_work); 4762 } 4763 4764 static u32 nvme_aer_type(u32 result) 4765 { 4766 return result & 0x7; 4767 } 4768 4769 static u32 nvme_aer_subtype(u32 result) 4770 { 4771 return (result & 0xff00) >> 8; 4772 } 4773 4774 static bool nvme_handle_aen_notice(struct nvme_ctrl *ctrl, u32 result) 4775 { 4776 u32 aer_notice_type = nvme_aer_subtype(result); 4777 bool requeue = true; 4778 4779 trace_nvme_async_event(ctrl, aer_notice_type); 4780 4781 switch (aer_notice_type) { 4782 case NVME_AER_NOTICE_NS_CHANGED: 4783 set_bit(NVME_AER_NOTICE_NS_CHANGED, &ctrl->events); 4784 nvme_queue_scan(ctrl); 4785 break; 4786 case NVME_AER_NOTICE_FW_ACT_STARTING: 4787 /* 4788 * We are (ab)using the RESETTING state to prevent subsequent 4789 * recovery actions from interfering with the controller's 4790 * firmware activation. 4791 */ 4792 if (nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING)) { 4793 nvme_auth_stop(ctrl); 4794 requeue = false; 4795 queue_work(nvme_wq, &ctrl->fw_act_work); 4796 } 4797 break; 4798 #ifdef CONFIG_NVME_MULTIPATH 4799 case NVME_AER_NOTICE_ANA: 4800 if (!ctrl->ana_log_buf) 4801 break; 4802 queue_work(nvme_wq, &ctrl->ana_work); 4803 break; 4804 #endif 4805 case NVME_AER_NOTICE_DISC_CHANGED: 4806 ctrl->aen_result = result; 4807 break; 4808 default: 4809 dev_warn(ctrl->device, "async event result %08x\n", result); 4810 } 4811 return requeue; 4812 } 4813 4814 static void nvme_handle_aer_persistent_error(struct nvme_ctrl *ctrl) 4815 { 4816 trace_nvme_async_event(ctrl, NVME_AER_ERROR); 4817 dev_warn(ctrl->device, "resetting controller due to AER\n"); 4818 nvme_reset_ctrl(ctrl); 4819 } 4820 4821 void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status, 4822 volatile union nvme_result *res) 4823 { 4824 u32 result = le32_to_cpu(res->u32); 4825 u32 aer_type = nvme_aer_type(result); 4826 u32 aer_subtype = nvme_aer_subtype(result); 4827 bool requeue = true; 4828 4829 if (le16_to_cpu(status) >> 1 != NVME_SC_SUCCESS) 4830 return; 4831 4832 switch (aer_type) { 4833 case NVME_AER_NOTICE: 4834 requeue = nvme_handle_aen_notice(ctrl, result); 4835 break; 4836 case NVME_AER_ERROR: 4837 /* 4838 * For a persistent internal error, don't run async_event_work 4839 * to submit a new AER. The controller reset will do it. 4840 */ 4841 if (aer_subtype == NVME_AER_ERROR_PERSIST_INT_ERR) { 4842 nvme_handle_aer_persistent_error(ctrl); 4843 return; 4844 } 4845 fallthrough; 4846 case NVME_AER_SMART: 4847 case NVME_AER_CSS: 4848 case NVME_AER_VS: 4849 trace_nvme_async_event(ctrl, aer_type); 4850 ctrl->aen_result = result; 4851 break; 4852 default: 4853 break; 4854 } 4855 4856 if (requeue) 4857 queue_work(nvme_wq, &ctrl->async_event_work); 4858 } 4859 EXPORT_SYMBOL_GPL(nvme_complete_async_event); 4860 4861 int nvme_alloc_admin_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set, 4862 const struct blk_mq_ops *ops, unsigned int cmd_size) 4863 { 4864 int ret; 4865 4866 memset(set, 0, sizeof(*set)); 4867 set->ops = ops; 4868 set->queue_depth = NVME_AQ_MQ_TAG_DEPTH; 4869 if (ctrl->ops->flags & NVME_F_FABRICS) 4870 set->reserved_tags = NVMF_RESERVED_TAGS; 4871 set->numa_node = ctrl->numa_node; 4872 set->flags = BLK_MQ_F_NO_SCHED; 4873 if (ctrl->ops->flags & NVME_F_BLOCKING) 4874 set->flags |= BLK_MQ_F_BLOCKING; 4875 set->cmd_size = cmd_size; 4876 set->driver_data = ctrl; 4877 set->nr_hw_queues = 1; 4878 set->timeout = NVME_ADMIN_TIMEOUT; 4879 ret = blk_mq_alloc_tag_set(set); 4880 if (ret) 4881 return ret; 4882 4883 ctrl->admin_q = blk_mq_init_queue(set); 4884 if (IS_ERR(ctrl->admin_q)) { 4885 ret = PTR_ERR(ctrl->admin_q); 4886 goto out_free_tagset; 4887 } 4888 4889 if (ctrl->ops->flags & NVME_F_FABRICS) { 4890 ctrl->fabrics_q = blk_mq_init_queue(set); 4891 if (IS_ERR(ctrl->fabrics_q)) { 4892 ret = PTR_ERR(ctrl->fabrics_q); 4893 goto out_cleanup_admin_q; 4894 } 4895 } 4896 4897 ctrl->admin_tagset = set; 4898 return 0; 4899 4900 out_cleanup_admin_q: 4901 blk_mq_destroy_queue(ctrl->admin_q); 4902 blk_put_queue(ctrl->admin_q); 4903 out_free_tagset: 4904 blk_mq_free_tag_set(ctrl->admin_tagset); 4905 return ret; 4906 } 4907 EXPORT_SYMBOL_GPL(nvme_alloc_admin_tag_set); 4908 4909 void nvme_remove_admin_tag_set(struct nvme_ctrl *ctrl) 4910 { 4911 blk_mq_destroy_queue(ctrl->admin_q); 4912 blk_put_queue(ctrl->admin_q); 4913 if (ctrl->ops->flags & NVME_F_FABRICS) { 4914 blk_mq_destroy_queue(ctrl->fabrics_q); 4915 blk_put_queue(ctrl->fabrics_q); 4916 } 4917 blk_mq_free_tag_set(ctrl->admin_tagset); 4918 } 4919 EXPORT_SYMBOL_GPL(nvme_remove_admin_tag_set); 4920 4921 int nvme_alloc_io_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set, 4922 const struct blk_mq_ops *ops, unsigned int nr_maps, 4923 unsigned int cmd_size) 4924 { 4925 int ret; 4926 4927 memset(set, 0, sizeof(*set)); 4928 set->ops = ops; 4929 set->queue_depth = ctrl->sqsize + 1; 4930 /* 4931 * Some Apple controllers requires tags to be unique across admin and 4932 * the (only) I/O queue, so reserve the first 32 tags of the I/O queue. 4933 */ 4934 if (ctrl->quirks & NVME_QUIRK_SHARED_TAGS) 4935 set->reserved_tags = NVME_AQ_DEPTH; 4936 else if (ctrl->ops->flags & NVME_F_FABRICS) 4937 set->reserved_tags = NVMF_RESERVED_TAGS; 4938 set->numa_node = ctrl->numa_node; 4939 set->flags = BLK_MQ_F_SHOULD_MERGE; 4940 if (ctrl->ops->flags & NVME_F_BLOCKING) 4941 set->flags |= BLK_MQ_F_BLOCKING; 4942 set->cmd_size = cmd_size, 4943 set->driver_data = ctrl; 4944 set->nr_hw_queues = ctrl->queue_count - 1; 4945 set->timeout = NVME_IO_TIMEOUT; 4946 set->nr_maps = nr_maps; 4947 ret = blk_mq_alloc_tag_set(set); 4948 if (ret) 4949 return ret; 4950 4951 if (ctrl->ops->flags & NVME_F_FABRICS) { 4952 ctrl->connect_q = blk_mq_init_queue(set); 4953 if (IS_ERR(ctrl->connect_q)) { 4954 ret = PTR_ERR(ctrl->connect_q); 4955 goto out_free_tag_set; 4956 } 4957 blk_queue_flag_set(QUEUE_FLAG_SKIP_TAGSET_QUIESCE, 4958 ctrl->connect_q); 4959 } 4960 4961 ctrl->tagset = set; 4962 return 0; 4963 4964 out_free_tag_set: 4965 blk_mq_free_tag_set(set); 4966 return ret; 4967 } 4968 EXPORT_SYMBOL_GPL(nvme_alloc_io_tag_set); 4969 4970 void nvme_remove_io_tag_set(struct nvme_ctrl *ctrl) 4971 { 4972 if (ctrl->ops->flags & NVME_F_FABRICS) { 4973 blk_mq_destroy_queue(ctrl->connect_q); 4974 blk_put_queue(ctrl->connect_q); 4975 } 4976 blk_mq_free_tag_set(ctrl->tagset); 4977 } 4978 EXPORT_SYMBOL_GPL(nvme_remove_io_tag_set); 4979 4980 void nvme_stop_ctrl(struct nvme_ctrl *ctrl) 4981 { 4982 nvme_mpath_stop(ctrl); 4983 nvme_auth_stop(ctrl); 4984 nvme_stop_keep_alive(ctrl); 4985 nvme_stop_failfast_work(ctrl); 4986 flush_work(&ctrl->async_event_work); 4987 cancel_work_sync(&ctrl->fw_act_work); 4988 if (ctrl->ops->stop_ctrl) 4989 ctrl->ops->stop_ctrl(ctrl); 4990 } 4991 EXPORT_SYMBOL_GPL(nvme_stop_ctrl); 4992 4993 void nvme_start_ctrl(struct nvme_ctrl *ctrl) 4994 { 4995 nvme_start_keep_alive(ctrl); 4996 4997 nvme_enable_aen(ctrl); 4998 4999 /* 5000 * persistent discovery controllers need to send indication to userspace 5001 * to re-read the discovery log page to learn about possible changes 5002 * that were missed. We identify persistent discovery controllers by 5003 * checking that they started once before, hence are reconnecting back. 5004 */ 5005 if (test_and_set_bit(NVME_CTRL_STARTED_ONCE, &ctrl->flags) && 5006 nvme_discovery_ctrl(ctrl)) 5007 nvme_change_uevent(ctrl, "NVME_EVENT=rediscover"); 5008 5009 if (ctrl->queue_count > 1) { 5010 nvme_queue_scan(ctrl); 5011 nvme_unquiesce_io_queues(ctrl); 5012 nvme_mpath_update(ctrl); 5013 } 5014 5015 nvme_change_uevent(ctrl, "NVME_EVENT=connected"); 5016 } 5017 EXPORT_SYMBOL_GPL(nvme_start_ctrl); 5018 5019 void nvme_uninit_ctrl(struct nvme_ctrl *ctrl) 5020 { 5021 nvme_hwmon_exit(ctrl); 5022 nvme_fault_inject_fini(&ctrl->fault_inject); 5023 dev_pm_qos_hide_latency_tolerance(ctrl->device); 5024 cdev_device_del(&ctrl->cdev, ctrl->device); 5025 nvme_put_ctrl(ctrl); 5026 } 5027 EXPORT_SYMBOL_GPL(nvme_uninit_ctrl); 5028 5029 static void nvme_free_cels(struct nvme_ctrl *ctrl) 5030 { 5031 struct nvme_effects_log *cel; 5032 unsigned long i; 5033 5034 xa_for_each(&ctrl->cels, i, cel) { 5035 xa_erase(&ctrl->cels, i); 5036 kfree(cel); 5037 } 5038 5039 xa_destroy(&ctrl->cels); 5040 } 5041 5042 static void nvme_free_ctrl(struct device *dev) 5043 { 5044 struct nvme_ctrl *ctrl = 5045 container_of(dev, struct nvme_ctrl, ctrl_device); 5046 struct nvme_subsystem *subsys = ctrl->subsys; 5047 5048 if (!subsys || ctrl->instance != subsys->instance) 5049 ida_free(&nvme_instance_ida, ctrl->instance); 5050 5051 nvme_free_cels(ctrl); 5052 nvme_mpath_uninit(ctrl); 5053 nvme_auth_stop(ctrl); 5054 nvme_auth_free(ctrl); 5055 __free_page(ctrl->discard_page); 5056 free_opal_dev(ctrl->opal_dev); 5057 5058 if (subsys) { 5059 mutex_lock(&nvme_subsystems_lock); 5060 list_del(&ctrl->subsys_entry); 5061 sysfs_remove_link(&subsys->dev.kobj, dev_name(ctrl->device)); 5062 mutex_unlock(&nvme_subsystems_lock); 5063 } 5064 5065 ctrl->ops->free_ctrl(ctrl); 5066 5067 if (subsys) 5068 nvme_put_subsystem(subsys); 5069 } 5070 5071 /* 5072 * Initialize a NVMe controller structures. This needs to be called during 5073 * earliest initialization so that we have the initialized structured around 5074 * during probing. 5075 */ 5076 int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev, 5077 const struct nvme_ctrl_ops *ops, unsigned long quirks) 5078 { 5079 int ret; 5080 5081 ctrl->state = NVME_CTRL_NEW; 5082 clear_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags); 5083 spin_lock_init(&ctrl->lock); 5084 mutex_init(&ctrl->scan_lock); 5085 INIT_LIST_HEAD(&ctrl->namespaces); 5086 xa_init(&ctrl->cels); 5087 init_rwsem(&ctrl->namespaces_rwsem); 5088 ctrl->dev = dev; 5089 ctrl->ops = ops; 5090 ctrl->quirks = quirks; 5091 ctrl->numa_node = NUMA_NO_NODE; 5092 INIT_WORK(&ctrl->scan_work, nvme_scan_work); 5093 INIT_WORK(&ctrl->async_event_work, nvme_async_event_work); 5094 INIT_WORK(&ctrl->fw_act_work, nvme_fw_act_work); 5095 INIT_WORK(&ctrl->delete_work, nvme_delete_ctrl_work); 5096 init_waitqueue_head(&ctrl->state_wq); 5097 5098 INIT_DELAYED_WORK(&ctrl->ka_work, nvme_keep_alive_work); 5099 INIT_DELAYED_WORK(&ctrl->failfast_work, nvme_failfast_work); 5100 memset(&ctrl->ka_cmd, 0, sizeof(ctrl->ka_cmd)); 5101 ctrl->ka_cmd.common.opcode = nvme_admin_keep_alive; 5102 5103 BUILD_BUG_ON(NVME_DSM_MAX_RANGES * sizeof(struct nvme_dsm_range) > 5104 PAGE_SIZE); 5105 ctrl->discard_page = alloc_page(GFP_KERNEL); 5106 if (!ctrl->discard_page) { 5107 ret = -ENOMEM; 5108 goto out; 5109 } 5110 5111 ret = ida_alloc(&nvme_instance_ida, GFP_KERNEL); 5112 if (ret < 0) 5113 goto out; 5114 ctrl->instance = ret; 5115 5116 device_initialize(&ctrl->ctrl_device); 5117 ctrl->device = &ctrl->ctrl_device; 5118 ctrl->device->devt = MKDEV(MAJOR(nvme_ctrl_base_chr_devt), 5119 ctrl->instance); 5120 ctrl->device->class = nvme_class; 5121 ctrl->device->parent = ctrl->dev; 5122 if (ops->dev_attr_groups) 5123 ctrl->device->groups = ops->dev_attr_groups; 5124 else 5125 ctrl->device->groups = nvme_dev_attr_groups; 5126 ctrl->device->release = nvme_free_ctrl; 5127 dev_set_drvdata(ctrl->device, ctrl); 5128 ret = dev_set_name(ctrl->device, "nvme%d", ctrl->instance); 5129 if (ret) 5130 goto out_release_instance; 5131 5132 nvme_get_ctrl(ctrl); 5133 cdev_init(&ctrl->cdev, &nvme_dev_fops); 5134 ctrl->cdev.owner = ops->module; 5135 ret = cdev_device_add(&ctrl->cdev, ctrl->device); 5136 if (ret) 5137 goto out_free_name; 5138 5139 /* 5140 * Initialize latency tolerance controls. The sysfs files won't 5141 * be visible to userspace unless the device actually supports APST. 5142 */ 5143 ctrl->device->power.set_latency_tolerance = nvme_set_latency_tolerance; 5144 dev_pm_qos_update_user_latency_tolerance(ctrl->device, 5145 min(default_ps_max_latency_us, (unsigned long)S32_MAX)); 5146 5147 nvme_fault_inject_init(&ctrl->fault_inject, dev_name(ctrl->device)); 5148 nvme_mpath_init_ctrl(ctrl); 5149 ret = nvme_auth_init_ctrl(ctrl); 5150 if (ret) 5151 goto out_free_cdev; 5152 5153 return 0; 5154 out_free_cdev: 5155 cdev_device_del(&ctrl->cdev, ctrl->device); 5156 out_free_name: 5157 nvme_put_ctrl(ctrl); 5158 kfree_const(ctrl->device->kobj.name); 5159 out_release_instance: 5160 ida_free(&nvme_instance_ida, ctrl->instance); 5161 out: 5162 if (ctrl->discard_page) 5163 __free_page(ctrl->discard_page); 5164 return ret; 5165 } 5166 EXPORT_SYMBOL_GPL(nvme_init_ctrl); 5167 5168 /* let I/O to all namespaces fail in preparation for surprise removal */ 5169 void nvme_mark_namespaces_dead(struct nvme_ctrl *ctrl) 5170 { 5171 struct nvme_ns *ns; 5172 5173 down_read(&ctrl->namespaces_rwsem); 5174 list_for_each_entry(ns, &ctrl->namespaces, list) 5175 blk_mark_disk_dead(ns->disk); 5176 up_read(&ctrl->namespaces_rwsem); 5177 } 5178 EXPORT_SYMBOL_GPL(nvme_mark_namespaces_dead); 5179 5180 void nvme_unfreeze(struct nvme_ctrl *ctrl) 5181 { 5182 struct nvme_ns *ns; 5183 5184 down_read(&ctrl->namespaces_rwsem); 5185 list_for_each_entry(ns, &ctrl->namespaces, list) 5186 blk_mq_unfreeze_queue(ns->queue); 5187 up_read(&ctrl->namespaces_rwsem); 5188 } 5189 EXPORT_SYMBOL_GPL(nvme_unfreeze); 5190 5191 int nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout) 5192 { 5193 struct nvme_ns *ns; 5194 5195 down_read(&ctrl->namespaces_rwsem); 5196 list_for_each_entry(ns, &ctrl->namespaces, list) { 5197 timeout = blk_mq_freeze_queue_wait_timeout(ns->queue, timeout); 5198 if (timeout <= 0) 5199 break; 5200 } 5201 up_read(&ctrl->namespaces_rwsem); 5202 return timeout; 5203 } 5204 EXPORT_SYMBOL_GPL(nvme_wait_freeze_timeout); 5205 5206 void nvme_wait_freeze(struct nvme_ctrl *ctrl) 5207 { 5208 struct nvme_ns *ns; 5209 5210 down_read(&ctrl->namespaces_rwsem); 5211 list_for_each_entry(ns, &ctrl->namespaces, list) 5212 blk_mq_freeze_queue_wait(ns->queue); 5213 up_read(&ctrl->namespaces_rwsem); 5214 } 5215 EXPORT_SYMBOL_GPL(nvme_wait_freeze); 5216 5217 void nvme_start_freeze(struct nvme_ctrl *ctrl) 5218 { 5219 struct nvme_ns *ns; 5220 5221 down_read(&ctrl->namespaces_rwsem); 5222 list_for_each_entry(ns, &ctrl->namespaces, list) 5223 blk_freeze_queue_start(ns->queue); 5224 up_read(&ctrl->namespaces_rwsem); 5225 } 5226 EXPORT_SYMBOL_GPL(nvme_start_freeze); 5227 5228 void nvme_quiesce_io_queues(struct nvme_ctrl *ctrl) 5229 { 5230 if (!ctrl->tagset) 5231 return; 5232 if (!test_and_set_bit(NVME_CTRL_STOPPED, &ctrl->flags)) 5233 blk_mq_quiesce_tagset(ctrl->tagset); 5234 else 5235 blk_mq_wait_quiesce_done(ctrl->tagset); 5236 } 5237 EXPORT_SYMBOL_GPL(nvme_quiesce_io_queues); 5238 5239 void nvme_unquiesce_io_queues(struct nvme_ctrl *ctrl) 5240 { 5241 if (!ctrl->tagset) 5242 return; 5243 if (test_and_clear_bit(NVME_CTRL_STOPPED, &ctrl->flags)) 5244 blk_mq_unquiesce_tagset(ctrl->tagset); 5245 } 5246 EXPORT_SYMBOL_GPL(nvme_unquiesce_io_queues); 5247 5248 void nvme_quiesce_admin_queue(struct nvme_ctrl *ctrl) 5249 { 5250 if (!test_and_set_bit(NVME_CTRL_ADMIN_Q_STOPPED, &ctrl->flags)) 5251 blk_mq_quiesce_queue(ctrl->admin_q); 5252 else 5253 blk_mq_wait_quiesce_done(ctrl->admin_q->tag_set); 5254 } 5255 EXPORT_SYMBOL_GPL(nvme_quiesce_admin_queue); 5256 5257 void nvme_unquiesce_admin_queue(struct nvme_ctrl *ctrl) 5258 { 5259 if (test_and_clear_bit(NVME_CTRL_ADMIN_Q_STOPPED, &ctrl->flags)) 5260 blk_mq_unquiesce_queue(ctrl->admin_q); 5261 } 5262 EXPORT_SYMBOL_GPL(nvme_unquiesce_admin_queue); 5263 5264 void nvme_sync_io_queues(struct nvme_ctrl *ctrl) 5265 { 5266 struct nvme_ns *ns; 5267 5268 down_read(&ctrl->namespaces_rwsem); 5269 list_for_each_entry(ns, &ctrl->namespaces, list) 5270 blk_sync_queue(ns->queue); 5271 up_read(&ctrl->namespaces_rwsem); 5272 } 5273 EXPORT_SYMBOL_GPL(nvme_sync_io_queues); 5274 5275 void nvme_sync_queues(struct nvme_ctrl *ctrl) 5276 { 5277 nvme_sync_io_queues(ctrl); 5278 if (ctrl->admin_q) 5279 blk_sync_queue(ctrl->admin_q); 5280 } 5281 EXPORT_SYMBOL_GPL(nvme_sync_queues); 5282 5283 struct nvme_ctrl *nvme_ctrl_from_file(struct file *file) 5284 { 5285 if (file->f_op != &nvme_dev_fops) 5286 return NULL; 5287 return file->private_data; 5288 } 5289 EXPORT_SYMBOL_NS_GPL(nvme_ctrl_from_file, NVME_TARGET_PASSTHRU); 5290 5291 /* 5292 * Check we didn't inadvertently grow the command structure sizes: 5293 */ 5294 static inline void _nvme_check_size(void) 5295 { 5296 BUILD_BUG_ON(sizeof(struct nvme_common_command) != 64); 5297 BUILD_BUG_ON(sizeof(struct nvme_rw_command) != 64); 5298 BUILD_BUG_ON(sizeof(struct nvme_identify) != 64); 5299 BUILD_BUG_ON(sizeof(struct nvme_features) != 64); 5300 BUILD_BUG_ON(sizeof(struct nvme_download_firmware) != 64); 5301 BUILD_BUG_ON(sizeof(struct nvme_format_cmd) != 64); 5302 BUILD_BUG_ON(sizeof(struct nvme_dsm_cmd) != 64); 5303 BUILD_BUG_ON(sizeof(struct nvme_write_zeroes_cmd) != 64); 5304 BUILD_BUG_ON(sizeof(struct nvme_abort_cmd) != 64); 5305 BUILD_BUG_ON(sizeof(struct nvme_get_log_page_command) != 64); 5306 BUILD_BUG_ON(sizeof(struct nvme_command) != 64); 5307 BUILD_BUG_ON(sizeof(struct nvme_id_ctrl) != NVME_IDENTIFY_DATA_SIZE); 5308 BUILD_BUG_ON(sizeof(struct nvme_id_ns) != NVME_IDENTIFY_DATA_SIZE); 5309 BUILD_BUG_ON(sizeof(struct nvme_id_ns_cs_indep) != 5310 NVME_IDENTIFY_DATA_SIZE); 5311 BUILD_BUG_ON(sizeof(struct nvme_id_ns_zns) != NVME_IDENTIFY_DATA_SIZE); 5312 BUILD_BUG_ON(sizeof(struct nvme_id_ns_nvm) != NVME_IDENTIFY_DATA_SIZE); 5313 BUILD_BUG_ON(sizeof(struct nvme_id_ctrl_zns) != NVME_IDENTIFY_DATA_SIZE); 5314 BUILD_BUG_ON(sizeof(struct nvme_id_ctrl_nvm) != NVME_IDENTIFY_DATA_SIZE); 5315 BUILD_BUG_ON(sizeof(struct nvme_lba_range_type) != 64); 5316 BUILD_BUG_ON(sizeof(struct nvme_smart_log) != 512); 5317 BUILD_BUG_ON(sizeof(struct nvme_dbbuf) != 64); 5318 BUILD_BUG_ON(sizeof(struct nvme_directive_cmd) != 64); 5319 BUILD_BUG_ON(sizeof(struct nvme_feat_host_behavior) != 512); 5320 } 5321 5322 5323 static int __init nvme_core_init(void) 5324 { 5325 int result = -ENOMEM; 5326 5327 _nvme_check_size(); 5328 5329 nvme_wq = alloc_workqueue("nvme-wq", 5330 WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_SYSFS, 0); 5331 if (!nvme_wq) 5332 goto out; 5333 5334 nvme_reset_wq = alloc_workqueue("nvme-reset-wq", 5335 WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_SYSFS, 0); 5336 if (!nvme_reset_wq) 5337 goto destroy_wq; 5338 5339 nvme_delete_wq = alloc_workqueue("nvme-delete-wq", 5340 WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_SYSFS, 0); 5341 if (!nvme_delete_wq) 5342 goto destroy_reset_wq; 5343 5344 result = alloc_chrdev_region(&nvme_ctrl_base_chr_devt, 0, 5345 NVME_MINORS, "nvme"); 5346 if (result < 0) 5347 goto destroy_delete_wq; 5348 5349 nvme_class = class_create(THIS_MODULE, "nvme"); 5350 if (IS_ERR(nvme_class)) { 5351 result = PTR_ERR(nvme_class); 5352 goto unregister_chrdev; 5353 } 5354 nvme_class->dev_uevent = nvme_class_uevent; 5355 5356 nvme_subsys_class = class_create(THIS_MODULE, "nvme-subsystem"); 5357 if (IS_ERR(nvme_subsys_class)) { 5358 result = PTR_ERR(nvme_subsys_class); 5359 goto destroy_class; 5360 } 5361 5362 result = alloc_chrdev_region(&nvme_ns_chr_devt, 0, NVME_MINORS, 5363 "nvme-generic"); 5364 if (result < 0) 5365 goto destroy_subsys_class; 5366 5367 nvme_ns_chr_class = class_create(THIS_MODULE, "nvme-generic"); 5368 if (IS_ERR(nvme_ns_chr_class)) { 5369 result = PTR_ERR(nvme_ns_chr_class); 5370 goto unregister_generic_ns; 5371 } 5372 5373 result = nvme_init_auth(); 5374 if (result) 5375 goto destroy_ns_chr; 5376 return 0; 5377 5378 destroy_ns_chr: 5379 class_destroy(nvme_ns_chr_class); 5380 unregister_generic_ns: 5381 unregister_chrdev_region(nvme_ns_chr_devt, NVME_MINORS); 5382 destroy_subsys_class: 5383 class_destroy(nvme_subsys_class); 5384 destroy_class: 5385 class_destroy(nvme_class); 5386 unregister_chrdev: 5387 unregister_chrdev_region(nvme_ctrl_base_chr_devt, NVME_MINORS); 5388 destroy_delete_wq: 5389 destroy_workqueue(nvme_delete_wq); 5390 destroy_reset_wq: 5391 destroy_workqueue(nvme_reset_wq); 5392 destroy_wq: 5393 destroy_workqueue(nvme_wq); 5394 out: 5395 return result; 5396 } 5397 5398 static void __exit nvme_core_exit(void) 5399 { 5400 nvme_exit_auth(); 5401 class_destroy(nvme_ns_chr_class); 5402 class_destroy(nvme_subsys_class); 5403 class_destroy(nvme_class); 5404 unregister_chrdev_region(nvme_ns_chr_devt, NVME_MINORS); 5405 unregister_chrdev_region(nvme_ctrl_base_chr_devt, NVME_MINORS); 5406 destroy_workqueue(nvme_delete_wq); 5407 destroy_workqueue(nvme_reset_wq); 5408 destroy_workqueue(nvme_wq); 5409 ida_destroy(&nvme_ns_chr_minor_ida); 5410 ida_destroy(&nvme_instance_ida); 5411 } 5412 5413 MODULE_LICENSE("GPL"); 5414 MODULE_VERSION("1.0"); 5415 module_init(nvme_core_init); 5416 module_exit(nvme_core_exit); 5417