1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * NVM Express device driver 4 * Copyright (c) 2011-2014, Intel Corporation. 5 */ 6 7 #include <linux/blkdev.h> 8 #include <linux/blk-mq.h> 9 #include <linux/blk-integrity.h> 10 #include <linux/compat.h> 11 #include <linux/delay.h> 12 #include <linux/errno.h> 13 #include <linux/hdreg.h> 14 #include <linux/kernel.h> 15 #include <linux/module.h> 16 #include <linux/backing-dev.h> 17 #include <linux/slab.h> 18 #include <linux/types.h> 19 #include <linux/pr.h> 20 #include <linux/ptrace.h> 21 #include <linux/nvme_ioctl.h> 22 #include <linux/pm_qos.h> 23 #include <asm/unaligned.h> 24 25 #include "nvme.h" 26 #include "fabrics.h" 27 #include <linux/nvme-auth.h> 28 29 #define CREATE_TRACE_POINTS 30 #include "trace.h" 31 32 #define NVME_MINORS (1U << MINORBITS) 33 34 struct nvme_ns_info { 35 struct nvme_ns_ids ids; 36 u32 nsid; 37 __le32 anagrpid; 38 bool is_shared; 39 bool is_readonly; 40 bool is_ready; 41 bool is_removed; 42 }; 43 44 unsigned int admin_timeout = 60; 45 module_param(admin_timeout, uint, 0644); 46 MODULE_PARM_DESC(admin_timeout, "timeout in seconds for admin commands"); 47 EXPORT_SYMBOL_GPL(admin_timeout); 48 49 unsigned int nvme_io_timeout = 30; 50 module_param_named(io_timeout, nvme_io_timeout, uint, 0644); 51 MODULE_PARM_DESC(io_timeout, "timeout in seconds for I/O"); 52 EXPORT_SYMBOL_GPL(nvme_io_timeout); 53 54 static unsigned char shutdown_timeout = 5; 55 module_param(shutdown_timeout, byte, 0644); 56 MODULE_PARM_DESC(shutdown_timeout, "timeout in seconds for controller shutdown"); 57 58 static u8 nvme_max_retries = 5; 59 module_param_named(max_retries, nvme_max_retries, byte, 0644); 60 MODULE_PARM_DESC(max_retries, "max number of retries a command may have"); 61 62 static unsigned long default_ps_max_latency_us = 100000; 63 module_param(default_ps_max_latency_us, ulong, 0644); 64 MODULE_PARM_DESC(default_ps_max_latency_us, 65 "max power saving latency for new devices; use PM QOS to change per device"); 66 67 static bool force_apst; 68 module_param(force_apst, bool, 0644); 69 MODULE_PARM_DESC(force_apst, "allow APST for newly enumerated devices even if quirked off"); 70 71 static unsigned long apst_primary_timeout_ms = 100; 72 module_param(apst_primary_timeout_ms, ulong, 0644); 73 MODULE_PARM_DESC(apst_primary_timeout_ms, 74 "primary APST timeout in ms"); 75 76 static unsigned long apst_secondary_timeout_ms = 2000; 77 module_param(apst_secondary_timeout_ms, ulong, 0644); 78 MODULE_PARM_DESC(apst_secondary_timeout_ms, 79 "secondary APST timeout in ms"); 80 81 static unsigned long apst_primary_latency_tol_us = 15000; 82 module_param(apst_primary_latency_tol_us, ulong, 0644); 83 MODULE_PARM_DESC(apst_primary_latency_tol_us, 84 "primary APST latency tolerance in us"); 85 86 static unsigned long apst_secondary_latency_tol_us = 100000; 87 module_param(apst_secondary_latency_tol_us, ulong, 0644); 88 MODULE_PARM_DESC(apst_secondary_latency_tol_us, 89 "secondary APST latency tolerance in us"); 90 91 /* 92 * nvme_wq - hosts nvme related works that are not reset or delete 93 * nvme_reset_wq - hosts nvme reset works 94 * nvme_delete_wq - hosts nvme delete works 95 * 96 * nvme_wq will host works such as scan, aen handling, fw activation, 97 * keep-alive, periodic reconnects etc. nvme_reset_wq 98 * runs reset works which also flush works hosted on nvme_wq for 99 * serialization purposes. nvme_delete_wq host controller deletion 100 * works which flush reset works for serialization. 101 */ 102 struct workqueue_struct *nvme_wq; 103 EXPORT_SYMBOL_GPL(nvme_wq); 104 105 struct workqueue_struct *nvme_reset_wq; 106 EXPORT_SYMBOL_GPL(nvme_reset_wq); 107 108 struct workqueue_struct *nvme_delete_wq; 109 EXPORT_SYMBOL_GPL(nvme_delete_wq); 110 111 static LIST_HEAD(nvme_subsystems); 112 static DEFINE_MUTEX(nvme_subsystems_lock); 113 114 static DEFINE_IDA(nvme_instance_ida); 115 static dev_t nvme_ctrl_base_chr_devt; 116 static struct class *nvme_class; 117 static struct class *nvme_subsys_class; 118 119 static DEFINE_IDA(nvme_ns_chr_minor_ida); 120 static dev_t nvme_ns_chr_devt; 121 static struct class *nvme_ns_chr_class; 122 123 static void nvme_put_subsystem(struct nvme_subsystem *subsys); 124 static void nvme_remove_invalid_namespaces(struct nvme_ctrl *ctrl, 125 unsigned nsid); 126 static void nvme_update_keep_alive(struct nvme_ctrl *ctrl, 127 struct nvme_command *cmd); 128 129 void nvme_queue_scan(struct nvme_ctrl *ctrl) 130 { 131 /* 132 * Only new queue scan work when admin and IO queues are both alive 133 */ 134 if (nvme_ctrl_state(ctrl) == NVME_CTRL_LIVE && ctrl->tagset) 135 queue_work(nvme_wq, &ctrl->scan_work); 136 } 137 138 /* 139 * Use this function to proceed with scheduling reset_work for a controller 140 * that had previously been set to the resetting state. This is intended for 141 * code paths that can't be interrupted by other reset attempts. A hot removal 142 * may prevent this from succeeding. 143 */ 144 int nvme_try_sched_reset(struct nvme_ctrl *ctrl) 145 { 146 if (nvme_ctrl_state(ctrl) != NVME_CTRL_RESETTING) 147 return -EBUSY; 148 if (!queue_work(nvme_reset_wq, &ctrl->reset_work)) 149 return -EBUSY; 150 return 0; 151 } 152 EXPORT_SYMBOL_GPL(nvme_try_sched_reset); 153 154 static void nvme_failfast_work(struct work_struct *work) 155 { 156 struct nvme_ctrl *ctrl = container_of(to_delayed_work(work), 157 struct nvme_ctrl, failfast_work); 158 159 if (nvme_ctrl_state(ctrl) != NVME_CTRL_CONNECTING) 160 return; 161 162 set_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags); 163 dev_info(ctrl->device, "failfast expired\n"); 164 nvme_kick_requeue_lists(ctrl); 165 } 166 167 static inline void nvme_start_failfast_work(struct nvme_ctrl *ctrl) 168 { 169 if (!ctrl->opts || ctrl->opts->fast_io_fail_tmo == -1) 170 return; 171 172 schedule_delayed_work(&ctrl->failfast_work, 173 ctrl->opts->fast_io_fail_tmo * HZ); 174 } 175 176 static inline void nvme_stop_failfast_work(struct nvme_ctrl *ctrl) 177 { 178 if (!ctrl->opts) 179 return; 180 181 cancel_delayed_work_sync(&ctrl->failfast_work); 182 clear_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags); 183 } 184 185 186 int nvme_reset_ctrl(struct nvme_ctrl *ctrl) 187 { 188 if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING)) 189 return -EBUSY; 190 if (!queue_work(nvme_reset_wq, &ctrl->reset_work)) 191 return -EBUSY; 192 return 0; 193 } 194 EXPORT_SYMBOL_GPL(nvme_reset_ctrl); 195 196 int nvme_reset_ctrl_sync(struct nvme_ctrl *ctrl) 197 { 198 int ret; 199 200 ret = nvme_reset_ctrl(ctrl); 201 if (!ret) { 202 flush_work(&ctrl->reset_work); 203 if (nvme_ctrl_state(ctrl) != NVME_CTRL_LIVE) 204 ret = -ENETRESET; 205 } 206 207 return ret; 208 } 209 210 static void nvme_do_delete_ctrl(struct nvme_ctrl *ctrl) 211 { 212 dev_info(ctrl->device, 213 "Removing ctrl: NQN \"%s\"\n", nvmf_ctrl_subsysnqn(ctrl)); 214 215 flush_work(&ctrl->reset_work); 216 nvme_stop_ctrl(ctrl); 217 nvme_remove_namespaces(ctrl); 218 ctrl->ops->delete_ctrl(ctrl); 219 nvme_uninit_ctrl(ctrl); 220 } 221 222 static void nvme_delete_ctrl_work(struct work_struct *work) 223 { 224 struct nvme_ctrl *ctrl = 225 container_of(work, struct nvme_ctrl, delete_work); 226 227 nvme_do_delete_ctrl(ctrl); 228 } 229 230 int nvme_delete_ctrl(struct nvme_ctrl *ctrl) 231 { 232 if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_DELETING)) 233 return -EBUSY; 234 if (!queue_work(nvme_delete_wq, &ctrl->delete_work)) 235 return -EBUSY; 236 return 0; 237 } 238 EXPORT_SYMBOL_GPL(nvme_delete_ctrl); 239 240 void nvme_delete_ctrl_sync(struct nvme_ctrl *ctrl) 241 { 242 /* 243 * Keep a reference until nvme_do_delete_ctrl() complete, 244 * since ->delete_ctrl can free the controller. 245 */ 246 nvme_get_ctrl(ctrl); 247 if (nvme_change_ctrl_state(ctrl, NVME_CTRL_DELETING)) 248 nvme_do_delete_ctrl(ctrl); 249 nvme_put_ctrl(ctrl); 250 } 251 252 static blk_status_t nvme_error_status(u16 status) 253 { 254 switch (status & 0x7ff) { 255 case NVME_SC_SUCCESS: 256 return BLK_STS_OK; 257 case NVME_SC_CAP_EXCEEDED: 258 return BLK_STS_NOSPC; 259 case NVME_SC_LBA_RANGE: 260 case NVME_SC_CMD_INTERRUPTED: 261 case NVME_SC_NS_NOT_READY: 262 return BLK_STS_TARGET; 263 case NVME_SC_BAD_ATTRIBUTES: 264 case NVME_SC_ONCS_NOT_SUPPORTED: 265 case NVME_SC_INVALID_OPCODE: 266 case NVME_SC_INVALID_FIELD: 267 case NVME_SC_INVALID_NS: 268 return BLK_STS_NOTSUPP; 269 case NVME_SC_WRITE_FAULT: 270 case NVME_SC_READ_ERROR: 271 case NVME_SC_UNWRITTEN_BLOCK: 272 case NVME_SC_ACCESS_DENIED: 273 case NVME_SC_READ_ONLY: 274 case NVME_SC_COMPARE_FAILED: 275 return BLK_STS_MEDIUM; 276 case NVME_SC_GUARD_CHECK: 277 case NVME_SC_APPTAG_CHECK: 278 case NVME_SC_REFTAG_CHECK: 279 case NVME_SC_INVALID_PI: 280 return BLK_STS_PROTECTION; 281 case NVME_SC_RESERVATION_CONFLICT: 282 return BLK_STS_RESV_CONFLICT; 283 case NVME_SC_HOST_PATH_ERROR: 284 return BLK_STS_TRANSPORT; 285 case NVME_SC_ZONE_TOO_MANY_ACTIVE: 286 return BLK_STS_ZONE_ACTIVE_RESOURCE; 287 case NVME_SC_ZONE_TOO_MANY_OPEN: 288 return BLK_STS_ZONE_OPEN_RESOURCE; 289 default: 290 return BLK_STS_IOERR; 291 } 292 } 293 294 static void nvme_retry_req(struct request *req) 295 { 296 unsigned long delay = 0; 297 u16 crd; 298 299 /* The mask and shift result must be <= 3 */ 300 crd = (nvme_req(req)->status & NVME_SC_CRD) >> 11; 301 if (crd) 302 delay = nvme_req(req)->ctrl->crdt[crd - 1] * 100; 303 304 nvme_req(req)->retries++; 305 blk_mq_requeue_request(req, false); 306 blk_mq_delay_kick_requeue_list(req->q, delay); 307 } 308 309 static void nvme_log_error(struct request *req) 310 { 311 struct nvme_ns *ns = req->q->queuedata; 312 struct nvme_request *nr = nvme_req(req); 313 314 if (ns) { 315 pr_err_ratelimited("%s: %s(0x%x) @ LBA %llu, %llu blocks, %s (sct 0x%x / sc 0x%x) %s%s\n", 316 ns->disk ? ns->disk->disk_name : "?", 317 nvme_get_opcode_str(nr->cmd->common.opcode), 318 nr->cmd->common.opcode, 319 (unsigned long long)nvme_sect_to_lba(ns, blk_rq_pos(req)), 320 (unsigned long long)blk_rq_bytes(req) >> ns->lba_shift, 321 nvme_get_error_status_str(nr->status), 322 nr->status >> 8 & 7, /* Status Code Type */ 323 nr->status & 0xff, /* Status Code */ 324 nr->status & NVME_SC_MORE ? "MORE " : "", 325 nr->status & NVME_SC_DNR ? "DNR " : ""); 326 return; 327 } 328 329 pr_err_ratelimited("%s: %s(0x%x), %s (sct 0x%x / sc 0x%x) %s%s\n", 330 dev_name(nr->ctrl->device), 331 nvme_get_admin_opcode_str(nr->cmd->common.opcode), 332 nr->cmd->common.opcode, 333 nvme_get_error_status_str(nr->status), 334 nr->status >> 8 & 7, /* Status Code Type */ 335 nr->status & 0xff, /* Status Code */ 336 nr->status & NVME_SC_MORE ? "MORE " : "", 337 nr->status & NVME_SC_DNR ? "DNR " : ""); 338 } 339 340 enum nvme_disposition { 341 COMPLETE, 342 RETRY, 343 FAILOVER, 344 AUTHENTICATE, 345 }; 346 347 static inline enum nvme_disposition nvme_decide_disposition(struct request *req) 348 { 349 if (likely(nvme_req(req)->status == 0)) 350 return COMPLETE; 351 352 if ((nvme_req(req)->status & 0x7ff) == NVME_SC_AUTH_REQUIRED) 353 return AUTHENTICATE; 354 355 if (blk_noretry_request(req) || 356 (nvme_req(req)->status & NVME_SC_DNR) || 357 nvme_req(req)->retries >= nvme_max_retries) 358 return COMPLETE; 359 360 if (req->cmd_flags & REQ_NVME_MPATH) { 361 if (nvme_is_path_error(nvme_req(req)->status) || 362 blk_queue_dying(req->q)) 363 return FAILOVER; 364 } else { 365 if (blk_queue_dying(req->q)) 366 return COMPLETE; 367 } 368 369 return RETRY; 370 } 371 372 static inline void nvme_end_req_zoned(struct request *req) 373 { 374 if (IS_ENABLED(CONFIG_BLK_DEV_ZONED) && 375 req_op(req) == REQ_OP_ZONE_APPEND) 376 req->__sector = nvme_lba_to_sect(req->q->queuedata, 377 le64_to_cpu(nvme_req(req)->result.u64)); 378 } 379 380 static inline void nvme_end_req(struct request *req) 381 { 382 blk_status_t status = nvme_error_status(nvme_req(req)->status); 383 384 if (unlikely(nvme_req(req)->status && !(req->rq_flags & RQF_QUIET))) 385 nvme_log_error(req); 386 nvme_end_req_zoned(req); 387 nvme_trace_bio_complete(req); 388 if (req->cmd_flags & REQ_NVME_MPATH) 389 nvme_mpath_end_request(req); 390 blk_mq_end_request(req, status); 391 } 392 393 void nvme_complete_rq(struct request *req) 394 { 395 struct nvme_ctrl *ctrl = nvme_req(req)->ctrl; 396 397 trace_nvme_complete_rq(req); 398 nvme_cleanup_cmd(req); 399 400 /* 401 * Completions of long-running commands should not be able to 402 * defer sending of periodic keep alives, since the controller 403 * may have completed processing such commands a long time ago 404 * (arbitrarily close to command submission time). 405 * req->deadline - req->timeout is the command submission time 406 * in jiffies. 407 */ 408 if (ctrl->kas && 409 req->deadline - req->timeout >= ctrl->ka_last_check_time) 410 ctrl->comp_seen = true; 411 412 switch (nvme_decide_disposition(req)) { 413 case COMPLETE: 414 nvme_end_req(req); 415 return; 416 case RETRY: 417 nvme_retry_req(req); 418 return; 419 case FAILOVER: 420 nvme_failover_req(req); 421 return; 422 case AUTHENTICATE: 423 #ifdef CONFIG_NVME_AUTH 424 queue_work(nvme_wq, &ctrl->dhchap_auth_work); 425 nvme_retry_req(req); 426 #else 427 nvme_end_req(req); 428 #endif 429 return; 430 } 431 } 432 EXPORT_SYMBOL_GPL(nvme_complete_rq); 433 434 void nvme_complete_batch_req(struct request *req) 435 { 436 trace_nvme_complete_rq(req); 437 nvme_cleanup_cmd(req); 438 nvme_end_req_zoned(req); 439 } 440 EXPORT_SYMBOL_GPL(nvme_complete_batch_req); 441 442 /* 443 * Called to unwind from ->queue_rq on a failed command submission so that the 444 * multipathing code gets called to potentially failover to another path. 445 * The caller needs to unwind all transport specific resource allocations and 446 * must return propagate the return value. 447 */ 448 blk_status_t nvme_host_path_error(struct request *req) 449 { 450 nvme_req(req)->status = NVME_SC_HOST_PATH_ERROR; 451 blk_mq_set_request_complete(req); 452 nvme_complete_rq(req); 453 return BLK_STS_OK; 454 } 455 EXPORT_SYMBOL_GPL(nvme_host_path_error); 456 457 bool nvme_cancel_request(struct request *req, void *data) 458 { 459 dev_dbg_ratelimited(((struct nvme_ctrl *) data)->device, 460 "Cancelling I/O %d", req->tag); 461 462 /* don't abort one completed or idle request */ 463 if (blk_mq_rq_state(req) != MQ_RQ_IN_FLIGHT) 464 return true; 465 466 nvme_req(req)->status = NVME_SC_HOST_ABORTED_CMD; 467 nvme_req(req)->flags |= NVME_REQ_CANCELLED; 468 blk_mq_complete_request(req); 469 return true; 470 } 471 EXPORT_SYMBOL_GPL(nvme_cancel_request); 472 473 void nvme_cancel_tagset(struct nvme_ctrl *ctrl) 474 { 475 if (ctrl->tagset) { 476 blk_mq_tagset_busy_iter(ctrl->tagset, 477 nvme_cancel_request, ctrl); 478 blk_mq_tagset_wait_completed_request(ctrl->tagset); 479 } 480 } 481 EXPORT_SYMBOL_GPL(nvme_cancel_tagset); 482 483 void nvme_cancel_admin_tagset(struct nvme_ctrl *ctrl) 484 { 485 if (ctrl->admin_tagset) { 486 blk_mq_tagset_busy_iter(ctrl->admin_tagset, 487 nvme_cancel_request, ctrl); 488 blk_mq_tagset_wait_completed_request(ctrl->admin_tagset); 489 } 490 } 491 EXPORT_SYMBOL_GPL(nvme_cancel_admin_tagset); 492 493 bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl, 494 enum nvme_ctrl_state new_state) 495 { 496 enum nvme_ctrl_state old_state; 497 unsigned long flags; 498 bool changed = false; 499 500 spin_lock_irqsave(&ctrl->lock, flags); 501 502 old_state = nvme_ctrl_state(ctrl); 503 switch (new_state) { 504 case NVME_CTRL_LIVE: 505 switch (old_state) { 506 case NVME_CTRL_NEW: 507 case NVME_CTRL_RESETTING: 508 case NVME_CTRL_CONNECTING: 509 changed = true; 510 fallthrough; 511 default: 512 break; 513 } 514 break; 515 case NVME_CTRL_RESETTING: 516 switch (old_state) { 517 case NVME_CTRL_NEW: 518 case NVME_CTRL_LIVE: 519 changed = true; 520 fallthrough; 521 default: 522 break; 523 } 524 break; 525 case NVME_CTRL_CONNECTING: 526 switch (old_state) { 527 case NVME_CTRL_NEW: 528 case NVME_CTRL_RESETTING: 529 changed = true; 530 fallthrough; 531 default: 532 break; 533 } 534 break; 535 case NVME_CTRL_DELETING: 536 switch (old_state) { 537 case NVME_CTRL_LIVE: 538 case NVME_CTRL_RESETTING: 539 case NVME_CTRL_CONNECTING: 540 changed = true; 541 fallthrough; 542 default: 543 break; 544 } 545 break; 546 case NVME_CTRL_DELETING_NOIO: 547 switch (old_state) { 548 case NVME_CTRL_DELETING: 549 case NVME_CTRL_DEAD: 550 changed = true; 551 fallthrough; 552 default: 553 break; 554 } 555 break; 556 case NVME_CTRL_DEAD: 557 switch (old_state) { 558 case NVME_CTRL_DELETING: 559 changed = true; 560 fallthrough; 561 default: 562 break; 563 } 564 break; 565 default: 566 break; 567 } 568 569 if (changed) { 570 WRITE_ONCE(ctrl->state, new_state); 571 wake_up_all(&ctrl->state_wq); 572 } 573 574 spin_unlock_irqrestore(&ctrl->lock, flags); 575 if (!changed) 576 return false; 577 578 if (new_state == NVME_CTRL_LIVE) { 579 if (old_state == NVME_CTRL_CONNECTING) 580 nvme_stop_failfast_work(ctrl); 581 nvme_kick_requeue_lists(ctrl); 582 } else if (new_state == NVME_CTRL_CONNECTING && 583 old_state == NVME_CTRL_RESETTING) { 584 nvme_start_failfast_work(ctrl); 585 } 586 return changed; 587 } 588 EXPORT_SYMBOL_GPL(nvme_change_ctrl_state); 589 590 /* 591 * Returns true for sink states that can't ever transition back to live. 592 */ 593 static bool nvme_state_terminal(struct nvme_ctrl *ctrl) 594 { 595 switch (nvme_ctrl_state(ctrl)) { 596 case NVME_CTRL_NEW: 597 case NVME_CTRL_LIVE: 598 case NVME_CTRL_RESETTING: 599 case NVME_CTRL_CONNECTING: 600 return false; 601 case NVME_CTRL_DELETING: 602 case NVME_CTRL_DELETING_NOIO: 603 case NVME_CTRL_DEAD: 604 return true; 605 default: 606 WARN_ONCE(1, "Unhandled ctrl state:%d", ctrl->state); 607 return true; 608 } 609 } 610 611 /* 612 * Waits for the controller state to be resetting, or returns false if it is 613 * not possible to ever transition to that state. 614 */ 615 bool nvme_wait_reset(struct nvme_ctrl *ctrl) 616 { 617 wait_event(ctrl->state_wq, 618 nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING) || 619 nvme_state_terminal(ctrl)); 620 return nvme_ctrl_state(ctrl) == NVME_CTRL_RESETTING; 621 } 622 EXPORT_SYMBOL_GPL(nvme_wait_reset); 623 624 static void nvme_free_ns_head(struct kref *ref) 625 { 626 struct nvme_ns_head *head = 627 container_of(ref, struct nvme_ns_head, ref); 628 629 nvme_mpath_remove_disk(head); 630 ida_free(&head->subsys->ns_ida, head->instance); 631 cleanup_srcu_struct(&head->srcu); 632 nvme_put_subsystem(head->subsys); 633 kfree(head); 634 } 635 636 bool nvme_tryget_ns_head(struct nvme_ns_head *head) 637 { 638 return kref_get_unless_zero(&head->ref); 639 } 640 641 void nvme_put_ns_head(struct nvme_ns_head *head) 642 { 643 kref_put(&head->ref, nvme_free_ns_head); 644 } 645 646 static void nvme_free_ns(struct kref *kref) 647 { 648 struct nvme_ns *ns = container_of(kref, struct nvme_ns, kref); 649 650 put_disk(ns->disk); 651 nvme_put_ns_head(ns->head); 652 nvme_put_ctrl(ns->ctrl); 653 kfree(ns); 654 } 655 656 static inline bool nvme_get_ns(struct nvme_ns *ns) 657 { 658 return kref_get_unless_zero(&ns->kref); 659 } 660 661 void nvme_put_ns(struct nvme_ns *ns) 662 { 663 kref_put(&ns->kref, nvme_free_ns); 664 } 665 EXPORT_SYMBOL_NS_GPL(nvme_put_ns, NVME_TARGET_PASSTHRU); 666 667 static inline void nvme_clear_nvme_request(struct request *req) 668 { 669 nvme_req(req)->status = 0; 670 nvme_req(req)->retries = 0; 671 nvme_req(req)->flags = 0; 672 req->rq_flags |= RQF_DONTPREP; 673 } 674 675 /* initialize a passthrough request */ 676 void nvme_init_request(struct request *req, struct nvme_command *cmd) 677 { 678 if (req->q->queuedata) 679 req->timeout = NVME_IO_TIMEOUT; 680 else /* no queuedata implies admin queue */ 681 req->timeout = NVME_ADMIN_TIMEOUT; 682 683 /* passthru commands should let the driver set the SGL flags */ 684 cmd->common.flags &= ~NVME_CMD_SGL_ALL; 685 686 req->cmd_flags |= REQ_FAILFAST_DRIVER; 687 if (req->mq_hctx->type == HCTX_TYPE_POLL) 688 req->cmd_flags |= REQ_POLLED; 689 nvme_clear_nvme_request(req); 690 req->rq_flags |= RQF_QUIET; 691 memcpy(nvme_req(req)->cmd, cmd, sizeof(*cmd)); 692 } 693 EXPORT_SYMBOL_GPL(nvme_init_request); 694 695 /* 696 * For something we're not in a state to send to the device the default action 697 * is to busy it and retry it after the controller state is recovered. However, 698 * if the controller is deleting or if anything is marked for failfast or 699 * nvme multipath it is immediately failed. 700 * 701 * Note: commands used to initialize the controller will be marked for failfast. 702 * Note: nvme cli/ioctl commands are marked for failfast. 703 */ 704 blk_status_t nvme_fail_nonready_command(struct nvme_ctrl *ctrl, 705 struct request *rq) 706 { 707 enum nvme_ctrl_state state = nvme_ctrl_state(ctrl); 708 709 if (state != NVME_CTRL_DELETING_NOIO && 710 state != NVME_CTRL_DELETING && 711 state != NVME_CTRL_DEAD && 712 !test_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags) && 713 !blk_noretry_request(rq) && !(rq->cmd_flags & REQ_NVME_MPATH)) 714 return BLK_STS_RESOURCE; 715 return nvme_host_path_error(rq); 716 } 717 EXPORT_SYMBOL_GPL(nvme_fail_nonready_command); 718 719 bool __nvme_check_ready(struct nvme_ctrl *ctrl, struct request *rq, 720 bool queue_live) 721 { 722 struct nvme_request *req = nvme_req(rq); 723 724 /* 725 * currently we have a problem sending passthru commands 726 * on the admin_q if the controller is not LIVE because we can't 727 * make sure that they are going out after the admin connect, 728 * controller enable and/or other commands in the initialization 729 * sequence. until the controller will be LIVE, fail with 730 * BLK_STS_RESOURCE so that they will be rescheduled. 731 */ 732 if (rq->q == ctrl->admin_q && (req->flags & NVME_REQ_USERCMD)) 733 return false; 734 735 if (ctrl->ops->flags & NVME_F_FABRICS) { 736 /* 737 * Only allow commands on a live queue, except for the connect 738 * command, which is require to set the queue live in the 739 * appropinquate states. 740 */ 741 switch (nvme_ctrl_state(ctrl)) { 742 case NVME_CTRL_CONNECTING: 743 if (blk_rq_is_passthrough(rq) && nvme_is_fabrics(req->cmd) && 744 (req->cmd->fabrics.fctype == nvme_fabrics_type_connect || 745 req->cmd->fabrics.fctype == nvme_fabrics_type_auth_send || 746 req->cmd->fabrics.fctype == nvme_fabrics_type_auth_receive)) 747 return true; 748 break; 749 default: 750 break; 751 case NVME_CTRL_DEAD: 752 return false; 753 } 754 } 755 756 return queue_live; 757 } 758 EXPORT_SYMBOL_GPL(__nvme_check_ready); 759 760 static inline void nvme_setup_flush(struct nvme_ns *ns, 761 struct nvme_command *cmnd) 762 { 763 memset(cmnd, 0, sizeof(*cmnd)); 764 cmnd->common.opcode = nvme_cmd_flush; 765 cmnd->common.nsid = cpu_to_le32(ns->head->ns_id); 766 } 767 768 static blk_status_t nvme_setup_discard(struct nvme_ns *ns, struct request *req, 769 struct nvme_command *cmnd) 770 { 771 unsigned short segments = blk_rq_nr_discard_segments(req), n = 0; 772 struct nvme_dsm_range *range; 773 struct bio *bio; 774 775 /* 776 * Some devices do not consider the DSM 'Number of Ranges' field when 777 * determining how much data to DMA. Always allocate memory for maximum 778 * number of segments to prevent device reading beyond end of buffer. 779 */ 780 static const size_t alloc_size = sizeof(*range) * NVME_DSM_MAX_RANGES; 781 782 range = kzalloc(alloc_size, GFP_ATOMIC | __GFP_NOWARN); 783 if (!range) { 784 /* 785 * If we fail allocation our range, fallback to the controller 786 * discard page. If that's also busy, it's safe to return 787 * busy, as we know we can make progress once that's freed. 788 */ 789 if (test_and_set_bit_lock(0, &ns->ctrl->discard_page_busy)) 790 return BLK_STS_RESOURCE; 791 792 range = page_address(ns->ctrl->discard_page); 793 } 794 795 if (queue_max_discard_segments(req->q) == 1) { 796 u64 slba = nvme_sect_to_lba(ns, blk_rq_pos(req)); 797 u32 nlb = blk_rq_sectors(req) >> (ns->lba_shift - 9); 798 799 range[0].cattr = cpu_to_le32(0); 800 range[0].nlb = cpu_to_le32(nlb); 801 range[0].slba = cpu_to_le64(slba); 802 n = 1; 803 } else { 804 __rq_for_each_bio(bio, req) { 805 u64 slba = nvme_sect_to_lba(ns, bio->bi_iter.bi_sector); 806 u32 nlb = bio->bi_iter.bi_size >> ns->lba_shift; 807 808 if (n < segments) { 809 range[n].cattr = cpu_to_le32(0); 810 range[n].nlb = cpu_to_le32(nlb); 811 range[n].slba = cpu_to_le64(slba); 812 } 813 n++; 814 } 815 } 816 817 if (WARN_ON_ONCE(n != segments)) { 818 if (virt_to_page(range) == ns->ctrl->discard_page) 819 clear_bit_unlock(0, &ns->ctrl->discard_page_busy); 820 else 821 kfree(range); 822 return BLK_STS_IOERR; 823 } 824 825 memset(cmnd, 0, sizeof(*cmnd)); 826 cmnd->dsm.opcode = nvme_cmd_dsm; 827 cmnd->dsm.nsid = cpu_to_le32(ns->head->ns_id); 828 cmnd->dsm.nr = cpu_to_le32(segments - 1); 829 cmnd->dsm.attributes = cpu_to_le32(NVME_DSMGMT_AD); 830 831 bvec_set_virt(&req->special_vec, range, alloc_size); 832 req->rq_flags |= RQF_SPECIAL_PAYLOAD; 833 834 return BLK_STS_OK; 835 } 836 837 static void nvme_set_ref_tag(struct nvme_ns *ns, struct nvme_command *cmnd, 838 struct request *req) 839 { 840 u32 upper, lower; 841 u64 ref48; 842 843 /* both rw and write zeroes share the same reftag format */ 844 switch (ns->guard_type) { 845 case NVME_NVM_NS_16B_GUARD: 846 cmnd->rw.reftag = cpu_to_le32(t10_pi_ref_tag(req)); 847 break; 848 case NVME_NVM_NS_64B_GUARD: 849 ref48 = ext_pi_ref_tag(req); 850 lower = lower_32_bits(ref48); 851 upper = upper_32_bits(ref48); 852 853 cmnd->rw.reftag = cpu_to_le32(lower); 854 cmnd->rw.cdw3 = cpu_to_le32(upper); 855 break; 856 default: 857 break; 858 } 859 } 860 861 static inline blk_status_t nvme_setup_write_zeroes(struct nvme_ns *ns, 862 struct request *req, struct nvme_command *cmnd) 863 { 864 memset(cmnd, 0, sizeof(*cmnd)); 865 866 if (ns->ctrl->quirks & NVME_QUIRK_DEALLOCATE_ZEROES) 867 return nvme_setup_discard(ns, req, cmnd); 868 869 cmnd->write_zeroes.opcode = nvme_cmd_write_zeroes; 870 cmnd->write_zeroes.nsid = cpu_to_le32(ns->head->ns_id); 871 cmnd->write_zeroes.slba = 872 cpu_to_le64(nvme_sect_to_lba(ns, blk_rq_pos(req))); 873 cmnd->write_zeroes.length = 874 cpu_to_le16((blk_rq_bytes(req) >> ns->lba_shift) - 1); 875 876 if (!(req->cmd_flags & REQ_NOUNMAP) && (ns->features & NVME_NS_DEAC)) 877 cmnd->write_zeroes.control |= cpu_to_le16(NVME_WZ_DEAC); 878 879 if (nvme_ns_has_pi(ns)) { 880 cmnd->write_zeroes.control |= cpu_to_le16(NVME_RW_PRINFO_PRACT); 881 882 switch (ns->pi_type) { 883 case NVME_NS_DPS_PI_TYPE1: 884 case NVME_NS_DPS_PI_TYPE2: 885 nvme_set_ref_tag(ns, cmnd, req); 886 break; 887 } 888 } 889 890 return BLK_STS_OK; 891 } 892 893 static inline blk_status_t nvme_setup_rw(struct nvme_ns *ns, 894 struct request *req, struct nvme_command *cmnd, 895 enum nvme_opcode op) 896 { 897 u16 control = 0; 898 u32 dsmgmt = 0; 899 900 if (req->cmd_flags & REQ_FUA) 901 control |= NVME_RW_FUA; 902 if (req->cmd_flags & (REQ_FAILFAST_DEV | REQ_RAHEAD)) 903 control |= NVME_RW_LR; 904 905 if (req->cmd_flags & REQ_RAHEAD) 906 dsmgmt |= NVME_RW_DSM_FREQ_PREFETCH; 907 908 cmnd->rw.opcode = op; 909 cmnd->rw.flags = 0; 910 cmnd->rw.nsid = cpu_to_le32(ns->head->ns_id); 911 cmnd->rw.cdw2 = 0; 912 cmnd->rw.cdw3 = 0; 913 cmnd->rw.metadata = 0; 914 cmnd->rw.slba = cpu_to_le64(nvme_sect_to_lba(ns, blk_rq_pos(req))); 915 cmnd->rw.length = cpu_to_le16((blk_rq_bytes(req) >> ns->lba_shift) - 1); 916 cmnd->rw.reftag = 0; 917 cmnd->rw.apptag = 0; 918 cmnd->rw.appmask = 0; 919 920 if (ns->ms) { 921 /* 922 * If formated with metadata, the block layer always provides a 923 * metadata buffer if CONFIG_BLK_DEV_INTEGRITY is enabled. Else 924 * we enable the PRACT bit for protection information or set the 925 * namespace capacity to zero to prevent any I/O. 926 */ 927 if (!blk_integrity_rq(req)) { 928 if (WARN_ON_ONCE(!nvme_ns_has_pi(ns))) 929 return BLK_STS_NOTSUPP; 930 control |= NVME_RW_PRINFO_PRACT; 931 } 932 933 switch (ns->pi_type) { 934 case NVME_NS_DPS_PI_TYPE3: 935 control |= NVME_RW_PRINFO_PRCHK_GUARD; 936 break; 937 case NVME_NS_DPS_PI_TYPE1: 938 case NVME_NS_DPS_PI_TYPE2: 939 control |= NVME_RW_PRINFO_PRCHK_GUARD | 940 NVME_RW_PRINFO_PRCHK_REF; 941 if (op == nvme_cmd_zone_append) 942 control |= NVME_RW_APPEND_PIREMAP; 943 nvme_set_ref_tag(ns, cmnd, req); 944 break; 945 } 946 } 947 948 cmnd->rw.control = cpu_to_le16(control); 949 cmnd->rw.dsmgmt = cpu_to_le32(dsmgmt); 950 return 0; 951 } 952 953 void nvme_cleanup_cmd(struct request *req) 954 { 955 if (req->rq_flags & RQF_SPECIAL_PAYLOAD) { 956 struct nvme_ctrl *ctrl = nvme_req(req)->ctrl; 957 958 if (req->special_vec.bv_page == ctrl->discard_page) 959 clear_bit_unlock(0, &ctrl->discard_page_busy); 960 else 961 kfree(bvec_virt(&req->special_vec)); 962 } 963 } 964 EXPORT_SYMBOL_GPL(nvme_cleanup_cmd); 965 966 blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req) 967 { 968 struct nvme_command *cmd = nvme_req(req)->cmd; 969 blk_status_t ret = BLK_STS_OK; 970 971 if (!(req->rq_flags & RQF_DONTPREP)) 972 nvme_clear_nvme_request(req); 973 974 switch (req_op(req)) { 975 case REQ_OP_DRV_IN: 976 case REQ_OP_DRV_OUT: 977 /* these are setup prior to execution in nvme_init_request() */ 978 break; 979 case REQ_OP_FLUSH: 980 nvme_setup_flush(ns, cmd); 981 break; 982 case REQ_OP_ZONE_RESET_ALL: 983 case REQ_OP_ZONE_RESET: 984 ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_RESET); 985 break; 986 case REQ_OP_ZONE_OPEN: 987 ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_OPEN); 988 break; 989 case REQ_OP_ZONE_CLOSE: 990 ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_CLOSE); 991 break; 992 case REQ_OP_ZONE_FINISH: 993 ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_FINISH); 994 break; 995 case REQ_OP_WRITE_ZEROES: 996 ret = nvme_setup_write_zeroes(ns, req, cmd); 997 break; 998 case REQ_OP_DISCARD: 999 ret = nvme_setup_discard(ns, req, cmd); 1000 break; 1001 case REQ_OP_READ: 1002 ret = nvme_setup_rw(ns, req, cmd, nvme_cmd_read); 1003 break; 1004 case REQ_OP_WRITE: 1005 ret = nvme_setup_rw(ns, req, cmd, nvme_cmd_write); 1006 break; 1007 case REQ_OP_ZONE_APPEND: 1008 ret = nvme_setup_rw(ns, req, cmd, nvme_cmd_zone_append); 1009 break; 1010 default: 1011 WARN_ON_ONCE(1); 1012 return BLK_STS_IOERR; 1013 } 1014 1015 cmd->common.command_id = nvme_cid(req); 1016 trace_nvme_setup_cmd(req, cmd); 1017 return ret; 1018 } 1019 EXPORT_SYMBOL_GPL(nvme_setup_cmd); 1020 1021 /* 1022 * Return values: 1023 * 0: success 1024 * >0: nvme controller's cqe status response 1025 * <0: kernel error in lieu of controller response 1026 */ 1027 int nvme_execute_rq(struct request *rq, bool at_head) 1028 { 1029 blk_status_t status; 1030 1031 status = blk_execute_rq(rq, at_head); 1032 if (nvme_req(rq)->flags & NVME_REQ_CANCELLED) 1033 return -EINTR; 1034 if (nvme_req(rq)->status) 1035 return nvme_req(rq)->status; 1036 return blk_status_to_errno(status); 1037 } 1038 EXPORT_SYMBOL_NS_GPL(nvme_execute_rq, NVME_TARGET_PASSTHRU); 1039 1040 /* 1041 * Returns 0 on success. If the result is negative, it's a Linux error code; 1042 * if the result is positive, it's an NVM Express status code 1043 */ 1044 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 1045 union nvme_result *result, void *buffer, unsigned bufflen, 1046 int qid, int at_head, blk_mq_req_flags_t flags) 1047 { 1048 struct request *req; 1049 int ret; 1050 1051 if (qid == NVME_QID_ANY) 1052 req = blk_mq_alloc_request(q, nvme_req_op(cmd), flags); 1053 else 1054 req = blk_mq_alloc_request_hctx(q, nvme_req_op(cmd), flags, 1055 qid - 1); 1056 1057 if (IS_ERR(req)) 1058 return PTR_ERR(req); 1059 nvme_init_request(req, cmd); 1060 1061 if (buffer && bufflen) { 1062 ret = blk_rq_map_kern(q, req, buffer, bufflen, GFP_KERNEL); 1063 if (ret) 1064 goto out; 1065 } 1066 1067 ret = nvme_execute_rq(req, at_head); 1068 if (result && ret >= 0) 1069 *result = nvme_req(req)->result; 1070 out: 1071 blk_mq_free_request(req); 1072 return ret; 1073 } 1074 EXPORT_SYMBOL_GPL(__nvme_submit_sync_cmd); 1075 1076 int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 1077 void *buffer, unsigned bufflen) 1078 { 1079 return __nvme_submit_sync_cmd(q, cmd, NULL, buffer, bufflen, 1080 NVME_QID_ANY, 0, 0); 1081 } 1082 EXPORT_SYMBOL_GPL(nvme_submit_sync_cmd); 1083 1084 u32 nvme_command_effects(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u8 opcode) 1085 { 1086 u32 effects = 0; 1087 1088 if (ns) { 1089 effects = le32_to_cpu(ns->head->effects->iocs[opcode]); 1090 if (effects & ~(NVME_CMD_EFFECTS_CSUPP | NVME_CMD_EFFECTS_LBCC)) 1091 dev_warn_once(ctrl->device, 1092 "IO command:%02x has unusual effects:%08x\n", 1093 opcode, effects); 1094 1095 /* 1096 * NVME_CMD_EFFECTS_CSE_MASK causes a freeze all I/O queues, 1097 * which would deadlock when done on an I/O command. Note that 1098 * We already warn about an unusual effect above. 1099 */ 1100 effects &= ~NVME_CMD_EFFECTS_CSE_MASK; 1101 } else { 1102 effects = le32_to_cpu(ctrl->effects->acs[opcode]); 1103 } 1104 1105 return effects; 1106 } 1107 EXPORT_SYMBOL_NS_GPL(nvme_command_effects, NVME_TARGET_PASSTHRU); 1108 1109 u32 nvme_passthru_start(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u8 opcode) 1110 { 1111 u32 effects = nvme_command_effects(ctrl, ns, opcode); 1112 1113 /* 1114 * For simplicity, IO to all namespaces is quiesced even if the command 1115 * effects say only one namespace is affected. 1116 */ 1117 if (effects & NVME_CMD_EFFECTS_CSE_MASK) { 1118 mutex_lock(&ctrl->scan_lock); 1119 mutex_lock(&ctrl->subsys->lock); 1120 nvme_mpath_start_freeze(ctrl->subsys); 1121 nvme_mpath_wait_freeze(ctrl->subsys); 1122 nvme_start_freeze(ctrl); 1123 nvme_wait_freeze(ctrl); 1124 } 1125 return effects; 1126 } 1127 EXPORT_SYMBOL_NS_GPL(nvme_passthru_start, NVME_TARGET_PASSTHRU); 1128 1129 void nvme_passthru_end(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u32 effects, 1130 struct nvme_command *cmd, int status) 1131 { 1132 if (effects & NVME_CMD_EFFECTS_CSE_MASK) { 1133 nvme_unfreeze(ctrl); 1134 nvme_mpath_unfreeze(ctrl->subsys); 1135 mutex_unlock(&ctrl->subsys->lock); 1136 mutex_unlock(&ctrl->scan_lock); 1137 } 1138 if (effects & NVME_CMD_EFFECTS_CCC) { 1139 if (!test_and_set_bit(NVME_CTRL_DIRTY_CAPABILITY, 1140 &ctrl->flags)) { 1141 dev_info(ctrl->device, 1142 "controller capabilities changed, reset may be required to take effect.\n"); 1143 } 1144 } 1145 if (effects & (NVME_CMD_EFFECTS_NIC | NVME_CMD_EFFECTS_NCC)) { 1146 nvme_queue_scan(ctrl); 1147 flush_work(&ctrl->scan_work); 1148 } 1149 if (ns) 1150 return; 1151 1152 switch (cmd->common.opcode) { 1153 case nvme_admin_set_features: 1154 switch (le32_to_cpu(cmd->common.cdw10) & 0xFF) { 1155 case NVME_FEAT_KATO: 1156 /* 1157 * Keep alive commands interval on the host should be 1158 * updated when KATO is modified by Set Features 1159 * commands. 1160 */ 1161 if (!status) 1162 nvme_update_keep_alive(ctrl, cmd); 1163 break; 1164 default: 1165 break; 1166 } 1167 break; 1168 default: 1169 break; 1170 } 1171 } 1172 EXPORT_SYMBOL_NS_GPL(nvme_passthru_end, NVME_TARGET_PASSTHRU); 1173 1174 /* 1175 * Recommended frequency for KATO commands per NVMe 1.4 section 7.12.1: 1176 * 1177 * The host should send Keep Alive commands at half of the Keep Alive Timeout 1178 * accounting for transport roundtrip times [..]. 1179 */ 1180 static unsigned long nvme_keep_alive_work_period(struct nvme_ctrl *ctrl) 1181 { 1182 unsigned long delay = ctrl->kato * HZ / 2; 1183 1184 /* 1185 * When using Traffic Based Keep Alive, we need to run 1186 * nvme_keep_alive_work at twice the normal frequency, as one 1187 * command completion can postpone sending a keep alive command 1188 * by up to twice the delay between runs. 1189 */ 1190 if (ctrl->ctratt & NVME_CTRL_ATTR_TBKAS) 1191 delay /= 2; 1192 return delay; 1193 } 1194 1195 static void nvme_queue_keep_alive_work(struct nvme_ctrl *ctrl) 1196 { 1197 queue_delayed_work(nvme_wq, &ctrl->ka_work, 1198 nvme_keep_alive_work_period(ctrl)); 1199 } 1200 1201 static enum rq_end_io_ret nvme_keep_alive_end_io(struct request *rq, 1202 blk_status_t status) 1203 { 1204 struct nvme_ctrl *ctrl = rq->end_io_data; 1205 unsigned long flags; 1206 bool startka = false; 1207 unsigned long rtt = jiffies - (rq->deadline - rq->timeout); 1208 unsigned long delay = nvme_keep_alive_work_period(ctrl); 1209 1210 /* 1211 * Subtract off the keepalive RTT so nvme_keep_alive_work runs 1212 * at the desired frequency. 1213 */ 1214 if (rtt <= delay) { 1215 delay -= rtt; 1216 } else { 1217 dev_warn(ctrl->device, "long keepalive RTT (%u ms)\n", 1218 jiffies_to_msecs(rtt)); 1219 delay = 0; 1220 } 1221 1222 blk_mq_free_request(rq); 1223 1224 if (status) { 1225 dev_err(ctrl->device, 1226 "failed nvme_keep_alive_end_io error=%d\n", 1227 status); 1228 return RQ_END_IO_NONE; 1229 } 1230 1231 ctrl->ka_last_check_time = jiffies; 1232 ctrl->comp_seen = false; 1233 spin_lock_irqsave(&ctrl->lock, flags); 1234 if (ctrl->state == NVME_CTRL_LIVE || 1235 ctrl->state == NVME_CTRL_CONNECTING) 1236 startka = true; 1237 spin_unlock_irqrestore(&ctrl->lock, flags); 1238 if (startka) 1239 queue_delayed_work(nvme_wq, &ctrl->ka_work, delay); 1240 return RQ_END_IO_NONE; 1241 } 1242 1243 static void nvme_keep_alive_work(struct work_struct *work) 1244 { 1245 struct nvme_ctrl *ctrl = container_of(to_delayed_work(work), 1246 struct nvme_ctrl, ka_work); 1247 bool comp_seen = ctrl->comp_seen; 1248 struct request *rq; 1249 1250 ctrl->ka_last_check_time = jiffies; 1251 1252 if ((ctrl->ctratt & NVME_CTRL_ATTR_TBKAS) && comp_seen) { 1253 dev_dbg(ctrl->device, 1254 "reschedule traffic based keep-alive timer\n"); 1255 ctrl->comp_seen = false; 1256 nvme_queue_keep_alive_work(ctrl); 1257 return; 1258 } 1259 1260 rq = blk_mq_alloc_request(ctrl->admin_q, nvme_req_op(&ctrl->ka_cmd), 1261 BLK_MQ_REQ_RESERVED | BLK_MQ_REQ_NOWAIT); 1262 if (IS_ERR(rq)) { 1263 /* allocation failure, reset the controller */ 1264 dev_err(ctrl->device, "keep-alive failed: %ld\n", PTR_ERR(rq)); 1265 nvme_reset_ctrl(ctrl); 1266 return; 1267 } 1268 nvme_init_request(rq, &ctrl->ka_cmd); 1269 1270 rq->timeout = ctrl->kato * HZ; 1271 rq->end_io = nvme_keep_alive_end_io; 1272 rq->end_io_data = ctrl; 1273 blk_execute_rq_nowait(rq, false); 1274 } 1275 1276 static void nvme_start_keep_alive(struct nvme_ctrl *ctrl) 1277 { 1278 if (unlikely(ctrl->kato == 0)) 1279 return; 1280 1281 nvme_queue_keep_alive_work(ctrl); 1282 } 1283 1284 void nvme_stop_keep_alive(struct nvme_ctrl *ctrl) 1285 { 1286 if (unlikely(ctrl->kato == 0)) 1287 return; 1288 1289 cancel_delayed_work_sync(&ctrl->ka_work); 1290 } 1291 EXPORT_SYMBOL_GPL(nvme_stop_keep_alive); 1292 1293 static void nvme_update_keep_alive(struct nvme_ctrl *ctrl, 1294 struct nvme_command *cmd) 1295 { 1296 unsigned int new_kato = 1297 DIV_ROUND_UP(le32_to_cpu(cmd->common.cdw11), 1000); 1298 1299 dev_info(ctrl->device, 1300 "keep alive interval updated from %u ms to %u ms\n", 1301 ctrl->kato * 1000 / 2, new_kato * 1000 / 2); 1302 1303 nvme_stop_keep_alive(ctrl); 1304 ctrl->kato = new_kato; 1305 nvme_start_keep_alive(ctrl); 1306 } 1307 1308 /* 1309 * In NVMe 1.0 the CNS field was just a binary controller or namespace 1310 * flag, thus sending any new CNS opcodes has a big chance of not working. 1311 * Qemu unfortunately had that bug after reporting a 1.1 version compliance 1312 * (but not for any later version). 1313 */ 1314 static bool nvme_ctrl_limited_cns(struct nvme_ctrl *ctrl) 1315 { 1316 if (ctrl->quirks & NVME_QUIRK_IDENTIFY_CNS) 1317 return ctrl->vs < NVME_VS(1, 2, 0); 1318 return ctrl->vs < NVME_VS(1, 1, 0); 1319 } 1320 1321 static int nvme_identify_ctrl(struct nvme_ctrl *dev, struct nvme_id_ctrl **id) 1322 { 1323 struct nvme_command c = { }; 1324 int error; 1325 1326 /* gcc-4.4.4 (at least) has issues with initializers and anon unions */ 1327 c.identify.opcode = nvme_admin_identify; 1328 c.identify.cns = NVME_ID_CNS_CTRL; 1329 1330 *id = kmalloc(sizeof(struct nvme_id_ctrl), GFP_KERNEL); 1331 if (!*id) 1332 return -ENOMEM; 1333 1334 error = nvme_submit_sync_cmd(dev->admin_q, &c, *id, 1335 sizeof(struct nvme_id_ctrl)); 1336 if (error) 1337 kfree(*id); 1338 return error; 1339 } 1340 1341 static int nvme_process_ns_desc(struct nvme_ctrl *ctrl, struct nvme_ns_ids *ids, 1342 struct nvme_ns_id_desc *cur, bool *csi_seen) 1343 { 1344 const char *warn_str = "ctrl returned bogus length:"; 1345 void *data = cur; 1346 1347 switch (cur->nidt) { 1348 case NVME_NIDT_EUI64: 1349 if (cur->nidl != NVME_NIDT_EUI64_LEN) { 1350 dev_warn(ctrl->device, "%s %d for NVME_NIDT_EUI64\n", 1351 warn_str, cur->nidl); 1352 return -1; 1353 } 1354 if (ctrl->quirks & NVME_QUIRK_BOGUS_NID) 1355 return NVME_NIDT_EUI64_LEN; 1356 memcpy(ids->eui64, data + sizeof(*cur), NVME_NIDT_EUI64_LEN); 1357 return NVME_NIDT_EUI64_LEN; 1358 case NVME_NIDT_NGUID: 1359 if (cur->nidl != NVME_NIDT_NGUID_LEN) { 1360 dev_warn(ctrl->device, "%s %d for NVME_NIDT_NGUID\n", 1361 warn_str, cur->nidl); 1362 return -1; 1363 } 1364 if (ctrl->quirks & NVME_QUIRK_BOGUS_NID) 1365 return NVME_NIDT_NGUID_LEN; 1366 memcpy(ids->nguid, data + sizeof(*cur), NVME_NIDT_NGUID_LEN); 1367 return NVME_NIDT_NGUID_LEN; 1368 case NVME_NIDT_UUID: 1369 if (cur->nidl != NVME_NIDT_UUID_LEN) { 1370 dev_warn(ctrl->device, "%s %d for NVME_NIDT_UUID\n", 1371 warn_str, cur->nidl); 1372 return -1; 1373 } 1374 if (ctrl->quirks & NVME_QUIRK_BOGUS_NID) 1375 return NVME_NIDT_UUID_LEN; 1376 uuid_copy(&ids->uuid, data + sizeof(*cur)); 1377 return NVME_NIDT_UUID_LEN; 1378 case NVME_NIDT_CSI: 1379 if (cur->nidl != NVME_NIDT_CSI_LEN) { 1380 dev_warn(ctrl->device, "%s %d for NVME_NIDT_CSI\n", 1381 warn_str, cur->nidl); 1382 return -1; 1383 } 1384 memcpy(&ids->csi, data + sizeof(*cur), NVME_NIDT_CSI_LEN); 1385 *csi_seen = true; 1386 return NVME_NIDT_CSI_LEN; 1387 default: 1388 /* Skip unknown types */ 1389 return cur->nidl; 1390 } 1391 } 1392 1393 static int nvme_identify_ns_descs(struct nvme_ctrl *ctrl, 1394 struct nvme_ns_info *info) 1395 { 1396 struct nvme_command c = { }; 1397 bool csi_seen = false; 1398 int status, pos, len; 1399 void *data; 1400 1401 if (ctrl->vs < NVME_VS(1, 3, 0) && !nvme_multi_css(ctrl)) 1402 return 0; 1403 if (ctrl->quirks & NVME_QUIRK_NO_NS_DESC_LIST) 1404 return 0; 1405 1406 c.identify.opcode = nvme_admin_identify; 1407 c.identify.nsid = cpu_to_le32(info->nsid); 1408 c.identify.cns = NVME_ID_CNS_NS_DESC_LIST; 1409 1410 data = kzalloc(NVME_IDENTIFY_DATA_SIZE, GFP_KERNEL); 1411 if (!data) 1412 return -ENOMEM; 1413 1414 status = nvme_submit_sync_cmd(ctrl->admin_q, &c, data, 1415 NVME_IDENTIFY_DATA_SIZE); 1416 if (status) { 1417 dev_warn(ctrl->device, 1418 "Identify Descriptors failed (nsid=%u, status=0x%x)\n", 1419 info->nsid, status); 1420 goto free_data; 1421 } 1422 1423 for (pos = 0; pos < NVME_IDENTIFY_DATA_SIZE; pos += len) { 1424 struct nvme_ns_id_desc *cur = data + pos; 1425 1426 if (cur->nidl == 0) 1427 break; 1428 1429 len = nvme_process_ns_desc(ctrl, &info->ids, cur, &csi_seen); 1430 if (len < 0) 1431 break; 1432 1433 len += sizeof(*cur); 1434 } 1435 1436 if (nvme_multi_css(ctrl) && !csi_seen) { 1437 dev_warn(ctrl->device, "Command set not reported for nsid:%d\n", 1438 info->nsid); 1439 status = -EINVAL; 1440 } 1441 1442 free_data: 1443 kfree(data); 1444 return status; 1445 } 1446 1447 static int nvme_identify_ns(struct nvme_ctrl *ctrl, unsigned nsid, 1448 struct nvme_id_ns **id) 1449 { 1450 struct nvme_command c = { }; 1451 int error; 1452 1453 /* gcc-4.4.4 (at least) has issues with initializers and anon unions */ 1454 c.identify.opcode = nvme_admin_identify; 1455 c.identify.nsid = cpu_to_le32(nsid); 1456 c.identify.cns = NVME_ID_CNS_NS; 1457 1458 *id = kmalloc(sizeof(**id), GFP_KERNEL); 1459 if (!*id) 1460 return -ENOMEM; 1461 1462 error = nvme_submit_sync_cmd(ctrl->admin_q, &c, *id, sizeof(**id)); 1463 if (error) { 1464 dev_warn(ctrl->device, "Identify namespace failed (%d)\n", error); 1465 kfree(*id); 1466 } 1467 return error; 1468 } 1469 1470 static int nvme_ns_info_from_identify(struct nvme_ctrl *ctrl, 1471 struct nvme_ns_info *info) 1472 { 1473 struct nvme_ns_ids *ids = &info->ids; 1474 struct nvme_id_ns *id; 1475 int ret; 1476 1477 ret = nvme_identify_ns(ctrl, info->nsid, &id); 1478 if (ret) 1479 return ret; 1480 1481 if (id->ncap == 0) { 1482 /* namespace not allocated or attached */ 1483 info->is_removed = true; 1484 ret = -ENODEV; 1485 goto error; 1486 } 1487 1488 info->anagrpid = id->anagrpid; 1489 info->is_shared = id->nmic & NVME_NS_NMIC_SHARED; 1490 info->is_readonly = id->nsattr & NVME_NS_ATTR_RO; 1491 info->is_ready = true; 1492 if (ctrl->quirks & NVME_QUIRK_BOGUS_NID) { 1493 dev_info(ctrl->device, 1494 "Ignoring bogus Namespace Identifiers\n"); 1495 } else { 1496 if (ctrl->vs >= NVME_VS(1, 1, 0) && 1497 !memchr_inv(ids->eui64, 0, sizeof(ids->eui64))) 1498 memcpy(ids->eui64, id->eui64, sizeof(ids->eui64)); 1499 if (ctrl->vs >= NVME_VS(1, 2, 0) && 1500 !memchr_inv(ids->nguid, 0, sizeof(ids->nguid))) 1501 memcpy(ids->nguid, id->nguid, sizeof(ids->nguid)); 1502 } 1503 1504 error: 1505 kfree(id); 1506 return ret; 1507 } 1508 1509 static int nvme_ns_info_from_id_cs_indep(struct nvme_ctrl *ctrl, 1510 struct nvme_ns_info *info) 1511 { 1512 struct nvme_id_ns_cs_indep *id; 1513 struct nvme_command c = { 1514 .identify.opcode = nvme_admin_identify, 1515 .identify.nsid = cpu_to_le32(info->nsid), 1516 .identify.cns = NVME_ID_CNS_NS_CS_INDEP, 1517 }; 1518 int ret; 1519 1520 id = kmalloc(sizeof(*id), GFP_KERNEL); 1521 if (!id) 1522 return -ENOMEM; 1523 1524 ret = nvme_submit_sync_cmd(ctrl->admin_q, &c, id, sizeof(*id)); 1525 if (!ret) { 1526 info->anagrpid = id->anagrpid; 1527 info->is_shared = id->nmic & NVME_NS_NMIC_SHARED; 1528 info->is_readonly = id->nsattr & NVME_NS_ATTR_RO; 1529 info->is_ready = id->nstat & NVME_NSTAT_NRDY; 1530 } 1531 kfree(id); 1532 return ret; 1533 } 1534 1535 static int nvme_features(struct nvme_ctrl *dev, u8 op, unsigned int fid, 1536 unsigned int dword11, void *buffer, size_t buflen, u32 *result) 1537 { 1538 union nvme_result res = { 0 }; 1539 struct nvme_command c = { }; 1540 int ret; 1541 1542 c.features.opcode = op; 1543 c.features.fid = cpu_to_le32(fid); 1544 c.features.dword11 = cpu_to_le32(dword11); 1545 1546 ret = __nvme_submit_sync_cmd(dev->admin_q, &c, &res, 1547 buffer, buflen, NVME_QID_ANY, 0, 0); 1548 if (ret >= 0 && result) 1549 *result = le32_to_cpu(res.u32); 1550 return ret; 1551 } 1552 1553 int nvme_set_features(struct nvme_ctrl *dev, unsigned int fid, 1554 unsigned int dword11, void *buffer, size_t buflen, 1555 u32 *result) 1556 { 1557 return nvme_features(dev, nvme_admin_set_features, fid, dword11, buffer, 1558 buflen, result); 1559 } 1560 EXPORT_SYMBOL_GPL(nvme_set_features); 1561 1562 int nvme_get_features(struct nvme_ctrl *dev, unsigned int fid, 1563 unsigned int dword11, void *buffer, size_t buflen, 1564 u32 *result) 1565 { 1566 return nvme_features(dev, nvme_admin_get_features, fid, dword11, buffer, 1567 buflen, result); 1568 } 1569 EXPORT_SYMBOL_GPL(nvme_get_features); 1570 1571 int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count) 1572 { 1573 u32 q_count = (*count - 1) | ((*count - 1) << 16); 1574 u32 result; 1575 int status, nr_io_queues; 1576 1577 status = nvme_set_features(ctrl, NVME_FEAT_NUM_QUEUES, q_count, NULL, 0, 1578 &result); 1579 if (status < 0) 1580 return status; 1581 1582 /* 1583 * Degraded controllers might return an error when setting the queue 1584 * count. We still want to be able to bring them online and offer 1585 * access to the admin queue, as that might be only way to fix them up. 1586 */ 1587 if (status > 0) { 1588 dev_err(ctrl->device, "Could not set queue count (%d)\n", status); 1589 *count = 0; 1590 } else { 1591 nr_io_queues = min(result & 0xffff, result >> 16) + 1; 1592 *count = min(*count, nr_io_queues); 1593 } 1594 1595 return 0; 1596 } 1597 EXPORT_SYMBOL_GPL(nvme_set_queue_count); 1598 1599 #define NVME_AEN_SUPPORTED \ 1600 (NVME_AEN_CFG_NS_ATTR | NVME_AEN_CFG_FW_ACT | \ 1601 NVME_AEN_CFG_ANA_CHANGE | NVME_AEN_CFG_DISC_CHANGE) 1602 1603 static void nvme_enable_aen(struct nvme_ctrl *ctrl) 1604 { 1605 u32 result, supported_aens = ctrl->oaes & NVME_AEN_SUPPORTED; 1606 int status; 1607 1608 if (!supported_aens) 1609 return; 1610 1611 status = nvme_set_features(ctrl, NVME_FEAT_ASYNC_EVENT, supported_aens, 1612 NULL, 0, &result); 1613 if (status) 1614 dev_warn(ctrl->device, "Failed to configure AEN (cfg %x)\n", 1615 supported_aens); 1616 1617 queue_work(nvme_wq, &ctrl->async_event_work); 1618 } 1619 1620 static int nvme_ns_open(struct nvme_ns *ns) 1621 { 1622 1623 /* should never be called due to GENHD_FL_HIDDEN */ 1624 if (WARN_ON_ONCE(nvme_ns_head_multipath(ns->head))) 1625 goto fail; 1626 if (!nvme_get_ns(ns)) 1627 goto fail; 1628 if (!try_module_get(ns->ctrl->ops->module)) 1629 goto fail_put_ns; 1630 1631 return 0; 1632 1633 fail_put_ns: 1634 nvme_put_ns(ns); 1635 fail: 1636 return -ENXIO; 1637 } 1638 1639 static void nvme_ns_release(struct nvme_ns *ns) 1640 { 1641 1642 module_put(ns->ctrl->ops->module); 1643 nvme_put_ns(ns); 1644 } 1645 1646 static int nvme_open(struct gendisk *disk, blk_mode_t mode) 1647 { 1648 return nvme_ns_open(disk->private_data); 1649 } 1650 1651 static void nvme_release(struct gendisk *disk) 1652 { 1653 nvme_ns_release(disk->private_data); 1654 } 1655 1656 int nvme_getgeo(struct block_device *bdev, struct hd_geometry *geo) 1657 { 1658 /* some standard values */ 1659 geo->heads = 1 << 6; 1660 geo->sectors = 1 << 5; 1661 geo->cylinders = get_capacity(bdev->bd_disk) >> 11; 1662 return 0; 1663 } 1664 1665 #ifdef CONFIG_BLK_DEV_INTEGRITY 1666 static void nvme_init_integrity(struct gendisk *disk, struct nvme_ns *ns, 1667 u32 max_integrity_segments) 1668 { 1669 struct blk_integrity integrity = { }; 1670 1671 switch (ns->pi_type) { 1672 case NVME_NS_DPS_PI_TYPE3: 1673 switch (ns->guard_type) { 1674 case NVME_NVM_NS_16B_GUARD: 1675 integrity.profile = &t10_pi_type3_crc; 1676 integrity.tag_size = sizeof(u16) + sizeof(u32); 1677 integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE; 1678 break; 1679 case NVME_NVM_NS_64B_GUARD: 1680 integrity.profile = &ext_pi_type3_crc64; 1681 integrity.tag_size = sizeof(u16) + 6; 1682 integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE; 1683 break; 1684 default: 1685 integrity.profile = NULL; 1686 break; 1687 } 1688 break; 1689 case NVME_NS_DPS_PI_TYPE1: 1690 case NVME_NS_DPS_PI_TYPE2: 1691 switch (ns->guard_type) { 1692 case NVME_NVM_NS_16B_GUARD: 1693 integrity.profile = &t10_pi_type1_crc; 1694 integrity.tag_size = sizeof(u16); 1695 integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE; 1696 break; 1697 case NVME_NVM_NS_64B_GUARD: 1698 integrity.profile = &ext_pi_type1_crc64; 1699 integrity.tag_size = sizeof(u16); 1700 integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE; 1701 break; 1702 default: 1703 integrity.profile = NULL; 1704 break; 1705 } 1706 break; 1707 default: 1708 integrity.profile = NULL; 1709 break; 1710 } 1711 1712 integrity.tuple_size = ns->ms; 1713 blk_integrity_register(disk, &integrity); 1714 blk_queue_max_integrity_segments(disk->queue, max_integrity_segments); 1715 } 1716 #else 1717 static void nvme_init_integrity(struct gendisk *disk, struct nvme_ns *ns, 1718 u32 max_integrity_segments) 1719 { 1720 } 1721 #endif /* CONFIG_BLK_DEV_INTEGRITY */ 1722 1723 static void nvme_config_discard(struct gendisk *disk, struct nvme_ns *ns) 1724 { 1725 struct nvme_ctrl *ctrl = ns->ctrl; 1726 struct request_queue *queue = disk->queue; 1727 u32 size = queue_logical_block_size(queue); 1728 1729 if (ctrl->dmrsl && ctrl->dmrsl <= nvme_sect_to_lba(ns, UINT_MAX)) 1730 ctrl->max_discard_sectors = nvme_lba_to_sect(ns, ctrl->dmrsl); 1731 1732 if (ctrl->max_discard_sectors == 0) { 1733 blk_queue_max_discard_sectors(queue, 0); 1734 return; 1735 } 1736 1737 BUILD_BUG_ON(PAGE_SIZE / sizeof(struct nvme_dsm_range) < 1738 NVME_DSM_MAX_RANGES); 1739 1740 queue->limits.discard_granularity = size; 1741 1742 /* If discard is already enabled, don't reset queue limits */ 1743 if (queue->limits.max_discard_sectors) 1744 return; 1745 1746 blk_queue_max_discard_sectors(queue, ctrl->max_discard_sectors); 1747 blk_queue_max_discard_segments(queue, ctrl->max_discard_segments); 1748 1749 if (ctrl->quirks & NVME_QUIRK_DEALLOCATE_ZEROES) 1750 blk_queue_max_write_zeroes_sectors(queue, UINT_MAX); 1751 } 1752 1753 static bool nvme_ns_ids_equal(struct nvme_ns_ids *a, struct nvme_ns_ids *b) 1754 { 1755 return uuid_equal(&a->uuid, &b->uuid) && 1756 memcmp(&a->nguid, &b->nguid, sizeof(a->nguid)) == 0 && 1757 memcmp(&a->eui64, &b->eui64, sizeof(a->eui64)) == 0 && 1758 a->csi == b->csi; 1759 } 1760 1761 static int nvme_init_ms(struct nvme_ns *ns, struct nvme_id_ns *id) 1762 { 1763 bool first = id->dps & NVME_NS_DPS_PI_FIRST; 1764 unsigned lbaf = nvme_lbaf_index(id->flbas); 1765 struct nvme_ctrl *ctrl = ns->ctrl; 1766 struct nvme_command c = { }; 1767 struct nvme_id_ns_nvm *nvm; 1768 int ret = 0; 1769 u32 elbaf; 1770 1771 ns->pi_size = 0; 1772 ns->ms = le16_to_cpu(id->lbaf[lbaf].ms); 1773 if (!(ctrl->ctratt & NVME_CTRL_ATTR_ELBAS)) { 1774 ns->pi_size = sizeof(struct t10_pi_tuple); 1775 ns->guard_type = NVME_NVM_NS_16B_GUARD; 1776 goto set_pi; 1777 } 1778 1779 nvm = kzalloc(sizeof(*nvm), GFP_KERNEL); 1780 if (!nvm) 1781 return -ENOMEM; 1782 1783 c.identify.opcode = nvme_admin_identify; 1784 c.identify.nsid = cpu_to_le32(ns->head->ns_id); 1785 c.identify.cns = NVME_ID_CNS_CS_NS; 1786 c.identify.csi = NVME_CSI_NVM; 1787 1788 ret = nvme_submit_sync_cmd(ns->ctrl->admin_q, &c, nvm, sizeof(*nvm)); 1789 if (ret) 1790 goto free_data; 1791 1792 elbaf = le32_to_cpu(nvm->elbaf[lbaf]); 1793 1794 /* no support for storage tag formats right now */ 1795 if (nvme_elbaf_sts(elbaf)) 1796 goto free_data; 1797 1798 ns->guard_type = nvme_elbaf_guard_type(elbaf); 1799 switch (ns->guard_type) { 1800 case NVME_NVM_NS_64B_GUARD: 1801 ns->pi_size = sizeof(struct crc64_pi_tuple); 1802 break; 1803 case NVME_NVM_NS_16B_GUARD: 1804 ns->pi_size = sizeof(struct t10_pi_tuple); 1805 break; 1806 default: 1807 break; 1808 } 1809 1810 free_data: 1811 kfree(nvm); 1812 set_pi: 1813 if (ns->pi_size && (first || ns->ms == ns->pi_size)) 1814 ns->pi_type = id->dps & NVME_NS_DPS_PI_MASK; 1815 else 1816 ns->pi_type = 0; 1817 1818 return ret; 1819 } 1820 1821 static int nvme_configure_metadata(struct nvme_ns *ns, struct nvme_id_ns *id) 1822 { 1823 struct nvme_ctrl *ctrl = ns->ctrl; 1824 int ret; 1825 1826 ret = nvme_init_ms(ns, id); 1827 if (ret) 1828 return ret; 1829 1830 ns->features &= ~(NVME_NS_METADATA_SUPPORTED | NVME_NS_EXT_LBAS); 1831 if (!ns->ms || !(ctrl->ops->flags & NVME_F_METADATA_SUPPORTED)) 1832 return 0; 1833 1834 if (ctrl->ops->flags & NVME_F_FABRICS) { 1835 /* 1836 * The NVMe over Fabrics specification only supports metadata as 1837 * part of the extended data LBA. We rely on HCA/HBA support to 1838 * remap the separate metadata buffer from the block layer. 1839 */ 1840 if (WARN_ON_ONCE(!(id->flbas & NVME_NS_FLBAS_META_EXT))) 1841 return 0; 1842 1843 ns->features |= NVME_NS_EXT_LBAS; 1844 1845 /* 1846 * The current fabrics transport drivers support namespace 1847 * metadata formats only if nvme_ns_has_pi() returns true. 1848 * Suppress support for all other formats so the namespace will 1849 * have a 0 capacity and not be usable through the block stack. 1850 * 1851 * Note, this check will need to be modified if any drivers 1852 * gain the ability to use other metadata formats. 1853 */ 1854 if (ctrl->max_integrity_segments && nvme_ns_has_pi(ns)) 1855 ns->features |= NVME_NS_METADATA_SUPPORTED; 1856 } else { 1857 /* 1858 * For PCIe controllers, we can't easily remap the separate 1859 * metadata buffer from the block layer and thus require a 1860 * separate metadata buffer for block layer metadata/PI support. 1861 * We allow extended LBAs for the passthrough interface, though. 1862 */ 1863 if (id->flbas & NVME_NS_FLBAS_META_EXT) 1864 ns->features |= NVME_NS_EXT_LBAS; 1865 else 1866 ns->features |= NVME_NS_METADATA_SUPPORTED; 1867 } 1868 return 0; 1869 } 1870 1871 static void nvme_set_queue_limits(struct nvme_ctrl *ctrl, 1872 struct request_queue *q) 1873 { 1874 bool vwc = ctrl->vwc & NVME_CTRL_VWC_PRESENT; 1875 1876 if (ctrl->max_hw_sectors) { 1877 u32 max_segments = 1878 (ctrl->max_hw_sectors / (NVME_CTRL_PAGE_SIZE >> 9)) + 1; 1879 1880 max_segments = min_not_zero(max_segments, ctrl->max_segments); 1881 blk_queue_max_hw_sectors(q, ctrl->max_hw_sectors); 1882 blk_queue_max_segments(q, min_t(u32, max_segments, USHRT_MAX)); 1883 } 1884 blk_queue_virt_boundary(q, NVME_CTRL_PAGE_SIZE - 1); 1885 blk_queue_dma_alignment(q, 3); 1886 blk_queue_write_cache(q, vwc, vwc); 1887 } 1888 1889 static void nvme_update_disk_info(struct gendisk *disk, 1890 struct nvme_ns *ns, struct nvme_id_ns *id) 1891 { 1892 sector_t capacity = nvme_lba_to_sect(ns, le64_to_cpu(id->nsze)); 1893 u32 bs = 1U << ns->lba_shift; 1894 u32 atomic_bs, phys_bs, io_opt = 0; 1895 1896 /* 1897 * The block layer can't support LBA sizes larger than the page size 1898 * or smaller than a sector size yet, so catch this early and don't 1899 * allow block I/O. 1900 */ 1901 if (ns->lba_shift > PAGE_SHIFT || ns->lba_shift < SECTOR_SHIFT) { 1902 capacity = 0; 1903 bs = (1 << 9); 1904 } 1905 1906 blk_integrity_unregister(disk); 1907 1908 atomic_bs = phys_bs = bs; 1909 if (id->nabo == 0) { 1910 /* 1911 * Bit 1 indicates whether NAWUPF is defined for this namespace 1912 * and whether it should be used instead of AWUPF. If NAWUPF == 1913 * 0 then AWUPF must be used instead. 1914 */ 1915 if (id->nsfeat & NVME_NS_FEAT_ATOMICS && id->nawupf) 1916 atomic_bs = (1 + le16_to_cpu(id->nawupf)) * bs; 1917 else 1918 atomic_bs = (1 + ns->ctrl->subsys->awupf) * bs; 1919 } 1920 1921 if (id->nsfeat & NVME_NS_FEAT_IO_OPT) { 1922 /* NPWG = Namespace Preferred Write Granularity */ 1923 phys_bs = bs * (1 + le16_to_cpu(id->npwg)); 1924 /* NOWS = Namespace Optimal Write Size */ 1925 io_opt = bs * (1 + le16_to_cpu(id->nows)); 1926 } 1927 1928 blk_queue_logical_block_size(disk->queue, bs); 1929 /* 1930 * Linux filesystems assume writing a single physical block is 1931 * an atomic operation. Hence limit the physical block size to the 1932 * value of the Atomic Write Unit Power Fail parameter. 1933 */ 1934 blk_queue_physical_block_size(disk->queue, min(phys_bs, atomic_bs)); 1935 blk_queue_io_min(disk->queue, phys_bs); 1936 blk_queue_io_opt(disk->queue, io_opt); 1937 1938 /* 1939 * Register a metadata profile for PI, or the plain non-integrity NVMe 1940 * metadata masquerading as Type 0 if supported, otherwise reject block 1941 * I/O to namespaces with metadata except when the namespace supports 1942 * PI, as it can strip/insert in that case. 1943 */ 1944 if (ns->ms) { 1945 if (IS_ENABLED(CONFIG_BLK_DEV_INTEGRITY) && 1946 (ns->features & NVME_NS_METADATA_SUPPORTED)) 1947 nvme_init_integrity(disk, ns, 1948 ns->ctrl->max_integrity_segments); 1949 else if (!nvme_ns_has_pi(ns)) 1950 capacity = 0; 1951 } 1952 1953 set_capacity_and_notify(disk, capacity); 1954 1955 nvme_config_discard(disk, ns); 1956 blk_queue_max_write_zeroes_sectors(disk->queue, 1957 ns->ctrl->max_zeroes_sectors); 1958 } 1959 1960 static bool nvme_ns_is_readonly(struct nvme_ns *ns, struct nvme_ns_info *info) 1961 { 1962 return info->is_readonly || test_bit(NVME_NS_FORCE_RO, &ns->flags); 1963 } 1964 1965 static inline bool nvme_first_scan(struct gendisk *disk) 1966 { 1967 /* nvme_alloc_ns() scans the disk prior to adding it */ 1968 return !disk_live(disk); 1969 } 1970 1971 static void nvme_set_chunk_sectors(struct nvme_ns *ns, struct nvme_id_ns *id) 1972 { 1973 struct nvme_ctrl *ctrl = ns->ctrl; 1974 u32 iob; 1975 1976 if ((ctrl->quirks & NVME_QUIRK_STRIPE_SIZE) && 1977 is_power_of_2(ctrl->max_hw_sectors)) 1978 iob = ctrl->max_hw_sectors; 1979 else 1980 iob = nvme_lba_to_sect(ns, le16_to_cpu(id->noiob)); 1981 1982 if (!iob) 1983 return; 1984 1985 if (!is_power_of_2(iob)) { 1986 if (nvme_first_scan(ns->disk)) 1987 pr_warn("%s: ignoring unaligned IO boundary:%u\n", 1988 ns->disk->disk_name, iob); 1989 return; 1990 } 1991 1992 if (blk_queue_is_zoned(ns->disk->queue)) { 1993 if (nvme_first_scan(ns->disk)) 1994 pr_warn("%s: ignoring zoned namespace IO boundary\n", 1995 ns->disk->disk_name); 1996 return; 1997 } 1998 1999 blk_queue_chunk_sectors(ns->queue, iob); 2000 } 2001 2002 static int nvme_update_ns_info_generic(struct nvme_ns *ns, 2003 struct nvme_ns_info *info) 2004 { 2005 blk_mq_freeze_queue(ns->disk->queue); 2006 nvme_set_queue_limits(ns->ctrl, ns->queue); 2007 set_disk_ro(ns->disk, nvme_ns_is_readonly(ns, info)); 2008 blk_mq_unfreeze_queue(ns->disk->queue); 2009 2010 if (nvme_ns_head_multipath(ns->head)) { 2011 blk_mq_freeze_queue(ns->head->disk->queue); 2012 set_disk_ro(ns->head->disk, nvme_ns_is_readonly(ns, info)); 2013 nvme_mpath_revalidate_paths(ns); 2014 blk_stack_limits(&ns->head->disk->queue->limits, 2015 &ns->queue->limits, 0); 2016 ns->head->disk->flags |= GENHD_FL_HIDDEN; 2017 blk_mq_unfreeze_queue(ns->head->disk->queue); 2018 } 2019 2020 /* Hide the block-interface for these devices */ 2021 ns->disk->flags |= GENHD_FL_HIDDEN; 2022 set_bit(NVME_NS_READY, &ns->flags); 2023 2024 return 0; 2025 } 2026 2027 static int nvme_update_ns_info_block(struct nvme_ns *ns, 2028 struct nvme_ns_info *info) 2029 { 2030 struct nvme_id_ns *id; 2031 unsigned lbaf; 2032 int ret; 2033 2034 ret = nvme_identify_ns(ns->ctrl, info->nsid, &id); 2035 if (ret) 2036 return ret; 2037 2038 if (id->ncap == 0) { 2039 /* namespace not allocated or attached */ 2040 info->is_removed = true; 2041 ret = -ENODEV; 2042 goto error; 2043 } 2044 2045 blk_mq_freeze_queue(ns->disk->queue); 2046 lbaf = nvme_lbaf_index(id->flbas); 2047 ns->lba_shift = id->lbaf[lbaf].ds; 2048 nvme_set_queue_limits(ns->ctrl, ns->queue); 2049 2050 ret = nvme_configure_metadata(ns, id); 2051 if (ret < 0) { 2052 blk_mq_unfreeze_queue(ns->disk->queue); 2053 goto out; 2054 } 2055 nvme_set_chunk_sectors(ns, id); 2056 nvme_update_disk_info(ns->disk, ns, id); 2057 2058 if (ns->head->ids.csi == NVME_CSI_ZNS) { 2059 ret = nvme_update_zone_info(ns, lbaf); 2060 if (ret) { 2061 blk_mq_unfreeze_queue(ns->disk->queue); 2062 goto out; 2063 } 2064 } 2065 2066 /* 2067 * Only set the DEAC bit if the device guarantees that reads from 2068 * deallocated data return zeroes. While the DEAC bit does not 2069 * require that, it must be a no-op if reads from deallocated data 2070 * do not return zeroes. 2071 */ 2072 if ((id->dlfeat & 0x7) == 0x1 && (id->dlfeat & (1 << 3))) 2073 ns->features |= NVME_NS_DEAC; 2074 set_disk_ro(ns->disk, nvme_ns_is_readonly(ns, info)); 2075 set_bit(NVME_NS_READY, &ns->flags); 2076 blk_mq_unfreeze_queue(ns->disk->queue); 2077 2078 if (blk_queue_is_zoned(ns->queue)) { 2079 ret = nvme_revalidate_zones(ns); 2080 if (ret && !nvme_first_scan(ns->disk)) 2081 goto out; 2082 } 2083 2084 if (nvme_ns_head_multipath(ns->head)) { 2085 blk_mq_freeze_queue(ns->head->disk->queue); 2086 nvme_update_disk_info(ns->head->disk, ns, id); 2087 set_disk_ro(ns->head->disk, nvme_ns_is_readonly(ns, info)); 2088 nvme_mpath_revalidate_paths(ns); 2089 blk_stack_limits(&ns->head->disk->queue->limits, 2090 &ns->queue->limits, 0); 2091 disk_update_readahead(ns->head->disk); 2092 blk_mq_unfreeze_queue(ns->head->disk->queue); 2093 } 2094 2095 ret = 0; 2096 out: 2097 /* 2098 * If probing fails due an unsupported feature, hide the block device, 2099 * but still allow other access. 2100 */ 2101 if (ret == -ENODEV) { 2102 ns->disk->flags |= GENHD_FL_HIDDEN; 2103 set_bit(NVME_NS_READY, &ns->flags); 2104 ret = 0; 2105 } 2106 2107 error: 2108 kfree(id); 2109 return ret; 2110 } 2111 2112 static int nvme_update_ns_info(struct nvme_ns *ns, struct nvme_ns_info *info) 2113 { 2114 switch (info->ids.csi) { 2115 case NVME_CSI_ZNS: 2116 if (!IS_ENABLED(CONFIG_BLK_DEV_ZONED)) { 2117 dev_info(ns->ctrl->device, 2118 "block device for nsid %u not supported without CONFIG_BLK_DEV_ZONED\n", 2119 info->nsid); 2120 return nvme_update_ns_info_generic(ns, info); 2121 } 2122 return nvme_update_ns_info_block(ns, info); 2123 case NVME_CSI_NVM: 2124 return nvme_update_ns_info_block(ns, info); 2125 default: 2126 dev_info(ns->ctrl->device, 2127 "block device for nsid %u not supported (csi %u)\n", 2128 info->nsid, info->ids.csi); 2129 return nvme_update_ns_info_generic(ns, info); 2130 } 2131 } 2132 2133 #ifdef CONFIG_BLK_SED_OPAL 2134 static int nvme_sec_submit(void *data, u16 spsp, u8 secp, void *buffer, size_t len, 2135 bool send) 2136 { 2137 struct nvme_ctrl *ctrl = data; 2138 struct nvme_command cmd = { }; 2139 2140 if (send) 2141 cmd.common.opcode = nvme_admin_security_send; 2142 else 2143 cmd.common.opcode = nvme_admin_security_recv; 2144 cmd.common.nsid = 0; 2145 cmd.common.cdw10 = cpu_to_le32(((u32)secp) << 24 | ((u32)spsp) << 8); 2146 cmd.common.cdw11 = cpu_to_le32(len); 2147 2148 return __nvme_submit_sync_cmd(ctrl->admin_q, &cmd, NULL, buffer, len, 2149 NVME_QID_ANY, 1, 0); 2150 } 2151 2152 static void nvme_configure_opal(struct nvme_ctrl *ctrl, bool was_suspended) 2153 { 2154 if (ctrl->oacs & NVME_CTRL_OACS_SEC_SUPP) { 2155 if (!ctrl->opal_dev) 2156 ctrl->opal_dev = init_opal_dev(ctrl, &nvme_sec_submit); 2157 else if (was_suspended) 2158 opal_unlock_from_suspend(ctrl->opal_dev); 2159 } else { 2160 free_opal_dev(ctrl->opal_dev); 2161 ctrl->opal_dev = NULL; 2162 } 2163 } 2164 #else 2165 static void nvme_configure_opal(struct nvme_ctrl *ctrl, bool was_suspended) 2166 { 2167 } 2168 #endif /* CONFIG_BLK_SED_OPAL */ 2169 2170 #ifdef CONFIG_BLK_DEV_ZONED 2171 static int nvme_report_zones(struct gendisk *disk, sector_t sector, 2172 unsigned int nr_zones, report_zones_cb cb, void *data) 2173 { 2174 return nvme_ns_report_zones(disk->private_data, sector, nr_zones, cb, 2175 data); 2176 } 2177 #else 2178 #define nvme_report_zones NULL 2179 #endif /* CONFIG_BLK_DEV_ZONED */ 2180 2181 const struct block_device_operations nvme_bdev_ops = { 2182 .owner = THIS_MODULE, 2183 .ioctl = nvme_ioctl, 2184 .compat_ioctl = blkdev_compat_ptr_ioctl, 2185 .open = nvme_open, 2186 .release = nvme_release, 2187 .getgeo = nvme_getgeo, 2188 .report_zones = nvme_report_zones, 2189 .pr_ops = &nvme_pr_ops, 2190 }; 2191 2192 static int nvme_wait_ready(struct nvme_ctrl *ctrl, u32 mask, u32 val, 2193 u32 timeout, const char *op) 2194 { 2195 unsigned long timeout_jiffies = jiffies + timeout * HZ; 2196 u32 csts; 2197 int ret; 2198 2199 while ((ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts)) == 0) { 2200 if (csts == ~0) 2201 return -ENODEV; 2202 if ((csts & mask) == val) 2203 break; 2204 2205 usleep_range(1000, 2000); 2206 if (fatal_signal_pending(current)) 2207 return -EINTR; 2208 if (time_after(jiffies, timeout_jiffies)) { 2209 dev_err(ctrl->device, 2210 "Device not ready; aborting %s, CSTS=0x%x\n", 2211 op, csts); 2212 return -ENODEV; 2213 } 2214 } 2215 2216 return ret; 2217 } 2218 2219 int nvme_disable_ctrl(struct nvme_ctrl *ctrl, bool shutdown) 2220 { 2221 int ret; 2222 2223 ctrl->ctrl_config &= ~NVME_CC_SHN_MASK; 2224 if (shutdown) 2225 ctrl->ctrl_config |= NVME_CC_SHN_NORMAL; 2226 else 2227 ctrl->ctrl_config &= ~NVME_CC_ENABLE; 2228 2229 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config); 2230 if (ret) 2231 return ret; 2232 2233 if (shutdown) { 2234 return nvme_wait_ready(ctrl, NVME_CSTS_SHST_MASK, 2235 NVME_CSTS_SHST_CMPLT, 2236 ctrl->shutdown_timeout, "shutdown"); 2237 } 2238 if (ctrl->quirks & NVME_QUIRK_DELAY_BEFORE_CHK_RDY) 2239 msleep(NVME_QUIRK_DELAY_AMOUNT); 2240 return nvme_wait_ready(ctrl, NVME_CSTS_RDY, 0, 2241 (NVME_CAP_TIMEOUT(ctrl->cap) + 1) / 2, "reset"); 2242 } 2243 EXPORT_SYMBOL_GPL(nvme_disable_ctrl); 2244 2245 int nvme_enable_ctrl(struct nvme_ctrl *ctrl) 2246 { 2247 unsigned dev_page_min; 2248 u32 timeout; 2249 int ret; 2250 2251 ret = ctrl->ops->reg_read64(ctrl, NVME_REG_CAP, &ctrl->cap); 2252 if (ret) { 2253 dev_err(ctrl->device, "Reading CAP failed (%d)\n", ret); 2254 return ret; 2255 } 2256 dev_page_min = NVME_CAP_MPSMIN(ctrl->cap) + 12; 2257 2258 if (NVME_CTRL_PAGE_SHIFT < dev_page_min) { 2259 dev_err(ctrl->device, 2260 "Minimum device page size %u too large for host (%u)\n", 2261 1 << dev_page_min, 1 << NVME_CTRL_PAGE_SHIFT); 2262 return -ENODEV; 2263 } 2264 2265 if (NVME_CAP_CSS(ctrl->cap) & NVME_CAP_CSS_CSI) 2266 ctrl->ctrl_config = NVME_CC_CSS_CSI; 2267 else 2268 ctrl->ctrl_config = NVME_CC_CSS_NVM; 2269 2270 if (ctrl->cap & NVME_CAP_CRMS_CRWMS && ctrl->cap & NVME_CAP_CRMS_CRIMS) 2271 ctrl->ctrl_config |= NVME_CC_CRIME; 2272 2273 ctrl->ctrl_config |= (NVME_CTRL_PAGE_SHIFT - 12) << NVME_CC_MPS_SHIFT; 2274 ctrl->ctrl_config |= NVME_CC_AMS_RR | NVME_CC_SHN_NONE; 2275 ctrl->ctrl_config |= NVME_CC_IOSQES | NVME_CC_IOCQES; 2276 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config); 2277 if (ret) 2278 return ret; 2279 2280 /* Flush write to device (required if transport is PCI) */ 2281 ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CC, &ctrl->ctrl_config); 2282 if (ret) 2283 return ret; 2284 2285 /* CAP value may change after initial CC write */ 2286 ret = ctrl->ops->reg_read64(ctrl, NVME_REG_CAP, &ctrl->cap); 2287 if (ret) 2288 return ret; 2289 2290 timeout = NVME_CAP_TIMEOUT(ctrl->cap); 2291 if (ctrl->cap & NVME_CAP_CRMS_CRWMS) { 2292 u32 crto, ready_timeout; 2293 2294 ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CRTO, &crto); 2295 if (ret) { 2296 dev_err(ctrl->device, "Reading CRTO failed (%d)\n", 2297 ret); 2298 return ret; 2299 } 2300 2301 /* 2302 * CRTO should always be greater or equal to CAP.TO, but some 2303 * devices are known to get this wrong. Use the larger of the 2304 * two values. 2305 */ 2306 if (ctrl->ctrl_config & NVME_CC_CRIME) 2307 ready_timeout = NVME_CRTO_CRIMT(crto); 2308 else 2309 ready_timeout = NVME_CRTO_CRWMT(crto); 2310 2311 if (ready_timeout < timeout) 2312 dev_warn_once(ctrl->device, "bad crto:%x cap:%llx\n", 2313 crto, ctrl->cap); 2314 else 2315 timeout = ready_timeout; 2316 } 2317 2318 ctrl->ctrl_config |= NVME_CC_ENABLE; 2319 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config); 2320 if (ret) 2321 return ret; 2322 return nvme_wait_ready(ctrl, NVME_CSTS_RDY, NVME_CSTS_RDY, 2323 (timeout + 1) / 2, "initialisation"); 2324 } 2325 EXPORT_SYMBOL_GPL(nvme_enable_ctrl); 2326 2327 static int nvme_configure_timestamp(struct nvme_ctrl *ctrl) 2328 { 2329 __le64 ts; 2330 int ret; 2331 2332 if (!(ctrl->oncs & NVME_CTRL_ONCS_TIMESTAMP)) 2333 return 0; 2334 2335 ts = cpu_to_le64(ktime_to_ms(ktime_get_real())); 2336 ret = nvme_set_features(ctrl, NVME_FEAT_TIMESTAMP, 0, &ts, sizeof(ts), 2337 NULL); 2338 if (ret) 2339 dev_warn_once(ctrl->device, 2340 "could not set timestamp (%d)\n", ret); 2341 return ret; 2342 } 2343 2344 static int nvme_configure_host_options(struct nvme_ctrl *ctrl) 2345 { 2346 struct nvme_feat_host_behavior *host; 2347 u8 acre = 0, lbafee = 0; 2348 int ret; 2349 2350 /* Don't bother enabling the feature if retry delay is not reported */ 2351 if (ctrl->crdt[0]) 2352 acre = NVME_ENABLE_ACRE; 2353 if (ctrl->ctratt & NVME_CTRL_ATTR_ELBAS) 2354 lbafee = NVME_ENABLE_LBAFEE; 2355 2356 if (!acre && !lbafee) 2357 return 0; 2358 2359 host = kzalloc(sizeof(*host), GFP_KERNEL); 2360 if (!host) 2361 return 0; 2362 2363 host->acre = acre; 2364 host->lbafee = lbafee; 2365 ret = nvme_set_features(ctrl, NVME_FEAT_HOST_BEHAVIOR, 0, 2366 host, sizeof(*host), NULL); 2367 kfree(host); 2368 return ret; 2369 } 2370 2371 /* 2372 * The function checks whether the given total (exlat + enlat) latency of 2373 * a power state allows the latter to be used as an APST transition target. 2374 * It does so by comparing the latency to the primary and secondary latency 2375 * tolerances defined by module params. If there's a match, the corresponding 2376 * timeout value is returned and the matching tolerance index (1 or 2) is 2377 * reported. 2378 */ 2379 static bool nvme_apst_get_transition_time(u64 total_latency, 2380 u64 *transition_time, unsigned *last_index) 2381 { 2382 if (total_latency <= apst_primary_latency_tol_us) { 2383 if (*last_index == 1) 2384 return false; 2385 *last_index = 1; 2386 *transition_time = apst_primary_timeout_ms; 2387 return true; 2388 } 2389 if (apst_secondary_timeout_ms && 2390 total_latency <= apst_secondary_latency_tol_us) { 2391 if (*last_index <= 2) 2392 return false; 2393 *last_index = 2; 2394 *transition_time = apst_secondary_timeout_ms; 2395 return true; 2396 } 2397 return false; 2398 } 2399 2400 /* 2401 * APST (Autonomous Power State Transition) lets us program a table of power 2402 * state transitions that the controller will perform automatically. 2403 * 2404 * Depending on module params, one of the two supported techniques will be used: 2405 * 2406 * - If the parameters provide explicit timeouts and tolerances, they will be 2407 * used to build a table with up to 2 non-operational states to transition to. 2408 * The default parameter values were selected based on the values used by 2409 * Microsoft's and Intel's NVMe drivers. Yet, since we don't implement dynamic 2410 * regeneration of the APST table in the event of switching between external 2411 * and battery power, the timeouts and tolerances reflect a compromise 2412 * between values used by Microsoft for AC and battery scenarios. 2413 * - If not, we'll configure the table with a simple heuristic: we are willing 2414 * to spend at most 2% of the time transitioning between power states. 2415 * Therefore, when running in any given state, we will enter the next 2416 * lower-power non-operational state after waiting 50 * (enlat + exlat) 2417 * microseconds, as long as that state's exit latency is under the requested 2418 * maximum latency. 2419 * 2420 * We will not autonomously enter any non-operational state for which the total 2421 * latency exceeds ps_max_latency_us. 2422 * 2423 * Users can set ps_max_latency_us to zero to turn off APST. 2424 */ 2425 static int nvme_configure_apst(struct nvme_ctrl *ctrl) 2426 { 2427 struct nvme_feat_auto_pst *table; 2428 unsigned apste = 0; 2429 u64 max_lat_us = 0; 2430 __le64 target = 0; 2431 int max_ps = -1; 2432 int state; 2433 int ret; 2434 unsigned last_lt_index = UINT_MAX; 2435 2436 /* 2437 * If APST isn't supported or if we haven't been initialized yet, 2438 * then don't do anything. 2439 */ 2440 if (!ctrl->apsta) 2441 return 0; 2442 2443 if (ctrl->npss > 31) { 2444 dev_warn(ctrl->device, "NPSS is invalid; not using APST\n"); 2445 return 0; 2446 } 2447 2448 table = kzalloc(sizeof(*table), GFP_KERNEL); 2449 if (!table) 2450 return 0; 2451 2452 if (!ctrl->apst_enabled || ctrl->ps_max_latency_us == 0) { 2453 /* Turn off APST. */ 2454 dev_dbg(ctrl->device, "APST disabled\n"); 2455 goto done; 2456 } 2457 2458 /* 2459 * Walk through all states from lowest- to highest-power. 2460 * According to the spec, lower-numbered states use more power. NPSS, 2461 * despite the name, is the index of the lowest-power state, not the 2462 * number of states. 2463 */ 2464 for (state = (int)ctrl->npss; state >= 0; state--) { 2465 u64 total_latency_us, exit_latency_us, transition_ms; 2466 2467 if (target) 2468 table->entries[state] = target; 2469 2470 /* 2471 * Don't allow transitions to the deepest state if it's quirked 2472 * off. 2473 */ 2474 if (state == ctrl->npss && 2475 (ctrl->quirks & NVME_QUIRK_NO_DEEPEST_PS)) 2476 continue; 2477 2478 /* 2479 * Is this state a useful non-operational state for higher-power 2480 * states to autonomously transition to? 2481 */ 2482 if (!(ctrl->psd[state].flags & NVME_PS_FLAGS_NON_OP_STATE)) 2483 continue; 2484 2485 exit_latency_us = (u64)le32_to_cpu(ctrl->psd[state].exit_lat); 2486 if (exit_latency_us > ctrl->ps_max_latency_us) 2487 continue; 2488 2489 total_latency_us = exit_latency_us + 2490 le32_to_cpu(ctrl->psd[state].entry_lat); 2491 2492 /* 2493 * This state is good. It can be used as the APST idle target 2494 * for higher power states. 2495 */ 2496 if (apst_primary_timeout_ms && apst_primary_latency_tol_us) { 2497 if (!nvme_apst_get_transition_time(total_latency_us, 2498 &transition_ms, &last_lt_index)) 2499 continue; 2500 } else { 2501 transition_ms = total_latency_us + 19; 2502 do_div(transition_ms, 20); 2503 if (transition_ms > (1 << 24) - 1) 2504 transition_ms = (1 << 24) - 1; 2505 } 2506 2507 target = cpu_to_le64((state << 3) | (transition_ms << 8)); 2508 if (max_ps == -1) 2509 max_ps = state; 2510 if (total_latency_us > max_lat_us) 2511 max_lat_us = total_latency_us; 2512 } 2513 2514 if (max_ps == -1) 2515 dev_dbg(ctrl->device, "APST enabled but no non-operational states are available\n"); 2516 else 2517 dev_dbg(ctrl->device, "APST enabled: max PS = %d, max round-trip latency = %lluus, table = %*phN\n", 2518 max_ps, max_lat_us, (int)sizeof(*table), table); 2519 apste = 1; 2520 2521 done: 2522 ret = nvme_set_features(ctrl, NVME_FEAT_AUTO_PST, apste, 2523 table, sizeof(*table), NULL); 2524 if (ret) 2525 dev_err(ctrl->device, "failed to set APST feature (%d)\n", ret); 2526 kfree(table); 2527 return ret; 2528 } 2529 2530 static void nvme_set_latency_tolerance(struct device *dev, s32 val) 2531 { 2532 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 2533 u64 latency; 2534 2535 switch (val) { 2536 case PM_QOS_LATENCY_TOLERANCE_NO_CONSTRAINT: 2537 case PM_QOS_LATENCY_ANY: 2538 latency = U64_MAX; 2539 break; 2540 2541 default: 2542 latency = val; 2543 } 2544 2545 if (ctrl->ps_max_latency_us != latency) { 2546 ctrl->ps_max_latency_us = latency; 2547 if (nvme_ctrl_state(ctrl) == NVME_CTRL_LIVE) 2548 nvme_configure_apst(ctrl); 2549 } 2550 } 2551 2552 struct nvme_core_quirk_entry { 2553 /* 2554 * NVMe model and firmware strings are padded with spaces. For 2555 * simplicity, strings in the quirk table are padded with NULLs 2556 * instead. 2557 */ 2558 u16 vid; 2559 const char *mn; 2560 const char *fr; 2561 unsigned long quirks; 2562 }; 2563 2564 static const struct nvme_core_quirk_entry core_quirks[] = { 2565 { 2566 /* 2567 * This Toshiba device seems to die using any APST states. See: 2568 * https://bugs.launchpad.net/ubuntu/+source/linux/+bug/1678184/comments/11 2569 */ 2570 .vid = 0x1179, 2571 .mn = "THNSF5256GPUK TOSHIBA", 2572 .quirks = NVME_QUIRK_NO_APST, 2573 }, 2574 { 2575 /* 2576 * This LiteON CL1-3D*-Q11 firmware version has a race 2577 * condition associated with actions related to suspend to idle 2578 * LiteON has resolved the problem in future firmware 2579 */ 2580 .vid = 0x14a4, 2581 .fr = "22301111", 2582 .quirks = NVME_QUIRK_SIMPLE_SUSPEND, 2583 }, 2584 { 2585 /* 2586 * This Kioxia CD6-V Series / HPE PE8030 device times out and 2587 * aborts I/O during any load, but more easily reproducible 2588 * with discards (fstrim). 2589 * 2590 * The device is left in a state where it is also not possible 2591 * to use "nvme set-feature" to disable APST, but booting with 2592 * nvme_core.default_ps_max_latency=0 works. 2593 */ 2594 .vid = 0x1e0f, 2595 .mn = "KCD6XVUL6T40", 2596 .quirks = NVME_QUIRK_NO_APST, 2597 }, 2598 { 2599 /* 2600 * The external Samsung X5 SSD fails initialization without a 2601 * delay before checking if it is ready and has a whole set of 2602 * other problems. To make this even more interesting, it 2603 * shares the PCI ID with internal Samsung 970 Evo Plus that 2604 * does not need or want these quirks. 2605 */ 2606 .vid = 0x144d, 2607 .mn = "Samsung Portable SSD X5", 2608 .quirks = NVME_QUIRK_DELAY_BEFORE_CHK_RDY | 2609 NVME_QUIRK_NO_DEEPEST_PS | 2610 NVME_QUIRK_IGNORE_DEV_SUBNQN, 2611 } 2612 }; 2613 2614 /* match is null-terminated but idstr is space-padded. */ 2615 static bool string_matches(const char *idstr, const char *match, size_t len) 2616 { 2617 size_t matchlen; 2618 2619 if (!match) 2620 return true; 2621 2622 matchlen = strlen(match); 2623 WARN_ON_ONCE(matchlen > len); 2624 2625 if (memcmp(idstr, match, matchlen)) 2626 return false; 2627 2628 for (; matchlen < len; matchlen++) 2629 if (idstr[matchlen] != ' ') 2630 return false; 2631 2632 return true; 2633 } 2634 2635 static bool quirk_matches(const struct nvme_id_ctrl *id, 2636 const struct nvme_core_quirk_entry *q) 2637 { 2638 return q->vid == le16_to_cpu(id->vid) && 2639 string_matches(id->mn, q->mn, sizeof(id->mn)) && 2640 string_matches(id->fr, q->fr, sizeof(id->fr)); 2641 } 2642 2643 static void nvme_init_subnqn(struct nvme_subsystem *subsys, struct nvme_ctrl *ctrl, 2644 struct nvme_id_ctrl *id) 2645 { 2646 size_t nqnlen; 2647 int off; 2648 2649 if(!(ctrl->quirks & NVME_QUIRK_IGNORE_DEV_SUBNQN)) { 2650 nqnlen = strnlen(id->subnqn, NVMF_NQN_SIZE); 2651 if (nqnlen > 0 && nqnlen < NVMF_NQN_SIZE) { 2652 strscpy(subsys->subnqn, id->subnqn, NVMF_NQN_SIZE); 2653 return; 2654 } 2655 2656 if (ctrl->vs >= NVME_VS(1, 2, 1)) 2657 dev_warn(ctrl->device, "missing or invalid SUBNQN field.\n"); 2658 } 2659 2660 /* 2661 * Generate a "fake" NQN similar to the one in Section 4.5 of the NVMe 2662 * Base Specification 2.0. It is slightly different from the format 2663 * specified there due to historic reasons, and we can't change it now. 2664 */ 2665 off = snprintf(subsys->subnqn, NVMF_NQN_SIZE, 2666 "nqn.2014.08.org.nvmexpress:%04x%04x", 2667 le16_to_cpu(id->vid), le16_to_cpu(id->ssvid)); 2668 memcpy(subsys->subnqn + off, id->sn, sizeof(id->sn)); 2669 off += sizeof(id->sn); 2670 memcpy(subsys->subnqn + off, id->mn, sizeof(id->mn)); 2671 off += sizeof(id->mn); 2672 memset(subsys->subnqn + off, 0, sizeof(subsys->subnqn) - off); 2673 } 2674 2675 static void nvme_release_subsystem(struct device *dev) 2676 { 2677 struct nvme_subsystem *subsys = 2678 container_of(dev, struct nvme_subsystem, dev); 2679 2680 if (subsys->instance >= 0) 2681 ida_free(&nvme_instance_ida, subsys->instance); 2682 kfree(subsys); 2683 } 2684 2685 static void nvme_destroy_subsystem(struct kref *ref) 2686 { 2687 struct nvme_subsystem *subsys = 2688 container_of(ref, struct nvme_subsystem, ref); 2689 2690 mutex_lock(&nvme_subsystems_lock); 2691 list_del(&subsys->entry); 2692 mutex_unlock(&nvme_subsystems_lock); 2693 2694 ida_destroy(&subsys->ns_ida); 2695 device_del(&subsys->dev); 2696 put_device(&subsys->dev); 2697 } 2698 2699 static void nvme_put_subsystem(struct nvme_subsystem *subsys) 2700 { 2701 kref_put(&subsys->ref, nvme_destroy_subsystem); 2702 } 2703 2704 static struct nvme_subsystem *__nvme_find_get_subsystem(const char *subsysnqn) 2705 { 2706 struct nvme_subsystem *subsys; 2707 2708 lockdep_assert_held(&nvme_subsystems_lock); 2709 2710 /* 2711 * Fail matches for discovery subsystems. This results 2712 * in each discovery controller bound to a unique subsystem. 2713 * This avoids issues with validating controller values 2714 * that can only be true when there is a single unique subsystem. 2715 * There may be multiple and completely independent entities 2716 * that provide discovery controllers. 2717 */ 2718 if (!strcmp(subsysnqn, NVME_DISC_SUBSYS_NAME)) 2719 return NULL; 2720 2721 list_for_each_entry(subsys, &nvme_subsystems, entry) { 2722 if (strcmp(subsys->subnqn, subsysnqn)) 2723 continue; 2724 if (!kref_get_unless_zero(&subsys->ref)) 2725 continue; 2726 return subsys; 2727 } 2728 2729 return NULL; 2730 } 2731 2732 static inline bool nvme_discovery_ctrl(struct nvme_ctrl *ctrl) 2733 { 2734 return ctrl->opts && ctrl->opts->discovery_nqn; 2735 } 2736 2737 static bool nvme_validate_cntlid(struct nvme_subsystem *subsys, 2738 struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id) 2739 { 2740 struct nvme_ctrl *tmp; 2741 2742 lockdep_assert_held(&nvme_subsystems_lock); 2743 2744 list_for_each_entry(tmp, &subsys->ctrls, subsys_entry) { 2745 if (nvme_state_terminal(tmp)) 2746 continue; 2747 2748 if (tmp->cntlid == ctrl->cntlid) { 2749 dev_err(ctrl->device, 2750 "Duplicate cntlid %u with %s, subsys %s, rejecting\n", 2751 ctrl->cntlid, dev_name(tmp->device), 2752 subsys->subnqn); 2753 return false; 2754 } 2755 2756 if ((id->cmic & NVME_CTRL_CMIC_MULTI_CTRL) || 2757 nvme_discovery_ctrl(ctrl)) 2758 continue; 2759 2760 dev_err(ctrl->device, 2761 "Subsystem does not support multiple controllers\n"); 2762 return false; 2763 } 2764 2765 return true; 2766 } 2767 2768 static int nvme_init_subsystem(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id) 2769 { 2770 struct nvme_subsystem *subsys, *found; 2771 int ret; 2772 2773 subsys = kzalloc(sizeof(*subsys), GFP_KERNEL); 2774 if (!subsys) 2775 return -ENOMEM; 2776 2777 subsys->instance = -1; 2778 mutex_init(&subsys->lock); 2779 kref_init(&subsys->ref); 2780 INIT_LIST_HEAD(&subsys->ctrls); 2781 INIT_LIST_HEAD(&subsys->nsheads); 2782 nvme_init_subnqn(subsys, ctrl, id); 2783 memcpy(subsys->serial, id->sn, sizeof(subsys->serial)); 2784 memcpy(subsys->model, id->mn, sizeof(subsys->model)); 2785 subsys->vendor_id = le16_to_cpu(id->vid); 2786 subsys->cmic = id->cmic; 2787 2788 /* Versions prior to 1.4 don't necessarily report a valid type */ 2789 if (id->cntrltype == NVME_CTRL_DISC || 2790 !strcmp(subsys->subnqn, NVME_DISC_SUBSYS_NAME)) 2791 subsys->subtype = NVME_NQN_DISC; 2792 else 2793 subsys->subtype = NVME_NQN_NVME; 2794 2795 if (nvme_discovery_ctrl(ctrl) && subsys->subtype != NVME_NQN_DISC) { 2796 dev_err(ctrl->device, 2797 "Subsystem %s is not a discovery controller", 2798 subsys->subnqn); 2799 kfree(subsys); 2800 return -EINVAL; 2801 } 2802 subsys->awupf = le16_to_cpu(id->awupf); 2803 nvme_mpath_default_iopolicy(subsys); 2804 2805 subsys->dev.class = nvme_subsys_class; 2806 subsys->dev.release = nvme_release_subsystem; 2807 subsys->dev.groups = nvme_subsys_attrs_groups; 2808 dev_set_name(&subsys->dev, "nvme-subsys%d", ctrl->instance); 2809 device_initialize(&subsys->dev); 2810 2811 mutex_lock(&nvme_subsystems_lock); 2812 found = __nvme_find_get_subsystem(subsys->subnqn); 2813 if (found) { 2814 put_device(&subsys->dev); 2815 subsys = found; 2816 2817 if (!nvme_validate_cntlid(subsys, ctrl, id)) { 2818 ret = -EINVAL; 2819 goto out_put_subsystem; 2820 } 2821 } else { 2822 ret = device_add(&subsys->dev); 2823 if (ret) { 2824 dev_err(ctrl->device, 2825 "failed to register subsystem device.\n"); 2826 put_device(&subsys->dev); 2827 goto out_unlock; 2828 } 2829 ida_init(&subsys->ns_ida); 2830 list_add_tail(&subsys->entry, &nvme_subsystems); 2831 } 2832 2833 ret = sysfs_create_link(&subsys->dev.kobj, &ctrl->device->kobj, 2834 dev_name(ctrl->device)); 2835 if (ret) { 2836 dev_err(ctrl->device, 2837 "failed to create sysfs link from subsystem.\n"); 2838 goto out_put_subsystem; 2839 } 2840 2841 if (!found) 2842 subsys->instance = ctrl->instance; 2843 ctrl->subsys = subsys; 2844 list_add_tail(&ctrl->subsys_entry, &subsys->ctrls); 2845 mutex_unlock(&nvme_subsystems_lock); 2846 return 0; 2847 2848 out_put_subsystem: 2849 nvme_put_subsystem(subsys); 2850 out_unlock: 2851 mutex_unlock(&nvme_subsystems_lock); 2852 return ret; 2853 } 2854 2855 int nvme_get_log(struct nvme_ctrl *ctrl, u32 nsid, u8 log_page, u8 lsp, u8 csi, 2856 void *log, size_t size, u64 offset) 2857 { 2858 struct nvme_command c = { }; 2859 u32 dwlen = nvme_bytes_to_numd(size); 2860 2861 c.get_log_page.opcode = nvme_admin_get_log_page; 2862 c.get_log_page.nsid = cpu_to_le32(nsid); 2863 c.get_log_page.lid = log_page; 2864 c.get_log_page.lsp = lsp; 2865 c.get_log_page.numdl = cpu_to_le16(dwlen & ((1 << 16) - 1)); 2866 c.get_log_page.numdu = cpu_to_le16(dwlen >> 16); 2867 c.get_log_page.lpol = cpu_to_le32(lower_32_bits(offset)); 2868 c.get_log_page.lpou = cpu_to_le32(upper_32_bits(offset)); 2869 c.get_log_page.csi = csi; 2870 2871 return nvme_submit_sync_cmd(ctrl->admin_q, &c, log, size); 2872 } 2873 2874 static int nvme_get_effects_log(struct nvme_ctrl *ctrl, u8 csi, 2875 struct nvme_effects_log **log) 2876 { 2877 struct nvme_effects_log *cel = xa_load(&ctrl->cels, csi); 2878 int ret; 2879 2880 if (cel) 2881 goto out; 2882 2883 cel = kzalloc(sizeof(*cel), GFP_KERNEL); 2884 if (!cel) 2885 return -ENOMEM; 2886 2887 ret = nvme_get_log(ctrl, 0x00, NVME_LOG_CMD_EFFECTS, 0, csi, 2888 cel, sizeof(*cel), 0); 2889 if (ret) { 2890 kfree(cel); 2891 return ret; 2892 } 2893 2894 xa_store(&ctrl->cels, csi, cel, GFP_KERNEL); 2895 out: 2896 *log = cel; 2897 return 0; 2898 } 2899 2900 static inline u32 nvme_mps_to_sectors(struct nvme_ctrl *ctrl, u32 units) 2901 { 2902 u32 page_shift = NVME_CAP_MPSMIN(ctrl->cap) + 12, val; 2903 2904 if (check_shl_overflow(1U, units + page_shift - 9, &val)) 2905 return UINT_MAX; 2906 return val; 2907 } 2908 2909 static int nvme_init_non_mdts_limits(struct nvme_ctrl *ctrl) 2910 { 2911 struct nvme_command c = { }; 2912 struct nvme_id_ctrl_nvm *id; 2913 int ret; 2914 2915 if (ctrl->oncs & NVME_CTRL_ONCS_DSM) { 2916 ctrl->max_discard_sectors = UINT_MAX; 2917 ctrl->max_discard_segments = NVME_DSM_MAX_RANGES; 2918 } else { 2919 ctrl->max_discard_sectors = 0; 2920 ctrl->max_discard_segments = 0; 2921 } 2922 2923 /* 2924 * Even though NVMe spec explicitly states that MDTS is not applicable 2925 * to the write-zeroes, we are cautious and limit the size to the 2926 * controllers max_hw_sectors value, which is based on the MDTS field 2927 * and possibly other limiting factors. 2928 */ 2929 if ((ctrl->oncs & NVME_CTRL_ONCS_WRITE_ZEROES) && 2930 !(ctrl->quirks & NVME_QUIRK_DISABLE_WRITE_ZEROES)) 2931 ctrl->max_zeroes_sectors = ctrl->max_hw_sectors; 2932 else 2933 ctrl->max_zeroes_sectors = 0; 2934 2935 if (ctrl->subsys->subtype != NVME_NQN_NVME || 2936 nvme_ctrl_limited_cns(ctrl) || 2937 test_bit(NVME_CTRL_SKIP_ID_CNS_CS, &ctrl->flags)) 2938 return 0; 2939 2940 id = kzalloc(sizeof(*id), GFP_KERNEL); 2941 if (!id) 2942 return -ENOMEM; 2943 2944 c.identify.opcode = nvme_admin_identify; 2945 c.identify.cns = NVME_ID_CNS_CS_CTRL; 2946 c.identify.csi = NVME_CSI_NVM; 2947 2948 ret = nvme_submit_sync_cmd(ctrl->admin_q, &c, id, sizeof(*id)); 2949 if (ret) 2950 goto free_data; 2951 2952 if (id->dmrl) 2953 ctrl->max_discard_segments = id->dmrl; 2954 ctrl->dmrsl = le32_to_cpu(id->dmrsl); 2955 if (id->wzsl) 2956 ctrl->max_zeroes_sectors = nvme_mps_to_sectors(ctrl, id->wzsl); 2957 2958 free_data: 2959 if (ret > 0) 2960 set_bit(NVME_CTRL_SKIP_ID_CNS_CS, &ctrl->flags); 2961 kfree(id); 2962 return ret; 2963 } 2964 2965 static void nvme_init_known_nvm_effects(struct nvme_ctrl *ctrl) 2966 { 2967 struct nvme_effects_log *log = ctrl->effects; 2968 2969 log->acs[nvme_admin_format_nvm] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC | 2970 NVME_CMD_EFFECTS_NCC | 2971 NVME_CMD_EFFECTS_CSE_MASK); 2972 log->acs[nvme_admin_sanitize_nvm] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC | 2973 NVME_CMD_EFFECTS_CSE_MASK); 2974 2975 /* 2976 * The spec says the result of a security receive command depends on 2977 * the previous security send command. As such, many vendors log this 2978 * command as one to submitted only when no other commands to the same 2979 * namespace are outstanding. The intention is to tell the host to 2980 * prevent mixing security send and receive. 2981 * 2982 * This driver can only enforce such exclusive access against IO 2983 * queues, though. We are not readily able to enforce such a rule for 2984 * two commands to the admin queue, which is the only queue that 2985 * matters for this command. 2986 * 2987 * Rather than blindly freezing the IO queues for this effect that 2988 * doesn't even apply to IO, mask it off. 2989 */ 2990 log->acs[nvme_admin_security_recv] &= cpu_to_le32(~NVME_CMD_EFFECTS_CSE_MASK); 2991 2992 log->iocs[nvme_cmd_write] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC); 2993 log->iocs[nvme_cmd_write_zeroes] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC); 2994 log->iocs[nvme_cmd_write_uncor] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC); 2995 } 2996 2997 static int nvme_init_effects(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id) 2998 { 2999 int ret = 0; 3000 3001 if (ctrl->effects) 3002 return 0; 3003 3004 if (id->lpa & NVME_CTRL_LPA_CMD_EFFECTS_LOG) { 3005 ret = nvme_get_effects_log(ctrl, NVME_CSI_NVM, &ctrl->effects); 3006 if (ret < 0) 3007 return ret; 3008 } 3009 3010 if (!ctrl->effects) { 3011 ctrl->effects = kzalloc(sizeof(*ctrl->effects), GFP_KERNEL); 3012 if (!ctrl->effects) 3013 return -ENOMEM; 3014 xa_store(&ctrl->cels, NVME_CSI_NVM, ctrl->effects, GFP_KERNEL); 3015 } 3016 3017 nvme_init_known_nvm_effects(ctrl); 3018 return 0; 3019 } 3020 3021 static int nvme_init_identify(struct nvme_ctrl *ctrl) 3022 { 3023 struct nvme_id_ctrl *id; 3024 u32 max_hw_sectors; 3025 bool prev_apst_enabled; 3026 int ret; 3027 3028 ret = nvme_identify_ctrl(ctrl, &id); 3029 if (ret) { 3030 dev_err(ctrl->device, "Identify Controller failed (%d)\n", ret); 3031 return -EIO; 3032 } 3033 3034 if (!(ctrl->ops->flags & NVME_F_FABRICS)) 3035 ctrl->cntlid = le16_to_cpu(id->cntlid); 3036 3037 if (!ctrl->identified) { 3038 unsigned int i; 3039 3040 /* 3041 * Check for quirks. Quirk can depend on firmware version, 3042 * so, in principle, the set of quirks present can change 3043 * across a reset. As a possible future enhancement, we 3044 * could re-scan for quirks every time we reinitialize 3045 * the device, but we'd have to make sure that the driver 3046 * behaves intelligently if the quirks change. 3047 */ 3048 for (i = 0; i < ARRAY_SIZE(core_quirks); i++) { 3049 if (quirk_matches(id, &core_quirks[i])) 3050 ctrl->quirks |= core_quirks[i].quirks; 3051 } 3052 3053 ret = nvme_init_subsystem(ctrl, id); 3054 if (ret) 3055 goto out_free; 3056 3057 ret = nvme_init_effects(ctrl, id); 3058 if (ret) 3059 goto out_free; 3060 } 3061 memcpy(ctrl->subsys->firmware_rev, id->fr, 3062 sizeof(ctrl->subsys->firmware_rev)); 3063 3064 if (force_apst && (ctrl->quirks & NVME_QUIRK_NO_DEEPEST_PS)) { 3065 dev_warn(ctrl->device, "forcibly allowing all power states due to nvme_core.force_apst -- use at your own risk\n"); 3066 ctrl->quirks &= ~NVME_QUIRK_NO_DEEPEST_PS; 3067 } 3068 3069 ctrl->crdt[0] = le16_to_cpu(id->crdt1); 3070 ctrl->crdt[1] = le16_to_cpu(id->crdt2); 3071 ctrl->crdt[2] = le16_to_cpu(id->crdt3); 3072 3073 ctrl->oacs = le16_to_cpu(id->oacs); 3074 ctrl->oncs = le16_to_cpu(id->oncs); 3075 ctrl->mtfa = le16_to_cpu(id->mtfa); 3076 ctrl->oaes = le32_to_cpu(id->oaes); 3077 ctrl->wctemp = le16_to_cpu(id->wctemp); 3078 ctrl->cctemp = le16_to_cpu(id->cctemp); 3079 3080 atomic_set(&ctrl->abort_limit, id->acl + 1); 3081 ctrl->vwc = id->vwc; 3082 if (id->mdts) 3083 max_hw_sectors = nvme_mps_to_sectors(ctrl, id->mdts); 3084 else 3085 max_hw_sectors = UINT_MAX; 3086 ctrl->max_hw_sectors = 3087 min_not_zero(ctrl->max_hw_sectors, max_hw_sectors); 3088 3089 nvme_set_queue_limits(ctrl, ctrl->admin_q); 3090 ctrl->sgls = le32_to_cpu(id->sgls); 3091 ctrl->kas = le16_to_cpu(id->kas); 3092 ctrl->max_namespaces = le32_to_cpu(id->mnan); 3093 ctrl->ctratt = le32_to_cpu(id->ctratt); 3094 3095 ctrl->cntrltype = id->cntrltype; 3096 ctrl->dctype = id->dctype; 3097 3098 if (id->rtd3e) { 3099 /* us -> s */ 3100 u32 transition_time = le32_to_cpu(id->rtd3e) / USEC_PER_SEC; 3101 3102 ctrl->shutdown_timeout = clamp_t(unsigned int, transition_time, 3103 shutdown_timeout, 60); 3104 3105 if (ctrl->shutdown_timeout != shutdown_timeout) 3106 dev_info(ctrl->device, 3107 "Shutdown timeout set to %u seconds\n", 3108 ctrl->shutdown_timeout); 3109 } else 3110 ctrl->shutdown_timeout = shutdown_timeout; 3111 3112 ctrl->npss = id->npss; 3113 ctrl->apsta = id->apsta; 3114 prev_apst_enabled = ctrl->apst_enabled; 3115 if (ctrl->quirks & NVME_QUIRK_NO_APST) { 3116 if (force_apst && id->apsta) { 3117 dev_warn(ctrl->device, "forcibly allowing APST due to nvme_core.force_apst -- use at your own risk\n"); 3118 ctrl->apst_enabled = true; 3119 } else { 3120 ctrl->apst_enabled = false; 3121 } 3122 } else { 3123 ctrl->apst_enabled = id->apsta; 3124 } 3125 memcpy(ctrl->psd, id->psd, sizeof(ctrl->psd)); 3126 3127 if (ctrl->ops->flags & NVME_F_FABRICS) { 3128 ctrl->icdoff = le16_to_cpu(id->icdoff); 3129 ctrl->ioccsz = le32_to_cpu(id->ioccsz); 3130 ctrl->iorcsz = le32_to_cpu(id->iorcsz); 3131 ctrl->maxcmd = le16_to_cpu(id->maxcmd); 3132 3133 /* 3134 * In fabrics we need to verify the cntlid matches the 3135 * admin connect 3136 */ 3137 if (ctrl->cntlid != le16_to_cpu(id->cntlid)) { 3138 dev_err(ctrl->device, 3139 "Mismatching cntlid: Connect %u vs Identify " 3140 "%u, rejecting\n", 3141 ctrl->cntlid, le16_to_cpu(id->cntlid)); 3142 ret = -EINVAL; 3143 goto out_free; 3144 } 3145 3146 if (!nvme_discovery_ctrl(ctrl) && !ctrl->kas) { 3147 dev_err(ctrl->device, 3148 "keep-alive support is mandatory for fabrics\n"); 3149 ret = -EINVAL; 3150 goto out_free; 3151 } 3152 } else { 3153 ctrl->hmpre = le32_to_cpu(id->hmpre); 3154 ctrl->hmmin = le32_to_cpu(id->hmmin); 3155 ctrl->hmminds = le32_to_cpu(id->hmminds); 3156 ctrl->hmmaxd = le16_to_cpu(id->hmmaxd); 3157 } 3158 3159 ret = nvme_mpath_init_identify(ctrl, id); 3160 if (ret < 0) 3161 goto out_free; 3162 3163 if (ctrl->apst_enabled && !prev_apst_enabled) 3164 dev_pm_qos_expose_latency_tolerance(ctrl->device); 3165 else if (!ctrl->apst_enabled && prev_apst_enabled) 3166 dev_pm_qos_hide_latency_tolerance(ctrl->device); 3167 3168 out_free: 3169 kfree(id); 3170 return ret; 3171 } 3172 3173 /* 3174 * Initialize the cached copies of the Identify data and various controller 3175 * register in our nvme_ctrl structure. This should be called as soon as 3176 * the admin queue is fully up and running. 3177 */ 3178 int nvme_init_ctrl_finish(struct nvme_ctrl *ctrl, bool was_suspended) 3179 { 3180 int ret; 3181 3182 ret = ctrl->ops->reg_read32(ctrl, NVME_REG_VS, &ctrl->vs); 3183 if (ret) { 3184 dev_err(ctrl->device, "Reading VS failed (%d)\n", ret); 3185 return ret; 3186 } 3187 3188 ctrl->sqsize = min_t(u16, NVME_CAP_MQES(ctrl->cap), ctrl->sqsize); 3189 3190 if (ctrl->vs >= NVME_VS(1, 1, 0)) 3191 ctrl->subsystem = NVME_CAP_NSSRC(ctrl->cap); 3192 3193 ret = nvme_init_identify(ctrl); 3194 if (ret) 3195 return ret; 3196 3197 ret = nvme_configure_apst(ctrl); 3198 if (ret < 0) 3199 return ret; 3200 3201 ret = nvme_configure_timestamp(ctrl); 3202 if (ret < 0) 3203 return ret; 3204 3205 ret = nvme_configure_host_options(ctrl); 3206 if (ret < 0) 3207 return ret; 3208 3209 nvme_configure_opal(ctrl, was_suspended); 3210 3211 if (!ctrl->identified && !nvme_discovery_ctrl(ctrl)) { 3212 /* 3213 * Do not return errors unless we are in a controller reset, 3214 * the controller works perfectly fine without hwmon. 3215 */ 3216 ret = nvme_hwmon_init(ctrl); 3217 if (ret == -EINTR) 3218 return ret; 3219 } 3220 3221 clear_bit(NVME_CTRL_DIRTY_CAPABILITY, &ctrl->flags); 3222 ctrl->identified = true; 3223 3224 return 0; 3225 } 3226 EXPORT_SYMBOL_GPL(nvme_init_ctrl_finish); 3227 3228 static int nvme_dev_open(struct inode *inode, struct file *file) 3229 { 3230 struct nvme_ctrl *ctrl = 3231 container_of(inode->i_cdev, struct nvme_ctrl, cdev); 3232 3233 switch (nvme_ctrl_state(ctrl)) { 3234 case NVME_CTRL_LIVE: 3235 break; 3236 default: 3237 return -EWOULDBLOCK; 3238 } 3239 3240 nvme_get_ctrl(ctrl); 3241 if (!try_module_get(ctrl->ops->module)) { 3242 nvme_put_ctrl(ctrl); 3243 return -EINVAL; 3244 } 3245 3246 file->private_data = ctrl; 3247 return 0; 3248 } 3249 3250 static int nvme_dev_release(struct inode *inode, struct file *file) 3251 { 3252 struct nvme_ctrl *ctrl = 3253 container_of(inode->i_cdev, struct nvme_ctrl, cdev); 3254 3255 module_put(ctrl->ops->module); 3256 nvme_put_ctrl(ctrl); 3257 return 0; 3258 } 3259 3260 static const struct file_operations nvme_dev_fops = { 3261 .owner = THIS_MODULE, 3262 .open = nvme_dev_open, 3263 .release = nvme_dev_release, 3264 .unlocked_ioctl = nvme_dev_ioctl, 3265 .compat_ioctl = compat_ptr_ioctl, 3266 .uring_cmd = nvme_dev_uring_cmd, 3267 }; 3268 3269 static struct nvme_ns_head *nvme_find_ns_head(struct nvme_ctrl *ctrl, 3270 unsigned nsid) 3271 { 3272 struct nvme_ns_head *h; 3273 3274 lockdep_assert_held(&ctrl->subsys->lock); 3275 3276 list_for_each_entry(h, &ctrl->subsys->nsheads, entry) { 3277 /* 3278 * Private namespaces can share NSIDs under some conditions. 3279 * In that case we can't use the same ns_head for namespaces 3280 * with the same NSID. 3281 */ 3282 if (h->ns_id != nsid || !nvme_is_unique_nsid(ctrl, h)) 3283 continue; 3284 if (!list_empty(&h->list) && nvme_tryget_ns_head(h)) 3285 return h; 3286 } 3287 3288 return NULL; 3289 } 3290 3291 static int nvme_subsys_check_duplicate_ids(struct nvme_subsystem *subsys, 3292 struct nvme_ns_ids *ids) 3293 { 3294 bool has_uuid = !uuid_is_null(&ids->uuid); 3295 bool has_nguid = memchr_inv(ids->nguid, 0, sizeof(ids->nguid)); 3296 bool has_eui64 = memchr_inv(ids->eui64, 0, sizeof(ids->eui64)); 3297 struct nvme_ns_head *h; 3298 3299 lockdep_assert_held(&subsys->lock); 3300 3301 list_for_each_entry(h, &subsys->nsheads, entry) { 3302 if (has_uuid && uuid_equal(&ids->uuid, &h->ids.uuid)) 3303 return -EINVAL; 3304 if (has_nguid && 3305 memcmp(&ids->nguid, &h->ids.nguid, sizeof(ids->nguid)) == 0) 3306 return -EINVAL; 3307 if (has_eui64 && 3308 memcmp(&ids->eui64, &h->ids.eui64, sizeof(ids->eui64)) == 0) 3309 return -EINVAL; 3310 } 3311 3312 return 0; 3313 } 3314 3315 static void nvme_cdev_rel(struct device *dev) 3316 { 3317 ida_free(&nvme_ns_chr_minor_ida, MINOR(dev->devt)); 3318 } 3319 3320 void nvme_cdev_del(struct cdev *cdev, struct device *cdev_device) 3321 { 3322 cdev_device_del(cdev, cdev_device); 3323 put_device(cdev_device); 3324 } 3325 3326 int nvme_cdev_add(struct cdev *cdev, struct device *cdev_device, 3327 const struct file_operations *fops, struct module *owner) 3328 { 3329 int minor, ret; 3330 3331 minor = ida_alloc(&nvme_ns_chr_minor_ida, GFP_KERNEL); 3332 if (minor < 0) 3333 return minor; 3334 cdev_device->devt = MKDEV(MAJOR(nvme_ns_chr_devt), minor); 3335 cdev_device->class = nvme_ns_chr_class; 3336 cdev_device->release = nvme_cdev_rel; 3337 device_initialize(cdev_device); 3338 cdev_init(cdev, fops); 3339 cdev->owner = owner; 3340 ret = cdev_device_add(cdev, cdev_device); 3341 if (ret) 3342 put_device(cdev_device); 3343 3344 return ret; 3345 } 3346 3347 static int nvme_ns_chr_open(struct inode *inode, struct file *file) 3348 { 3349 return nvme_ns_open(container_of(inode->i_cdev, struct nvme_ns, cdev)); 3350 } 3351 3352 static int nvme_ns_chr_release(struct inode *inode, struct file *file) 3353 { 3354 nvme_ns_release(container_of(inode->i_cdev, struct nvme_ns, cdev)); 3355 return 0; 3356 } 3357 3358 static const struct file_operations nvme_ns_chr_fops = { 3359 .owner = THIS_MODULE, 3360 .open = nvme_ns_chr_open, 3361 .release = nvme_ns_chr_release, 3362 .unlocked_ioctl = nvme_ns_chr_ioctl, 3363 .compat_ioctl = compat_ptr_ioctl, 3364 .uring_cmd = nvme_ns_chr_uring_cmd, 3365 .uring_cmd_iopoll = nvme_ns_chr_uring_cmd_iopoll, 3366 }; 3367 3368 static int nvme_add_ns_cdev(struct nvme_ns *ns) 3369 { 3370 int ret; 3371 3372 ns->cdev_device.parent = ns->ctrl->device; 3373 ret = dev_set_name(&ns->cdev_device, "ng%dn%d", 3374 ns->ctrl->instance, ns->head->instance); 3375 if (ret) 3376 return ret; 3377 3378 return nvme_cdev_add(&ns->cdev, &ns->cdev_device, &nvme_ns_chr_fops, 3379 ns->ctrl->ops->module); 3380 } 3381 3382 static struct nvme_ns_head *nvme_alloc_ns_head(struct nvme_ctrl *ctrl, 3383 struct nvme_ns_info *info) 3384 { 3385 struct nvme_ns_head *head; 3386 size_t size = sizeof(*head); 3387 int ret = -ENOMEM; 3388 3389 #ifdef CONFIG_NVME_MULTIPATH 3390 size += num_possible_nodes() * sizeof(struct nvme_ns *); 3391 #endif 3392 3393 head = kzalloc(size, GFP_KERNEL); 3394 if (!head) 3395 goto out; 3396 ret = ida_alloc_min(&ctrl->subsys->ns_ida, 1, GFP_KERNEL); 3397 if (ret < 0) 3398 goto out_free_head; 3399 head->instance = ret; 3400 INIT_LIST_HEAD(&head->list); 3401 ret = init_srcu_struct(&head->srcu); 3402 if (ret) 3403 goto out_ida_remove; 3404 head->subsys = ctrl->subsys; 3405 head->ns_id = info->nsid; 3406 head->ids = info->ids; 3407 head->shared = info->is_shared; 3408 kref_init(&head->ref); 3409 3410 if (head->ids.csi) { 3411 ret = nvme_get_effects_log(ctrl, head->ids.csi, &head->effects); 3412 if (ret) 3413 goto out_cleanup_srcu; 3414 } else 3415 head->effects = ctrl->effects; 3416 3417 ret = nvme_mpath_alloc_disk(ctrl, head); 3418 if (ret) 3419 goto out_cleanup_srcu; 3420 3421 list_add_tail(&head->entry, &ctrl->subsys->nsheads); 3422 3423 kref_get(&ctrl->subsys->ref); 3424 3425 return head; 3426 out_cleanup_srcu: 3427 cleanup_srcu_struct(&head->srcu); 3428 out_ida_remove: 3429 ida_free(&ctrl->subsys->ns_ida, head->instance); 3430 out_free_head: 3431 kfree(head); 3432 out: 3433 if (ret > 0) 3434 ret = blk_status_to_errno(nvme_error_status(ret)); 3435 return ERR_PTR(ret); 3436 } 3437 3438 static int nvme_global_check_duplicate_ids(struct nvme_subsystem *this, 3439 struct nvme_ns_ids *ids) 3440 { 3441 struct nvme_subsystem *s; 3442 int ret = 0; 3443 3444 /* 3445 * Note that this check is racy as we try to avoid holding the global 3446 * lock over the whole ns_head creation. But it is only intended as 3447 * a sanity check anyway. 3448 */ 3449 mutex_lock(&nvme_subsystems_lock); 3450 list_for_each_entry(s, &nvme_subsystems, entry) { 3451 if (s == this) 3452 continue; 3453 mutex_lock(&s->lock); 3454 ret = nvme_subsys_check_duplicate_ids(s, ids); 3455 mutex_unlock(&s->lock); 3456 if (ret) 3457 break; 3458 } 3459 mutex_unlock(&nvme_subsystems_lock); 3460 3461 return ret; 3462 } 3463 3464 static int nvme_init_ns_head(struct nvme_ns *ns, struct nvme_ns_info *info) 3465 { 3466 struct nvme_ctrl *ctrl = ns->ctrl; 3467 struct nvme_ns_head *head = NULL; 3468 int ret; 3469 3470 ret = nvme_global_check_duplicate_ids(ctrl->subsys, &info->ids); 3471 if (ret) { 3472 /* 3473 * We've found two different namespaces on two different 3474 * subsystems that report the same ID. This is pretty nasty 3475 * for anything that actually requires unique device 3476 * identification. In the kernel we need this for multipathing, 3477 * and in user space the /dev/disk/by-id/ links rely on it. 3478 * 3479 * If the device also claims to be multi-path capable back off 3480 * here now and refuse the probe the second device as this is a 3481 * recipe for data corruption. If not this is probably a 3482 * cheap consumer device if on the PCIe bus, so let the user 3483 * proceed and use the shiny toy, but warn that with changing 3484 * probing order (which due to our async probing could just be 3485 * device taking longer to startup) the other device could show 3486 * up at any time. 3487 */ 3488 nvme_print_device_info(ctrl); 3489 if ((ns->ctrl->ops->flags & NVME_F_FABRICS) || /* !PCIe */ 3490 ((ns->ctrl->subsys->cmic & NVME_CTRL_CMIC_MULTI_CTRL) && 3491 info->is_shared)) { 3492 dev_err(ctrl->device, 3493 "ignoring nsid %d because of duplicate IDs\n", 3494 info->nsid); 3495 return ret; 3496 } 3497 3498 dev_err(ctrl->device, 3499 "clearing duplicate IDs for nsid %d\n", info->nsid); 3500 dev_err(ctrl->device, 3501 "use of /dev/disk/by-id/ may cause data corruption\n"); 3502 memset(&info->ids.nguid, 0, sizeof(info->ids.nguid)); 3503 memset(&info->ids.uuid, 0, sizeof(info->ids.uuid)); 3504 memset(&info->ids.eui64, 0, sizeof(info->ids.eui64)); 3505 ctrl->quirks |= NVME_QUIRK_BOGUS_NID; 3506 } 3507 3508 mutex_lock(&ctrl->subsys->lock); 3509 head = nvme_find_ns_head(ctrl, info->nsid); 3510 if (!head) { 3511 ret = nvme_subsys_check_duplicate_ids(ctrl->subsys, &info->ids); 3512 if (ret) { 3513 dev_err(ctrl->device, 3514 "duplicate IDs in subsystem for nsid %d\n", 3515 info->nsid); 3516 goto out_unlock; 3517 } 3518 head = nvme_alloc_ns_head(ctrl, info); 3519 if (IS_ERR(head)) { 3520 ret = PTR_ERR(head); 3521 goto out_unlock; 3522 } 3523 } else { 3524 ret = -EINVAL; 3525 if (!info->is_shared || !head->shared) { 3526 dev_err(ctrl->device, 3527 "Duplicate unshared namespace %d\n", 3528 info->nsid); 3529 goto out_put_ns_head; 3530 } 3531 if (!nvme_ns_ids_equal(&head->ids, &info->ids)) { 3532 dev_err(ctrl->device, 3533 "IDs don't match for shared namespace %d\n", 3534 info->nsid); 3535 goto out_put_ns_head; 3536 } 3537 3538 if (!multipath) { 3539 dev_warn(ctrl->device, 3540 "Found shared namespace %d, but multipathing not supported.\n", 3541 info->nsid); 3542 dev_warn_once(ctrl->device, 3543 "Support for shared namespaces without CONFIG_NVME_MULTIPATH is deprecated and will be removed in Linux 6.0\n."); 3544 } 3545 } 3546 3547 list_add_tail_rcu(&ns->siblings, &head->list); 3548 ns->head = head; 3549 mutex_unlock(&ctrl->subsys->lock); 3550 return 0; 3551 3552 out_put_ns_head: 3553 nvme_put_ns_head(head); 3554 out_unlock: 3555 mutex_unlock(&ctrl->subsys->lock); 3556 return ret; 3557 } 3558 3559 struct nvme_ns *nvme_find_get_ns(struct nvme_ctrl *ctrl, unsigned nsid) 3560 { 3561 struct nvme_ns *ns, *ret = NULL; 3562 3563 down_read(&ctrl->namespaces_rwsem); 3564 list_for_each_entry(ns, &ctrl->namespaces, list) { 3565 if (ns->head->ns_id == nsid) { 3566 if (!nvme_get_ns(ns)) 3567 continue; 3568 ret = ns; 3569 break; 3570 } 3571 if (ns->head->ns_id > nsid) 3572 break; 3573 } 3574 up_read(&ctrl->namespaces_rwsem); 3575 return ret; 3576 } 3577 EXPORT_SYMBOL_NS_GPL(nvme_find_get_ns, NVME_TARGET_PASSTHRU); 3578 3579 /* 3580 * Add the namespace to the controller list while keeping the list ordered. 3581 */ 3582 static void nvme_ns_add_to_ctrl_list(struct nvme_ns *ns) 3583 { 3584 struct nvme_ns *tmp; 3585 3586 list_for_each_entry_reverse(tmp, &ns->ctrl->namespaces, list) { 3587 if (tmp->head->ns_id < ns->head->ns_id) { 3588 list_add(&ns->list, &tmp->list); 3589 return; 3590 } 3591 } 3592 list_add(&ns->list, &ns->ctrl->namespaces); 3593 } 3594 3595 static void nvme_alloc_ns(struct nvme_ctrl *ctrl, struct nvme_ns_info *info) 3596 { 3597 struct nvme_ns *ns; 3598 struct gendisk *disk; 3599 int node = ctrl->numa_node; 3600 3601 ns = kzalloc_node(sizeof(*ns), GFP_KERNEL, node); 3602 if (!ns) 3603 return; 3604 3605 disk = blk_mq_alloc_disk(ctrl->tagset, ns); 3606 if (IS_ERR(disk)) 3607 goto out_free_ns; 3608 disk->fops = &nvme_bdev_ops; 3609 disk->private_data = ns; 3610 3611 ns->disk = disk; 3612 ns->queue = disk->queue; 3613 3614 if (ctrl->opts && ctrl->opts->data_digest) 3615 blk_queue_flag_set(QUEUE_FLAG_STABLE_WRITES, ns->queue); 3616 3617 blk_queue_flag_set(QUEUE_FLAG_NONROT, ns->queue); 3618 if (ctrl->ops->supports_pci_p2pdma && 3619 ctrl->ops->supports_pci_p2pdma(ctrl)) 3620 blk_queue_flag_set(QUEUE_FLAG_PCI_P2PDMA, ns->queue); 3621 3622 ns->ctrl = ctrl; 3623 kref_init(&ns->kref); 3624 3625 if (nvme_init_ns_head(ns, info)) 3626 goto out_cleanup_disk; 3627 3628 /* 3629 * If multipathing is enabled, the device name for all disks and not 3630 * just those that represent shared namespaces needs to be based on the 3631 * subsystem instance. Using the controller instance for private 3632 * namespaces could lead to naming collisions between shared and private 3633 * namespaces if they don't use a common numbering scheme. 3634 * 3635 * If multipathing is not enabled, disk names must use the controller 3636 * instance as shared namespaces will show up as multiple block 3637 * devices. 3638 */ 3639 if (nvme_ns_head_multipath(ns->head)) { 3640 sprintf(disk->disk_name, "nvme%dc%dn%d", ctrl->subsys->instance, 3641 ctrl->instance, ns->head->instance); 3642 disk->flags |= GENHD_FL_HIDDEN; 3643 } else if (multipath) { 3644 sprintf(disk->disk_name, "nvme%dn%d", ctrl->subsys->instance, 3645 ns->head->instance); 3646 } else { 3647 sprintf(disk->disk_name, "nvme%dn%d", ctrl->instance, 3648 ns->head->instance); 3649 } 3650 3651 if (nvme_update_ns_info(ns, info)) 3652 goto out_unlink_ns; 3653 3654 down_write(&ctrl->namespaces_rwsem); 3655 /* 3656 * Ensure that no namespaces are added to the ctrl list after the queues 3657 * are frozen, thereby avoiding a deadlock between scan and reset. 3658 */ 3659 if (test_bit(NVME_CTRL_FROZEN, &ctrl->flags)) { 3660 up_write(&ctrl->namespaces_rwsem); 3661 goto out_unlink_ns; 3662 } 3663 nvme_ns_add_to_ctrl_list(ns); 3664 up_write(&ctrl->namespaces_rwsem); 3665 nvme_get_ctrl(ctrl); 3666 3667 if (device_add_disk(ctrl->device, ns->disk, nvme_ns_id_attr_groups)) 3668 goto out_cleanup_ns_from_list; 3669 3670 if (!nvme_ns_head_multipath(ns->head)) 3671 nvme_add_ns_cdev(ns); 3672 3673 nvme_mpath_add_disk(ns, info->anagrpid); 3674 nvme_fault_inject_init(&ns->fault_inject, ns->disk->disk_name); 3675 3676 return; 3677 3678 out_cleanup_ns_from_list: 3679 nvme_put_ctrl(ctrl); 3680 down_write(&ctrl->namespaces_rwsem); 3681 list_del_init(&ns->list); 3682 up_write(&ctrl->namespaces_rwsem); 3683 out_unlink_ns: 3684 mutex_lock(&ctrl->subsys->lock); 3685 list_del_rcu(&ns->siblings); 3686 if (list_empty(&ns->head->list)) 3687 list_del_init(&ns->head->entry); 3688 mutex_unlock(&ctrl->subsys->lock); 3689 nvme_put_ns_head(ns->head); 3690 out_cleanup_disk: 3691 put_disk(disk); 3692 out_free_ns: 3693 kfree(ns); 3694 } 3695 3696 static void nvme_ns_remove(struct nvme_ns *ns) 3697 { 3698 bool last_path = false; 3699 3700 if (test_and_set_bit(NVME_NS_REMOVING, &ns->flags)) 3701 return; 3702 3703 clear_bit(NVME_NS_READY, &ns->flags); 3704 set_capacity(ns->disk, 0); 3705 nvme_fault_inject_fini(&ns->fault_inject); 3706 3707 /* 3708 * Ensure that !NVME_NS_READY is seen by other threads to prevent 3709 * this ns going back into current_path. 3710 */ 3711 synchronize_srcu(&ns->head->srcu); 3712 3713 /* wait for concurrent submissions */ 3714 if (nvme_mpath_clear_current_path(ns)) 3715 synchronize_srcu(&ns->head->srcu); 3716 3717 mutex_lock(&ns->ctrl->subsys->lock); 3718 list_del_rcu(&ns->siblings); 3719 if (list_empty(&ns->head->list)) { 3720 list_del_init(&ns->head->entry); 3721 last_path = true; 3722 } 3723 mutex_unlock(&ns->ctrl->subsys->lock); 3724 3725 /* guarantee not available in head->list */ 3726 synchronize_srcu(&ns->head->srcu); 3727 3728 if (!nvme_ns_head_multipath(ns->head)) 3729 nvme_cdev_del(&ns->cdev, &ns->cdev_device); 3730 del_gendisk(ns->disk); 3731 3732 down_write(&ns->ctrl->namespaces_rwsem); 3733 list_del_init(&ns->list); 3734 up_write(&ns->ctrl->namespaces_rwsem); 3735 3736 if (last_path) 3737 nvme_mpath_shutdown_disk(ns->head); 3738 nvme_put_ns(ns); 3739 } 3740 3741 static void nvme_ns_remove_by_nsid(struct nvme_ctrl *ctrl, u32 nsid) 3742 { 3743 struct nvme_ns *ns = nvme_find_get_ns(ctrl, nsid); 3744 3745 if (ns) { 3746 nvme_ns_remove(ns); 3747 nvme_put_ns(ns); 3748 } 3749 } 3750 3751 static void nvme_validate_ns(struct nvme_ns *ns, struct nvme_ns_info *info) 3752 { 3753 int ret = NVME_SC_INVALID_NS | NVME_SC_DNR; 3754 3755 if (!nvme_ns_ids_equal(&ns->head->ids, &info->ids)) { 3756 dev_err(ns->ctrl->device, 3757 "identifiers changed for nsid %d\n", ns->head->ns_id); 3758 goto out; 3759 } 3760 3761 ret = nvme_update_ns_info(ns, info); 3762 out: 3763 /* 3764 * Only remove the namespace if we got a fatal error back from the 3765 * device, otherwise ignore the error and just move on. 3766 * 3767 * TODO: we should probably schedule a delayed retry here. 3768 */ 3769 if (ret > 0 && (ret & NVME_SC_DNR)) 3770 nvme_ns_remove(ns); 3771 } 3772 3773 static void nvme_scan_ns(struct nvme_ctrl *ctrl, unsigned nsid) 3774 { 3775 struct nvme_ns_info info = { .nsid = nsid }; 3776 struct nvme_ns *ns; 3777 int ret; 3778 3779 if (nvme_identify_ns_descs(ctrl, &info)) 3780 return; 3781 3782 if (info.ids.csi != NVME_CSI_NVM && !nvme_multi_css(ctrl)) { 3783 dev_warn(ctrl->device, 3784 "command set not reported for nsid: %d\n", nsid); 3785 return; 3786 } 3787 3788 /* 3789 * If available try to use the Command Set Idependent Identify Namespace 3790 * data structure to find all the generic information that is needed to 3791 * set up a namespace. If not fall back to the legacy version. 3792 */ 3793 if ((ctrl->cap & NVME_CAP_CRMS_CRIMS) || 3794 (info.ids.csi != NVME_CSI_NVM && info.ids.csi != NVME_CSI_ZNS)) 3795 ret = nvme_ns_info_from_id_cs_indep(ctrl, &info); 3796 else 3797 ret = nvme_ns_info_from_identify(ctrl, &info); 3798 3799 if (info.is_removed) 3800 nvme_ns_remove_by_nsid(ctrl, nsid); 3801 3802 /* 3803 * Ignore the namespace if it is not ready. We will get an AEN once it 3804 * becomes ready and restart the scan. 3805 */ 3806 if (ret || !info.is_ready) 3807 return; 3808 3809 ns = nvme_find_get_ns(ctrl, nsid); 3810 if (ns) { 3811 nvme_validate_ns(ns, &info); 3812 nvme_put_ns(ns); 3813 } else { 3814 nvme_alloc_ns(ctrl, &info); 3815 } 3816 } 3817 3818 static void nvme_remove_invalid_namespaces(struct nvme_ctrl *ctrl, 3819 unsigned nsid) 3820 { 3821 struct nvme_ns *ns, *next; 3822 LIST_HEAD(rm_list); 3823 3824 down_write(&ctrl->namespaces_rwsem); 3825 list_for_each_entry_safe(ns, next, &ctrl->namespaces, list) { 3826 if (ns->head->ns_id > nsid) 3827 list_move_tail(&ns->list, &rm_list); 3828 } 3829 up_write(&ctrl->namespaces_rwsem); 3830 3831 list_for_each_entry_safe(ns, next, &rm_list, list) 3832 nvme_ns_remove(ns); 3833 3834 } 3835 3836 static int nvme_scan_ns_list(struct nvme_ctrl *ctrl) 3837 { 3838 const int nr_entries = NVME_IDENTIFY_DATA_SIZE / sizeof(__le32); 3839 __le32 *ns_list; 3840 u32 prev = 0; 3841 int ret = 0, i; 3842 3843 ns_list = kzalloc(NVME_IDENTIFY_DATA_SIZE, GFP_KERNEL); 3844 if (!ns_list) 3845 return -ENOMEM; 3846 3847 for (;;) { 3848 struct nvme_command cmd = { 3849 .identify.opcode = nvme_admin_identify, 3850 .identify.cns = NVME_ID_CNS_NS_ACTIVE_LIST, 3851 .identify.nsid = cpu_to_le32(prev), 3852 }; 3853 3854 ret = nvme_submit_sync_cmd(ctrl->admin_q, &cmd, ns_list, 3855 NVME_IDENTIFY_DATA_SIZE); 3856 if (ret) { 3857 dev_warn(ctrl->device, 3858 "Identify NS List failed (status=0x%x)\n", ret); 3859 goto free; 3860 } 3861 3862 for (i = 0; i < nr_entries; i++) { 3863 u32 nsid = le32_to_cpu(ns_list[i]); 3864 3865 if (!nsid) /* end of the list? */ 3866 goto out; 3867 nvme_scan_ns(ctrl, nsid); 3868 while (++prev < nsid) 3869 nvme_ns_remove_by_nsid(ctrl, prev); 3870 } 3871 } 3872 out: 3873 nvme_remove_invalid_namespaces(ctrl, prev); 3874 free: 3875 kfree(ns_list); 3876 return ret; 3877 } 3878 3879 static void nvme_scan_ns_sequential(struct nvme_ctrl *ctrl) 3880 { 3881 struct nvme_id_ctrl *id; 3882 u32 nn, i; 3883 3884 if (nvme_identify_ctrl(ctrl, &id)) 3885 return; 3886 nn = le32_to_cpu(id->nn); 3887 kfree(id); 3888 3889 for (i = 1; i <= nn; i++) 3890 nvme_scan_ns(ctrl, i); 3891 3892 nvme_remove_invalid_namespaces(ctrl, nn); 3893 } 3894 3895 static void nvme_clear_changed_ns_log(struct nvme_ctrl *ctrl) 3896 { 3897 size_t log_size = NVME_MAX_CHANGED_NAMESPACES * sizeof(__le32); 3898 __le32 *log; 3899 int error; 3900 3901 log = kzalloc(log_size, GFP_KERNEL); 3902 if (!log) 3903 return; 3904 3905 /* 3906 * We need to read the log to clear the AEN, but we don't want to rely 3907 * on it for the changed namespace information as userspace could have 3908 * raced with us in reading the log page, which could cause us to miss 3909 * updates. 3910 */ 3911 error = nvme_get_log(ctrl, NVME_NSID_ALL, NVME_LOG_CHANGED_NS, 0, 3912 NVME_CSI_NVM, log, log_size, 0); 3913 if (error) 3914 dev_warn(ctrl->device, 3915 "reading changed ns log failed: %d\n", error); 3916 3917 kfree(log); 3918 } 3919 3920 static void nvme_scan_work(struct work_struct *work) 3921 { 3922 struct nvme_ctrl *ctrl = 3923 container_of(work, struct nvme_ctrl, scan_work); 3924 int ret; 3925 3926 /* No tagset on a live ctrl means IO queues could not created */ 3927 if (nvme_ctrl_state(ctrl) != NVME_CTRL_LIVE || !ctrl->tagset) 3928 return; 3929 3930 /* 3931 * Identify controller limits can change at controller reset due to 3932 * new firmware download, even though it is not common we cannot ignore 3933 * such scenario. Controller's non-mdts limits are reported in the unit 3934 * of logical blocks that is dependent on the format of attached 3935 * namespace. Hence re-read the limits at the time of ns allocation. 3936 */ 3937 ret = nvme_init_non_mdts_limits(ctrl); 3938 if (ret < 0) { 3939 dev_warn(ctrl->device, 3940 "reading non-mdts-limits failed: %d\n", ret); 3941 return; 3942 } 3943 3944 if (test_and_clear_bit(NVME_AER_NOTICE_NS_CHANGED, &ctrl->events)) { 3945 dev_info(ctrl->device, "rescanning namespaces.\n"); 3946 nvme_clear_changed_ns_log(ctrl); 3947 } 3948 3949 mutex_lock(&ctrl->scan_lock); 3950 if (nvme_ctrl_limited_cns(ctrl)) { 3951 nvme_scan_ns_sequential(ctrl); 3952 } else { 3953 /* 3954 * Fall back to sequential scan if DNR is set to handle broken 3955 * devices which should support Identify NS List (as per the VS 3956 * they report) but don't actually support it. 3957 */ 3958 ret = nvme_scan_ns_list(ctrl); 3959 if (ret > 0 && ret & NVME_SC_DNR) 3960 nvme_scan_ns_sequential(ctrl); 3961 } 3962 mutex_unlock(&ctrl->scan_lock); 3963 } 3964 3965 /* 3966 * This function iterates the namespace list unlocked to allow recovery from 3967 * controller failure. It is up to the caller to ensure the namespace list is 3968 * not modified by scan work while this function is executing. 3969 */ 3970 void nvme_remove_namespaces(struct nvme_ctrl *ctrl) 3971 { 3972 struct nvme_ns *ns, *next; 3973 LIST_HEAD(ns_list); 3974 3975 /* 3976 * make sure to requeue I/O to all namespaces as these 3977 * might result from the scan itself and must complete 3978 * for the scan_work to make progress 3979 */ 3980 nvme_mpath_clear_ctrl_paths(ctrl); 3981 3982 /* 3983 * Unquiesce io queues so any pending IO won't hang, especially 3984 * those submitted from scan work 3985 */ 3986 nvme_unquiesce_io_queues(ctrl); 3987 3988 /* prevent racing with ns scanning */ 3989 flush_work(&ctrl->scan_work); 3990 3991 /* 3992 * The dead states indicates the controller was not gracefully 3993 * disconnected. In that case, we won't be able to flush any data while 3994 * removing the namespaces' disks; fail all the queues now to avoid 3995 * potentially having to clean up the failed sync later. 3996 */ 3997 if (nvme_ctrl_state(ctrl) == NVME_CTRL_DEAD) 3998 nvme_mark_namespaces_dead(ctrl); 3999 4000 /* this is a no-op when called from the controller reset handler */ 4001 nvme_change_ctrl_state(ctrl, NVME_CTRL_DELETING_NOIO); 4002 4003 down_write(&ctrl->namespaces_rwsem); 4004 list_splice_init(&ctrl->namespaces, &ns_list); 4005 up_write(&ctrl->namespaces_rwsem); 4006 4007 list_for_each_entry_safe(ns, next, &ns_list, list) 4008 nvme_ns_remove(ns); 4009 } 4010 EXPORT_SYMBOL_GPL(nvme_remove_namespaces); 4011 4012 static int nvme_class_uevent(const struct device *dev, struct kobj_uevent_env *env) 4013 { 4014 const struct nvme_ctrl *ctrl = 4015 container_of(dev, struct nvme_ctrl, ctrl_device); 4016 struct nvmf_ctrl_options *opts = ctrl->opts; 4017 int ret; 4018 4019 ret = add_uevent_var(env, "NVME_TRTYPE=%s", ctrl->ops->name); 4020 if (ret) 4021 return ret; 4022 4023 if (opts) { 4024 ret = add_uevent_var(env, "NVME_TRADDR=%s", opts->traddr); 4025 if (ret) 4026 return ret; 4027 4028 ret = add_uevent_var(env, "NVME_TRSVCID=%s", 4029 opts->trsvcid ?: "none"); 4030 if (ret) 4031 return ret; 4032 4033 ret = add_uevent_var(env, "NVME_HOST_TRADDR=%s", 4034 opts->host_traddr ?: "none"); 4035 if (ret) 4036 return ret; 4037 4038 ret = add_uevent_var(env, "NVME_HOST_IFACE=%s", 4039 opts->host_iface ?: "none"); 4040 } 4041 return ret; 4042 } 4043 4044 static void nvme_change_uevent(struct nvme_ctrl *ctrl, char *envdata) 4045 { 4046 char *envp[2] = { envdata, NULL }; 4047 4048 kobject_uevent_env(&ctrl->device->kobj, KOBJ_CHANGE, envp); 4049 } 4050 4051 static void nvme_aen_uevent(struct nvme_ctrl *ctrl) 4052 { 4053 char *envp[2] = { NULL, NULL }; 4054 u32 aen_result = ctrl->aen_result; 4055 4056 ctrl->aen_result = 0; 4057 if (!aen_result) 4058 return; 4059 4060 envp[0] = kasprintf(GFP_KERNEL, "NVME_AEN=%#08x", aen_result); 4061 if (!envp[0]) 4062 return; 4063 kobject_uevent_env(&ctrl->device->kobj, KOBJ_CHANGE, envp); 4064 kfree(envp[0]); 4065 } 4066 4067 static void nvme_async_event_work(struct work_struct *work) 4068 { 4069 struct nvme_ctrl *ctrl = 4070 container_of(work, struct nvme_ctrl, async_event_work); 4071 4072 nvme_aen_uevent(ctrl); 4073 4074 /* 4075 * The transport drivers must guarantee AER submission here is safe by 4076 * flushing ctrl async_event_work after changing the controller state 4077 * from LIVE and before freeing the admin queue. 4078 */ 4079 if (nvme_ctrl_state(ctrl) == NVME_CTRL_LIVE) 4080 ctrl->ops->submit_async_event(ctrl); 4081 } 4082 4083 static bool nvme_ctrl_pp_status(struct nvme_ctrl *ctrl) 4084 { 4085 4086 u32 csts; 4087 4088 if (ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts)) 4089 return false; 4090 4091 if (csts == ~0) 4092 return false; 4093 4094 return ((ctrl->ctrl_config & NVME_CC_ENABLE) && (csts & NVME_CSTS_PP)); 4095 } 4096 4097 static void nvme_get_fw_slot_info(struct nvme_ctrl *ctrl) 4098 { 4099 struct nvme_fw_slot_info_log *log; 4100 4101 log = kmalloc(sizeof(*log), GFP_KERNEL); 4102 if (!log) 4103 return; 4104 4105 if (nvme_get_log(ctrl, NVME_NSID_ALL, NVME_LOG_FW_SLOT, 0, NVME_CSI_NVM, 4106 log, sizeof(*log), 0)) 4107 dev_warn(ctrl->device, "Get FW SLOT INFO log error\n"); 4108 kfree(log); 4109 } 4110 4111 static void nvme_fw_act_work(struct work_struct *work) 4112 { 4113 struct nvme_ctrl *ctrl = container_of(work, 4114 struct nvme_ctrl, fw_act_work); 4115 unsigned long fw_act_timeout; 4116 4117 nvme_auth_stop(ctrl); 4118 4119 if (ctrl->mtfa) 4120 fw_act_timeout = jiffies + 4121 msecs_to_jiffies(ctrl->mtfa * 100); 4122 else 4123 fw_act_timeout = jiffies + 4124 msecs_to_jiffies(admin_timeout * 1000); 4125 4126 nvme_quiesce_io_queues(ctrl); 4127 while (nvme_ctrl_pp_status(ctrl)) { 4128 if (time_after(jiffies, fw_act_timeout)) { 4129 dev_warn(ctrl->device, 4130 "Fw activation timeout, reset controller\n"); 4131 nvme_try_sched_reset(ctrl); 4132 return; 4133 } 4134 msleep(100); 4135 } 4136 4137 if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_LIVE)) 4138 return; 4139 4140 nvme_unquiesce_io_queues(ctrl); 4141 /* read FW slot information to clear the AER */ 4142 nvme_get_fw_slot_info(ctrl); 4143 4144 queue_work(nvme_wq, &ctrl->async_event_work); 4145 } 4146 4147 static u32 nvme_aer_type(u32 result) 4148 { 4149 return result & 0x7; 4150 } 4151 4152 static u32 nvme_aer_subtype(u32 result) 4153 { 4154 return (result & 0xff00) >> 8; 4155 } 4156 4157 static bool nvme_handle_aen_notice(struct nvme_ctrl *ctrl, u32 result) 4158 { 4159 u32 aer_notice_type = nvme_aer_subtype(result); 4160 bool requeue = true; 4161 4162 switch (aer_notice_type) { 4163 case NVME_AER_NOTICE_NS_CHANGED: 4164 set_bit(NVME_AER_NOTICE_NS_CHANGED, &ctrl->events); 4165 nvme_queue_scan(ctrl); 4166 break; 4167 case NVME_AER_NOTICE_FW_ACT_STARTING: 4168 /* 4169 * We are (ab)using the RESETTING state to prevent subsequent 4170 * recovery actions from interfering with the controller's 4171 * firmware activation. 4172 */ 4173 if (nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING)) { 4174 requeue = false; 4175 queue_work(nvme_wq, &ctrl->fw_act_work); 4176 } 4177 break; 4178 #ifdef CONFIG_NVME_MULTIPATH 4179 case NVME_AER_NOTICE_ANA: 4180 if (!ctrl->ana_log_buf) 4181 break; 4182 queue_work(nvme_wq, &ctrl->ana_work); 4183 break; 4184 #endif 4185 case NVME_AER_NOTICE_DISC_CHANGED: 4186 ctrl->aen_result = result; 4187 break; 4188 default: 4189 dev_warn(ctrl->device, "async event result %08x\n", result); 4190 } 4191 return requeue; 4192 } 4193 4194 static void nvme_handle_aer_persistent_error(struct nvme_ctrl *ctrl) 4195 { 4196 dev_warn(ctrl->device, "resetting controller due to AER\n"); 4197 nvme_reset_ctrl(ctrl); 4198 } 4199 4200 void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status, 4201 volatile union nvme_result *res) 4202 { 4203 u32 result = le32_to_cpu(res->u32); 4204 u32 aer_type = nvme_aer_type(result); 4205 u32 aer_subtype = nvme_aer_subtype(result); 4206 bool requeue = true; 4207 4208 if (le16_to_cpu(status) >> 1 != NVME_SC_SUCCESS) 4209 return; 4210 4211 trace_nvme_async_event(ctrl, result); 4212 switch (aer_type) { 4213 case NVME_AER_NOTICE: 4214 requeue = nvme_handle_aen_notice(ctrl, result); 4215 break; 4216 case NVME_AER_ERROR: 4217 /* 4218 * For a persistent internal error, don't run async_event_work 4219 * to submit a new AER. The controller reset will do it. 4220 */ 4221 if (aer_subtype == NVME_AER_ERROR_PERSIST_INT_ERR) { 4222 nvme_handle_aer_persistent_error(ctrl); 4223 return; 4224 } 4225 fallthrough; 4226 case NVME_AER_SMART: 4227 case NVME_AER_CSS: 4228 case NVME_AER_VS: 4229 ctrl->aen_result = result; 4230 break; 4231 default: 4232 break; 4233 } 4234 4235 if (requeue) 4236 queue_work(nvme_wq, &ctrl->async_event_work); 4237 } 4238 EXPORT_SYMBOL_GPL(nvme_complete_async_event); 4239 4240 int nvme_alloc_admin_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set, 4241 const struct blk_mq_ops *ops, unsigned int cmd_size) 4242 { 4243 int ret; 4244 4245 memset(set, 0, sizeof(*set)); 4246 set->ops = ops; 4247 set->queue_depth = NVME_AQ_MQ_TAG_DEPTH; 4248 if (ctrl->ops->flags & NVME_F_FABRICS) 4249 set->reserved_tags = NVMF_RESERVED_TAGS; 4250 set->numa_node = ctrl->numa_node; 4251 set->flags = BLK_MQ_F_NO_SCHED; 4252 if (ctrl->ops->flags & NVME_F_BLOCKING) 4253 set->flags |= BLK_MQ_F_BLOCKING; 4254 set->cmd_size = cmd_size; 4255 set->driver_data = ctrl; 4256 set->nr_hw_queues = 1; 4257 set->timeout = NVME_ADMIN_TIMEOUT; 4258 ret = blk_mq_alloc_tag_set(set); 4259 if (ret) 4260 return ret; 4261 4262 ctrl->admin_q = blk_mq_init_queue(set); 4263 if (IS_ERR(ctrl->admin_q)) { 4264 ret = PTR_ERR(ctrl->admin_q); 4265 goto out_free_tagset; 4266 } 4267 4268 if (ctrl->ops->flags & NVME_F_FABRICS) { 4269 ctrl->fabrics_q = blk_mq_init_queue(set); 4270 if (IS_ERR(ctrl->fabrics_q)) { 4271 ret = PTR_ERR(ctrl->fabrics_q); 4272 goto out_cleanup_admin_q; 4273 } 4274 } 4275 4276 ctrl->admin_tagset = set; 4277 return 0; 4278 4279 out_cleanup_admin_q: 4280 blk_mq_destroy_queue(ctrl->admin_q); 4281 blk_put_queue(ctrl->admin_q); 4282 out_free_tagset: 4283 blk_mq_free_tag_set(set); 4284 ctrl->admin_q = NULL; 4285 ctrl->fabrics_q = NULL; 4286 return ret; 4287 } 4288 EXPORT_SYMBOL_GPL(nvme_alloc_admin_tag_set); 4289 4290 void nvme_remove_admin_tag_set(struct nvme_ctrl *ctrl) 4291 { 4292 blk_mq_destroy_queue(ctrl->admin_q); 4293 blk_put_queue(ctrl->admin_q); 4294 if (ctrl->ops->flags & NVME_F_FABRICS) { 4295 blk_mq_destroy_queue(ctrl->fabrics_q); 4296 blk_put_queue(ctrl->fabrics_q); 4297 } 4298 blk_mq_free_tag_set(ctrl->admin_tagset); 4299 } 4300 EXPORT_SYMBOL_GPL(nvme_remove_admin_tag_set); 4301 4302 int nvme_alloc_io_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set, 4303 const struct blk_mq_ops *ops, unsigned int nr_maps, 4304 unsigned int cmd_size) 4305 { 4306 int ret; 4307 4308 memset(set, 0, sizeof(*set)); 4309 set->ops = ops; 4310 set->queue_depth = min_t(unsigned, ctrl->sqsize, BLK_MQ_MAX_DEPTH - 1); 4311 /* 4312 * Some Apple controllers requires tags to be unique across admin and 4313 * the (only) I/O queue, so reserve the first 32 tags of the I/O queue. 4314 */ 4315 if (ctrl->quirks & NVME_QUIRK_SHARED_TAGS) 4316 set->reserved_tags = NVME_AQ_DEPTH; 4317 else if (ctrl->ops->flags & NVME_F_FABRICS) 4318 set->reserved_tags = NVMF_RESERVED_TAGS; 4319 set->numa_node = ctrl->numa_node; 4320 set->flags = BLK_MQ_F_SHOULD_MERGE; 4321 if (ctrl->ops->flags & NVME_F_BLOCKING) 4322 set->flags |= BLK_MQ_F_BLOCKING; 4323 set->cmd_size = cmd_size, 4324 set->driver_data = ctrl; 4325 set->nr_hw_queues = ctrl->queue_count - 1; 4326 set->timeout = NVME_IO_TIMEOUT; 4327 set->nr_maps = nr_maps; 4328 ret = blk_mq_alloc_tag_set(set); 4329 if (ret) 4330 return ret; 4331 4332 if (ctrl->ops->flags & NVME_F_FABRICS) { 4333 ctrl->connect_q = blk_mq_init_queue(set); 4334 if (IS_ERR(ctrl->connect_q)) { 4335 ret = PTR_ERR(ctrl->connect_q); 4336 goto out_free_tag_set; 4337 } 4338 blk_queue_flag_set(QUEUE_FLAG_SKIP_TAGSET_QUIESCE, 4339 ctrl->connect_q); 4340 } 4341 4342 ctrl->tagset = set; 4343 return 0; 4344 4345 out_free_tag_set: 4346 blk_mq_free_tag_set(set); 4347 ctrl->connect_q = NULL; 4348 return ret; 4349 } 4350 EXPORT_SYMBOL_GPL(nvme_alloc_io_tag_set); 4351 4352 void nvme_remove_io_tag_set(struct nvme_ctrl *ctrl) 4353 { 4354 if (ctrl->ops->flags & NVME_F_FABRICS) { 4355 blk_mq_destroy_queue(ctrl->connect_q); 4356 blk_put_queue(ctrl->connect_q); 4357 } 4358 blk_mq_free_tag_set(ctrl->tagset); 4359 } 4360 EXPORT_SYMBOL_GPL(nvme_remove_io_tag_set); 4361 4362 void nvme_stop_ctrl(struct nvme_ctrl *ctrl) 4363 { 4364 nvme_mpath_stop(ctrl); 4365 nvme_auth_stop(ctrl); 4366 nvme_stop_keep_alive(ctrl); 4367 nvme_stop_failfast_work(ctrl); 4368 flush_work(&ctrl->async_event_work); 4369 cancel_work_sync(&ctrl->fw_act_work); 4370 if (ctrl->ops->stop_ctrl) 4371 ctrl->ops->stop_ctrl(ctrl); 4372 } 4373 EXPORT_SYMBOL_GPL(nvme_stop_ctrl); 4374 4375 void nvme_start_ctrl(struct nvme_ctrl *ctrl) 4376 { 4377 nvme_start_keep_alive(ctrl); 4378 4379 nvme_enable_aen(ctrl); 4380 4381 /* 4382 * persistent discovery controllers need to send indication to userspace 4383 * to re-read the discovery log page to learn about possible changes 4384 * that were missed. We identify persistent discovery controllers by 4385 * checking that they started once before, hence are reconnecting back. 4386 */ 4387 if (test_bit(NVME_CTRL_STARTED_ONCE, &ctrl->flags) && 4388 nvme_discovery_ctrl(ctrl)) 4389 nvme_change_uevent(ctrl, "NVME_EVENT=rediscover"); 4390 4391 if (ctrl->queue_count > 1) { 4392 nvme_queue_scan(ctrl); 4393 nvme_unquiesce_io_queues(ctrl); 4394 nvme_mpath_update(ctrl); 4395 } 4396 4397 nvme_change_uevent(ctrl, "NVME_EVENT=connected"); 4398 set_bit(NVME_CTRL_STARTED_ONCE, &ctrl->flags); 4399 } 4400 EXPORT_SYMBOL_GPL(nvme_start_ctrl); 4401 4402 void nvme_uninit_ctrl(struct nvme_ctrl *ctrl) 4403 { 4404 nvme_hwmon_exit(ctrl); 4405 nvme_fault_inject_fini(&ctrl->fault_inject); 4406 dev_pm_qos_hide_latency_tolerance(ctrl->device); 4407 cdev_device_del(&ctrl->cdev, ctrl->device); 4408 nvme_put_ctrl(ctrl); 4409 } 4410 EXPORT_SYMBOL_GPL(nvme_uninit_ctrl); 4411 4412 static void nvme_free_cels(struct nvme_ctrl *ctrl) 4413 { 4414 struct nvme_effects_log *cel; 4415 unsigned long i; 4416 4417 xa_for_each(&ctrl->cels, i, cel) { 4418 xa_erase(&ctrl->cels, i); 4419 kfree(cel); 4420 } 4421 4422 xa_destroy(&ctrl->cels); 4423 } 4424 4425 static void nvme_free_ctrl(struct device *dev) 4426 { 4427 struct nvme_ctrl *ctrl = 4428 container_of(dev, struct nvme_ctrl, ctrl_device); 4429 struct nvme_subsystem *subsys = ctrl->subsys; 4430 4431 if (!subsys || ctrl->instance != subsys->instance) 4432 ida_free(&nvme_instance_ida, ctrl->instance); 4433 4434 nvme_free_cels(ctrl); 4435 nvme_mpath_uninit(ctrl); 4436 nvme_auth_stop(ctrl); 4437 nvme_auth_free(ctrl); 4438 __free_page(ctrl->discard_page); 4439 free_opal_dev(ctrl->opal_dev); 4440 4441 if (subsys) { 4442 mutex_lock(&nvme_subsystems_lock); 4443 list_del(&ctrl->subsys_entry); 4444 sysfs_remove_link(&subsys->dev.kobj, dev_name(ctrl->device)); 4445 mutex_unlock(&nvme_subsystems_lock); 4446 } 4447 4448 ctrl->ops->free_ctrl(ctrl); 4449 4450 if (subsys) 4451 nvme_put_subsystem(subsys); 4452 } 4453 4454 /* 4455 * Initialize a NVMe controller structures. This needs to be called during 4456 * earliest initialization so that we have the initialized structured around 4457 * during probing. 4458 */ 4459 int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev, 4460 const struct nvme_ctrl_ops *ops, unsigned long quirks) 4461 { 4462 int ret; 4463 4464 WRITE_ONCE(ctrl->state, NVME_CTRL_NEW); 4465 clear_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags); 4466 spin_lock_init(&ctrl->lock); 4467 mutex_init(&ctrl->scan_lock); 4468 INIT_LIST_HEAD(&ctrl->namespaces); 4469 xa_init(&ctrl->cels); 4470 init_rwsem(&ctrl->namespaces_rwsem); 4471 ctrl->dev = dev; 4472 ctrl->ops = ops; 4473 ctrl->quirks = quirks; 4474 ctrl->numa_node = NUMA_NO_NODE; 4475 INIT_WORK(&ctrl->scan_work, nvme_scan_work); 4476 INIT_WORK(&ctrl->async_event_work, nvme_async_event_work); 4477 INIT_WORK(&ctrl->fw_act_work, nvme_fw_act_work); 4478 INIT_WORK(&ctrl->delete_work, nvme_delete_ctrl_work); 4479 init_waitqueue_head(&ctrl->state_wq); 4480 4481 INIT_DELAYED_WORK(&ctrl->ka_work, nvme_keep_alive_work); 4482 INIT_DELAYED_WORK(&ctrl->failfast_work, nvme_failfast_work); 4483 memset(&ctrl->ka_cmd, 0, sizeof(ctrl->ka_cmd)); 4484 ctrl->ka_cmd.common.opcode = nvme_admin_keep_alive; 4485 4486 BUILD_BUG_ON(NVME_DSM_MAX_RANGES * sizeof(struct nvme_dsm_range) > 4487 PAGE_SIZE); 4488 ctrl->discard_page = alloc_page(GFP_KERNEL); 4489 if (!ctrl->discard_page) { 4490 ret = -ENOMEM; 4491 goto out; 4492 } 4493 4494 ret = ida_alloc(&nvme_instance_ida, GFP_KERNEL); 4495 if (ret < 0) 4496 goto out; 4497 ctrl->instance = ret; 4498 4499 device_initialize(&ctrl->ctrl_device); 4500 ctrl->device = &ctrl->ctrl_device; 4501 ctrl->device->devt = MKDEV(MAJOR(nvme_ctrl_base_chr_devt), 4502 ctrl->instance); 4503 ctrl->device->class = nvme_class; 4504 ctrl->device->parent = ctrl->dev; 4505 if (ops->dev_attr_groups) 4506 ctrl->device->groups = ops->dev_attr_groups; 4507 else 4508 ctrl->device->groups = nvme_dev_attr_groups; 4509 ctrl->device->release = nvme_free_ctrl; 4510 dev_set_drvdata(ctrl->device, ctrl); 4511 ret = dev_set_name(ctrl->device, "nvme%d", ctrl->instance); 4512 if (ret) 4513 goto out_release_instance; 4514 4515 nvme_get_ctrl(ctrl); 4516 cdev_init(&ctrl->cdev, &nvme_dev_fops); 4517 ctrl->cdev.owner = ops->module; 4518 ret = cdev_device_add(&ctrl->cdev, ctrl->device); 4519 if (ret) 4520 goto out_free_name; 4521 4522 /* 4523 * Initialize latency tolerance controls. The sysfs files won't 4524 * be visible to userspace unless the device actually supports APST. 4525 */ 4526 ctrl->device->power.set_latency_tolerance = nvme_set_latency_tolerance; 4527 dev_pm_qos_update_user_latency_tolerance(ctrl->device, 4528 min(default_ps_max_latency_us, (unsigned long)S32_MAX)); 4529 4530 nvme_fault_inject_init(&ctrl->fault_inject, dev_name(ctrl->device)); 4531 nvme_mpath_init_ctrl(ctrl); 4532 ret = nvme_auth_init_ctrl(ctrl); 4533 if (ret) 4534 goto out_free_cdev; 4535 4536 return 0; 4537 out_free_cdev: 4538 nvme_fault_inject_fini(&ctrl->fault_inject); 4539 dev_pm_qos_hide_latency_tolerance(ctrl->device); 4540 cdev_device_del(&ctrl->cdev, ctrl->device); 4541 out_free_name: 4542 nvme_put_ctrl(ctrl); 4543 kfree_const(ctrl->device->kobj.name); 4544 out_release_instance: 4545 ida_free(&nvme_instance_ida, ctrl->instance); 4546 out: 4547 if (ctrl->discard_page) 4548 __free_page(ctrl->discard_page); 4549 return ret; 4550 } 4551 EXPORT_SYMBOL_GPL(nvme_init_ctrl); 4552 4553 /* let I/O to all namespaces fail in preparation for surprise removal */ 4554 void nvme_mark_namespaces_dead(struct nvme_ctrl *ctrl) 4555 { 4556 struct nvme_ns *ns; 4557 4558 down_read(&ctrl->namespaces_rwsem); 4559 list_for_each_entry(ns, &ctrl->namespaces, list) 4560 blk_mark_disk_dead(ns->disk); 4561 up_read(&ctrl->namespaces_rwsem); 4562 } 4563 EXPORT_SYMBOL_GPL(nvme_mark_namespaces_dead); 4564 4565 void nvme_unfreeze(struct nvme_ctrl *ctrl) 4566 { 4567 struct nvme_ns *ns; 4568 4569 down_read(&ctrl->namespaces_rwsem); 4570 list_for_each_entry(ns, &ctrl->namespaces, list) 4571 blk_mq_unfreeze_queue(ns->queue); 4572 up_read(&ctrl->namespaces_rwsem); 4573 clear_bit(NVME_CTRL_FROZEN, &ctrl->flags); 4574 } 4575 EXPORT_SYMBOL_GPL(nvme_unfreeze); 4576 4577 int nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout) 4578 { 4579 struct nvme_ns *ns; 4580 4581 down_read(&ctrl->namespaces_rwsem); 4582 list_for_each_entry(ns, &ctrl->namespaces, list) { 4583 timeout = blk_mq_freeze_queue_wait_timeout(ns->queue, timeout); 4584 if (timeout <= 0) 4585 break; 4586 } 4587 up_read(&ctrl->namespaces_rwsem); 4588 return timeout; 4589 } 4590 EXPORT_SYMBOL_GPL(nvme_wait_freeze_timeout); 4591 4592 void nvme_wait_freeze(struct nvme_ctrl *ctrl) 4593 { 4594 struct nvme_ns *ns; 4595 4596 down_read(&ctrl->namespaces_rwsem); 4597 list_for_each_entry(ns, &ctrl->namespaces, list) 4598 blk_mq_freeze_queue_wait(ns->queue); 4599 up_read(&ctrl->namespaces_rwsem); 4600 } 4601 EXPORT_SYMBOL_GPL(nvme_wait_freeze); 4602 4603 void nvme_start_freeze(struct nvme_ctrl *ctrl) 4604 { 4605 struct nvme_ns *ns; 4606 4607 set_bit(NVME_CTRL_FROZEN, &ctrl->flags); 4608 down_read(&ctrl->namespaces_rwsem); 4609 list_for_each_entry(ns, &ctrl->namespaces, list) 4610 blk_freeze_queue_start(ns->queue); 4611 up_read(&ctrl->namespaces_rwsem); 4612 } 4613 EXPORT_SYMBOL_GPL(nvme_start_freeze); 4614 4615 void nvme_quiesce_io_queues(struct nvme_ctrl *ctrl) 4616 { 4617 if (!ctrl->tagset) 4618 return; 4619 if (!test_and_set_bit(NVME_CTRL_STOPPED, &ctrl->flags)) 4620 blk_mq_quiesce_tagset(ctrl->tagset); 4621 else 4622 blk_mq_wait_quiesce_done(ctrl->tagset); 4623 } 4624 EXPORT_SYMBOL_GPL(nvme_quiesce_io_queues); 4625 4626 void nvme_unquiesce_io_queues(struct nvme_ctrl *ctrl) 4627 { 4628 if (!ctrl->tagset) 4629 return; 4630 if (test_and_clear_bit(NVME_CTRL_STOPPED, &ctrl->flags)) 4631 blk_mq_unquiesce_tagset(ctrl->tagset); 4632 } 4633 EXPORT_SYMBOL_GPL(nvme_unquiesce_io_queues); 4634 4635 void nvme_quiesce_admin_queue(struct nvme_ctrl *ctrl) 4636 { 4637 if (!test_and_set_bit(NVME_CTRL_ADMIN_Q_STOPPED, &ctrl->flags)) 4638 blk_mq_quiesce_queue(ctrl->admin_q); 4639 else 4640 blk_mq_wait_quiesce_done(ctrl->admin_q->tag_set); 4641 } 4642 EXPORT_SYMBOL_GPL(nvme_quiesce_admin_queue); 4643 4644 void nvme_unquiesce_admin_queue(struct nvme_ctrl *ctrl) 4645 { 4646 if (test_and_clear_bit(NVME_CTRL_ADMIN_Q_STOPPED, &ctrl->flags)) 4647 blk_mq_unquiesce_queue(ctrl->admin_q); 4648 } 4649 EXPORT_SYMBOL_GPL(nvme_unquiesce_admin_queue); 4650 4651 void nvme_sync_io_queues(struct nvme_ctrl *ctrl) 4652 { 4653 struct nvme_ns *ns; 4654 4655 down_read(&ctrl->namespaces_rwsem); 4656 list_for_each_entry(ns, &ctrl->namespaces, list) 4657 blk_sync_queue(ns->queue); 4658 up_read(&ctrl->namespaces_rwsem); 4659 } 4660 EXPORT_SYMBOL_GPL(nvme_sync_io_queues); 4661 4662 void nvme_sync_queues(struct nvme_ctrl *ctrl) 4663 { 4664 nvme_sync_io_queues(ctrl); 4665 if (ctrl->admin_q) 4666 blk_sync_queue(ctrl->admin_q); 4667 } 4668 EXPORT_SYMBOL_GPL(nvme_sync_queues); 4669 4670 struct nvme_ctrl *nvme_ctrl_from_file(struct file *file) 4671 { 4672 if (file->f_op != &nvme_dev_fops) 4673 return NULL; 4674 return file->private_data; 4675 } 4676 EXPORT_SYMBOL_NS_GPL(nvme_ctrl_from_file, NVME_TARGET_PASSTHRU); 4677 4678 /* 4679 * Check we didn't inadvertently grow the command structure sizes: 4680 */ 4681 static inline void _nvme_check_size(void) 4682 { 4683 BUILD_BUG_ON(sizeof(struct nvme_common_command) != 64); 4684 BUILD_BUG_ON(sizeof(struct nvme_rw_command) != 64); 4685 BUILD_BUG_ON(sizeof(struct nvme_identify) != 64); 4686 BUILD_BUG_ON(sizeof(struct nvme_features) != 64); 4687 BUILD_BUG_ON(sizeof(struct nvme_download_firmware) != 64); 4688 BUILD_BUG_ON(sizeof(struct nvme_format_cmd) != 64); 4689 BUILD_BUG_ON(sizeof(struct nvme_dsm_cmd) != 64); 4690 BUILD_BUG_ON(sizeof(struct nvme_write_zeroes_cmd) != 64); 4691 BUILD_BUG_ON(sizeof(struct nvme_abort_cmd) != 64); 4692 BUILD_BUG_ON(sizeof(struct nvme_get_log_page_command) != 64); 4693 BUILD_BUG_ON(sizeof(struct nvme_command) != 64); 4694 BUILD_BUG_ON(sizeof(struct nvme_id_ctrl) != NVME_IDENTIFY_DATA_SIZE); 4695 BUILD_BUG_ON(sizeof(struct nvme_id_ns) != NVME_IDENTIFY_DATA_SIZE); 4696 BUILD_BUG_ON(sizeof(struct nvme_id_ns_cs_indep) != 4697 NVME_IDENTIFY_DATA_SIZE); 4698 BUILD_BUG_ON(sizeof(struct nvme_id_ns_zns) != NVME_IDENTIFY_DATA_SIZE); 4699 BUILD_BUG_ON(sizeof(struct nvme_id_ns_nvm) != NVME_IDENTIFY_DATA_SIZE); 4700 BUILD_BUG_ON(sizeof(struct nvme_id_ctrl_zns) != NVME_IDENTIFY_DATA_SIZE); 4701 BUILD_BUG_ON(sizeof(struct nvme_id_ctrl_nvm) != NVME_IDENTIFY_DATA_SIZE); 4702 BUILD_BUG_ON(sizeof(struct nvme_lba_range_type) != 64); 4703 BUILD_BUG_ON(sizeof(struct nvme_smart_log) != 512); 4704 BUILD_BUG_ON(sizeof(struct nvme_dbbuf) != 64); 4705 BUILD_BUG_ON(sizeof(struct nvme_directive_cmd) != 64); 4706 BUILD_BUG_ON(sizeof(struct nvme_feat_host_behavior) != 512); 4707 } 4708 4709 4710 static int __init nvme_core_init(void) 4711 { 4712 int result = -ENOMEM; 4713 4714 _nvme_check_size(); 4715 4716 nvme_wq = alloc_workqueue("nvme-wq", 4717 WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_SYSFS, 0); 4718 if (!nvme_wq) 4719 goto out; 4720 4721 nvme_reset_wq = alloc_workqueue("nvme-reset-wq", 4722 WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_SYSFS, 0); 4723 if (!nvme_reset_wq) 4724 goto destroy_wq; 4725 4726 nvme_delete_wq = alloc_workqueue("nvme-delete-wq", 4727 WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_SYSFS, 0); 4728 if (!nvme_delete_wq) 4729 goto destroy_reset_wq; 4730 4731 result = alloc_chrdev_region(&nvme_ctrl_base_chr_devt, 0, 4732 NVME_MINORS, "nvme"); 4733 if (result < 0) 4734 goto destroy_delete_wq; 4735 4736 nvme_class = class_create("nvme"); 4737 if (IS_ERR(nvme_class)) { 4738 result = PTR_ERR(nvme_class); 4739 goto unregister_chrdev; 4740 } 4741 nvme_class->dev_uevent = nvme_class_uevent; 4742 4743 nvme_subsys_class = class_create("nvme-subsystem"); 4744 if (IS_ERR(nvme_subsys_class)) { 4745 result = PTR_ERR(nvme_subsys_class); 4746 goto destroy_class; 4747 } 4748 4749 result = alloc_chrdev_region(&nvme_ns_chr_devt, 0, NVME_MINORS, 4750 "nvme-generic"); 4751 if (result < 0) 4752 goto destroy_subsys_class; 4753 4754 nvme_ns_chr_class = class_create("nvme-generic"); 4755 if (IS_ERR(nvme_ns_chr_class)) { 4756 result = PTR_ERR(nvme_ns_chr_class); 4757 goto unregister_generic_ns; 4758 } 4759 4760 result = nvme_init_auth(); 4761 if (result) 4762 goto destroy_ns_chr; 4763 return 0; 4764 4765 destroy_ns_chr: 4766 class_destroy(nvme_ns_chr_class); 4767 unregister_generic_ns: 4768 unregister_chrdev_region(nvme_ns_chr_devt, NVME_MINORS); 4769 destroy_subsys_class: 4770 class_destroy(nvme_subsys_class); 4771 destroy_class: 4772 class_destroy(nvme_class); 4773 unregister_chrdev: 4774 unregister_chrdev_region(nvme_ctrl_base_chr_devt, NVME_MINORS); 4775 destroy_delete_wq: 4776 destroy_workqueue(nvme_delete_wq); 4777 destroy_reset_wq: 4778 destroy_workqueue(nvme_reset_wq); 4779 destroy_wq: 4780 destroy_workqueue(nvme_wq); 4781 out: 4782 return result; 4783 } 4784 4785 static void __exit nvme_core_exit(void) 4786 { 4787 nvme_exit_auth(); 4788 class_destroy(nvme_ns_chr_class); 4789 class_destroy(nvme_subsys_class); 4790 class_destroy(nvme_class); 4791 unregister_chrdev_region(nvme_ns_chr_devt, NVME_MINORS); 4792 unregister_chrdev_region(nvme_ctrl_base_chr_devt, NVME_MINORS); 4793 destroy_workqueue(nvme_delete_wq); 4794 destroy_workqueue(nvme_reset_wq); 4795 destroy_workqueue(nvme_wq); 4796 ida_destroy(&nvme_ns_chr_minor_ida); 4797 ida_destroy(&nvme_instance_ida); 4798 } 4799 4800 MODULE_LICENSE("GPL"); 4801 MODULE_VERSION("1.0"); 4802 module_init(nvme_core_init); 4803 module_exit(nvme_core_exit); 4804