1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * NVM Express device driver 4 * Copyright (c) 2011-2014, Intel Corporation. 5 */ 6 7 #include <linux/blkdev.h> 8 #include <linux/blk-mq.h> 9 #include <linux/delay.h> 10 #include <linux/errno.h> 11 #include <linux/hdreg.h> 12 #include <linux/kernel.h> 13 #include <linux/module.h> 14 #include <linux/backing-dev.h> 15 #include <linux/list_sort.h> 16 #include <linux/slab.h> 17 #include <linux/types.h> 18 #include <linux/pr.h> 19 #include <linux/ptrace.h> 20 #include <linux/nvme_ioctl.h> 21 #include <linux/t10-pi.h> 22 #include <linux/pm_qos.h> 23 #include <asm/unaligned.h> 24 25 #include "nvme.h" 26 #include "fabrics.h" 27 28 #define CREATE_TRACE_POINTS 29 #include "trace.h" 30 31 #define NVME_MINORS (1U << MINORBITS) 32 33 unsigned int admin_timeout = 60; 34 module_param(admin_timeout, uint, 0644); 35 MODULE_PARM_DESC(admin_timeout, "timeout in seconds for admin commands"); 36 EXPORT_SYMBOL_GPL(admin_timeout); 37 38 unsigned int nvme_io_timeout = 30; 39 module_param_named(io_timeout, nvme_io_timeout, uint, 0644); 40 MODULE_PARM_DESC(io_timeout, "timeout in seconds for I/O"); 41 EXPORT_SYMBOL_GPL(nvme_io_timeout); 42 43 static unsigned char shutdown_timeout = 5; 44 module_param(shutdown_timeout, byte, 0644); 45 MODULE_PARM_DESC(shutdown_timeout, "timeout in seconds for controller shutdown"); 46 47 static u8 nvme_max_retries = 5; 48 module_param_named(max_retries, nvme_max_retries, byte, 0644); 49 MODULE_PARM_DESC(max_retries, "max number of retries a command may have"); 50 51 static unsigned long default_ps_max_latency_us = 100000; 52 module_param(default_ps_max_latency_us, ulong, 0644); 53 MODULE_PARM_DESC(default_ps_max_latency_us, 54 "max power saving latency for new devices; use PM QOS to change per device"); 55 56 static bool force_apst; 57 module_param(force_apst, bool, 0644); 58 MODULE_PARM_DESC(force_apst, "allow APST for newly enumerated devices even if quirked off"); 59 60 static bool streams; 61 module_param(streams, bool, 0644); 62 MODULE_PARM_DESC(streams, "turn on support for Streams write directives"); 63 64 /* 65 * nvme_wq - hosts nvme related works that are not reset or delete 66 * nvme_reset_wq - hosts nvme reset works 67 * nvme_delete_wq - hosts nvme delete works 68 * 69 * nvme_wq will host works such are scan, aen handling, fw activation, 70 * keep-alive error recovery, periodic reconnects etc. nvme_reset_wq 71 * runs reset works which also flush works hosted on nvme_wq for 72 * serialization purposes. nvme_delete_wq host controller deletion 73 * works which flush reset works for serialization. 74 */ 75 struct workqueue_struct *nvme_wq; 76 EXPORT_SYMBOL_GPL(nvme_wq); 77 78 struct workqueue_struct *nvme_reset_wq; 79 EXPORT_SYMBOL_GPL(nvme_reset_wq); 80 81 struct workqueue_struct *nvme_delete_wq; 82 EXPORT_SYMBOL_GPL(nvme_delete_wq); 83 84 static LIST_HEAD(nvme_subsystems); 85 static DEFINE_MUTEX(nvme_subsystems_lock); 86 87 static DEFINE_IDA(nvme_instance_ida); 88 static dev_t nvme_chr_devt; 89 static struct class *nvme_class; 90 static struct class *nvme_subsys_class; 91 92 static int nvme_revalidate_disk(struct gendisk *disk); 93 static void nvme_put_subsystem(struct nvme_subsystem *subsys); 94 static void nvme_remove_invalid_namespaces(struct nvme_ctrl *ctrl, 95 unsigned nsid); 96 97 static void nvme_set_queue_dying(struct nvme_ns *ns) 98 { 99 /* 100 * Revalidating a dead namespace sets capacity to 0. This will end 101 * buffered writers dirtying pages that can't be synced. 102 */ 103 if (!ns->disk || test_and_set_bit(NVME_NS_DEAD, &ns->flags)) 104 return; 105 blk_set_queue_dying(ns->queue); 106 /* Forcibly unquiesce queues to avoid blocking dispatch */ 107 blk_mq_unquiesce_queue(ns->queue); 108 /* 109 * Revalidate after unblocking dispatchers that may be holding bd_butex 110 */ 111 revalidate_disk(ns->disk); 112 } 113 114 static void nvme_queue_scan(struct nvme_ctrl *ctrl) 115 { 116 /* 117 * Only new queue scan work when admin and IO queues are both alive 118 */ 119 if (ctrl->state == NVME_CTRL_LIVE) 120 queue_work(nvme_wq, &ctrl->scan_work); 121 } 122 123 int nvme_reset_ctrl(struct nvme_ctrl *ctrl) 124 { 125 if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING)) 126 return -EBUSY; 127 if (!queue_work(nvme_reset_wq, &ctrl->reset_work)) 128 return -EBUSY; 129 return 0; 130 } 131 EXPORT_SYMBOL_GPL(nvme_reset_ctrl); 132 133 int nvme_reset_ctrl_sync(struct nvme_ctrl *ctrl) 134 { 135 int ret; 136 137 ret = nvme_reset_ctrl(ctrl); 138 if (!ret) { 139 flush_work(&ctrl->reset_work); 140 if (ctrl->state != NVME_CTRL_LIVE && 141 ctrl->state != NVME_CTRL_ADMIN_ONLY) 142 ret = -ENETRESET; 143 } 144 145 return ret; 146 } 147 EXPORT_SYMBOL_GPL(nvme_reset_ctrl_sync); 148 149 static void nvme_do_delete_ctrl(struct nvme_ctrl *ctrl) 150 { 151 dev_info(ctrl->device, 152 "Removing ctrl: NQN \"%s\"\n", ctrl->opts->subsysnqn); 153 154 flush_work(&ctrl->reset_work); 155 nvme_stop_ctrl(ctrl); 156 nvme_remove_namespaces(ctrl); 157 ctrl->ops->delete_ctrl(ctrl); 158 nvme_uninit_ctrl(ctrl); 159 nvme_put_ctrl(ctrl); 160 } 161 162 static void nvme_delete_ctrl_work(struct work_struct *work) 163 { 164 struct nvme_ctrl *ctrl = 165 container_of(work, struct nvme_ctrl, delete_work); 166 167 nvme_do_delete_ctrl(ctrl); 168 } 169 170 int nvme_delete_ctrl(struct nvme_ctrl *ctrl) 171 { 172 if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_DELETING)) 173 return -EBUSY; 174 if (!queue_work(nvme_delete_wq, &ctrl->delete_work)) 175 return -EBUSY; 176 return 0; 177 } 178 EXPORT_SYMBOL_GPL(nvme_delete_ctrl); 179 180 static int nvme_delete_ctrl_sync(struct nvme_ctrl *ctrl) 181 { 182 int ret = 0; 183 184 /* 185 * Keep a reference until nvme_do_delete_ctrl() complete, 186 * since ->delete_ctrl can free the controller. 187 */ 188 nvme_get_ctrl(ctrl); 189 if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_DELETING)) 190 ret = -EBUSY; 191 if (!ret) 192 nvme_do_delete_ctrl(ctrl); 193 nvme_put_ctrl(ctrl); 194 return ret; 195 } 196 197 static inline bool nvme_ns_has_pi(struct nvme_ns *ns) 198 { 199 return ns->pi_type && ns->ms == sizeof(struct t10_pi_tuple); 200 } 201 202 static blk_status_t nvme_error_status(u16 status) 203 { 204 switch (status & 0x7ff) { 205 case NVME_SC_SUCCESS: 206 return BLK_STS_OK; 207 case NVME_SC_CAP_EXCEEDED: 208 return BLK_STS_NOSPC; 209 case NVME_SC_LBA_RANGE: 210 return BLK_STS_TARGET; 211 case NVME_SC_BAD_ATTRIBUTES: 212 case NVME_SC_ONCS_NOT_SUPPORTED: 213 case NVME_SC_INVALID_OPCODE: 214 case NVME_SC_INVALID_FIELD: 215 case NVME_SC_INVALID_NS: 216 return BLK_STS_NOTSUPP; 217 case NVME_SC_WRITE_FAULT: 218 case NVME_SC_READ_ERROR: 219 case NVME_SC_UNWRITTEN_BLOCK: 220 case NVME_SC_ACCESS_DENIED: 221 case NVME_SC_READ_ONLY: 222 case NVME_SC_COMPARE_FAILED: 223 return BLK_STS_MEDIUM; 224 case NVME_SC_GUARD_CHECK: 225 case NVME_SC_APPTAG_CHECK: 226 case NVME_SC_REFTAG_CHECK: 227 case NVME_SC_INVALID_PI: 228 return BLK_STS_PROTECTION; 229 case NVME_SC_RESERVATION_CONFLICT: 230 return BLK_STS_NEXUS; 231 case NVME_SC_HOST_PATH_ERROR: 232 return BLK_STS_TRANSPORT; 233 default: 234 return BLK_STS_IOERR; 235 } 236 } 237 238 static inline bool nvme_req_needs_retry(struct request *req) 239 { 240 if (blk_noretry_request(req)) 241 return false; 242 if (nvme_req(req)->status & NVME_SC_DNR) 243 return false; 244 if (nvme_req(req)->retries >= nvme_max_retries) 245 return false; 246 return true; 247 } 248 249 static void nvme_retry_req(struct request *req) 250 { 251 struct nvme_ns *ns = req->q->queuedata; 252 unsigned long delay = 0; 253 u16 crd; 254 255 /* The mask and shift result must be <= 3 */ 256 crd = (nvme_req(req)->status & NVME_SC_CRD) >> 11; 257 if (ns && crd) 258 delay = ns->ctrl->crdt[crd - 1] * 100; 259 260 nvme_req(req)->retries++; 261 blk_mq_requeue_request(req, false); 262 blk_mq_delay_kick_requeue_list(req->q, delay); 263 } 264 265 void nvme_complete_rq(struct request *req) 266 { 267 blk_status_t status = nvme_error_status(nvme_req(req)->status); 268 269 trace_nvme_complete_rq(req); 270 271 if (nvme_req(req)->ctrl->kas) 272 nvme_req(req)->ctrl->comp_seen = true; 273 274 if (unlikely(status != BLK_STS_OK && nvme_req_needs_retry(req))) { 275 if ((req->cmd_flags & REQ_NVME_MPATH) && 276 blk_path_error(status)) { 277 nvme_failover_req(req); 278 return; 279 } 280 281 if (!blk_queue_dying(req->q)) { 282 nvme_retry_req(req); 283 return; 284 } 285 } 286 287 nvme_trace_bio_complete(req, status); 288 blk_mq_end_request(req, status); 289 } 290 EXPORT_SYMBOL_GPL(nvme_complete_rq); 291 292 bool nvme_cancel_request(struct request *req, void *data, bool reserved) 293 { 294 dev_dbg_ratelimited(((struct nvme_ctrl *) data)->device, 295 "Cancelling I/O %d", req->tag); 296 297 /* don't abort one completed request */ 298 if (blk_mq_request_completed(req)) 299 return true; 300 301 nvme_req(req)->status = NVME_SC_HOST_PATH_ERROR; 302 blk_mq_complete_request(req); 303 return true; 304 } 305 EXPORT_SYMBOL_GPL(nvme_cancel_request); 306 307 bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl, 308 enum nvme_ctrl_state new_state) 309 { 310 enum nvme_ctrl_state old_state; 311 unsigned long flags; 312 bool changed = false; 313 314 spin_lock_irqsave(&ctrl->lock, flags); 315 316 old_state = ctrl->state; 317 switch (new_state) { 318 case NVME_CTRL_ADMIN_ONLY: 319 switch (old_state) { 320 case NVME_CTRL_CONNECTING: 321 changed = true; 322 /* FALLTHRU */ 323 default: 324 break; 325 } 326 break; 327 case NVME_CTRL_LIVE: 328 switch (old_state) { 329 case NVME_CTRL_NEW: 330 case NVME_CTRL_RESETTING: 331 case NVME_CTRL_CONNECTING: 332 changed = true; 333 /* FALLTHRU */ 334 default: 335 break; 336 } 337 break; 338 case NVME_CTRL_RESETTING: 339 switch (old_state) { 340 case NVME_CTRL_NEW: 341 case NVME_CTRL_LIVE: 342 case NVME_CTRL_ADMIN_ONLY: 343 changed = true; 344 /* FALLTHRU */ 345 default: 346 break; 347 } 348 break; 349 case NVME_CTRL_CONNECTING: 350 switch (old_state) { 351 case NVME_CTRL_NEW: 352 case NVME_CTRL_RESETTING: 353 changed = true; 354 /* FALLTHRU */ 355 default: 356 break; 357 } 358 break; 359 case NVME_CTRL_DELETING: 360 switch (old_state) { 361 case NVME_CTRL_LIVE: 362 case NVME_CTRL_ADMIN_ONLY: 363 case NVME_CTRL_RESETTING: 364 case NVME_CTRL_CONNECTING: 365 changed = true; 366 /* FALLTHRU */ 367 default: 368 break; 369 } 370 break; 371 case NVME_CTRL_DEAD: 372 switch (old_state) { 373 case NVME_CTRL_DELETING: 374 changed = true; 375 /* FALLTHRU */ 376 default: 377 break; 378 } 379 break; 380 default: 381 break; 382 } 383 384 if (changed) 385 ctrl->state = new_state; 386 387 spin_unlock_irqrestore(&ctrl->lock, flags); 388 if (changed && ctrl->state == NVME_CTRL_LIVE) 389 nvme_kick_requeue_lists(ctrl); 390 return changed; 391 } 392 EXPORT_SYMBOL_GPL(nvme_change_ctrl_state); 393 394 static void nvme_free_ns_head(struct kref *ref) 395 { 396 struct nvme_ns_head *head = 397 container_of(ref, struct nvme_ns_head, ref); 398 399 nvme_mpath_remove_disk(head); 400 ida_simple_remove(&head->subsys->ns_ida, head->instance); 401 list_del_init(&head->entry); 402 cleanup_srcu_struct(&head->srcu); 403 nvme_put_subsystem(head->subsys); 404 kfree(head); 405 } 406 407 static void nvme_put_ns_head(struct nvme_ns_head *head) 408 { 409 kref_put(&head->ref, nvme_free_ns_head); 410 } 411 412 static void nvme_free_ns(struct kref *kref) 413 { 414 struct nvme_ns *ns = container_of(kref, struct nvme_ns, kref); 415 416 if (ns->ndev) 417 nvme_nvm_unregister(ns); 418 419 put_disk(ns->disk); 420 nvme_put_ns_head(ns->head); 421 nvme_put_ctrl(ns->ctrl); 422 kfree(ns); 423 } 424 425 static void nvme_put_ns(struct nvme_ns *ns) 426 { 427 kref_put(&ns->kref, nvme_free_ns); 428 } 429 430 static inline void nvme_clear_nvme_request(struct request *req) 431 { 432 if (!(req->rq_flags & RQF_DONTPREP)) { 433 nvme_req(req)->retries = 0; 434 nvme_req(req)->flags = 0; 435 req->rq_flags |= RQF_DONTPREP; 436 } 437 } 438 439 struct request *nvme_alloc_request(struct request_queue *q, 440 struct nvme_command *cmd, blk_mq_req_flags_t flags, int qid) 441 { 442 unsigned op = nvme_is_write(cmd) ? REQ_OP_DRV_OUT : REQ_OP_DRV_IN; 443 struct request *req; 444 445 if (qid == NVME_QID_ANY) { 446 req = blk_mq_alloc_request(q, op, flags); 447 } else { 448 req = blk_mq_alloc_request_hctx(q, op, flags, 449 qid ? qid - 1 : 0); 450 } 451 if (IS_ERR(req)) 452 return req; 453 454 req->cmd_flags |= REQ_FAILFAST_DRIVER; 455 nvme_clear_nvme_request(req); 456 nvme_req(req)->cmd = cmd; 457 458 return req; 459 } 460 EXPORT_SYMBOL_GPL(nvme_alloc_request); 461 462 static int nvme_toggle_streams(struct nvme_ctrl *ctrl, bool enable) 463 { 464 struct nvme_command c; 465 466 memset(&c, 0, sizeof(c)); 467 468 c.directive.opcode = nvme_admin_directive_send; 469 c.directive.nsid = cpu_to_le32(NVME_NSID_ALL); 470 c.directive.doper = NVME_DIR_SND_ID_OP_ENABLE; 471 c.directive.dtype = NVME_DIR_IDENTIFY; 472 c.directive.tdtype = NVME_DIR_STREAMS; 473 c.directive.endir = enable ? NVME_DIR_ENDIR : 0; 474 475 return nvme_submit_sync_cmd(ctrl->admin_q, &c, NULL, 0); 476 } 477 478 static int nvme_disable_streams(struct nvme_ctrl *ctrl) 479 { 480 return nvme_toggle_streams(ctrl, false); 481 } 482 483 static int nvme_enable_streams(struct nvme_ctrl *ctrl) 484 { 485 return nvme_toggle_streams(ctrl, true); 486 } 487 488 static int nvme_get_stream_params(struct nvme_ctrl *ctrl, 489 struct streams_directive_params *s, u32 nsid) 490 { 491 struct nvme_command c; 492 493 memset(&c, 0, sizeof(c)); 494 memset(s, 0, sizeof(*s)); 495 496 c.directive.opcode = nvme_admin_directive_recv; 497 c.directive.nsid = cpu_to_le32(nsid); 498 c.directive.numd = cpu_to_le32((sizeof(*s) >> 2) - 1); 499 c.directive.doper = NVME_DIR_RCV_ST_OP_PARAM; 500 c.directive.dtype = NVME_DIR_STREAMS; 501 502 return nvme_submit_sync_cmd(ctrl->admin_q, &c, s, sizeof(*s)); 503 } 504 505 static int nvme_configure_directives(struct nvme_ctrl *ctrl) 506 { 507 struct streams_directive_params s; 508 int ret; 509 510 if (!(ctrl->oacs & NVME_CTRL_OACS_DIRECTIVES)) 511 return 0; 512 if (!streams) 513 return 0; 514 515 ret = nvme_enable_streams(ctrl); 516 if (ret) 517 return ret; 518 519 ret = nvme_get_stream_params(ctrl, &s, NVME_NSID_ALL); 520 if (ret) 521 return ret; 522 523 ctrl->nssa = le16_to_cpu(s.nssa); 524 if (ctrl->nssa < BLK_MAX_WRITE_HINTS - 1) { 525 dev_info(ctrl->device, "too few streams (%u) available\n", 526 ctrl->nssa); 527 nvme_disable_streams(ctrl); 528 return 0; 529 } 530 531 ctrl->nr_streams = min_t(unsigned, ctrl->nssa, BLK_MAX_WRITE_HINTS - 1); 532 dev_info(ctrl->device, "Using %u streams\n", ctrl->nr_streams); 533 return 0; 534 } 535 536 /* 537 * Check if 'req' has a write hint associated with it. If it does, assign 538 * a valid namespace stream to the write. 539 */ 540 static void nvme_assign_write_stream(struct nvme_ctrl *ctrl, 541 struct request *req, u16 *control, 542 u32 *dsmgmt) 543 { 544 enum rw_hint streamid = req->write_hint; 545 546 if (streamid == WRITE_LIFE_NOT_SET || streamid == WRITE_LIFE_NONE) 547 streamid = 0; 548 else { 549 streamid--; 550 if (WARN_ON_ONCE(streamid > ctrl->nr_streams)) 551 return; 552 553 *control |= NVME_RW_DTYPE_STREAMS; 554 *dsmgmt |= streamid << 16; 555 } 556 557 if (streamid < ARRAY_SIZE(req->q->write_hints)) 558 req->q->write_hints[streamid] += blk_rq_bytes(req) >> 9; 559 } 560 561 static inline void nvme_setup_flush(struct nvme_ns *ns, 562 struct nvme_command *cmnd) 563 { 564 cmnd->common.opcode = nvme_cmd_flush; 565 cmnd->common.nsid = cpu_to_le32(ns->head->ns_id); 566 } 567 568 static blk_status_t nvme_setup_discard(struct nvme_ns *ns, struct request *req, 569 struct nvme_command *cmnd) 570 { 571 unsigned short segments = blk_rq_nr_discard_segments(req), n = 0; 572 struct nvme_dsm_range *range; 573 struct bio *bio; 574 575 range = kmalloc_array(segments, sizeof(*range), 576 GFP_ATOMIC | __GFP_NOWARN); 577 if (!range) { 578 /* 579 * If we fail allocation our range, fallback to the controller 580 * discard page. If that's also busy, it's safe to return 581 * busy, as we know we can make progress once that's freed. 582 */ 583 if (test_and_set_bit_lock(0, &ns->ctrl->discard_page_busy)) 584 return BLK_STS_RESOURCE; 585 586 range = page_address(ns->ctrl->discard_page); 587 } 588 589 __rq_for_each_bio(bio, req) { 590 u64 slba = nvme_block_nr(ns, bio->bi_iter.bi_sector); 591 u32 nlb = bio->bi_iter.bi_size >> ns->lba_shift; 592 593 if (n < segments) { 594 range[n].cattr = cpu_to_le32(0); 595 range[n].nlb = cpu_to_le32(nlb); 596 range[n].slba = cpu_to_le64(slba); 597 } 598 n++; 599 } 600 601 if (WARN_ON_ONCE(n != segments)) { 602 if (virt_to_page(range) == ns->ctrl->discard_page) 603 clear_bit_unlock(0, &ns->ctrl->discard_page_busy); 604 else 605 kfree(range); 606 return BLK_STS_IOERR; 607 } 608 609 cmnd->dsm.opcode = nvme_cmd_dsm; 610 cmnd->dsm.nsid = cpu_to_le32(ns->head->ns_id); 611 cmnd->dsm.nr = cpu_to_le32(segments - 1); 612 cmnd->dsm.attributes = cpu_to_le32(NVME_DSMGMT_AD); 613 614 req->special_vec.bv_page = virt_to_page(range); 615 req->special_vec.bv_offset = offset_in_page(range); 616 req->special_vec.bv_len = sizeof(*range) * segments; 617 req->rq_flags |= RQF_SPECIAL_PAYLOAD; 618 619 return BLK_STS_OK; 620 } 621 622 static inline blk_status_t nvme_setup_write_zeroes(struct nvme_ns *ns, 623 struct request *req, struct nvme_command *cmnd) 624 { 625 if (ns->ctrl->quirks & NVME_QUIRK_DEALLOCATE_ZEROES) 626 return nvme_setup_discard(ns, req, cmnd); 627 628 cmnd->write_zeroes.opcode = nvme_cmd_write_zeroes; 629 cmnd->write_zeroes.nsid = cpu_to_le32(ns->head->ns_id); 630 cmnd->write_zeroes.slba = 631 cpu_to_le64(nvme_block_nr(ns, blk_rq_pos(req))); 632 cmnd->write_zeroes.length = 633 cpu_to_le16((blk_rq_bytes(req) >> ns->lba_shift) - 1); 634 cmnd->write_zeroes.control = 0; 635 return BLK_STS_OK; 636 } 637 638 static inline blk_status_t nvme_setup_rw(struct nvme_ns *ns, 639 struct request *req, struct nvme_command *cmnd) 640 { 641 struct nvme_ctrl *ctrl = ns->ctrl; 642 u16 control = 0; 643 u32 dsmgmt = 0; 644 645 if (req->cmd_flags & REQ_FUA) 646 control |= NVME_RW_FUA; 647 if (req->cmd_flags & (REQ_FAILFAST_DEV | REQ_RAHEAD)) 648 control |= NVME_RW_LR; 649 650 if (req->cmd_flags & REQ_RAHEAD) 651 dsmgmt |= NVME_RW_DSM_FREQ_PREFETCH; 652 653 cmnd->rw.opcode = (rq_data_dir(req) ? nvme_cmd_write : nvme_cmd_read); 654 cmnd->rw.nsid = cpu_to_le32(ns->head->ns_id); 655 cmnd->rw.slba = cpu_to_le64(nvme_block_nr(ns, blk_rq_pos(req))); 656 cmnd->rw.length = cpu_to_le16((blk_rq_bytes(req) >> ns->lba_shift) - 1); 657 658 if (req_op(req) == REQ_OP_WRITE && ctrl->nr_streams) 659 nvme_assign_write_stream(ctrl, req, &control, &dsmgmt); 660 661 if (ns->ms) { 662 /* 663 * If formated with metadata, the block layer always provides a 664 * metadata buffer if CONFIG_BLK_DEV_INTEGRITY is enabled. Else 665 * we enable the PRACT bit for protection information or set the 666 * namespace capacity to zero to prevent any I/O. 667 */ 668 if (!blk_integrity_rq(req)) { 669 if (WARN_ON_ONCE(!nvme_ns_has_pi(ns))) 670 return BLK_STS_NOTSUPP; 671 control |= NVME_RW_PRINFO_PRACT; 672 } 673 674 switch (ns->pi_type) { 675 case NVME_NS_DPS_PI_TYPE3: 676 control |= NVME_RW_PRINFO_PRCHK_GUARD; 677 break; 678 case NVME_NS_DPS_PI_TYPE1: 679 case NVME_NS_DPS_PI_TYPE2: 680 control |= NVME_RW_PRINFO_PRCHK_GUARD | 681 NVME_RW_PRINFO_PRCHK_REF; 682 cmnd->rw.reftag = cpu_to_le32(t10_pi_ref_tag(req)); 683 break; 684 } 685 } 686 687 cmnd->rw.control = cpu_to_le16(control); 688 cmnd->rw.dsmgmt = cpu_to_le32(dsmgmt); 689 return 0; 690 } 691 692 void nvme_cleanup_cmd(struct request *req) 693 { 694 if (req->rq_flags & RQF_SPECIAL_PAYLOAD) { 695 struct nvme_ns *ns = req->rq_disk->private_data; 696 struct page *page = req->special_vec.bv_page; 697 698 if (page == ns->ctrl->discard_page) 699 clear_bit_unlock(0, &ns->ctrl->discard_page_busy); 700 else 701 kfree(page_address(page) + req->special_vec.bv_offset); 702 } 703 } 704 EXPORT_SYMBOL_GPL(nvme_cleanup_cmd); 705 706 blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req, 707 struct nvme_command *cmd) 708 { 709 blk_status_t ret = BLK_STS_OK; 710 711 nvme_clear_nvme_request(req); 712 713 memset(cmd, 0, sizeof(*cmd)); 714 switch (req_op(req)) { 715 case REQ_OP_DRV_IN: 716 case REQ_OP_DRV_OUT: 717 memcpy(cmd, nvme_req(req)->cmd, sizeof(*cmd)); 718 break; 719 case REQ_OP_FLUSH: 720 nvme_setup_flush(ns, cmd); 721 break; 722 case REQ_OP_WRITE_ZEROES: 723 ret = nvme_setup_write_zeroes(ns, req, cmd); 724 break; 725 case REQ_OP_DISCARD: 726 ret = nvme_setup_discard(ns, req, cmd); 727 break; 728 case REQ_OP_READ: 729 case REQ_OP_WRITE: 730 ret = nvme_setup_rw(ns, req, cmd); 731 break; 732 default: 733 WARN_ON_ONCE(1); 734 return BLK_STS_IOERR; 735 } 736 737 cmd->common.command_id = req->tag; 738 trace_nvme_setup_cmd(req, cmd); 739 return ret; 740 } 741 EXPORT_SYMBOL_GPL(nvme_setup_cmd); 742 743 static void nvme_end_sync_rq(struct request *rq, blk_status_t error) 744 { 745 struct completion *waiting = rq->end_io_data; 746 747 rq->end_io_data = NULL; 748 complete(waiting); 749 } 750 751 static void nvme_execute_rq_polled(struct request_queue *q, 752 struct gendisk *bd_disk, struct request *rq, int at_head) 753 { 754 DECLARE_COMPLETION_ONSTACK(wait); 755 756 WARN_ON_ONCE(!test_bit(QUEUE_FLAG_POLL, &q->queue_flags)); 757 758 rq->cmd_flags |= REQ_HIPRI; 759 rq->end_io_data = &wait; 760 blk_execute_rq_nowait(q, bd_disk, rq, at_head, nvme_end_sync_rq); 761 762 while (!completion_done(&wait)) { 763 blk_poll(q, request_to_qc_t(rq->mq_hctx, rq), true); 764 cond_resched(); 765 } 766 } 767 768 /* 769 * Returns 0 on success. If the result is negative, it's a Linux error code; 770 * if the result is positive, it's an NVM Express status code 771 */ 772 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 773 union nvme_result *result, void *buffer, unsigned bufflen, 774 unsigned timeout, int qid, int at_head, 775 blk_mq_req_flags_t flags, bool poll) 776 { 777 struct request *req; 778 int ret; 779 780 req = nvme_alloc_request(q, cmd, flags, qid); 781 if (IS_ERR(req)) 782 return PTR_ERR(req); 783 784 req->timeout = timeout ? timeout : ADMIN_TIMEOUT; 785 786 if (buffer && bufflen) { 787 ret = blk_rq_map_kern(q, req, buffer, bufflen, GFP_KERNEL); 788 if (ret) 789 goto out; 790 } 791 792 if (poll) 793 nvme_execute_rq_polled(req->q, NULL, req, at_head); 794 else 795 blk_execute_rq(req->q, NULL, req, at_head); 796 if (result) 797 *result = nvme_req(req)->result; 798 if (nvme_req(req)->flags & NVME_REQ_CANCELLED) 799 ret = -EINTR; 800 else 801 ret = nvme_req(req)->status; 802 out: 803 blk_mq_free_request(req); 804 return ret; 805 } 806 EXPORT_SYMBOL_GPL(__nvme_submit_sync_cmd); 807 808 int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 809 void *buffer, unsigned bufflen) 810 { 811 return __nvme_submit_sync_cmd(q, cmd, NULL, buffer, bufflen, 0, 812 NVME_QID_ANY, 0, 0, false); 813 } 814 EXPORT_SYMBOL_GPL(nvme_submit_sync_cmd); 815 816 static void *nvme_add_user_metadata(struct bio *bio, void __user *ubuf, 817 unsigned len, u32 seed, bool write) 818 { 819 struct bio_integrity_payload *bip; 820 int ret = -ENOMEM; 821 void *buf; 822 823 buf = kmalloc(len, GFP_KERNEL); 824 if (!buf) 825 goto out; 826 827 ret = -EFAULT; 828 if (write && copy_from_user(buf, ubuf, len)) 829 goto out_free_meta; 830 831 bip = bio_integrity_alloc(bio, GFP_KERNEL, 1); 832 if (IS_ERR(bip)) { 833 ret = PTR_ERR(bip); 834 goto out_free_meta; 835 } 836 837 bip->bip_iter.bi_size = len; 838 bip->bip_iter.bi_sector = seed; 839 ret = bio_integrity_add_page(bio, virt_to_page(buf), len, 840 offset_in_page(buf)); 841 if (ret == len) 842 return buf; 843 ret = -ENOMEM; 844 out_free_meta: 845 kfree(buf); 846 out: 847 return ERR_PTR(ret); 848 } 849 850 static int nvme_submit_user_cmd(struct request_queue *q, 851 struct nvme_command *cmd, void __user *ubuffer, 852 unsigned bufflen, void __user *meta_buffer, unsigned meta_len, 853 u32 meta_seed, u64 *result, unsigned timeout) 854 { 855 bool write = nvme_is_write(cmd); 856 struct nvme_ns *ns = q->queuedata; 857 struct gendisk *disk = ns ? ns->disk : NULL; 858 struct request *req; 859 struct bio *bio = NULL; 860 void *meta = NULL; 861 int ret; 862 863 req = nvme_alloc_request(q, cmd, 0, NVME_QID_ANY); 864 if (IS_ERR(req)) 865 return PTR_ERR(req); 866 867 req->timeout = timeout ? timeout : ADMIN_TIMEOUT; 868 nvme_req(req)->flags |= NVME_REQ_USERCMD; 869 870 if (ubuffer && bufflen) { 871 ret = blk_rq_map_user(q, req, NULL, ubuffer, bufflen, 872 GFP_KERNEL); 873 if (ret) 874 goto out; 875 bio = req->bio; 876 bio->bi_disk = disk; 877 if (disk && meta_buffer && meta_len) { 878 meta = nvme_add_user_metadata(bio, meta_buffer, meta_len, 879 meta_seed, write); 880 if (IS_ERR(meta)) { 881 ret = PTR_ERR(meta); 882 goto out_unmap; 883 } 884 req->cmd_flags |= REQ_INTEGRITY; 885 } 886 } 887 888 blk_execute_rq(req->q, disk, req, 0); 889 if (nvme_req(req)->flags & NVME_REQ_CANCELLED) 890 ret = -EINTR; 891 else 892 ret = nvme_req(req)->status; 893 if (result) 894 *result = le64_to_cpu(nvme_req(req)->result.u64); 895 if (meta && !ret && !write) { 896 if (copy_to_user(meta_buffer, meta, meta_len)) 897 ret = -EFAULT; 898 } 899 kfree(meta); 900 out_unmap: 901 if (bio) 902 blk_rq_unmap_user(bio); 903 out: 904 blk_mq_free_request(req); 905 return ret; 906 } 907 908 static void nvme_keep_alive_end_io(struct request *rq, blk_status_t status) 909 { 910 struct nvme_ctrl *ctrl = rq->end_io_data; 911 unsigned long flags; 912 bool startka = false; 913 914 blk_mq_free_request(rq); 915 916 if (status) { 917 dev_err(ctrl->device, 918 "failed nvme_keep_alive_end_io error=%d\n", 919 status); 920 return; 921 } 922 923 ctrl->comp_seen = false; 924 spin_lock_irqsave(&ctrl->lock, flags); 925 if (ctrl->state == NVME_CTRL_LIVE || 926 ctrl->state == NVME_CTRL_CONNECTING) 927 startka = true; 928 spin_unlock_irqrestore(&ctrl->lock, flags); 929 if (startka) 930 schedule_delayed_work(&ctrl->ka_work, ctrl->kato * HZ); 931 } 932 933 static int nvme_keep_alive(struct nvme_ctrl *ctrl) 934 { 935 struct request *rq; 936 937 rq = nvme_alloc_request(ctrl->admin_q, &ctrl->ka_cmd, BLK_MQ_REQ_RESERVED, 938 NVME_QID_ANY); 939 if (IS_ERR(rq)) 940 return PTR_ERR(rq); 941 942 rq->timeout = ctrl->kato * HZ; 943 rq->end_io_data = ctrl; 944 945 blk_execute_rq_nowait(rq->q, NULL, rq, 0, nvme_keep_alive_end_io); 946 947 return 0; 948 } 949 950 static void nvme_keep_alive_work(struct work_struct *work) 951 { 952 struct nvme_ctrl *ctrl = container_of(to_delayed_work(work), 953 struct nvme_ctrl, ka_work); 954 bool comp_seen = ctrl->comp_seen; 955 956 if ((ctrl->ctratt & NVME_CTRL_ATTR_TBKAS) && comp_seen) { 957 dev_dbg(ctrl->device, 958 "reschedule traffic based keep-alive timer\n"); 959 ctrl->comp_seen = false; 960 schedule_delayed_work(&ctrl->ka_work, ctrl->kato * HZ); 961 return; 962 } 963 964 if (nvme_keep_alive(ctrl)) { 965 /* allocation failure, reset the controller */ 966 dev_err(ctrl->device, "keep-alive failed\n"); 967 nvme_reset_ctrl(ctrl); 968 return; 969 } 970 } 971 972 static void nvme_start_keep_alive(struct nvme_ctrl *ctrl) 973 { 974 if (unlikely(ctrl->kato == 0)) 975 return; 976 977 schedule_delayed_work(&ctrl->ka_work, ctrl->kato * HZ); 978 } 979 980 void nvme_stop_keep_alive(struct nvme_ctrl *ctrl) 981 { 982 if (unlikely(ctrl->kato == 0)) 983 return; 984 985 cancel_delayed_work_sync(&ctrl->ka_work); 986 } 987 EXPORT_SYMBOL_GPL(nvme_stop_keep_alive); 988 989 static int nvme_identify_ctrl(struct nvme_ctrl *dev, struct nvme_id_ctrl **id) 990 { 991 struct nvme_command c = { }; 992 int error; 993 994 /* gcc-4.4.4 (at least) has issues with initializers and anon unions */ 995 c.identify.opcode = nvme_admin_identify; 996 c.identify.cns = NVME_ID_CNS_CTRL; 997 998 *id = kmalloc(sizeof(struct nvme_id_ctrl), GFP_KERNEL); 999 if (!*id) 1000 return -ENOMEM; 1001 1002 error = nvme_submit_sync_cmd(dev->admin_q, &c, *id, 1003 sizeof(struct nvme_id_ctrl)); 1004 if (error) 1005 kfree(*id); 1006 return error; 1007 } 1008 1009 static int nvme_identify_ns_descs(struct nvme_ctrl *ctrl, unsigned nsid, 1010 struct nvme_ns_ids *ids) 1011 { 1012 struct nvme_command c = { }; 1013 int status; 1014 void *data; 1015 int pos; 1016 int len; 1017 1018 c.identify.opcode = nvme_admin_identify; 1019 c.identify.nsid = cpu_to_le32(nsid); 1020 c.identify.cns = NVME_ID_CNS_NS_DESC_LIST; 1021 1022 data = kzalloc(NVME_IDENTIFY_DATA_SIZE, GFP_KERNEL); 1023 if (!data) 1024 return -ENOMEM; 1025 1026 status = nvme_submit_sync_cmd(ctrl->admin_q, &c, data, 1027 NVME_IDENTIFY_DATA_SIZE); 1028 if (status) 1029 goto free_data; 1030 1031 for (pos = 0; pos < NVME_IDENTIFY_DATA_SIZE; pos += len) { 1032 struct nvme_ns_id_desc *cur = data + pos; 1033 1034 if (cur->nidl == 0) 1035 break; 1036 1037 switch (cur->nidt) { 1038 case NVME_NIDT_EUI64: 1039 if (cur->nidl != NVME_NIDT_EUI64_LEN) { 1040 dev_warn(ctrl->device, 1041 "ctrl returned bogus length: %d for NVME_NIDT_EUI64\n", 1042 cur->nidl); 1043 goto free_data; 1044 } 1045 len = NVME_NIDT_EUI64_LEN; 1046 memcpy(ids->eui64, data + pos + sizeof(*cur), len); 1047 break; 1048 case NVME_NIDT_NGUID: 1049 if (cur->nidl != NVME_NIDT_NGUID_LEN) { 1050 dev_warn(ctrl->device, 1051 "ctrl returned bogus length: %d for NVME_NIDT_NGUID\n", 1052 cur->nidl); 1053 goto free_data; 1054 } 1055 len = NVME_NIDT_NGUID_LEN; 1056 memcpy(ids->nguid, data + pos + sizeof(*cur), len); 1057 break; 1058 case NVME_NIDT_UUID: 1059 if (cur->nidl != NVME_NIDT_UUID_LEN) { 1060 dev_warn(ctrl->device, 1061 "ctrl returned bogus length: %d for NVME_NIDT_UUID\n", 1062 cur->nidl); 1063 goto free_data; 1064 } 1065 len = NVME_NIDT_UUID_LEN; 1066 uuid_copy(&ids->uuid, data + pos + sizeof(*cur)); 1067 break; 1068 default: 1069 /* Skip unknown types */ 1070 len = cur->nidl; 1071 break; 1072 } 1073 1074 len += sizeof(*cur); 1075 } 1076 free_data: 1077 kfree(data); 1078 return status; 1079 } 1080 1081 static int nvme_identify_ns_list(struct nvme_ctrl *dev, unsigned nsid, __le32 *ns_list) 1082 { 1083 struct nvme_command c = { }; 1084 1085 c.identify.opcode = nvme_admin_identify; 1086 c.identify.cns = NVME_ID_CNS_NS_ACTIVE_LIST; 1087 c.identify.nsid = cpu_to_le32(nsid); 1088 return nvme_submit_sync_cmd(dev->admin_q, &c, ns_list, 1089 NVME_IDENTIFY_DATA_SIZE); 1090 } 1091 1092 static int nvme_identify_ns(struct nvme_ctrl *ctrl, 1093 unsigned nsid, struct nvme_id_ns **id) 1094 { 1095 struct nvme_command c = { }; 1096 int error; 1097 1098 /* gcc-4.4.4 (at least) has issues with initializers and anon unions */ 1099 c.identify.opcode = nvme_admin_identify; 1100 c.identify.nsid = cpu_to_le32(nsid); 1101 c.identify.cns = NVME_ID_CNS_NS; 1102 1103 *id = kmalloc(sizeof(**id), GFP_KERNEL); 1104 if (!*id) 1105 return -ENOMEM; 1106 1107 error = nvme_submit_sync_cmd(ctrl->admin_q, &c, *id, sizeof(**id)); 1108 if (error) { 1109 dev_warn(ctrl->device, "Identify namespace failed (%d)\n", error); 1110 kfree(*id); 1111 } 1112 1113 return error; 1114 } 1115 1116 static int nvme_features(struct nvme_ctrl *dev, u8 op, unsigned int fid, 1117 unsigned int dword11, void *buffer, size_t buflen, u32 *result) 1118 { 1119 struct nvme_command c; 1120 union nvme_result res; 1121 int ret; 1122 1123 memset(&c, 0, sizeof(c)); 1124 c.features.opcode = op; 1125 c.features.fid = cpu_to_le32(fid); 1126 c.features.dword11 = cpu_to_le32(dword11); 1127 1128 ret = __nvme_submit_sync_cmd(dev->admin_q, &c, &res, 1129 buffer, buflen, 0, NVME_QID_ANY, 0, 0, false); 1130 if (ret >= 0 && result) 1131 *result = le32_to_cpu(res.u32); 1132 return ret; 1133 } 1134 1135 int nvme_set_features(struct nvme_ctrl *dev, unsigned int fid, 1136 unsigned int dword11, void *buffer, size_t buflen, 1137 u32 *result) 1138 { 1139 return nvme_features(dev, nvme_admin_set_features, fid, dword11, buffer, 1140 buflen, result); 1141 } 1142 EXPORT_SYMBOL_GPL(nvme_set_features); 1143 1144 int nvme_get_features(struct nvme_ctrl *dev, unsigned int fid, 1145 unsigned int dword11, void *buffer, size_t buflen, 1146 u32 *result) 1147 { 1148 return nvme_features(dev, nvme_admin_get_features, fid, dword11, buffer, 1149 buflen, result); 1150 } 1151 EXPORT_SYMBOL_GPL(nvme_get_features); 1152 1153 int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count) 1154 { 1155 u32 q_count = (*count - 1) | ((*count - 1) << 16); 1156 u32 result; 1157 int status, nr_io_queues; 1158 1159 status = nvme_set_features(ctrl, NVME_FEAT_NUM_QUEUES, q_count, NULL, 0, 1160 &result); 1161 if (status < 0) 1162 return status; 1163 1164 /* 1165 * Degraded controllers might return an error when setting the queue 1166 * count. We still want to be able to bring them online and offer 1167 * access to the admin queue, as that might be only way to fix them up. 1168 */ 1169 if (status > 0) { 1170 dev_err(ctrl->device, "Could not set queue count (%d)\n", status); 1171 *count = 0; 1172 } else { 1173 nr_io_queues = min(result & 0xffff, result >> 16) + 1; 1174 *count = min(*count, nr_io_queues); 1175 } 1176 1177 return 0; 1178 } 1179 EXPORT_SYMBOL_GPL(nvme_set_queue_count); 1180 1181 #define NVME_AEN_SUPPORTED \ 1182 (NVME_AEN_CFG_NS_ATTR | NVME_AEN_CFG_FW_ACT | \ 1183 NVME_AEN_CFG_ANA_CHANGE | NVME_AEN_CFG_DISC_CHANGE) 1184 1185 static void nvme_enable_aen(struct nvme_ctrl *ctrl) 1186 { 1187 u32 result, supported_aens = ctrl->oaes & NVME_AEN_SUPPORTED; 1188 int status; 1189 1190 if (!supported_aens) 1191 return; 1192 1193 status = nvme_set_features(ctrl, NVME_FEAT_ASYNC_EVENT, supported_aens, 1194 NULL, 0, &result); 1195 if (status) 1196 dev_warn(ctrl->device, "Failed to configure AEN (cfg %x)\n", 1197 supported_aens); 1198 1199 queue_work(nvme_wq, &ctrl->async_event_work); 1200 } 1201 1202 static int nvme_submit_io(struct nvme_ns *ns, struct nvme_user_io __user *uio) 1203 { 1204 struct nvme_user_io io; 1205 struct nvme_command c; 1206 unsigned length, meta_len; 1207 void __user *metadata; 1208 1209 if (copy_from_user(&io, uio, sizeof(io))) 1210 return -EFAULT; 1211 if (io.flags) 1212 return -EINVAL; 1213 1214 switch (io.opcode) { 1215 case nvme_cmd_write: 1216 case nvme_cmd_read: 1217 case nvme_cmd_compare: 1218 break; 1219 default: 1220 return -EINVAL; 1221 } 1222 1223 length = (io.nblocks + 1) << ns->lba_shift; 1224 meta_len = (io.nblocks + 1) * ns->ms; 1225 metadata = (void __user *)(uintptr_t)io.metadata; 1226 1227 if (ns->ext) { 1228 length += meta_len; 1229 meta_len = 0; 1230 } else if (meta_len) { 1231 if ((io.metadata & 3) || !io.metadata) 1232 return -EINVAL; 1233 } 1234 1235 memset(&c, 0, sizeof(c)); 1236 c.rw.opcode = io.opcode; 1237 c.rw.flags = io.flags; 1238 c.rw.nsid = cpu_to_le32(ns->head->ns_id); 1239 c.rw.slba = cpu_to_le64(io.slba); 1240 c.rw.length = cpu_to_le16(io.nblocks); 1241 c.rw.control = cpu_to_le16(io.control); 1242 c.rw.dsmgmt = cpu_to_le32(io.dsmgmt); 1243 c.rw.reftag = cpu_to_le32(io.reftag); 1244 c.rw.apptag = cpu_to_le16(io.apptag); 1245 c.rw.appmask = cpu_to_le16(io.appmask); 1246 1247 return nvme_submit_user_cmd(ns->queue, &c, 1248 (void __user *)(uintptr_t)io.addr, length, 1249 metadata, meta_len, lower_32_bits(io.slba), NULL, 0); 1250 } 1251 1252 static u32 nvme_known_admin_effects(u8 opcode) 1253 { 1254 switch (opcode) { 1255 case nvme_admin_format_nvm: 1256 return NVME_CMD_EFFECTS_CSUPP | NVME_CMD_EFFECTS_LBCC | 1257 NVME_CMD_EFFECTS_CSE_MASK; 1258 case nvme_admin_sanitize_nvm: 1259 return NVME_CMD_EFFECTS_CSE_MASK; 1260 default: 1261 break; 1262 } 1263 return 0; 1264 } 1265 1266 static u32 nvme_passthru_start(struct nvme_ctrl *ctrl, struct nvme_ns *ns, 1267 u8 opcode) 1268 { 1269 u32 effects = 0; 1270 1271 if (ns) { 1272 if (ctrl->effects) 1273 effects = le32_to_cpu(ctrl->effects->iocs[opcode]); 1274 if (effects & ~(NVME_CMD_EFFECTS_CSUPP | NVME_CMD_EFFECTS_LBCC)) 1275 dev_warn(ctrl->device, 1276 "IO command:%02x has unhandled effects:%08x\n", 1277 opcode, effects); 1278 return 0; 1279 } 1280 1281 if (ctrl->effects) 1282 effects = le32_to_cpu(ctrl->effects->acs[opcode]); 1283 effects |= nvme_known_admin_effects(opcode); 1284 1285 /* 1286 * For simplicity, IO to all namespaces is quiesced even if the command 1287 * effects say only one namespace is affected. 1288 */ 1289 if (effects & (NVME_CMD_EFFECTS_LBCC | NVME_CMD_EFFECTS_CSE_MASK)) { 1290 mutex_lock(&ctrl->scan_lock); 1291 mutex_lock(&ctrl->subsys->lock); 1292 nvme_mpath_start_freeze(ctrl->subsys); 1293 nvme_mpath_wait_freeze(ctrl->subsys); 1294 nvme_start_freeze(ctrl); 1295 nvme_wait_freeze(ctrl); 1296 } 1297 return effects; 1298 } 1299 1300 static void nvme_update_formats(struct nvme_ctrl *ctrl) 1301 { 1302 struct nvme_ns *ns; 1303 1304 down_read(&ctrl->namespaces_rwsem); 1305 list_for_each_entry(ns, &ctrl->namespaces, list) 1306 if (ns->disk && nvme_revalidate_disk(ns->disk)) 1307 nvme_set_queue_dying(ns); 1308 up_read(&ctrl->namespaces_rwsem); 1309 1310 nvme_remove_invalid_namespaces(ctrl, NVME_NSID_ALL); 1311 } 1312 1313 static void nvme_passthru_end(struct nvme_ctrl *ctrl, u32 effects) 1314 { 1315 /* 1316 * Revalidate LBA changes prior to unfreezing. This is necessary to 1317 * prevent memory corruption if a logical block size was changed by 1318 * this command. 1319 */ 1320 if (effects & NVME_CMD_EFFECTS_LBCC) 1321 nvme_update_formats(ctrl); 1322 if (effects & (NVME_CMD_EFFECTS_LBCC | NVME_CMD_EFFECTS_CSE_MASK)) { 1323 nvme_unfreeze(ctrl); 1324 nvme_mpath_unfreeze(ctrl->subsys); 1325 mutex_unlock(&ctrl->subsys->lock); 1326 mutex_unlock(&ctrl->scan_lock); 1327 } 1328 if (effects & NVME_CMD_EFFECTS_CCC) 1329 nvme_init_identify(ctrl); 1330 if (effects & (NVME_CMD_EFFECTS_NIC | NVME_CMD_EFFECTS_NCC)) 1331 nvme_queue_scan(ctrl); 1332 } 1333 1334 static int nvme_user_cmd(struct nvme_ctrl *ctrl, struct nvme_ns *ns, 1335 struct nvme_passthru_cmd __user *ucmd) 1336 { 1337 struct nvme_passthru_cmd cmd; 1338 struct nvme_command c; 1339 unsigned timeout = 0; 1340 u32 effects; 1341 u64 result; 1342 int status; 1343 1344 if (!capable(CAP_SYS_ADMIN)) 1345 return -EACCES; 1346 if (copy_from_user(&cmd, ucmd, sizeof(cmd))) 1347 return -EFAULT; 1348 if (cmd.flags) 1349 return -EINVAL; 1350 1351 memset(&c, 0, sizeof(c)); 1352 c.common.opcode = cmd.opcode; 1353 c.common.flags = cmd.flags; 1354 c.common.nsid = cpu_to_le32(cmd.nsid); 1355 c.common.cdw2[0] = cpu_to_le32(cmd.cdw2); 1356 c.common.cdw2[1] = cpu_to_le32(cmd.cdw3); 1357 c.common.cdw10 = cpu_to_le32(cmd.cdw10); 1358 c.common.cdw11 = cpu_to_le32(cmd.cdw11); 1359 c.common.cdw12 = cpu_to_le32(cmd.cdw12); 1360 c.common.cdw13 = cpu_to_le32(cmd.cdw13); 1361 c.common.cdw14 = cpu_to_le32(cmd.cdw14); 1362 c.common.cdw15 = cpu_to_le32(cmd.cdw15); 1363 1364 if (cmd.timeout_ms) 1365 timeout = msecs_to_jiffies(cmd.timeout_ms); 1366 1367 effects = nvme_passthru_start(ctrl, ns, cmd.opcode); 1368 status = nvme_submit_user_cmd(ns ? ns->queue : ctrl->admin_q, &c, 1369 (void __user *)(uintptr_t)cmd.addr, cmd.data_len, 1370 (void __user *)(uintptr_t)cmd.metadata, 1371 cmd.metadata_len, 0, &result, timeout); 1372 nvme_passthru_end(ctrl, effects); 1373 1374 if (status >= 0) { 1375 if (put_user(result, &ucmd->result)) 1376 return -EFAULT; 1377 } 1378 1379 return status; 1380 } 1381 1382 static int nvme_user_cmd64(struct nvme_ctrl *ctrl, struct nvme_ns *ns, 1383 struct nvme_passthru_cmd64 __user *ucmd) 1384 { 1385 struct nvme_passthru_cmd64 cmd; 1386 struct nvme_command c; 1387 unsigned timeout = 0; 1388 u32 effects; 1389 int status; 1390 1391 if (!capable(CAP_SYS_ADMIN)) 1392 return -EACCES; 1393 if (copy_from_user(&cmd, ucmd, sizeof(cmd))) 1394 return -EFAULT; 1395 if (cmd.flags) 1396 return -EINVAL; 1397 1398 memset(&c, 0, sizeof(c)); 1399 c.common.opcode = cmd.opcode; 1400 c.common.flags = cmd.flags; 1401 c.common.nsid = cpu_to_le32(cmd.nsid); 1402 c.common.cdw2[0] = cpu_to_le32(cmd.cdw2); 1403 c.common.cdw2[1] = cpu_to_le32(cmd.cdw3); 1404 c.common.cdw10 = cpu_to_le32(cmd.cdw10); 1405 c.common.cdw11 = cpu_to_le32(cmd.cdw11); 1406 c.common.cdw12 = cpu_to_le32(cmd.cdw12); 1407 c.common.cdw13 = cpu_to_le32(cmd.cdw13); 1408 c.common.cdw14 = cpu_to_le32(cmd.cdw14); 1409 c.common.cdw15 = cpu_to_le32(cmd.cdw15); 1410 1411 if (cmd.timeout_ms) 1412 timeout = msecs_to_jiffies(cmd.timeout_ms); 1413 1414 effects = nvme_passthru_start(ctrl, ns, cmd.opcode); 1415 status = nvme_submit_user_cmd(ns ? ns->queue : ctrl->admin_q, &c, 1416 (void __user *)(uintptr_t)cmd.addr, cmd.data_len, 1417 (void __user *)(uintptr_t)cmd.metadata, cmd.metadata_len, 1418 0, &cmd.result, timeout); 1419 nvme_passthru_end(ctrl, effects); 1420 1421 if (status >= 0) { 1422 if (put_user(cmd.result, &ucmd->result)) 1423 return -EFAULT; 1424 } 1425 1426 return status; 1427 } 1428 1429 /* 1430 * Issue ioctl requests on the first available path. Note that unlike normal 1431 * block layer requests we will not retry failed request on another controller. 1432 */ 1433 static struct nvme_ns *nvme_get_ns_from_disk(struct gendisk *disk, 1434 struct nvme_ns_head **head, int *srcu_idx) 1435 { 1436 #ifdef CONFIG_NVME_MULTIPATH 1437 if (disk->fops == &nvme_ns_head_ops) { 1438 struct nvme_ns *ns; 1439 1440 *head = disk->private_data; 1441 *srcu_idx = srcu_read_lock(&(*head)->srcu); 1442 ns = nvme_find_path(*head); 1443 if (!ns) 1444 srcu_read_unlock(&(*head)->srcu, *srcu_idx); 1445 return ns; 1446 } 1447 #endif 1448 *head = NULL; 1449 *srcu_idx = -1; 1450 return disk->private_data; 1451 } 1452 1453 static void nvme_put_ns_from_disk(struct nvme_ns_head *head, int idx) 1454 { 1455 if (head) 1456 srcu_read_unlock(&head->srcu, idx); 1457 } 1458 1459 static bool is_ctrl_ioctl(unsigned int cmd) 1460 { 1461 if (cmd == NVME_IOCTL_ADMIN_CMD || cmd == NVME_IOCTL_ADMIN64_CMD) 1462 return true; 1463 if (is_sed_ioctl(cmd)) 1464 return true; 1465 return false; 1466 } 1467 1468 static int nvme_handle_ctrl_ioctl(struct nvme_ns *ns, unsigned int cmd, 1469 void __user *argp, 1470 struct nvme_ns_head *head, 1471 int srcu_idx) 1472 { 1473 struct nvme_ctrl *ctrl = ns->ctrl; 1474 int ret; 1475 1476 nvme_get_ctrl(ns->ctrl); 1477 nvme_put_ns_from_disk(head, srcu_idx); 1478 1479 switch (cmd) { 1480 case NVME_IOCTL_ADMIN_CMD: 1481 ret = nvme_user_cmd(ctrl, NULL, argp); 1482 break; 1483 case NVME_IOCTL_ADMIN64_CMD: 1484 ret = nvme_user_cmd64(ctrl, NULL, argp); 1485 break; 1486 default: 1487 ret = sed_ioctl(ctrl->opal_dev, cmd, argp); 1488 break; 1489 } 1490 nvme_put_ctrl(ctrl); 1491 return ret; 1492 } 1493 1494 static int nvme_ioctl(struct block_device *bdev, fmode_t mode, 1495 unsigned int cmd, unsigned long arg) 1496 { 1497 struct nvme_ns_head *head = NULL; 1498 void __user *argp = (void __user *)arg; 1499 struct nvme_ns *ns; 1500 int srcu_idx, ret; 1501 1502 ns = nvme_get_ns_from_disk(bdev->bd_disk, &head, &srcu_idx); 1503 if (unlikely(!ns)) 1504 return -EWOULDBLOCK; 1505 1506 /* 1507 * Handle ioctls that apply to the controller instead of the namespace 1508 * seperately and drop the ns SRCU reference early. This avoids a 1509 * deadlock when deleting namespaces using the passthrough interface. 1510 */ 1511 if (is_ctrl_ioctl(cmd)) 1512 return nvme_handle_ctrl_ioctl(ns, cmd, argp, head, srcu_idx); 1513 1514 switch (cmd) { 1515 case NVME_IOCTL_ID: 1516 force_successful_syscall_return(); 1517 ret = ns->head->ns_id; 1518 break; 1519 case NVME_IOCTL_IO_CMD: 1520 ret = nvme_user_cmd(ns->ctrl, ns, argp); 1521 break; 1522 case NVME_IOCTL_SUBMIT_IO: 1523 ret = nvme_submit_io(ns, argp); 1524 break; 1525 case NVME_IOCTL_IO64_CMD: 1526 ret = nvme_user_cmd64(ns->ctrl, ns, argp); 1527 break; 1528 default: 1529 if (ns->ndev) 1530 ret = nvme_nvm_ioctl(ns, cmd, arg); 1531 else 1532 ret = -ENOTTY; 1533 } 1534 1535 nvme_put_ns_from_disk(head, srcu_idx); 1536 return ret; 1537 } 1538 1539 static int nvme_open(struct block_device *bdev, fmode_t mode) 1540 { 1541 struct nvme_ns *ns = bdev->bd_disk->private_data; 1542 1543 #ifdef CONFIG_NVME_MULTIPATH 1544 /* should never be called due to GENHD_FL_HIDDEN */ 1545 if (WARN_ON_ONCE(ns->head->disk)) 1546 goto fail; 1547 #endif 1548 if (!kref_get_unless_zero(&ns->kref)) 1549 goto fail; 1550 if (!try_module_get(ns->ctrl->ops->module)) 1551 goto fail_put_ns; 1552 1553 return 0; 1554 1555 fail_put_ns: 1556 nvme_put_ns(ns); 1557 fail: 1558 return -ENXIO; 1559 } 1560 1561 static void nvme_release(struct gendisk *disk, fmode_t mode) 1562 { 1563 struct nvme_ns *ns = disk->private_data; 1564 1565 module_put(ns->ctrl->ops->module); 1566 nvme_put_ns(ns); 1567 } 1568 1569 static int nvme_getgeo(struct block_device *bdev, struct hd_geometry *geo) 1570 { 1571 /* some standard values */ 1572 geo->heads = 1 << 6; 1573 geo->sectors = 1 << 5; 1574 geo->cylinders = get_capacity(bdev->bd_disk) >> 11; 1575 return 0; 1576 } 1577 1578 #ifdef CONFIG_BLK_DEV_INTEGRITY 1579 static void nvme_init_integrity(struct gendisk *disk, u16 ms, u8 pi_type) 1580 { 1581 struct blk_integrity integrity; 1582 1583 memset(&integrity, 0, sizeof(integrity)); 1584 switch (pi_type) { 1585 case NVME_NS_DPS_PI_TYPE3: 1586 integrity.profile = &t10_pi_type3_crc; 1587 integrity.tag_size = sizeof(u16) + sizeof(u32); 1588 integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE; 1589 break; 1590 case NVME_NS_DPS_PI_TYPE1: 1591 case NVME_NS_DPS_PI_TYPE2: 1592 integrity.profile = &t10_pi_type1_crc; 1593 integrity.tag_size = sizeof(u16); 1594 integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE; 1595 break; 1596 default: 1597 integrity.profile = NULL; 1598 break; 1599 } 1600 integrity.tuple_size = ms; 1601 blk_integrity_register(disk, &integrity); 1602 blk_queue_max_integrity_segments(disk->queue, 1); 1603 } 1604 #else 1605 static void nvme_init_integrity(struct gendisk *disk, u16 ms, u8 pi_type) 1606 { 1607 } 1608 #endif /* CONFIG_BLK_DEV_INTEGRITY */ 1609 1610 static void nvme_set_chunk_size(struct nvme_ns *ns) 1611 { 1612 u32 chunk_size = (((u32)ns->noiob) << (ns->lba_shift - 9)); 1613 blk_queue_chunk_sectors(ns->queue, rounddown_pow_of_two(chunk_size)); 1614 } 1615 1616 static void nvme_config_discard(struct gendisk *disk, struct nvme_ns *ns) 1617 { 1618 struct nvme_ctrl *ctrl = ns->ctrl; 1619 struct request_queue *queue = disk->queue; 1620 u32 size = queue_logical_block_size(queue); 1621 1622 if (!(ctrl->oncs & NVME_CTRL_ONCS_DSM)) { 1623 blk_queue_flag_clear(QUEUE_FLAG_DISCARD, queue); 1624 return; 1625 } 1626 1627 if (ctrl->nr_streams && ns->sws && ns->sgs) 1628 size *= ns->sws * ns->sgs; 1629 1630 BUILD_BUG_ON(PAGE_SIZE / sizeof(struct nvme_dsm_range) < 1631 NVME_DSM_MAX_RANGES); 1632 1633 queue->limits.discard_alignment = 0; 1634 queue->limits.discard_granularity = size; 1635 1636 /* If discard is already enabled, don't reset queue limits */ 1637 if (blk_queue_flag_test_and_set(QUEUE_FLAG_DISCARD, queue)) 1638 return; 1639 1640 blk_queue_max_discard_sectors(queue, UINT_MAX); 1641 blk_queue_max_discard_segments(queue, NVME_DSM_MAX_RANGES); 1642 1643 if (ctrl->quirks & NVME_QUIRK_DEALLOCATE_ZEROES) 1644 blk_queue_max_write_zeroes_sectors(queue, UINT_MAX); 1645 } 1646 1647 static void nvme_config_write_zeroes(struct gendisk *disk, struct nvme_ns *ns) 1648 { 1649 u32 max_sectors; 1650 unsigned short bs = 1 << ns->lba_shift; 1651 1652 if (!(ns->ctrl->oncs & NVME_CTRL_ONCS_WRITE_ZEROES) || 1653 (ns->ctrl->quirks & NVME_QUIRK_DISABLE_WRITE_ZEROES)) 1654 return; 1655 /* 1656 * Even though NVMe spec explicitly states that MDTS is not 1657 * applicable to the write-zeroes:- "The restriction does not apply to 1658 * commands that do not transfer data between the host and the 1659 * controller (e.g., Write Uncorrectable ro Write Zeroes command).". 1660 * In order to be more cautious use controller's max_hw_sectors value 1661 * to configure the maximum sectors for the write-zeroes which is 1662 * configured based on the controller's MDTS field in the 1663 * nvme_init_identify() if available. 1664 */ 1665 if (ns->ctrl->max_hw_sectors == UINT_MAX) 1666 max_sectors = ((u32)(USHRT_MAX + 1) * bs) >> 9; 1667 else 1668 max_sectors = ((u32)(ns->ctrl->max_hw_sectors + 1) * bs) >> 9; 1669 1670 blk_queue_max_write_zeroes_sectors(disk->queue, max_sectors); 1671 } 1672 1673 static int nvme_report_ns_ids(struct nvme_ctrl *ctrl, unsigned int nsid, 1674 struct nvme_id_ns *id, struct nvme_ns_ids *ids) 1675 { 1676 int ret = 0; 1677 1678 memset(ids, 0, sizeof(*ids)); 1679 1680 if (ctrl->vs >= NVME_VS(1, 1, 0)) 1681 memcpy(ids->eui64, id->eui64, sizeof(id->eui64)); 1682 if (ctrl->vs >= NVME_VS(1, 2, 0)) 1683 memcpy(ids->nguid, id->nguid, sizeof(id->nguid)); 1684 if (ctrl->vs >= NVME_VS(1, 3, 0)) { 1685 /* Don't treat error as fatal we potentially 1686 * already have a NGUID or EUI-64 1687 */ 1688 ret = nvme_identify_ns_descs(ctrl, nsid, ids); 1689 if (ret) 1690 dev_warn(ctrl->device, 1691 "Identify Descriptors failed (%d)\n", ret); 1692 } 1693 return ret; 1694 } 1695 1696 static bool nvme_ns_ids_valid(struct nvme_ns_ids *ids) 1697 { 1698 return !uuid_is_null(&ids->uuid) || 1699 memchr_inv(ids->nguid, 0, sizeof(ids->nguid)) || 1700 memchr_inv(ids->eui64, 0, sizeof(ids->eui64)); 1701 } 1702 1703 static bool nvme_ns_ids_equal(struct nvme_ns_ids *a, struct nvme_ns_ids *b) 1704 { 1705 return uuid_equal(&a->uuid, &b->uuid) && 1706 memcmp(&a->nguid, &b->nguid, sizeof(a->nguid)) == 0 && 1707 memcmp(&a->eui64, &b->eui64, sizeof(a->eui64)) == 0; 1708 } 1709 1710 static void nvme_update_disk_info(struct gendisk *disk, 1711 struct nvme_ns *ns, struct nvme_id_ns *id) 1712 { 1713 sector_t capacity = le64_to_cpu(id->nsze) << (ns->lba_shift - 9); 1714 unsigned short bs = 1 << ns->lba_shift; 1715 u32 atomic_bs, phys_bs, io_opt; 1716 1717 if (ns->lba_shift > PAGE_SHIFT) { 1718 /* unsupported block size, set capacity to 0 later */ 1719 bs = (1 << 9); 1720 } 1721 blk_mq_freeze_queue(disk->queue); 1722 blk_integrity_unregister(disk); 1723 1724 if (id->nabo == 0) { 1725 /* 1726 * Bit 1 indicates whether NAWUPF is defined for this namespace 1727 * and whether it should be used instead of AWUPF. If NAWUPF == 1728 * 0 then AWUPF must be used instead. 1729 */ 1730 if (id->nsfeat & (1 << 1) && id->nawupf) 1731 atomic_bs = (1 + le16_to_cpu(id->nawupf)) * bs; 1732 else 1733 atomic_bs = (1 + ns->ctrl->subsys->awupf) * bs; 1734 } else { 1735 atomic_bs = bs; 1736 } 1737 phys_bs = bs; 1738 io_opt = bs; 1739 if (id->nsfeat & (1 << 4)) { 1740 /* NPWG = Namespace Preferred Write Granularity */ 1741 phys_bs *= 1 + le16_to_cpu(id->npwg); 1742 /* NOWS = Namespace Optimal Write Size */ 1743 io_opt *= 1 + le16_to_cpu(id->nows); 1744 } 1745 1746 blk_queue_logical_block_size(disk->queue, bs); 1747 /* 1748 * Linux filesystems assume writing a single physical block is 1749 * an atomic operation. Hence limit the physical block size to the 1750 * value of the Atomic Write Unit Power Fail parameter. 1751 */ 1752 blk_queue_physical_block_size(disk->queue, min(phys_bs, atomic_bs)); 1753 blk_queue_io_min(disk->queue, phys_bs); 1754 blk_queue_io_opt(disk->queue, io_opt); 1755 1756 if (ns->ms && !ns->ext && 1757 (ns->ctrl->ops->flags & NVME_F_METADATA_SUPPORTED)) 1758 nvme_init_integrity(disk, ns->ms, ns->pi_type); 1759 if ((ns->ms && !nvme_ns_has_pi(ns) && !blk_get_integrity(disk)) || 1760 ns->lba_shift > PAGE_SHIFT) 1761 capacity = 0; 1762 1763 set_capacity(disk, capacity); 1764 1765 nvme_config_discard(disk, ns); 1766 nvme_config_write_zeroes(disk, ns); 1767 1768 if (id->nsattr & (1 << 0)) 1769 set_disk_ro(disk, true); 1770 else 1771 set_disk_ro(disk, false); 1772 1773 blk_mq_unfreeze_queue(disk->queue); 1774 } 1775 1776 static void __nvme_revalidate_disk(struct gendisk *disk, struct nvme_id_ns *id) 1777 { 1778 struct nvme_ns *ns = disk->private_data; 1779 1780 /* 1781 * If identify namespace failed, use default 512 byte block size so 1782 * block layer can use before failing read/write for 0 capacity. 1783 */ 1784 ns->lba_shift = id->lbaf[id->flbas & NVME_NS_FLBAS_LBA_MASK].ds; 1785 if (ns->lba_shift == 0) 1786 ns->lba_shift = 9; 1787 ns->noiob = le16_to_cpu(id->noiob); 1788 ns->ms = le16_to_cpu(id->lbaf[id->flbas & NVME_NS_FLBAS_LBA_MASK].ms); 1789 ns->ext = ns->ms && (id->flbas & NVME_NS_FLBAS_META_EXT); 1790 /* the PI implementation requires metadata equal t10 pi tuple size */ 1791 if (ns->ms == sizeof(struct t10_pi_tuple)) 1792 ns->pi_type = id->dps & NVME_NS_DPS_PI_MASK; 1793 else 1794 ns->pi_type = 0; 1795 1796 if (ns->noiob) 1797 nvme_set_chunk_size(ns); 1798 nvme_update_disk_info(disk, ns, id); 1799 #ifdef CONFIG_NVME_MULTIPATH 1800 if (ns->head->disk) { 1801 nvme_update_disk_info(ns->head->disk, ns, id); 1802 blk_queue_stack_limits(ns->head->disk->queue, ns->queue); 1803 revalidate_disk(ns->head->disk); 1804 } 1805 #endif 1806 } 1807 1808 static int nvme_revalidate_disk(struct gendisk *disk) 1809 { 1810 struct nvme_ns *ns = disk->private_data; 1811 struct nvme_ctrl *ctrl = ns->ctrl; 1812 struct nvme_id_ns *id; 1813 struct nvme_ns_ids ids; 1814 int ret = 0; 1815 1816 if (test_bit(NVME_NS_DEAD, &ns->flags)) { 1817 set_capacity(disk, 0); 1818 return -ENODEV; 1819 } 1820 1821 ret = nvme_identify_ns(ctrl, ns->head->ns_id, &id); 1822 if (ret) 1823 goto out; 1824 1825 if (id->ncap == 0) { 1826 ret = -ENODEV; 1827 goto free_id; 1828 } 1829 1830 __nvme_revalidate_disk(disk, id); 1831 ret = nvme_report_ns_ids(ctrl, ns->head->ns_id, id, &ids); 1832 if (ret) 1833 goto free_id; 1834 1835 if (!nvme_ns_ids_equal(&ns->head->ids, &ids)) { 1836 dev_err(ctrl->device, 1837 "identifiers changed for nsid %d\n", ns->head->ns_id); 1838 ret = -ENODEV; 1839 } 1840 1841 free_id: 1842 kfree(id); 1843 out: 1844 /* 1845 * Only fail the function if we got a fatal error back from the 1846 * device, otherwise ignore the error and just move on. 1847 */ 1848 if (ret == -ENOMEM || (ret > 0 && !(ret & NVME_SC_DNR))) 1849 ret = 0; 1850 else if (ret > 0) 1851 ret = blk_status_to_errno(nvme_error_status(ret)); 1852 return ret; 1853 } 1854 1855 static char nvme_pr_type(enum pr_type type) 1856 { 1857 switch (type) { 1858 case PR_WRITE_EXCLUSIVE: 1859 return 1; 1860 case PR_EXCLUSIVE_ACCESS: 1861 return 2; 1862 case PR_WRITE_EXCLUSIVE_REG_ONLY: 1863 return 3; 1864 case PR_EXCLUSIVE_ACCESS_REG_ONLY: 1865 return 4; 1866 case PR_WRITE_EXCLUSIVE_ALL_REGS: 1867 return 5; 1868 case PR_EXCLUSIVE_ACCESS_ALL_REGS: 1869 return 6; 1870 default: 1871 return 0; 1872 } 1873 }; 1874 1875 static int nvme_pr_command(struct block_device *bdev, u32 cdw10, 1876 u64 key, u64 sa_key, u8 op) 1877 { 1878 struct nvme_ns_head *head = NULL; 1879 struct nvme_ns *ns; 1880 struct nvme_command c; 1881 int srcu_idx, ret; 1882 u8 data[16] = { 0, }; 1883 1884 ns = nvme_get_ns_from_disk(bdev->bd_disk, &head, &srcu_idx); 1885 if (unlikely(!ns)) 1886 return -EWOULDBLOCK; 1887 1888 put_unaligned_le64(key, &data[0]); 1889 put_unaligned_le64(sa_key, &data[8]); 1890 1891 memset(&c, 0, sizeof(c)); 1892 c.common.opcode = op; 1893 c.common.nsid = cpu_to_le32(ns->head->ns_id); 1894 c.common.cdw10 = cpu_to_le32(cdw10); 1895 1896 ret = nvme_submit_sync_cmd(ns->queue, &c, data, 16); 1897 nvme_put_ns_from_disk(head, srcu_idx); 1898 return ret; 1899 } 1900 1901 static int nvme_pr_register(struct block_device *bdev, u64 old, 1902 u64 new, unsigned flags) 1903 { 1904 u32 cdw10; 1905 1906 if (flags & ~PR_FL_IGNORE_KEY) 1907 return -EOPNOTSUPP; 1908 1909 cdw10 = old ? 2 : 0; 1910 cdw10 |= (flags & PR_FL_IGNORE_KEY) ? 1 << 3 : 0; 1911 cdw10 |= (1 << 30) | (1 << 31); /* PTPL=1 */ 1912 return nvme_pr_command(bdev, cdw10, old, new, nvme_cmd_resv_register); 1913 } 1914 1915 static int nvme_pr_reserve(struct block_device *bdev, u64 key, 1916 enum pr_type type, unsigned flags) 1917 { 1918 u32 cdw10; 1919 1920 if (flags & ~PR_FL_IGNORE_KEY) 1921 return -EOPNOTSUPP; 1922 1923 cdw10 = nvme_pr_type(type) << 8; 1924 cdw10 |= ((flags & PR_FL_IGNORE_KEY) ? 1 << 3 : 0); 1925 return nvme_pr_command(bdev, cdw10, key, 0, nvme_cmd_resv_acquire); 1926 } 1927 1928 static int nvme_pr_preempt(struct block_device *bdev, u64 old, u64 new, 1929 enum pr_type type, bool abort) 1930 { 1931 u32 cdw10 = nvme_pr_type(type) << 8 | (abort ? 2 : 1); 1932 return nvme_pr_command(bdev, cdw10, old, new, nvme_cmd_resv_acquire); 1933 } 1934 1935 static int nvme_pr_clear(struct block_device *bdev, u64 key) 1936 { 1937 u32 cdw10 = 1 | (key ? 1 << 3 : 0); 1938 return nvme_pr_command(bdev, cdw10, key, 0, nvme_cmd_resv_register); 1939 } 1940 1941 static int nvme_pr_release(struct block_device *bdev, u64 key, enum pr_type type) 1942 { 1943 u32 cdw10 = nvme_pr_type(type) << 8 | (key ? 1 << 3 : 0); 1944 return nvme_pr_command(bdev, cdw10, key, 0, nvme_cmd_resv_release); 1945 } 1946 1947 static const struct pr_ops nvme_pr_ops = { 1948 .pr_register = nvme_pr_register, 1949 .pr_reserve = nvme_pr_reserve, 1950 .pr_release = nvme_pr_release, 1951 .pr_preempt = nvme_pr_preempt, 1952 .pr_clear = nvme_pr_clear, 1953 }; 1954 1955 #ifdef CONFIG_BLK_SED_OPAL 1956 int nvme_sec_submit(void *data, u16 spsp, u8 secp, void *buffer, size_t len, 1957 bool send) 1958 { 1959 struct nvme_ctrl *ctrl = data; 1960 struct nvme_command cmd; 1961 1962 memset(&cmd, 0, sizeof(cmd)); 1963 if (send) 1964 cmd.common.opcode = nvme_admin_security_send; 1965 else 1966 cmd.common.opcode = nvme_admin_security_recv; 1967 cmd.common.nsid = 0; 1968 cmd.common.cdw10 = cpu_to_le32(((u32)secp) << 24 | ((u32)spsp) << 8); 1969 cmd.common.cdw11 = cpu_to_le32(len); 1970 1971 return __nvme_submit_sync_cmd(ctrl->admin_q, &cmd, NULL, buffer, len, 1972 ADMIN_TIMEOUT, NVME_QID_ANY, 1, 0, false); 1973 } 1974 EXPORT_SYMBOL_GPL(nvme_sec_submit); 1975 #endif /* CONFIG_BLK_SED_OPAL */ 1976 1977 static const struct block_device_operations nvme_fops = { 1978 .owner = THIS_MODULE, 1979 .ioctl = nvme_ioctl, 1980 .compat_ioctl = nvme_ioctl, 1981 .open = nvme_open, 1982 .release = nvme_release, 1983 .getgeo = nvme_getgeo, 1984 .revalidate_disk= nvme_revalidate_disk, 1985 .pr_ops = &nvme_pr_ops, 1986 }; 1987 1988 #ifdef CONFIG_NVME_MULTIPATH 1989 static int nvme_ns_head_open(struct block_device *bdev, fmode_t mode) 1990 { 1991 struct nvme_ns_head *head = bdev->bd_disk->private_data; 1992 1993 if (!kref_get_unless_zero(&head->ref)) 1994 return -ENXIO; 1995 return 0; 1996 } 1997 1998 static void nvme_ns_head_release(struct gendisk *disk, fmode_t mode) 1999 { 2000 nvme_put_ns_head(disk->private_data); 2001 } 2002 2003 const struct block_device_operations nvme_ns_head_ops = { 2004 .owner = THIS_MODULE, 2005 .open = nvme_ns_head_open, 2006 .release = nvme_ns_head_release, 2007 .ioctl = nvme_ioctl, 2008 .compat_ioctl = nvme_ioctl, 2009 .getgeo = nvme_getgeo, 2010 .pr_ops = &nvme_pr_ops, 2011 }; 2012 #endif /* CONFIG_NVME_MULTIPATH */ 2013 2014 static int nvme_wait_ready(struct nvme_ctrl *ctrl, u64 cap, bool enabled) 2015 { 2016 unsigned long timeout = 2017 ((NVME_CAP_TIMEOUT(cap) + 1) * HZ / 2) + jiffies; 2018 u32 csts, bit = enabled ? NVME_CSTS_RDY : 0; 2019 int ret; 2020 2021 while ((ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts)) == 0) { 2022 if (csts == ~0) 2023 return -ENODEV; 2024 if ((csts & NVME_CSTS_RDY) == bit) 2025 break; 2026 2027 msleep(100); 2028 if (fatal_signal_pending(current)) 2029 return -EINTR; 2030 if (time_after(jiffies, timeout)) { 2031 dev_err(ctrl->device, 2032 "Device not ready; aborting %s\n", enabled ? 2033 "initialisation" : "reset"); 2034 return -ENODEV; 2035 } 2036 } 2037 2038 return ret; 2039 } 2040 2041 /* 2042 * If the device has been passed off to us in an enabled state, just clear 2043 * the enabled bit. The spec says we should set the 'shutdown notification 2044 * bits', but doing so may cause the device to complete commands to the 2045 * admin queue ... and we don't know what memory that might be pointing at! 2046 */ 2047 int nvme_disable_ctrl(struct nvme_ctrl *ctrl) 2048 { 2049 int ret; 2050 2051 ctrl->ctrl_config &= ~NVME_CC_SHN_MASK; 2052 ctrl->ctrl_config &= ~NVME_CC_ENABLE; 2053 2054 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config); 2055 if (ret) 2056 return ret; 2057 2058 if (ctrl->quirks & NVME_QUIRK_DELAY_BEFORE_CHK_RDY) 2059 msleep(NVME_QUIRK_DELAY_AMOUNT); 2060 2061 return nvme_wait_ready(ctrl, ctrl->cap, false); 2062 } 2063 EXPORT_SYMBOL_GPL(nvme_disable_ctrl); 2064 2065 int nvme_enable_ctrl(struct nvme_ctrl *ctrl) 2066 { 2067 /* 2068 * Default to a 4K page size, with the intention to update this 2069 * path in the future to accomodate architectures with differing 2070 * kernel and IO page sizes. 2071 */ 2072 unsigned dev_page_min, page_shift = 12; 2073 int ret; 2074 2075 ret = ctrl->ops->reg_read64(ctrl, NVME_REG_CAP, &ctrl->cap); 2076 if (ret) { 2077 dev_err(ctrl->device, "Reading CAP failed (%d)\n", ret); 2078 return ret; 2079 } 2080 dev_page_min = NVME_CAP_MPSMIN(ctrl->cap) + 12; 2081 2082 if (page_shift < dev_page_min) { 2083 dev_err(ctrl->device, 2084 "Minimum device page size %u too large for host (%u)\n", 2085 1 << dev_page_min, 1 << page_shift); 2086 return -ENODEV; 2087 } 2088 2089 ctrl->page_size = 1 << page_shift; 2090 2091 ctrl->ctrl_config = NVME_CC_CSS_NVM; 2092 ctrl->ctrl_config |= (page_shift - 12) << NVME_CC_MPS_SHIFT; 2093 ctrl->ctrl_config |= NVME_CC_AMS_RR | NVME_CC_SHN_NONE; 2094 ctrl->ctrl_config |= NVME_CC_IOSQES | NVME_CC_IOCQES; 2095 ctrl->ctrl_config |= NVME_CC_ENABLE; 2096 2097 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config); 2098 if (ret) 2099 return ret; 2100 return nvme_wait_ready(ctrl, ctrl->cap, true); 2101 } 2102 EXPORT_SYMBOL_GPL(nvme_enable_ctrl); 2103 2104 int nvme_shutdown_ctrl(struct nvme_ctrl *ctrl) 2105 { 2106 unsigned long timeout = jiffies + (ctrl->shutdown_timeout * HZ); 2107 u32 csts; 2108 int ret; 2109 2110 ctrl->ctrl_config &= ~NVME_CC_SHN_MASK; 2111 ctrl->ctrl_config |= NVME_CC_SHN_NORMAL; 2112 2113 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config); 2114 if (ret) 2115 return ret; 2116 2117 while ((ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts)) == 0) { 2118 if ((csts & NVME_CSTS_SHST_MASK) == NVME_CSTS_SHST_CMPLT) 2119 break; 2120 2121 msleep(100); 2122 if (fatal_signal_pending(current)) 2123 return -EINTR; 2124 if (time_after(jiffies, timeout)) { 2125 dev_err(ctrl->device, 2126 "Device shutdown incomplete; abort shutdown\n"); 2127 return -ENODEV; 2128 } 2129 } 2130 2131 return ret; 2132 } 2133 EXPORT_SYMBOL_GPL(nvme_shutdown_ctrl); 2134 2135 static void nvme_set_queue_limits(struct nvme_ctrl *ctrl, 2136 struct request_queue *q) 2137 { 2138 bool vwc = false; 2139 2140 if (ctrl->max_hw_sectors) { 2141 u32 max_segments = 2142 (ctrl->max_hw_sectors / (ctrl->page_size >> 9)) + 1; 2143 2144 max_segments = min_not_zero(max_segments, ctrl->max_segments); 2145 blk_queue_max_hw_sectors(q, ctrl->max_hw_sectors); 2146 blk_queue_max_segments(q, min_t(u32, max_segments, USHRT_MAX)); 2147 } 2148 if ((ctrl->quirks & NVME_QUIRK_STRIPE_SIZE) && 2149 is_power_of_2(ctrl->max_hw_sectors)) 2150 blk_queue_chunk_sectors(q, ctrl->max_hw_sectors); 2151 blk_queue_virt_boundary(q, ctrl->page_size - 1); 2152 if (ctrl->vwc & NVME_CTRL_VWC_PRESENT) 2153 vwc = true; 2154 blk_queue_write_cache(q, vwc, vwc); 2155 } 2156 2157 static int nvme_configure_timestamp(struct nvme_ctrl *ctrl) 2158 { 2159 __le64 ts; 2160 int ret; 2161 2162 if (!(ctrl->oncs & NVME_CTRL_ONCS_TIMESTAMP)) 2163 return 0; 2164 2165 ts = cpu_to_le64(ktime_to_ms(ktime_get_real())); 2166 ret = nvme_set_features(ctrl, NVME_FEAT_TIMESTAMP, 0, &ts, sizeof(ts), 2167 NULL); 2168 if (ret) 2169 dev_warn_once(ctrl->device, 2170 "could not set timestamp (%d)\n", ret); 2171 return ret; 2172 } 2173 2174 static int nvme_configure_acre(struct nvme_ctrl *ctrl) 2175 { 2176 struct nvme_feat_host_behavior *host; 2177 int ret; 2178 2179 /* Don't bother enabling the feature if retry delay is not reported */ 2180 if (!ctrl->crdt[0]) 2181 return 0; 2182 2183 host = kzalloc(sizeof(*host), GFP_KERNEL); 2184 if (!host) 2185 return 0; 2186 2187 host->acre = NVME_ENABLE_ACRE; 2188 ret = nvme_set_features(ctrl, NVME_FEAT_HOST_BEHAVIOR, 0, 2189 host, sizeof(*host), NULL); 2190 kfree(host); 2191 return ret; 2192 } 2193 2194 static int nvme_configure_apst(struct nvme_ctrl *ctrl) 2195 { 2196 /* 2197 * APST (Autonomous Power State Transition) lets us program a 2198 * table of power state transitions that the controller will 2199 * perform automatically. We configure it with a simple 2200 * heuristic: we are willing to spend at most 2% of the time 2201 * transitioning between power states. Therefore, when running 2202 * in any given state, we will enter the next lower-power 2203 * non-operational state after waiting 50 * (enlat + exlat) 2204 * microseconds, as long as that state's exit latency is under 2205 * the requested maximum latency. 2206 * 2207 * We will not autonomously enter any non-operational state for 2208 * which the total latency exceeds ps_max_latency_us. Users 2209 * can set ps_max_latency_us to zero to turn off APST. 2210 */ 2211 2212 unsigned apste; 2213 struct nvme_feat_auto_pst *table; 2214 u64 max_lat_us = 0; 2215 int max_ps = -1; 2216 int ret; 2217 2218 /* 2219 * If APST isn't supported or if we haven't been initialized yet, 2220 * then don't do anything. 2221 */ 2222 if (!ctrl->apsta) 2223 return 0; 2224 2225 if (ctrl->npss > 31) { 2226 dev_warn(ctrl->device, "NPSS is invalid; not using APST\n"); 2227 return 0; 2228 } 2229 2230 table = kzalloc(sizeof(*table), GFP_KERNEL); 2231 if (!table) 2232 return 0; 2233 2234 if (!ctrl->apst_enabled || ctrl->ps_max_latency_us == 0) { 2235 /* Turn off APST. */ 2236 apste = 0; 2237 dev_dbg(ctrl->device, "APST disabled\n"); 2238 } else { 2239 __le64 target = cpu_to_le64(0); 2240 int state; 2241 2242 /* 2243 * Walk through all states from lowest- to highest-power. 2244 * According to the spec, lower-numbered states use more 2245 * power. NPSS, despite the name, is the index of the 2246 * lowest-power state, not the number of states. 2247 */ 2248 for (state = (int)ctrl->npss; state >= 0; state--) { 2249 u64 total_latency_us, exit_latency_us, transition_ms; 2250 2251 if (target) 2252 table->entries[state] = target; 2253 2254 /* 2255 * Don't allow transitions to the deepest state 2256 * if it's quirked off. 2257 */ 2258 if (state == ctrl->npss && 2259 (ctrl->quirks & NVME_QUIRK_NO_DEEPEST_PS)) 2260 continue; 2261 2262 /* 2263 * Is this state a useful non-operational state for 2264 * higher-power states to autonomously transition to? 2265 */ 2266 if (!(ctrl->psd[state].flags & 2267 NVME_PS_FLAGS_NON_OP_STATE)) 2268 continue; 2269 2270 exit_latency_us = 2271 (u64)le32_to_cpu(ctrl->psd[state].exit_lat); 2272 if (exit_latency_us > ctrl->ps_max_latency_us) 2273 continue; 2274 2275 total_latency_us = 2276 exit_latency_us + 2277 le32_to_cpu(ctrl->psd[state].entry_lat); 2278 2279 /* 2280 * This state is good. Use it as the APST idle 2281 * target for higher power states. 2282 */ 2283 transition_ms = total_latency_us + 19; 2284 do_div(transition_ms, 20); 2285 if (transition_ms > (1 << 24) - 1) 2286 transition_ms = (1 << 24) - 1; 2287 2288 target = cpu_to_le64((state << 3) | 2289 (transition_ms << 8)); 2290 2291 if (max_ps == -1) 2292 max_ps = state; 2293 2294 if (total_latency_us > max_lat_us) 2295 max_lat_us = total_latency_us; 2296 } 2297 2298 apste = 1; 2299 2300 if (max_ps == -1) { 2301 dev_dbg(ctrl->device, "APST enabled but no non-operational states are available\n"); 2302 } else { 2303 dev_dbg(ctrl->device, "APST enabled: max PS = %d, max round-trip latency = %lluus, table = %*phN\n", 2304 max_ps, max_lat_us, (int)sizeof(*table), table); 2305 } 2306 } 2307 2308 ret = nvme_set_features(ctrl, NVME_FEAT_AUTO_PST, apste, 2309 table, sizeof(*table), NULL); 2310 if (ret) 2311 dev_err(ctrl->device, "failed to set APST feature (%d)\n", ret); 2312 2313 kfree(table); 2314 return ret; 2315 } 2316 2317 static void nvme_set_latency_tolerance(struct device *dev, s32 val) 2318 { 2319 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 2320 u64 latency; 2321 2322 switch (val) { 2323 case PM_QOS_LATENCY_TOLERANCE_NO_CONSTRAINT: 2324 case PM_QOS_LATENCY_ANY: 2325 latency = U64_MAX; 2326 break; 2327 2328 default: 2329 latency = val; 2330 } 2331 2332 if (ctrl->ps_max_latency_us != latency) { 2333 ctrl->ps_max_latency_us = latency; 2334 nvme_configure_apst(ctrl); 2335 } 2336 } 2337 2338 struct nvme_core_quirk_entry { 2339 /* 2340 * NVMe model and firmware strings are padded with spaces. For 2341 * simplicity, strings in the quirk table are padded with NULLs 2342 * instead. 2343 */ 2344 u16 vid; 2345 const char *mn; 2346 const char *fr; 2347 unsigned long quirks; 2348 }; 2349 2350 static const struct nvme_core_quirk_entry core_quirks[] = { 2351 { 2352 /* 2353 * This Toshiba device seems to die using any APST states. See: 2354 * https://bugs.launchpad.net/ubuntu/+source/linux/+bug/1678184/comments/11 2355 */ 2356 .vid = 0x1179, 2357 .mn = "THNSF5256GPUK TOSHIBA", 2358 .quirks = NVME_QUIRK_NO_APST, 2359 }, 2360 { 2361 /* 2362 * This LiteON CL1-3D*-Q11 firmware version has a race 2363 * condition associated with actions related to suspend to idle 2364 * LiteON has resolved the problem in future firmware 2365 */ 2366 .vid = 0x14a4, 2367 .fr = "22301111", 2368 .quirks = NVME_QUIRK_SIMPLE_SUSPEND, 2369 }, 2370 { 2371 /* 2372 * This Kingston E8FK11.T firmware version has no interrupt 2373 * after resume with actions related to suspend to idle 2374 * https://bugzilla.kernel.org/show_bug.cgi?id=204887 2375 */ 2376 .vid = 0x2646, 2377 .fr = "E8FK11.T", 2378 .quirks = NVME_QUIRK_SIMPLE_SUSPEND, 2379 } 2380 }; 2381 2382 /* match is null-terminated but idstr is space-padded. */ 2383 static bool string_matches(const char *idstr, const char *match, size_t len) 2384 { 2385 size_t matchlen; 2386 2387 if (!match) 2388 return true; 2389 2390 matchlen = strlen(match); 2391 WARN_ON_ONCE(matchlen > len); 2392 2393 if (memcmp(idstr, match, matchlen)) 2394 return false; 2395 2396 for (; matchlen < len; matchlen++) 2397 if (idstr[matchlen] != ' ') 2398 return false; 2399 2400 return true; 2401 } 2402 2403 static bool quirk_matches(const struct nvme_id_ctrl *id, 2404 const struct nvme_core_quirk_entry *q) 2405 { 2406 return q->vid == le16_to_cpu(id->vid) && 2407 string_matches(id->mn, q->mn, sizeof(id->mn)) && 2408 string_matches(id->fr, q->fr, sizeof(id->fr)); 2409 } 2410 2411 static void nvme_init_subnqn(struct nvme_subsystem *subsys, struct nvme_ctrl *ctrl, 2412 struct nvme_id_ctrl *id) 2413 { 2414 size_t nqnlen; 2415 int off; 2416 2417 if(!(ctrl->quirks & NVME_QUIRK_IGNORE_DEV_SUBNQN)) { 2418 nqnlen = strnlen(id->subnqn, NVMF_NQN_SIZE); 2419 if (nqnlen > 0 && nqnlen < NVMF_NQN_SIZE) { 2420 strlcpy(subsys->subnqn, id->subnqn, NVMF_NQN_SIZE); 2421 return; 2422 } 2423 2424 if (ctrl->vs >= NVME_VS(1, 2, 1)) 2425 dev_warn(ctrl->device, "missing or invalid SUBNQN field.\n"); 2426 } 2427 2428 /* Generate a "fake" NQN per Figure 254 in NVMe 1.3 + ECN 001 */ 2429 off = snprintf(subsys->subnqn, NVMF_NQN_SIZE, 2430 "nqn.2014.08.org.nvmexpress:%04x%04x", 2431 le16_to_cpu(id->vid), le16_to_cpu(id->ssvid)); 2432 memcpy(subsys->subnqn + off, id->sn, sizeof(id->sn)); 2433 off += sizeof(id->sn); 2434 memcpy(subsys->subnqn + off, id->mn, sizeof(id->mn)); 2435 off += sizeof(id->mn); 2436 memset(subsys->subnqn + off, 0, sizeof(subsys->subnqn) - off); 2437 } 2438 2439 static void nvme_release_subsystem(struct device *dev) 2440 { 2441 struct nvme_subsystem *subsys = 2442 container_of(dev, struct nvme_subsystem, dev); 2443 2444 if (subsys->instance >= 0) 2445 ida_simple_remove(&nvme_instance_ida, subsys->instance); 2446 kfree(subsys); 2447 } 2448 2449 static void nvme_destroy_subsystem(struct kref *ref) 2450 { 2451 struct nvme_subsystem *subsys = 2452 container_of(ref, struct nvme_subsystem, ref); 2453 2454 mutex_lock(&nvme_subsystems_lock); 2455 list_del(&subsys->entry); 2456 mutex_unlock(&nvme_subsystems_lock); 2457 2458 ida_destroy(&subsys->ns_ida); 2459 device_del(&subsys->dev); 2460 put_device(&subsys->dev); 2461 } 2462 2463 static void nvme_put_subsystem(struct nvme_subsystem *subsys) 2464 { 2465 kref_put(&subsys->ref, nvme_destroy_subsystem); 2466 } 2467 2468 static struct nvme_subsystem *__nvme_find_get_subsystem(const char *subsysnqn) 2469 { 2470 struct nvme_subsystem *subsys; 2471 2472 lockdep_assert_held(&nvme_subsystems_lock); 2473 2474 /* 2475 * Fail matches for discovery subsystems. This results 2476 * in each discovery controller bound to a unique subsystem. 2477 * This avoids issues with validating controller values 2478 * that can only be true when there is a single unique subsystem. 2479 * There may be multiple and completely independent entities 2480 * that provide discovery controllers. 2481 */ 2482 if (!strcmp(subsysnqn, NVME_DISC_SUBSYS_NAME)) 2483 return NULL; 2484 2485 list_for_each_entry(subsys, &nvme_subsystems, entry) { 2486 if (strcmp(subsys->subnqn, subsysnqn)) 2487 continue; 2488 if (!kref_get_unless_zero(&subsys->ref)) 2489 continue; 2490 return subsys; 2491 } 2492 2493 return NULL; 2494 } 2495 2496 #define SUBSYS_ATTR_RO(_name, _mode, _show) \ 2497 struct device_attribute subsys_attr_##_name = \ 2498 __ATTR(_name, _mode, _show, NULL) 2499 2500 static ssize_t nvme_subsys_show_nqn(struct device *dev, 2501 struct device_attribute *attr, 2502 char *buf) 2503 { 2504 struct nvme_subsystem *subsys = 2505 container_of(dev, struct nvme_subsystem, dev); 2506 2507 return snprintf(buf, PAGE_SIZE, "%s\n", subsys->subnqn); 2508 } 2509 static SUBSYS_ATTR_RO(subsysnqn, S_IRUGO, nvme_subsys_show_nqn); 2510 2511 #define nvme_subsys_show_str_function(field) \ 2512 static ssize_t subsys_##field##_show(struct device *dev, \ 2513 struct device_attribute *attr, char *buf) \ 2514 { \ 2515 struct nvme_subsystem *subsys = \ 2516 container_of(dev, struct nvme_subsystem, dev); \ 2517 return sprintf(buf, "%.*s\n", \ 2518 (int)sizeof(subsys->field), subsys->field); \ 2519 } \ 2520 static SUBSYS_ATTR_RO(field, S_IRUGO, subsys_##field##_show); 2521 2522 nvme_subsys_show_str_function(model); 2523 nvme_subsys_show_str_function(serial); 2524 nvme_subsys_show_str_function(firmware_rev); 2525 2526 static struct attribute *nvme_subsys_attrs[] = { 2527 &subsys_attr_model.attr, 2528 &subsys_attr_serial.attr, 2529 &subsys_attr_firmware_rev.attr, 2530 &subsys_attr_subsysnqn.attr, 2531 #ifdef CONFIG_NVME_MULTIPATH 2532 &subsys_attr_iopolicy.attr, 2533 #endif 2534 NULL, 2535 }; 2536 2537 static struct attribute_group nvme_subsys_attrs_group = { 2538 .attrs = nvme_subsys_attrs, 2539 }; 2540 2541 static const struct attribute_group *nvme_subsys_attrs_groups[] = { 2542 &nvme_subsys_attrs_group, 2543 NULL, 2544 }; 2545 2546 static bool nvme_validate_cntlid(struct nvme_subsystem *subsys, 2547 struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id) 2548 { 2549 struct nvme_ctrl *tmp; 2550 2551 lockdep_assert_held(&nvme_subsystems_lock); 2552 2553 list_for_each_entry(tmp, &subsys->ctrls, subsys_entry) { 2554 if (tmp->state == NVME_CTRL_DELETING || 2555 tmp->state == NVME_CTRL_DEAD) 2556 continue; 2557 2558 if (tmp->cntlid == ctrl->cntlid) { 2559 dev_err(ctrl->device, 2560 "Duplicate cntlid %u with %s, rejecting\n", 2561 ctrl->cntlid, dev_name(tmp->device)); 2562 return false; 2563 } 2564 2565 if ((id->cmic & (1 << 1)) || 2566 (ctrl->opts && ctrl->opts->discovery_nqn)) 2567 continue; 2568 2569 dev_err(ctrl->device, 2570 "Subsystem does not support multiple controllers\n"); 2571 return false; 2572 } 2573 2574 return true; 2575 } 2576 2577 static int nvme_init_subsystem(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id) 2578 { 2579 struct nvme_subsystem *subsys, *found; 2580 int ret; 2581 2582 subsys = kzalloc(sizeof(*subsys), GFP_KERNEL); 2583 if (!subsys) 2584 return -ENOMEM; 2585 2586 subsys->instance = -1; 2587 mutex_init(&subsys->lock); 2588 kref_init(&subsys->ref); 2589 INIT_LIST_HEAD(&subsys->ctrls); 2590 INIT_LIST_HEAD(&subsys->nsheads); 2591 nvme_init_subnqn(subsys, ctrl, id); 2592 memcpy(subsys->serial, id->sn, sizeof(subsys->serial)); 2593 memcpy(subsys->model, id->mn, sizeof(subsys->model)); 2594 memcpy(subsys->firmware_rev, id->fr, sizeof(subsys->firmware_rev)); 2595 subsys->vendor_id = le16_to_cpu(id->vid); 2596 subsys->cmic = id->cmic; 2597 subsys->awupf = le16_to_cpu(id->awupf); 2598 #ifdef CONFIG_NVME_MULTIPATH 2599 subsys->iopolicy = NVME_IOPOLICY_NUMA; 2600 #endif 2601 2602 subsys->dev.class = nvme_subsys_class; 2603 subsys->dev.release = nvme_release_subsystem; 2604 subsys->dev.groups = nvme_subsys_attrs_groups; 2605 dev_set_name(&subsys->dev, "nvme-subsys%d", ctrl->instance); 2606 device_initialize(&subsys->dev); 2607 2608 mutex_lock(&nvme_subsystems_lock); 2609 found = __nvme_find_get_subsystem(subsys->subnqn); 2610 if (found) { 2611 put_device(&subsys->dev); 2612 subsys = found; 2613 2614 if (!nvme_validate_cntlid(subsys, ctrl, id)) { 2615 ret = -EINVAL; 2616 goto out_put_subsystem; 2617 } 2618 } else { 2619 ret = device_add(&subsys->dev); 2620 if (ret) { 2621 dev_err(ctrl->device, 2622 "failed to register subsystem device.\n"); 2623 put_device(&subsys->dev); 2624 goto out_unlock; 2625 } 2626 ida_init(&subsys->ns_ida); 2627 list_add_tail(&subsys->entry, &nvme_subsystems); 2628 } 2629 2630 ret = sysfs_create_link(&subsys->dev.kobj, &ctrl->device->kobj, 2631 dev_name(ctrl->device)); 2632 if (ret) { 2633 dev_err(ctrl->device, 2634 "failed to create sysfs link from subsystem.\n"); 2635 goto out_put_subsystem; 2636 } 2637 2638 if (!found) 2639 subsys->instance = ctrl->instance; 2640 ctrl->subsys = subsys; 2641 list_add_tail(&ctrl->subsys_entry, &subsys->ctrls); 2642 mutex_unlock(&nvme_subsystems_lock); 2643 return 0; 2644 2645 out_put_subsystem: 2646 nvme_put_subsystem(subsys); 2647 out_unlock: 2648 mutex_unlock(&nvme_subsystems_lock); 2649 return ret; 2650 } 2651 2652 int nvme_get_log(struct nvme_ctrl *ctrl, u32 nsid, u8 log_page, u8 lsp, 2653 void *log, size_t size, u64 offset) 2654 { 2655 struct nvme_command c = { }; 2656 unsigned long dwlen = size / 4 - 1; 2657 2658 c.get_log_page.opcode = nvme_admin_get_log_page; 2659 c.get_log_page.nsid = cpu_to_le32(nsid); 2660 c.get_log_page.lid = log_page; 2661 c.get_log_page.lsp = lsp; 2662 c.get_log_page.numdl = cpu_to_le16(dwlen & ((1 << 16) - 1)); 2663 c.get_log_page.numdu = cpu_to_le16(dwlen >> 16); 2664 c.get_log_page.lpol = cpu_to_le32(lower_32_bits(offset)); 2665 c.get_log_page.lpou = cpu_to_le32(upper_32_bits(offset)); 2666 2667 return nvme_submit_sync_cmd(ctrl->admin_q, &c, log, size); 2668 } 2669 2670 static int nvme_get_effects_log(struct nvme_ctrl *ctrl) 2671 { 2672 int ret; 2673 2674 if (!ctrl->effects) 2675 ctrl->effects = kzalloc(sizeof(*ctrl->effects), GFP_KERNEL); 2676 2677 if (!ctrl->effects) 2678 return 0; 2679 2680 ret = nvme_get_log(ctrl, NVME_NSID_ALL, NVME_LOG_CMD_EFFECTS, 0, 2681 ctrl->effects, sizeof(*ctrl->effects), 0); 2682 if (ret) { 2683 kfree(ctrl->effects); 2684 ctrl->effects = NULL; 2685 } 2686 return ret; 2687 } 2688 2689 /* 2690 * Initialize the cached copies of the Identify data and various controller 2691 * register in our nvme_ctrl structure. This should be called as soon as 2692 * the admin queue is fully up and running. 2693 */ 2694 int nvme_init_identify(struct nvme_ctrl *ctrl) 2695 { 2696 struct nvme_id_ctrl *id; 2697 int ret, page_shift; 2698 u32 max_hw_sectors; 2699 bool prev_apst_enabled; 2700 2701 ret = ctrl->ops->reg_read32(ctrl, NVME_REG_VS, &ctrl->vs); 2702 if (ret) { 2703 dev_err(ctrl->device, "Reading VS failed (%d)\n", ret); 2704 return ret; 2705 } 2706 page_shift = NVME_CAP_MPSMIN(ctrl->cap) + 12; 2707 ctrl->sqsize = min_t(int, NVME_CAP_MQES(ctrl->cap), ctrl->sqsize); 2708 2709 if (ctrl->vs >= NVME_VS(1, 1, 0)) 2710 ctrl->subsystem = NVME_CAP_NSSRC(ctrl->cap); 2711 2712 ret = nvme_identify_ctrl(ctrl, &id); 2713 if (ret) { 2714 dev_err(ctrl->device, "Identify Controller failed (%d)\n", ret); 2715 return -EIO; 2716 } 2717 2718 if (id->lpa & NVME_CTRL_LPA_CMD_EFFECTS_LOG) { 2719 ret = nvme_get_effects_log(ctrl); 2720 if (ret < 0) 2721 goto out_free; 2722 } 2723 2724 if (!(ctrl->ops->flags & NVME_F_FABRICS)) 2725 ctrl->cntlid = le16_to_cpu(id->cntlid); 2726 2727 if (!ctrl->identified) { 2728 int i; 2729 2730 ret = nvme_init_subsystem(ctrl, id); 2731 if (ret) 2732 goto out_free; 2733 2734 /* 2735 * Check for quirks. Quirk can depend on firmware version, 2736 * so, in principle, the set of quirks present can change 2737 * across a reset. As a possible future enhancement, we 2738 * could re-scan for quirks every time we reinitialize 2739 * the device, but we'd have to make sure that the driver 2740 * behaves intelligently if the quirks change. 2741 */ 2742 for (i = 0; i < ARRAY_SIZE(core_quirks); i++) { 2743 if (quirk_matches(id, &core_quirks[i])) 2744 ctrl->quirks |= core_quirks[i].quirks; 2745 } 2746 } 2747 2748 if (force_apst && (ctrl->quirks & NVME_QUIRK_NO_DEEPEST_PS)) { 2749 dev_warn(ctrl->device, "forcibly allowing all power states due to nvme_core.force_apst -- use at your own risk\n"); 2750 ctrl->quirks &= ~NVME_QUIRK_NO_DEEPEST_PS; 2751 } 2752 2753 ctrl->crdt[0] = le16_to_cpu(id->crdt1); 2754 ctrl->crdt[1] = le16_to_cpu(id->crdt2); 2755 ctrl->crdt[2] = le16_to_cpu(id->crdt3); 2756 2757 ctrl->oacs = le16_to_cpu(id->oacs); 2758 ctrl->oncs = le16_to_cpu(id->oncs); 2759 ctrl->mtfa = le16_to_cpu(id->mtfa); 2760 ctrl->oaes = le32_to_cpu(id->oaes); 2761 atomic_set(&ctrl->abort_limit, id->acl + 1); 2762 ctrl->vwc = id->vwc; 2763 if (id->mdts) 2764 max_hw_sectors = 1 << (id->mdts + page_shift - 9); 2765 else 2766 max_hw_sectors = UINT_MAX; 2767 ctrl->max_hw_sectors = 2768 min_not_zero(ctrl->max_hw_sectors, max_hw_sectors); 2769 2770 nvme_set_queue_limits(ctrl, ctrl->admin_q); 2771 ctrl->sgls = le32_to_cpu(id->sgls); 2772 ctrl->kas = le16_to_cpu(id->kas); 2773 ctrl->max_namespaces = le32_to_cpu(id->mnan); 2774 ctrl->ctratt = le32_to_cpu(id->ctratt); 2775 2776 if (id->rtd3e) { 2777 /* us -> s */ 2778 u32 transition_time = le32_to_cpu(id->rtd3e) / 1000000; 2779 2780 ctrl->shutdown_timeout = clamp_t(unsigned int, transition_time, 2781 shutdown_timeout, 60); 2782 2783 if (ctrl->shutdown_timeout != shutdown_timeout) 2784 dev_info(ctrl->device, 2785 "Shutdown timeout set to %u seconds\n", 2786 ctrl->shutdown_timeout); 2787 } else 2788 ctrl->shutdown_timeout = shutdown_timeout; 2789 2790 ctrl->npss = id->npss; 2791 ctrl->apsta = id->apsta; 2792 prev_apst_enabled = ctrl->apst_enabled; 2793 if (ctrl->quirks & NVME_QUIRK_NO_APST) { 2794 if (force_apst && id->apsta) { 2795 dev_warn(ctrl->device, "forcibly allowing APST due to nvme_core.force_apst -- use at your own risk\n"); 2796 ctrl->apst_enabled = true; 2797 } else { 2798 ctrl->apst_enabled = false; 2799 } 2800 } else { 2801 ctrl->apst_enabled = id->apsta; 2802 } 2803 memcpy(ctrl->psd, id->psd, sizeof(ctrl->psd)); 2804 2805 if (ctrl->ops->flags & NVME_F_FABRICS) { 2806 ctrl->icdoff = le16_to_cpu(id->icdoff); 2807 ctrl->ioccsz = le32_to_cpu(id->ioccsz); 2808 ctrl->iorcsz = le32_to_cpu(id->iorcsz); 2809 ctrl->maxcmd = le16_to_cpu(id->maxcmd); 2810 2811 /* 2812 * In fabrics we need to verify the cntlid matches the 2813 * admin connect 2814 */ 2815 if (ctrl->cntlid != le16_to_cpu(id->cntlid)) { 2816 ret = -EINVAL; 2817 goto out_free; 2818 } 2819 2820 if (!ctrl->opts->discovery_nqn && !ctrl->kas) { 2821 dev_err(ctrl->device, 2822 "keep-alive support is mandatory for fabrics\n"); 2823 ret = -EINVAL; 2824 goto out_free; 2825 } 2826 } else { 2827 ctrl->hmpre = le32_to_cpu(id->hmpre); 2828 ctrl->hmmin = le32_to_cpu(id->hmmin); 2829 ctrl->hmminds = le32_to_cpu(id->hmminds); 2830 ctrl->hmmaxd = le16_to_cpu(id->hmmaxd); 2831 } 2832 2833 ret = nvme_mpath_init(ctrl, id); 2834 kfree(id); 2835 2836 if (ret < 0) 2837 return ret; 2838 2839 if (ctrl->apst_enabled && !prev_apst_enabled) 2840 dev_pm_qos_expose_latency_tolerance(ctrl->device); 2841 else if (!ctrl->apst_enabled && prev_apst_enabled) 2842 dev_pm_qos_hide_latency_tolerance(ctrl->device); 2843 2844 ret = nvme_configure_apst(ctrl); 2845 if (ret < 0) 2846 return ret; 2847 2848 ret = nvme_configure_timestamp(ctrl); 2849 if (ret < 0) 2850 return ret; 2851 2852 ret = nvme_configure_directives(ctrl); 2853 if (ret < 0) 2854 return ret; 2855 2856 ret = nvme_configure_acre(ctrl); 2857 if (ret < 0) 2858 return ret; 2859 2860 ctrl->identified = true; 2861 2862 return 0; 2863 2864 out_free: 2865 kfree(id); 2866 return ret; 2867 } 2868 EXPORT_SYMBOL_GPL(nvme_init_identify); 2869 2870 static int nvme_dev_open(struct inode *inode, struct file *file) 2871 { 2872 struct nvme_ctrl *ctrl = 2873 container_of(inode->i_cdev, struct nvme_ctrl, cdev); 2874 2875 switch (ctrl->state) { 2876 case NVME_CTRL_LIVE: 2877 case NVME_CTRL_ADMIN_ONLY: 2878 break; 2879 default: 2880 return -EWOULDBLOCK; 2881 } 2882 2883 file->private_data = ctrl; 2884 return 0; 2885 } 2886 2887 static int nvme_dev_user_cmd(struct nvme_ctrl *ctrl, void __user *argp) 2888 { 2889 struct nvme_ns *ns; 2890 int ret; 2891 2892 down_read(&ctrl->namespaces_rwsem); 2893 if (list_empty(&ctrl->namespaces)) { 2894 ret = -ENOTTY; 2895 goto out_unlock; 2896 } 2897 2898 ns = list_first_entry(&ctrl->namespaces, struct nvme_ns, list); 2899 if (ns != list_last_entry(&ctrl->namespaces, struct nvme_ns, list)) { 2900 dev_warn(ctrl->device, 2901 "NVME_IOCTL_IO_CMD not supported when multiple namespaces present!\n"); 2902 ret = -EINVAL; 2903 goto out_unlock; 2904 } 2905 2906 dev_warn(ctrl->device, 2907 "using deprecated NVME_IOCTL_IO_CMD ioctl on the char device!\n"); 2908 kref_get(&ns->kref); 2909 up_read(&ctrl->namespaces_rwsem); 2910 2911 ret = nvme_user_cmd(ctrl, ns, argp); 2912 nvme_put_ns(ns); 2913 return ret; 2914 2915 out_unlock: 2916 up_read(&ctrl->namespaces_rwsem); 2917 return ret; 2918 } 2919 2920 static long nvme_dev_ioctl(struct file *file, unsigned int cmd, 2921 unsigned long arg) 2922 { 2923 struct nvme_ctrl *ctrl = file->private_data; 2924 void __user *argp = (void __user *)arg; 2925 2926 switch (cmd) { 2927 case NVME_IOCTL_ADMIN_CMD: 2928 return nvme_user_cmd(ctrl, NULL, argp); 2929 case NVME_IOCTL_ADMIN64_CMD: 2930 return nvme_user_cmd64(ctrl, NULL, argp); 2931 case NVME_IOCTL_IO_CMD: 2932 return nvme_dev_user_cmd(ctrl, argp); 2933 case NVME_IOCTL_RESET: 2934 dev_warn(ctrl->device, "resetting controller\n"); 2935 return nvme_reset_ctrl_sync(ctrl); 2936 case NVME_IOCTL_SUBSYS_RESET: 2937 return nvme_reset_subsystem(ctrl); 2938 case NVME_IOCTL_RESCAN: 2939 nvme_queue_scan(ctrl); 2940 return 0; 2941 default: 2942 return -ENOTTY; 2943 } 2944 } 2945 2946 static const struct file_operations nvme_dev_fops = { 2947 .owner = THIS_MODULE, 2948 .open = nvme_dev_open, 2949 .unlocked_ioctl = nvme_dev_ioctl, 2950 .compat_ioctl = nvme_dev_ioctl, 2951 }; 2952 2953 static ssize_t nvme_sysfs_reset(struct device *dev, 2954 struct device_attribute *attr, const char *buf, 2955 size_t count) 2956 { 2957 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 2958 int ret; 2959 2960 ret = nvme_reset_ctrl_sync(ctrl); 2961 if (ret < 0) 2962 return ret; 2963 return count; 2964 } 2965 static DEVICE_ATTR(reset_controller, S_IWUSR, NULL, nvme_sysfs_reset); 2966 2967 static ssize_t nvme_sysfs_rescan(struct device *dev, 2968 struct device_attribute *attr, const char *buf, 2969 size_t count) 2970 { 2971 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 2972 2973 nvme_queue_scan(ctrl); 2974 return count; 2975 } 2976 static DEVICE_ATTR(rescan_controller, S_IWUSR, NULL, nvme_sysfs_rescan); 2977 2978 static inline struct nvme_ns_head *dev_to_ns_head(struct device *dev) 2979 { 2980 struct gendisk *disk = dev_to_disk(dev); 2981 2982 if (disk->fops == &nvme_fops) 2983 return nvme_get_ns_from_dev(dev)->head; 2984 else 2985 return disk->private_data; 2986 } 2987 2988 static ssize_t wwid_show(struct device *dev, struct device_attribute *attr, 2989 char *buf) 2990 { 2991 struct nvme_ns_head *head = dev_to_ns_head(dev); 2992 struct nvme_ns_ids *ids = &head->ids; 2993 struct nvme_subsystem *subsys = head->subsys; 2994 int serial_len = sizeof(subsys->serial); 2995 int model_len = sizeof(subsys->model); 2996 2997 if (!uuid_is_null(&ids->uuid)) 2998 return sprintf(buf, "uuid.%pU\n", &ids->uuid); 2999 3000 if (memchr_inv(ids->nguid, 0, sizeof(ids->nguid))) 3001 return sprintf(buf, "eui.%16phN\n", ids->nguid); 3002 3003 if (memchr_inv(ids->eui64, 0, sizeof(ids->eui64))) 3004 return sprintf(buf, "eui.%8phN\n", ids->eui64); 3005 3006 while (serial_len > 0 && (subsys->serial[serial_len - 1] == ' ' || 3007 subsys->serial[serial_len - 1] == '\0')) 3008 serial_len--; 3009 while (model_len > 0 && (subsys->model[model_len - 1] == ' ' || 3010 subsys->model[model_len - 1] == '\0')) 3011 model_len--; 3012 3013 return sprintf(buf, "nvme.%04x-%*phN-%*phN-%08x\n", subsys->vendor_id, 3014 serial_len, subsys->serial, model_len, subsys->model, 3015 head->ns_id); 3016 } 3017 static DEVICE_ATTR_RO(wwid); 3018 3019 static ssize_t nguid_show(struct device *dev, struct device_attribute *attr, 3020 char *buf) 3021 { 3022 return sprintf(buf, "%pU\n", dev_to_ns_head(dev)->ids.nguid); 3023 } 3024 static DEVICE_ATTR_RO(nguid); 3025 3026 static ssize_t uuid_show(struct device *dev, struct device_attribute *attr, 3027 char *buf) 3028 { 3029 struct nvme_ns_ids *ids = &dev_to_ns_head(dev)->ids; 3030 3031 /* For backward compatibility expose the NGUID to userspace if 3032 * we have no UUID set 3033 */ 3034 if (uuid_is_null(&ids->uuid)) { 3035 printk_ratelimited(KERN_WARNING 3036 "No UUID available providing old NGUID\n"); 3037 return sprintf(buf, "%pU\n", ids->nguid); 3038 } 3039 return sprintf(buf, "%pU\n", &ids->uuid); 3040 } 3041 static DEVICE_ATTR_RO(uuid); 3042 3043 static ssize_t eui_show(struct device *dev, struct device_attribute *attr, 3044 char *buf) 3045 { 3046 return sprintf(buf, "%8ph\n", dev_to_ns_head(dev)->ids.eui64); 3047 } 3048 static DEVICE_ATTR_RO(eui); 3049 3050 static ssize_t nsid_show(struct device *dev, struct device_attribute *attr, 3051 char *buf) 3052 { 3053 return sprintf(buf, "%d\n", dev_to_ns_head(dev)->ns_id); 3054 } 3055 static DEVICE_ATTR_RO(nsid); 3056 3057 static struct attribute *nvme_ns_id_attrs[] = { 3058 &dev_attr_wwid.attr, 3059 &dev_attr_uuid.attr, 3060 &dev_attr_nguid.attr, 3061 &dev_attr_eui.attr, 3062 &dev_attr_nsid.attr, 3063 #ifdef CONFIG_NVME_MULTIPATH 3064 &dev_attr_ana_grpid.attr, 3065 &dev_attr_ana_state.attr, 3066 #endif 3067 NULL, 3068 }; 3069 3070 static umode_t nvme_ns_id_attrs_are_visible(struct kobject *kobj, 3071 struct attribute *a, int n) 3072 { 3073 struct device *dev = container_of(kobj, struct device, kobj); 3074 struct nvme_ns_ids *ids = &dev_to_ns_head(dev)->ids; 3075 3076 if (a == &dev_attr_uuid.attr) { 3077 if (uuid_is_null(&ids->uuid) && 3078 !memchr_inv(ids->nguid, 0, sizeof(ids->nguid))) 3079 return 0; 3080 } 3081 if (a == &dev_attr_nguid.attr) { 3082 if (!memchr_inv(ids->nguid, 0, sizeof(ids->nguid))) 3083 return 0; 3084 } 3085 if (a == &dev_attr_eui.attr) { 3086 if (!memchr_inv(ids->eui64, 0, sizeof(ids->eui64))) 3087 return 0; 3088 } 3089 #ifdef CONFIG_NVME_MULTIPATH 3090 if (a == &dev_attr_ana_grpid.attr || a == &dev_attr_ana_state.attr) { 3091 if (dev_to_disk(dev)->fops != &nvme_fops) /* per-path attr */ 3092 return 0; 3093 if (!nvme_ctrl_use_ana(nvme_get_ns_from_dev(dev)->ctrl)) 3094 return 0; 3095 } 3096 #endif 3097 return a->mode; 3098 } 3099 3100 static const struct attribute_group nvme_ns_id_attr_group = { 3101 .attrs = nvme_ns_id_attrs, 3102 .is_visible = nvme_ns_id_attrs_are_visible, 3103 }; 3104 3105 const struct attribute_group *nvme_ns_id_attr_groups[] = { 3106 &nvme_ns_id_attr_group, 3107 #ifdef CONFIG_NVM 3108 &nvme_nvm_attr_group, 3109 #endif 3110 NULL, 3111 }; 3112 3113 #define nvme_show_str_function(field) \ 3114 static ssize_t field##_show(struct device *dev, \ 3115 struct device_attribute *attr, char *buf) \ 3116 { \ 3117 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); \ 3118 return sprintf(buf, "%.*s\n", \ 3119 (int)sizeof(ctrl->subsys->field), ctrl->subsys->field); \ 3120 } \ 3121 static DEVICE_ATTR(field, S_IRUGO, field##_show, NULL); 3122 3123 nvme_show_str_function(model); 3124 nvme_show_str_function(serial); 3125 nvme_show_str_function(firmware_rev); 3126 3127 #define nvme_show_int_function(field) \ 3128 static ssize_t field##_show(struct device *dev, \ 3129 struct device_attribute *attr, char *buf) \ 3130 { \ 3131 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); \ 3132 return sprintf(buf, "%d\n", ctrl->field); \ 3133 } \ 3134 static DEVICE_ATTR(field, S_IRUGO, field##_show, NULL); 3135 3136 nvme_show_int_function(cntlid); 3137 nvme_show_int_function(numa_node); 3138 nvme_show_int_function(queue_count); 3139 nvme_show_int_function(sqsize); 3140 3141 static ssize_t nvme_sysfs_delete(struct device *dev, 3142 struct device_attribute *attr, const char *buf, 3143 size_t count) 3144 { 3145 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 3146 3147 if (device_remove_file_self(dev, attr)) 3148 nvme_delete_ctrl_sync(ctrl); 3149 return count; 3150 } 3151 static DEVICE_ATTR(delete_controller, S_IWUSR, NULL, nvme_sysfs_delete); 3152 3153 static ssize_t nvme_sysfs_show_transport(struct device *dev, 3154 struct device_attribute *attr, 3155 char *buf) 3156 { 3157 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 3158 3159 return snprintf(buf, PAGE_SIZE, "%s\n", ctrl->ops->name); 3160 } 3161 static DEVICE_ATTR(transport, S_IRUGO, nvme_sysfs_show_transport, NULL); 3162 3163 static ssize_t nvme_sysfs_show_state(struct device *dev, 3164 struct device_attribute *attr, 3165 char *buf) 3166 { 3167 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 3168 static const char *const state_name[] = { 3169 [NVME_CTRL_NEW] = "new", 3170 [NVME_CTRL_LIVE] = "live", 3171 [NVME_CTRL_ADMIN_ONLY] = "only-admin", 3172 [NVME_CTRL_RESETTING] = "resetting", 3173 [NVME_CTRL_CONNECTING] = "connecting", 3174 [NVME_CTRL_DELETING] = "deleting", 3175 [NVME_CTRL_DEAD] = "dead", 3176 }; 3177 3178 if ((unsigned)ctrl->state < ARRAY_SIZE(state_name) && 3179 state_name[ctrl->state]) 3180 return sprintf(buf, "%s\n", state_name[ctrl->state]); 3181 3182 return sprintf(buf, "unknown state\n"); 3183 } 3184 3185 static DEVICE_ATTR(state, S_IRUGO, nvme_sysfs_show_state, NULL); 3186 3187 static ssize_t nvme_sysfs_show_subsysnqn(struct device *dev, 3188 struct device_attribute *attr, 3189 char *buf) 3190 { 3191 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 3192 3193 return snprintf(buf, PAGE_SIZE, "%s\n", ctrl->subsys->subnqn); 3194 } 3195 static DEVICE_ATTR(subsysnqn, S_IRUGO, nvme_sysfs_show_subsysnqn, NULL); 3196 3197 static ssize_t nvme_sysfs_show_address(struct device *dev, 3198 struct device_attribute *attr, 3199 char *buf) 3200 { 3201 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 3202 3203 return ctrl->ops->get_address(ctrl, buf, PAGE_SIZE); 3204 } 3205 static DEVICE_ATTR(address, S_IRUGO, nvme_sysfs_show_address, NULL); 3206 3207 static struct attribute *nvme_dev_attrs[] = { 3208 &dev_attr_reset_controller.attr, 3209 &dev_attr_rescan_controller.attr, 3210 &dev_attr_model.attr, 3211 &dev_attr_serial.attr, 3212 &dev_attr_firmware_rev.attr, 3213 &dev_attr_cntlid.attr, 3214 &dev_attr_delete_controller.attr, 3215 &dev_attr_transport.attr, 3216 &dev_attr_subsysnqn.attr, 3217 &dev_attr_address.attr, 3218 &dev_attr_state.attr, 3219 &dev_attr_numa_node.attr, 3220 &dev_attr_queue_count.attr, 3221 &dev_attr_sqsize.attr, 3222 NULL 3223 }; 3224 3225 static umode_t nvme_dev_attrs_are_visible(struct kobject *kobj, 3226 struct attribute *a, int n) 3227 { 3228 struct device *dev = container_of(kobj, struct device, kobj); 3229 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 3230 3231 if (a == &dev_attr_delete_controller.attr && !ctrl->ops->delete_ctrl) 3232 return 0; 3233 if (a == &dev_attr_address.attr && !ctrl->ops->get_address) 3234 return 0; 3235 3236 return a->mode; 3237 } 3238 3239 static struct attribute_group nvme_dev_attrs_group = { 3240 .attrs = nvme_dev_attrs, 3241 .is_visible = nvme_dev_attrs_are_visible, 3242 }; 3243 3244 static const struct attribute_group *nvme_dev_attr_groups[] = { 3245 &nvme_dev_attrs_group, 3246 NULL, 3247 }; 3248 3249 static struct nvme_ns_head *__nvme_find_ns_head(struct nvme_subsystem *subsys, 3250 unsigned nsid) 3251 { 3252 struct nvme_ns_head *h; 3253 3254 lockdep_assert_held(&subsys->lock); 3255 3256 list_for_each_entry(h, &subsys->nsheads, entry) { 3257 if (h->ns_id == nsid && kref_get_unless_zero(&h->ref)) 3258 return h; 3259 } 3260 3261 return NULL; 3262 } 3263 3264 static int __nvme_check_ids(struct nvme_subsystem *subsys, 3265 struct nvme_ns_head *new) 3266 { 3267 struct nvme_ns_head *h; 3268 3269 lockdep_assert_held(&subsys->lock); 3270 3271 list_for_each_entry(h, &subsys->nsheads, entry) { 3272 if (nvme_ns_ids_valid(&new->ids) && 3273 !list_empty(&h->list) && 3274 nvme_ns_ids_equal(&new->ids, &h->ids)) 3275 return -EINVAL; 3276 } 3277 3278 return 0; 3279 } 3280 3281 static struct nvme_ns_head *nvme_alloc_ns_head(struct nvme_ctrl *ctrl, 3282 unsigned nsid, struct nvme_id_ns *id) 3283 { 3284 struct nvme_ns_head *head; 3285 size_t size = sizeof(*head); 3286 int ret = -ENOMEM; 3287 3288 #ifdef CONFIG_NVME_MULTIPATH 3289 size += num_possible_nodes() * sizeof(struct nvme_ns *); 3290 #endif 3291 3292 head = kzalloc(size, GFP_KERNEL); 3293 if (!head) 3294 goto out; 3295 ret = ida_simple_get(&ctrl->subsys->ns_ida, 1, 0, GFP_KERNEL); 3296 if (ret < 0) 3297 goto out_free_head; 3298 head->instance = ret; 3299 INIT_LIST_HEAD(&head->list); 3300 ret = init_srcu_struct(&head->srcu); 3301 if (ret) 3302 goto out_ida_remove; 3303 head->subsys = ctrl->subsys; 3304 head->ns_id = nsid; 3305 kref_init(&head->ref); 3306 3307 ret = nvme_report_ns_ids(ctrl, nsid, id, &head->ids); 3308 if (ret) 3309 goto out_cleanup_srcu; 3310 3311 ret = __nvme_check_ids(ctrl->subsys, head); 3312 if (ret) { 3313 dev_err(ctrl->device, 3314 "duplicate IDs for nsid %d\n", nsid); 3315 goto out_cleanup_srcu; 3316 } 3317 3318 ret = nvme_mpath_alloc_disk(ctrl, head); 3319 if (ret) 3320 goto out_cleanup_srcu; 3321 3322 list_add_tail(&head->entry, &ctrl->subsys->nsheads); 3323 3324 kref_get(&ctrl->subsys->ref); 3325 3326 return head; 3327 out_cleanup_srcu: 3328 cleanup_srcu_struct(&head->srcu); 3329 out_ida_remove: 3330 ida_simple_remove(&ctrl->subsys->ns_ida, head->instance); 3331 out_free_head: 3332 kfree(head); 3333 out: 3334 if (ret > 0) 3335 ret = blk_status_to_errno(nvme_error_status(ret)); 3336 return ERR_PTR(ret); 3337 } 3338 3339 static int nvme_init_ns_head(struct nvme_ns *ns, unsigned nsid, 3340 struct nvme_id_ns *id) 3341 { 3342 struct nvme_ctrl *ctrl = ns->ctrl; 3343 bool is_shared = id->nmic & (1 << 0); 3344 struct nvme_ns_head *head = NULL; 3345 int ret = 0; 3346 3347 mutex_lock(&ctrl->subsys->lock); 3348 if (is_shared) 3349 head = __nvme_find_ns_head(ctrl->subsys, nsid); 3350 if (!head) { 3351 head = nvme_alloc_ns_head(ctrl, nsid, id); 3352 if (IS_ERR(head)) { 3353 ret = PTR_ERR(head); 3354 goto out_unlock; 3355 } 3356 } else { 3357 struct nvme_ns_ids ids; 3358 3359 ret = nvme_report_ns_ids(ctrl, nsid, id, &ids); 3360 if (ret) 3361 goto out_unlock; 3362 3363 if (!nvme_ns_ids_equal(&head->ids, &ids)) { 3364 dev_err(ctrl->device, 3365 "IDs don't match for shared namespace %d\n", 3366 nsid); 3367 ret = -EINVAL; 3368 goto out_unlock; 3369 } 3370 } 3371 3372 list_add_tail(&ns->siblings, &head->list); 3373 ns->head = head; 3374 3375 out_unlock: 3376 mutex_unlock(&ctrl->subsys->lock); 3377 if (ret > 0) 3378 ret = blk_status_to_errno(nvme_error_status(ret)); 3379 return ret; 3380 } 3381 3382 static int ns_cmp(void *priv, struct list_head *a, struct list_head *b) 3383 { 3384 struct nvme_ns *nsa = container_of(a, struct nvme_ns, list); 3385 struct nvme_ns *nsb = container_of(b, struct nvme_ns, list); 3386 3387 return nsa->head->ns_id - nsb->head->ns_id; 3388 } 3389 3390 static struct nvme_ns *nvme_find_get_ns(struct nvme_ctrl *ctrl, unsigned nsid) 3391 { 3392 struct nvme_ns *ns, *ret = NULL; 3393 3394 down_read(&ctrl->namespaces_rwsem); 3395 list_for_each_entry(ns, &ctrl->namespaces, list) { 3396 if (ns->head->ns_id == nsid) { 3397 if (!kref_get_unless_zero(&ns->kref)) 3398 continue; 3399 ret = ns; 3400 break; 3401 } 3402 if (ns->head->ns_id > nsid) 3403 break; 3404 } 3405 up_read(&ctrl->namespaces_rwsem); 3406 return ret; 3407 } 3408 3409 static int nvme_setup_streams_ns(struct nvme_ctrl *ctrl, struct nvme_ns *ns) 3410 { 3411 struct streams_directive_params s; 3412 int ret; 3413 3414 if (!ctrl->nr_streams) 3415 return 0; 3416 3417 ret = nvme_get_stream_params(ctrl, &s, ns->head->ns_id); 3418 if (ret) 3419 return ret; 3420 3421 ns->sws = le32_to_cpu(s.sws); 3422 ns->sgs = le16_to_cpu(s.sgs); 3423 3424 if (ns->sws) { 3425 unsigned int bs = 1 << ns->lba_shift; 3426 3427 blk_queue_io_min(ns->queue, bs * ns->sws); 3428 if (ns->sgs) 3429 blk_queue_io_opt(ns->queue, bs * ns->sws * ns->sgs); 3430 } 3431 3432 return 0; 3433 } 3434 3435 static int nvme_alloc_ns(struct nvme_ctrl *ctrl, unsigned nsid) 3436 { 3437 struct nvme_ns *ns; 3438 struct gendisk *disk; 3439 struct nvme_id_ns *id; 3440 char disk_name[DISK_NAME_LEN]; 3441 int node = ctrl->numa_node, flags = GENHD_FL_EXT_DEVT, ret; 3442 3443 ns = kzalloc_node(sizeof(*ns), GFP_KERNEL, node); 3444 if (!ns) 3445 return -ENOMEM; 3446 3447 ns->queue = blk_mq_init_queue(ctrl->tagset); 3448 if (IS_ERR(ns->queue)) { 3449 ret = PTR_ERR(ns->queue); 3450 goto out_free_ns; 3451 } 3452 3453 if (ctrl->opts && ctrl->opts->data_digest) 3454 ns->queue->backing_dev_info->capabilities 3455 |= BDI_CAP_STABLE_WRITES; 3456 3457 blk_queue_flag_set(QUEUE_FLAG_NONROT, ns->queue); 3458 if (ctrl->ops->flags & NVME_F_PCI_P2PDMA) 3459 blk_queue_flag_set(QUEUE_FLAG_PCI_P2PDMA, ns->queue); 3460 3461 ns->queue->queuedata = ns; 3462 ns->ctrl = ctrl; 3463 3464 kref_init(&ns->kref); 3465 ns->lba_shift = 9; /* set to a default value for 512 until disk is validated */ 3466 3467 blk_queue_logical_block_size(ns->queue, 1 << ns->lba_shift); 3468 nvme_set_queue_limits(ctrl, ns->queue); 3469 3470 ret = nvme_identify_ns(ctrl, nsid, &id); 3471 if (ret) 3472 goto out_free_queue; 3473 3474 if (id->ncap == 0) { 3475 ret = -EINVAL; 3476 goto out_free_id; 3477 } 3478 3479 ret = nvme_init_ns_head(ns, nsid, id); 3480 if (ret) 3481 goto out_free_id; 3482 nvme_setup_streams_ns(ctrl, ns); 3483 nvme_set_disk_name(disk_name, ns, ctrl, &flags); 3484 3485 disk = alloc_disk_node(0, node); 3486 if (!disk) { 3487 ret = -ENOMEM; 3488 goto out_unlink_ns; 3489 } 3490 3491 disk->fops = &nvme_fops; 3492 disk->private_data = ns; 3493 disk->queue = ns->queue; 3494 disk->flags = flags; 3495 memcpy(disk->disk_name, disk_name, DISK_NAME_LEN); 3496 ns->disk = disk; 3497 3498 __nvme_revalidate_disk(disk, id); 3499 3500 if ((ctrl->quirks & NVME_QUIRK_LIGHTNVM) && id->vs[0] == 0x1) { 3501 ret = nvme_nvm_register(ns, disk_name, node); 3502 if (ret) { 3503 dev_warn(ctrl->device, "LightNVM init failure\n"); 3504 goto out_put_disk; 3505 } 3506 } 3507 3508 down_write(&ctrl->namespaces_rwsem); 3509 list_add_tail(&ns->list, &ctrl->namespaces); 3510 up_write(&ctrl->namespaces_rwsem); 3511 3512 nvme_get_ctrl(ctrl); 3513 3514 device_add_disk(ctrl->device, ns->disk, nvme_ns_id_attr_groups); 3515 3516 nvme_mpath_add_disk(ns, id); 3517 nvme_fault_inject_init(&ns->fault_inject, ns->disk->disk_name); 3518 kfree(id); 3519 3520 return 0; 3521 out_put_disk: 3522 put_disk(ns->disk); 3523 out_unlink_ns: 3524 mutex_lock(&ctrl->subsys->lock); 3525 list_del_rcu(&ns->siblings); 3526 mutex_unlock(&ctrl->subsys->lock); 3527 nvme_put_ns_head(ns->head); 3528 out_free_id: 3529 kfree(id); 3530 out_free_queue: 3531 blk_cleanup_queue(ns->queue); 3532 out_free_ns: 3533 kfree(ns); 3534 if (ret > 0) 3535 ret = blk_status_to_errno(nvme_error_status(ret)); 3536 return ret; 3537 } 3538 3539 static void nvme_ns_remove(struct nvme_ns *ns) 3540 { 3541 if (test_and_set_bit(NVME_NS_REMOVING, &ns->flags)) 3542 return; 3543 3544 nvme_fault_inject_fini(&ns->fault_inject); 3545 3546 mutex_lock(&ns->ctrl->subsys->lock); 3547 list_del_rcu(&ns->siblings); 3548 mutex_unlock(&ns->ctrl->subsys->lock); 3549 synchronize_rcu(); /* guarantee not available in head->list */ 3550 nvme_mpath_clear_current_path(ns); 3551 synchronize_srcu(&ns->head->srcu); /* wait for concurrent submissions */ 3552 3553 if (ns->disk && ns->disk->flags & GENHD_FL_UP) { 3554 del_gendisk(ns->disk); 3555 blk_cleanup_queue(ns->queue); 3556 if (blk_get_integrity(ns->disk)) 3557 blk_integrity_unregister(ns->disk); 3558 } 3559 3560 down_write(&ns->ctrl->namespaces_rwsem); 3561 list_del_init(&ns->list); 3562 up_write(&ns->ctrl->namespaces_rwsem); 3563 3564 nvme_mpath_check_last_path(ns); 3565 nvme_put_ns(ns); 3566 } 3567 3568 static void nvme_validate_ns(struct nvme_ctrl *ctrl, unsigned nsid) 3569 { 3570 struct nvme_ns *ns; 3571 3572 ns = nvme_find_get_ns(ctrl, nsid); 3573 if (ns) { 3574 if (ns->disk && revalidate_disk(ns->disk)) 3575 nvme_ns_remove(ns); 3576 nvme_put_ns(ns); 3577 } else 3578 nvme_alloc_ns(ctrl, nsid); 3579 } 3580 3581 static void nvme_remove_invalid_namespaces(struct nvme_ctrl *ctrl, 3582 unsigned nsid) 3583 { 3584 struct nvme_ns *ns, *next; 3585 LIST_HEAD(rm_list); 3586 3587 down_write(&ctrl->namespaces_rwsem); 3588 list_for_each_entry_safe(ns, next, &ctrl->namespaces, list) { 3589 if (ns->head->ns_id > nsid || test_bit(NVME_NS_DEAD, &ns->flags)) 3590 list_move_tail(&ns->list, &rm_list); 3591 } 3592 up_write(&ctrl->namespaces_rwsem); 3593 3594 list_for_each_entry_safe(ns, next, &rm_list, list) 3595 nvme_ns_remove(ns); 3596 3597 } 3598 3599 static int nvme_scan_ns_list(struct nvme_ctrl *ctrl, unsigned nn) 3600 { 3601 struct nvme_ns *ns; 3602 __le32 *ns_list; 3603 unsigned i, j, nsid, prev = 0; 3604 unsigned num_lists = DIV_ROUND_UP_ULL((u64)nn, 1024); 3605 int ret = 0; 3606 3607 ns_list = kzalloc(NVME_IDENTIFY_DATA_SIZE, GFP_KERNEL); 3608 if (!ns_list) 3609 return -ENOMEM; 3610 3611 for (i = 0; i < num_lists; i++) { 3612 ret = nvme_identify_ns_list(ctrl, prev, ns_list); 3613 if (ret) 3614 goto free; 3615 3616 for (j = 0; j < min(nn, 1024U); j++) { 3617 nsid = le32_to_cpu(ns_list[j]); 3618 if (!nsid) 3619 goto out; 3620 3621 nvme_validate_ns(ctrl, nsid); 3622 3623 while (++prev < nsid) { 3624 ns = nvme_find_get_ns(ctrl, prev); 3625 if (ns) { 3626 nvme_ns_remove(ns); 3627 nvme_put_ns(ns); 3628 } 3629 } 3630 } 3631 nn -= j; 3632 } 3633 out: 3634 nvme_remove_invalid_namespaces(ctrl, prev); 3635 free: 3636 kfree(ns_list); 3637 return ret; 3638 } 3639 3640 static void nvme_scan_ns_sequential(struct nvme_ctrl *ctrl, unsigned nn) 3641 { 3642 unsigned i; 3643 3644 for (i = 1; i <= nn; i++) 3645 nvme_validate_ns(ctrl, i); 3646 3647 nvme_remove_invalid_namespaces(ctrl, nn); 3648 } 3649 3650 static void nvme_clear_changed_ns_log(struct nvme_ctrl *ctrl) 3651 { 3652 size_t log_size = NVME_MAX_CHANGED_NAMESPACES * sizeof(__le32); 3653 __le32 *log; 3654 int error; 3655 3656 log = kzalloc(log_size, GFP_KERNEL); 3657 if (!log) 3658 return; 3659 3660 /* 3661 * We need to read the log to clear the AEN, but we don't want to rely 3662 * on it for the changed namespace information as userspace could have 3663 * raced with us in reading the log page, which could cause us to miss 3664 * updates. 3665 */ 3666 error = nvme_get_log(ctrl, NVME_NSID_ALL, NVME_LOG_CHANGED_NS, 0, log, 3667 log_size, 0); 3668 if (error) 3669 dev_warn(ctrl->device, 3670 "reading changed ns log failed: %d\n", error); 3671 3672 kfree(log); 3673 } 3674 3675 static void nvme_scan_work(struct work_struct *work) 3676 { 3677 struct nvme_ctrl *ctrl = 3678 container_of(work, struct nvme_ctrl, scan_work); 3679 struct nvme_id_ctrl *id; 3680 unsigned nn; 3681 3682 if (ctrl->state != NVME_CTRL_LIVE) 3683 return; 3684 3685 WARN_ON_ONCE(!ctrl->tagset); 3686 3687 if (test_and_clear_bit(NVME_AER_NOTICE_NS_CHANGED, &ctrl->events)) { 3688 dev_info(ctrl->device, "rescanning namespaces.\n"); 3689 nvme_clear_changed_ns_log(ctrl); 3690 } 3691 3692 if (nvme_identify_ctrl(ctrl, &id)) 3693 return; 3694 3695 mutex_lock(&ctrl->scan_lock); 3696 nn = le32_to_cpu(id->nn); 3697 if (ctrl->vs >= NVME_VS(1, 1, 0) && 3698 !(ctrl->quirks & NVME_QUIRK_IDENTIFY_CNS)) { 3699 if (!nvme_scan_ns_list(ctrl, nn)) 3700 goto out_free_id; 3701 } 3702 nvme_scan_ns_sequential(ctrl, nn); 3703 out_free_id: 3704 mutex_unlock(&ctrl->scan_lock); 3705 kfree(id); 3706 down_write(&ctrl->namespaces_rwsem); 3707 list_sort(NULL, &ctrl->namespaces, ns_cmp); 3708 up_write(&ctrl->namespaces_rwsem); 3709 } 3710 3711 /* 3712 * This function iterates the namespace list unlocked to allow recovery from 3713 * controller failure. It is up to the caller to ensure the namespace list is 3714 * not modified by scan work while this function is executing. 3715 */ 3716 void nvme_remove_namespaces(struct nvme_ctrl *ctrl) 3717 { 3718 struct nvme_ns *ns, *next; 3719 LIST_HEAD(ns_list); 3720 3721 /* 3722 * make sure to requeue I/O to all namespaces as these 3723 * might result from the scan itself and must complete 3724 * for the scan_work to make progress 3725 */ 3726 nvme_mpath_clear_ctrl_paths(ctrl); 3727 3728 /* prevent racing with ns scanning */ 3729 flush_work(&ctrl->scan_work); 3730 3731 /* 3732 * The dead states indicates the controller was not gracefully 3733 * disconnected. In that case, we won't be able to flush any data while 3734 * removing the namespaces' disks; fail all the queues now to avoid 3735 * potentially having to clean up the failed sync later. 3736 */ 3737 if (ctrl->state == NVME_CTRL_DEAD) 3738 nvme_kill_queues(ctrl); 3739 3740 down_write(&ctrl->namespaces_rwsem); 3741 list_splice_init(&ctrl->namespaces, &ns_list); 3742 up_write(&ctrl->namespaces_rwsem); 3743 3744 list_for_each_entry_safe(ns, next, &ns_list, list) 3745 nvme_ns_remove(ns); 3746 } 3747 EXPORT_SYMBOL_GPL(nvme_remove_namespaces); 3748 3749 static int nvme_class_uevent(struct device *dev, struct kobj_uevent_env *env) 3750 { 3751 struct nvme_ctrl *ctrl = 3752 container_of(dev, struct nvme_ctrl, ctrl_device); 3753 struct nvmf_ctrl_options *opts = ctrl->opts; 3754 int ret; 3755 3756 ret = add_uevent_var(env, "NVME_TRTYPE=%s", ctrl->ops->name); 3757 if (ret) 3758 return ret; 3759 3760 if (opts) { 3761 ret = add_uevent_var(env, "NVME_TRADDR=%s", opts->traddr); 3762 if (ret) 3763 return ret; 3764 3765 ret = add_uevent_var(env, "NVME_TRSVCID=%s", 3766 opts->trsvcid ?: "none"); 3767 if (ret) 3768 return ret; 3769 3770 ret = add_uevent_var(env, "NVME_HOST_TRADDR=%s", 3771 opts->host_traddr ?: "none"); 3772 } 3773 return ret; 3774 } 3775 3776 static void nvme_aen_uevent(struct nvme_ctrl *ctrl) 3777 { 3778 char *envp[2] = { NULL, NULL }; 3779 u32 aen_result = ctrl->aen_result; 3780 3781 ctrl->aen_result = 0; 3782 if (!aen_result) 3783 return; 3784 3785 envp[0] = kasprintf(GFP_KERNEL, "NVME_AEN=%#08x", aen_result); 3786 if (!envp[0]) 3787 return; 3788 kobject_uevent_env(&ctrl->device->kobj, KOBJ_CHANGE, envp); 3789 kfree(envp[0]); 3790 } 3791 3792 static void nvme_async_event_work(struct work_struct *work) 3793 { 3794 struct nvme_ctrl *ctrl = 3795 container_of(work, struct nvme_ctrl, async_event_work); 3796 3797 nvme_aen_uevent(ctrl); 3798 ctrl->ops->submit_async_event(ctrl); 3799 } 3800 3801 static bool nvme_ctrl_pp_status(struct nvme_ctrl *ctrl) 3802 { 3803 3804 u32 csts; 3805 3806 if (ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts)) 3807 return false; 3808 3809 if (csts == ~0) 3810 return false; 3811 3812 return ((ctrl->ctrl_config & NVME_CC_ENABLE) && (csts & NVME_CSTS_PP)); 3813 } 3814 3815 static void nvme_get_fw_slot_info(struct nvme_ctrl *ctrl) 3816 { 3817 struct nvme_fw_slot_info_log *log; 3818 3819 log = kmalloc(sizeof(*log), GFP_KERNEL); 3820 if (!log) 3821 return; 3822 3823 if (nvme_get_log(ctrl, NVME_NSID_ALL, 0, NVME_LOG_FW_SLOT, log, 3824 sizeof(*log), 0)) 3825 dev_warn(ctrl->device, "Get FW SLOT INFO log error\n"); 3826 kfree(log); 3827 } 3828 3829 static void nvme_fw_act_work(struct work_struct *work) 3830 { 3831 struct nvme_ctrl *ctrl = container_of(work, 3832 struct nvme_ctrl, fw_act_work); 3833 unsigned long fw_act_timeout; 3834 3835 if (ctrl->mtfa) 3836 fw_act_timeout = jiffies + 3837 msecs_to_jiffies(ctrl->mtfa * 100); 3838 else 3839 fw_act_timeout = jiffies + 3840 msecs_to_jiffies(admin_timeout * 1000); 3841 3842 nvme_stop_queues(ctrl); 3843 while (nvme_ctrl_pp_status(ctrl)) { 3844 if (time_after(jiffies, fw_act_timeout)) { 3845 dev_warn(ctrl->device, 3846 "Fw activation timeout, reset controller\n"); 3847 nvme_reset_ctrl(ctrl); 3848 break; 3849 } 3850 msleep(100); 3851 } 3852 3853 if (ctrl->state != NVME_CTRL_LIVE) 3854 return; 3855 3856 nvme_start_queues(ctrl); 3857 /* read FW slot information to clear the AER */ 3858 nvme_get_fw_slot_info(ctrl); 3859 } 3860 3861 static void nvme_handle_aen_notice(struct nvme_ctrl *ctrl, u32 result) 3862 { 3863 u32 aer_notice_type = (result & 0xff00) >> 8; 3864 3865 trace_nvme_async_event(ctrl, aer_notice_type); 3866 3867 switch (aer_notice_type) { 3868 case NVME_AER_NOTICE_NS_CHANGED: 3869 set_bit(NVME_AER_NOTICE_NS_CHANGED, &ctrl->events); 3870 nvme_queue_scan(ctrl); 3871 break; 3872 case NVME_AER_NOTICE_FW_ACT_STARTING: 3873 queue_work(nvme_wq, &ctrl->fw_act_work); 3874 break; 3875 #ifdef CONFIG_NVME_MULTIPATH 3876 case NVME_AER_NOTICE_ANA: 3877 if (!ctrl->ana_log_buf) 3878 break; 3879 queue_work(nvme_wq, &ctrl->ana_work); 3880 break; 3881 #endif 3882 case NVME_AER_NOTICE_DISC_CHANGED: 3883 ctrl->aen_result = result; 3884 break; 3885 default: 3886 dev_warn(ctrl->device, "async event result %08x\n", result); 3887 } 3888 } 3889 3890 void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status, 3891 volatile union nvme_result *res) 3892 { 3893 u32 result = le32_to_cpu(res->u32); 3894 u32 aer_type = result & 0x07; 3895 3896 if (le16_to_cpu(status) >> 1 != NVME_SC_SUCCESS) 3897 return; 3898 3899 switch (aer_type) { 3900 case NVME_AER_NOTICE: 3901 nvme_handle_aen_notice(ctrl, result); 3902 break; 3903 case NVME_AER_ERROR: 3904 case NVME_AER_SMART: 3905 case NVME_AER_CSS: 3906 case NVME_AER_VS: 3907 trace_nvme_async_event(ctrl, aer_type); 3908 ctrl->aen_result = result; 3909 break; 3910 default: 3911 break; 3912 } 3913 queue_work(nvme_wq, &ctrl->async_event_work); 3914 } 3915 EXPORT_SYMBOL_GPL(nvme_complete_async_event); 3916 3917 void nvme_stop_ctrl(struct nvme_ctrl *ctrl) 3918 { 3919 nvme_mpath_stop(ctrl); 3920 nvme_stop_keep_alive(ctrl); 3921 flush_work(&ctrl->async_event_work); 3922 cancel_work_sync(&ctrl->fw_act_work); 3923 } 3924 EXPORT_SYMBOL_GPL(nvme_stop_ctrl); 3925 3926 void nvme_start_ctrl(struct nvme_ctrl *ctrl) 3927 { 3928 if (ctrl->kato) 3929 nvme_start_keep_alive(ctrl); 3930 3931 nvme_enable_aen(ctrl); 3932 3933 if (ctrl->queue_count > 1) { 3934 nvme_queue_scan(ctrl); 3935 nvme_start_queues(ctrl); 3936 } 3937 } 3938 EXPORT_SYMBOL_GPL(nvme_start_ctrl); 3939 3940 void nvme_uninit_ctrl(struct nvme_ctrl *ctrl) 3941 { 3942 nvme_fault_inject_fini(&ctrl->fault_inject); 3943 dev_pm_qos_hide_latency_tolerance(ctrl->device); 3944 cdev_device_del(&ctrl->cdev, ctrl->device); 3945 } 3946 EXPORT_SYMBOL_GPL(nvme_uninit_ctrl); 3947 3948 static void nvme_free_ctrl(struct device *dev) 3949 { 3950 struct nvme_ctrl *ctrl = 3951 container_of(dev, struct nvme_ctrl, ctrl_device); 3952 struct nvme_subsystem *subsys = ctrl->subsys; 3953 3954 if (subsys && ctrl->instance != subsys->instance) 3955 ida_simple_remove(&nvme_instance_ida, ctrl->instance); 3956 3957 kfree(ctrl->effects); 3958 nvme_mpath_uninit(ctrl); 3959 __free_page(ctrl->discard_page); 3960 3961 if (subsys) { 3962 mutex_lock(&nvme_subsystems_lock); 3963 list_del(&ctrl->subsys_entry); 3964 sysfs_remove_link(&subsys->dev.kobj, dev_name(ctrl->device)); 3965 mutex_unlock(&nvme_subsystems_lock); 3966 } 3967 3968 ctrl->ops->free_ctrl(ctrl); 3969 3970 if (subsys) 3971 nvme_put_subsystem(subsys); 3972 } 3973 3974 /* 3975 * Initialize a NVMe controller structures. This needs to be called during 3976 * earliest initialization so that we have the initialized structured around 3977 * during probing. 3978 */ 3979 int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev, 3980 const struct nvme_ctrl_ops *ops, unsigned long quirks) 3981 { 3982 int ret; 3983 3984 ctrl->state = NVME_CTRL_NEW; 3985 spin_lock_init(&ctrl->lock); 3986 mutex_init(&ctrl->scan_lock); 3987 INIT_LIST_HEAD(&ctrl->namespaces); 3988 init_rwsem(&ctrl->namespaces_rwsem); 3989 ctrl->dev = dev; 3990 ctrl->ops = ops; 3991 ctrl->quirks = quirks; 3992 INIT_WORK(&ctrl->scan_work, nvme_scan_work); 3993 INIT_WORK(&ctrl->async_event_work, nvme_async_event_work); 3994 INIT_WORK(&ctrl->fw_act_work, nvme_fw_act_work); 3995 INIT_WORK(&ctrl->delete_work, nvme_delete_ctrl_work); 3996 3997 INIT_DELAYED_WORK(&ctrl->ka_work, nvme_keep_alive_work); 3998 memset(&ctrl->ka_cmd, 0, sizeof(ctrl->ka_cmd)); 3999 ctrl->ka_cmd.common.opcode = nvme_admin_keep_alive; 4000 4001 BUILD_BUG_ON(NVME_DSM_MAX_RANGES * sizeof(struct nvme_dsm_range) > 4002 PAGE_SIZE); 4003 ctrl->discard_page = alloc_page(GFP_KERNEL); 4004 if (!ctrl->discard_page) { 4005 ret = -ENOMEM; 4006 goto out; 4007 } 4008 4009 ret = ida_simple_get(&nvme_instance_ida, 0, 0, GFP_KERNEL); 4010 if (ret < 0) 4011 goto out; 4012 ctrl->instance = ret; 4013 4014 device_initialize(&ctrl->ctrl_device); 4015 ctrl->device = &ctrl->ctrl_device; 4016 ctrl->device->devt = MKDEV(MAJOR(nvme_chr_devt), ctrl->instance); 4017 ctrl->device->class = nvme_class; 4018 ctrl->device->parent = ctrl->dev; 4019 ctrl->device->groups = nvme_dev_attr_groups; 4020 ctrl->device->release = nvme_free_ctrl; 4021 dev_set_drvdata(ctrl->device, ctrl); 4022 ret = dev_set_name(ctrl->device, "nvme%d", ctrl->instance); 4023 if (ret) 4024 goto out_release_instance; 4025 4026 cdev_init(&ctrl->cdev, &nvme_dev_fops); 4027 ctrl->cdev.owner = ops->module; 4028 ret = cdev_device_add(&ctrl->cdev, ctrl->device); 4029 if (ret) 4030 goto out_free_name; 4031 4032 /* 4033 * Initialize latency tolerance controls. The sysfs files won't 4034 * be visible to userspace unless the device actually supports APST. 4035 */ 4036 ctrl->device->power.set_latency_tolerance = nvme_set_latency_tolerance; 4037 dev_pm_qos_update_user_latency_tolerance(ctrl->device, 4038 min(default_ps_max_latency_us, (unsigned long)S32_MAX)); 4039 4040 nvme_fault_inject_init(&ctrl->fault_inject, dev_name(ctrl->device)); 4041 4042 return 0; 4043 out_free_name: 4044 kfree_const(ctrl->device->kobj.name); 4045 out_release_instance: 4046 ida_simple_remove(&nvme_instance_ida, ctrl->instance); 4047 out: 4048 if (ctrl->discard_page) 4049 __free_page(ctrl->discard_page); 4050 return ret; 4051 } 4052 EXPORT_SYMBOL_GPL(nvme_init_ctrl); 4053 4054 /** 4055 * nvme_kill_queues(): Ends all namespace queues 4056 * @ctrl: the dead controller that needs to end 4057 * 4058 * Call this function when the driver determines it is unable to get the 4059 * controller in a state capable of servicing IO. 4060 */ 4061 void nvme_kill_queues(struct nvme_ctrl *ctrl) 4062 { 4063 struct nvme_ns *ns; 4064 4065 down_read(&ctrl->namespaces_rwsem); 4066 4067 /* Forcibly unquiesce queues to avoid blocking dispatch */ 4068 if (ctrl->admin_q && !blk_queue_dying(ctrl->admin_q)) 4069 blk_mq_unquiesce_queue(ctrl->admin_q); 4070 4071 list_for_each_entry(ns, &ctrl->namespaces, list) 4072 nvme_set_queue_dying(ns); 4073 4074 up_read(&ctrl->namespaces_rwsem); 4075 } 4076 EXPORT_SYMBOL_GPL(nvme_kill_queues); 4077 4078 void nvme_unfreeze(struct nvme_ctrl *ctrl) 4079 { 4080 struct nvme_ns *ns; 4081 4082 down_read(&ctrl->namespaces_rwsem); 4083 list_for_each_entry(ns, &ctrl->namespaces, list) 4084 blk_mq_unfreeze_queue(ns->queue); 4085 up_read(&ctrl->namespaces_rwsem); 4086 } 4087 EXPORT_SYMBOL_GPL(nvme_unfreeze); 4088 4089 void nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout) 4090 { 4091 struct nvme_ns *ns; 4092 4093 down_read(&ctrl->namespaces_rwsem); 4094 list_for_each_entry(ns, &ctrl->namespaces, list) { 4095 timeout = blk_mq_freeze_queue_wait_timeout(ns->queue, timeout); 4096 if (timeout <= 0) 4097 break; 4098 } 4099 up_read(&ctrl->namespaces_rwsem); 4100 } 4101 EXPORT_SYMBOL_GPL(nvme_wait_freeze_timeout); 4102 4103 void nvme_wait_freeze(struct nvme_ctrl *ctrl) 4104 { 4105 struct nvme_ns *ns; 4106 4107 down_read(&ctrl->namespaces_rwsem); 4108 list_for_each_entry(ns, &ctrl->namespaces, list) 4109 blk_mq_freeze_queue_wait(ns->queue); 4110 up_read(&ctrl->namespaces_rwsem); 4111 } 4112 EXPORT_SYMBOL_GPL(nvme_wait_freeze); 4113 4114 void nvme_start_freeze(struct nvme_ctrl *ctrl) 4115 { 4116 struct nvme_ns *ns; 4117 4118 down_read(&ctrl->namespaces_rwsem); 4119 list_for_each_entry(ns, &ctrl->namespaces, list) 4120 blk_freeze_queue_start(ns->queue); 4121 up_read(&ctrl->namespaces_rwsem); 4122 } 4123 EXPORT_SYMBOL_GPL(nvme_start_freeze); 4124 4125 void nvme_stop_queues(struct nvme_ctrl *ctrl) 4126 { 4127 struct nvme_ns *ns; 4128 4129 down_read(&ctrl->namespaces_rwsem); 4130 list_for_each_entry(ns, &ctrl->namespaces, list) 4131 blk_mq_quiesce_queue(ns->queue); 4132 up_read(&ctrl->namespaces_rwsem); 4133 } 4134 EXPORT_SYMBOL_GPL(nvme_stop_queues); 4135 4136 void nvme_start_queues(struct nvme_ctrl *ctrl) 4137 { 4138 struct nvme_ns *ns; 4139 4140 down_read(&ctrl->namespaces_rwsem); 4141 list_for_each_entry(ns, &ctrl->namespaces, list) 4142 blk_mq_unquiesce_queue(ns->queue); 4143 up_read(&ctrl->namespaces_rwsem); 4144 } 4145 EXPORT_SYMBOL_GPL(nvme_start_queues); 4146 4147 4148 void nvme_sync_queues(struct nvme_ctrl *ctrl) 4149 { 4150 struct nvme_ns *ns; 4151 4152 down_read(&ctrl->namespaces_rwsem); 4153 list_for_each_entry(ns, &ctrl->namespaces, list) 4154 blk_sync_queue(ns->queue); 4155 up_read(&ctrl->namespaces_rwsem); 4156 4157 if (ctrl->admin_q) 4158 blk_sync_queue(ctrl->admin_q); 4159 } 4160 EXPORT_SYMBOL_GPL(nvme_sync_queues); 4161 4162 /* 4163 * Check we didn't inadvertently grow the command structure sizes: 4164 */ 4165 static inline void _nvme_check_size(void) 4166 { 4167 BUILD_BUG_ON(sizeof(struct nvme_common_command) != 64); 4168 BUILD_BUG_ON(sizeof(struct nvme_rw_command) != 64); 4169 BUILD_BUG_ON(sizeof(struct nvme_identify) != 64); 4170 BUILD_BUG_ON(sizeof(struct nvme_features) != 64); 4171 BUILD_BUG_ON(sizeof(struct nvme_download_firmware) != 64); 4172 BUILD_BUG_ON(sizeof(struct nvme_format_cmd) != 64); 4173 BUILD_BUG_ON(sizeof(struct nvme_dsm_cmd) != 64); 4174 BUILD_BUG_ON(sizeof(struct nvme_write_zeroes_cmd) != 64); 4175 BUILD_BUG_ON(sizeof(struct nvme_abort_cmd) != 64); 4176 BUILD_BUG_ON(sizeof(struct nvme_get_log_page_command) != 64); 4177 BUILD_BUG_ON(sizeof(struct nvme_command) != 64); 4178 BUILD_BUG_ON(sizeof(struct nvme_id_ctrl) != NVME_IDENTIFY_DATA_SIZE); 4179 BUILD_BUG_ON(sizeof(struct nvme_id_ns) != NVME_IDENTIFY_DATA_SIZE); 4180 BUILD_BUG_ON(sizeof(struct nvme_lba_range_type) != 64); 4181 BUILD_BUG_ON(sizeof(struct nvme_smart_log) != 512); 4182 BUILD_BUG_ON(sizeof(struct nvme_dbbuf) != 64); 4183 BUILD_BUG_ON(sizeof(struct nvme_directive_cmd) != 64); 4184 } 4185 4186 4187 static int __init nvme_core_init(void) 4188 { 4189 int result = -ENOMEM; 4190 4191 _nvme_check_size(); 4192 4193 nvme_wq = alloc_workqueue("nvme-wq", 4194 WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_SYSFS, 0); 4195 if (!nvme_wq) 4196 goto out; 4197 4198 nvme_reset_wq = alloc_workqueue("nvme-reset-wq", 4199 WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_SYSFS, 0); 4200 if (!nvme_reset_wq) 4201 goto destroy_wq; 4202 4203 nvme_delete_wq = alloc_workqueue("nvme-delete-wq", 4204 WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_SYSFS, 0); 4205 if (!nvme_delete_wq) 4206 goto destroy_reset_wq; 4207 4208 result = alloc_chrdev_region(&nvme_chr_devt, 0, NVME_MINORS, "nvme"); 4209 if (result < 0) 4210 goto destroy_delete_wq; 4211 4212 nvme_class = class_create(THIS_MODULE, "nvme"); 4213 if (IS_ERR(nvme_class)) { 4214 result = PTR_ERR(nvme_class); 4215 goto unregister_chrdev; 4216 } 4217 nvme_class->dev_uevent = nvme_class_uevent; 4218 4219 nvme_subsys_class = class_create(THIS_MODULE, "nvme-subsystem"); 4220 if (IS_ERR(nvme_subsys_class)) { 4221 result = PTR_ERR(nvme_subsys_class); 4222 goto destroy_class; 4223 } 4224 return 0; 4225 4226 destroy_class: 4227 class_destroy(nvme_class); 4228 unregister_chrdev: 4229 unregister_chrdev_region(nvme_chr_devt, NVME_MINORS); 4230 destroy_delete_wq: 4231 destroy_workqueue(nvme_delete_wq); 4232 destroy_reset_wq: 4233 destroy_workqueue(nvme_reset_wq); 4234 destroy_wq: 4235 destroy_workqueue(nvme_wq); 4236 out: 4237 return result; 4238 } 4239 4240 static void __exit nvme_core_exit(void) 4241 { 4242 class_destroy(nvme_subsys_class); 4243 class_destroy(nvme_class); 4244 unregister_chrdev_region(nvme_chr_devt, NVME_MINORS); 4245 destroy_workqueue(nvme_delete_wq); 4246 destroy_workqueue(nvme_reset_wq); 4247 destroy_workqueue(nvme_wq); 4248 } 4249 4250 MODULE_LICENSE("GPL"); 4251 MODULE_VERSION("1.0"); 4252 module_init(nvme_core_init); 4253 module_exit(nvme_core_exit); 4254