1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * NVM Express device driver 4 * Copyright (c) 2011-2014, Intel Corporation. 5 */ 6 7 #include <linux/blkdev.h> 8 #include <linux/blk-mq.h> 9 #include <linux/blk-integrity.h> 10 #include <linux/compat.h> 11 #include <linux/delay.h> 12 #include <linux/errno.h> 13 #include <linux/hdreg.h> 14 #include <linux/kernel.h> 15 #include <linux/module.h> 16 #include <linux/backing-dev.h> 17 #include <linux/slab.h> 18 #include <linux/types.h> 19 #include <linux/pr.h> 20 #include <linux/ptrace.h> 21 #include <linux/nvme_ioctl.h> 22 #include <linux/pm_qos.h> 23 #include <asm/unaligned.h> 24 25 #include "nvme.h" 26 #include "fabrics.h" 27 #include <linux/nvme-auth.h> 28 29 #define CREATE_TRACE_POINTS 30 #include "trace.h" 31 32 #define NVME_MINORS (1U << MINORBITS) 33 34 struct nvme_ns_info { 35 struct nvme_ns_ids ids; 36 u32 nsid; 37 __le32 anagrpid; 38 bool is_shared; 39 bool is_readonly; 40 bool is_ready; 41 bool is_removed; 42 }; 43 44 unsigned int admin_timeout = 60; 45 module_param(admin_timeout, uint, 0644); 46 MODULE_PARM_DESC(admin_timeout, "timeout in seconds for admin commands"); 47 EXPORT_SYMBOL_GPL(admin_timeout); 48 49 unsigned int nvme_io_timeout = 30; 50 module_param_named(io_timeout, nvme_io_timeout, uint, 0644); 51 MODULE_PARM_DESC(io_timeout, "timeout in seconds for I/O"); 52 EXPORT_SYMBOL_GPL(nvme_io_timeout); 53 54 static unsigned char shutdown_timeout = 5; 55 module_param(shutdown_timeout, byte, 0644); 56 MODULE_PARM_DESC(shutdown_timeout, "timeout in seconds for controller shutdown"); 57 58 static u8 nvme_max_retries = 5; 59 module_param_named(max_retries, nvme_max_retries, byte, 0644); 60 MODULE_PARM_DESC(max_retries, "max number of retries a command may have"); 61 62 static unsigned long default_ps_max_latency_us = 100000; 63 module_param(default_ps_max_latency_us, ulong, 0644); 64 MODULE_PARM_DESC(default_ps_max_latency_us, 65 "max power saving latency for new devices; use PM QOS to change per device"); 66 67 static bool force_apst; 68 module_param(force_apst, bool, 0644); 69 MODULE_PARM_DESC(force_apst, "allow APST for newly enumerated devices even if quirked off"); 70 71 static unsigned long apst_primary_timeout_ms = 100; 72 module_param(apst_primary_timeout_ms, ulong, 0644); 73 MODULE_PARM_DESC(apst_primary_timeout_ms, 74 "primary APST timeout in ms"); 75 76 static unsigned long apst_secondary_timeout_ms = 2000; 77 module_param(apst_secondary_timeout_ms, ulong, 0644); 78 MODULE_PARM_DESC(apst_secondary_timeout_ms, 79 "secondary APST timeout in ms"); 80 81 static unsigned long apst_primary_latency_tol_us = 15000; 82 module_param(apst_primary_latency_tol_us, ulong, 0644); 83 MODULE_PARM_DESC(apst_primary_latency_tol_us, 84 "primary APST latency tolerance in us"); 85 86 static unsigned long apst_secondary_latency_tol_us = 100000; 87 module_param(apst_secondary_latency_tol_us, ulong, 0644); 88 MODULE_PARM_DESC(apst_secondary_latency_tol_us, 89 "secondary APST latency tolerance in us"); 90 91 /* 92 * nvme_wq - hosts nvme related works that are not reset or delete 93 * nvme_reset_wq - hosts nvme reset works 94 * nvme_delete_wq - hosts nvme delete works 95 * 96 * nvme_wq will host works such as scan, aen handling, fw activation, 97 * keep-alive, periodic reconnects etc. nvme_reset_wq 98 * runs reset works which also flush works hosted on nvme_wq for 99 * serialization purposes. nvme_delete_wq host controller deletion 100 * works which flush reset works for serialization. 101 */ 102 struct workqueue_struct *nvme_wq; 103 EXPORT_SYMBOL_GPL(nvme_wq); 104 105 struct workqueue_struct *nvme_reset_wq; 106 EXPORT_SYMBOL_GPL(nvme_reset_wq); 107 108 struct workqueue_struct *nvme_delete_wq; 109 EXPORT_SYMBOL_GPL(nvme_delete_wq); 110 111 static LIST_HEAD(nvme_subsystems); 112 DEFINE_MUTEX(nvme_subsystems_lock); 113 114 static DEFINE_IDA(nvme_instance_ida); 115 static dev_t nvme_ctrl_base_chr_devt; 116 static struct class *nvme_class; 117 static struct class *nvme_subsys_class; 118 119 static DEFINE_IDA(nvme_ns_chr_minor_ida); 120 static dev_t nvme_ns_chr_devt; 121 static struct class *nvme_ns_chr_class; 122 123 static void nvme_put_subsystem(struct nvme_subsystem *subsys); 124 static void nvme_remove_invalid_namespaces(struct nvme_ctrl *ctrl, 125 unsigned nsid); 126 static void nvme_update_keep_alive(struct nvme_ctrl *ctrl, 127 struct nvme_command *cmd); 128 129 void nvme_queue_scan(struct nvme_ctrl *ctrl) 130 { 131 /* 132 * Only new queue scan work when admin and IO queues are both alive 133 */ 134 if (nvme_ctrl_state(ctrl) == NVME_CTRL_LIVE && ctrl->tagset) 135 queue_work(nvme_wq, &ctrl->scan_work); 136 } 137 138 /* 139 * Use this function to proceed with scheduling reset_work for a controller 140 * that had previously been set to the resetting state. This is intended for 141 * code paths that can't be interrupted by other reset attempts. A hot removal 142 * may prevent this from succeeding. 143 */ 144 int nvme_try_sched_reset(struct nvme_ctrl *ctrl) 145 { 146 if (nvme_ctrl_state(ctrl) != NVME_CTRL_RESETTING) 147 return -EBUSY; 148 if (!queue_work(nvme_reset_wq, &ctrl->reset_work)) 149 return -EBUSY; 150 return 0; 151 } 152 EXPORT_SYMBOL_GPL(nvme_try_sched_reset); 153 154 static void nvme_failfast_work(struct work_struct *work) 155 { 156 struct nvme_ctrl *ctrl = container_of(to_delayed_work(work), 157 struct nvme_ctrl, failfast_work); 158 159 if (nvme_ctrl_state(ctrl) != NVME_CTRL_CONNECTING) 160 return; 161 162 set_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags); 163 dev_info(ctrl->device, "failfast expired\n"); 164 nvme_kick_requeue_lists(ctrl); 165 } 166 167 static inline void nvme_start_failfast_work(struct nvme_ctrl *ctrl) 168 { 169 if (!ctrl->opts || ctrl->opts->fast_io_fail_tmo == -1) 170 return; 171 172 schedule_delayed_work(&ctrl->failfast_work, 173 ctrl->opts->fast_io_fail_tmo * HZ); 174 } 175 176 static inline void nvme_stop_failfast_work(struct nvme_ctrl *ctrl) 177 { 178 if (!ctrl->opts) 179 return; 180 181 cancel_delayed_work_sync(&ctrl->failfast_work); 182 clear_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags); 183 } 184 185 186 int nvme_reset_ctrl(struct nvme_ctrl *ctrl) 187 { 188 if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING)) 189 return -EBUSY; 190 if (!queue_work(nvme_reset_wq, &ctrl->reset_work)) 191 return -EBUSY; 192 return 0; 193 } 194 EXPORT_SYMBOL_GPL(nvme_reset_ctrl); 195 196 int nvme_reset_ctrl_sync(struct nvme_ctrl *ctrl) 197 { 198 int ret; 199 200 ret = nvme_reset_ctrl(ctrl); 201 if (!ret) { 202 flush_work(&ctrl->reset_work); 203 if (nvme_ctrl_state(ctrl) != NVME_CTRL_LIVE) 204 ret = -ENETRESET; 205 } 206 207 return ret; 208 } 209 210 static void nvme_do_delete_ctrl(struct nvme_ctrl *ctrl) 211 { 212 dev_info(ctrl->device, 213 "Removing ctrl: NQN \"%s\"\n", nvmf_ctrl_subsysnqn(ctrl)); 214 215 flush_work(&ctrl->reset_work); 216 nvme_stop_ctrl(ctrl); 217 nvme_remove_namespaces(ctrl); 218 ctrl->ops->delete_ctrl(ctrl); 219 nvme_uninit_ctrl(ctrl); 220 } 221 222 static void nvme_delete_ctrl_work(struct work_struct *work) 223 { 224 struct nvme_ctrl *ctrl = 225 container_of(work, struct nvme_ctrl, delete_work); 226 227 nvme_do_delete_ctrl(ctrl); 228 } 229 230 int nvme_delete_ctrl(struct nvme_ctrl *ctrl) 231 { 232 if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_DELETING)) 233 return -EBUSY; 234 if (!queue_work(nvme_delete_wq, &ctrl->delete_work)) 235 return -EBUSY; 236 return 0; 237 } 238 EXPORT_SYMBOL_GPL(nvme_delete_ctrl); 239 240 void nvme_delete_ctrl_sync(struct nvme_ctrl *ctrl) 241 { 242 /* 243 * Keep a reference until nvme_do_delete_ctrl() complete, 244 * since ->delete_ctrl can free the controller. 245 */ 246 nvme_get_ctrl(ctrl); 247 if (nvme_change_ctrl_state(ctrl, NVME_CTRL_DELETING)) 248 nvme_do_delete_ctrl(ctrl); 249 nvme_put_ctrl(ctrl); 250 } 251 252 static blk_status_t nvme_error_status(u16 status) 253 { 254 switch (status & 0x7ff) { 255 case NVME_SC_SUCCESS: 256 return BLK_STS_OK; 257 case NVME_SC_CAP_EXCEEDED: 258 return BLK_STS_NOSPC; 259 case NVME_SC_LBA_RANGE: 260 case NVME_SC_CMD_INTERRUPTED: 261 case NVME_SC_NS_NOT_READY: 262 return BLK_STS_TARGET; 263 case NVME_SC_BAD_ATTRIBUTES: 264 case NVME_SC_ONCS_NOT_SUPPORTED: 265 case NVME_SC_INVALID_OPCODE: 266 case NVME_SC_INVALID_FIELD: 267 case NVME_SC_INVALID_NS: 268 return BLK_STS_NOTSUPP; 269 case NVME_SC_WRITE_FAULT: 270 case NVME_SC_READ_ERROR: 271 case NVME_SC_UNWRITTEN_BLOCK: 272 case NVME_SC_ACCESS_DENIED: 273 case NVME_SC_READ_ONLY: 274 case NVME_SC_COMPARE_FAILED: 275 return BLK_STS_MEDIUM; 276 case NVME_SC_GUARD_CHECK: 277 case NVME_SC_APPTAG_CHECK: 278 case NVME_SC_REFTAG_CHECK: 279 case NVME_SC_INVALID_PI: 280 return BLK_STS_PROTECTION; 281 case NVME_SC_RESERVATION_CONFLICT: 282 return BLK_STS_RESV_CONFLICT; 283 case NVME_SC_HOST_PATH_ERROR: 284 return BLK_STS_TRANSPORT; 285 case NVME_SC_ZONE_TOO_MANY_ACTIVE: 286 return BLK_STS_ZONE_ACTIVE_RESOURCE; 287 case NVME_SC_ZONE_TOO_MANY_OPEN: 288 return BLK_STS_ZONE_OPEN_RESOURCE; 289 default: 290 return BLK_STS_IOERR; 291 } 292 } 293 294 static void nvme_retry_req(struct request *req) 295 { 296 unsigned long delay = 0; 297 u16 crd; 298 299 /* The mask and shift result must be <= 3 */ 300 crd = (nvme_req(req)->status & NVME_SC_CRD) >> 11; 301 if (crd) 302 delay = nvme_req(req)->ctrl->crdt[crd - 1] * 100; 303 304 nvme_req(req)->retries++; 305 blk_mq_requeue_request(req, false); 306 blk_mq_delay_kick_requeue_list(req->q, delay); 307 } 308 309 static void nvme_log_error(struct request *req) 310 { 311 struct nvme_ns *ns = req->q->queuedata; 312 struct nvme_request *nr = nvme_req(req); 313 314 if (ns) { 315 pr_err_ratelimited("%s: %s(0x%x) @ LBA %llu, %llu blocks, %s (sct 0x%x / sc 0x%x) %s%s\n", 316 ns->disk ? ns->disk->disk_name : "?", 317 nvme_get_opcode_str(nr->cmd->common.opcode), 318 nr->cmd->common.opcode, 319 (unsigned long long)nvme_sect_to_lba(ns, blk_rq_pos(req)), 320 (unsigned long long)blk_rq_bytes(req) >> ns->lba_shift, 321 nvme_get_error_status_str(nr->status), 322 nr->status >> 8 & 7, /* Status Code Type */ 323 nr->status & 0xff, /* Status Code */ 324 nr->status & NVME_SC_MORE ? "MORE " : "", 325 nr->status & NVME_SC_DNR ? "DNR " : ""); 326 return; 327 } 328 329 pr_err_ratelimited("%s: %s(0x%x), %s (sct 0x%x / sc 0x%x) %s%s\n", 330 dev_name(nr->ctrl->device), 331 nvme_get_admin_opcode_str(nr->cmd->common.opcode), 332 nr->cmd->common.opcode, 333 nvme_get_error_status_str(nr->status), 334 nr->status >> 8 & 7, /* Status Code Type */ 335 nr->status & 0xff, /* Status Code */ 336 nr->status & NVME_SC_MORE ? "MORE " : "", 337 nr->status & NVME_SC_DNR ? "DNR " : ""); 338 } 339 340 enum nvme_disposition { 341 COMPLETE, 342 RETRY, 343 FAILOVER, 344 AUTHENTICATE, 345 }; 346 347 static inline enum nvme_disposition nvme_decide_disposition(struct request *req) 348 { 349 if (likely(nvme_req(req)->status == 0)) 350 return COMPLETE; 351 352 if ((nvme_req(req)->status & 0x7ff) == NVME_SC_AUTH_REQUIRED) 353 return AUTHENTICATE; 354 355 if (blk_noretry_request(req) || 356 (nvme_req(req)->status & NVME_SC_DNR) || 357 nvme_req(req)->retries >= nvme_max_retries) 358 return COMPLETE; 359 360 if (req->cmd_flags & REQ_NVME_MPATH) { 361 if (nvme_is_path_error(nvme_req(req)->status) || 362 blk_queue_dying(req->q)) 363 return FAILOVER; 364 } else { 365 if (blk_queue_dying(req->q)) 366 return COMPLETE; 367 } 368 369 return RETRY; 370 } 371 372 static inline void nvme_end_req_zoned(struct request *req) 373 { 374 if (IS_ENABLED(CONFIG_BLK_DEV_ZONED) && 375 req_op(req) == REQ_OP_ZONE_APPEND) 376 req->__sector = nvme_lba_to_sect(req->q->queuedata, 377 le64_to_cpu(nvme_req(req)->result.u64)); 378 } 379 380 void nvme_end_req(struct request *req) 381 { 382 blk_status_t status = nvme_error_status(nvme_req(req)->status); 383 384 if (unlikely(nvme_req(req)->status && !(req->rq_flags & RQF_QUIET))) 385 nvme_log_error(req); 386 nvme_end_req_zoned(req); 387 nvme_trace_bio_complete(req); 388 if (req->cmd_flags & REQ_NVME_MPATH) 389 nvme_mpath_end_request(req); 390 blk_mq_end_request(req, status); 391 } 392 393 void nvme_complete_rq(struct request *req) 394 { 395 struct nvme_ctrl *ctrl = nvme_req(req)->ctrl; 396 397 trace_nvme_complete_rq(req); 398 nvme_cleanup_cmd(req); 399 400 /* 401 * Completions of long-running commands should not be able to 402 * defer sending of periodic keep alives, since the controller 403 * may have completed processing such commands a long time ago 404 * (arbitrarily close to command submission time). 405 * req->deadline - req->timeout is the command submission time 406 * in jiffies. 407 */ 408 if (ctrl->kas && 409 req->deadline - req->timeout >= ctrl->ka_last_check_time) 410 ctrl->comp_seen = true; 411 412 switch (nvme_decide_disposition(req)) { 413 case COMPLETE: 414 nvme_end_req(req); 415 return; 416 case RETRY: 417 nvme_retry_req(req); 418 return; 419 case FAILOVER: 420 nvme_failover_req(req); 421 return; 422 case AUTHENTICATE: 423 #ifdef CONFIG_NVME_AUTH 424 queue_work(nvme_wq, &ctrl->dhchap_auth_work); 425 nvme_retry_req(req); 426 #else 427 nvme_end_req(req); 428 #endif 429 return; 430 } 431 } 432 EXPORT_SYMBOL_GPL(nvme_complete_rq); 433 434 void nvme_complete_batch_req(struct request *req) 435 { 436 trace_nvme_complete_rq(req); 437 nvme_cleanup_cmd(req); 438 nvme_end_req_zoned(req); 439 } 440 EXPORT_SYMBOL_GPL(nvme_complete_batch_req); 441 442 /* 443 * Called to unwind from ->queue_rq on a failed command submission so that the 444 * multipathing code gets called to potentially failover to another path. 445 * The caller needs to unwind all transport specific resource allocations and 446 * must return propagate the return value. 447 */ 448 blk_status_t nvme_host_path_error(struct request *req) 449 { 450 nvme_req(req)->status = NVME_SC_HOST_PATH_ERROR; 451 blk_mq_set_request_complete(req); 452 nvme_complete_rq(req); 453 return BLK_STS_OK; 454 } 455 EXPORT_SYMBOL_GPL(nvme_host_path_error); 456 457 bool nvme_cancel_request(struct request *req, void *data) 458 { 459 dev_dbg_ratelimited(((struct nvme_ctrl *) data)->device, 460 "Cancelling I/O %d", req->tag); 461 462 /* don't abort one completed or idle request */ 463 if (blk_mq_rq_state(req) != MQ_RQ_IN_FLIGHT) 464 return true; 465 466 nvme_req(req)->status = NVME_SC_HOST_ABORTED_CMD; 467 nvme_req(req)->flags |= NVME_REQ_CANCELLED; 468 blk_mq_complete_request(req); 469 return true; 470 } 471 EXPORT_SYMBOL_GPL(nvme_cancel_request); 472 473 void nvme_cancel_tagset(struct nvme_ctrl *ctrl) 474 { 475 if (ctrl->tagset) { 476 blk_mq_tagset_busy_iter(ctrl->tagset, 477 nvme_cancel_request, ctrl); 478 blk_mq_tagset_wait_completed_request(ctrl->tagset); 479 } 480 } 481 EXPORT_SYMBOL_GPL(nvme_cancel_tagset); 482 483 void nvme_cancel_admin_tagset(struct nvme_ctrl *ctrl) 484 { 485 if (ctrl->admin_tagset) { 486 blk_mq_tagset_busy_iter(ctrl->admin_tagset, 487 nvme_cancel_request, ctrl); 488 blk_mq_tagset_wait_completed_request(ctrl->admin_tagset); 489 } 490 } 491 EXPORT_SYMBOL_GPL(nvme_cancel_admin_tagset); 492 493 bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl, 494 enum nvme_ctrl_state new_state) 495 { 496 enum nvme_ctrl_state old_state; 497 unsigned long flags; 498 bool changed = false; 499 500 spin_lock_irqsave(&ctrl->lock, flags); 501 502 old_state = nvme_ctrl_state(ctrl); 503 switch (new_state) { 504 case NVME_CTRL_LIVE: 505 switch (old_state) { 506 case NVME_CTRL_NEW: 507 case NVME_CTRL_RESETTING: 508 case NVME_CTRL_CONNECTING: 509 changed = true; 510 fallthrough; 511 default: 512 break; 513 } 514 break; 515 case NVME_CTRL_RESETTING: 516 switch (old_state) { 517 case NVME_CTRL_NEW: 518 case NVME_CTRL_LIVE: 519 changed = true; 520 fallthrough; 521 default: 522 break; 523 } 524 break; 525 case NVME_CTRL_CONNECTING: 526 switch (old_state) { 527 case NVME_CTRL_NEW: 528 case NVME_CTRL_RESETTING: 529 changed = true; 530 fallthrough; 531 default: 532 break; 533 } 534 break; 535 case NVME_CTRL_DELETING: 536 switch (old_state) { 537 case NVME_CTRL_LIVE: 538 case NVME_CTRL_RESETTING: 539 case NVME_CTRL_CONNECTING: 540 changed = true; 541 fallthrough; 542 default: 543 break; 544 } 545 break; 546 case NVME_CTRL_DELETING_NOIO: 547 switch (old_state) { 548 case NVME_CTRL_DELETING: 549 case NVME_CTRL_DEAD: 550 changed = true; 551 fallthrough; 552 default: 553 break; 554 } 555 break; 556 case NVME_CTRL_DEAD: 557 switch (old_state) { 558 case NVME_CTRL_DELETING: 559 changed = true; 560 fallthrough; 561 default: 562 break; 563 } 564 break; 565 default: 566 break; 567 } 568 569 if (changed) { 570 WRITE_ONCE(ctrl->state, new_state); 571 wake_up_all(&ctrl->state_wq); 572 } 573 574 spin_unlock_irqrestore(&ctrl->lock, flags); 575 if (!changed) 576 return false; 577 578 if (new_state == NVME_CTRL_LIVE) { 579 if (old_state == NVME_CTRL_CONNECTING) 580 nvme_stop_failfast_work(ctrl); 581 nvme_kick_requeue_lists(ctrl); 582 } else if (new_state == NVME_CTRL_CONNECTING && 583 old_state == NVME_CTRL_RESETTING) { 584 nvme_start_failfast_work(ctrl); 585 } 586 return changed; 587 } 588 EXPORT_SYMBOL_GPL(nvme_change_ctrl_state); 589 590 /* 591 * Waits for the controller state to be resetting, or returns false if it is 592 * not possible to ever transition to that state. 593 */ 594 bool nvme_wait_reset(struct nvme_ctrl *ctrl) 595 { 596 wait_event(ctrl->state_wq, 597 nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING) || 598 nvme_state_terminal(ctrl)); 599 return nvme_ctrl_state(ctrl) == NVME_CTRL_RESETTING; 600 } 601 EXPORT_SYMBOL_GPL(nvme_wait_reset); 602 603 static void nvme_free_ns_head(struct kref *ref) 604 { 605 struct nvme_ns_head *head = 606 container_of(ref, struct nvme_ns_head, ref); 607 608 nvme_mpath_remove_disk(head); 609 ida_free(&head->subsys->ns_ida, head->instance); 610 cleanup_srcu_struct(&head->srcu); 611 nvme_put_subsystem(head->subsys); 612 kfree(head); 613 } 614 615 bool nvme_tryget_ns_head(struct nvme_ns_head *head) 616 { 617 return kref_get_unless_zero(&head->ref); 618 } 619 620 void nvme_put_ns_head(struct nvme_ns_head *head) 621 { 622 kref_put(&head->ref, nvme_free_ns_head); 623 } 624 625 static void nvme_free_ns(struct kref *kref) 626 { 627 struct nvme_ns *ns = container_of(kref, struct nvme_ns, kref); 628 629 put_disk(ns->disk); 630 nvme_put_ns_head(ns->head); 631 nvme_put_ctrl(ns->ctrl); 632 kfree(ns); 633 } 634 635 bool nvme_get_ns(struct nvme_ns *ns) 636 { 637 return kref_get_unless_zero(&ns->kref); 638 } 639 640 void nvme_put_ns(struct nvme_ns *ns) 641 { 642 kref_put(&ns->kref, nvme_free_ns); 643 } 644 EXPORT_SYMBOL_NS_GPL(nvme_put_ns, NVME_TARGET_PASSTHRU); 645 646 static inline void nvme_clear_nvme_request(struct request *req) 647 { 648 nvme_req(req)->status = 0; 649 nvme_req(req)->retries = 0; 650 nvme_req(req)->flags = 0; 651 req->rq_flags |= RQF_DONTPREP; 652 } 653 654 /* initialize a passthrough request */ 655 void nvme_init_request(struct request *req, struct nvme_command *cmd) 656 { 657 if (req->q->queuedata) 658 req->timeout = NVME_IO_TIMEOUT; 659 else /* no queuedata implies admin queue */ 660 req->timeout = NVME_ADMIN_TIMEOUT; 661 662 /* passthru commands should let the driver set the SGL flags */ 663 cmd->common.flags &= ~NVME_CMD_SGL_ALL; 664 665 req->cmd_flags |= REQ_FAILFAST_DRIVER; 666 if (req->mq_hctx->type == HCTX_TYPE_POLL) 667 req->cmd_flags |= REQ_POLLED; 668 nvme_clear_nvme_request(req); 669 req->rq_flags |= RQF_QUIET; 670 memcpy(nvme_req(req)->cmd, cmd, sizeof(*cmd)); 671 } 672 EXPORT_SYMBOL_GPL(nvme_init_request); 673 674 /* 675 * For something we're not in a state to send to the device the default action 676 * is to busy it and retry it after the controller state is recovered. However, 677 * if the controller is deleting or if anything is marked for failfast or 678 * nvme multipath it is immediately failed. 679 * 680 * Note: commands used to initialize the controller will be marked for failfast. 681 * Note: nvme cli/ioctl commands are marked for failfast. 682 */ 683 blk_status_t nvme_fail_nonready_command(struct nvme_ctrl *ctrl, 684 struct request *rq) 685 { 686 enum nvme_ctrl_state state = nvme_ctrl_state(ctrl); 687 688 if (state != NVME_CTRL_DELETING_NOIO && 689 state != NVME_CTRL_DELETING && 690 state != NVME_CTRL_DEAD && 691 !test_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags) && 692 !blk_noretry_request(rq) && !(rq->cmd_flags & REQ_NVME_MPATH)) 693 return BLK_STS_RESOURCE; 694 return nvme_host_path_error(rq); 695 } 696 EXPORT_SYMBOL_GPL(nvme_fail_nonready_command); 697 698 bool __nvme_check_ready(struct nvme_ctrl *ctrl, struct request *rq, 699 bool queue_live) 700 { 701 struct nvme_request *req = nvme_req(rq); 702 703 /* 704 * currently we have a problem sending passthru commands 705 * on the admin_q if the controller is not LIVE because we can't 706 * make sure that they are going out after the admin connect, 707 * controller enable and/or other commands in the initialization 708 * sequence. until the controller will be LIVE, fail with 709 * BLK_STS_RESOURCE so that they will be rescheduled. 710 */ 711 if (rq->q == ctrl->admin_q && (req->flags & NVME_REQ_USERCMD)) 712 return false; 713 714 if (ctrl->ops->flags & NVME_F_FABRICS) { 715 /* 716 * Only allow commands on a live queue, except for the connect 717 * command, which is require to set the queue live in the 718 * appropinquate states. 719 */ 720 switch (nvme_ctrl_state(ctrl)) { 721 case NVME_CTRL_CONNECTING: 722 if (blk_rq_is_passthrough(rq) && nvme_is_fabrics(req->cmd) && 723 (req->cmd->fabrics.fctype == nvme_fabrics_type_connect || 724 req->cmd->fabrics.fctype == nvme_fabrics_type_auth_send || 725 req->cmd->fabrics.fctype == nvme_fabrics_type_auth_receive)) 726 return true; 727 break; 728 default: 729 break; 730 case NVME_CTRL_DEAD: 731 return false; 732 } 733 } 734 735 return queue_live; 736 } 737 EXPORT_SYMBOL_GPL(__nvme_check_ready); 738 739 static inline void nvme_setup_flush(struct nvme_ns *ns, 740 struct nvme_command *cmnd) 741 { 742 memset(cmnd, 0, sizeof(*cmnd)); 743 cmnd->common.opcode = nvme_cmd_flush; 744 cmnd->common.nsid = cpu_to_le32(ns->head->ns_id); 745 } 746 747 static blk_status_t nvme_setup_discard(struct nvme_ns *ns, struct request *req, 748 struct nvme_command *cmnd) 749 { 750 unsigned short segments = blk_rq_nr_discard_segments(req), n = 0; 751 struct nvme_dsm_range *range; 752 struct bio *bio; 753 754 /* 755 * Some devices do not consider the DSM 'Number of Ranges' field when 756 * determining how much data to DMA. Always allocate memory for maximum 757 * number of segments to prevent device reading beyond end of buffer. 758 */ 759 static const size_t alloc_size = sizeof(*range) * NVME_DSM_MAX_RANGES; 760 761 range = kzalloc(alloc_size, GFP_ATOMIC | __GFP_NOWARN); 762 if (!range) { 763 /* 764 * If we fail allocation our range, fallback to the controller 765 * discard page. If that's also busy, it's safe to return 766 * busy, as we know we can make progress once that's freed. 767 */ 768 if (test_and_set_bit_lock(0, &ns->ctrl->discard_page_busy)) 769 return BLK_STS_RESOURCE; 770 771 range = page_address(ns->ctrl->discard_page); 772 } 773 774 if (queue_max_discard_segments(req->q) == 1) { 775 u64 slba = nvme_sect_to_lba(ns, blk_rq_pos(req)); 776 u32 nlb = blk_rq_sectors(req) >> (ns->lba_shift - 9); 777 778 range[0].cattr = cpu_to_le32(0); 779 range[0].nlb = cpu_to_le32(nlb); 780 range[0].slba = cpu_to_le64(slba); 781 n = 1; 782 } else { 783 __rq_for_each_bio(bio, req) { 784 u64 slba = nvme_sect_to_lba(ns, bio->bi_iter.bi_sector); 785 u32 nlb = bio->bi_iter.bi_size >> ns->lba_shift; 786 787 if (n < segments) { 788 range[n].cattr = cpu_to_le32(0); 789 range[n].nlb = cpu_to_le32(nlb); 790 range[n].slba = cpu_to_le64(slba); 791 } 792 n++; 793 } 794 } 795 796 if (WARN_ON_ONCE(n != segments)) { 797 if (virt_to_page(range) == ns->ctrl->discard_page) 798 clear_bit_unlock(0, &ns->ctrl->discard_page_busy); 799 else 800 kfree(range); 801 return BLK_STS_IOERR; 802 } 803 804 memset(cmnd, 0, sizeof(*cmnd)); 805 cmnd->dsm.opcode = nvme_cmd_dsm; 806 cmnd->dsm.nsid = cpu_to_le32(ns->head->ns_id); 807 cmnd->dsm.nr = cpu_to_le32(segments - 1); 808 cmnd->dsm.attributes = cpu_to_le32(NVME_DSMGMT_AD); 809 810 bvec_set_virt(&req->special_vec, range, alloc_size); 811 req->rq_flags |= RQF_SPECIAL_PAYLOAD; 812 813 return BLK_STS_OK; 814 } 815 816 static void nvme_set_ref_tag(struct nvme_ns *ns, struct nvme_command *cmnd, 817 struct request *req) 818 { 819 u32 upper, lower; 820 u64 ref48; 821 822 /* both rw and write zeroes share the same reftag format */ 823 switch (ns->guard_type) { 824 case NVME_NVM_NS_16B_GUARD: 825 cmnd->rw.reftag = cpu_to_le32(t10_pi_ref_tag(req)); 826 break; 827 case NVME_NVM_NS_64B_GUARD: 828 ref48 = ext_pi_ref_tag(req); 829 lower = lower_32_bits(ref48); 830 upper = upper_32_bits(ref48); 831 832 cmnd->rw.reftag = cpu_to_le32(lower); 833 cmnd->rw.cdw3 = cpu_to_le32(upper); 834 break; 835 default: 836 break; 837 } 838 } 839 840 static inline blk_status_t nvme_setup_write_zeroes(struct nvme_ns *ns, 841 struct request *req, struct nvme_command *cmnd) 842 { 843 memset(cmnd, 0, sizeof(*cmnd)); 844 845 if (ns->ctrl->quirks & NVME_QUIRK_DEALLOCATE_ZEROES) 846 return nvme_setup_discard(ns, req, cmnd); 847 848 cmnd->write_zeroes.opcode = nvme_cmd_write_zeroes; 849 cmnd->write_zeroes.nsid = cpu_to_le32(ns->head->ns_id); 850 cmnd->write_zeroes.slba = 851 cpu_to_le64(nvme_sect_to_lba(ns, blk_rq_pos(req))); 852 cmnd->write_zeroes.length = 853 cpu_to_le16((blk_rq_bytes(req) >> ns->lba_shift) - 1); 854 855 if (!(req->cmd_flags & REQ_NOUNMAP) && (ns->features & NVME_NS_DEAC)) 856 cmnd->write_zeroes.control |= cpu_to_le16(NVME_WZ_DEAC); 857 858 if (nvme_ns_has_pi(ns)) { 859 cmnd->write_zeroes.control |= cpu_to_le16(NVME_RW_PRINFO_PRACT); 860 861 switch (ns->pi_type) { 862 case NVME_NS_DPS_PI_TYPE1: 863 case NVME_NS_DPS_PI_TYPE2: 864 nvme_set_ref_tag(ns, cmnd, req); 865 break; 866 } 867 } 868 869 return BLK_STS_OK; 870 } 871 872 static inline blk_status_t nvme_setup_rw(struct nvme_ns *ns, 873 struct request *req, struct nvme_command *cmnd, 874 enum nvme_opcode op) 875 { 876 u16 control = 0; 877 u32 dsmgmt = 0; 878 879 if (req->cmd_flags & REQ_FUA) 880 control |= NVME_RW_FUA; 881 if (req->cmd_flags & (REQ_FAILFAST_DEV | REQ_RAHEAD)) 882 control |= NVME_RW_LR; 883 884 if (req->cmd_flags & REQ_RAHEAD) 885 dsmgmt |= NVME_RW_DSM_FREQ_PREFETCH; 886 887 cmnd->rw.opcode = op; 888 cmnd->rw.flags = 0; 889 cmnd->rw.nsid = cpu_to_le32(ns->head->ns_id); 890 cmnd->rw.cdw2 = 0; 891 cmnd->rw.cdw3 = 0; 892 cmnd->rw.metadata = 0; 893 cmnd->rw.slba = cpu_to_le64(nvme_sect_to_lba(ns, blk_rq_pos(req))); 894 cmnd->rw.length = cpu_to_le16((blk_rq_bytes(req) >> ns->lba_shift) - 1); 895 cmnd->rw.reftag = 0; 896 cmnd->rw.apptag = 0; 897 cmnd->rw.appmask = 0; 898 899 if (ns->ms) { 900 /* 901 * If formated with metadata, the block layer always provides a 902 * metadata buffer if CONFIG_BLK_DEV_INTEGRITY is enabled. Else 903 * we enable the PRACT bit for protection information or set the 904 * namespace capacity to zero to prevent any I/O. 905 */ 906 if (!blk_integrity_rq(req)) { 907 if (WARN_ON_ONCE(!nvme_ns_has_pi(ns))) 908 return BLK_STS_NOTSUPP; 909 control |= NVME_RW_PRINFO_PRACT; 910 } 911 912 switch (ns->pi_type) { 913 case NVME_NS_DPS_PI_TYPE3: 914 control |= NVME_RW_PRINFO_PRCHK_GUARD; 915 break; 916 case NVME_NS_DPS_PI_TYPE1: 917 case NVME_NS_DPS_PI_TYPE2: 918 control |= NVME_RW_PRINFO_PRCHK_GUARD | 919 NVME_RW_PRINFO_PRCHK_REF; 920 if (op == nvme_cmd_zone_append) 921 control |= NVME_RW_APPEND_PIREMAP; 922 nvme_set_ref_tag(ns, cmnd, req); 923 break; 924 } 925 } 926 927 cmnd->rw.control = cpu_to_le16(control); 928 cmnd->rw.dsmgmt = cpu_to_le32(dsmgmt); 929 return 0; 930 } 931 932 void nvme_cleanup_cmd(struct request *req) 933 { 934 if (req->rq_flags & RQF_SPECIAL_PAYLOAD) { 935 struct nvme_ctrl *ctrl = nvme_req(req)->ctrl; 936 937 if (req->special_vec.bv_page == ctrl->discard_page) 938 clear_bit_unlock(0, &ctrl->discard_page_busy); 939 else 940 kfree(bvec_virt(&req->special_vec)); 941 req->rq_flags &= ~RQF_SPECIAL_PAYLOAD; 942 } 943 } 944 EXPORT_SYMBOL_GPL(nvme_cleanup_cmd); 945 946 blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req) 947 { 948 struct nvme_command *cmd = nvme_req(req)->cmd; 949 blk_status_t ret = BLK_STS_OK; 950 951 if (!(req->rq_flags & RQF_DONTPREP)) 952 nvme_clear_nvme_request(req); 953 954 switch (req_op(req)) { 955 case REQ_OP_DRV_IN: 956 case REQ_OP_DRV_OUT: 957 /* these are setup prior to execution in nvme_init_request() */ 958 break; 959 case REQ_OP_FLUSH: 960 nvme_setup_flush(ns, cmd); 961 break; 962 case REQ_OP_ZONE_RESET_ALL: 963 case REQ_OP_ZONE_RESET: 964 ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_RESET); 965 break; 966 case REQ_OP_ZONE_OPEN: 967 ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_OPEN); 968 break; 969 case REQ_OP_ZONE_CLOSE: 970 ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_CLOSE); 971 break; 972 case REQ_OP_ZONE_FINISH: 973 ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_FINISH); 974 break; 975 case REQ_OP_WRITE_ZEROES: 976 ret = nvme_setup_write_zeroes(ns, req, cmd); 977 break; 978 case REQ_OP_DISCARD: 979 ret = nvme_setup_discard(ns, req, cmd); 980 break; 981 case REQ_OP_READ: 982 ret = nvme_setup_rw(ns, req, cmd, nvme_cmd_read); 983 break; 984 case REQ_OP_WRITE: 985 ret = nvme_setup_rw(ns, req, cmd, nvme_cmd_write); 986 break; 987 case REQ_OP_ZONE_APPEND: 988 ret = nvme_setup_rw(ns, req, cmd, nvme_cmd_zone_append); 989 break; 990 default: 991 WARN_ON_ONCE(1); 992 return BLK_STS_IOERR; 993 } 994 995 cmd->common.command_id = nvme_cid(req); 996 trace_nvme_setup_cmd(req, cmd); 997 return ret; 998 } 999 EXPORT_SYMBOL_GPL(nvme_setup_cmd); 1000 1001 /* 1002 * Return values: 1003 * 0: success 1004 * >0: nvme controller's cqe status response 1005 * <0: kernel error in lieu of controller response 1006 */ 1007 int nvme_execute_rq(struct request *rq, bool at_head) 1008 { 1009 blk_status_t status; 1010 1011 status = blk_execute_rq(rq, at_head); 1012 if (nvme_req(rq)->flags & NVME_REQ_CANCELLED) 1013 return -EINTR; 1014 if (nvme_req(rq)->status) 1015 return nvme_req(rq)->status; 1016 return blk_status_to_errno(status); 1017 } 1018 EXPORT_SYMBOL_NS_GPL(nvme_execute_rq, NVME_TARGET_PASSTHRU); 1019 1020 /* 1021 * Returns 0 on success. If the result is negative, it's a Linux error code; 1022 * if the result is positive, it's an NVM Express status code 1023 */ 1024 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 1025 union nvme_result *result, void *buffer, unsigned bufflen, 1026 int qid, int at_head, blk_mq_req_flags_t flags) 1027 { 1028 struct request *req; 1029 int ret; 1030 1031 if (qid == NVME_QID_ANY) 1032 req = blk_mq_alloc_request(q, nvme_req_op(cmd), flags); 1033 else 1034 req = blk_mq_alloc_request_hctx(q, nvme_req_op(cmd), flags, 1035 qid - 1); 1036 1037 if (IS_ERR(req)) 1038 return PTR_ERR(req); 1039 nvme_init_request(req, cmd); 1040 1041 if (buffer && bufflen) { 1042 ret = blk_rq_map_kern(q, req, buffer, bufflen, GFP_KERNEL); 1043 if (ret) 1044 goto out; 1045 } 1046 1047 ret = nvme_execute_rq(req, at_head); 1048 if (result && ret >= 0) 1049 *result = nvme_req(req)->result; 1050 out: 1051 blk_mq_free_request(req); 1052 return ret; 1053 } 1054 EXPORT_SYMBOL_GPL(__nvme_submit_sync_cmd); 1055 1056 int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 1057 void *buffer, unsigned bufflen) 1058 { 1059 return __nvme_submit_sync_cmd(q, cmd, NULL, buffer, bufflen, 1060 NVME_QID_ANY, 0, 0); 1061 } 1062 EXPORT_SYMBOL_GPL(nvme_submit_sync_cmd); 1063 1064 u32 nvme_command_effects(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u8 opcode) 1065 { 1066 u32 effects = 0; 1067 1068 if (ns) { 1069 effects = le32_to_cpu(ns->head->effects->iocs[opcode]); 1070 if (effects & ~(NVME_CMD_EFFECTS_CSUPP | NVME_CMD_EFFECTS_LBCC)) 1071 dev_warn_once(ctrl->device, 1072 "IO command:%02x has unusual effects:%08x\n", 1073 opcode, effects); 1074 1075 /* 1076 * NVME_CMD_EFFECTS_CSE_MASK causes a freeze all I/O queues, 1077 * which would deadlock when done on an I/O command. Note that 1078 * We already warn about an unusual effect above. 1079 */ 1080 effects &= ~NVME_CMD_EFFECTS_CSE_MASK; 1081 } else { 1082 effects = le32_to_cpu(ctrl->effects->acs[opcode]); 1083 } 1084 1085 return effects; 1086 } 1087 EXPORT_SYMBOL_NS_GPL(nvme_command_effects, NVME_TARGET_PASSTHRU); 1088 1089 u32 nvme_passthru_start(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u8 opcode) 1090 { 1091 u32 effects = nvme_command_effects(ctrl, ns, opcode); 1092 1093 /* 1094 * For simplicity, IO to all namespaces is quiesced even if the command 1095 * effects say only one namespace is affected. 1096 */ 1097 if (effects & NVME_CMD_EFFECTS_CSE_MASK) { 1098 mutex_lock(&ctrl->scan_lock); 1099 mutex_lock(&ctrl->subsys->lock); 1100 nvme_mpath_start_freeze(ctrl->subsys); 1101 nvme_mpath_wait_freeze(ctrl->subsys); 1102 nvme_start_freeze(ctrl); 1103 nvme_wait_freeze(ctrl); 1104 } 1105 return effects; 1106 } 1107 EXPORT_SYMBOL_NS_GPL(nvme_passthru_start, NVME_TARGET_PASSTHRU); 1108 1109 void nvme_passthru_end(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u32 effects, 1110 struct nvme_command *cmd, int status) 1111 { 1112 if (effects & NVME_CMD_EFFECTS_CSE_MASK) { 1113 nvme_unfreeze(ctrl); 1114 nvme_mpath_unfreeze(ctrl->subsys); 1115 mutex_unlock(&ctrl->subsys->lock); 1116 mutex_unlock(&ctrl->scan_lock); 1117 } 1118 if (effects & NVME_CMD_EFFECTS_CCC) { 1119 if (!test_and_set_bit(NVME_CTRL_DIRTY_CAPABILITY, 1120 &ctrl->flags)) { 1121 dev_info(ctrl->device, 1122 "controller capabilities changed, reset may be required to take effect.\n"); 1123 } 1124 } 1125 if (effects & (NVME_CMD_EFFECTS_NIC | NVME_CMD_EFFECTS_NCC)) { 1126 nvme_queue_scan(ctrl); 1127 flush_work(&ctrl->scan_work); 1128 } 1129 if (ns) 1130 return; 1131 1132 switch (cmd->common.opcode) { 1133 case nvme_admin_set_features: 1134 switch (le32_to_cpu(cmd->common.cdw10) & 0xFF) { 1135 case NVME_FEAT_KATO: 1136 /* 1137 * Keep alive commands interval on the host should be 1138 * updated when KATO is modified by Set Features 1139 * commands. 1140 */ 1141 if (!status) 1142 nvme_update_keep_alive(ctrl, cmd); 1143 break; 1144 default: 1145 break; 1146 } 1147 break; 1148 default: 1149 break; 1150 } 1151 } 1152 EXPORT_SYMBOL_NS_GPL(nvme_passthru_end, NVME_TARGET_PASSTHRU); 1153 1154 /* 1155 * Recommended frequency for KATO commands per NVMe 1.4 section 7.12.1: 1156 * 1157 * The host should send Keep Alive commands at half of the Keep Alive Timeout 1158 * accounting for transport roundtrip times [..]. 1159 */ 1160 static unsigned long nvme_keep_alive_work_period(struct nvme_ctrl *ctrl) 1161 { 1162 unsigned long delay = ctrl->kato * HZ / 2; 1163 1164 /* 1165 * When using Traffic Based Keep Alive, we need to run 1166 * nvme_keep_alive_work at twice the normal frequency, as one 1167 * command completion can postpone sending a keep alive command 1168 * by up to twice the delay between runs. 1169 */ 1170 if (ctrl->ctratt & NVME_CTRL_ATTR_TBKAS) 1171 delay /= 2; 1172 return delay; 1173 } 1174 1175 static void nvme_queue_keep_alive_work(struct nvme_ctrl *ctrl) 1176 { 1177 queue_delayed_work(nvme_wq, &ctrl->ka_work, 1178 nvme_keep_alive_work_period(ctrl)); 1179 } 1180 1181 static void nvme_keep_alive_finish(struct request *rq, 1182 blk_status_t status, struct nvme_ctrl *ctrl) 1183 { 1184 unsigned long flags; 1185 bool startka = false; 1186 unsigned long rtt = jiffies - (rq->deadline - rq->timeout); 1187 unsigned long delay = nvme_keep_alive_work_period(ctrl); 1188 1189 /* 1190 * Subtract off the keepalive RTT so nvme_keep_alive_work runs 1191 * at the desired frequency. 1192 */ 1193 if (rtt <= delay) { 1194 delay -= rtt; 1195 } else { 1196 dev_warn(ctrl->device, "long keepalive RTT (%u ms)\n", 1197 jiffies_to_msecs(rtt)); 1198 delay = 0; 1199 } 1200 1201 if (status) { 1202 dev_err(ctrl->device, 1203 "failed nvme_keep_alive_end_io error=%d\n", 1204 status); 1205 return; 1206 } 1207 1208 ctrl->ka_last_check_time = jiffies; 1209 ctrl->comp_seen = false; 1210 spin_lock_irqsave(&ctrl->lock, flags); 1211 if (ctrl->state == NVME_CTRL_LIVE || 1212 ctrl->state == NVME_CTRL_CONNECTING) 1213 startka = true; 1214 spin_unlock_irqrestore(&ctrl->lock, flags); 1215 if (startka) 1216 queue_delayed_work(nvme_wq, &ctrl->ka_work, delay); 1217 } 1218 1219 static void nvme_keep_alive_work(struct work_struct *work) 1220 { 1221 struct nvme_ctrl *ctrl = container_of(to_delayed_work(work), 1222 struct nvme_ctrl, ka_work); 1223 bool comp_seen = ctrl->comp_seen; 1224 struct request *rq; 1225 blk_status_t status; 1226 1227 ctrl->ka_last_check_time = jiffies; 1228 1229 if ((ctrl->ctratt & NVME_CTRL_ATTR_TBKAS) && comp_seen) { 1230 dev_dbg(ctrl->device, 1231 "reschedule traffic based keep-alive timer\n"); 1232 ctrl->comp_seen = false; 1233 nvme_queue_keep_alive_work(ctrl); 1234 return; 1235 } 1236 1237 rq = blk_mq_alloc_request(ctrl->admin_q, nvme_req_op(&ctrl->ka_cmd), 1238 BLK_MQ_REQ_RESERVED | BLK_MQ_REQ_NOWAIT); 1239 if (IS_ERR(rq)) { 1240 /* allocation failure, reset the controller */ 1241 dev_err(ctrl->device, "keep-alive failed: %ld\n", PTR_ERR(rq)); 1242 nvme_reset_ctrl(ctrl); 1243 return; 1244 } 1245 nvme_init_request(rq, &ctrl->ka_cmd); 1246 1247 rq->timeout = ctrl->kato * HZ; 1248 status = blk_execute_rq(rq, false); 1249 nvme_keep_alive_finish(rq, status, ctrl); 1250 blk_mq_free_request(rq); 1251 } 1252 1253 static void nvme_start_keep_alive(struct nvme_ctrl *ctrl) 1254 { 1255 if (unlikely(ctrl->kato == 0)) 1256 return; 1257 1258 nvme_queue_keep_alive_work(ctrl); 1259 } 1260 1261 void nvme_stop_keep_alive(struct nvme_ctrl *ctrl) 1262 { 1263 if (unlikely(ctrl->kato == 0)) 1264 return; 1265 1266 cancel_delayed_work_sync(&ctrl->ka_work); 1267 } 1268 EXPORT_SYMBOL_GPL(nvme_stop_keep_alive); 1269 1270 static void nvme_update_keep_alive(struct nvme_ctrl *ctrl, 1271 struct nvme_command *cmd) 1272 { 1273 unsigned int new_kato = 1274 DIV_ROUND_UP(le32_to_cpu(cmd->common.cdw11), 1000); 1275 1276 dev_info(ctrl->device, 1277 "keep alive interval updated from %u ms to %u ms\n", 1278 ctrl->kato * 1000 / 2, new_kato * 1000 / 2); 1279 1280 nvme_stop_keep_alive(ctrl); 1281 ctrl->kato = new_kato; 1282 nvme_start_keep_alive(ctrl); 1283 } 1284 1285 /* 1286 * In NVMe 1.0 the CNS field was just a binary controller or namespace 1287 * flag, thus sending any new CNS opcodes has a big chance of not working. 1288 * Qemu unfortunately had that bug after reporting a 1.1 version compliance 1289 * (but not for any later version). 1290 */ 1291 static bool nvme_ctrl_limited_cns(struct nvme_ctrl *ctrl) 1292 { 1293 if (ctrl->quirks & NVME_QUIRK_IDENTIFY_CNS) 1294 return ctrl->vs < NVME_VS(1, 2, 0); 1295 return ctrl->vs < NVME_VS(1, 1, 0); 1296 } 1297 1298 static int nvme_identify_ctrl(struct nvme_ctrl *dev, struct nvme_id_ctrl **id) 1299 { 1300 struct nvme_command c = { }; 1301 int error; 1302 1303 /* gcc-4.4.4 (at least) has issues with initializers and anon unions */ 1304 c.identify.opcode = nvme_admin_identify; 1305 c.identify.cns = NVME_ID_CNS_CTRL; 1306 1307 *id = kmalloc(sizeof(struct nvme_id_ctrl), GFP_KERNEL); 1308 if (!*id) 1309 return -ENOMEM; 1310 1311 error = nvme_submit_sync_cmd(dev->admin_q, &c, *id, 1312 sizeof(struct nvme_id_ctrl)); 1313 if (error) { 1314 kfree(*id); 1315 *id = NULL; 1316 } 1317 return error; 1318 } 1319 1320 static int nvme_process_ns_desc(struct nvme_ctrl *ctrl, struct nvme_ns_ids *ids, 1321 struct nvme_ns_id_desc *cur, bool *csi_seen) 1322 { 1323 const char *warn_str = "ctrl returned bogus length:"; 1324 void *data = cur; 1325 1326 switch (cur->nidt) { 1327 case NVME_NIDT_EUI64: 1328 if (cur->nidl != NVME_NIDT_EUI64_LEN) { 1329 dev_warn(ctrl->device, "%s %d for NVME_NIDT_EUI64\n", 1330 warn_str, cur->nidl); 1331 return -1; 1332 } 1333 if (ctrl->quirks & NVME_QUIRK_BOGUS_NID) 1334 return NVME_NIDT_EUI64_LEN; 1335 memcpy(ids->eui64, data + sizeof(*cur), NVME_NIDT_EUI64_LEN); 1336 return NVME_NIDT_EUI64_LEN; 1337 case NVME_NIDT_NGUID: 1338 if (cur->nidl != NVME_NIDT_NGUID_LEN) { 1339 dev_warn(ctrl->device, "%s %d for NVME_NIDT_NGUID\n", 1340 warn_str, cur->nidl); 1341 return -1; 1342 } 1343 if (ctrl->quirks & NVME_QUIRK_BOGUS_NID) 1344 return NVME_NIDT_NGUID_LEN; 1345 memcpy(ids->nguid, data + sizeof(*cur), NVME_NIDT_NGUID_LEN); 1346 return NVME_NIDT_NGUID_LEN; 1347 case NVME_NIDT_UUID: 1348 if (cur->nidl != NVME_NIDT_UUID_LEN) { 1349 dev_warn(ctrl->device, "%s %d for NVME_NIDT_UUID\n", 1350 warn_str, cur->nidl); 1351 return -1; 1352 } 1353 if (ctrl->quirks & NVME_QUIRK_BOGUS_NID) 1354 return NVME_NIDT_UUID_LEN; 1355 uuid_copy(&ids->uuid, data + sizeof(*cur)); 1356 return NVME_NIDT_UUID_LEN; 1357 case NVME_NIDT_CSI: 1358 if (cur->nidl != NVME_NIDT_CSI_LEN) { 1359 dev_warn(ctrl->device, "%s %d for NVME_NIDT_CSI\n", 1360 warn_str, cur->nidl); 1361 return -1; 1362 } 1363 memcpy(&ids->csi, data + sizeof(*cur), NVME_NIDT_CSI_LEN); 1364 *csi_seen = true; 1365 return NVME_NIDT_CSI_LEN; 1366 default: 1367 /* Skip unknown types */ 1368 return cur->nidl; 1369 } 1370 } 1371 1372 static int nvme_identify_ns_descs(struct nvme_ctrl *ctrl, 1373 struct nvme_ns_info *info) 1374 { 1375 struct nvme_command c = { }; 1376 bool csi_seen = false; 1377 int status, pos, len; 1378 void *data; 1379 1380 if (ctrl->vs < NVME_VS(1, 3, 0) && !nvme_multi_css(ctrl)) 1381 return 0; 1382 if (ctrl->quirks & NVME_QUIRK_NO_NS_DESC_LIST) 1383 return 0; 1384 1385 c.identify.opcode = nvme_admin_identify; 1386 c.identify.nsid = cpu_to_le32(info->nsid); 1387 c.identify.cns = NVME_ID_CNS_NS_DESC_LIST; 1388 1389 data = kzalloc(NVME_IDENTIFY_DATA_SIZE, GFP_KERNEL); 1390 if (!data) 1391 return -ENOMEM; 1392 1393 status = nvme_submit_sync_cmd(ctrl->admin_q, &c, data, 1394 NVME_IDENTIFY_DATA_SIZE); 1395 if (status) { 1396 dev_warn(ctrl->device, 1397 "Identify Descriptors failed (nsid=%u, status=0x%x)\n", 1398 info->nsid, status); 1399 goto free_data; 1400 } 1401 1402 for (pos = 0; pos < NVME_IDENTIFY_DATA_SIZE; pos += len) { 1403 struct nvme_ns_id_desc *cur = data + pos; 1404 1405 if (cur->nidl == 0) 1406 break; 1407 1408 len = nvme_process_ns_desc(ctrl, &info->ids, cur, &csi_seen); 1409 if (len < 0) 1410 break; 1411 1412 len += sizeof(*cur); 1413 } 1414 1415 if (nvme_multi_css(ctrl) && !csi_seen) { 1416 dev_warn(ctrl->device, "Command set not reported for nsid:%d\n", 1417 info->nsid); 1418 status = -EINVAL; 1419 } 1420 1421 free_data: 1422 kfree(data); 1423 return status; 1424 } 1425 1426 static int nvme_identify_ns(struct nvme_ctrl *ctrl, unsigned nsid, 1427 struct nvme_id_ns **id) 1428 { 1429 struct nvme_command c = { }; 1430 int error; 1431 1432 /* gcc-4.4.4 (at least) has issues with initializers and anon unions */ 1433 c.identify.opcode = nvme_admin_identify; 1434 c.identify.nsid = cpu_to_le32(nsid); 1435 c.identify.cns = NVME_ID_CNS_NS; 1436 1437 *id = kmalloc(sizeof(**id), GFP_KERNEL); 1438 if (!*id) 1439 return -ENOMEM; 1440 1441 error = nvme_submit_sync_cmd(ctrl->admin_q, &c, *id, sizeof(**id)); 1442 if (error) { 1443 dev_warn(ctrl->device, "Identify namespace failed (%d)\n", error); 1444 kfree(*id); 1445 *id = NULL; 1446 } 1447 return error; 1448 } 1449 1450 static int nvme_ns_info_from_identify(struct nvme_ctrl *ctrl, 1451 struct nvme_ns_info *info) 1452 { 1453 struct nvme_ns_ids *ids = &info->ids; 1454 struct nvme_id_ns *id; 1455 int ret; 1456 1457 ret = nvme_identify_ns(ctrl, info->nsid, &id); 1458 if (ret) 1459 return ret; 1460 1461 if (id->ncap == 0) { 1462 /* namespace not allocated or attached */ 1463 info->is_removed = true; 1464 ret = -ENODEV; 1465 goto error; 1466 } 1467 1468 info->anagrpid = id->anagrpid; 1469 info->is_shared = id->nmic & NVME_NS_NMIC_SHARED; 1470 info->is_readonly = id->nsattr & NVME_NS_ATTR_RO; 1471 info->is_ready = true; 1472 if (ctrl->quirks & NVME_QUIRK_BOGUS_NID) { 1473 dev_info(ctrl->device, 1474 "Ignoring bogus Namespace Identifiers\n"); 1475 } else { 1476 if (ctrl->vs >= NVME_VS(1, 1, 0) && 1477 !memchr_inv(ids->eui64, 0, sizeof(ids->eui64))) 1478 memcpy(ids->eui64, id->eui64, sizeof(ids->eui64)); 1479 if (ctrl->vs >= NVME_VS(1, 2, 0) && 1480 !memchr_inv(ids->nguid, 0, sizeof(ids->nguid))) 1481 memcpy(ids->nguid, id->nguid, sizeof(ids->nguid)); 1482 } 1483 1484 error: 1485 kfree(id); 1486 return ret; 1487 } 1488 1489 static int nvme_ns_info_from_id_cs_indep(struct nvme_ctrl *ctrl, 1490 struct nvme_ns_info *info) 1491 { 1492 struct nvme_id_ns_cs_indep *id; 1493 struct nvme_command c = { 1494 .identify.opcode = nvme_admin_identify, 1495 .identify.nsid = cpu_to_le32(info->nsid), 1496 .identify.cns = NVME_ID_CNS_NS_CS_INDEP, 1497 }; 1498 int ret; 1499 1500 id = kmalloc(sizeof(*id), GFP_KERNEL); 1501 if (!id) 1502 return -ENOMEM; 1503 1504 ret = nvme_submit_sync_cmd(ctrl->admin_q, &c, id, sizeof(*id)); 1505 if (!ret) { 1506 info->anagrpid = id->anagrpid; 1507 info->is_shared = id->nmic & NVME_NS_NMIC_SHARED; 1508 info->is_readonly = id->nsattr & NVME_NS_ATTR_RO; 1509 info->is_ready = id->nstat & NVME_NSTAT_NRDY; 1510 } 1511 kfree(id); 1512 return ret; 1513 } 1514 1515 static int nvme_features(struct nvme_ctrl *dev, u8 op, unsigned int fid, 1516 unsigned int dword11, void *buffer, size_t buflen, u32 *result) 1517 { 1518 union nvme_result res = { 0 }; 1519 struct nvme_command c = { }; 1520 int ret; 1521 1522 c.features.opcode = op; 1523 c.features.fid = cpu_to_le32(fid); 1524 c.features.dword11 = cpu_to_le32(dword11); 1525 1526 ret = __nvme_submit_sync_cmd(dev->admin_q, &c, &res, 1527 buffer, buflen, NVME_QID_ANY, 0, 0); 1528 if (ret >= 0 && result) 1529 *result = le32_to_cpu(res.u32); 1530 return ret; 1531 } 1532 1533 int nvme_set_features(struct nvme_ctrl *dev, unsigned int fid, 1534 unsigned int dword11, void *buffer, size_t buflen, 1535 u32 *result) 1536 { 1537 return nvme_features(dev, nvme_admin_set_features, fid, dword11, buffer, 1538 buflen, result); 1539 } 1540 EXPORT_SYMBOL_GPL(nvme_set_features); 1541 1542 int nvme_get_features(struct nvme_ctrl *dev, unsigned int fid, 1543 unsigned int dword11, void *buffer, size_t buflen, 1544 u32 *result) 1545 { 1546 return nvme_features(dev, nvme_admin_get_features, fid, dword11, buffer, 1547 buflen, result); 1548 } 1549 EXPORT_SYMBOL_GPL(nvme_get_features); 1550 1551 int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count) 1552 { 1553 u32 q_count = (*count - 1) | ((*count - 1) << 16); 1554 u32 result; 1555 int status, nr_io_queues; 1556 1557 status = nvme_set_features(ctrl, NVME_FEAT_NUM_QUEUES, q_count, NULL, 0, 1558 &result); 1559 if (status < 0) 1560 return status; 1561 1562 /* 1563 * Degraded controllers might return an error when setting the queue 1564 * count. We still want to be able to bring them online and offer 1565 * access to the admin queue, as that might be only way to fix them up. 1566 */ 1567 if (status > 0) { 1568 dev_err(ctrl->device, "Could not set queue count (%d)\n", status); 1569 *count = 0; 1570 } else { 1571 nr_io_queues = min(result & 0xffff, result >> 16) + 1; 1572 *count = min(*count, nr_io_queues); 1573 } 1574 1575 return 0; 1576 } 1577 EXPORT_SYMBOL_GPL(nvme_set_queue_count); 1578 1579 #define NVME_AEN_SUPPORTED \ 1580 (NVME_AEN_CFG_NS_ATTR | NVME_AEN_CFG_FW_ACT | \ 1581 NVME_AEN_CFG_ANA_CHANGE | NVME_AEN_CFG_DISC_CHANGE) 1582 1583 static void nvme_enable_aen(struct nvme_ctrl *ctrl) 1584 { 1585 u32 result, supported_aens = ctrl->oaes & NVME_AEN_SUPPORTED; 1586 int status; 1587 1588 if (!supported_aens) 1589 return; 1590 1591 status = nvme_set_features(ctrl, NVME_FEAT_ASYNC_EVENT, supported_aens, 1592 NULL, 0, &result); 1593 if (status) 1594 dev_warn(ctrl->device, "Failed to configure AEN (cfg %x)\n", 1595 supported_aens); 1596 1597 queue_work(nvme_wq, &ctrl->async_event_work); 1598 } 1599 1600 static int nvme_ns_open(struct nvme_ns *ns) 1601 { 1602 1603 /* should never be called due to GENHD_FL_HIDDEN */ 1604 if (WARN_ON_ONCE(nvme_ns_head_multipath(ns->head))) 1605 goto fail; 1606 if (!nvme_get_ns(ns)) 1607 goto fail; 1608 if (!try_module_get(ns->ctrl->ops->module)) 1609 goto fail_put_ns; 1610 1611 return 0; 1612 1613 fail_put_ns: 1614 nvme_put_ns(ns); 1615 fail: 1616 return -ENXIO; 1617 } 1618 1619 static void nvme_ns_release(struct nvme_ns *ns) 1620 { 1621 1622 module_put(ns->ctrl->ops->module); 1623 nvme_put_ns(ns); 1624 } 1625 1626 static int nvme_open(struct gendisk *disk, blk_mode_t mode) 1627 { 1628 return nvme_ns_open(disk->private_data); 1629 } 1630 1631 static void nvme_release(struct gendisk *disk) 1632 { 1633 nvme_ns_release(disk->private_data); 1634 } 1635 1636 int nvme_getgeo(struct block_device *bdev, struct hd_geometry *geo) 1637 { 1638 /* some standard values */ 1639 geo->heads = 1 << 6; 1640 geo->sectors = 1 << 5; 1641 geo->cylinders = get_capacity(bdev->bd_disk) >> 11; 1642 return 0; 1643 } 1644 1645 #ifdef CONFIG_BLK_DEV_INTEGRITY 1646 static void nvme_init_integrity(struct gendisk *disk, struct nvme_ns *ns, 1647 u32 max_integrity_segments) 1648 { 1649 struct blk_integrity integrity = { }; 1650 1651 switch (ns->pi_type) { 1652 case NVME_NS_DPS_PI_TYPE3: 1653 switch (ns->guard_type) { 1654 case NVME_NVM_NS_16B_GUARD: 1655 integrity.profile = &t10_pi_type3_crc; 1656 integrity.tag_size = sizeof(u16) + sizeof(u32); 1657 integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE; 1658 break; 1659 case NVME_NVM_NS_64B_GUARD: 1660 integrity.profile = &ext_pi_type3_crc64; 1661 integrity.tag_size = sizeof(u16) + 6; 1662 integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE; 1663 break; 1664 default: 1665 integrity.profile = NULL; 1666 break; 1667 } 1668 break; 1669 case NVME_NS_DPS_PI_TYPE1: 1670 case NVME_NS_DPS_PI_TYPE2: 1671 switch (ns->guard_type) { 1672 case NVME_NVM_NS_16B_GUARD: 1673 integrity.profile = &t10_pi_type1_crc; 1674 integrity.tag_size = sizeof(u16); 1675 integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE; 1676 break; 1677 case NVME_NVM_NS_64B_GUARD: 1678 integrity.profile = &ext_pi_type1_crc64; 1679 integrity.tag_size = sizeof(u16); 1680 integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE; 1681 break; 1682 default: 1683 integrity.profile = NULL; 1684 break; 1685 } 1686 break; 1687 default: 1688 integrity.profile = NULL; 1689 break; 1690 } 1691 1692 integrity.tuple_size = ns->ms; 1693 blk_integrity_register(disk, &integrity); 1694 blk_queue_max_integrity_segments(disk->queue, max_integrity_segments); 1695 } 1696 #else 1697 static void nvme_init_integrity(struct gendisk *disk, struct nvme_ns *ns, 1698 u32 max_integrity_segments) 1699 { 1700 } 1701 #endif /* CONFIG_BLK_DEV_INTEGRITY */ 1702 1703 static void nvme_config_discard(struct gendisk *disk, struct nvme_ns *ns) 1704 { 1705 struct nvme_ctrl *ctrl = ns->ctrl; 1706 struct request_queue *queue = disk->queue; 1707 u32 size = queue_logical_block_size(queue); 1708 1709 if (ctrl->dmrsl && ctrl->dmrsl <= nvme_sect_to_lba(ns, UINT_MAX)) 1710 ctrl->max_discard_sectors = nvme_lba_to_sect(ns, ctrl->dmrsl); 1711 1712 if (ctrl->max_discard_sectors == 0) { 1713 blk_queue_max_discard_sectors(queue, 0); 1714 return; 1715 } 1716 1717 BUILD_BUG_ON(PAGE_SIZE / sizeof(struct nvme_dsm_range) < 1718 NVME_DSM_MAX_RANGES); 1719 1720 queue->limits.discard_granularity = size; 1721 1722 /* If discard is already enabled, don't reset queue limits */ 1723 if (queue->limits.max_discard_sectors) 1724 return; 1725 1726 blk_queue_max_discard_sectors(queue, ctrl->max_discard_sectors); 1727 blk_queue_max_discard_segments(queue, ctrl->max_discard_segments); 1728 1729 if (ctrl->quirks & NVME_QUIRK_DEALLOCATE_ZEROES) 1730 blk_queue_max_write_zeroes_sectors(queue, UINT_MAX); 1731 } 1732 1733 static bool nvme_ns_ids_equal(struct nvme_ns_ids *a, struct nvme_ns_ids *b) 1734 { 1735 return uuid_equal(&a->uuid, &b->uuid) && 1736 memcmp(&a->nguid, &b->nguid, sizeof(a->nguid)) == 0 && 1737 memcmp(&a->eui64, &b->eui64, sizeof(a->eui64)) == 0 && 1738 a->csi == b->csi; 1739 } 1740 1741 static int nvme_init_ms(struct nvme_ns *ns, struct nvme_id_ns *id) 1742 { 1743 bool first = id->dps & NVME_NS_DPS_PI_FIRST; 1744 unsigned lbaf = nvme_lbaf_index(id->flbas); 1745 struct nvme_ctrl *ctrl = ns->ctrl; 1746 struct nvme_command c = { }; 1747 struct nvme_id_ns_nvm *nvm; 1748 int ret = 0; 1749 u32 elbaf; 1750 1751 ns->pi_size = 0; 1752 ns->ms = le16_to_cpu(id->lbaf[lbaf].ms); 1753 if (!(ctrl->ctratt & NVME_CTRL_ATTR_ELBAS)) { 1754 ns->pi_size = sizeof(struct t10_pi_tuple); 1755 ns->guard_type = NVME_NVM_NS_16B_GUARD; 1756 goto set_pi; 1757 } 1758 1759 nvm = kzalloc(sizeof(*nvm), GFP_KERNEL); 1760 if (!nvm) 1761 return -ENOMEM; 1762 1763 c.identify.opcode = nvme_admin_identify; 1764 c.identify.nsid = cpu_to_le32(ns->head->ns_id); 1765 c.identify.cns = NVME_ID_CNS_CS_NS; 1766 c.identify.csi = NVME_CSI_NVM; 1767 1768 ret = nvme_submit_sync_cmd(ns->ctrl->admin_q, &c, nvm, sizeof(*nvm)); 1769 if (ret) 1770 goto free_data; 1771 1772 elbaf = le32_to_cpu(nvm->elbaf[lbaf]); 1773 1774 /* no support for storage tag formats right now */ 1775 if (nvme_elbaf_sts(elbaf)) 1776 goto free_data; 1777 1778 ns->guard_type = nvme_elbaf_guard_type(elbaf); 1779 switch (ns->guard_type) { 1780 case NVME_NVM_NS_64B_GUARD: 1781 ns->pi_size = sizeof(struct crc64_pi_tuple); 1782 break; 1783 case NVME_NVM_NS_16B_GUARD: 1784 ns->pi_size = sizeof(struct t10_pi_tuple); 1785 break; 1786 default: 1787 break; 1788 } 1789 1790 free_data: 1791 kfree(nvm); 1792 set_pi: 1793 if (ns->pi_size && (first || ns->ms == ns->pi_size)) 1794 ns->pi_type = id->dps & NVME_NS_DPS_PI_MASK; 1795 else 1796 ns->pi_type = 0; 1797 1798 return ret; 1799 } 1800 1801 static int nvme_configure_metadata(struct nvme_ns *ns, struct nvme_id_ns *id) 1802 { 1803 struct nvme_ctrl *ctrl = ns->ctrl; 1804 int ret; 1805 1806 ret = nvme_init_ms(ns, id); 1807 if (ret) 1808 return ret; 1809 1810 ns->features &= ~(NVME_NS_METADATA_SUPPORTED | NVME_NS_EXT_LBAS); 1811 if (!ns->ms || !(ctrl->ops->flags & NVME_F_METADATA_SUPPORTED)) 1812 return 0; 1813 1814 if (ctrl->ops->flags & NVME_F_FABRICS) { 1815 /* 1816 * The NVMe over Fabrics specification only supports metadata as 1817 * part of the extended data LBA. We rely on HCA/HBA support to 1818 * remap the separate metadata buffer from the block layer. 1819 */ 1820 if (WARN_ON_ONCE(!(id->flbas & NVME_NS_FLBAS_META_EXT))) 1821 return 0; 1822 1823 ns->features |= NVME_NS_EXT_LBAS; 1824 1825 /* 1826 * The current fabrics transport drivers support namespace 1827 * metadata formats only if nvme_ns_has_pi() returns true. 1828 * Suppress support for all other formats so the namespace will 1829 * have a 0 capacity and not be usable through the block stack. 1830 * 1831 * Note, this check will need to be modified if any drivers 1832 * gain the ability to use other metadata formats. 1833 */ 1834 if (ctrl->max_integrity_segments && nvme_ns_has_pi(ns)) 1835 ns->features |= NVME_NS_METADATA_SUPPORTED; 1836 } else { 1837 /* 1838 * For PCIe controllers, we can't easily remap the separate 1839 * metadata buffer from the block layer and thus require a 1840 * separate metadata buffer for block layer metadata/PI support. 1841 * We allow extended LBAs for the passthrough interface, though. 1842 */ 1843 if (id->flbas & NVME_NS_FLBAS_META_EXT) 1844 ns->features |= NVME_NS_EXT_LBAS; 1845 else 1846 ns->features |= NVME_NS_METADATA_SUPPORTED; 1847 } 1848 return 0; 1849 } 1850 1851 static void nvme_set_queue_limits(struct nvme_ctrl *ctrl, 1852 struct request_queue *q) 1853 { 1854 bool vwc = ctrl->vwc & NVME_CTRL_VWC_PRESENT; 1855 1856 if (ctrl->max_hw_sectors) { 1857 u32 max_segments = 1858 (ctrl->max_hw_sectors / (NVME_CTRL_PAGE_SIZE >> 9)) + 1; 1859 1860 max_segments = min_not_zero(max_segments, ctrl->max_segments); 1861 blk_queue_max_hw_sectors(q, ctrl->max_hw_sectors); 1862 blk_queue_max_segments(q, min_t(u32, max_segments, USHRT_MAX)); 1863 } 1864 blk_queue_virt_boundary(q, NVME_CTRL_PAGE_SIZE - 1); 1865 blk_queue_dma_alignment(q, 3); 1866 blk_queue_write_cache(q, vwc, vwc); 1867 } 1868 1869 static void nvme_update_disk_info(struct gendisk *disk, 1870 struct nvme_ns *ns, struct nvme_id_ns *id) 1871 { 1872 sector_t capacity = nvme_lba_to_sect(ns, le64_to_cpu(id->nsze)); 1873 u32 bs = 1U << ns->lba_shift; 1874 u32 atomic_bs, phys_bs, io_opt = 0; 1875 1876 /* 1877 * The block layer can't support LBA sizes larger than the page size 1878 * or smaller than a sector size yet, so catch this early and don't 1879 * allow block I/O. 1880 */ 1881 if (ns->lba_shift > PAGE_SHIFT || ns->lba_shift < SECTOR_SHIFT) { 1882 capacity = 0; 1883 bs = (1 << 9); 1884 } 1885 1886 blk_integrity_unregister(disk); 1887 1888 atomic_bs = phys_bs = bs; 1889 if (id->nabo == 0) { 1890 /* 1891 * Bit 1 indicates whether NAWUPF is defined for this namespace 1892 * and whether it should be used instead of AWUPF. If NAWUPF == 1893 * 0 then AWUPF must be used instead. 1894 */ 1895 if (id->nsfeat & NVME_NS_FEAT_ATOMICS && id->nawupf) 1896 atomic_bs = (1 + le16_to_cpu(id->nawupf)) * bs; 1897 else 1898 atomic_bs = (1 + ns->ctrl->subsys->awupf) * bs; 1899 } 1900 1901 if (id->nsfeat & NVME_NS_FEAT_IO_OPT) { 1902 /* NPWG = Namespace Preferred Write Granularity */ 1903 phys_bs = bs * (1 + le16_to_cpu(id->npwg)); 1904 /* NOWS = Namespace Optimal Write Size */ 1905 io_opt = bs * (1 + le16_to_cpu(id->nows)); 1906 } 1907 1908 blk_queue_logical_block_size(disk->queue, bs); 1909 /* 1910 * Linux filesystems assume writing a single physical block is 1911 * an atomic operation. Hence limit the physical block size to the 1912 * value of the Atomic Write Unit Power Fail parameter. 1913 */ 1914 blk_queue_physical_block_size(disk->queue, min(phys_bs, atomic_bs)); 1915 blk_queue_io_min(disk->queue, phys_bs); 1916 blk_queue_io_opt(disk->queue, io_opt); 1917 1918 /* 1919 * Register a metadata profile for PI, or the plain non-integrity NVMe 1920 * metadata masquerading as Type 0 if supported, otherwise reject block 1921 * I/O to namespaces with metadata except when the namespace supports 1922 * PI, as it can strip/insert in that case. 1923 */ 1924 if (ns->ms) { 1925 if (IS_ENABLED(CONFIG_BLK_DEV_INTEGRITY) && 1926 (ns->features & NVME_NS_METADATA_SUPPORTED)) 1927 nvme_init_integrity(disk, ns, 1928 ns->ctrl->max_integrity_segments); 1929 else if (!nvme_ns_has_pi(ns)) 1930 capacity = 0; 1931 } 1932 1933 set_capacity_and_notify(disk, capacity); 1934 1935 nvme_config_discard(disk, ns); 1936 blk_queue_max_write_zeroes_sectors(disk->queue, 1937 ns->ctrl->max_zeroes_sectors); 1938 } 1939 1940 static bool nvme_ns_is_readonly(struct nvme_ns *ns, struct nvme_ns_info *info) 1941 { 1942 return info->is_readonly || test_bit(NVME_NS_FORCE_RO, &ns->flags); 1943 } 1944 1945 static inline bool nvme_first_scan(struct gendisk *disk) 1946 { 1947 /* nvme_alloc_ns() scans the disk prior to adding it */ 1948 return !disk_live(disk); 1949 } 1950 1951 static void nvme_set_chunk_sectors(struct nvme_ns *ns, struct nvme_id_ns *id) 1952 { 1953 struct nvme_ctrl *ctrl = ns->ctrl; 1954 u32 iob; 1955 1956 if ((ctrl->quirks & NVME_QUIRK_STRIPE_SIZE) && 1957 is_power_of_2(ctrl->max_hw_sectors)) 1958 iob = ctrl->max_hw_sectors; 1959 else 1960 iob = nvme_lba_to_sect(ns, le16_to_cpu(id->noiob)); 1961 1962 if (!iob) 1963 return; 1964 1965 if (!is_power_of_2(iob)) { 1966 if (nvme_first_scan(ns->disk)) 1967 pr_warn("%s: ignoring unaligned IO boundary:%u\n", 1968 ns->disk->disk_name, iob); 1969 return; 1970 } 1971 1972 if (blk_queue_is_zoned(ns->disk->queue)) { 1973 if (nvme_first_scan(ns->disk)) 1974 pr_warn("%s: ignoring zoned namespace IO boundary\n", 1975 ns->disk->disk_name); 1976 return; 1977 } 1978 1979 blk_queue_chunk_sectors(ns->queue, iob); 1980 } 1981 1982 static int nvme_update_ns_info_generic(struct nvme_ns *ns, 1983 struct nvme_ns_info *info) 1984 { 1985 blk_mq_freeze_queue(ns->disk->queue); 1986 nvme_set_queue_limits(ns->ctrl, ns->queue); 1987 set_disk_ro(ns->disk, nvme_ns_is_readonly(ns, info)); 1988 blk_mq_unfreeze_queue(ns->disk->queue); 1989 1990 if (nvme_ns_head_multipath(ns->head)) { 1991 blk_mq_freeze_queue(ns->head->disk->queue); 1992 set_disk_ro(ns->head->disk, nvme_ns_is_readonly(ns, info)); 1993 nvme_mpath_revalidate_paths(ns); 1994 blk_stack_limits(&ns->head->disk->queue->limits, 1995 &ns->queue->limits, 0); 1996 ns->head->disk->flags |= GENHD_FL_HIDDEN; 1997 blk_mq_unfreeze_queue(ns->head->disk->queue); 1998 } 1999 2000 /* Hide the block-interface for these devices */ 2001 ns->disk->flags |= GENHD_FL_HIDDEN; 2002 set_bit(NVME_NS_READY, &ns->flags); 2003 2004 return 0; 2005 } 2006 2007 static int nvme_update_ns_info_block(struct nvme_ns *ns, 2008 struct nvme_ns_info *info) 2009 { 2010 struct nvme_id_ns *id; 2011 unsigned lbaf; 2012 int ret; 2013 2014 ret = nvme_identify_ns(ns->ctrl, info->nsid, &id); 2015 if (ret) 2016 return ret; 2017 2018 if (id->ncap == 0) { 2019 /* namespace not allocated or attached */ 2020 info->is_removed = true; 2021 ret = -ENODEV; 2022 goto error; 2023 } 2024 2025 blk_mq_freeze_queue(ns->disk->queue); 2026 lbaf = nvme_lbaf_index(id->flbas); 2027 ns->lba_shift = id->lbaf[lbaf].ds; 2028 nvme_set_queue_limits(ns->ctrl, ns->queue); 2029 2030 ret = nvme_configure_metadata(ns, id); 2031 if (ret < 0) { 2032 blk_mq_unfreeze_queue(ns->disk->queue); 2033 goto out; 2034 } 2035 nvme_set_chunk_sectors(ns, id); 2036 nvme_update_disk_info(ns->disk, ns, id); 2037 2038 if (ns->head->ids.csi == NVME_CSI_ZNS) { 2039 ret = nvme_update_zone_info(ns, lbaf); 2040 if (ret) { 2041 blk_mq_unfreeze_queue(ns->disk->queue); 2042 goto out; 2043 } 2044 } 2045 2046 /* 2047 * Only set the DEAC bit if the device guarantees that reads from 2048 * deallocated data return zeroes. While the DEAC bit does not 2049 * require that, it must be a no-op if reads from deallocated data 2050 * do not return zeroes. 2051 */ 2052 if ((id->dlfeat & 0x7) == 0x1 && (id->dlfeat & (1 << 3))) 2053 ns->features |= NVME_NS_DEAC; 2054 set_disk_ro(ns->disk, nvme_ns_is_readonly(ns, info)); 2055 set_bit(NVME_NS_READY, &ns->flags); 2056 blk_mq_unfreeze_queue(ns->disk->queue); 2057 2058 if (blk_queue_is_zoned(ns->queue)) { 2059 ret = nvme_revalidate_zones(ns); 2060 if (ret && !nvme_first_scan(ns->disk)) 2061 goto out; 2062 } 2063 2064 if (nvme_ns_head_multipath(ns->head)) { 2065 blk_mq_freeze_queue(ns->head->disk->queue); 2066 nvme_update_disk_info(ns->head->disk, ns, id); 2067 set_disk_ro(ns->head->disk, nvme_ns_is_readonly(ns, info)); 2068 nvme_mpath_revalidate_paths(ns); 2069 blk_stack_limits(&ns->head->disk->queue->limits, 2070 &ns->queue->limits, 0); 2071 disk_update_readahead(ns->head->disk); 2072 blk_mq_unfreeze_queue(ns->head->disk->queue); 2073 } 2074 2075 ret = 0; 2076 out: 2077 /* 2078 * If probing fails due an unsupported feature, hide the block device, 2079 * but still allow other access. 2080 */ 2081 if (ret == -ENODEV) { 2082 ns->disk->flags |= GENHD_FL_HIDDEN; 2083 set_bit(NVME_NS_READY, &ns->flags); 2084 ret = 0; 2085 } 2086 2087 error: 2088 kfree(id); 2089 return ret; 2090 } 2091 2092 static int nvme_update_ns_info(struct nvme_ns *ns, struct nvme_ns_info *info) 2093 { 2094 switch (info->ids.csi) { 2095 case NVME_CSI_ZNS: 2096 if (!IS_ENABLED(CONFIG_BLK_DEV_ZONED)) { 2097 dev_info(ns->ctrl->device, 2098 "block device for nsid %u not supported without CONFIG_BLK_DEV_ZONED\n", 2099 info->nsid); 2100 return nvme_update_ns_info_generic(ns, info); 2101 } 2102 return nvme_update_ns_info_block(ns, info); 2103 case NVME_CSI_NVM: 2104 return nvme_update_ns_info_block(ns, info); 2105 default: 2106 dev_info(ns->ctrl->device, 2107 "block device for nsid %u not supported (csi %u)\n", 2108 info->nsid, info->ids.csi); 2109 return nvme_update_ns_info_generic(ns, info); 2110 } 2111 } 2112 2113 #ifdef CONFIG_BLK_SED_OPAL 2114 static int nvme_sec_submit(void *data, u16 spsp, u8 secp, void *buffer, size_t len, 2115 bool send) 2116 { 2117 struct nvme_ctrl *ctrl = data; 2118 struct nvme_command cmd = { }; 2119 2120 if (send) 2121 cmd.common.opcode = nvme_admin_security_send; 2122 else 2123 cmd.common.opcode = nvme_admin_security_recv; 2124 cmd.common.nsid = 0; 2125 cmd.common.cdw10 = cpu_to_le32(((u32)secp) << 24 | ((u32)spsp) << 8); 2126 cmd.common.cdw11 = cpu_to_le32(len); 2127 2128 return __nvme_submit_sync_cmd(ctrl->admin_q, &cmd, NULL, buffer, len, 2129 NVME_QID_ANY, 1, 0); 2130 } 2131 2132 static void nvme_configure_opal(struct nvme_ctrl *ctrl, bool was_suspended) 2133 { 2134 if (ctrl->oacs & NVME_CTRL_OACS_SEC_SUPP) { 2135 if (!ctrl->opal_dev) 2136 ctrl->opal_dev = init_opal_dev(ctrl, &nvme_sec_submit); 2137 else if (was_suspended) 2138 opal_unlock_from_suspend(ctrl->opal_dev); 2139 } else { 2140 free_opal_dev(ctrl->opal_dev); 2141 ctrl->opal_dev = NULL; 2142 } 2143 } 2144 #else 2145 static void nvme_configure_opal(struct nvme_ctrl *ctrl, bool was_suspended) 2146 { 2147 } 2148 #endif /* CONFIG_BLK_SED_OPAL */ 2149 2150 #ifdef CONFIG_BLK_DEV_ZONED 2151 static int nvme_report_zones(struct gendisk *disk, sector_t sector, 2152 unsigned int nr_zones, report_zones_cb cb, void *data) 2153 { 2154 return nvme_ns_report_zones(disk->private_data, sector, nr_zones, cb, 2155 data); 2156 } 2157 #else 2158 #define nvme_report_zones NULL 2159 #endif /* CONFIG_BLK_DEV_ZONED */ 2160 2161 const struct block_device_operations nvme_bdev_ops = { 2162 .owner = THIS_MODULE, 2163 .ioctl = nvme_ioctl, 2164 .compat_ioctl = blkdev_compat_ptr_ioctl, 2165 .open = nvme_open, 2166 .release = nvme_release, 2167 .getgeo = nvme_getgeo, 2168 .report_zones = nvme_report_zones, 2169 .pr_ops = &nvme_pr_ops, 2170 }; 2171 2172 static int nvme_wait_ready(struct nvme_ctrl *ctrl, u32 mask, u32 val, 2173 u32 timeout, const char *op) 2174 { 2175 unsigned long timeout_jiffies = jiffies + timeout * HZ; 2176 u32 csts; 2177 int ret; 2178 2179 while ((ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts)) == 0) { 2180 if (csts == ~0) 2181 return -ENODEV; 2182 if ((csts & mask) == val) 2183 break; 2184 2185 usleep_range(1000, 2000); 2186 if (fatal_signal_pending(current)) 2187 return -EINTR; 2188 if (time_after(jiffies, timeout_jiffies)) { 2189 dev_err(ctrl->device, 2190 "Device not ready; aborting %s, CSTS=0x%x\n", 2191 op, csts); 2192 return -ENODEV; 2193 } 2194 } 2195 2196 return ret; 2197 } 2198 2199 int nvme_disable_ctrl(struct nvme_ctrl *ctrl, bool shutdown) 2200 { 2201 int ret; 2202 2203 ctrl->ctrl_config &= ~NVME_CC_SHN_MASK; 2204 if (shutdown) 2205 ctrl->ctrl_config |= NVME_CC_SHN_NORMAL; 2206 else 2207 ctrl->ctrl_config &= ~NVME_CC_ENABLE; 2208 2209 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config); 2210 if (ret) 2211 return ret; 2212 2213 if (shutdown) { 2214 return nvme_wait_ready(ctrl, NVME_CSTS_SHST_MASK, 2215 NVME_CSTS_SHST_CMPLT, 2216 ctrl->shutdown_timeout, "shutdown"); 2217 } 2218 if (ctrl->quirks & NVME_QUIRK_DELAY_BEFORE_CHK_RDY) 2219 msleep(NVME_QUIRK_DELAY_AMOUNT); 2220 return nvme_wait_ready(ctrl, NVME_CSTS_RDY, 0, 2221 (NVME_CAP_TIMEOUT(ctrl->cap) + 1) / 2, "reset"); 2222 } 2223 EXPORT_SYMBOL_GPL(nvme_disable_ctrl); 2224 2225 int nvme_enable_ctrl(struct nvme_ctrl *ctrl) 2226 { 2227 unsigned dev_page_min; 2228 u32 timeout; 2229 int ret; 2230 2231 ret = ctrl->ops->reg_read64(ctrl, NVME_REG_CAP, &ctrl->cap); 2232 if (ret) { 2233 dev_err(ctrl->device, "Reading CAP failed (%d)\n", ret); 2234 return ret; 2235 } 2236 dev_page_min = NVME_CAP_MPSMIN(ctrl->cap) + 12; 2237 2238 if (NVME_CTRL_PAGE_SHIFT < dev_page_min) { 2239 dev_err(ctrl->device, 2240 "Minimum device page size %u too large for host (%u)\n", 2241 1 << dev_page_min, 1 << NVME_CTRL_PAGE_SHIFT); 2242 return -ENODEV; 2243 } 2244 2245 if (NVME_CAP_CSS(ctrl->cap) & NVME_CAP_CSS_CSI) 2246 ctrl->ctrl_config = NVME_CC_CSS_CSI; 2247 else 2248 ctrl->ctrl_config = NVME_CC_CSS_NVM; 2249 2250 /* 2251 * Setting CRIME results in CSTS.RDY before the media is ready. This 2252 * makes it possible for media related commands to return the error 2253 * NVME_SC_ADMIN_COMMAND_MEDIA_NOT_READY. Until the driver is 2254 * restructured to handle retries, disable CC.CRIME. 2255 */ 2256 ctrl->ctrl_config &= ~NVME_CC_CRIME; 2257 2258 ctrl->ctrl_config |= (NVME_CTRL_PAGE_SHIFT - 12) << NVME_CC_MPS_SHIFT; 2259 ctrl->ctrl_config |= NVME_CC_AMS_RR | NVME_CC_SHN_NONE; 2260 ctrl->ctrl_config |= NVME_CC_IOSQES | NVME_CC_IOCQES; 2261 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config); 2262 if (ret) 2263 return ret; 2264 2265 /* Flush write to device (required if transport is PCI) */ 2266 ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CC, &ctrl->ctrl_config); 2267 if (ret) 2268 return ret; 2269 2270 /* CAP value may change after initial CC write */ 2271 ret = ctrl->ops->reg_read64(ctrl, NVME_REG_CAP, &ctrl->cap); 2272 if (ret) 2273 return ret; 2274 2275 timeout = NVME_CAP_TIMEOUT(ctrl->cap); 2276 if (ctrl->cap & NVME_CAP_CRMS_CRWMS) { 2277 u32 crto, ready_timeout; 2278 2279 ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CRTO, &crto); 2280 if (ret) { 2281 dev_err(ctrl->device, "Reading CRTO failed (%d)\n", 2282 ret); 2283 return ret; 2284 } 2285 2286 /* 2287 * CRTO should always be greater or equal to CAP.TO, but some 2288 * devices are known to get this wrong. Use the larger of the 2289 * two values. 2290 */ 2291 ready_timeout = NVME_CRTO_CRWMT(crto); 2292 2293 if (ready_timeout < timeout) 2294 dev_warn_once(ctrl->device, "bad crto:%x cap:%llx\n", 2295 crto, ctrl->cap); 2296 else 2297 timeout = ready_timeout; 2298 } 2299 2300 ctrl->ctrl_config |= NVME_CC_ENABLE; 2301 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config); 2302 if (ret) 2303 return ret; 2304 return nvme_wait_ready(ctrl, NVME_CSTS_RDY, NVME_CSTS_RDY, 2305 (timeout + 1) / 2, "initialisation"); 2306 } 2307 EXPORT_SYMBOL_GPL(nvme_enable_ctrl); 2308 2309 static int nvme_configure_timestamp(struct nvme_ctrl *ctrl) 2310 { 2311 __le64 ts; 2312 int ret; 2313 2314 if (!(ctrl->oncs & NVME_CTRL_ONCS_TIMESTAMP)) 2315 return 0; 2316 2317 ts = cpu_to_le64(ktime_to_ms(ktime_get_real())); 2318 ret = nvme_set_features(ctrl, NVME_FEAT_TIMESTAMP, 0, &ts, sizeof(ts), 2319 NULL); 2320 if (ret) 2321 dev_warn_once(ctrl->device, 2322 "could not set timestamp (%d)\n", ret); 2323 return ret; 2324 } 2325 2326 static int nvme_configure_host_options(struct nvme_ctrl *ctrl) 2327 { 2328 struct nvme_feat_host_behavior *host; 2329 u8 acre = 0, lbafee = 0; 2330 int ret; 2331 2332 /* Don't bother enabling the feature if retry delay is not reported */ 2333 if (ctrl->crdt[0]) 2334 acre = NVME_ENABLE_ACRE; 2335 if (ctrl->ctratt & NVME_CTRL_ATTR_ELBAS) 2336 lbafee = NVME_ENABLE_LBAFEE; 2337 2338 if (!acre && !lbafee) 2339 return 0; 2340 2341 host = kzalloc(sizeof(*host), GFP_KERNEL); 2342 if (!host) 2343 return 0; 2344 2345 host->acre = acre; 2346 host->lbafee = lbafee; 2347 ret = nvme_set_features(ctrl, NVME_FEAT_HOST_BEHAVIOR, 0, 2348 host, sizeof(*host), NULL); 2349 kfree(host); 2350 return ret; 2351 } 2352 2353 /* 2354 * The function checks whether the given total (exlat + enlat) latency of 2355 * a power state allows the latter to be used as an APST transition target. 2356 * It does so by comparing the latency to the primary and secondary latency 2357 * tolerances defined by module params. If there's a match, the corresponding 2358 * timeout value is returned and the matching tolerance index (1 or 2) is 2359 * reported. 2360 */ 2361 static bool nvme_apst_get_transition_time(u64 total_latency, 2362 u64 *transition_time, unsigned *last_index) 2363 { 2364 if (total_latency <= apst_primary_latency_tol_us) { 2365 if (*last_index == 1) 2366 return false; 2367 *last_index = 1; 2368 *transition_time = apst_primary_timeout_ms; 2369 return true; 2370 } 2371 if (apst_secondary_timeout_ms && 2372 total_latency <= apst_secondary_latency_tol_us) { 2373 if (*last_index <= 2) 2374 return false; 2375 *last_index = 2; 2376 *transition_time = apst_secondary_timeout_ms; 2377 return true; 2378 } 2379 return false; 2380 } 2381 2382 /* 2383 * APST (Autonomous Power State Transition) lets us program a table of power 2384 * state transitions that the controller will perform automatically. 2385 * 2386 * Depending on module params, one of the two supported techniques will be used: 2387 * 2388 * - If the parameters provide explicit timeouts and tolerances, they will be 2389 * used to build a table with up to 2 non-operational states to transition to. 2390 * The default parameter values were selected based on the values used by 2391 * Microsoft's and Intel's NVMe drivers. Yet, since we don't implement dynamic 2392 * regeneration of the APST table in the event of switching between external 2393 * and battery power, the timeouts and tolerances reflect a compromise 2394 * between values used by Microsoft for AC and battery scenarios. 2395 * - If not, we'll configure the table with a simple heuristic: we are willing 2396 * to spend at most 2% of the time transitioning between power states. 2397 * Therefore, when running in any given state, we will enter the next 2398 * lower-power non-operational state after waiting 50 * (enlat + exlat) 2399 * microseconds, as long as that state's exit latency is under the requested 2400 * maximum latency. 2401 * 2402 * We will not autonomously enter any non-operational state for which the total 2403 * latency exceeds ps_max_latency_us. 2404 * 2405 * Users can set ps_max_latency_us to zero to turn off APST. 2406 */ 2407 static int nvme_configure_apst(struct nvme_ctrl *ctrl) 2408 { 2409 struct nvme_feat_auto_pst *table; 2410 unsigned apste = 0; 2411 u64 max_lat_us = 0; 2412 __le64 target = 0; 2413 int max_ps = -1; 2414 int state; 2415 int ret; 2416 unsigned last_lt_index = UINT_MAX; 2417 2418 /* 2419 * If APST isn't supported or if we haven't been initialized yet, 2420 * then don't do anything. 2421 */ 2422 if (!ctrl->apsta) 2423 return 0; 2424 2425 if (ctrl->npss > 31) { 2426 dev_warn(ctrl->device, "NPSS is invalid; not using APST\n"); 2427 return 0; 2428 } 2429 2430 table = kzalloc(sizeof(*table), GFP_KERNEL); 2431 if (!table) 2432 return 0; 2433 2434 if (!ctrl->apst_enabled || ctrl->ps_max_latency_us == 0) { 2435 /* Turn off APST. */ 2436 dev_dbg(ctrl->device, "APST disabled\n"); 2437 goto done; 2438 } 2439 2440 /* 2441 * Walk through all states from lowest- to highest-power. 2442 * According to the spec, lower-numbered states use more power. NPSS, 2443 * despite the name, is the index of the lowest-power state, not the 2444 * number of states. 2445 */ 2446 for (state = (int)ctrl->npss; state >= 0; state--) { 2447 u64 total_latency_us, exit_latency_us, transition_ms; 2448 2449 if (target) 2450 table->entries[state] = target; 2451 2452 /* 2453 * Don't allow transitions to the deepest state if it's quirked 2454 * off. 2455 */ 2456 if (state == ctrl->npss && 2457 (ctrl->quirks & NVME_QUIRK_NO_DEEPEST_PS)) 2458 continue; 2459 2460 /* 2461 * Is this state a useful non-operational state for higher-power 2462 * states to autonomously transition to? 2463 */ 2464 if (!(ctrl->psd[state].flags & NVME_PS_FLAGS_NON_OP_STATE)) 2465 continue; 2466 2467 exit_latency_us = (u64)le32_to_cpu(ctrl->psd[state].exit_lat); 2468 if (exit_latency_us > ctrl->ps_max_latency_us) 2469 continue; 2470 2471 total_latency_us = exit_latency_us + 2472 le32_to_cpu(ctrl->psd[state].entry_lat); 2473 2474 /* 2475 * This state is good. It can be used as the APST idle target 2476 * for higher power states. 2477 */ 2478 if (apst_primary_timeout_ms && apst_primary_latency_tol_us) { 2479 if (!nvme_apst_get_transition_time(total_latency_us, 2480 &transition_ms, &last_lt_index)) 2481 continue; 2482 } else { 2483 transition_ms = total_latency_us + 19; 2484 do_div(transition_ms, 20); 2485 if (transition_ms > (1 << 24) - 1) 2486 transition_ms = (1 << 24) - 1; 2487 } 2488 2489 target = cpu_to_le64((state << 3) | (transition_ms << 8)); 2490 if (max_ps == -1) 2491 max_ps = state; 2492 if (total_latency_us > max_lat_us) 2493 max_lat_us = total_latency_us; 2494 } 2495 2496 if (max_ps == -1) 2497 dev_dbg(ctrl->device, "APST enabled but no non-operational states are available\n"); 2498 else 2499 dev_dbg(ctrl->device, "APST enabled: max PS = %d, max round-trip latency = %lluus, table = %*phN\n", 2500 max_ps, max_lat_us, (int)sizeof(*table), table); 2501 apste = 1; 2502 2503 done: 2504 ret = nvme_set_features(ctrl, NVME_FEAT_AUTO_PST, apste, 2505 table, sizeof(*table), NULL); 2506 if (ret) 2507 dev_err(ctrl->device, "failed to set APST feature (%d)\n", ret); 2508 kfree(table); 2509 return ret; 2510 } 2511 2512 static void nvme_set_latency_tolerance(struct device *dev, s32 val) 2513 { 2514 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 2515 u64 latency; 2516 2517 switch (val) { 2518 case PM_QOS_LATENCY_TOLERANCE_NO_CONSTRAINT: 2519 case PM_QOS_LATENCY_ANY: 2520 latency = U64_MAX; 2521 break; 2522 2523 default: 2524 latency = val; 2525 } 2526 2527 if (ctrl->ps_max_latency_us != latency) { 2528 ctrl->ps_max_latency_us = latency; 2529 if (nvme_ctrl_state(ctrl) == NVME_CTRL_LIVE) 2530 nvme_configure_apst(ctrl); 2531 } 2532 } 2533 2534 struct nvme_core_quirk_entry { 2535 /* 2536 * NVMe model and firmware strings are padded with spaces. For 2537 * simplicity, strings in the quirk table are padded with NULLs 2538 * instead. 2539 */ 2540 u16 vid; 2541 const char *mn; 2542 const char *fr; 2543 unsigned long quirks; 2544 }; 2545 2546 static const struct nvme_core_quirk_entry core_quirks[] = { 2547 { 2548 /* 2549 * This Toshiba device seems to die using any APST states. See: 2550 * https://bugs.launchpad.net/ubuntu/+source/linux/+bug/1678184/comments/11 2551 */ 2552 .vid = 0x1179, 2553 .mn = "THNSF5256GPUK TOSHIBA", 2554 .quirks = NVME_QUIRK_NO_APST, 2555 }, 2556 { 2557 /* 2558 * This LiteON CL1-3D*-Q11 firmware version has a race 2559 * condition associated with actions related to suspend to idle 2560 * LiteON has resolved the problem in future firmware 2561 */ 2562 .vid = 0x14a4, 2563 .fr = "22301111", 2564 .quirks = NVME_QUIRK_SIMPLE_SUSPEND, 2565 }, 2566 { 2567 /* 2568 * This Kioxia CD6-V Series / HPE PE8030 device times out and 2569 * aborts I/O during any load, but more easily reproducible 2570 * with discards (fstrim). 2571 * 2572 * The device is left in a state where it is also not possible 2573 * to use "nvme set-feature" to disable APST, but booting with 2574 * nvme_core.default_ps_max_latency=0 works. 2575 */ 2576 .vid = 0x1e0f, 2577 .mn = "KCD6XVUL6T40", 2578 .quirks = NVME_QUIRK_NO_APST, 2579 }, 2580 { 2581 /* 2582 * The external Samsung X5 SSD fails initialization without a 2583 * delay before checking if it is ready and has a whole set of 2584 * other problems. To make this even more interesting, it 2585 * shares the PCI ID with internal Samsung 970 Evo Plus that 2586 * does not need or want these quirks. 2587 */ 2588 .vid = 0x144d, 2589 .mn = "Samsung Portable SSD X5", 2590 .quirks = NVME_QUIRK_DELAY_BEFORE_CHK_RDY | 2591 NVME_QUIRK_NO_DEEPEST_PS | 2592 NVME_QUIRK_IGNORE_DEV_SUBNQN, 2593 } 2594 }; 2595 2596 /* match is null-terminated but idstr is space-padded. */ 2597 static bool string_matches(const char *idstr, const char *match, size_t len) 2598 { 2599 size_t matchlen; 2600 2601 if (!match) 2602 return true; 2603 2604 matchlen = strlen(match); 2605 WARN_ON_ONCE(matchlen > len); 2606 2607 if (memcmp(idstr, match, matchlen)) 2608 return false; 2609 2610 for (; matchlen < len; matchlen++) 2611 if (idstr[matchlen] != ' ') 2612 return false; 2613 2614 return true; 2615 } 2616 2617 static bool quirk_matches(const struct nvme_id_ctrl *id, 2618 const struct nvme_core_quirk_entry *q) 2619 { 2620 return q->vid == le16_to_cpu(id->vid) && 2621 string_matches(id->mn, q->mn, sizeof(id->mn)) && 2622 string_matches(id->fr, q->fr, sizeof(id->fr)); 2623 } 2624 2625 static void nvme_init_subnqn(struct nvme_subsystem *subsys, struct nvme_ctrl *ctrl, 2626 struct nvme_id_ctrl *id) 2627 { 2628 size_t nqnlen; 2629 int off; 2630 2631 if(!(ctrl->quirks & NVME_QUIRK_IGNORE_DEV_SUBNQN)) { 2632 nqnlen = strnlen(id->subnqn, NVMF_NQN_SIZE); 2633 if (nqnlen > 0 && nqnlen < NVMF_NQN_SIZE) { 2634 strscpy(subsys->subnqn, id->subnqn, NVMF_NQN_SIZE); 2635 return; 2636 } 2637 2638 if (ctrl->vs >= NVME_VS(1, 2, 1)) 2639 dev_warn(ctrl->device, "missing or invalid SUBNQN field.\n"); 2640 } 2641 2642 /* 2643 * Generate a "fake" NQN similar to the one in Section 4.5 of the NVMe 2644 * Base Specification 2.0. It is slightly different from the format 2645 * specified there due to historic reasons, and we can't change it now. 2646 */ 2647 off = snprintf(subsys->subnqn, NVMF_NQN_SIZE, 2648 "nqn.2014.08.org.nvmexpress:%04x%04x", 2649 le16_to_cpu(id->vid), le16_to_cpu(id->ssvid)); 2650 memcpy(subsys->subnqn + off, id->sn, sizeof(id->sn)); 2651 off += sizeof(id->sn); 2652 memcpy(subsys->subnqn + off, id->mn, sizeof(id->mn)); 2653 off += sizeof(id->mn); 2654 memset(subsys->subnqn + off, 0, sizeof(subsys->subnqn) - off); 2655 } 2656 2657 static void nvme_release_subsystem(struct device *dev) 2658 { 2659 struct nvme_subsystem *subsys = 2660 container_of(dev, struct nvme_subsystem, dev); 2661 2662 if (subsys->instance >= 0) 2663 ida_free(&nvme_instance_ida, subsys->instance); 2664 kfree(subsys); 2665 } 2666 2667 static void nvme_destroy_subsystem(struct kref *ref) 2668 { 2669 struct nvme_subsystem *subsys = 2670 container_of(ref, struct nvme_subsystem, ref); 2671 2672 mutex_lock(&nvme_subsystems_lock); 2673 list_del(&subsys->entry); 2674 mutex_unlock(&nvme_subsystems_lock); 2675 2676 ida_destroy(&subsys->ns_ida); 2677 device_del(&subsys->dev); 2678 put_device(&subsys->dev); 2679 } 2680 2681 static void nvme_put_subsystem(struct nvme_subsystem *subsys) 2682 { 2683 kref_put(&subsys->ref, nvme_destroy_subsystem); 2684 } 2685 2686 static struct nvme_subsystem *__nvme_find_get_subsystem(const char *subsysnqn) 2687 { 2688 struct nvme_subsystem *subsys; 2689 2690 lockdep_assert_held(&nvme_subsystems_lock); 2691 2692 /* 2693 * Fail matches for discovery subsystems. This results 2694 * in each discovery controller bound to a unique subsystem. 2695 * This avoids issues with validating controller values 2696 * that can only be true when there is a single unique subsystem. 2697 * There may be multiple and completely independent entities 2698 * that provide discovery controllers. 2699 */ 2700 if (!strcmp(subsysnqn, NVME_DISC_SUBSYS_NAME)) 2701 return NULL; 2702 2703 list_for_each_entry(subsys, &nvme_subsystems, entry) { 2704 if (strcmp(subsys->subnqn, subsysnqn)) 2705 continue; 2706 if (!kref_get_unless_zero(&subsys->ref)) 2707 continue; 2708 return subsys; 2709 } 2710 2711 return NULL; 2712 } 2713 2714 static inline bool nvme_discovery_ctrl(struct nvme_ctrl *ctrl) 2715 { 2716 return ctrl->opts && ctrl->opts->discovery_nqn; 2717 } 2718 2719 static bool nvme_validate_cntlid(struct nvme_subsystem *subsys, 2720 struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id) 2721 { 2722 struct nvme_ctrl *tmp; 2723 2724 lockdep_assert_held(&nvme_subsystems_lock); 2725 2726 list_for_each_entry(tmp, &subsys->ctrls, subsys_entry) { 2727 if (nvme_state_terminal(tmp)) 2728 continue; 2729 2730 if (tmp->cntlid == ctrl->cntlid) { 2731 dev_err(ctrl->device, 2732 "Duplicate cntlid %u with %s, subsys %s, rejecting\n", 2733 ctrl->cntlid, dev_name(tmp->device), 2734 subsys->subnqn); 2735 return false; 2736 } 2737 2738 if ((id->cmic & NVME_CTRL_CMIC_MULTI_CTRL) || 2739 nvme_discovery_ctrl(ctrl)) 2740 continue; 2741 2742 dev_err(ctrl->device, 2743 "Subsystem does not support multiple controllers\n"); 2744 return false; 2745 } 2746 2747 return true; 2748 } 2749 2750 static int nvme_init_subsystem(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id) 2751 { 2752 struct nvme_subsystem *subsys, *found; 2753 int ret; 2754 2755 subsys = kzalloc(sizeof(*subsys), GFP_KERNEL); 2756 if (!subsys) 2757 return -ENOMEM; 2758 2759 subsys->instance = -1; 2760 mutex_init(&subsys->lock); 2761 kref_init(&subsys->ref); 2762 INIT_LIST_HEAD(&subsys->ctrls); 2763 INIT_LIST_HEAD(&subsys->nsheads); 2764 nvme_init_subnqn(subsys, ctrl, id); 2765 memcpy(subsys->serial, id->sn, sizeof(subsys->serial)); 2766 memcpy(subsys->model, id->mn, sizeof(subsys->model)); 2767 subsys->vendor_id = le16_to_cpu(id->vid); 2768 subsys->cmic = id->cmic; 2769 2770 /* Versions prior to 1.4 don't necessarily report a valid type */ 2771 if (id->cntrltype == NVME_CTRL_DISC || 2772 !strcmp(subsys->subnqn, NVME_DISC_SUBSYS_NAME)) 2773 subsys->subtype = NVME_NQN_DISC; 2774 else 2775 subsys->subtype = NVME_NQN_NVME; 2776 2777 if (nvme_discovery_ctrl(ctrl) && subsys->subtype != NVME_NQN_DISC) { 2778 dev_err(ctrl->device, 2779 "Subsystem %s is not a discovery controller", 2780 subsys->subnqn); 2781 kfree(subsys); 2782 return -EINVAL; 2783 } 2784 subsys->awupf = le16_to_cpu(id->awupf); 2785 nvme_mpath_default_iopolicy(subsys); 2786 2787 subsys->dev.class = nvme_subsys_class; 2788 subsys->dev.release = nvme_release_subsystem; 2789 subsys->dev.groups = nvme_subsys_attrs_groups; 2790 dev_set_name(&subsys->dev, "nvme-subsys%d", ctrl->instance); 2791 device_initialize(&subsys->dev); 2792 2793 mutex_lock(&nvme_subsystems_lock); 2794 found = __nvme_find_get_subsystem(subsys->subnqn); 2795 if (found) { 2796 put_device(&subsys->dev); 2797 subsys = found; 2798 2799 if (!nvme_validate_cntlid(subsys, ctrl, id)) { 2800 ret = -EINVAL; 2801 goto out_put_subsystem; 2802 } 2803 } else { 2804 ret = device_add(&subsys->dev); 2805 if (ret) { 2806 dev_err(ctrl->device, 2807 "failed to register subsystem device.\n"); 2808 put_device(&subsys->dev); 2809 goto out_unlock; 2810 } 2811 ida_init(&subsys->ns_ida); 2812 list_add_tail(&subsys->entry, &nvme_subsystems); 2813 } 2814 2815 ret = sysfs_create_link(&subsys->dev.kobj, &ctrl->device->kobj, 2816 dev_name(ctrl->device)); 2817 if (ret) { 2818 dev_err(ctrl->device, 2819 "failed to create sysfs link from subsystem.\n"); 2820 goto out_put_subsystem; 2821 } 2822 2823 if (!found) 2824 subsys->instance = ctrl->instance; 2825 ctrl->subsys = subsys; 2826 list_add_tail(&ctrl->subsys_entry, &subsys->ctrls); 2827 mutex_unlock(&nvme_subsystems_lock); 2828 return 0; 2829 2830 out_put_subsystem: 2831 nvme_put_subsystem(subsys); 2832 out_unlock: 2833 mutex_unlock(&nvme_subsystems_lock); 2834 return ret; 2835 } 2836 2837 int nvme_get_log(struct nvme_ctrl *ctrl, u32 nsid, u8 log_page, u8 lsp, u8 csi, 2838 void *log, size_t size, u64 offset) 2839 { 2840 struct nvme_command c = { }; 2841 u32 dwlen = nvme_bytes_to_numd(size); 2842 2843 c.get_log_page.opcode = nvme_admin_get_log_page; 2844 c.get_log_page.nsid = cpu_to_le32(nsid); 2845 c.get_log_page.lid = log_page; 2846 c.get_log_page.lsp = lsp; 2847 c.get_log_page.numdl = cpu_to_le16(dwlen & ((1 << 16) - 1)); 2848 c.get_log_page.numdu = cpu_to_le16(dwlen >> 16); 2849 c.get_log_page.lpol = cpu_to_le32(lower_32_bits(offset)); 2850 c.get_log_page.lpou = cpu_to_le32(upper_32_bits(offset)); 2851 c.get_log_page.csi = csi; 2852 2853 return nvme_submit_sync_cmd(ctrl->admin_q, &c, log, size); 2854 } 2855 2856 static int nvme_get_effects_log(struct nvme_ctrl *ctrl, u8 csi, 2857 struct nvme_effects_log **log) 2858 { 2859 struct nvme_effects_log *cel = xa_load(&ctrl->cels, csi); 2860 int ret; 2861 2862 if (cel) 2863 goto out; 2864 2865 cel = kzalloc(sizeof(*cel), GFP_KERNEL); 2866 if (!cel) 2867 return -ENOMEM; 2868 2869 ret = nvme_get_log(ctrl, 0x00, NVME_LOG_CMD_EFFECTS, 0, csi, 2870 cel, sizeof(*cel), 0); 2871 if (ret) { 2872 kfree(cel); 2873 return ret; 2874 } 2875 2876 xa_store(&ctrl->cels, csi, cel, GFP_KERNEL); 2877 out: 2878 *log = cel; 2879 return 0; 2880 } 2881 2882 static inline u32 nvme_mps_to_sectors(struct nvme_ctrl *ctrl, u32 units) 2883 { 2884 u32 page_shift = NVME_CAP_MPSMIN(ctrl->cap) + 12, val; 2885 2886 if (check_shl_overflow(1U, units + page_shift - 9, &val)) 2887 return UINT_MAX; 2888 return val; 2889 } 2890 2891 static int nvme_init_non_mdts_limits(struct nvme_ctrl *ctrl) 2892 { 2893 struct nvme_command c = { }; 2894 struct nvme_id_ctrl_nvm *id; 2895 int ret; 2896 2897 if (ctrl->oncs & NVME_CTRL_ONCS_DSM) { 2898 ctrl->max_discard_sectors = UINT_MAX; 2899 ctrl->max_discard_segments = NVME_DSM_MAX_RANGES; 2900 } else { 2901 ctrl->max_discard_sectors = 0; 2902 ctrl->max_discard_segments = 0; 2903 } 2904 2905 /* 2906 * Even though NVMe spec explicitly states that MDTS is not applicable 2907 * to the write-zeroes, we are cautious and limit the size to the 2908 * controllers max_hw_sectors value, which is based on the MDTS field 2909 * and possibly other limiting factors. 2910 */ 2911 if ((ctrl->oncs & NVME_CTRL_ONCS_WRITE_ZEROES) && 2912 !(ctrl->quirks & NVME_QUIRK_DISABLE_WRITE_ZEROES)) 2913 ctrl->max_zeroes_sectors = ctrl->max_hw_sectors; 2914 else 2915 ctrl->max_zeroes_sectors = 0; 2916 2917 if (ctrl->subsys->subtype != NVME_NQN_NVME || 2918 nvme_ctrl_limited_cns(ctrl) || 2919 test_bit(NVME_CTRL_SKIP_ID_CNS_CS, &ctrl->flags)) 2920 return 0; 2921 2922 id = kzalloc(sizeof(*id), GFP_KERNEL); 2923 if (!id) 2924 return -ENOMEM; 2925 2926 c.identify.opcode = nvme_admin_identify; 2927 c.identify.cns = NVME_ID_CNS_CS_CTRL; 2928 c.identify.csi = NVME_CSI_NVM; 2929 2930 ret = nvme_submit_sync_cmd(ctrl->admin_q, &c, id, sizeof(*id)); 2931 if (ret) 2932 goto free_data; 2933 2934 if (id->dmrl) 2935 ctrl->max_discard_segments = id->dmrl; 2936 ctrl->dmrsl = le32_to_cpu(id->dmrsl); 2937 if (id->wzsl) 2938 ctrl->max_zeroes_sectors = nvme_mps_to_sectors(ctrl, id->wzsl); 2939 2940 free_data: 2941 if (ret > 0) 2942 set_bit(NVME_CTRL_SKIP_ID_CNS_CS, &ctrl->flags); 2943 kfree(id); 2944 return ret; 2945 } 2946 2947 static void nvme_init_known_nvm_effects(struct nvme_ctrl *ctrl) 2948 { 2949 struct nvme_effects_log *log = ctrl->effects; 2950 2951 log->acs[nvme_admin_format_nvm] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC | 2952 NVME_CMD_EFFECTS_NCC | 2953 NVME_CMD_EFFECTS_CSE_MASK); 2954 log->acs[nvme_admin_sanitize_nvm] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC | 2955 NVME_CMD_EFFECTS_CSE_MASK); 2956 2957 /* 2958 * The spec says the result of a security receive command depends on 2959 * the previous security send command. As such, many vendors log this 2960 * command as one to submitted only when no other commands to the same 2961 * namespace are outstanding. The intention is to tell the host to 2962 * prevent mixing security send and receive. 2963 * 2964 * This driver can only enforce such exclusive access against IO 2965 * queues, though. We are not readily able to enforce such a rule for 2966 * two commands to the admin queue, which is the only queue that 2967 * matters for this command. 2968 * 2969 * Rather than blindly freezing the IO queues for this effect that 2970 * doesn't even apply to IO, mask it off. 2971 */ 2972 log->acs[nvme_admin_security_recv] &= cpu_to_le32(~NVME_CMD_EFFECTS_CSE_MASK); 2973 2974 log->iocs[nvme_cmd_write] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC); 2975 log->iocs[nvme_cmd_write_zeroes] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC); 2976 log->iocs[nvme_cmd_write_uncor] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC); 2977 } 2978 2979 static int nvme_init_effects(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id) 2980 { 2981 int ret = 0; 2982 2983 if (ctrl->effects) 2984 return 0; 2985 2986 if (id->lpa & NVME_CTRL_LPA_CMD_EFFECTS_LOG) { 2987 ret = nvme_get_effects_log(ctrl, NVME_CSI_NVM, &ctrl->effects); 2988 if (ret < 0) 2989 return ret; 2990 } 2991 2992 if (!ctrl->effects) { 2993 ctrl->effects = kzalloc(sizeof(*ctrl->effects), GFP_KERNEL); 2994 if (!ctrl->effects) 2995 return -ENOMEM; 2996 xa_store(&ctrl->cels, NVME_CSI_NVM, ctrl->effects, GFP_KERNEL); 2997 } 2998 2999 nvme_init_known_nvm_effects(ctrl); 3000 return 0; 3001 } 3002 3003 static int nvme_init_identify(struct nvme_ctrl *ctrl) 3004 { 3005 struct nvme_id_ctrl *id; 3006 u32 max_hw_sectors; 3007 bool prev_apst_enabled; 3008 int ret; 3009 3010 ret = nvme_identify_ctrl(ctrl, &id); 3011 if (ret) { 3012 dev_err(ctrl->device, "Identify Controller failed (%d)\n", ret); 3013 return -EIO; 3014 } 3015 3016 if (!(ctrl->ops->flags & NVME_F_FABRICS)) 3017 ctrl->cntlid = le16_to_cpu(id->cntlid); 3018 3019 if (!ctrl->identified) { 3020 unsigned int i; 3021 3022 /* 3023 * Check for quirks. Quirk can depend on firmware version, 3024 * so, in principle, the set of quirks present can change 3025 * across a reset. As a possible future enhancement, we 3026 * could re-scan for quirks every time we reinitialize 3027 * the device, but we'd have to make sure that the driver 3028 * behaves intelligently if the quirks change. 3029 */ 3030 for (i = 0; i < ARRAY_SIZE(core_quirks); i++) { 3031 if (quirk_matches(id, &core_quirks[i])) 3032 ctrl->quirks |= core_quirks[i].quirks; 3033 } 3034 3035 ret = nvme_init_subsystem(ctrl, id); 3036 if (ret) 3037 goto out_free; 3038 3039 ret = nvme_init_effects(ctrl, id); 3040 if (ret) 3041 goto out_free; 3042 } 3043 memcpy(ctrl->subsys->firmware_rev, id->fr, 3044 sizeof(ctrl->subsys->firmware_rev)); 3045 3046 if (force_apst && (ctrl->quirks & NVME_QUIRK_NO_DEEPEST_PS)) { 3047 dev_warn(ctrl->device, "forcibly allowing all power states due to nvme_core.force_apst -- use at your own risk\n"); 3048 ctrl->quirks &= ~NVME_QUIRK_NO_DEEPEST_PS; 3049 } 3050 3051 ctrl->crdt[0] = le16_to_cpu(id->crdt1); 3052 ctrl->crdt[1] = le16_to_cpu(id->crdt2); 3053 ctrl->crdt[2] = le16_to_cpu(id->crdt3); 3054 3055 ctrl->oacs = le16_to_cpu(id->oacs); 3056 ctrl->oncs = le16_to_cpu(id->oncs); 3057 ctrl->mtfa = le16_to_cpu(id->mtfa); 3058 ctrl->oaes = le32_to_cpu(id->oaes); 3059 ctrl->wctemp = le16_to_cpu(id->wctemp); 3060 ctrl->cctemp = le16_to_cpu(id->cctemp); 3061 3062 atomic_set(&ctrl->abort_limit, id->acl + 1); 3063 ctrl->vwc = id->vwc; 3064 if (id->mdts) 3065 max_hw_sectors = nvme_mps_to_sectors(ctrl, id->mdts); 3066 else 3067 max_hw_sectors = UINT_MAX; 3068 ctrl->max_hw_sectors = 3069 min_not_zero(ctrl->max_hw_sectors, max_hw_sectors); 3070 3071 nvme_set_queue_limits(ctrl, ctrl->admin_q); 3072 ctrl->sgls = le32_to_cpu(id->sgls); 3073 ctrl->kas = le16_to_cpu(id->kas); 3074 ctrl->max_namespaces = le32_to_cpu(id->mnan); 3075 ctrl->ctratt = le32_to_cpu(id->ctratt); 3076 3077 ctrl->cntrltype = id->cntrltype; 3078 ctrl->dctype = id->dctype; 3079 3080 if (id->rtd3e) { 3081 /* us -> s */ 3082 u32 transition_time = le32_to_cpu(id->rtd3e) / USEC_PER_SEC; 3083 3084 ctrl->shutdown_timeout = clamp_t(unsigned int, transition_time, 3085 shutdown_timeout, 60); 3086 3087 if (ctrl->shutdown_timeout != shutdown_timeout) 3088 dev_info(ctrl->device, 3089 "Shutdown timeout set to %u seconds\n", 3090 ctrl->shutdown_timeout); 3091 } else 3092 ctrl->shutdown_timeout = shutdown_timeout; 3093 3094 ctrl->npss = id->npss; 3095 ctrl->apsta = id->apsta; 3096 prev_apst_enabled = ctrl->apst_enabled; 3097 if (ctrl->quirks & NVME_QUIRK_NO_APST) { 3098 if (force_apst && id->apsta) { 3099 dev_warn(ctrl->device, "forcibly allowing APST due to nvme_core.force_apst -- use at your own risk\n"); 3100 ctrl->apst_enabled = true; 3101 } else { 3102 ctrl->apst_enabled = false; 3103 } 3104 } else { 3105 ctrl->apst_enabled = id->apsta; 3106 } 3107 memcpy(ctrl->psd, id->psd, sizeof(ctrl->psd)); 3108 3109 if (ctrl->ops->flags & NVME_F_FABRICS) { 3110 ctrl->icdoff = le16_to_cpu(id->icdoff); 3111 ctrl->ioccsz = le32_to_cpu(id->ioccsz); 3112 ctrl->iorcsz = le32_to_cpu(id->iorcsz); 3113 ctrl->maxcmd = le16_to_cpu(id->maxcmd); 3114 3115 /* 3116 * In fabrics we need to verify the cntlid matches the 3117 * admin connect 3118 */ 3119 if (ctrl->cntlid != le16_to_cpu(id->cntlid)) { 3120 dev_err(ctrl->device, 3121 "Mismatching cntlid: Connect %u vs Identify " 3122 "%u, rejecting\n", 3123 ctrl->cntlid, le16_to_cpu(id->cntlid)); 3124 ret = -EINVAL; 3125 goto out_free; 3126 } 3127 3128 if (!nvme_discovery_ctrl(ctrl) && !ctrl->kas) { 3129 dev_err(ctrl->device, 3130 "keep-alive support is mandatory for fabrics\n"); 3131 ret = -EINVAL; 3132 goto out_free; 3133 } 3134 } else { 3135 ctrl->hmpre = le32_to_cpu(id->hmpre); 3136 ctrl->hmmin = le32_to_cpu(id->hmmin); 3137 ctrl->hmminds = le32_to_cpu(id->hmminds); 3138 ctrl->hmmaxd = le16_to_cpu(id->hmmaxd); 3139 } 3140 3141 ret = nvme_mpath_init_identify(ctrl, id); 3142 if (ret < 0) 3143 goto out_free; 3144 3145 if (ctrl->apst_enabled && !prev_apst_enabled) 3146 dev_pm_qos_expose_latency_tolerance(ctrl->device); 3147 else if (!ctrl->apst_enabled && prev_apst_enabled) 3148 dev_pm_qos_hide_latency_tolerance(ctrl->device); 3149 3150 out_free: 3151 kfree(id); 3152 return ret; 3153 } 3154 3155 /* 3156 * Initialize the cached copies of the Identify data and various controller 3157 * register in our nvme_ctrl structure. This should be called as soon as 3158 * the admin queue is fully up and running. 3159 */ 3160 int nvme_init_ctrl_finish(struct nvme_ctrl *ctrl, bool was_suspended) 3161 { 3162 int ret; 3163 3164 ret = ctrl->ops->reg_read32(ctrl, NVME_REG_VS, &ctrl->vs); 3165 if (ret) { 3166 dev_err(ctrl->device, "Reading VS failed (%d)\n", ret); 3167 return ret; 3168 } 3169 3170 ctrl->sqsize = min_t(u16, NVME_CAP_MQES(ctrl->cap), ctrl->sqsize); 3171 3172 if (ctrl->vs >= NVME_VS(1, 1, 0)) 3173 ctrl->subsystem = NVME_CAP_NSSRC(ctrl->cap); 3174 3175 ret = nvme_init_identify(ctrl); 3176 if (ret) 3177 return ret; 3178 3179 ret = nvme_configure_apst(ctrl); 3180 if (ret < 0) 3181 return ret; 3182 3183 ret = nvme_configure_timestamp(ctrl); 3184 if (ret < 0) 3185 return ret; 3186 3187 ret = nvme_configure_host_options(ctrl); 3188 if (ret < 0) 3189 return ret; 3190 3191 nvme_configure_opal(ctrl, was_suspended); 3192 3193 if (!ctrl->identified && !nvme_discovery_ctrl(ctrl)) { 3194 /* 3195 * Do not return errors unless we are in a controller reset, 3196 * the controller works perfectly fine without hwmon. 3197 */ 3198 ret = nvme_hwmon_init(ctrl); 3199 if (ret == -EINTR) 3200 return ret; 3201 } 3202 3203 clear_bit(NVME_CTRL_DIRTY_CAPABILITY, &ctrl->flags); 3204 ctrl->identified = true; 3205 3206 return 0; 3207 } 3208 EXPORT_SYMBOL_GPL(nvme_init_ctrl_finish); 3209 3210 static int nvme_dev_open(struct inode *inode, struct file *file) 3211 { 3212 struct nvme_ctrl *ctrl = 3213 container_of(inode->i_cdev, struct nvme_ctrl, cdev); 3214 3215 switch (nvme_ctrl_state(ctrl)) { 3216 case NVME_CTRL_LIVE: 3217 break; 3218 default: 3219 return -EWOULDBLOCK; 3220 } 3221 3222 nvme_get_ctrl(ctrl); 3223 if (!try_module_get(ctrl->ops->module)) { 3224 nvme_put_ctrl(ctrl); 3225 return -EINVAL; 3226 } 3227 3228 file->private_data = ctrl; 3229 return 0; 3230 } 3231 3232 static int nvme_dev_release(struct inode *inode, struct file *file) 3233 { 3234 struct nvme_ctrl *ctrl = 3235 container_of(inode->i_cdev, struct nvme_ctrl, cdev); 3236 3237 module_put(ctrl->ops->module); 3238 nvme_put_ctrl(ctrl); 3239 return 0; 3240 } 3241 3242 static const struct file_operations nvme_dev_fops = { 3243 .owner = THIS_MODULE, 3244 .open = nvme_dev_open, 3245 .release = nvme_dev_release, 3246 .unlocked_ioctl = nvme_dev_ioctl, 3247 .compat_ioctl = compat_ptr_ioctl, 3248 .uring_cmd = nvme_dev_uring_cmd, 3249 }; 3250 3251 static struct nvme_ns_head *nvme_find_ns_head(struct nvme_ctrl *ctrl, 3252 unsigned nsid) 3253 { 3254 struct nvme_ns_head *h; 3255 3256 lockdep_assert_held(&ctrl->subsys->lock); 3257 3258 list_for_each_entry(h, &ctrl->subsys->nsheads, entry) { 3259 /* 3260 * Private namespaces can share NSIDs under some conditions. 3261 * In that case we can't use the same ns_head for namespaces 3262 * with the same NSID. 3263 */ 3264 if (h->ns_id != nsid || !nvme_is_unique_nsid(ctrl, h)) 3265 continue; 3266 if (!list_empty(&h->list) && nvme_tryget_ns_head(h)) 3267 return h; 3268 } 3269 3270 return NULL; 3271 } 3272 3273 static int nvme_subsys_check_duplicate_ids(struct nvme_subsystem *subsys, 3274 struct nvme_ns_ids *ids) 3275 { 3276 bool has_uuid = !uuid_is_null(&ids->uuid); 3277 bool has_nguid = memchr_inv(ids->nguid, 0, sizeof(ids->nguid)); 3278 bool has_eui64 = memchr_inv(ids->eui64, 0, sizeof(ids->eui64)); 3279 struct nvme_ns_head *h; 3280 3281 lockdep_assert_held(&subsys->lock); 3282 3283 list_for_each_entry(h, &subsys->nsheads, entry) { 3284 if (has_uuid && uuid_equal(&ids->uuid, &h->ids.uuid)) 3285 return -EINVAL; 3286 if (has_nguid && 3287 memcmp(&ids->nguid, &h->ids.nguid, sizeof(ids->nguid)) == 0) 3288 return -EINVAL; 3289 if (has_eui64 && 3290 memcmp(&ids->eui64, &h->ids.eui64, sizeof(ids->eui64)) == 0) 3291 return -EINVAL; 3292 } 3293 3294 return 0; 3295 } 3296 3297 static void nvme_cdev_rel(struct device *dev) 3298 { 3299 ida_free(&nvme_ns_chr_minor_ida, MINOR(dev->devt)); 3300 } 3301 3302 void nvme_cdev_del(struct cdev *cdev, struct device *cdev_device) 3303 { 3304 cdev_device_del(cdev, cdev_device); 3305 put_device(cdev_device); 3306 } 3307 3308 int nvme_cdev_add(struct cdev *cdev, struct device *cdev_device, 3309 const struct file_operations *fops, struct module *owner) 3310 { 3311 int minor, ret; 3312 3313 minor = ida_alloc(&nvme_ns_chr_minor_ida, GFP_KERNEL); 3314 if (minor < 0) 3315 return minor; 3316 cdev_device->devt = MKDEV(MAJOR(nvme_ns_chr_devt), minor); 3317 cdev_device->class = nvme_ns_chr_class; 3318 cdev_device->release = nvme_cdev_rel; 3319 device_initialize(cdev_device); 3320 cdev_init(cdev, fops); 3321 cdev->owner = owner; 3322 ret = cdev_device_add(cdev, cdev_device); 3323 if (ret) 3324 put_device(cdev_device); 3325 3326 return ret; 3327 } 3328 3329 static int nvme_ns_chr_open(struct inode *inode, struct file *file) 3330 { 3331 return nvme_ns_open(container_of(inode->i_cdev, struct nvme_ns, cdev)); 3332 } 3333 3334 static int nvme_ns_chr_release(struct inode *inode, struct file *file) 3335 { 3336 nvme_ns_release(container_of(inode->i_cdev, struct nvme_ns, cdev)); 3337 return 0; 3338 } 3339 3340 static const struct file_operations nvme_ns_chr_fops = { 3341 .owner = THIS_MODULE, 3342 .open = nvme_ns_chr_open, 3343 .release = nvme_ns_chr_release, 3344 .unlocked_ioctl = nvme_ns_chr_ioctl, 3345 .compat_ioctl = compat_ptr_ioctl, 3346 .uring_cmd = nvme_ns_chr_uring_cmd, 3347 .uring_cmd_iopoll = nvme_ns_chr_uring_cmd_iopoll, 3348 }; 3349 3350 static int nvme_add_ns_cdev(struct nvme_ns *ns) 3351 { 3352 int ret; 3353 3354 ns->cdev_device.parent = ns->ctrl->device; 3355 ret = dev_set_name(&ns->cdev_device, "ng%dn%d", 3356 ns->ctrl->instance, ns->head->instance); 3357 if (ret) 3358 return ret; 3359 3360 return nvme_cdev_add(&ns->cdev, &ns->cdev_device, &nvme_ns_chr_fops, 3361 ns->ctrl->ops->module); 3362 } 3363 3364 static struct nvme_ns_head *nvme_alloc_ns_head(struct nvme_ctrl *ctrl, 3365 struct nvme_ns_info *info) 3366 { 3367 struct nvme_ns_head *head; 3368 size_t size = sizeof(*head); 3369 int ret = -ENOMEM; 3370 3371 #ifdef CONFIG_NVME_MULTIPATH 3372 size += num_possible_nodes() * sizeof(struct nvme_ns *); 3373 #endif 3374 3375 head = kzalloc(size, GFP_KERNEL); 3376 if (!head) 3377 goto out; 3378 ret = ida_alloc_min(&ctrl->subsys->ns_ida, 1, GFP_KERNEL); 3379 if (ret < 0) 3380 goto out_free_head; 3381 head->instance = ret; 3382 INIT_LIST_HEAD(&head->list); 3383 ret = init_srcu_struct(&head->srcu); 3384 if (ret) 3385 goto out_ida_remove; 3386 head->subsys = ctrl->subsys; 3387 head->ns_id = info->nsid; 3388 head->ids = info->ids; 3389 head->shared = info->is_shared; 3390 kref_init(&head->ref); 3391 3392 if (head->ids.csi) { 3393 ret = nvme_get_effects_log(ctrl, head->ids.csi, &head->effects); 3394 if (ret) 3395 goto out_cleanup_srcu; 3396 } else 3397 head->effects = ctrl->effects; 3398 3399 ret = nvme_mpath_alloc_disk(ctrl, head); 3400 if (ret) 3401 goto out_cleanup_srcu; 3402 3403 list_add_tail(&head->entry, &ctrl->subsys->nsheads); 3404 3405 kref_get(&ctrl->subsys->ref); 3406 3407 return head; 3408 out_cleanup_srcu: 3409 cleanup_srcu_struct(&head->srcu); 3410 out_ida_remove: 3411 ida_free(&ctrl->subsys->ns_ida, head->instance); 3412 out_free_head: 3413 kfree(head); 3414 out: 3415 if (ret > 0) 3416 ret = blk_status_to_errno(nvme_error_status(ret)); 3417 return ERR_PTR(ret); 3418 } 3419 3420 static int nvme_global_check_duplicate_ids(struct nvme_subsystem *this, 3421 struct nvme_ns_ids *ids) 3422 { 3423 struct nvme_subsystem *s; 3424 int ret = 0; 3425 3426 /* 3427 * Note that this check is racy as we try to avoid holding the global 3428 * lock over the whole ns_head creation. But it is only intended as 3429 * a sanity check anyway. 3430 */ 3431 mutex_lock(&nvme_subsystems_lock); 3432 list_for_each_entry(s, &nvme_subsystems, entry) { 3433 if (s == this) 3434 continue; 3435 mutex_lock(&s->lock); 3436 ret = nvme_subsys_check_duplicate_ids(s, ids); 3437 mutex_unlock(&s->lock); 3438 if (ret) 3439 break; 3440 } 3441 mutex_unlock(&nvme_subsystems_lock); 3442 3443 return ret; 3444 } 3445 3446 static int nvme_init_ns_head(struct nvme_ns *ns, struct nvme_ns_info *info) 3447 { 3448 struct nvme_ctrl *ctrl = ns->ctrl; 3449 struct nvme_ns_head *head = NULL; 3450 int ret; 3451 3452 ret = nvme_global_check_duplicate_ids(ctrl->subsys, &info->ids); 3453 if (ret) { 3454 /* 3455 * We've found two different namespaces on two different 3456 * subsystems that report the same ID. This is pretty nasty 3457 * for anything that actually requires unique device 3458 * identification. In the kernel we need this for multipathing, 3459 * and in user space the /dev/disk/by-id/ links rely on it. 3460 * 3461 * If the device also claims to be multi-path capable back off 3462 * here now and refuse the probe the second device as this is a 3463 * recipe for data corruption. If not this is probably a 3464 * cheap consumer device if on the PCIe bus, so let the user 3465 * proceed and use the shiny toy, but warn that with changing 3466 * probing order (which due to our async probing could just be 3467 * device taking longer to startup) the other device could show 3468 * up at any time. 3469 */ 3470 nvme_print_device_info(ctrl); 3471 if ((ns->ctrl->ops->flags & NVME_F_FABRICS) || /* !PCIe */ 3472 ((ns->ctrl->subsys->cmic & NVME_CTRL_CMIC_MULTI_CTRL) && 3473 info->is_shared)) { 3474 dev_err(ctrl->device, 3475 "ignoring nsid %d because of duplicate IDs\n", 3476 info->nsid); 3477 return ret; 3478 } 3479 3480 dev_err(ctrl->device, 3481 "clearing duplicate IDs for nsid %d\n", info->nsid); 3482 dev_err(ctrl->device, 3483 "use of /dev/disk/by-id/ may cause data corruption\n"); 3484 memset(&info->ids.nguid, 0, sizeof(info->ids.nguid)); 3485 memset(&info->ids.uuid, 0, sizeof(info->ids.uuid)); 3486 memset(&info->ids.eui64, 0, sizeof(info->ids.eui64)); 3487 ctrl->quirks |= NVME_QUIRK_BOGUS_NID; 3488 } 3489 3490 mutex_lock(&ctrl->subsys->lock); 3491 head = nvme_find_ns_head(ctrl, info->nsid); 3492 if (!head) { 3493 ret = nvme_subsys_check_duplicate_ids(ctrl->subsys, &info->ids); 3494 if (ret) { 3495 dev_err(ctrl->device, 3496 "duplicate IDs in subsystem for nsid %d\n", 3497 info->nsid); 3498 goto out_unlock; 3499 } 3500 head = nvme_alloc_ns_head(ctrl, info); 3501 if (IS_ERR(head)) { 3502 ret = PTR_ERR(head); 3503 goto out_unlock; 3504 } 3505 } else { 3506 ret = -EINVAL; 3507 if (!info->is_shared || !head->shared) { 3508 dev_err(ctrl->device, 3509 "Duplicate unshared namespace %d\n", 3510 info->nsid); 3511 goto out_put_ns_head; 3512 } 3513 if (!nvme_ns_ids_equal(&head->ids, &info->ids)) { 3514 dev_err(ctrl->device, 3515 "IDs don't match for shared namespace %d\n", 3516 info->nsid); 3517 goto out_put_ns_head; 3518 } 3519 3520 if (!multipath) { 3521 dev_warn(ctrl->device, 3522 "Found shared namespace %d, but multipathing not supported.\n", 3523 info->nsid); 3524 dev_warn_once(ctrl->device, 3525 "Support for shared namespaces without CONFIG_NVME_MULTIPATH is deprecated and will be removed in Linux 6.0.\n"); 3526 } 3527 } 3528 3529 list_add_tail_rcu(&ns->siblings, &head->list); 3530 ns->head = head; 3531 mutex_unlock(&ctrl->subsys->lock); 3532 return 0; 3533 3534 out_put_ns_head: 3535 nvme_put_ns_head(head); 3536 out_unlock: 3537 mutex_unlock(&ctrl->subsys->lock); 3538 return ret; 3539 } 3540 3541 struct nvme_ns *nvme_find_get_ns(struct nvme_ctrl *ctrl, unsigned nsid) 3542 { 3543 struct nvme_ns *ns, *ret = NULL; 3544 int srcu_idx; 3545 3546 srcu_idx = srcu_read_lock(&ctrl->srcu); 3547 list_for_each_entry_srcu(ns, &ctrl->namespaces, list, 3548 srcu_read_lock_held(&ctrl->srcu)) { 3549 if (ns->head->ns_id == nsid) { 3550 if (!nvme_get_ns(ns)) 3551 continue; 3552 ret = ns; 3553 break; 3554 } 3555 if (ns->head->ns_id > nsid) 3556 break; 3557 } 3558 srcu_read_unlock(&ctrl->srcu, srcu_idx); 3559 return ret; 3560 } 3561 EXPORT_SYMBOL_NS_GPL(nvme_find_get_ns, NVME_TARGET_PASSTHRU); 3562 3563 /* 3564 * Add the namespace to the controller list while keeping the list ordered. 3565 */ 3566 static void nvme_ns_add_to_ctrl_list(struct nvme_ns *ns) 3567 { 3568 struct nvme_ns *tmp; 3569 3570 list_for_each_entry_reverse(tmp, &ns->ctrl->namespaces, list) { 3571 if (tmp->head->ns_id < ns->head->ns_id) { 3572 list_add_rcu(&ns->list, &tmp->list); 3573 return; 3574 } 3575 } 3576 list_add(&ns->list, &ns->ctrl->namespaces); 3577 } 3578 3579 static void nvme_alloc_ns(struct nvme_ctrl *ctrl, struct nvme_ns_info *info) 3580 { 3581 struct nvme_ns *ns; 3582 struct gendisk *disk; 3583 int node = ctrl->numa_node; 3584 3585 ns = kzalloc_node(sizeof(*ns), GFP_KERNEL, node); 3586 if (!ns) 3587 return; 3588 3589 disk = blk_mq_alloc_disk(ctrl->tagset, ns); 3590 if (IS_ERR(disk)) 3591 goto out_free_ns; 3592 disk->fops = &nvme_bdev_ops; 3593 disk->private_data = ns; 3594 3595 ns->disk = disk; 3596 ns->queue = disk->queue; 3597 3598 if (ctrl->opts && ctrl->opts->data_digest) 3599 blk_queue_flag_set(QUEUE_FLAG_STABLE_WRITES, ns->queue); 3600 3601 blk_queue_flag_set(QUEUE_FLAG_NONROT, ns->queue); 3602 if (ctrl->ops->supports_pci_p2pdma && 3603 ctrl->ops->supports_pci_p2pdma(ctrl)) 3604 blk_queue_flag_set(QUEUE_FLAG_PCI_P2PDMA, ns->queue); 3605 3606 ns->ctrl = ctrl; 3607 kref_init(&ns->kref); 3608 3609 if (nvme_init_ns_head(ns, info)) 3610 goto out_cleanup_disk; 3611 3612 /* 3613 * If multipathing is enabled, the device name for all disks and not 3614 * just those that represent shared namespaces needs to be based on the 3615 * subsystem instance. Using the controller instance for private 3616 * namespaces could lead to naming collisions between shared and private 3617 * namespaces if they don't use a common numbering scheme. 3618 * 3619 * If multipathing is not enabled, disk names must use the controller 3620 * instance as shared namespaces will show up as multiple block 3621 * devices. 3622 */ 3623 if (nvme_ns_head_multipath(ns->head)) { 3624 sprintf(disk->disk_name, "nvme%dc%dn%d", ctrl->subsys->instance, 3625 ctrl->instance, ns->head->instance); 3626 disk->flags |= GENHD_FL_HIDDEN; 3627 } else if (multipath) { 3628 sprintf(disk->disk_name, "nvme%dn%d", ctrl->subsys->instance, 3629 ns->head->instance); 3630 } else { 3631 sprintf(disk->disk_name, "nvme%dn%d", ctrl->instance, 3632 ns->head->instance); 3633 } 3634 3635 if (nvme_update_ns_info(ns, info)) 3636 goto out_unlink_ns; 3637 3638 mutex_lock(&ctrl->namespaces_lock); 3639 /* 3640 * Ensure that no namespaces are added to the ctrl list after the queues 3641 * are frozen, thereby avoiding a deadlock between scan and reset. 3642 */ 3643 if (test_bit(NVME_CTRL_FROZEN, &ctrl->flags)) { 3644 mutex_unlock(&ctrl->namespaces_lock); 3645 goto out_unlink_ns; 3646 } 3647 nvme_ns_add_to_ctrl_list(ns); 3648 mutex_unlock(&ctrl->namespaces_lock); 3649 synchronize_srcu(&ctrl->srcu); 3650 nvme_get_ctrl(ctrl); 3651 3652 if (device_add_disk(ctrl->device, ns->disk, nvme_ns_id_attr_groups)) 3653 goto out_cleanup_ns_from_list; 3654 3655 if (!nvme_ns_head_multipath(ns->head)) 3656 nvme_add_ns_cdev(ns); 3657 3658 nvme_mpath_add_disk(ns, info->anagrpid); 3659 nvme_fault_inject_init(&ns->fault_inject, ns->disk->disk_name); 3660 3661 return; 3662 3663 out_cleanup_ns_from_list: 3664 nvme_put_ctrl(ctrl); 3665 mutex_lock(&ctrl->namespaces_lock); 3666 list_del_rcu(&ns->list); 3667 mutex_unlock(&ctrl->namespaces_lock); 3668 synchronize_srcu(&ctrl->srcu); 3669 out_unlink_ns: 3670 mutex_lock(&ctrl->subsys->lock); 3671 list_del_rcu(&ns->siblings); 3672 if (list_empty(&ns->head->list)) 3673 list_del_init(&ns->head->entry); 3674 mutex_unlock(&ctrl->subsys->lock); 3675 nvme_put_ns_head(ns->head); 3676 out_cleanup_disk: 3677 put_disk(disk); 3678 out_free_ns: 3679 kfree(ns); 3680 } 3681 3682 static void nvme_ns_remove(struct nvme_ns *ns) 3683 { 3684 bool last_path = false; 3685 3686 if (test_and_set_bit(NVME_NS_REMOVING, &ns->flags)) 3687 return; 3688 3689 clear_bit(NVME_NS_READY, &ns->flags); 3690 set_capacity(ns->disk, 0); 3691 nvme_fault_inject_fini(&ns->fault_inject); 3692 3693 /* 3694 * Ensure that !NVME_NS_READY is seen by other threads to prevent 3695 * this ns going back into current_path. 3696 */ 3697 synchronize_srcu(&ns->head->srcu); 3698 3699 /* wait for concurrent submissions */ 3700 if (nvme_mpath_clear_current_path(ns)) 3701 synchronize_srcu(&ns->head->srcu); 3702 3703 mutex_lock(&ns->ctrl->subsys->lock); 3704 list_del_rcu(&ns->siblings); 3705 if (list_empty(&ns->head->list)) { 3706 list_del_init(&ns->head->entry); 3707 last_path = true; 3708 } 3709 mutex_unlock(&ns->ctrl->subsys->lock); 3710 3711 /* guarantee not available in head->list */ 3712 synchronize_srcu(&ns->head->srcu); 3713 3714 if (!nvme_ns_head_multipath(ns->head)) 3715 nvme_cdev_del(&ns->cdev, &ns->cdev_device); 3716 del_gendisk(ns->disk); 3717 3718 mutex_lock(&ns->ctrl->namespaces_lock); 3719 list_del_rcu(&ns->list); 3720 mutex_unlock(&ns->ctrl->namespaces_lock); 3721 synchronize_srcu(&ns->ctrl->srcu); 3722 3723 if (last_path) 3724 nvme_mpath_shutdown_disk(ns->head); 3725 nvme_put_ns(ns); 3726 } 3727 3728 static void nvme_ns_remove_by_nsid(struct nvme_ctrl *ctrl, u32 nsid) 3729 { 3730 struct nvme_ns *ns = nvme_find_get_ns(ctrl, nsid); 3731 3732 if (ns) { 3733 nvme_ns_remove(ns); 3734 nvme_put_ns(ns); 3735 } 3736 } 3737 3738 static void nvme_validate_ns(struct nvme_ns *ns, struct nvme_ns_info *info) 3739 { 3740 int ret = NVME_SC_INVALID_NS | NVME_SC_DNR; 3741 3742 if (!nvme_ns_ids_equal(&ns->head->ids, &info->ids)) { 3743 dev_err(ns->ctrl->device, 3744 "identifiers changed for nsid %d\n", ns->head->ns_id); 3745 goto out; 3746 } 3747 3748 ret = nvme_update_ns_info(ns, info); 3749 out: 3750 /* 3751 * Only remove the namespace if we got a fatal error back from the 3752 * device, otherwise ignore the error and just move on. 3753 * 3754 * TODO: we should probably schedule a delayed retry here. 3755 */ 3756 if (ret > 0 && (ret & NVME_SC_DNR)) 3757 nvme_ns_remove(ns); 3758 } 3759 3760 static void nvme_scan_ns(struct nvme_ctrl *ctrl, unsigned nsid) 3761 { 3762 struct nvme_ns_info info = { .nsid = nsid }; 3763 struct nvme_ns *ns; 3764 int ret; 3765 3766 if (nvme_identify_ns_descs(ctrl, &info)) 3767 return; 3768 3769 if (info.ids.csi != NVME_CSI_NVM && !nvme_multi_css(ctrl)) { 3770 dev_warn(ctrl->device, 3771 "command set not reported for nsid: %d\n", nsid); 3772 return; 3773 } 3774 3775 /* 3776 * If available try to use the Command Set Idependent Identify Namespace 3777 * data structure to find all the generic information that is needed to 3778 * set up a namespace. If not fall back to the legacy version. 3779 */ 3780 if ((ctrl->cap & NVME_CAP_CRMS_CRIMS) || 3781 (info.ids.csi != NVME_CSI_NVM && info.ids.csi != NVME_CSI_ZNS)) 3782 ret = nvme_ns_info_from_id_cs_indep(ctrl, &info); 3783 else 3784 ret = nvme_ns_info_from_identify(ctrl, &info); 3785 3786 if (info.is_removed) 3787 nvme_ns_remove_by_nsid(ctrl, nsid); 3788 3789 /* 3790 * Ignore the namespace if it is not ready. We will get an AEN once it 3791 * becomes ready and restart the scan. 3792 */ 3793 if (ret || !info.is_ready) 3794 return; 3795 3796 ns = nvme_find_get_ns(ctrl, nsid); 3797 if (ns) { 3798 nvme_validate_ns(ns, &info); 3799 nvme_put_ns(ns); 3800 } else { 3801 nvme_alloc_ns(ctrl, &info); 3802 } 3803 } 3804 3805 static void nvme_remove_invalid_namespaces(struct nvme_ctrl *ctrl, 3806 unsigned nsid) 3807 { 3808 struct nvme_ns *ns, *next; 3809 LIST_HEAD(rm_list); 3810 3811 mutex_lock(&ctrl->namespaces_lock); 3812 list_for_each_entry_safe(ns, next, &ctrl->namespaces, list) { 3813 if (ns->head->ns_id > nsid) { 3814 list_del_rcu(&ns->list); 3815 synchronize_srcu(&ctrl->srcu); 3816 list_add_tail_rcu(&ns->list, &rm_list); 3817 } 3818 } 3819 mutex_unlock(&ctrl->namespaces_lock); 3820 3821 list_for_each_entry_safe(ns, next, &rm_list, list) 3822 nvme_ns_remove(ns); 3823 } 3824 3825 static int nvme_scan_ns_list(struct nvme_ctrl *ctrl) 3826 { 3827 const int nr_entries = NVME_IDENTIFY_DATA_SIZE / sizeof(__le32); 3828 __le32 *ns_list; 3829 u32 prev = 0; 3830 int ret = 0, i; 3831 3832 ns_list = kzalloc(NVME_IDENTIFY_DATA_SIZE, GFP_KERNEL); 3833 if (!ns_list) 3834 return -ENOMEM; 3835 3836 for (;;) { 3837 struct nvme_command cmd = { 3838 .identify.opcode = nvme_admin_identify, 3839 .identify.cns = NVME_ID_CNS_NS_ACTIVE_LIST, 3840 .identify.nsid = cpu_to_le32(prev), 3841 }; 3842 3843 ret = nvme_submit_sync_cmd(ctrl->admin_q, &cmd, ns_list, 3844 NVME_IDENTIFY_DATA_SIZE); 3845 if (ret) { 3846 dev_warn(ctrl->device, 3847 "Identify NS List failed (status=0x%x)\n", ret); 3848 goto free; 3849 } 3850 3851 for (i = 0; i < nr_entries; i++) { 3852 u32 nsid = le32_to_cpu(ns_list[i]); 3853 3854 if (!nsid) /* end of the list? */ 3855 goto out; 3856 nvme_scan_ns(ctrl, nsid); 3857 while (++prev < nsid) 3858 nvme_ns_remove_by_nsid(ctrl, prev); 3859 } 3860 } 3861 out: 3862 nvme_remove_invalid_namespaces(ctrl, prev); 3863 free: 3864 kfree(ns_list); 3865 return ret; 3866 } 3867 3868 static void nvme_scan_ns_sequential(struct nvme_ctrl *ctrl) 3869 { 3870 struct nvme_id_ctrl *id; 3871 u32 nn, i; 3872 3873 if (nvme_identify_ctrl(ctrl, &id)) 3874 return; 3875 nn = le32_to_cpu(id->nn); 3876 kfree(id); 3877 3878 for (i = 1; i <= nn; i++) 3879 nvme_scan_ns(ctrl, i); 3880 3881 nvme_remove_invalid_namespaces(ctrl, nn); 3882 } 3883 3884 static void nvme_clear_changed_ns_log(struct nvme_ctrl *ctrl) 3885 { 3886 size_t log_size = NVME_MAX_CHANGED_NAMESPACES * sizeof(__le32); 3887 __le32 *log; 3888 int error; 3889 3890 log = kzalloc(log_size, GFP_KERNEL); 3891 if (!log) 3892 return; 3893 3894 /* 3895 * We need to read the log to clear the AEN, but we don't want to rely 3896 * on it for the changed namespace information as userspace could have 3897 * raced with us in reading the log page, which could cause us to miss 3898 * updates. 3899 */ 3900 error = nvme_get_log(ctrl, NVME_NSID_ALL, NVME_LOG_CHANGED_NS, 0, 3901 NVME_CSI_NVM, log, log_size, 0); 3902 if (error) 3903 dev_warn(ctrl->device, 3904 "reading changed ns log failed: %d\n", error); 3905 3906 kfree(log); 3907 } 3908 3909 static void nvme_scan_work(struct work_struct *work) 3910 { 3911 struct nvme_ctrl *ctrl = 3912 container_of(work, struct nvme_ctrl, scan_work); 3913 int ret; 3914 3915 /* No tagset on a live ctrl means IO queues could not created */ 3916 if (nvme_ctrl_state(ctrl) != NVME_CTRL_LIVE || !ctrl->tagset) 3917 return; 3918 3919 /* 3920 * Identify controller limits can change at controller reset due to 3921 * new firmware download, even though it is not common we cannot ignore 3922 * such scenario. Controller's non-mdts limits are reported in the unit 3923 * of logical blocks that is dependent on the format of attached 3924 * namespace. Hence re-read the limits at the time of ns allocation. 3925 */ 3926 ret = nvme_init_non_mdts_limits(ctrl); 3927 if (ret < 0) { 3928 dev_warn(ctrl->device, 3929 "reading non-mdts-limits failed: %d\n", ret); 3930 return; 3931 } 3932 3933 if (test_and_clear_bit(NVME_AER_NOTICE_NS_CHANGED, &ctrl->events)) { 3934 dev_info(ctrl->device, "rescanning namespaces.\n"); 3935 nvme_clear_changed_ns_log(ctrl); 3936 } 3937 3938 mutex_lock(&ctrl->scan_lock); 3939 if (nvme_ctrl_limited_cns(ctrl)) { 3940 nvme_scan_ns_sequential(ctrl); 3941 } else { 3942 /* 3943 * Fall back to sequential scan if DNR is set to handle broken 3944 * devices which should support Identify NS List (as per the VS 3945 * they report) but don't actually support it. 3946 */ 3947 ret = nvme_scan_ns_list(ctrl); 3948 if (ret > 0 && ret & NVME_SC_DNR) 3949 nvme_scan_ns_sequential(ctrl); 3950 } 3951 mutex_unlock(&ctrl->scan_lock); 3952 } 3953 3954 /* 3955 * This function iterates the namespace list unlocked to allow recovery from 3956 * controller failure. It is up to the caller to ensure the namespace list is 3957 * not modified by scan work while this function is executing. 3958 */ 3959 void nvme_remove_namespaces(struct nvme_ctrl *ctrl) 3960 { 3961 struct nvme_ns *ns, *next; 3962 LIST_HEAD(ns_list); 3963 3964 /* 3965 * make sure to requeue I/O to all namespaces as these 3966 * might result from the scan itself and must complete 3967 * for the scan_work to make progress 3968 */ 3969 nvme_mpath_clear_ctrl_paths(ctrl); 3970 3971 /* 3972 * Unquiesce io queues so any pending IO won't hang, especially 3973 * those submitted from scan work 3974 */ 3975 nvme_unquiesce_io_queues(ctrl); 3976 3977 /* prevent racing with ns scanning */ 3978 flush_work(&ctrl->scan_work); 3979 3980 /* 3981 * The dead states indicates the controller was not gracefully 3982 * disconnected. In that case, we won't be able to flush any data while 3983 * removing the namespaces' disks; fail all the queues now to avoid 3984 * potentially having to clean up the failed sync later. 3985 */ 3986 if (nvme_ctrl_state(ctrl) == NVME_CTRL_DEAD) 3987 nvme_mark_namespaces_dead(ctrl); 3988 3989 /* this is a no-op when called from the controller reset handler */ 3990 nvme_change_ctrl_state(ctrl, NVME_CTRL_DELETING_NOIO); 3991 3992 mutex_lock(&ctrl->namespaces_lock); 3993 list_splice_init_rcu(&ctrl->namespaces, &ns_list, synchronize_rcu); 3994 mutex_unlock(&ctrl->namespaces_lock); 3995 synchronize_srcu(&ctrl->srcu); 3996 3997 list_for_each_entry_safe(ns, next, &ns_list, list) 3998 nvme_ns_remove(ns); 3999 } 4000 EXPORT_SYMBOL_GPL(nvme_remove_namespaces); 4001 4002 static int nvme_class_uevent(const struct device *dev, struct kobj_uevent_env *env) 4003 { 4004 const struct nvme_ctrl *ctrl = 4005 container_of(dev, struct nvme_ctrl, ctrl_device); 4006 struct nvmf_ctrl_options *opts = ctrl->opts; 4007 int ret; 4008 4009 ret = add_uevent_var(env, "NVME_TRTYPE=%s", ctrl->ops->name); 4010 if (ret) 4011 return ret; 4012 4013 if (opts) { 4014 ret = add_uevent_var(env, "NVME_TRADDR=%s", opts->traddr); 4015 if (ret) 4016 return ret; 4017 4018 ret = add_uevent_var(env, "NVME_TRSVCID=%s", 4019 opts->trsvcid ?: "none"); 4020 if (ret) 4021 return ret; 4022 4023 ret = add_uevent_var(env, "NVME_HOST_TRADDR=%s", 4024 opts->host_traddr ?: "none"); 4025 if (ret) 4026 return ret; 4027 4028 ret = add_uevent_var(env, "NVME_HOST_IFACE=%s", 4029 opts->host_iface ?: "none"); 4030 } 4031 return ret; 4032 } 4033 4034 static void nvme_change_uevent(struct nvme_ctrl *ctrl, char *envdata) 4035 { 4036 char *envp[2] = { envdata, NULL }; 4037 4038 kobject_uevent_env(&ctrl->device->kobj, KOBJ_CHANGE, envp); 4039 } 4040 4041 static void nvme_aen_uevent(struct nvme_ctrl *ctrl) 4042 { 4043 char *envp[2] = { NULL, NULL }; 4044 u32 aen_result = ctrl->aen_result; 4045 4046 ctrl->aen_result = 0; 4047 if (!aen_result) 4048 return; 4049 4050 envp[0] = kasprintf(GFP_KERNEL, "NVME_AEN=%#08x", aen_result); 4051 if (!envp[0]) 4052 return; 4053 kobject_uevent_env(&ctrl->device->kobj, KOBJ_CHANGE, envp); 4054 kfree(envp[0]); 4055 } 4056 4057 static void nvme_async_event_work(struct work_struct *work) 4058 { 4059 struct nvme_ctrl *ctrl = 4060 container_of(work, struct nvme_ctrl, async_event_work); 4061 4062 nvme_aen_uevent(ctrl); 4063 4064 /* 4065 * The transport drivers must guarantee AER submission here is safe by 4066 * flushing ctrl async_event_work after changing the controller state 4067 * from LIVE and before freeing the admin queue. 4068 */ 4069 if (nvme_ctrl_state(ctrl) == NVME_CTRL_LIVE) 4070 ctrl->ops->submit_async_event(ctrl); 4071 } 4072 4073 static bool nvme_ctrl_pp_status(struct nvme_ctrl *ctrl) 4074 { 4075 4076 u32 csts; 4077 4078 if (ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts)) 4079 return false; 4080 4081 if (csts == ~0) 4082 return false; 4083 4084 return ((ctrl->ctrl_config & NVME_CC_ENABLE) && (csts & NVME_CSTS_PP)); 4085 } 4086 4087 static void nvme_get_fw_slot_info(struct nvme_ctrl *ctrl) 4088 { 4089 struct nvme_fw_slot_info_log *log; 4090 4091 log = kmalloc(sizeof(*log), GFP_KERNEL); 4092 if (!log) 4093 return; 4094 4095 if (nvme_get_log(ctrl, NVME_NSID_ALL, NVME_LOG_FW_SLOT, 0, NVME_CSI_NVM, 4096 log, sizeof(*log), 0)) 4097 dev_warn(ctrl->device, "Get FW SLOT INFO log error\n"); 4098 kfree(log); 4099 } 4100 4101 static void nvme_fw_act_work(struct work_struct *work) 4102 { 4103 struct nvme_ctrl *ctrl = container_of(work, 4104 struct nvme_ctrl, fw_act_work); 4105 unsigned long fw_act_timeout; 4106 4107 nvme_auth_stop(ctrl); 4108 4109 if (ctrl->mtfa) 4110 fw_act_timeout = jiffies + 4111 msecs_to_jiffies(ctrl->mtfa * 100); 4112 else 4113 fw_act_timeout = jiffies + 4114 msecs_to_jiffies(admin_timeout * 1000); 4115 4116 nvme_quiesce_io_queues(ctrl); 4117 while (nvme_ctrl_pp_status(ctrl)) { 4118 if (time_after(jiffies, fw_act_timeout)) { 4119 dev_warn(ctrl->device, 4120 "Fw activation timeout, reset controller\n"); 4121 nvme_try_sched_reset(ctrl); 4122 return; 4123 } 4124 msleep(100); 4125 } 4126 4127 if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_LIVE)) 4128 return; 4129 4130 nvme_unquiesce_io_queues(ctrl); 4131 /* read FW slot information to clear the AER */ 4132 nvme_get_fw_slot_info(ctrl); 4133 4134 queue_work(nvme_wq, &ctrl->async_event_work); 4135 } 4136 4137 static u32 nvme_aer_type(u32 result) 4138 { 4139 return result & 0x7; 4140 } 4141 4142 static u32 nvme_aer_subtype(u32 result) 4143 { 4144 return (result & 0xff00) >> 8; 4145 } 4146 4147 static bool nvme_handle_aen_notice(struct nvme_ctrl *ctrl, u32 result) 4148 { 4149 u32 aer_notice_type = nvme_aer_subtype(result); 4150 bool requeue = true; 4151 4152 switch (aer_notice_type) { 4153 case NVME_AER_NOTICE_NS_CHANGED: 4154 set_bit(NVME_AER_NOTICE_NS_CHANGED, &ctrl->events); 4155 nvme_queue_scan(ctrl); 4156 break; 4157 case NVME_AER_NOTICE_FW_ACT_STARTING: 4158 /* 4159 * We are (ab)using the RESETTING state to prevent subsequent 4160 * recovery actions from interfering with the controller's 4161 * firmware activation. 4162 */ 4163 if (nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING)) { 4164 requeue = false; 4165 queue_work(nvme_wq, &ctrl->fw_act_work); 4166 } 4167 break; 4168 #ifdef CONFIG_NVME_MULTIPATH 4169 case NVME_AER_NOTICE_ANA: 4170 if (!ctrl->ana_log_buf) 4171 break; 4172 queue_work(nvme_wq, &ctrl->ana_work); 4173 break; 4174 #endif 4175 case NVME_AER_NOTICE_DISC_CHANGED: 4176 ctrl->aen_result = result; 4177 break; 4178 default: 4179 dev_warn(ctrl->device, "async event result %08x\n", result); 4180 } 4181 return requeue; 4182 } 4183 4184 static void nvme_handle_aer_persistent_error(struct nvme_ctrl *ctrl) 4185 { 4186 dev_warn(ctrl->device, "resetting controller due to AER\n"); 4187 nvme_reset_ctrl(ctrl); 4188 } 4189 4190 void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status, 4191 volatile union nvme_result *res) 4192 { 4193 u32 result = le32_to_cpu(res->u32); 4194 u32 aer_type = nvme_aer_type(result); 4195 u32 aer_subtype = nvme_aer_subtype(result); 4196 bool requeue = true; 4197 4198 if (le16_to_cpu(status) >> 1 != NVME_SC_SUCCESS) 4199 return; 4200 4201 trace_nvme_async_event(ctrl, result); 4202 switch (aer_type) { 4203 case NVME_AER_NOTICE: 4204 requeue = nvme_handle_aen_notice(ctrl, result); 4205 break; 4206 case NVME_AER_ERROR: 4207 /* 4208 * For a persistent internal error, don't run async_event_work 4209 * to submit a new AER. The controller reset will do it. 4210 */ 4211 if (aer_subtype == NVME_AER_ERROR_PERSIST_INT_ERR) { 4212 nvme_handle_aer_persistent_error(ctrl); 4213 return; 4214 } 4215 fallthrough; 4216 case NVME_AER_SMART: 4217 case NVME_AER_CSS: 4218 case NVME_AER_VS: 4219 ctrl->aen_result = result; 4220 break; 4221 default: 4222 break; 4223 } 4224 4225 if (requeue) 4226 queue_work(nvme_wq, &ctrl->async_event_work); 4227 } 4228 EXPORT_SYMBOL_GPL(nvme_complete_async_event); 4229 4230 int nvme_alloc_admin_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set, 4231 const struct blk_mq_ops *ops, unsigned int cmd_size) 4232 { 4233 int ret; 4234 4235 memset(set, 0, sizeof(*set)); 4236 set->ops = ops; 4237 set->queue_depth = NVME_AQ_MQ_TAG_DEPTH; 4238 if (ctrl->ops->flags & NVME_F_FABRICS) 4239 /* Reserved for fabric connect and keep alive */ 4240 set->reserved_tags = 2; 4241 set->numa_node = ctrl->numa_node; 4242 set->flags = BLK_MQ_F_NO_SCHED; 4243 if (ctrl->ops->flags & NVME_F_BLOCKING) 4244 set->flags |= BLK_MQ_F_BLOCKING; 4245 set->cmd_size = cmd_size; 4246 set->driver_data = ctrl; 4247 set->nr_hw_queues = 1; 4248 set->timeout = NVME_ADMIN_TIMEOUT; 4249 ret = blk_mq_alloc_tag_set(set); 4250 if (ret) 4251 return ret; 4252 4253 ctrl->admin_q = blk_mq_init_queue(set); 4254 if (IS_ERR(ctrl->admin_q)) { 4255 ret = PTR_ERR(ctrl->admin_q); 4256 goto out_free_tagset; 4257 } 4258 4259 if (ctrl->ops->flags & NVME_F_FABRICS) { 4260 ctrl->fabrics_q = blk_mq_init_queue(set); 4261 if (IS_ERR(ctrl->fabrics_q)) { 4262 ret = PTR_ERR(ctrl->fabrics_q); 4263 goto out_cleanup_admin_q; 4264 } 4265 } 4266 4267 ctrl->admin_tagset = set; 4268 return 0; 4269 4270 out_cleanup_admin_q: 4271 blk_mq_destroy_queue(ctrl->admin_q); 4272 blk_put_queue(ctrl->admin_q); 4273 out_free_tagset: 4274 blk_mq_free_tag_set(set); 4275 ctrl->admin_q = NULL; 4276 ctrl->fabrics_q = NULL; 4277 return ret; 4278 } 4279 EXPORT_SYMBOL_GPL(nvme_alloc_admin_tag_set); 4280 4281 void nvme_remove_admin_tag_set(struct nvme_ctrl *ctrl) 4282 { 4283 blk_mq_destroy_queue(ctrl->admin_q); 4284 blk_put_queue(ctrl->admin_q); 4285 if (ctrl->ops->flags & NVME_F_FABRICS) { 4286 blk_mq_destroy_queue(ctrl->fabrics_q); 4287 blk_put_queue(ctrl->fabrics_q); 4288 } 4289 blk_mq_free_tag_set(ctrl->admin_tagset); 4290 } 4291 EXPORT_SYMBOL_GPL(nvme_remove_admin_tag_set); 4292 4293 int nvme_alloc_io_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set, 4294 const struct blk_mq_ops *ops, unsigned int nr_maps, 4295 unsigned int cmd_size) 4296 { 4297 int ret; 4298 4299 memset(set, 0, sizeof(*set)); 4300 set->ops = ops; 4301 set->queue_depth = min_t(unsigned, ctrl->sqsize, BLK_MQ_MAX_DEPTH - 1); 4302 /* 4303 * Some Apple controllers requires tags to be unique across admin and 4304 * the (only) I/O queue, so reserve the first 32 tags of the I/O queue. 4305 */ 4306 if (ctrl->quirks & NVME_QUIRK_SHARED_TAGS) 4307 set->reserved_tags = NVME_AQ_DEPTH; 4308 else if (ctrl->ops->flags & NVME_F_FABRICS) 4309 /* Reserved for fabric connect */ 4310 set->reserved_tags = 1; 4311 set->numa_node = ctrl->numa_node; 4312 set->flags = BLK_MQ_F_SHOULD_MERGE; 4313 if (ctrl->ops->flags & NVME_F_BLOCKING) 4314 set->flags |= BLK_MQ_F_BLOCKING; 4315 set->cmd_size = cmd_size, 4316 set->driver_data = ctrl; 4317 set->nr_hw_queues = ctrl->queue_count - 1; 4318 set->timeout = NVME_IO_TIMEOUT; 4319 set->nr_maps = nr_maps; 4320 ret = blk_mq_alloc_tag_set(set); 4321 if (ret) 4322 return ret; 4323 4324 if (ctrl->ops->flags & NVME_F_FABRICS) { 4325 ctrl->connect_q = blk_mq_init_queue(set); 4326 if (IS_ERR(ctrl->connect_q)) { 4327 ret = PTR_ERR(ctrl->connect_q); 4328 goto out_free_tag_set; 4329 } 4330 blk_queue_flag_set(QUEUE_FLAG_SKIP_TAGSET_QUIESCE, 4331 ctrl->connect_q); 4332 } 4333 4334 ctrl->tagset = set; 4335 return 0; 4336 4337 out_free_tag_set: 4338 blk_mq_free_tag_set(set); 4339 ctrl->connect_q = NULL; 4340 return ret; 4341 } 4342 EXPORT_SYMBOL_GPL(nvme_alloc_io_tag_set); 4343 4344 void nvme_remove_io_tag_set(struct nvme_ctrl *ctrl) 4345 { 4346 if (ctrl->ops->flags & NVME_F_FABRICS) { 4347 blk_mq_destroy_queue(ctrl->connect_q); 4348 blk_put_queue(ctrl->connect_q); 4349 } 4350 blk_mq_free_tag_set(ctrl->tagset); 4351 } 4352 EXPORT_SYMBOL_GPL(nvme_remove_io_tag_set); 4353 4354 void nvme_stop_ctrl(struct nvme_ctrl *ctrl) 4355 { 4356 nvme_mpath_stop(ctrl); 4357 nvme_auth_stop(ctrl); 4358 nvme_stop_keep_alive(ctrl); 4359 nvme_stop_failfast_work(ctrl); 4360 flush_work(&ctrl->async_event_work); 4361 cancel_work_sync(&ctrl->fw_act_work); 4362 if (ctrl->ops->stop_ctrl) 4363 ctrl->ops->stop_ctrl(ctrl); 4364 } 4365 EXPORT_SYMBOL_GPL(nvme_stop_ctrl); 4366 4367 void nvme_start_ctrl(struct nvme_ctrl *ctrl) 4368 { 4369 nvme_start_keep_alive(ctrl); 4370 4371 nvme_enable_aen(ctrl); 4372 4373 /* 4374 * persistent discovery controllers need to send indication to userspace 4375 * to re-read the discovery log page to learn about possible changes 4376 * that were missed. We identify persistent discovery controllers by 4377 * checking that they started once before, hence are reconnecting back. 4378 */ 4379 if (test_bit(NVME_CTRL_STARTED_ONCE, &ctrl->flags) && 4380 nvme_discovery_ctrl(ctrl)) 4381 nvme_change_uevent(ctrl, "NVME_EVENT=rediscover"); 4382 4383 if (ctrl->queue_count > 1) { 4384 nvme_queue_scan(ctrl); 4385 nvme_unquiesce_io_queues(ctrl); 4386 nvme_mpath_update(ctrl); 4387 } 4388 4389 nvme_change_uevent(ctrl, "NVME_EVENT=connected"); 4390 set_bit(NVME_CTRL_STARTED_ONCE, &ctrl->flags); 4391 } 4392 EXPORT_SYMBOL_GPL(nvme_start_ctrl); 4393 4394 void nvme_uninit_ctrl(struct nvme_ctrl *ctrl) 4395 { 4396 nvme_hwmon_exit(ctrl); 4397 nvme_fault_inject_fini(&ctrl->fault_inject); 4398 dev_pm_qos_hide_latency_tolerance(ctrl->device); 4399 cdev_device_del(&ctrl->cdev, ctrl->device); 4400 nvme_put_ctrl(ctrl); 4401 } 4402 EXPORT_SYMBOL_GPL(nvme_uninit_ctrl); 4403 4404 static void nvme_free_cels(struct nvme_ctrl *ctrl) 4405 { 4406 struct nvme_effects_log *cel; 4407 unsigned long i; 4408 4409 xa_for_each(&ctrl->cels, i, cel) { 4410 xa_erase(&ctrl->cels, i); 4411 kfree(cel); 4412 } 4413 4414 xa_destroy(&ctrl->cels); 4415 } 4416 4417 static void nvme_free_ctrl(struct device *dev) 4418 { 4419 struct nvme_ctrl *ctrl = 4420 container_of(dev, struct nvme_ctrl, ctrl_device); 4421 struct nvme_subsystem *subsys = ctrl->subsys; 4422 4423 if (!subsys || ctrl->instance != subsys->instance) 4424 ida_free(&nvme_instance_ida, ctrl->instance); 4425 4426 nvme_free_cels(ctrl); 4427 nvme_mpath_uninit(ctrl); 4428 cleanup_srcu_struct(&ctrl->srcu); 4429 nvme_auth_stop(ctrl); 4430 nvme_auth_free(ctrl); 4431 __free_page(ctrl->discard_page); 4432 free_opal_dev(ctrl->opal_dev); 4433 4434 if (subsys) { 4435 mutex_lock(&nvme_subsystems_lock); 4436 list_del(&ctrl->subsys_entry); 4437 sysfs_remove_link(&subsys->dev.kobj, dev_name(ctrl->device)); 4438 mutex_unlock(&nvme_subsystems_lock); 4439 } 4440 4441 ctrl->ops->free_ctrl(ctrl); 4442 4443 if (subsys) 4444 nvme_put_subsystem(subsys); 4445 } 4446 4447 /* 4448 * Initialize a NVMe controller structures. This needs to be called during 4449 * earliest initialization so that we have the initialized structured around 4450 * during probing. 4451 */ 4452 int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev, 4453 const struct nvme_ctrl_ops *ops, unsigned long quirks) 4454 { 4455 int ret; 4456 4457 WRITE_ONCE(ctrl->state, NVME_CTRL_NEW); 4458 clear_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags); 4459 spin_lock_init(&ctrl->lock); 4460 mutex_init(&ctrl->namespaces_lock); 4461 4462 ret = init_srcu_struct(&ctrl->srcu); 4463 if (ret) 4464 return ret; 4465 4466 mutex_init(&ctrl->scan_lock); 4467 INIT_LIST_HEAD(&ctrl->namespaces); 4468 xa_init(&ctrl->cels); 4469 ctrl->dev = dev; 4470 ctrl->ops = ops; 4471 ctrl->quirks = quirks; 4472 ctrl->numa_node = NUMA_NO_NODE; 4473 INIT_WORK(&ctrl->scan_work, nvme_scan_work); 4474 INIT_WORK(&ctrl->async_event_work, nvme_async_event_work); 4475 INIT_WORK(&ctrl->fw_act_work, nvme_fw_act_work); 4476 INIT_WORK(&ctrl->delete_work, nvme_delete_ctrl_work); 4477 init_waitqueue_head(&ctrl->state_wq); 4478 4479 INIT_DELAYED_WORK(&ctrl->ka_work, nvme_keep_alive_work); 4480 INIT_DELAYED_WORK(&ctrl->failfast_work, nvme_failfast_work); 4481 memset(&ctrl->ka_cmd, 0, sizeof(ctrl->ka_cmd)); 4482 ctrl->ka_cmd.common.opcode = nvme_admin_keep_alive; 4483 4484 BUILD_BUG_ON(NVME_DSM_MAX_RANGES * sizeof(struct nvme_dsm_range) > 4485 PAGE_SIZE); 4486 ctrl->discard_page = alloc_page(GFP_KERNEL); 4487 if (!ctrl->discard_page) { 4488 ret = -ENOMEM; 4489 goto out; 4490 } 4491 4492 ret = ida_alloc(&nvme_instance_ida, GFP_KERNEL); 4493 if (ret < 0) 4494 goto out; 4495 ctrl->instance = ret; 4496 4497 device_initialize(&ctrl->ctrl_device); 4498 ctrl->device = &ctrl->ctrl_device; 4499 ctrl->device->devt = MKDEV(MAJOR(nvme_ctrl_base_chr_devt), 4500 ctrl->instance); 4501 ctrl->device->class = nvme_class; 4502 ctrl->device->parent = ctrl->dev; 4503 if (ops->dev_attr_groups) 4504 ctrl->device->groups = ops->dev_attr_groups; 4505 else 4506 ctrl->device->groups = nvme_dev_attr_groups; 4507 ctrl->device->release = nvme_free_ctrl; 4508 dev_set_drvdata(ctrl->device, ctrl); 4509 ret = dev_set_name(ctrl->device, "nvme%d", ctrl->instance); 4510 if (ret) 4511 goto out_release_instance; 4512 4513 nvme_get_ctrl(ctrl); 4514 cdev_init(&ctrl->cdev, &nvme_dev_fops); 4515 ctrl->cdev.owner = ops->module; 4516 ret = cdev_device_add(&ctrl->cdev, ctrl->device); 4517 if (ret) 4518 goto out_free_name; 4519 4520 /* 4521 * Initialize latency tolerance controls. The sysfs files won't 4522 * be visible to userspace unless the device actually supports APST. 4523 */ 4524 ctrl->device->power.set_latency_tolerance = nvme_set_latency_tolerance; 4525 dev_pm_qos_update_user_latency_tolerance(ctrl->device, 4526 min(default_ps_max_latency_us, (unsigned long)S32_MAX)); 4527 4528 nvme_fault_inject_init(&ctrl->fault_inject, dev_name(ctrl->device)); 4529 nvme_mpath_init_ctrl(ctrl); 4530 ret = nvme_auth_init_ctrl(ctrl); 4531 if (ret) 4532 goto out_free_cdev; 4533 4534 return 0; 4535 out_free_cdev: 4536 nvme_fault_inject_fini(&ctrl->fault_inject); 4537 dev_pm_qos_hide_latency_tolerance(ctrl->device); 4538 cdev_device_del(&ctrl->cdev, ctrl->device); 4539 out_free_name: 4540 nvme_put_ctrl(ctrl); 4541 kfree_const(ctrl->device->kobj.name); 4542 out_release_instance: 4543 ida_free(&nvme_instance_ida, ctrl->instance); 4544 out: 4545 if (ctrl->discard_page) 4546 __free_page(ctrl->discard_page); 4547 cleanup_srcu_struct(&ctrl->srcu); 4548 return ret; 4549 } 4550 EXPORT_SYMBOL_GPL(nvme_init_ctrl); 4551 4552 /* let I/O to all namespaces fail in preparation for surprise removal */ 4553 void nvme_mark_namespaces_dead(struct nvme_ctrl *ctrl) 4554 { 4555 struct nvme_ns *ns; 4556 int srcu_idx; 4557 4558 srcu_idx = srcu_read_lock(&ctrl->srcu); 4559 list_for_each_entry_srcu(ns, &ctrl->namespaces, list, 4560 srcu_read_lock_held(&ctrl->srcu)) 4561 blk_mark_disk_dead(ns->disk); 4562 srcu_read_unlock(&ctrl->srcu, srcu_idx); 4563 } 4564 EXPORT_SYMBOL_GPL(nvme_mark_namespaces_dead); 4565 4566 void nvme_unfreeze(struct nvme_ctrl *ctrl) 4567 { 4568 struct nvme_ns *ns; 4569 int srcu_idx; 4570 4571 srcu_idx = srcu_read_lock(&ctrl->srcu); 4572 list_for_each_entry_srcu(ns, &ctrl->namespaces, list, 4573 srcu_read_lock_held(&ctrl->srcu)) 4574 blk_mq_unfreeze_queue(ns->queue); 4575 srcu_read_unlock(&ctrl->srcu, srcu_idx); 4576 clear_bit(NVME_CTRL_FROZEN, &ctrl->flags); 4577 } 4578 EXPORT_SYMBOL_GPL(nvme_unfreeze); 4579 4580 int nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout) 4581 { 4582 struct nvme_ns *ns; 4583 int srcu_idx; 4584 4585 srcu_idx = srcu_read_lock(&ctrl->srcu); 4586 list_for_each_entry_srcu(ns, &ctrl->namespaces, list, 4587 srcu_read_lock_held(&ctrl->srcu)) { 4588 timeout = blk_mq_freeze_queue_wait_timeout(ns->queue, timeout); 4589 if (timeout <= 0) 4590 break; 4591 } 4592 srcu_read_unlock(&ctrl->srcu, srcu_idx); 4593 return timeout; 4594 } 4595 EXPORT_SYMBOL_GPL(nvme_wait_freeze_timeout); 4596 4597 void nvme_wait_freeze(struct nvme_ctrl *ctrl) 4598 { 4599 struct nvme_ns *ns; 4600 int srcu_idx; 4601 4602 srcu_idx = srcu_read_lock(&ctrl->srcu); 4603 list_for_each_entry_srcu(ns, &ctrl->namespaces, list, 4604 srcu_read_lock_held(&ctrl->srcu)) 4605 blk_mq_freeze_queue_wait(ns->queue); 4606 srcu_read_unlock(&ctrl->srcu, srcu_idx); 4607 } 4608 EXPORT_SYMBOL_GPL(nvme_wait_freeze); 4609 4610 void nvme_start_freeze(struct nvme_ctrl *ctrl) 4611 { 4612 struct nvme_ns *ns; 4613 int srcu_idx; 4614 4615 set_bit(NVME_CTRL_FROZEN, &ctrl->flags); 4616 srcu_idx = srcu_read_lock(&ctrl->srcu); 4617 list_for_each_entry_srcu(ns, &ctrl->namespaces, list, 4618 srcu_read_lock_held(&ctrl->srcu)) 4619 blk_freeze_queue_start(ns->queue); 4620 srcu_read_unlock(&ctrl->srcu, srcu_idx); 4621 } 4622 EXPORT_SYMBOL_GPL(nvme_start_freeze); 4623 4624 void nvme_quiesce_io_queues(struct nvme_ctrl *ctrl) 4625 { 4626 if (!ctrl->tagset) 4627 return; 4628 if (!test_and_set_bit(NVME_CTRL_STOPPED, &ctrl->flags)) 4629 blk_mq_quiesce_tagset(ctrl->tagset); 4630 else 4631 blk_mq_wait_quiesce_done(ctrl->tagset); 4632 } 4633 EXPORT_SYMBOL_GPL(nvme_quiesce_io_queues); 4634 4635 void nvme_unquiesce_io_queues(struct nvme_ctrl *ctrl) 4636 { 4637 if (!ctrl->tagset) 4638 return; 4639 if (test_and_clear_bit(NVME_CTRL_STOPPED, &ctrl->flags)) 4640 blk_mq_unquiesce_tagset(ctrl->tagset); 4641 } 4642 EXPORT_SYMBOL_GPL(nvme_unquiesce_io_queues); 4643 4644 void nvme_quiesce_admin_queue(struct nvme_ctrl *ctrl) 4645 { 4646 if (!test_and_set_bit(NVME_CTRL_ADMIN_Q_STOPPED, &ctrl->flags)) 4647 blk_mq_quiesce_queue(ctrl->admin_q); 4648 else 4649 blk_mq_wait_quiesce_done(ctrl->admin_q->tag_set); 4650 } 4651 EXPORT_SYMBOL_GPL(nvme_quiesce_admin_queue); 4652 4653 void nvme_unquiesce_admin_queue(struct nvme_ctrl *ctrl) 4654 { 4655 if (test_and_clear_bit(NVME_CTRL_ADMIN_Q_STOPPED, &ctrl->flags)) 4656 blk_mq_unquiesce_queue(ctrl->admin_q); 4657 } 4658 EXPORT_SYMBOL_GPL(nvme_unquiesce_admin_queue); 4659 4660 void nvme_sync_io_queues(struct nvme_ctrl *ctrl) 4661 { 4662 struct nvme_ns *ns; 4663 int srcu_idx; 4664 4665 srcu_idx = srcu_read_lock(&ctrl->srcu); 4666 list_for_each_entry_srcu(ns, &ctrl->namespaces, list, 4667 srcu_read_lock_held(&ctrl->srcu)) 4668 blk_sync_queue(ns->queue); 4669 srcu_read_unlock(&ctrl->srcu, srcu_idx); 4670 } 4671 EXPORT_SYMBOL_GPL(nvme_sync_io_queues); 4672 4673 void nvme_sync_queues(struct nvme_ctrl *ctrl) 4674 { 4675 nvme_sync_io_queues(ctrl); 4676 if (ctrl->admin_q) 4677 blk_sync_queue(ctrl->admin_q); 4678 } 4679 EXPORT_SYMBOL_GPL(nvme_sync_queues); 4680 4681 struct nvme_ctrl *nvme_ctrl_from_file(struct file *file) 4682 { 4683 if (file->f_op != &nvme_dev_fops) 4684 return NULL; 4685 return file->private_data; 4686 } 4687 EXPORT_SYMBOL_NS_GPL(nvme_ctrl_from_file, NVME_TARGET_PASSTHRU); 4688 4689 /* 4690 * Check we didn't inadvertently grow the command structure sizes: 4691 */ 4692 static inline void _nvme_check_size(void) 4693 { 4694 BUILD_BUG_ON(sizeof(struct nvme_common_command) != 64); 4695 BUILD_BUG_ON(sizeof(struct nvme_rw_command) != 64); 4696 BUILD_BUG_ON(sizeof(struct nvme_identify) != 64); 4697 BUILD_BUG_ON(sizeof(struct nvme_features) != 64); 4698 BUILD_BUG_ON(sizeof(struct nvme_download_firmware) != 64); 4699 BUILD_BUG_ON(sizeof(struct nvme_format_cmd) != 64); 4700 BUILD_BUG_ON(sizeof(struct nvme_dsm_cmd) != 64); 4701 BUILD_BUG_ON(sizeof(struct nvme_write_zeroes_cmd) != 64); 4702 BUILD_BUG_ON(sizeof(struct nvme_abort_cmd) != 64); 4703 BUILD_BUG_ON(sizeof(struct nvme_get_log_page_command) != 64); 4704 BUILD_BUG_ON(sizeof(struct nvme_command) != 64); 4705 BUILD_BUG_ON(sizeof(struct nvme_id_ctrl) != NVME_IDENTIFY_DATA_SIZE); 4706 BUILD_BUG_ON(sizeof(struct nvme_id_ns) != NVME_IDENTIFY_DATA_SIZE); 4707 BUILD_BUG_ON(sizeof(struct nvme_id_ns_cs_indep) != 4708 NVME_IDENTIFY_DATA_SIZE); 4709 BUILD_BUG_ON(sizeof(struct nvme_id_ns_zns) != NVME_IDENTIFY_DATA_SIZE); 4710 BUILD_BUG_ON(sizeof(struct nvme_id_ns_nvm) != NVME_IDENTIFY_DATA_SIZE); 4711 BUILD_BUG_ON(sizeof(struct nvme_id_ctrl_zns) != NVME_IDENTIFY_DATA_SIZE); 4712 BUILD_BUG_ON(sizeof(struct nvme_id_ctrl_nvm) != NVME_IDENTIFY_DATA_SIZE); 4713 BUILD_BUG_ON(sizeof(struct nvme_lba_range_type) != 64); 4714 BUILD_BUG_ON(sizeof(struct nvme_smart_log) != 512); 4715 BUILD_BUG_ON(sizeof(struct nvme_dbbuf) != 64); 4716 BUILD_BUG_ON(sizeof(struct nvme_directive_cmd) != 64); 4717 BUILD_BUG_ON(sizeof(struct nvme_feat_host_behavior) != 512); 4718 } 4719 4720 4721 static int __init nvme_core_init(void) 4722 { 4723 int result = -ENOMEM; 4724 4725 _nvme_check_size(); 4726 4727 nvme_wq = alloc_workqueue("nvme-wq", 4728 WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_SYSFS, 0); 4729 if (!nvme_wq) 4730 goto out; 4731 4732 nvme_reset_wq = alloc_workqueue("nvme-reset-wq", 4733 WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_SYSFS, 0); 4734 if (!nvme_reset_wq) 4735 goto destroy_wq; 4736 4737 nvme_delete_wq = alloc_workqueue("nvme-delete-wq", 4738 WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_SYSFS, 0); 4739 if (!nvme_delete_wq) 4740 goto destroy_reset_wq; 4741 4742 result = alloc_chrdev_region(&nvme_ctrl_base_chr_devt, 0, 4743 NVME_MINORS, "nvme"); 4744 if (result < 0) 4745 goto destroy_delete_wq; 4746 4747 nvme_class = class_create("nvme"); 4748 if (IS_ERR(nvme_class)) { 4749 result = PTR_ERR(nvme_class); 4750 goto unregister_chrdev; 4751 } 4752 nvme_class->dev_uevent = nvme_class_uevent; 4753 4754 nvme_subsys_class = class_create("nvme-subsystem"); 4755 if (IS_ERR(nvme_subsys_class)) { 4756 result = PTR_ERR(nvme_subsys_class); 4757 goto destroy_class; 4758 } 4759 4760 result = alloc_chrdev_region(&nvme_ns_chr_devt, 0, NVME_MINORS, 4761 "nvme-generic"); 4762 if (result < 0) 4763 goto destroy_subsys_class; 4764 4765 nvme_ns_chr_class = class_create("nvme-generic"); 4766 if (IS_ERR(nvme_ns_chr_class)) { 4767 result = PTR_ERR(nvme_ns_chr_class); 4768 goto unregister_generic_ns; 4769 } 4770 4771 result = nvme_init_auth(); 4772 if (result) 4773 goto destroy_ns_chr; 4774 return 0; 4775 4776 destroy_ns_chr: 4777 class_destroy(nvme_ns_chr_class); 4778 unregister_generic_ns: 4779 unregister_chrdev_region(nvme_ns_chr_devt, NVME_MINORS); 4780 destroy_subsys_class: 4781 class_destroy(nvme_subsys_class); 4782 destroy_class: 4783 class_destroy(nvme_class); 4784 unregister_chrdev: 4785 unregister_chrdev_region(nvme_ctrl_base_chr_devt, NVME_MINORS); 4786 destroy_delete_wq: 4787 destroy_workqueue(nvme_delete_wq); 4788 destroy_reset_wq: 4789 destroy_workqueue(nvme_reset_wq); 4790 destroy_wq: 4791 destroy_workqueue(nvme_wq); 4792 out: 4793 return result; 4794 } 4795 4796 static void __exit nvme_core_exit(void) 4797 { 4798 nvme_exit_auth(); 4799 class_destroy(nvme_ns_chr_class); 4800 class_destroy(nvme_subsys_class); 4801 class_destroy(nvme_class); 4802 unregister_chrdev_region(nvme_ns_chr_devt, NVME_MINORS); 4803 unregister_chrdev_region(nvme_ctrl_base_chr_devt, NVME_MINORS); 4804 destroy_workqueue(nvme_delete_wq); 4805 destroy_workqueue(nvme_reset_wq); 4806 destroy_workqueue(nvme_wq); 4807 ida_destroy(&nvme_ns_chr_minor_ida); 4808 ida_destroy(&nvme_instance_ida); 4809 } 4810 4811 MODULE_LICENSE("GPL"); 4812 MODULE_VERSION("1.0"); 4813 module_init(nvme_core_init); 4814 module_exit(nvme_core_exit); 4815