1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * NVM Express device driver 4 * Copyright (c) 2011-2014, Intel Corporation. 5 */ 6 7 #include <linux/blkdev.h> 8 #include <linux/blk-mq.h> 9 #include <linux/blk-integrity.h> 10 #include <linux/compat.h> 11 #include <linux/delay.h> 12 #include <linux/errno.h> 13 #include <linux/hdreg.h> 14 #include <linux/kernel.h> 15 #include <linux/module.h> 16 #include <linux/backing-dev.h> 17 #include <linux/slab.h> 18 #include <linux/types.h> 19 #include <linux/pr.h> 20 #include <linux/ptrace.h> 21 #include <linux/nvme_ioctl.h> 22 #include <linux/pm_qos.h> 23 #include <asm/unaligned.h> 24 25 #include "nvme.h" 26 #include "fabrics.h" 27 #include <linux/nvme-auth.h> 28 29 #define CREATE_TRACE_POINTS 30 #include "trace.h" 31 32 #define NVME_MINORS (1U << MINORBITS) 33 34 struct nvme_ns_info { 35 struct nvme_ns_ids ids; 36 u32 nsid; 37 __le32 anagrpid; 38 bool is_shared; 39 bool is_readonly; 40 bool is_ready; 41 bool is_removed; 42 }; 43 44 unsigned int admin_timeout = 60; 45 module_param(admin_timeout, uint, 0644); 46 MODULE_PARM_DESC(admin_timeout, "timeout in seconds for admin commands"); 47 EXPORT_SYMBOL_GPL(admin_timeout); 48 49 unsigned int nvme_io_timeout = 30; 50 module_param_named(io_timeout, nvme_io_timeout, uint, 0644); 51 MODULE_PARM_DESC(io_timeout, "timeout in seconds for I/O"); 52 EXPORT_SYMBOL_GPL(nvme_io_timeout); 53 54 static unsigned char shutdown_timeout = 5; 55 module_param(shutdown_timeout, byte, 0644); 56 MODULE_PARM_DESC(shutdown_timeout, "timeout in seconds for controller shutdown"); 57 58 static u8 nvme_max_retries = 5; 59 module_param_named(max_retries, nvme_max_retries, byte, 0644); 60 MODULE_PARM_DESC(max_retries, "max number of retries a command may have"); 61 62 static unsigned long default_ps_max_latency_us = 100000; 63 module_param(default_ps_max_latency_us, ulong, 0644); 64 MODULE_PARM_DESC(default_ps_max_latency_us, 65 "max power saving latency for new devices; use PM QOS to change per device"); 66 67 static bool force_apst; 68 module_param(force_apst, bool, 0644); 69 MODULE_PARM_DESC(force_apst, "allow APST for newly enumerated devices even if quirked off"); 70 71 static unsigned long apst_primary_timeout_ms = 100; 72 module_param(apst_primary_timeout_ms, ulong, 0644); 73 MODULE_PARM_DESC(apst_primary_timeout_ms, 74 "primary APST timeout in ms"); 75 76 static unsigned long apst_secondary_timeout_ms = 2000; 77 module_param(apst_secondary_timeout_ms, ulong, 0644); 78 MODULE_PARM_DESC(apst_secondary_timeout_ms, 79 "secondary APST timeout in ms"); 80 81 static unsigned long apst_primary_latency_tol_us = 15000; 82 module_param(apst_primary_latency_tol_us, ulong, 0644); 83 MODULE_PARM_DESC(apst_primary_latency_tol_us, 84 "primary APST latency tolerance in us"); 85 86 static unsigned long apst_secondary_latency_tol_us = 100000; 87 module_param(apst_secondary_latency_tol_us, ulong, 0644); 88 MODULE_PARM_DESC(apst_secondary_latency_tol_us, 89 "secondary APST latency tolerance in us"); 90 91 /* 92 * nvme_wq - hosts nvme related works that are not reset or delete 93 * nvme_reset_wq - hosts nvme reset works 94 * nvme_delete_wq - hosts nvme delete works 95 * 96 * nvme_wq will host works such as scan, aen handling, fw activation, 97 * keep-alive, periodic reconnects etc. nvme_reset_wq 98 * runs reset works which also flush works hosted on nvme_wq for 99 * serialization purposes. nvme_delete_wq host controller deletion 100 * works which flush reset works for serialization. 101 */ 102 struct workqueue_struct *nvme_wq; 103 EXPORT_SYMBOL_GPL(nvme_wq); 104 105 struct workqueue_struct *nvme_reset_wq; 106 EXPORT_SYMBOL_GPL(nvme_reset_wq); 107 108 struct workqueue_struct *nvme_delete_wq; 109 EXPORT_SYMBOL_GPL(nvme_delete_wq); 110 111 static LIST_HEAD(nvme_subsystems); 112 static DEFINE_MUTEX(nvme_subsystems_lock); 113 114 static DEFINE_IDA(nvme_instance_ida); 115 static dev_t nvme_ctrl_base_chr_devt; 116 static struct class *nvme_class; 117 static struct class *nvme_subsys_class; 118 119 static DEFINE_IDA(nvme_ns_chr_minor_ida); 120 static dev_t nvme_ns_chr_devt; 121 static struct class *nvme_ns_chr_class; 122 123 static void nvme_put_subsystem(struct nvme_subsystem *subsys); 124 static void nvme_remove_invalid_namespaces(struct nvme_ctrl *ctrl, 125 unsigned nsid); 126 static void nvme_update_keep_alive(struct nvme_ctrl *ctrl, 127 struct nvme_command *cmd); 128 129 void nvme_queue_scan(struct nvme_ctrl *ctrl) 130 { 131 /* 132 * Only new queue scan work when admin and IO queues are both alive 133 */ 134 if (nvme_ctrl_state(ctrl) == NVME_CTRL_LIVE && ctrl->tagset) 135 queue_work(nvme_wq, &ctrl->scan_work); 136 } 137 138 /* 139 * Use this function to proceed with scheduling reset_work for a controller 140 * that had previously been set to the resetting state. This is intended for 141 * code paths that can't be interrupted by other reset attempts. A hot removal 142 * may prevent this from succeeding. 143 */ 144 int nvme_try_sched_reset(struct nvme_ctrl *ctrl) 145 { 146 if (nvme_ctrl_state(ctrl) != NVME_CTRL_RESETTING) 147 return -EBUSY; 148 if (!queue_work(nvme_reset_wq, &ctrl->reset_work)) 149 return -EBUSY; 150 return 0; 151 } 152 EXPORT_SYMBOL_GPL(nvme_try_sched_reset); 153 154 static void nvme_failfast_work(struct work_struct *work) 155 { 156 struct nvme_ctrl *ctrl = container_of(to_delayed_work(work), 157 struct nvme_ctrl, failfast_work); 158 159 if (nvme_ctrl_state(ctrl) != NVME_CTRL_CONNECTING) 160 return; 161 162 set_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags); 163 dev_info(ctrl->device, "failfast expired\n"); 164 nvme_kick_requeue_lists(ctrl); 165 } 166 167 static inline void nvme_start_failfast_work(struct nvme_ctrl *ctrl) 168 { 169 if (!ctrl->opts || ctrl->opts->fast_io_fail_tmo == -1) 170 return; 171 172 schedule_delayed_work(&ctrl->failfast_work, 173 ctrl->opts->fast_io_fail_tmo * HZ); 174 } 175 176 static inline void nvme_stop_failfast_work(struct nvme_ctrl *ctrl) 177 { 178 if (!ctrl->opts) 179 return; 180 181 cancel_delayed_work_sync(&ctrl->failfast_work); 182 clear_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags); 183 } 184 185 186 int nvme_reset_ctrl(struct nvme_ctrl *ctrl) 187 { 188 if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING)) 189 return -EBUSY; 190 if (!queue_work(nvme_reset_wq, &ctrl->reset_work)) 191 return -EBUSY; 192 return 0; 193 } 194 EXPORT_SYMBOL_GPL(nvme_reset_ctrl); 195 196 int nvme_reset_ctrl_sync(struct nvme_ctrl *ctrl) 197 { 198 int ret; 199 200 ret = nvme_reset_ctrl(ctrl); 201 if (!ret) { 202 flush_work(&ctrl->reset_work); 203 if (nvme_ctrl_state(ctrl) != NVME_CTRL_LIVE) 204 ret = -ENETRESET; 205 } 206 207 return ret; 208 } 209 210 static void nvme_do_delete_ctrl(struct nvme_ctrl *ctrl) 211 { 212 dev_info(ctrl->device, 213 "Removing ctrl: NQN \"%s\"\n", nvmf_ctrl_subsysnqn(ctrl)); 214 215 flush_work(&ctrl->reset_work); 216 nvme_stop_ctrl(ctrl); 217 nvme_remove_namespaces(ctrl); 218 ctrl->ops->delete_ctrl(ctrl); 219 nvme_uninit_ctrl(ctrl); 220 } 221 222 static void nvme_delete_ctrl_work(struct work_struct *work) 223 { 224 struct nvme_ctrl *ctrl = 225 container_of(work, struct nvme_ctrl, delete_work); 226 227 nvme_do_delete_ctrl(ctrl); 228 } 229 230 int nvme_delete_ctrl(struct nvme_ctrl *ctrl) 231 { 232 if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_DELETING)) 233 return -EBUSY; 234 if (!queue_work(nvme_delete_wq, &ctrl->delete_work)) 235 return -EBUSY; 236 return 0; 237 } 238 EXPORT_SYMBOL_GPL(nvme_delete_ctrl); 239 240 void nvme_delete_ctrl_sync(struct nvme_ctrl *ctrl) 241 { 242 /* 243 * Keep a reference until nvme_do_delete_ctrl() complete, 244 * since ->delete_ctrl can free the controller. 245 */ 246 nvme_get_ctrl(ctrl); 247 if (nvme_change_ctrl_state(ctrl, NVME_CTRL_DELETING)) 248 nvme_do_delete_ctrl(ctrl); 249 nvme_put_ctrl(ctrl); 250 } 251 252 static blk_status_t nvme_error_status(u16 status) 253 { 254 switch (status & 0x7ff) { 255 case NVME_SC_SUCCESS: 256 return BLK_STS_OK; 257 case NVME_SC_CAP_EXCEEDED: 258 return BLK_STS_NOSPC; 259 case NVME_SC_LBA_RANGE: 260 case NVME_SC_CMD_INTERRUPTED: 261 case NVME_SC_NS_NOT_READY: 262 return BLK_STS_TARGET; 263 case NVME_SC_BAD_ATTRIBUTES: 264 case NVME_SC_ONCS_NOT_SUPPORTED: 265 case NVME_SC_INVALID_OPCODE: 266 case NVME_SC_INVALID_FIELD: 267 case NVME_SC_INVALID_NS: 268 return BLK_STS_NOTSUPP; 269 case NVME_SC_WRITE_FAULT: 270 case NVME_SC_READ_ERROR: 271 case NVME_SC_UNWRITTEN_BLOCK: 272 case NVME_SC_ACCESS_DENIED: 273 case NVME_SC_READ_ONLY: 274 case NVME_SC_COMPARE_FAILED: 275 return BLK_STS_MEDIUM; 276 case NVME_SC_GUARD_CHECK: 277 case NVME_SC_APPTAG_CHECK: 278 case NVME_SC_REFTAG_CHECK: 279 case NVME_SC_INVALID_PI: 280 return BLK_STS_PROTECTION; 281 case NVME_SC_RESERVATION_CONFLICT: 282 return BLK_STS_RESV_CONFLICT; 283 case NVME_SC_HOST_PATH_ERROR: 284 return BLK_STS_TRANSPORT; 285 case NVME_SC_ZONE_TOO_MANY_ACTIVE: 286 return BLK_STS_ZONE_ACTIVE_RESOURCE; 287 case NVME_SC_ZONE_TOO_MANY_OPEN: 288 return BLK_STS_ZONE_OPEN_RESOURCE; 289 default: 290 return BLK_STS_IOERR; 291 } 292 } 293 294 static void nvme_retry_req(struct request *req) 295 { 296 unsigned long delay = 0; 297 u16 crd; 298 299 /* The mask and shift result must be <= 3 */ 300 crd = (nvme_req(req)->status & NVME_SC_CRD) >> 11; 301 if (crd) 302 delay = nvme_req(req)->ctrl->crdt[crd - 1] * 100; 303 304 nvme_req(req)->retries++; 305 blk_mq_requeue_request(req, false); 306 blk_mq_delay_kick_requeue_list(req->q, delay); 307 } 308 309 static void nvme_log_error(struct request *req) 310 { 311 struct nvme_ns *ns = req->q->queuedata; 312 struct nvme_request *nr = nvme_req(req); 313 314 if (ns) { 315 pr_err_ratelimited("%s: %s(0x%x) @ LBA %llu, %llu blocks, %s (sct 0x%x / sc 0x%x) %s%s\n", 316 ns->disk ? ns->disk->disk_name : "?", 317 nvme_get_opcode_str(nr->cmd->common.opcode), 318 nr->cmd->common.opcode, 319 (unsigned long long)nvme_sect_to_lba(ns, blk_rq_pos(req)), 320 (unsigned long long)blk_rq_bytes(req) >> ns->lba_shift, 321 nvme_get_error_status_str(nr->status), 322 nr->status >> 8 & 7, /* Status Code Type */ 323 nr->status & 0xff, /* Status Code */ 324 nr->status & NVME_SC_MORE ? "MORE " : "", 325 nr->status & NVME_SC_DNR ? "DNR " : ""); 326 return; 327 } 328 329 pr_err_ratelimited("%s: %s(0x%x), %s (sct 0x%x / sc 0x%x) %s%s\n", 330 dev_name(nr->ctrl->device), 331 nvme_get_admin_opcode_str(nr->cmd->common.opcode), 332 nr->cmd->common.opcode, 333 nvme_get_error_status_str(nr->status), 334 nr->status >> 8 & 7, /* Status Code Type */ 335 nr->status & 0xff, /* Status Code */ 336 nr->status & NVME_SC_MORE ? "MORE " : "", 337 nr->status & NVME_SC_DNR ? "DNR " : ""); 338 } 339 340 enum nvme_disposition { 341 COMPLETE, 342 RETRY, 343 FAILOVER, 344 AUTHENTICATE, 345 }; 346 347 static inline enum nvme_disposition nvme_decide_disposition(struct request *req) 348 { 349 if (likely(nvme_req(req)->status == 0)) 350 return COMPLETE; 351 352 if ((nvme_req(req)->status & 0x7ff) == NVME_SC_AUTH_REQUIRED) 353 return AUTHENTICATE; 354 355 if (blk_noretry_request(req) || 356 (nvme_req(req)->status & NVME_SC_DNR) || 357 nvme_req(req)->retries >= nvme_max_retries) 358 return COMPLETE; 359 360 if (req->cmd_flags & REQ_NVME_MPATH) { 361 if (nvme_is_path_error(nvme_req(req)->status) || 362 blk_queue_dying(req->q)) 363 return FAILOVER; 364 } else { 365 if (blk_queue_dying(req->q)) 366 return COMPLETE; 367 } 368 369 return RETRY; 370 } 371 372 static inline void nvme_end_req_zoned(struct request *req) 373 { 374 if (IS_ENABLED(CONFIG_BLK_DEV_ZONED) && 375 req_op(req) == REQ_OP_ZONE_APPEND) 376 req->__sector = nvme_lba_to_sect(req->q->queuedata, 377 le64_to_cpu(nvme_req(req)->result.u64)); 378 } 379 380 void nvme_end_req(struct request *req) 381 { 382 blk_status_t status = nvme_error_status(nvme_req(req)->status); 383 384 if (unlikely(nvme_req(req)->status && !(req->rq_flags & RQF_QUIET))) 385 nvme_log_error(req); 386 nvme_end_req_zoned(req); 387 nvme_trace_bio_complete(req); 388 if (req->cmd_flags & REQ_NVME_MPATH) 389 nvme_mpath_end_request(req); 390 blk_mq_end_request(req, status); 391 } 392 393 void nvme_complete_rq(struct request *req) 394 { 395 struct nvme_ctrl *ctrl = nvme_req(req)->ctrl; 396 397 trace_nvme_complete_rq(req); 398 nvme_cleanup_cmd(req); 399 400 /* 401 * Completions of long-running commands should not be able to 402 * defer sending of periodic keep alives, since the controller 403 * may have completed processing such commands a long time ago 404 * (arbitrarily close to command submission time). 405 * req->deadline - req->timeout is the command submission time 406 * in jiffies. 407 */ 408 if (ctrl->kas && 409 req->deadline - req->timeout >= ctrl->ka_last_check_time) 410 ctrl->comp_seen = true; 411 412 switch (nvme_decide_disposition(req)) { 413 case COMPLETE: 414 nvme_end_req(req); 415 return; 416 case RETRY: 417 nvme_retry_req(req); 418 return; 419 case FAILOVER: 420 nvme_failover_req(req); 421 return; 422 case AUTHENTICATE: 423 #ifdef CONFIG_NVME_AUTH 424 queue_work(nvme_wq, &ctrl->dhchap_auth_work); 425 nvme_retry_req(req); 426 #else 427 nvme_end_req(req); 428 #endif 429 return; 430 } 431 } 432 EXPORT_SYMBOL_GPL(nvme_complete_rq); 433 434 void nvme_complete_batch_req(struct request *req) 435 { 436 trace_nvme_complete_rq(req); 437 nvme_cleanup_cmd(req); 438 nvme_end_req_zoned(req); 439 } 440 EXPORT_SYMBOL_GPL(nvme_complete_batch_req); 441 442 /* 443 * Called to unwind from ->queue_rq on a failed command submission so that the 444 * multipathing code gets called to potentially failover to another path. 445 * The caller needs to unwind all transport specific resource allocations and 446 * must return propagate the return value. 447 */ 448 blk_status_t nvme_host_path_error(struct request *req) 449 { 450 nvme_req(req)->status = NVME_SC_HOST_PATH_ERROR; 451 blk_mq_set_request_complete(req); 452 nvme_complete_rq(req); 453 return BLK_STS_OK; 454 } 455 EXPORT_SYMBOL_GPL(nvme_host_path_error); 456 457 bool nvme_cancel_request(struct request *req, void *data) 458 { 459 dev_dbg_ratelimited(((struct nvme_ctrl *) data)->device, 460 "Cancelling I/O %d", req->tag); 461 462 /* don't abort one completed or idle request */ 463 if (blk_mq_rq_state(req) != MQ_RQ_IN_FLIGHT) 464 return true; 465 466 nvme_req(req)->status = NVME_SC_HOST_ABORTED_CMD; 467 nvme_req(req)->flags |= NVME_REQ_CANCELLED; 468 blk_mq_complete_request(req); 469 return true; 470 } 471 EXPORT_SYMBOL_GPL(nvme_cancel_request); 472 473 void nvme_cancel_tagset(struct nvme_ctrl *ctrl) 474 { 475 if (ctrl->tagset) { 476 blk_mq_tagset_busy_iter(ctrl->tagset, 477 nvme_cancel_request, ctrl); 478 blk_mq_tagset_wait_completed_request(ctrl->tagset); 479 } 480 } 481 EXPORT_SYMBOL_GPL(nvme_cancel_tagset); 482 483 void nvme_cancel_admin_tagset(struct nvme_ctrl *ctrl) 484 { 485 if (ctrl->admin_tagset) { 486 blk_mq_tagset_busy_iter(ctrl->admin_tagset, 487 nvme_cancel_request, ctrl); 488 blk_mq_tagset_wait_completed_request(ctrl->admin_tagset); 489 } 490 } 491 EXPORT_SYMBOL_GPL(nvme_cancel_admin_tagset); 492 493 bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl, 494 enum nvme_ctrl_state new_state) 495 { 496 enum nvme_ctrl_state old_state; 497 unsigned long flags; 498 bool changed = false; 499 500 spin_lock_irqsave(&ctrl->lock, flags); 501 502 old_state = nvme_ctrl_state(ctrl); 503 switch (new_state) { 504 case NVME_CTRL_LIVE: 505 switch (old_state) { 506 case NVME_CTRL_NEW: 507 case NVME_CTRL_RESETTING: 508 case NVME_CTRL_CONNECTING: 509 changed = true; 510 fallthrough; 511 default: 512 break; 513 } 514 break; 515 case NVME_CTRL_RESETTING: 516 switch (old_state) { 517 case NVME_CTRL_NEW: 518 case NVME_CTRL_LIVE: 519 changed = true; 520 fallthrough; 521 default: 522 break; 523 } 524 break; 525 case NVME_CTRL_CONNECTING: 526 switch (old_state) { 527 case NVME_CTRL_NEW: 528 case NVME_CTRL_RESETTING: 529 changed = true; 530 fallthrough; 531 default: 532 break; 533 } 534 break; 535 case NVME_CTRL_DELETING: 536 switch (old_state) { 537 case NVME_CTRL_LIVE: 538 case NVME_CTRL_RESETTING: 539 case NVME_CTRL_CONNECTING: 540 changed = true; 541 fallthrough; 542 default: 543 break; 544 } 545 break; 546 case NVME_CTRL_DELETING_NOIO: 547 switch (old_state) { 548 case NVME_CTRL_DELETING: 549 case NVME_CTRL_DEAD: 550 changed = true; 551 fallthrough; 552 default: 553 break; 554 } 555 break; 556 case NVME_CTRL_DEAD: 557 switch (old_state) { 558 case NVME_CTRL_DELETING: 559 changed = true; 560 fallthrough; 561 default: 562 break; 563 } 564 break; 565 default: 566 break; 567 } 568 569 if (changed) { 570 WRITE_ONCE(ctrl->state, new_state); 571 wake_up_all(&ctrl->state_wq); 572 } 573 574 spin_unlock_irqrestore(&ctrl->lock, flags); 575 if (!changed) 576 return false; 577 578 if (new_state == NVME_CTRL_LIVE) { 579 if (old_state == NVME_CTRL_CONNECTING) 580 nvme_stop_failfast_work(ctrl); 581 nvme_kick_requeue_lists(ctrl); 582 } else if (new_state == NVME_CTRL_CONNECTING && 583 old_state == NVME_CTRL_RESETTING) { 584 nvme_start_failfast_work(ctrl); 585 } 586 return changed; 587 } 588 EXPORT_SYMBOL_GPL(nvme_change_ctrl_state); 589 590 /* 591 * Waits for the controller state to be resetting, or returns false if it is 592 * not possible to ever transition to that state. 593 */ 594 bool nvme_wait_reset(struct nvme_ctrl *ctrl) 595 { 596 wait_event(ctrl->state_wq, 597 nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING) || 598 nvme_state_terminal(ctrl)); 599 return nvme_ctrl_state(ctrl) == NVME_CTRL_RESETTING; 600 } 601 EXPORT_SYMBOL_GPL(nvme_wait_reset); 602 603 static void nvme_free_ns_head(struct kref *ref) 604 { 605 struct nvme_ns_head *head = 606 container_of(ref, struct nvme_ns_head, ref); 607 608 nvme_mpath_remove_disk(head); 609 ida_free(&head->subsys->ns_ida, head->instance); 610 cleanup_srcu_struct(&head->srcu); 611 nvme_put_subsystem(head->subsys); 612 kfree(head); 613 } 614 615 bool nvme_tryget_ns_head(struct nvme_ns_head *head) 616 { 617 return kref_get_unless_zero(&head->ref); 618 } 619 620 void nvme_put_ns_head(struct nvme_ns_head *head) 621 { 622 kref_put(&head->ref, nvme_free_ns_head); 623 } 624 625 static void nvme_free_ns(struct kref *kref) 626 { 627 struct nvme_ns *ns = container_of(kref, struct nvme_ns, kref); 628 629 put_disk(ns->disk); 630 nvme_put_ns_head(ns->head); 631 nvme_put_ctrl(ns->ctrl); 632 kfree(ns); 633 } 634 635 static inline bool nvme_get_ns(struct nvme_ns *ns) 636 { 637 return kref_get_unless_zero(&ns->kref); 638 } 639 640 void nvme_put_ns(struct nvme_ns *ns) 641 { 642 kref_put(&ns->kref, nvme_free_ns); 643 } 644 EXPORT_SYMBOL_NS_GPL(nvme_put_ns, NVME_TARGET_PASSTHRU); 645 646 static inline void nvme_clear_nvme_request(struct request *req) 647 { 648 nvme_req(req)->status = 0; 649 nvme_req(req)->retries = 0; 650 nvme_req(req)->flags = 0; 651 req->rq_flags |= RQF_DONTPREP; 652 } 653 654 /* initialize a passthrough request */ 655 void nvme_init_request(struct request *req, struct nvme_command *cmd) 656 { 657 if (req->q->queuedata) 658 req->timeout = NVME_IO_TIMEOUT; 659 else /* no queuedata implies admin queue */ 660 req->timeout = NVME_ADMIN_TIMEOUT; 661 662 /* passthru commands should let the driver set the SGL flags */ 663 cmd->common.flags &= ~NVME_CMD_SGL_ALL; 664 665 req->cmd_flags |= REQ_FAILFAST_DRIVER; 666 if (req->mq_hctx->type == HCTX_TYPE_POLL) 667 req->cmd_flags |= REQ_POLLED; 668 nvme_clear_nvme_request(req); 669 req->rq_flags |= RQF_QUIET; 670 memcpy(nvme_req(req)->cmd, cmd, sizeof(*cmd)); 671 } 672 EXPORT_SYMBOL_GPL(nvme_init_request); 673 674 /* 675 * For something we're not in a state to send to the device the default action 676 * is to busy it and retry it after the controller state is recovered. However, 677 * if the controller is deleting or if anything is marked for failfast or 678 * nvme multipath it is immediately failed. 679 * 680 * Note: commands used to initialize the controller will be marked for failfast. 681 * Note: nvme cli/ioctl commands are marked for failfast. 682 */ 683 blk_status_t nvme_fail_nonready_command(struct nvme_ctrl *ctrl, 684 struct request *rq) 685 { 686 enum nvme_ctrl_state state = nvme_ctrl_state(ctrl); 687 688 if (state != NVME_CTRL_DELETING_NOIO && 689 state != NVME_CTRL_DELETING && 690 state != NVME_CTRL_DEAD && 691 !test_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags) && 692 !blk_noretry_request(rq) && !(rq->cmd_flags & REQ_NVME_MPATH)) 693 return BLK_STS_RESOURCE; 694 return nvme_host_path_error(rq); 695 } 696 EXPORT_SYMBOL_GPL(nvme_fail_nonready_command); 697 698 bool __nvme_check_ready(struct nvme_ctrl *ctrl, struct request *rq, 699 bool queue_live) 700 { 701 struct nvme_request *req = nvme_req(rq); 702 703 /* 704 * currently we have a problem sending passthru commands 705 * on the admin_q if the controller is not LIVE because we can't 706 * make sure that they are going out after the admin connect, 707 * controller enable and/or other commands in the initialization 708 * sequence. until the controller will be LIVE, fail with 709 * BLK_STS_RESOURCE so that they will be rescheduled. 710 */ 711 if (rq->q == ctrl->admin_q && (req->flags & NVME_REQ_USERCMD)) 712 return false; 713 714 if (ctrl->ops->flags & NVME_F_FABRICS) { 715 /* 716 * Only allow commands on a live queue, except for the connect 717 * command, which is require to set the queue live in the 718 * appropinquate states. 719 */ 720 switch (nvme_ctrl_state(ctrl)) { 721 case NVME_CTRL_CONNECTING: 722 if (blk_rq_is_passthrough(rq) && nvme_is_fabrics(req->cmd) && 723 (req->cmd->fabrics.fctype == nvme_fabrics_type_connect || 724 req->cmd->fabrics.fctype == nvme_fabrics_type_auth_send || 725 req->cmd->fabrics.fctype == nvme_fabrics_type_auth_receive)) 726 return true; 727 break; 728 default: 729 break; 730 case NVME_CTRL_DEAD: 731 return false; 732 } 733 } 734 735 return queue_live; 736 } 737 EXPORT_SYMBOL_GPL(__nvme_check_ready); 738 739 static inline void nvme_setup_flush(struct nvme_ns *ns, 740 struct nvme_command *cmnd) 741 { 742 memset(cmnd, 0, sizeof(*cmnd)); 743 cmnd->common.opcode = nvme_cmd_flush; 744 cmnd->common.nsid = cpu_to_le32(ns->head->ns_id); 745 } 746 747 static blk_status_t nvme_setup_discard(struct nvme_ns *ns, struct request *req, 748 struct nvme_command *cmnd) 749 { 750 unsigned short segments = blk_rq_nr_discard_segments(req), n = 0; 751 struct nvme_dsm_range *range; 752 struct bio *bio; 753 754 /* 755 * Some devices do not consider the DSM 'Number of Ranges' field when 756 * determining how much data to DMA. Always allocate memory for maximum 757 * number of segments to prevent device reading beyond end of buffer. 758 */ 759 static const size_t alloc_size = sizeof(*range) * NVME_DSM_MAX_RANGES; 760 761 range = kzalloc(alloc_size, GFP_ATOMIC | __GFP_NOWARN); 762 if (!range) { 763 /* 764 * If we fail allocation our range, fallback to the controller 765 * discard page. If that's also busy, it's safe to return 766 * busy, as we know we can make progress once that's freed. 767 */ 768 if (test_and_set_bit_lock(0, &ns->ctrl->discard_page_busy)) 769 return BLK_STS_RESOURCE; 770 771 range = page_address(ns->ctrl->discard_page); 772 } 773 774 if (queue_max_discard_segments(req->q) == 1) { 775 u64 slba = nvme_sect_to_lba(ns, blk_rq_pos(req)); 776 u32 nlb = blk_rq_sectors(req) >> (ns->lba_shift - 9); 777 778 range[0].cattr = cpu_to_le32(0); 779 range[0].nlb = cpu_to_le32(nlb); 780 range[0].slba = cpu_to_le64(slba); 781 n = 1; 782 } else { 783 __rq_for_each_bio(bio, req) { 784 u64 slba = nvme_sect_to_lba(ns, bio->bi_iter.bi_sector); 785 u32 nlb = bio->bi_iter.bi_size >> ns->lba_shift; 786 787 if (n < segments) { 788 range[n].cattr = cpu_to_le32(0); 789 range[n].nlb = cpu_to_le32(nlb); 790 range[n].slba = cpu_to_le64(slba); 791 } 792 n++; 793 } 794 } 795 796 if (WARN_ON_ONCE(n != segments)) { 797 if (virt_to_page(range) == ns->ctrl->discard_page) 798 clear_bit_unlock(0, &ns->ctrl->discard_page_busy); 799 else 800 kfree(range); 801 return BLK_STS_IOERR; 802 } 803 804 memset(cmnd, 0, sizeof(*cmnd)); 805 cmnd->dsm.opcode = nvme_cmd_dsm; 806 cmnd->dsm.nsid = cpu_to_le32(ns->head->ns_id); 807 cmnd->dsm.nr = cpu_to_le32(segments - 1); 808 cmnd->dsm.attributes = cpu_to_le32(NVME_DSMGMT_AD); 809 810 bvec_set_virt(&req->special_vec, range, alloc_size); 811 req->rq_flags |= RQF_SPECIAL_PAYLOAD; 812 813 return BLK_STS_OK; 814 } 815 816 static void nvme_set_ref_tag(struct nvme_ns *ns, struct nvme_command *cmnd, 817 struct request *req) 818 { 819 u32 upper, lower; 820 u64 ref48; 821 822 /* both rw and write zeroes share the same reftag format */ 823 switch (ns->guard_type) { 824 case NVME_NVM_NS_16B_GUARD: 825 cmnd->rw.reftag = cpu_to_le32(t10_pi_ref_tag(req)); 826 break; 827 case NVME_NVM_NS_64B_GUARD: 828 ref48 = ext_pi_ref_tag(req); 829 lower = lower_32_bits(ref48); 830 upper = upper_32_bits(ref48); 831 832 cmnd->rw.reftag = cpu_to_le32(lower); 833 cmnd->rw.cdw3 = cpu_to_le32(upper); 834 break; 835 default: 836 break; 837 } 838 } 839 840 static inline blk_status_t nvme_setup_write_zeroes(struct nvme_ns *ns, 841 struct request *req, struct nvme_command *cmnd) 842 { 843 memset(cmnd, 0, sizeof(*cmnd)); 844 845 if (ns->ctrl->quirks & NVME_QUIRK_DEALLOCATE_ZEROES) 846 return nvme_setup_discard(ns, req, cmnd); 847 848 cmnd->write_zeroes.opcode = nvme_cmd_write_zeroes; 849 cmnd->write_zeroes.nsid = cpu_to_le32(ns->head->ns_id); 850 cmnd->write_zeroes.slba = 851 cpu_to_le64(nvme_sect_to_lba(ns, blk_rq_pos(req))); 852 cmnd->write_zeroes.length = 853 cpu_to_le16((blk_rq_bytes(req) >> ns->lba_shift) - 1); 854 855 if (!(req->cmd_flags & REQ_NOUNMAP) && (ns->features & NVME_NS_DEAC)) 856 cmnd->write_zeroes.control |= cpu_to_le16(NVME_WZ_DEAC); 857 858 if (nvme_ns_has_pi(ns)) { 859 cmnd->write_zeroes.control |= cpu_to_le16(NVME_RW_PRINFO_PRACT); 860 861 switch (ns->pi_type) { 862 case NVME_NS_DPS_PI_TYPE1: 863 case NVME_NS_DPS_PI_TYPE2: 864 nvme_set_ref_tag(ns, cmnd, req); 865 break; 866 } 867 } 868 869 return BLK_STS_OK; 870 } 871 872 static inline blk_status_t nvme_setup_rw(struct nvme_ns *ns, 873 struct request *req, struct nvme_command *cmnd, 874 enum nvme_opcode op) 875 { 876 u16 control = 0; 877 u32 dsmgmt = 0; 878 879 if (req->cmd_flags & REQ_FUA) 880 control |= NVME_RW_FUA; 881 if (req->cmd_flags & (REQ_FAILFAST_DEV | REQ_RAHEAD)) 882 control |= NVME_RW_LR; 883 884 if (req->cmd_flags & REQ_RAHEAD) 885 dsmgmt |= NVME_RW_DSM_FREQ_PREFETCH; 886 887 cmnd->rw.opcode = op; 888 cmnd->rw.flags = 0; 889 cmnd->rw.nsid = cpu_to_le32(ns->head->ns_id); 890 cmnd->rw.cdw2 = 0; 891 cmnd->rw.cdw3 = 0; 892 cmnd->rw.metadata = 0; 893 cmnd->rw.slba = cpu_to_le64(nvme_sect_to_lba(ns, blk_rq_pos(req))); 894 cmnd->rw.length = cpu_to_le16((blk_rq_bytes(req) >> ns->lba_shift) - 1); 895 cmnd->rw.reftag = 0; 896 cmnd->rw.apptag = 0; 897 cmnd->rw.appmask = 0; 898 899 if (ns->ms) { 900 /* 901 * If formated with metadata, the block layer always provides a 902 * metadata buffer if CONFIG_BLK_DEV_INTEGRITY is enabled. Else 903 * we enable the PRACT bit for protection information or set the 904 * namespace capacity to zero to prevent any I/O. 905 */ 906 if (!blk_integrity_rq(req)) { 907 if (WARN_ON_ONCE(!nvme_ns_has_pi(ns))) 908 return BLK_STS_NOTSUPP; 909 control |= NVME_RW_PRINFO_PRACT; 910 } 911 912 switch (ns->pi_type) { 913 case NVME_NS_DPS_PI_TYPE3: 914 control |= NVME_RW_PRINFO_PRCHK_GUARD; 915 break; 916 case NVME_NS_DPS_PI_TYPE1: 917 case NVME_NS_DPS_PI_TYPE2: 918 control |= NVME_RW_PRINFO_PRCHK_GUARD | 919 NVME_RW_PRINFO_PRCHK_REF; 920 if (op == nvme_cmd_zone_append) 921 control |= NVME_RW_APPEND_PIREMAP; 922 nvme_set_ref_tag(ns, cmnd, req); 923 break; 924 } 925 } 926 927 cmnd->rw.control = cpu_to_le16(control); 928 cmnd->rw.dsmgmt = cpu_to_le32(dsmgmt); 929 return 0; 930 } 931 932 void nvme_cleanup_cmd(struct request *req) 933 { 934 if (req->rq_flags & RQF_SPECIAL_PAYLOAD) { 935 struct nvme_ctrl *ctrl = nvme_req(req)->ctrl; 936 937 if (req->special_vec.bv_page == ctrl->discard_page) 938 clear_bit_unlock(0, &ctrl->discard_page_busy); 939 else 940 kfree(bvec_virt(&req->special_vec)); 941 } 942 } 943 EXPORT_SYMBOL_GPL(nvme_cleanup_cmd); 944 945 blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req) 946 { 947 struct nvme_command *cmd = nvme_req(req)->cmd; 948 blk_status_t ret = BLK_STS_OK; 949 950 if (!(req->rq_flags & RQF_DONTPREP)) 951 nvme_clear_nvme_request(req); 952 953 switch (req_op(req)) { 954 case REQ_OP_DRV_IN: 955 case REQ_OP_DRV_OUT: 956 /* these are setup prior to execution in nvme_init_request() */ 957 break; 958 case REQ_OP_FLUSH: 959 nvme_setup_flush(ns, cmd); 960 break; 961 case REQ_OP_ZONE_RESET_ALL: 962 case REQ_OP_ZONE_RESET: 963 ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_RESET); 964 break; 965 case REQ_OP_ZONE_OPEN: 966 ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_OPEN); 967 break; 968 case REQ_OP_ZONE_CLOSE: 969 ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_CLOSE); 970 break; 971 case REQ_OP_ZONE_FINISH: 972 ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_FINISH); 973 break; 974 case REQ_OP_WRITE_ZEROES: 975 ret = nvme_setup_write_zeroes(ns, req, cmd); 976 break; 977 case REQ_OP_DISCARD: 978 ret = nvme_setup_discard(ns, req, cmd); 979 break; 980 case REQ_OP_READ: 981 ret = nvme_setup_rw(ns, req, cmd, nvme_cmd_read); 982 break; 983 case REQ_OP_WRITE: 984 ret = nvme_setup_rw(ns, req, cmd, nvme_cmd_write); 985 break; 986 case REQ_OP_ZONE_APPEND: 987 ret = nvme_setup_rw(ns, req, cmd, nvme_cmd_zone_append); 988 break; 989 default: 990 WARN_ON_ONCE(1); 991 return BLK_STS_IOERR; 992 } 993 994 cmd->common.command_id = nvme_cid(req); 995 trace_nvme_setup_cmd(req, cmd); 996 return ret; 997 } 998 EXPORT_SYMBOL_GPL(nvme_setup_cmd); 999 1000 /* 1001 * Return values: 1002 * 0: success 1003 * >0: nvme controller's cqe status response 1004 * <0: kernel error in lieu of controller response 1005 */ 1006 int nvme_execute_rq(struct request *rq, bool at_head) 1007 { 1008 blk_status_t status; 1009 1010 status = blk_execute_rq(rq, at_head); 1011 if (nvme_req(rq)->flags & NVME_REQ_CANCELLED) 1012 return -EINTR; 1013 if (nvme_req(rq)->status) 1014 return nvme_req(rq)->status; 1015 return blk_status_to_errno(status); 1016 } 1017 EXPORT_SYMBOL_NS_GPL(nvme_execute_rq, NVME_TARGET_PASSTHRU); 1018 1019 /* 1020 * Returns 0 on success. If the result is negative, it's a Linux error code; 1021 * if the result is positive, it's an NVM Express status code 1022 */ 1023 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 1024 union nvme_result *result, void *buffer, unsigned bufflen, 1025 int qid, int at_head, blk_mq_req_flags_t flags) 1026 { 1027 struct request *req; 1028 int ret; 1029 1030 if (qid == NVME_QID_ANY) 1031 req = blk_mq_alloc_request(q, nvme_req_op(cmd), flags); 1032 else 1033 req = blk_mq_alloc_request_hctx(q, nvme_req_op(cmd), flags, 1034 qid - 1); 1035 1036 if (IS_ERR(req)) 1037 return PTR_ERR(req); 1038 nvme_init_request(req, cmd); 1039 1040 if (buffer && bufflen) { 1041 ret = blk_rq_map_kern(q, req, buffer, bufflen, GFP_KERNEL); 1042 if (ret) 1043 goto out; 1044 } 1045 1046 ret = nvme_execute_rq(req, at_head); 1047 if (result && ret >= 0) 1048 *result = nvme_req(req)->result; 1049 out: 1050 blk_mq_free_request(req); 1051 return ret; 1052 } 1053 EXPORT_SYMBOL_GPL(__nvme_submit_sync_cmd); 1054 1055 int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 1056 void *buffer, unsigned bufflen) 1057 { 1058 return __nvme_submit_sync_cmd(q, cmd, NULL, buffer, bufflen, 1059 NVME_QID_ANY, 0, 0); 1060 } 1061 EXPORT_SYMBOL_GPL(nvme_submit_sync_cmd); 1062 1063 u32 nvme_command_effects(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u8 opcode) 1064 { 1065 u32 effects = 0; 1066 1067 if (ns) { 1068 effects = le32_to_cpu(ns->head->effects->iocs[opcode]); 1069 if (effects & ~(NVME_CMD_EFFECTS_CSUPP | NVME_CMD_EFFECTS_LBCC)) 1070 dev_warn_once(ctrl->device, 1071 "IO command:%02x has unusual effects:%08x\n", 1072 opcode, effects); 1073 1074 /* 1075 * NVME_CMD_EFFECTS_CSE_MASK causes a freeze all I/O queues, 1076 * which would deadlock when done on an I/O command. Note that 1077 * We already warn about an unusual effect above. 1078 */ 1079 effects &= ~NVME_CMD_EFFECTS_CSE_MASK; 1080 } else { 1081 effects = le32_to_cpu(ctrl->effects->acs[opcode]); 1082 } 1083 1084 return effects; 1085 } 1086 EXPORT_SYMBOL_NS_GPL(nvme_command_effects, NVME_TARGET_PASSTHRU); 1087 1088 u32 nvme_passthru_start(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u8 opcode) 1089 { 1090 u32 effects = nvme_command_effects(ctrl, ns, opcode); 1091 1092 /* 1093 * For simplicity, IO to all namespaces is quiesced even if the command 1094 * effects say only one namespace is affected. 1095 */ 1096 if (effects & NVME_CMD_EFFECTS_CSE_MASK) { 1097 mutex_lock(&ctrl->scan_lock); 1098 mutex_lock(&ctrl->subsys->lock); 1099 nvme_mpath_start_freeze(ctrl->subsys); 1100 nvme_mpath_wait_freeze(ctrl->subsys); 1101 nvme_start_freeze(ctrl); 1102 nvme_wait_freeze(ctrl); 1103 } 1104 return effects; 1105 } 1106 EXPORT_SYMBOL_NS_GPL(nvme_passthru_start, NVME_TARGET_PASSTHRU); 1107 1108 void nvme_passthru_end(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u32 effects, 1109 struct nvme_command *cmd, int status) 1110 { 1111 if (effects & NVME_CMD_EFFECTS_CSE_MASK) { 1112 nvme_unfreeze(ctrl); 1113 nvme_mpath_unfreeze(ctrl->subsys); 1114 mutex_unlock(&ctrl->subsys->lock); 1115 mutex_unlock(&ctrl->scan_lock); 1116 } 1117 if (effects & NVME_CMD_EFFECTS_CCC) { 1118 if (!test_and_set_bit(NVME_CTRL_DIRTY_CAPABILITY, 1119 &ctrl->flags)) { 1120 dev_info(ctrl->device, 1121 "controller capabilities changed, reset may be required to take effect.\n"); 1122 } 1123 } 1124 if (effects & (NVME_CMD_EFFECTS_NIC | NVME_CMD_EFFECTS_NCC)) { 1125 nvme_queue_scan(ctrl); 1126 flush_work(&ctrl->scan_work); 1127 } 1128 if (ns) 1129 return; 1130 1131 switch (cmd->common.opcode) { 1132 case nvme_admin_set_features: 1133 switch (le32_to_cpu(cmd->common.cdw10) & 0xFF) { 1134 case NVME_FEAT_KATO: 1135 /* 1136 * Keep alive commands interval on the host should be 1137 * updated when KATO is modified by Set Features 1138 * commands. 1139 */ 1140 if (!status) 1141 nvme_update_keep_alive(ctrl, cmd); 1142 break; 1143 default: 1144 break; 1145 } 1146 break; 1147 default: 1148 break; 1149 } 1150 } 1151 EXPORT_SYMBOL_NS_GPL(nvme_passthru_end, NVME_TARGET_PASSTHRU); 1152 1153 /* 1154 * Recommended frequency for KATO commands per NVMe 1.4 section 7.12.1: 1155 * 1156 * The host should send Keep Alive commands at half of the Keep Alive Timeout 1157 * accounting for transport roundtrip times [..]. 1158 */ 1159 static unsigned long nvme_keep_alive_work_period(struct nvme_ctrl *ctrl) 1160 { 1161 unsigned long delay = ctrl->kato * HZ / 2; 1162 1163 /* 1164 * When using Traffic Based Keep Alive, we need to run 1165 * nvme_keep_alive_work at twice the normal frequency, as one 1166 * command completion can postpone sending a keep alive command 1167 * by up to twice the delay between runs. 1168 */ 1169 if (ctrl->ctratt & NVME_CTRL_ATTR_TBKAS) 1170 delay /= 2; 1171 return delay; 1172 } 1173 1174 static void nvme_queue_keep_alive_work(struct nvme_ctrl *ctrl) 1175 { 1176 queue_delayed_work(nvme_wq, &ctrl->ka_work, 1177 nvme_keep_alive_work_period(ctrl)); 1178 } 1179 1180 static enum rq_end_io_ret nvme_keep_alive_end_io(struct request *rq, 1181 blk_status_t status) 1182 { 1183 struct nvme_ctrl *ctrl = rq->end_io_data; 1184 unsigned long flags; 1185 bool startka = false; 1186 unsigned long rtt = jiffies - (rq->deadline - rq->timeout); 1187 unsigned long delay = nvme_keep_alive_work_period(ctrl); 1188 1189 /* 1190 * Subtract off the keepalive RTT so nvme_keep_alive_work runs 1191 * at the desired frequency. 1192 */ 1193 if (rtt <= delay) { 1194 delay -= rtt; 1195 } else { 1196 dev_warn(ctrl->device, "long keepalive RTT (%u ms)\n", 1197 jiffies_to_msecs(rtt)); 1198 delay = 0; 1199 } 1200 1201 blk_mq_free_request(rq); 1202 1203 if (status) { 1204 dev_err(ctrl->device, 1205 "failed nvme_keep_alive_end_io error=%d\n", 1206 status); 1207 return RQ_END_IO_NONE; 1208 } 1209 1210 ctrl->ka_last_check_time = jiffies; 1211 ctrl->comp_seen = false; 1212 spin_lock_irqsave(&ctrl->lock, flags); 1213 if (ctrl->state == NVME_CTRL_LIVE || 1214 ctrl->state == NVME_CTRL_CONNECTING) 1215 startka = true; 1216 spin_unlock_irqrestore(&ctrl->lock, flags); 1217 if (startka) 1218 queue_delayed_work(nvme_wq, &ctrl->ka_work, delay); 1219 return RQ_END_IO_NONE; 1220 } 1221 1222 static void nvme_keep_alive_work(struct work_struct *work) 1223 { 1224 struct nvme_ctrl *ctrl = container_of(to_delayed_work(work), 1225 struct nvme_ctrl, ka_work); 1226 bool comp_seen = ctrl->comp_seen; 1227 struct request *rq; 1228 1229 ctrl->ka_last_check_time = jiffies; 1230 1231 if ((ctrl->ctratt & NVME_CTRL_ATTR_TBKAS) && comp_seen) { 1232 dev_dbg(ctrl->device, 1233 "reschedule traffic based keep-alive timer\n"); 1234 ctrl->comp_seen = false; 1235 nvme_queue_keep_alive_work(ctrl); 1236 return; 1237 } 1238 1239 rq = blk_mq_alloc_request(ctrl->admin_q, nvme_req_op(&ctrl->ka_cmd), 1240 BLK_MQ_REQ_RESERVED | BLK_MQ_REQ_NOWAIT); 1241 if (IS_ERR(rq)) { 1242 /* allocation failure, reset the controller */ 1243 dev_err(ctrl->device, "keep-alive failed: %ld\n", PTR_ERR(rq)); 1244 nvme_reset_ctrl(ctrl); 1245 return; 1246 } 1247 nvme_init_request(rq, &ctrl->ka_cmd); 1248 1249 rq->timeout = ctrl->kato * HZ; 1250 rq->end_io = nvme_keep_alive_end_io; 1251 rq->end_io_data = ctrl; 1252 blk_execute_rq_nowait(rq, false); 1253 } 1254 1255 static void nvme_start_keep_alive(struct nvme_ctrl *ctrl) 1256 { 1257 if (unlikely(ctrl->kato == 0)) 1258 return; 1259 1260 nvme_queue_keep_alive_work(ctrl); 1261 } 1262 1263 void nvme_stop_keep_alive(struct nvme_ctrl *ctrl) 1264 { 1265 if (unlikely(ctrl->kato == 0)) 1266 return; 1267 1268 cancel_delayed_work_sync(&ctrl->ka_work); 1269 } 1270 EXPORT_SYMBOL_GPL(nvme_stop_keep_alive); 1271 1272 static void nvme_update_keep_alive(struct nvme_ctrl *ctrl, 1273 struct nvme_command *cmd) 1274 { 1275 unsigned int new_kato = 1276 DIV_ROUND_UP(le32_to_cpu(cmd->common.cdw11), 1000); 1277 1278 dev_info(ctrl->device, 1279 "keep alive interval updated from %u ms to %u ms\n", 1280 ctrl->kato * 1000 / 2, new_kato * 1000 / 2); 1281 1282 nvme_stop_keep_alive(ctrl); 1283 ctrl->kato = new_kato; 1284 nvme_start_keep_alive(ctrl); 1285 } 1286 1287 /* 1288 * In NVMe 1.0 the CNS field was just a binary controller or namespace 1289 * flag, thus sending any new CNS opcodes has a big chance of not working. 1290 * Qemu unfortunately had that bug after reporting a 1.1 version compliance 1291 * (but not for any later version). 1292 */ 1293 static bool nvme_ctrl_limited_cns(struct nvme_ctrl *ctrl) 1294 { 1295 if (ctrl->quirks & NVME_QUIRK_IDENTIFY_CNS) 1296 return ctrl->vs < NVME_VS(1, 2, 0); 1297 return ctrl->vs < NVME_VS(1, 1, 0); 1298 } 1299 1300 static int nvme_identify_ctrl(struct nvme_ctrl *dev, struct nvme_id_ctrl **id) 1301 { 1302 struct nvme_command c = { }; 1303 int error; 1304 1305 /* gcc-4.4.4 (at least) has issues with initializers and anon unions */ 1306 c.identify.opcode = nvme_admin_identify; 1307 c.identify.cns = NVME_ID_CNS_CTRL; 1308 1309 *id = kmalloc(sizeof(struct nvme_id_ctrl), GFP_KERNEL); 1310 if (!*id) 1311 return -ENOMEM; 1312 1313 error = nvme_submit_sync_cmd(dev->admin_q, &c, *id, 1314 sizeof(struct nvme_id_ctrl)); 1315 if (error) 1316 kfree(*id); 1317 return error; 1318 } 1319 1320 static int nvme_process_ns_desc(struct nvme_ctrl *ctrl, struct nvme_ns_ids *ids, 1321 struct nvme_ns_id_desc *cur, bool *csi_seen) 1322 { 1323 const char *warn_str = "ctrl returned bogus length:"; 1324 void *data = cur; 1325 1326 switch (cur->nidt) { 1327 case NVME_NIDT_EUI64: 1328 if (cur->nidl != NVME_NIDT_EUI64_LEN) { 1329 dev_warn(ctrl->device, "%s %d for NVME_NIDT_EUI64\n", 1330 warn_str, cur->nidl); 1331 return -1; 1332 } 1333 if (ctrl->quirks & NVME_QUIRK_BOGUS_NID) 1334 return NVME_NIDT_EUI64_LEN; 1335 memcpy(ids->eui64, data + sizeof(*cur), NVME_NIDT_EUI64_LEN); 1336 return NVME_NIDT_EUI64_LEN; 1337 case NVME_NIDT_NGUID: 1338 if (cur->nidl != NVME_NIDT_NGUID_LEN) { 1339 dev_warn(ctrl->device, "%s %d for NVME_NIDT_NGUID\n", 1340 warn_str, cur->nidl); 1341 return -1; 1342 } 1343 if (ctrl->quirks & NVME_QUIRK_BOGUS_NID) 1344 return NVME_NIDT_NGUID_LEN; 1345 memcpy(ids->nguid, data + sizeof(*cur), NVME_NIDT_NGUID_LEN); 1346 return NVME_NIDT_NGUID_LEN; 1347 case NVME_NIDT_UUID: 1348 if (cur->nidl != NVME_NIDT_UUID_LEN) { 1349 dev_warn(ctrl->device, "%s %d for NVME_NIDT_UUID\n", 1350 warn_str, cur->nidl); 1351 return -1; 1352 } 1353 if (ctrl->quirks & NVME_QUIRK_BOGUS_NID) 1354 return NVME_NIDT_UUID_LEN; 1355 uuid_copy(&ids->uuid, data + sizeof(*cur)); 1356 return NVME_NIDT_UUID_LEN; 1357 case NVME_NIDT_CSI: 1358 if (cur->nidl != NVME_NIDT_CSI_LEN) { 1359 dev_warn(ctrl->device, "%s %d for NVME_NIDT_CSI\n", 1360 warn_str, cur->nidl); 1361 return -1; 1362 } 1363 memcpy(&ids->csi, data + sizeof(*cur), NVME_NIDT_CSI_LEN); 1364 *csi_seen = true; 1365 return NVME_NIDT_CSI_LEN; 1366 default: 1367 /* Skip unknown types */ 1368 return cur->nidl; 1369 } 1370 } 1371 1372 static int nvme_identify_ns_descs(struct nvme_ctrl *ctrl, 1373 struct nvme_ns_info *info) 1374 { 1375 struct nvme_command c = { }; 1376 bool csi_seen = false; 1377 int status, pos, len; 1378 void *data; 1379 1380 if (ctrl->vs < NVME_VS(1, 3, 0) && !nvme_multi_css(ctrl)) 1381 return 0; 1382 if (ctrl->quirks & NVME_QUIRK_NO_NS_DESC_LIST) 1383 return 0; 1384 1385 c.identify.opcode = nvme_admin_identify; 1386 c.identify.nsid = cpu_to_le32(info->nsid); 1387 c.identify.cns = NVME_ID_CNS_NS_DESC_LIST; 1388 1389 data = kzalloc(NVME_IDENTIFY_DATA_SIZE, GFP_KERNEL); 1390 if (!data) 1391 return -ENOMEM; 1392 1393 status = nvme_submit_sync_cmd(ctrl->admin_q, &c, data, 1394 NVME_IDENTIFY_DATA_SIZE); 1395 if (status) { 1396 dev_warn(ctrl->device, 1397 "Identify Descriptors failed (nsid=%u, status=0x%x)\n", 1398 info->nsid, status); 1399 goto free_data; 1400 } 1401 1402 for (pos = 0; pos < NVME_IDENTIFY_DATA_SIZE; pos += len) { 1403 struct nvme_ns_id_desc *cur = data + pos; 1404 1405 if (cur->nidl == 0) 1406 break; 1407 1408 len = nvme_process_ns_desc(ctrl, &info->ids, cur, &csi_seen); 1409 if (len < 0) 1410 break; 1411 1412 len += sizeof(*cur); 1413 } 1414 1415 if (nvme_multi_css(ctrl) && !csi_seen) { 1416 dev_warn(ctrl->device, "Command set not reported for nsid:%d\n", 1417 info->nsid); 1418 status = -EINVAL; 1419 } 1420 1421 free_data: 1422 kfree(data); 1423 return status; 1424 } 1425 1426 static int nvme_identify_ns(struct nvme_ctrl *ctrl, unsigned nsid, 1427 struct nvme_id_ns **id) 1428 { 1429 struct nvme_command c = { }; 1430 int error; 1431 1432 /* gcc-4.4.4 (at least) has issues with initializers and anon unions */ 1433 c.identify.opcode = nvme_admin_identify; 1434 c.identify.nsid = cpu_to_le32(nsid); 1435 c.identify.cns = NVME_ID_CNS_NS; 1436 1437 *id = kmalloc(sizeof(**id), GFP_KERNEL); 1438 if (!*id) 1439 return -ENOMEM; 1440 1441 error = nvme_submit_sync_cmd(ctrl->admin_q, &c, *id, sizeof(**id)); 1442 if (error) { 1443 dev_warn(ctrl->device, "Identify namespace failed (%d)\n", error); 1444 kfree(*id); 1445 } 1446 return error; 1447 } 1448 1449 static int nvme_ns_info_from_identify(struct nvme_ctrl *ctrl, 1450 struct nvme_ns_info *info) 1451 { 1452 struct nvme_ns_ids *ids = &info->ids; 1453 struct nvme_id_ns *id; 1454 int ret; 1455 1456 ret = nvme_identify_ns(ctrl, info->nsid, &id); 1457 if (ret) 1458 return ret; 1459 1460 if (id->ncap == 0) { 1461 /* namespace not allocated or attached */ 1462 info->is_removed = true; 1463 ret = -ENODEV; 1464 goto error; 1465 } 1466 1467 info->anagrpid = id->anagrpid; 1468 info->is_shared = id->nmic & NVME_NS_NMIC_SHARED; 1469 info->is_readonly = id->nsattr & NVME_NS_ATTR_RO; 1470 info->is_ready = true; 1471 if (ctrl->quirks & NVME_QUIRK_BOGUS_NID) { 1472 dev_info(ctrl->device, 1473 "Ignoring bogus Namespace Identifiers\n"); 1474 } else { 1475 if (ctrl->vs >= NVME_VS(1, 1, 0) && 1476 !memchr_inv(ids->eui64, 0, sizeof(ids->eui64))) 1477 memcpy(ids->eui64, id->eui64, sizeof(ids->eui64)); 1478 if (ctrl->vs >= NVME_VS(1, 2, 0) && 1479 !memchr_inv(ids->nguid, 0, sizeof(ids->nguid))) 1480 memcpy(ids->nguid, id->nguid, sizeof(ids->nguid)); 1481 } 1482 1483 error: 1484 kfree(id); 1485 return ret; 1486 } 1487 1488 static int nvme_ns_info_from_id_cs_indep(struct nvme_ctrl *ctrl, 1489 struct nvme_ns_info *info) 1490 { 1491 struct nvme_id_ns_cs_indep *id; 1492 struct nvme_command c = { 1493 .identify.opcode = nvme_admin_identify, 1494 .identify.nsid = cpu_to_le32(info->nsid), 1495 .identify.cns = NVME_ID_CNS_NS_CS_INDEP, 1496 }; 1497 int ret; 1498 1499 id = kmalloc(sizeof(*id), GFP_KERNEL); 1500 if (!id) 1501 return -ENOMEM; 1502 1503 ret = nvme_submit_sync_cmd(ctrl->admin_q, &c, id, sizeof(*id)); 1504 if (!ret) { 1505 info->anagrpid = id->anagrpid; 1506 info->is_shared = id->nmic & NVME_NS_NMIC_SHARED; 1507 info->is_readonly = id->nsattr & NVME_NS_ATTR_RO; 1508 info->is_ready = id->nstat & NVME_NSTAT_NRDY; 1509 } 1510 kfree(id); 1511 return ret; 1512 } 1513 1514 static int nvme_features(struct nvme_ctrl *dev, u8 op, unsigned int fid, 1515 unsigned int dword11, void *buffer, size_t buflen, u32 *result) 1516 { 1517 union nvme_result res = { 0 }; 1518 struct nvme_command c = { }; 1519 int ret; 1520 1521 c.features.opcode = op; 1522 c.features.fid = cpu_to_le32(fid); 1523 c.features.dword11 = cpu_to_le32(dword11); 1524 1525 ret = __nvme_submit_sync_cmd(dev->admin_q, &c, &res, 1526 buffer, buflen, NVME_QID_ANY, 0, 0); 1527 if (ret >= 0 && result) 1528 *result = le32_to_cpu(res.u32); 1529 return ret; 1530 } 1531 1532 int nvme_set_features(struct nvme_ctrl *dev, unsigned int fid, 1533 unsigned int dword11, void *buffer, size_t buflen, 1534 u32 *result) 1535 { 1536 return nvme_features(dev, nvme_admin_set_features, fid, dword11, buffer, 1537 buflen, result); 1538 } 1539 EXPORT_SYMBOL_GPL(nvme_set_features); 1540 1541 int nvme_get_features(struct nvme_ctrl *dev, unsigned int fid, 1542 unsigned int dword11, void *buffer, size_t buflen, 1543 u32 *result) 1544 { 1545 return nvme_features(dev, nvme_admin_get_features, fid, dword11, buffer, 1546 buflen, result); 1547 } 1548 EXPORT_SYMBOL_GPL(nvme_get_features); 1549 1550 int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count) 1551 { 1552 u32 q_count = (*count - 1) | ((*count - 1) << 16); 1553 u32 result; 1554 int status, nr_io_queues; 1555 1556 status = nvme_set_features(ctrl, NVME_FEAT_NUM_QUEUES, q_count, NULL, 0, 1557 &result); 1558 if (status < 0) 1559 return status; 1560 1561 /* 1562 * Degraded controllers might return an error when setting the queue 1563 * count. We still want to be able to bring them online and offer 1564 * access to the admin queue, as that might be only way to fix them up. 1565 */ 1566 if (status > 0) { 1567 dev_err(ctrl->device, "Could not set queue count (%d)\n", status); 1568 *count = 0; 1569 } else { 1570 nr_io_queues = min(result & 0xffff, result >> 16) + 1; 1571 *count = min(*count, nr_io_queues); 1572 } 1573 1574 return 0; 1575 } 1576 EXPORT_SYMBOL_GPL(nvme_set_queue_count); 1577 1578 #define NVME_AEN_SUPPORTED \ 1579 (NVME_AEN_CFG_NS_ATTR | NVME_AEN_CFG_FW_ACT | \ 1580 NVME_AEN_CFG_ANA_CHANGE | NVME_AEN_CFG_DISC_CHANGE) 1581 1582 static void nvme_enable_aen(struct nvme_ctrl *ctrl) 1583 { 1584 u32 result, supported_aens = ctrl->oaes & NVME_AEN_SUPPORTED; 1585 int status; 1586 1587 if (!supported_aens) 1588 return; 1589 1590 status = nvme_set_features(ctrl, NVME_FEAT_ASYNC_EVENT, supported_aens, 1591 NULL, 0, &result); 1592 if (status) 1593 dev_warn(ctrl->device, "Failed to configure AEN (cfg %x)\n", 1594 supported_aens); 1595 1596 queue_work(nvme_wq, &ctrl->async_event_work); 1597 } 1598 1599 static int nvme_ns_open(struct nvme_ns *ns) 1600 { 1601 1602 /* should never be called due to GENHD_FL_HIDDEN */ 1603 if (WARN_ON_ONCE(nvme_ns_head_multipath(ns->head))) 1604 goto fail; 1605 if (!nvme_get_ns(ns)) 1606 goto fail; 1607 if (!try_module_get(ns->ctrl->ops->module)) 1608 goto fail_put_ns; 1609 1610 return 0; 1611 1612 fail_put_ns: 1613 nvme_put_ns(ns); 1614 fail: 1615 return -ENXIO; 1616 } 1617 1618 static void nvme_ns_release(struct nvme_ns *ns) 1619 { 1620 1621 module_put(ns->ctrl->ops->module); 1622 nvme_put_ns(ns); 1623 } 1624 1625 static int nvme_open(struct gendisk *disk, blk_mode_t mode) 1626 { 1627 return nvme_ns_open(disk->private_data); 1628 } 1629 1630 static void nvme_release(struct gendisk *disk) 1631 { 1632 nvme_ns_release(disk->private_data); 1633 } 1634 1635 int nvme_getgeo(struct block_device *bdev, struct hd_geometry *geo) 1636 { 1637 /* some standard values */ 1638 geo->heads = 1 << 6; 1639 geo->sectors = 1 << 5; 1640 geo->cylinders = get_capacity(bdev->bd_disk) >> 11; 1641 return 0; 1642 } 1643 1644 #ifdef CONFIG_BLK_DEV_INTEGRITY 1645 static void nvme_init_integrity(struct gendisk *disk, struct nvme_ns *ns, 1646 u32 max_integrity_segments) 1647 { 1648 struct blk_integrity integrity = { }; 1649 1650 switch (ns->pi_type) { 1651 case NVME_NS_DPS_PI_TYPE3: 1652 switch (ns->guard_type) { 1653 case NVME_NVM_NS_16B_GUARD: 1654 integrity.profile = &t10_pi_type3_crc; 1655 integrity.tag_size = sizeof(u16) + sizeof(u32); 1656 integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE; 1657 break; 1658 case NVME_NVM_NS_64B_GUARD: 1659 integrity.profile = &ext_pi_type3_crc64; 1660 integrity.tag_size = sizeof(u16) + 6; 1661 integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE; 1662 break; 1663 default: 1664 integrity.profile = NULL; 1665 break; 1666 } 1667 break; 1668 case NVME_NS_DPS_PI_TYPE1: 1669 case NVME_NS_DPS_PI_TYPE2: 1670 switch (ns->guard_type) { 1671 case NVME_NVM_NS_16B_GUARD: 1672 integrity.profile = &t10_pi_type1_crc; 1673 integrity.tag_size = sizeof(u16); 1674 integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE; 1675 break; 1676 case NVME_NVM_NS_64B_GUARD: 1677 integrity.profile = &ext_pi_type1_crc64; 1678 integrity.tag_size = sizeof(u16); 1679 integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE; 1680 break; 1681 default: 1682 integrity.profile = NULL; 1683 break; 1684 } 1685 break; 1686 default: 1687 integrity.profile = NULL; 1688 break; 1689 } 1690 1691 integrity.tuple_size = ns->ms; 1692 blk_integrity_register(disk, &integrity); 1693 blk_queue_max_integrity_segments(disk->queue, max_integrity_segments); 1694 } 1695 #else 1696 static void nvme_init_integrity(struct gendisk *disk, struct nvme_ns *ns, 1697 u32 max_integrity_segments) 1698 { 1699 } 1700 #endif /* CONFIG_BLK_DEV_INTEGRITY */ 1701 1702 static void nvme_config_discard(struct gendisk *disk, struct nvme_ns *ns) 1703 { 1704 struct nvme_ctrl *ctrl = ns->ctrl; 1705 struct request_queue *queue = disk->queue; 1706 u32 size = queue_logical_block_size(queue); 1707 1708 if (ctrl->dmrsl && ctrl->dmrsl <= nvme_sect_to_lba(ns, UINT_MAX)) 1709 ctrl->max_discard_sectors = nvme_lba_to_sect(ns, ctrl->dmrsl); 1710 1711 if (ctrl->max_discard_sectors == 0) { 1712 blk_queue_max_discard_sectors(queue, 0); 1713 return; 1714 } 1715 1716 BUILD_BUG_ON(PAGE_SIZE / sizeof(struct nvme_dsm_range) < 1717 NVME_DSM_MAX_RANGES); 1718 1719 queue->limits.discard_granularity = size; 1720 1721 /* If discard is already enabled, don't reset queue limits */ 1722 if (queue->limits.max_discard_sectors) 1723 return; 1724 1725 blk_queue_max_discard_sectors(queue, ctrl->max_discard_sectors); 1726 blk_queue_max_discard_segments(queue, ctrl->max_discard_segments); 1727 1728 if (ctrl->quirks & NVME_QUIRK_DEALLOCATE_ZEROES) 1729 blk_queue_max_write_zeroes_sectors(queue, UINT_MAX); 1730 } 1731 1732 static bool nvme_ns_ids_equal(struct nvme_ns_ids *a, struct nvme_ns_ids *b) 1733 { 1734 return uuid_equal(&a->uuid, &b->uuid) && 1735 memcmp(&a->nguid, &b->nguid, sizeof(a->nguid)) == 0 && 1736 memcmp(&a->eui64, &b->eui64, sizeof(a->eui64)) == 0 && 1737 a->csi == b->csi; 1738 } 1739 1740 static int nvme_init_ms(struct nvme_ns *ns, struct nvme_id_ns *id) 1741 { 1742 bool first = id->dps & NVME_NS_DPS_PI_FIRST; 1743 unsigned lbaf = nvme_lbaf_index(id->flbas); 1744 struct nvme_ctrl *ctrl = ns->ctrl; 1745 struct nvme_command c = { }; 1746 struct nvme_id_ns_nvm *nvm; 1747 int ret = 0; 1748 u32 elbaf; 1749 1750 ns->pi_size = 0; 1751 ns->ms = le16_to_cpu(id->lbaf[lbaf].ms); 1752 if (!(ctrl->ctratt & NVME_CTRL_ATTR_ELBAS)) { 1753 ns->pi_size = sizeof(struct t10_pi_tuple); 1754 ns->guard_type = NVME_NVM_NS_16B_GUARD; 1755 goto set_pi; 1756 } 1757 1758 nvm = kzalloc(sizeof(*nvm), GFP_KERNEL); 1759 if (!nvm) 1760 return -ENOMEM; 1761 1762 c.identify.opcode = nvme_admin_identify; 1763 c.identify.nsid = cpu_to_le32(ns->head->ns_id); 1764 c.identify.cns = NVME_ID_CNS_CS_NS; 1765 c.identify.csi = NVME_CSI_NVM; 1766 1767 ret = nvme_submit_sync_cmd(ns->ctrl->admin_q, &c, nvm, sizeof(*nvm)); 1768 if (ret) 1769 goto free_data; 1770 1771 elbaf = le32_to_cpu(nvm->elbaf[lbaf]); 1772 1773 /* no support for storage tag formats right now */ 1774 if (nvme_elbaf_sts(elbaf)) 1775 goto free_data; 1776 1777 ns->guard_type = nvme_elbaf_guard_type(elbaf); 1778 switch (ns->guard_type) { 1779 case NVME_NVM_NS_64B_GUARD: 1780 ns->pi_size = sizeof(struct crc64_pi_tuple); 1781 break; 1782 case NVME_NVM_NS_16B_GUARD: 1783 ns->pi_size = sizeof(struct t10_pi_tuple); 1784 break; 1785 default: 1786 break; 1787 } 1788 1789 free_data: 1790 kfree(nvm); 1791 set_pi: 1792 if (ns->pi_size && (first || ns->ms == ns->pi_size)) 1793 ns->pi_type = id->dps & NVME_NS_DPS_PI_MASK; 1794 else 1795 ns->pi_type = 0; 1796 1797 return ret; 1798 } 1799 1800 static int nvme_configure_metadata(struct nvme_ns *ns, struct nvme_id_ns *id) 1801 { 1802 struct nvme_ctrl *ctrl = ns->ctrl; 1803 int ret; 1804 1805 ret = nvme_init_ms(ns, id); 1806 if (ret) 1807 return ret; 1808 1809 ns->features &= ~(NVME_NS_METADATA_SUPPORTED | NVME_NS_EXT_LBAS); 1810 if (!ns->ms || !(ctrl->ops->flags & NVME_F_METADATA_SUPPORTED)) 1811 return 0; 1812 1813 if (ctrl->ops->flags & NVME_F_FABRICS) { 1814 /* 1815 * The NVMe over Fabrics specification only supports metadata as 1816 * part of the extended data LBA. We rely on HCA/HBA support to 1817 * remap the separate metadata buffer from the block layer. 1818 */ 1819 if (WARN_ON_ONCE(!(id->flbas & NVME_NS_FLBAS_META_EXT))) 1820 return 0; 1821 1822 ns->features |= NVME_NS_EXT_LBAS; 1823 1824 /* 1825 * The current fabrics transport drivers support namespace 1826 * metadata formats only if nvme_ns_has_pi() returns true. 1827 * Suppress support for all other formats so the namespace will 1828 * have a 0 capacity and not be usable through the block stack. 1829 * 1830 * Note, this check will need to be modified if any drivers 1831 * gain the ability to use other metadata formats. 1832 */ 1833 if (ctrl->max_integrity_segments && nvme_ns_has_pi(ns)) 1834 ns->features |= NVME_NS_METADATA_SUPPORTED; 1835 } else { 1836 /* 1837 * For PCIe controllers, we can't easily remap the separate 1838 * metadata buffer from the block layer and thus require a 1839 * separate metadata buffer for block layer metadata/PI support. 1840 * We allow extended LBAs for the passthrough interface, though. 1841 */ 1842 if (id->flbas & NVME_NS_FLBAS_META_EXT) 1843 ns->features |= NVME_NS_EXT_LBAS; 1844 else 1845 ns->features |= NVME_NS_METADATA_SUPPORTED; 1846 } 1847 return 0; 1848 } 1849 1850 static void nvme_set_queue_limits(struct nvme_ctrl *ctrl, 1851 struct request_queue *q) 1852 { 1853 bool vwc = ctrl->vwc & NVME_CTRL_VWC_PRESENT; 1854 1855 if (ctrl->max_hw_sectors) { 1856 u32 max_segments = 1857 (ctrl->max_hw_sectors / (NVME_CTRL_PAGE_SIZE >> 9)) + 1; 1858 1859 max_segments = min_not_zero(max_segments, ctrl->max_segments); 1860 blk_queue_max_hw_sectors(q, ctrl->max_hw_sectors); 1861 blk_queue_max_segments(q, min_t(u32, max_segments, USHRT_MAX)); 1862 } 1863 blk_queue_virt_boundary(q, NVME_CTRL_PAGE_SIZE - 1); 1864 blk_queue_dma_alignment(q, 3); 1865 blk_queue_write_cache(q, vwc, vwc); 1866 } 1867 1868 static void nvme_update_disk_info(struct gendisk *disk, 1869 struct nvme_ns *ns, struct nvme_id_ns *id) 1870 { 1871 sector_t capacity = nvme_lba_to_sect(ns, le64_to_cpu(id->nsze)); 1872 u32 bs = 1U << ns->lba_shift; 1873 u32 atomic_bs, phys_bs, io_opt = 0; 1874 1875 /* 1876 * The block layer can't support LBA sizes larger than the page size 1877 * or smaller than a sector size yet, so catch this early and don't 1878 * allow block I/O. 1879 */ 1880 if (ns->lba_shift > PAGE_SHIFT || ns->lba_shift < SECTOR_SHIFT) { 1881 capacity = 0; 1882 bs = (1 << 9); 1883 } 1884 1885 blk_integrity_unregister(disk); 1886 1887 atomic_bs = phys_bs = bs; 1888 if (id->nabo == 0) { 1889 /* 1890 * Bit 1 indicates whether NAWUPF is defined for this namespace 1891 * and whether it should be used instead of AWUPF. If NAWUPF == 1892 * 0 then AWUPF must be used instead. 1893 */ 1894 if (id->nsfeat & NVME_NS_FEAT_ATOMICS && id->nawupf) 1895 atomic_bs = (1 + le16_to_cpu(id->nawupf)) * bs; 1896 else 1897 atomic_bs = (1 + ns->ctrl->subsys->awupf) * bs; 1898 } 1899 1900 if (id->nsfeat & NVME_NS_FEAT_IO_OPT) { 1901 /* NPWG = Namespace Preferred Write Granularity */ 1902 phys_bs = bs * (1 + le16_to_cpu(id->npwg)); 1903 /* NOWS = Namespace Optimal Write Size */ 1904 io_opt = bs * (1 + le16_to_cpu(id->nows)); 1905 } 1906 1907 blk_queue_logical_block_size(disk->queue, bs); 1908 /* 1909 * Linux filesystems assume writing a single physical block is 1910 * an atomic operation. Hence limit the physical block size to the 1911 * value of the Atomic Write Unit Power Fail parameter. 1912 */ 1913 blk_queue_physical_block_size(disk->queue, min(phys_bs, atomic_bs)); 1914 blk_queue_io_min(disk->queue, phys_bs); 1915 blk_queue_io_opt(disk->queue, io_opt); 1916 1917 /* 1918 * Register a metadata profile for PI, or the plain non-integrity NVMe 1919 * metadata masquerading as Type 0 if supported, otherwise reject block 1920 * I/O to namespaces with metadata except when the namespace supports 1921 * PI, as it can strip/insert in that case. 1922 */ 1923 if (ns->ms) { 1924 if (IS_ENABLED(CONFIG_BLK_DEV_INTEGRITY) && 1925 (ns->features & NVME_NS_METADATA_SUPPORTED)) 1926 nvme_init_integrity(disk, ns, 1927 ns->ctrl->max_integrity_segments); 1928 else if (!nvme_ns_has_pi(ns)) 1929 capacity = 0; 1930 } 1931 1932 set_capacity_and_notify(disk, capacity); 1933 1934 nvme_config_discard(disk, ns); 1935 blk_queue_max_write_zeroes_sectors(disk->queue, 1936 ns->ctrl->max_zeroes_sectors); 1937 } 1938 1939 static bool nvme_ns_is_readonly(struct nvme_ns *ns, struct nvme_ns_info *info) 1940 { 1941 return info->is_readonly || test_bit(NVME_NS_FORCE_RO, &ns->flags); 1942 } 1943 1944 static inline bool nvme_first_scan(struct gendisk *disk) 1945 { 1946 /* nvme_alloc_ns() scans the disk prior to adding it */ 1947 return !disk_live(disk); 1948 } 1949 1950 static void nvme_set_chunk_sectors(struct nvme_ns *ns, struct nvme_id_ns *id) 1951 { 1952 struct nvme_ctrl *ctrl = ns->ctrl; 1953 u32 iob; 1954 1955 if ((ctrl->quirks & NVME_QUIRK_STRIPE_SIZE) && 1956 is_power_of_2(ctrl->max_hw_sectors)) 1957 iob = ctrl->max_hw_sectors; 1958 else 1959 iob = nvme_lba_to_sect(ns, le16_to_cpu(id->noiob)); 1960 1961 if (!iob) 1962 return; 1963 1964 if (!is_power_of_2(iob)) { 1965 if (nvme_first_scan(ns->disk)) 1966 pr_warn("%s: ignoring unaligned IO boundary:%u\n", 1967 ns->disk->disk_name, iob); 1968 return; 1969 } 1970 1971 if (blk_queue_is_zoned(ns->disk->queue)) { 1972 if (nvme_first_scan(ns->disk)) 1973 pr_warn("%s: ignoring zoned namespace IO boundary\n", 1974 ns->disk->disk_name); 1975 return; 1976 } 1977 1978 blk_queue_chunk_sectors(ns->queue, iob); 1979 } 1980 1981 static int nvme_update_ns_info_generic(struct nvme_ns *ns, 1982 struct nvme_ns_info *info) 1983 { 1984 blk_mq_freeze_queue(ns->disk->queue); 1985 nvme_set_queue_limits(ns->ctrl, ns->queue); 1986 set_disk_ro(ns->disk, nvme_ns_is_readonly(ns, info)); 1987 blk_mq_unfreeze_queue(ns->disk->queue); 1988 1989 if (nvme_ns_head_multipath(ns->head)) { 1990 blk_mq_freeze_queue(ns->head->disk->queue); 1991 set_disk_ro(ns->head->disk, nvme_ns_is_readonly(ns, info)); 1992 nvme_mpath_revalidate_paths(ns); 1993 blk_stack_limits(&ns->head->disk->queue->limits, 1994 &ns->queue->limits, 0); 1995 ns->head->disk->flags |= GENHD_FL_HIDDEN; 1996 blk_mq_unfreeze_queue(ns->head->disk->queue); 1997 } 1998 1999 /* Hide the block-interface for these devices */ 2000 ns->disk->flags |= GENHD_FL_HIDDEN; 2001 set_bit(NVME_NS_READY, &ns->flags); 2002 2003 return 0; 2004 } 2005 2006 static int nvme_update_ns_info_block(struct nvme_ns *ns, 2007 struct nvme_ns_info *info) 2008 { 2009 struct nvme_id_ns *id; 2010 unsigned lbaf; 2011 int ret; 2012 2013 ret = nvme_identify_ns(ns->ctrl, info->nsid, &id); 2014 if (ret) 2015 return ret; 2016 2017 if (id->ncap == 0) { 2018 /* namespace not allocated or attached */ 2019 info->is_removed = true; 2020 ret = -ENODEV; 2021 goto error; 2022 } 2023 2024 blk_mq_freeze_queue(ns->disk->queue); 2025 lbaf = nvme_lbaf_index(id->flbas); 2026 ns->lba_shift = id->lbaf[lbaf].ds; 2027 nvme_set_queue_limits(ns->ctrl, ns->queue); 2028 2029 ret = nvme_configure_metadata(ns, id); 2030 if (ret < 0) { 2031 blk_mq_unfreeze_queue(ns->disk->queue); 2032 goto out; 2033 } 2034 nvme_set_chunk_sectors(ns, id); 2035 nvme_update_disk_info(ns->disk, ns, id); 2036 2037 if (ns->head->ids.csi == NVME_CSI_ZNS) { 2038 ret = nvme_update_zone_info(ns, lbaf); 2039 if (ret) { 2040 blk_mq_unfreeze_queue(ns->disk->queue); 2041 goto out; 2042 } 2043 } 2044 2045 /* 2046 * Only set the DEAC bit if the device guarantees that reads from 2047 * deallocated data return zeroes. While the DEAC bit does not 2048 * require that, it must be a no-op if reads from deallocated data 2049 * do not return zeroes. 2050 */ 2051 if ((id->dlfeat & 0x7) == 0x1 && (id->dlfeat & (1 << 3))) 2052 ns->features |= NVME_NS_DEAC; 2053 set_disk_ro(ns->disk, nvme_ns_is_readonly(ns, info)); 2054 set_bit(NVME_NS_READY, &ns->flags); 2055 blk_mq_unfreeze_queue(ns->disk->queue); 2056 2057 if (blk_queue_is_zoned(ns->queue)) { 2058 ret = nvme_revalidate_zones(ns); 2059 if (ret && !nvme_first_scan(ns->disk)) 2060 goto out; 2061 } 2062 2063 if (nvme_ns_head_multipath(ns->head)) { 2064 blk_mq_freeze_queue(ns->head->disk->queue); 2065 nvme_update_disk_info(ns->head->disk, ns, id); 2066 set_disk_ro(ns->head->disk, nvme_ns_is_readonly(ns, info)); 2067 nvme_mpath_revalidate_paths(ns); 2068 blk_stack_limits(&ns->head->disk->queue->limits, 2069 &ns->queue->limits, 0); 2070 disk_update_readahead(ns->head->disk); 2071 blk_mq_unfreeze_queue(ns->head->disk->queue); 2072 } 2073 2074 ret = 0; 2075 out: 2076 /* 2077 * If probing fails due an unsupported feature, hide the block device, 2078 * but still allow other access. 2079 */ 2080 if (ret == -ENODEV) { 2081 ns->disk->flags |= GENHD_FL_HIDDEN; 2082 set_bit(NVME_NS_READY, &ns->flags); 2083 ret = 0; 2084 } 2085 2086 error: 2087 kfree(id); 2088 return ret; 2089 } 2090 2091 static int nvme_update_ns_info(struct nvme_ns *ns, struct nvme_ns_info *info) 2092 { 2093 switch (info->ids.csi) { 2094 case NVME_CSI_ZNS: 2095 if (!IS_ENABLED(CONFIG_BLK_DEV_ZONED)) { 2096 dev_info(ns->ctrl->device, 2097 "block device for nsid %u not supported without CONFIG_BLK_DEV_ZONED\n", 2098 info->nsid); 2099 return nvme_update_ns_info_generic(ns, info); 2100 } 2101 return nvme_update_ns_info_block(ns, info); 2102 case NVME_CSI_NVM: 2103 return nvme_update_ns_info_block(ns, info); 2104 default: 2105 dev_info(ns->ctrl->device, 2106 "block device for nsid %u not supported (csi %u)\n", 2107 info->nsid, info->ids.csi); 2108 return nvme_update_ns_info_generic(ns, info); 2109 } 2110 } 2111 2112 #ifdef CONFIG_BLK_SED_OPAL 2113 static int nvme_sec_submit(void *data, u16 spsp, u8 secp, void *buffer, size_t len, 2114 bool send) 2115 { 2116 struct nvme_ctrl *ctrl = data; 2117 struct nvme_command cmd = { }; 2118 2119 if (send) 2120 cmd.common.opcode = nvme_admin_security_send; 2121 else 2122 cmd.common.opcode = nvme_admin_security_recv; 2123 cmd.common.nsid = 0; 2124 cmd.common.cdw10 = cpu_to_le32(((u32)secp) << 24 | ((u32)spsp) << 8); 2125 cmd.common.cdw11 = cpu_to_le32(len); 2126 2127 return __nvme_submit_sync_cmd(ctrl->admin_q, &cmd, NULL, buffer, len, 2128 NVME_QID_ANY, 1, 0); 2129 } 2130 2131 static void nvme_configure_opal(struct nvme_ctrl *ctrl, bool was_suspended) 2132 { 2133 if (ctrl->oacs & NVME_CTRL_OACS_SEC_SUPP) { 2134 if (!ctrl->opal_dev) 2135 ctrl->opal_dev = init_opal_dev(ctrl, &nvme_sec_submit); 2136 else if (was_suspended) 2137 opal_unlock_from_suspend(ctrl->opal_dev); 2138 } else { 2139 free_opal_dev(ctrl->opal_dev); 2140 ctrl->opal_dev = NULL; 2141 } 2142 } 2143 #else 2144 static void nvme_configure_opal(struct nvme_ctrl *ctrl, bool was_suspended) 2145 { 2146 } 2147 #endif /* CONFIG_BLK_SED_OPAL */ 2148 2149 #ifdef CONFIG_BLK_DEV_ZONED 2150 static int nvme_report_zones(struct gendisk *disk, sector_t sector, 2151 unsigned int nr_zones, report_zones_cb cb, void *data) 2152 { 2153 return nvme_ns_report_zones(disk->private_data, sector, nr_zones, cb, 2154 data); 2155 } 2156 #else 2157 #define nvme_report_zones NULL 2158 #endif /* CONFIG_BLK_DEV_ZONED */ 2159 2160 const struct block_device_operations nvme_bdev_ops = { 2161 .owner = THIS_MODULE, 2162 .ioctl = nvme_ioctl, 2163 .compat_ioctl = blkdev_compat_ptr_ioctl, 2164 .open = nvme_open, 2165 .release = nvme_release, 2166 .getgeo = nvme_getgeo, 2167 .report_zones = nvme_report_zones, 2168 .pr_ops = &nvme_pr_ops, 2169 }; 2170 2171 static int nvme_wait_ready(struct nvme_ctrl *ctrl, u32 mask, u32 val, 2172 u32 timeout, const char *op) 2173 { 2174 unsigned long timeout_jiffies = jiffies + timeout * HZ; 2175 u32 csts; 2176 int ret; 2177 2178 while ((ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts)) == 0) { 2179 if (csts == ~0) 2180 return -ENODEV; 2181 if ((csts & mask) == val) 2182 break; 2183 2184 usleep_range(1000, 2000); 2185 if (fatal_signal_pending(current)) 2186 return -EINTR; 2187 if (time_after(jiffies, timeout_jiffies)) { 2188 dev_err(ctrl->device, 2189 "Device not ready; aborting %s, CSTS=0x%x\n", 2190 op, csts); 2191 return -ENODEV; 2192 } 2193 } 2194 2195 return ret; 2196 } 2197 2198 int nvme_disable_ctrl(struct nvme_ctrl *ctrl, bool shutdown) 2199 { 2200 int ret; 2201 2202 ctrl->ctrl_config &= ~NVME_CC_SHN_MASK; 2203 if (shutdown) 2204 ctrl->ctrl_config |= NVME_CC_SHN_NORMAL; 2205 else 2206 ctrl->ctrl_config &= ~NVME_CC_ENABLE; 2207 2208 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config); 2209 if (ret) 2210 return ret; 2211 2212 if (shutdown) { 2213 return nvme_wait_ready(ctrl, NVME_CSTS_SHST_MASK, 2214 NVME_CSTS_SHST_CMPLT, 2215 ctrl->shutdown_timeout, "shutdown"); 2216 } 2217 if (ctrl->quirks & NVME_QUIRK_DELAY_BEFORE_CHK_RDY) 2218 msleep(NVME_QUIRK_DELAY_AMOUNT); 2219 return nvme_wait_ready(ctrl, NVME_CSTS_RDY, 0, 2220 (NVME_CAP_TIMEOUT(ctrl->cap) + 1) / 2, "reset"); 2221 } 2222 EXPORT_SYMBOL_GPL(nvme_disable_ctrl); 2223 2224 int nvme_enable_ctrl(struct nvme_ctrl *ctrl) 2225 { 2226 unsigned dev_page_min; 2227 u32 timeout; 2228 int ret; 2229 2230 ret = ctrl->ops->reg_read64(ctrl, NVME_REG_CAP, &ctrl->cap); 2231 if (ret) { 2232 dev_err(ctrl->device, "Reading CAP failed (%d)\n", ret); 2233 return ret; 2234 } 2235 dev_page_min = NVME_CAP_MPSMIN(ctrl->cap) + 12; 2236 2237 if (NVME_CTRL_PAGE_SHIFT < dev_page_min) { 2238 dev_err(ctrl->device, 2239 "Minimum device page size %u too large for host (%u)\n", 2240 1 << dev_page_min, 1 << NVME_CTRL_PAGE_SHIFT); 2241 return -ENODEV; 2242 } 2243 2244 if (NVME_CAP_CSS(ctrl->cap) & NVME_CAP_CSS_CSI) 2245 ctrl->ctrl_config = NVME_CC_CSS_CSI; 2246 else 2247 ctrl->ctrl_config = NVME_CC_CSS_NVM; 2248 2249 if (ctrl->cap & NVME_CAP_CRMS_CRWMS && ctrl->cap & NVME_CAP_CRMS_CRIMS) 2250 ctrl->ctrl_config |= NVME_CC_CRIME; 2251 2252 ctrl->ctrl_config |= (NVME_CTRL_PAGE_SHIFT - 12) << NVME_CC_MPS_SHIFT; 2253 ctrl->ctrl_config |= NVME_CC_AMS_RR | NVME_CC_SHN_NONE; 2254 ctrl->ctrl_config |= NVME_CC_IOSQES | NVME_CC_IOCQES; 2255 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config); 2256 if (ret) 2257 return ret; 2258 2259 /* Flush write to device (required if transport is PCI) */ 2260 ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CC, &ctrl->ctrl_config); 2261 if (ret) 2262 return ret; 2263 2264 /* CAP value may change after initial CC write */ 2265 ret = ctrl->ops->reg_read64(ctrl, NVME_REG_CAP, &ctrl->cap); 2266 if (ret) 2267 return ret; 2268 2269 timeout = NVME_CAP_TIMEOUT(ctrl->cap); 2270 if (ctrl->cap & NVME_CAP_CRMS_CRWMS) { 2271 u32 crto, ready_timeout; 2272 2273 ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CRTO, &crto); 2274 if (ret) { 2275 dev_err(ctrl->device, "Reading CRTO failed (%d)\n", 2276 ret); 2277 return ret; 2278 } 2279 2280 /* 2281 * CRTO should always be greater or equal to CAP.TO, but some 2282 * devices are known to get this wrong. Use the larger of the 2283 * two values. 2284 */ 2285 if (ctrl->ctrl_config & NVME_CC_CRIME) 2286 ready_timeout = NVME_CRTO_CRIMT(crto); 2287 else 2288 ready_timeout = NVME_CRTO_CRWMT(crto); 2289 2290 if (ready_timeout < timeout) 2291 dev_warn_once(ctrl->device, "bad crto:%x cap:%llx\n", 2292 crto, ctrl->cap); 2293 else 2294 timeout = ready_timeout; 2295 } 2296 2297 ctrl->ctrl_config |= NVME_CC_ENABLE; 2298 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config); 2299 if (ret) 2300 return ret; 2301 return nvme_wait_ready(ctrl, NVME_CSTS_RDY, NVME_CSTS_RDY, 2302 (timeout + 1) / 2, "initialisation"); 2303 } 2304 EXPORT_SYMBOL_GPL(nvme_enable_ctrl); 2305 2306 static int nvme_configure_timestamp(struct nvme_ctrl *ctrl) 2307 { 2308 __le64 ts; 2309 int ret; 2310 2311 if (!(ctrl->oncs & NVME_CTRL_ONCS_TIMESTAMP)) 2312 return 0; 2313 2314 ts = cpu_to_le64(ktime_to_ms(ktime_get_real())); 2315 ret = nvme_set_features(ctrl, NVME_FEAT_TIMESTAMP, 0, &ts, sizeof(ts), 2316 NULL); 2317 if (ret) 2318 dev_warn_once(ctrl->device, 2319 "could not set timestamp (%d)\n", ret); 2320 return ret; 2321 } 2322 2323 static int nvme_configure_host_options(struct nvme_ctrl *ctrl) 2324 { 2325 struct nvme_feat_host_behavior *host; 2326 u8 acre = 0, lbafee = 0; 2327 int ret; 2328 2329 /* Don't bother enabling the feature if retry delay is not reported */ 2330 if (ctrl->crdt[0]) 2331 acre = NVME_ENABLE_ACRE; 2332 if (ctrl->ctratt & NVME_CTRL_ATTR_ELBAS) 2333 lbafee = NVME_ENABLE_LBAFEE; 2334 2335 if (!acre && !lbafee) 2336 return 0; 2337 2338 host = kzalloc(sizeof(*host), GFP_KERNEL); 2339 if (!host) 2340 return 0; 2341 2342 host->acre = acre; 2343 host->lbafee = lbafee; 2344 ret = nvme_set_features(ctrl, NVME_FEAT_HOST_BEHAVIOR, 0, 2345 host, sizeof(*host), NULL); 2346 kfree(host); 2347 return ret; 2348 } 2349 2350 /* 2351 * The function checks whether the given total (exlat + enlat) latency of 2352 * a power state allows the latter to be used as an APST transition target. 2353 * It does so by comparing the latency to the primary and secondary latency 2354 * tolerances defined by module params. If there's a match, the corresponding 2355 * timeout value is returned and the matching tolerance index (1 or 2) is 2356 * reported. 2357 */ 2358 static bool nvme_apst_get_transition_time(u64 total_latency, 2359 u64 *transition_time, unsigned *last_index) 2360 { 2361 if (total_latency <= apst_primary_latency_tol_us) { 2362 if (*last_index == 1) 2363 return false; 2364 *last_index = 1; 2365 *transition_time = apst_primary_timeout_ms; 2366 return true; 2367 } 2368 if (apst_secondary_timeout_ms && 2369 total_latency <= apst_secondary_latency_tol_us) { 2370 if (*last_index <= 2) 2371 return false; 2372 *last_index = 2; 2373 *transition_time = apst_secondary_timeout_ms; 2374 return true; 2375 } 2376 return false; 2377 } 2378 2379 /* 2380 * APST (Autonomous Power State Transition) lets us program a table of power 2381 * state transitions that the controller will perform automatically. 2382 * 2383 * Depending on module params, one of the two supported techniques will be used: 2384 * 2385 * - If the parameters provide explicit timeouts and tolerances, they will be 2386 * used to build a table with up to 2 non-operational states to transition to. 2387 * The default parameter values were selected based on the values used by 2388 * Microsoft's and Intel's NVMe drivers. Yet, since we don't implement dynamic 2389 * regeneration of the APST table in the event of switching between external 2390 * and battery power, the timeouts and tolerances reflect a compromise 2391 * between values used by Microsoft for AC and battery scenarios. 2392 * - If not, we'll configure the table with a simple heuristic: we are willing 2393 * to spend at most 2% of the time transitioning between power states. 2394 * Therefore, when running in any given state, we will enter the next 2395 * lower-power non-operational state after waiting 50 * (enlat + exlat) 2396 * microseconds, as long as that state's exit latency is under the requested 2397 * maximum latency. 2398 * 2399 * We will not autonomously enter any non-operational state for which the total 2400 * latency exceeds ps_max_latency_us. 2401 * 2402 * Users can set ps_max_latency_us to zero to turn off APST. 2403 */ 2404 static int nvme_configure_apst(struct nvme_ctrl *ctrl) 2405 { 2406 struct nvme_feat_auto_pst *table; 2407 unsigned apste = 0; 2408 u64 max_lat_us = 0; 2409 __le64 target = 0; 2410 int max_ps = -1; 2411 int state; 2412 int ret; 2413 unsigned last_lt_index = UINT_MAX; 2414 2415 /* 2416 * If APST isn't supported or if we haven't been initialized yet, 2417 * then don't do anything. 2418 */ 2419 if (!ctrl->apsta) 2420 return 0; 2421 2422 if (ctrl->npss > 31) { 2423 dev_warn(ctrl->device, "NPSS is invalid; not using APST\n"); 2424 return 0; 2425 } 2426 2427 table = kzalloc(sizeof(*table), GFP_KERNEL); 2428 if (!table) 2429 return 0; 2430 2431 if (!ctrl->apst_enabled || ctrl->ps_max_latency_us == 0) { 2432 /* Turn off APST. */ 2433 dev_dbg(ctrl->device, "APST disabled\n"); 2434 goto done; 2435 } 2436 2437 /* 2438 * Walk through all states from lowest- to highest-power. 2439 * According to the spec, lower-numbered states use more power. NPSS, 2440 * despite the name, is the index of the lowest-power state, not the 2441 * number of states. 2442 */ 2443 for (state = (int)ctrl->npss; state >= 0; state--) { 2444 u64 total_latency_us, exit_latency_us, transition_ms; 2445 2446 if (target) 2447 table->entries[state] = target; 2448 2449 /* 2450 * Don't allow transitions to the deepest state if it's quirked 2451 * off. 2452 */ 2453 if (state == ctrl->npss && 2454 (ctrl->quirks & NVME_QUIRK_NO_DEEPEST_PS)) 2455 continue; 2456 2457 /* 2458 * Is this state a useful non-operational state for higher-power 2459 * states to autonomously transition to? 2460 */ 2461 if (!(ctrl->psd[state].flags & NVME_PS_FLAGS_NON_OP_STATE)) 2462 continue; 2463 2464 exit_latency_us = (u64)le32_to_cpu(ctrl->psd[state].exit_lat); 2465 if (exit_latency_us > ctrl->ps_max_latency_us) 2466 continue; 2467 2468 total_latency_us = exit_latency_us + 2469 le32_to_cpu(ctrl->psd[state].entry_lat); 2470 2471 /* 2472 * This state is good. It can be used as the APST idle target 2473 * for higher power states. 2474 */ 2475 if (apst_primary_timeout_ms && apst_primary_latency_tol_us) { 2476 if (!nvme_apst_get_transition_time(total_latency_us, 2477 &transition_ms, &last_lt_index)) 2478 continue; 2479 } else { 2480 transition_ms = total_latency_us + 19; 2481 do_div(transition_ms, 20); 2482 if (transition_ms > (1 << 24) - 1) 2483 transition_ms = (1 << 24) - 1; 2484 } 2485 2486 target = cpu_to_le64((state << 3) | (transition_ms << 8)); 2487 if (max_ps == -1) 2488 max_ps = state; 2489 if (total_latency_us > max_lat_us) 2490 max_lat_us = total_latency_us; 2491 } 2492 2493 if (max_ps == -1) 2494 dev_dbg(ctrl->device, "APST enabled but no non-operational states are available\n"); 2495 else 2496 dev_dbg(ctrl->device, "APST enabled: max PS = %d, max round-trip latency = %lluus, table = %*phN\n", 2497 max_ps, max_lat_us, (int)sizeof(*table), table); 2498 apste = 1; 2499 2500 done: 2501 ret = nvme_set_features(ctrl, NVME_FEAT_AUTO_PST, apste, 2502 table, sizeof(*table), NULL); 2503 if (ret) 2504 dev_err(ctrl->device, "failed to set APST feature (%d)\n", ret); 2505 kfree(table); 2506 return ret; 2507 } 2508 2509 static void nvme_set_latency_tolerance(struct device *dev, s32 val) 2510 { 2511 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 2512 u64 latency; 2513 2514 switch (val) { 2515 case PM_QOS_LATENCY_TOLERANCE_NO_CONSTRAINT: 2516 case PM_QOS_LATENCY_ANY: 2517 latency = U64_MAX; 2518 break; 2519 2520 default: 2521 latency = val; 2522 } 2523 2524 if (ctrl->ps_max_latency_us != latency) { 2525 ctrl->ps_max_latency_us = latency; 2526 if (nvme_ctrl_state(ctrl) == NVME_CTRL_LIVE) 2527 nvme_configure_apst(ctrl); 2528 } 2529 } 2530 2531 struct nvme_core_quirk_entry { 2532 /* 2533 * NVMe model and firmware strings are padded with spaces. For 2534 * simplicity, strings in the quirk table are padded with NULLs 2535 * instead. 2536 */ 2537 u16 vid; 2538 const char *mn; 2539 const char *fr; 2540 unsigned long quirks; 2541 }; 2542 2543 static const struct nvme_core_quirk_entry core_quirks[] = { 2544 { 2545 /* 2546 * This Toshiba device seems to die using any APST states. See: 2547 * https://bugs.launchpad.net/ubuntu/+source/linux/+bug/1678184/comments/11 2548 */ 2549 .vid = 0x1179, 2550 .mn = "THNSF5256GPUK TOSHIBA", 2551 .quirks = NVME_QUIRK_NO_APST, 2552 }, 2553 { 2554 /* 2555 * This LiteON CL1-3D*-Q11 firmware version has a race 2556 * condition associated with actions related to suspend to idle 2557 * LiteON has resolved the problem in future firmware 2558 */ 2559 .vid = 0x14a4, 2560 .fr = "22301111", 2561 .quirks = NVME_QUIRK_SIMPLE_SUSPEND, 2562 }, 2563 { 2564 /* 2565 * This Kioxia CD6-V Series / HPE PE8030 device times out and 2566 * aborts I/O during any load, but more easily reproducible 2567 * with discards (fstrim). 2568 * 2569 * The device is left in a state where it is also not possible 2570 * to use "nvme set-feature" to disable APST, but booting with 2571 * nvme_core.default_ps_max_latency=0 works. 2572 */ 2573 .vid = 0x1e0f, 2574 .mn = "KCD6XVUL6T40", 2575 .quirks = NVME_QUIRK_NO_APST, 2576 }, 2577 { 2578 /* 2579 * The external Samsung X5 SSD fails initialization without a 2580 * delay before checking if it is ready and has a whole set of 2581 * other problems. To make this even more interesting, it 2582 * shares the PCI ID with internal Samsung 970 Evo Plus that 2583 * does not need or want these quirks. 2584 */ 2585 .vid = 0x144d, 2586 .mn = "Samsung Portable SSD X5", 2587 .quirks = NVME_QUIRK_DELAY_BEFORE_CHK_RDY | 2588 NVME_QUIRK_NO_DEEPEST_PS | 2589 NVME_QUIRK_IGNORE_DEV_SUBNQN, 2590 } 2591 }; 2592 2593 /* match is null-terminated but idstr is space-padded. */ 2594 static bool string_matches(const char *idstr, const char *match, size_t len) 2595 { 2596 size_t matchlen; 2597 2598 if (!match) 2599 return true; 2600 2601 matchlen = strlen(match); 2602 WARN_ON_ONCE(matchlen > len); 2603 2604 if (memcmp(idstr, match, matchlen)) 2605 return false; 2606 2607 for (; matchlen < len; matchlen++) 2608 if (idstr[matchlen] != ' ') 2609 return false; 2610 2611 return true; 2612 } 2613 2614 static bool quirk_matches(const struct nvme_id_ctrl *id, 2615 const struct nvme_core_quirk_entry *q) 2616 { 2617 return q->vid == le16_to_cpu(id->vid) && 2618 string_matches(id->mn, q->mn, sizeof(id->mn)) && 2619 string_matches(id->fr, q->fr, sizeof(id->fr)); 2620 } 2621 2622 static void nvme_init_subnqn(struct nvme_subsystem *subsys, struct nvme_ctrl *ctrl, 2623 struct nvme_id_ctrl *id) 2624 { 2625 size_t nqnlen; 2626 int off; 2627 2628 if(!(ctrl->quirks & NVME_QUIRK_IGNORE_DEV_SUBNQN)) { 2629 nqnlen = strnlen(id->subnqn, NVMF_NQN_SIZE); 2630 if (nqnlen > 0 && nqnlen < NVMF_NQN_SIZE) { 2631 strscpy(subsys->subnqn, id->subnqn, NVMF_NQN_SIZE); 2632 return; 2633 } 2634 2635 if (ctrl->vs >= NVME_VS(1, 2, 1)) 2636 dev_warn(ctrl->device, "missing or invalid SUBNQN field.\n"); 2637 } 2638 2639 /* 2640 * Generate a "fake" NQN similar to the one in Section 4.5 of the NVMe 2641 * Base Specification 2.0. It is slightly different from the format 2642 * specified there due to historic reasons, and we can't change it now. 2643 */ 2644 off = snprintf(subsys->subnqn, NVMF_NQN_SIZE, 2645 "nqn.2014.08.org.nvmexpress:%04x%04x", 2646 le16_to_cpu(id->vid), le16_to_cpu(id->ssvid)); 2647 memcpy(subsys->subnqn + off, id->sn, sizeof(id->sn)); 2648 off += sizeof(id->sn); 2649 memcpy(subsys->subnqn + off, id->mn, sizeof(id->mn)); 2650 off += sizeof(id->mn); 2651 memset(subsys->subnqn + off, 0, sizeof(subsys->subnqn) - off); 2652 } 2653 2654 static void nvme_release_subsystem(struct device *dev) 2655 { 2656 struct nvme_subsystem *subsys = 2657 container_of(dev, struct nvme_subsystem, dev); 2658 2659 if (subsys->instance >= 0) 2660 ida_free(&nvme_instance_ida, subsys->instance); 2661 kfree(subsys); 2662 } 2663 2664 static void nvme_destroy_subsystem(struct kref *ref) 2665 { 2666 struct nvme_subsystem *subsys = 2667 container_of(ref, struct nvme_subsystem, ref); 2668 2669 mutex_lock(&nvme_subsystems_lock); 2670 list_del(&subsys->entry); 2671 mutex_unlock(&nvme_subsystems_lock); 2672 2673 ida_destroy(&subsys->ns_ida); 2674 device_del(&subsys->dev); 2675 put_device(&subsys->dev); 2676 } 2677 2678 static void nvme_put_subsystem(struct nvme_subsystem *subsys) 2679 { 2680 kref_put(&subsys->ref, nvme_destroy_subsystem); 2681 } 2682 2683 static struct nvme_subsystem *__nvme_find_get_subsystem(const char *subsysnqn) 2684 { 2685 struct nvme_subsystem *subsys; 2686 2687 lockdep_assert_held(&nvme_subsystems_lock); 2688 2689 /* 2690 * Fail matches for discovery subsystems. This results 2691 * in each discovery controller bound to a unique subsystem. 2692 * This avoids issues with validating controller values 2693 * that can only be true when there is a single unique subsystem. 2694 * There may be multiple and completely independent entities 2695 * that provide discovery controllers. 2696 */ 2697 if (!strcmp(subsysnqn, NVME_DISC_SUBSYS_NAME)) 2698 return NULL; 2699 2700 list_for_each_entry(subsys, &nvme_subsystems, entry) { 2701 if (strcmp(subsys->subnqn, subsysnqn)) 2702 continue; 2703 if (!kref_get_unless_zero(&subsys->ref)) 2704 continue; 2705 return subsys; 2706 } 2707 2708 return NULL; 2709 } 2710 2711 static inline bool nvme_discovery_ctrl(struct nvme_ctrl *ctrl) 2712 { 2713 return ctrl->opts && ctrl->opts->discovery_nqn; 2714 } 2715 2716 static bool nvme_validate_cntlid(struct nvme_subsystem *subsys, 2717 struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id) 2718 { 2719 struct nvme_ctrl *tmp; 2720 2721 lockdep_assert_held(&nvme_subsystems_lock); 2722 2723 list_for_each_entry(tmp, &subsys->ctrls, subsys_entry) { 2724 if (nvme_state_terminal(tmp)) 2725 continue; 2726 2727 if (tmp->cntlid == ctrl->cntlid) { 2728 dev_err(ctrl->device, 2729 "Duplicate cntlid %u with %s, subsys %s, rejecting\n", 2730 ctrl->cntlid, dev_name(tmp->device), 2731 subsys->subnqn); 2732 return false; 2733 } 2734 2735 if ((id->cmic & NVME_CTRL_CMIC_MULTI_CTRL) || 2736 nvme_discovery_ctrl(ctrl)) 2737 continue; 2738 2739 dev_err(ctrl->device, 2740 "Subsystem does not support multiple controllers\n"); 2741 return false; 2742 } 2743 2744 return true; 2745 } 2746 2747 static int nvme_init_subsystem(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id) 2748 { 2749 struct nvme_subsystem *subsys, *found; 2750 int ret; 2751 2752 subsys = kzalloc(sizeof(*subsys), GFP_KERNEL); 2753 if (!subsys) 2754 return -ENOMEM; 2755 2756 subsys->instance = -1; 2757 mutex_init(&subsys->lock); 2758 kref_init(&subsys->ref); 2759 INIT_LIST_HEAD(&subsys->ctrls); 2760 INIT_LIST_HEAD(&subsys->nsheads); 2761 nvme_init_subnqn(subsys, ctrl, id); 2762 memcpy(subsys->serial, id->sn, sizeof(subsys->serial)); 2763 memcpy(subsys->model, id->mn, sizeof(subsys->model)); 2764 subsys->vendor_id = le16_to_cpu(id->vid); 2765 subsys->cmic = id->cmic; 2766 2767 /* Versions prior to 1.4 don't necessarily report a valid type */ 2768 if (id->cntrltype == NVME_CTRL_DISC || 2769 !strcmp(subsys->subnqn, NVME_DISC_SUBSYS_NAME)) 2770 subsys->subtype = NVME_NQN_DISC; 2771 else 2772 subsys->subtype = NVME_NQN_NVME; 2773 2774 if (nvme_discovery_ctrl(ctrl) && subsys->subtype != NVME_NQN_DISC) { 2775 dev_err(ctrl->device, 2776 "Subsystem %s is not a discovery controller", 2777 subsys->subnqn); 2778 kfree(subsys); 2779 return -EINVAL; 2780 } 2781 subsys->awupf = le16_to_cpu(id->awupf); 2782 nvme_mpath_default_iopolicy(subsys); 2783 2784 subsys->dev.class = nvme_subsys_class; 2785 subsys->dev.release = nvme_release_subsystem; 2786 subsys->dev.groups = nvme_subsys_attrs_groups; 2787 dev_set_name(&subsys->dev, "nvme-subsys%d", ctrl->instance); 2788 device_initialize(&subsys->dev); 2789 2790 mutex_lock(&nvme_subsystems_lock); 2791 found = __nvme_find_get_subsystem(subsys->subnqn); 2792 if (found) { 2793 put_device(&subsys->dev); 2794 subsys = found; 2795 2796 if (!nvme_validate_cntlid(subsys, ctrl, id)) { 2797 ret = -EINVAL; 2798 goto out_put_subsystem; 2799 } 2800 } else { 2801 ret = device_add(&subsys->dev); 2802 if (ret) { 2803 dev_err(ctrl->device, 2804 "failed to register subsystem device.\n"); 2805 put_device(&subsys->dev); 2806 goto out_unlock; 2807 } 2808 ida_init(&subsys->ns_ida); 2809 list_add_tail(&subsys->entry, &nvme_subsystems); 2810 } 2811 2812 ret = sysfs_create_link(&subsys->dev.kobj, &ctrl->device->kobj, 2813 dev_name(ctrl->device)); 2814 if (ret) { 2815 dev_err(ctrl->device, 2816 "failed to create sysfs link from subsystem.\n"); 2817 goto out_put_subsystem; 2818 } 2819 2820 if (!found) 2821 subsys->instance = ctrl->instance; 2822 ctrl->subsys = subsys; 2823 list_add_tail(&ctrl->subsys_entry, &subsys->ctrls); 2824 mutex_unlock(&nvme_subsystems_lock); 2825 return 0; 2826 2827 out_put_subsystem: 2828 nvme_put_subsystem(subsys); 2829 out_unlock: 2830 mutex_unlock(&nvme_subsystems_lock); 2831 return ret; 2832 } 2833 2834 int nvme_get_log(struct nvme_ctrl *ctrl, u32 nsid, u8 log_page, u8 lsp, u8 csi, 2835 void *log, size_t size, u64 offset) 2836 { 2837 struct nvme_command c = { }; 2838 u32 dwlen = nvme_bytes_to_numd(size); 2839 2840 c.get_log_page.opcode = nvme_admin_get_log_page; 2841 c.get_log_page.nsid = cpu_to_le32(nsid); 2842 c.get_log_page.lid = log_page; 2843 c.get_log_page.lsp = lsp; 2844 c.get_log_page.numdl = cpu_to_le16(dwlen & ((1 << 16) - 1)); 2845 c.get_log_page.numdu = cpu_to_le16(dwlen >> 16); 2846 c.get_log_page.lpol = cpu_to_le32(lower_32_bits(offset)); 2847 c.get_log_page.lpou = cpu_to_le32(upper_32_bits(offset)); 2848 c.get_log_page.csi = csi; 2849 2850 return nvme_submit_sync_cmd(ctrl->admin_q, &c, log, size); 2851 } 2852 2853 static int nvme_get_effects_log(struct nvme_ctrl *ctrl, u8 csi, 2854 struct nvme_effects_log **log) 2855 { 2856 struct nvme_effects_log *cel = xa_load(&ctrl->cels, csi); 2857 int ret; 2858 2859 if (cel) 2860 goto out; 2861 2862 cel = kzalloc(sizeof(*cel), GFP_KERNEL); 2863 if (!cel) 2864 return -ENOMEM; 2865 2866 ret = nvme_get_log(ctrl, 0x00, NVME_LOG_CMD_EFFECTS, 0, csi, 2867 cel, sizeof(*cel), 0); 2868 if (ret) { 2869 kfree(cel); 2870 return ret; 2871 } 2872 2873 xa_store(&ctrl->cels, csi, cel, GFP_KERNEL); 2874 out: 2875 *log = cel; 2876 return 0; 2877 } 2878 2879 static inline u32 nvme_mps_to_sectors(struct nvme_ctrl *ctrl, u32 units) 2880 { 2881 u32 page_shift = NVME_CAP_MPSMIN(ctrl->cap) + 12, val; 2882 2883 if (check_shl_overflow(1U, units + page_shift - 9, &val)) 2884 return UINT_MAX; 2885 return val; 2886 } 2887 2888 static int nvme_init_non_mdts_limits(struct nvme_ctrl *ctrl) 2889 { 2890 struct nvme_command c = { }; 2891 struct nvme_id_ctrl_nvm *id; 2892 int ret; 2893 2894 if (ctrl->oncs & NVME_CTRL_ONCS_DSM) { 2895 ctrl->max_discard_sectors = UINT_MAX; 2896 ctrl->max_discard_segments = NVME_DSM_MAX_RANGES; 2897 } else { 2898 ctrl->max_discard_sectors = 0; 2899 ctrl->max_discard_segments = 0; 2900 } 2901 2902 /* 2903 * Even though NVMe spec explicitly states that MDTS is not applicable 2904 * to the write-zeroes, we are cautious and limit the size to the 2905 * controllers max_hw_sectors value, which is based on the MDTS field 2906 * and possibly other limiting factors. 2907 */ 2908 if ((ctrl->oncs & NVME_CTRL_ONCS_WRITE_ZEROES) && 2909 !(ctrl->quirks & NVME_QUIRK_DISABLE_WRITE_ZEROES)) 2910 ctrl->max_zeroes_sectors = ctrl->max_hw_sectors; 2911 else 2912 ctrl->max_zeroes_sectors = 0; 2913 2914 if (ctrl->subsys->subtype != NVME_NQN_NVME || 2915 nvme_ctrl_limited_cns(ctrl) || 2916 test_bit(NVME_CTRL_SKIP_ID_CNS_CS, &ctrl->flags)) 2917 return 0; 2918 2919 id = kzalloc(sizeof(*id), GFP_KERNEL); 2920 if (!id) 2921 return -ENOMEM; 2922 2923 c.identify.opcode = nvme_admin_identify; 2924 c.identify.cns = NVME_ID_CNS_CS_CTRL; 2925 c.identify.csi = NVME_CSI_NVM; 2926 2927 ret = nvme_submit_sync_cmd(ctrl->admin_q, &c, id, sizeof(*id)); 2928 if (ret) 2929 goto free_data; 2930 2931 if (id->dmrl) 2932 ctrl->max_discard_segments = id->dmrl; 2933 ctrl->dmrsl = le32_to_cpu(id->dmrsl); 2934 if (id->wzsl) 2935 ctrl->max_zeroes_sectors = nvme_mps_to_sectors(ctrl, id->wzsl); 2936 2937 free_data: 2938 if (ret > 0) 2939 set_bit(NVME_CTRL_SKIP_ID_CNS_CS, &ctrl->flags); 2940 kfree(id); 2941 return ret; 2942 } 2943 2944 static void nvme_init_known_nvm_effects(struct nvme_ctrl *ctrl) 2945 { 2946 struct nvme_effects_log *log = ctrl->effects; 2947 2948 log->acs[nvme_admin_format_nvm] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC | 2949 NVME_CMD_EFFECTS_NCC | 2950 NVME_CMD_EFFECTS_CSE_MASK); 2951 log->acs[nvme_admin_sanitize_nvm] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC | 2952 NVME_CMD_EFFECTS_CSE_MASK); 2953 2954 /* 2955 * The spec says the result of a security receive command depends on 2956 * the previous security send command. As such, many vendors log this 2957 * command as one to submitted only when no other commands to the same 2958 * namespace are outstanding. The intention is to tell the host to 2959 * prevent mixing security send and receive. 2960 * 2961 * This driver can only enforce such exclusive access against IO 2962 * queues, though. We are not readily able to enforce such a rule for 2963 * two commands to the admin queue, which is the only queue that 2964 * matters for this command. 2965 * 2966 * Rather than blindly freezing the IO queues for this effect that 2967 * doesn't even apply to IO, mask it off. 2968 */ 2969 log->acs[nvme_admin_security_recv] &= cpu_to_le32(~NVME_CMD_EFFECTS_CSE_MASK); 2970 2971 log->iocs[nvme_cmd_write] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC); 2972 log->iocs[nvme_cmd_write_zeroes] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC); 2973 log->iocs[nvme_cmd_write_uncor] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC); 2974 } 2975 2976 static int nvme_init_effects(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id) 2977 { 2978 int ret = 0; 2979 2980 if (ctrl->effects) 2981 return 0; 2982 2983 if (id->lpa & NVME_CTRL_LPA_CMD_EFFECTS_LOG) { 2984 ret = nvme_get_effects_log(ctrl, NVME_CSI_NVM, &ctrl->effects); 2985 if (ret < 0) 2986 return ret; 2987 } 2988 2989 if (!ctrl->effects) { 2990 ctrl->effects = kzalloc(sizeof(*ctrl->effects), GFP_KERNEL); 2991 if (!ctrl->effects) 2992 return -ENOMEM; 2993 xa_store(&ctrl->cels, NVME_CSI_NVM, ctrl->effects, GFP_KERNEL); 2994 } 2995 2996 nvme_init_known_nvm_effects(ctrl); 2997 return 0; 2998 } 2999 3000 static int nvme_init_identify(struct nvme_ctrl *ctrl) 3001 { 3002 struct nvme_id_ctrl *id; 3003 u32 max_hw_sectors; 3004 bool prev_apst_enabled; 3005 int ret; 3006 3007 ret = nvme_identify_ctrl(ctrl, &id); 3008 if (ret) { 3009 dev_err(ctrl->device, "Identify Controller failed (%d)\n", ret); 3010 return -EIO; 3011 } 3012 3013 if (!(ctrl->ops->flags & NVME_F_FABRICS)) 3014 ctrl->cntlid = le16_to_cpu(id->cntlid); 3015 3016 if (!ctrl->identified) { 3017 unsigned int i; 3018 3019 /* 3020 * Check for quirks. Quirk can depend on firmware version, 3021 * so, in principle, the set of quirks present can change 3022 * across a reset. As a possible future enhancement, we 3023 * could re-scan for quirks every time we reinitialize 3024 * the device, but we'd have to make sure that the driver 3025 * behaves intelligently if the quirks change. 3026 */ 3027 for (i = 0; i < ARRAY_SIZE(core_quirks); i++) { 3028 if (quirk_matches(id, &core_quirks[i])) 3029 ctrl->quirks |= core_quirks[i].quirks; 3030 } 3031 3032 ret = nvme_init_subsystem(ctrl, id); 3033 if (ret) 3034 goto out_free; 3035 3036 ret = nvme_init_effects(ctrl, id); 3037 if (ret) 3038 goto out_free; 3039 } 3040 memcpy(ctrl->subsys->firmware_rev, id->fr, 3041 sizeof(ctrl->subsys->firmware_rev)); 3042 3043 if (force_apst && (ctrl->quirks & NVME_QUIRK_NO_DEEPEST_PS)) { 3044 dev_warn(ctrl->device, "forcibly allowing all power states due to nvme_core.force_apst -- use at your own risk\n"); 3045 ctrl->quirks &= ~NVME_QUIRK_NO_DEEPEST_PS; 3046 } 3047 3048 ctrl->crdt[0] = le16_to_cpu(id->crdt1); 3049 ctrl->crdt[1] = le16_to_cpu(id->crdt2); 3050 ctrl->crdt[2] = le16_to_cpu(id->crdt3); 3051 3052 ctrl->oacs = le16_to_cpu(id->oacs); 3053 ctrl->oncs = le16_to_cpu(id->oncs); 3054 ctrl->mtfa = le16_to_cpu(id->mtfa); 3055 ctrl->oaes = le32_to_cpu(id->oaes); 3056 ctrl->wctemp = le16_to_cpu(id->wctemp); 3057 ctrl->cctemp = le16_to_cpu(id->cctemp); 3058 3059 atomic_set(&ctrl->abort_limit, id->acl + 1); 3060 ctrl->vwc = id->vwc; 3061 if (id->mdts) 3062 max_hw_sectors = nvme_mps_to_sectors(ctrl, id->mdts); 3063 else 3064 max_hw_sectors = UINT_MAX; 3065 ctrl->max_hw_sectors = 3066 min_not_zero(ctrl->max_hw_sectors, max_hw_sectors); 3067 3068 nvme_set_queue_limits(ctrl, ctrl->admin_q); 3069 ctrl->sgls = le32_to_cpu(id->sgls); 3070 ctrl->kas = le16_to_cpu(id->kas); 3071 ctrl->max_namespaces = le32_to_cpu(id->mnan); 3072 ctrl->ctratt = le32_to_cpu(id->ctratt); 3073 3074 ctrl->cntrltype = id->cntrltype; 3075 ctrl->dctype = id->dctype; 3076 3077 if (id->rtd3e) { 3078 /* us -> s */ 3079 u32 transition_time = le32_to_cpu(id->rtd3e) / USEC_PER_SEC; 3080 3081 ctrl->shutdown_timeout = clamp_t(unsigned int, transition_time, 3082 shutdown_timeout, 60); 3083 3084 if (ctrl->shutdown_timeout != shutdown_timeout) 3085 dev_info(ctrl->device, 3086 "Shutdown timeout set to %u seconds\n", 3087 ctrl->shutdown_timeout); 3088 } else 3089 ctrl->shutdown_timeout = shutdown_timeout; 3090 3091 ctrl->npss = id->npss; 3092 ctrl->apsta = id->apsta; 3093 prev_apst_enabled = ctrl->apst_enabled; 3094 if (ctrl->quirks & NVME_QUIRK_NO_APST) { 3095 if (force_apst && id->apsta) { 3096 dev_warn(ctrl->device, "forcibly allowing APST due to nvme_core.force_apst -- use at your own risk\n"); 3097 ctrl->apst_enabled = true; 3098 } else { 3099 ctrl->apst_enabled = false; 3100 } 3101 } else { 3102 ctrl->apst_enabled = id->apsta; 3103 } 3104 memcpy(ctrl->psd, id->psd, sizeof(ctrl->psd)); 3105 3106 if (ctrl->ops->flags & NVME_F_FABRICS) { 3107 ctrl->icdoff = le16_to_cpu(id->icdoff); 3108 ctrl->ioccsz = le32_to_cpu(id->ioccsz); 3109 ctrl->iorcsz = le32_to_cpu(id->iorcsz); 3110 ctrl->maxcmd = le16_to_cpu(id->maxcmd); 3111 3112 /* 3113 * In fabrics we need to verify the cntlid matches the 3114 * admin connect 3115 */ 3116 if (ctrl->cntlid != le16_to_cpu(id->cntlid)) { 3117 dev_err(ctrl->device, 3118 "Mismatching cntlid: Connect %u vs Identify " 3119 "%u, rejecting\n", 3120 ctrl->cntlid, le16_to_cpu(id->cntlid)); 3121 ret = -EINVAL; 3122 goto out_free; 3123 } 3124 3125 if (!nvme_discovery_ctrl(ctrl) && !ctrl->kas) { 3126 dev_err(ctrl->device, 3127 "keep-alive support is mandatory for fabrics\n"); 3128 ret = -EINVAL; 3129 goto out_free; 3130 } 3131 } else { 3132 ctrl->hmpre = le32_to_cpu(id->hmpre); 3133 ctrl->hmmin = le32_to_cpu(id->hmmin); 3134 ctrl->hmminds = le32_to_cpu(id->hmminds); 3135 ctrl->hmmaxd = le16_to_cpu(id->hmmaxd); 3136 } 3137 3138 ret = nvme_mpath_init_identify(ctrl, id); 3139 if (ret < 0) 3140 goto out_free; 3141 3142 if (ctrl->apst_enabled && !prev_apst_enabled) 3143 dev_pm_qos_expose_latency_tolerance(ctrl->device); 3144 else if (!ctrl->apst_enabled && prev_apst_enabled) 3145 dev_pm_qos_hide_latency_tolerance(ctrl->device); 3146 3147 out_free: 3148 kfree(id); 3149 return ret; 3150 } 3151 3152 /* 3153 * Initialize the cached copies of the Identify data and various controller 3154 * register in our nvme_ctrl structure. This should be called as soon as 3155 * the admin queue is fully up and running. 3156 */ 3157 int nvme_init_ctrl_finish(struct nvme_ctrl *ctrl, bool was_suspended) 3158 { 3159 int ret; 3160 3161 ret = ctrl->ops->reg_read32(ctrl, NVME_REG_VS, &ctrl->vs); 3162 if (ret) { 3163 dev_err(ctrl->device, "Reading VS failed (%d)\n", ret); 3164 return ret; 3165 } 3166 3167 ctrl->sqsize = min_t(u16, NVME_CAP_MQES(ctrl->cap), ctrl->sqsize); 3168 3169 if (ctrl->vs >= NVME_VS(1, 1, 0)) 3170 ctrl->subsystem = NVME_CAP_NSSRC(ctrl->cap); 3171 3172 ret = nvme_init_identify(ctrl); 3173 if (ret) 3174 return ret; 3175 3176 ret = nvme_configure_apst(ctrl); 3177 if (ret < 0) 3178 return ret; 3179 3180 ret = nvme_configure_timestamp(ctrl); 3181 if (ret < 0) 3182 return ret; 3183 3184 ret = nvme_configure_host_options(ctrl); 3185 if (ret < 0) 3186 return ret; 3187 3188 nvme_configure_opal(ctrl, was_suspended); 3189 3190 if (!ctrl->identified && !nvme_discovery_ctrl(ctrl)) { 3191 /* 3192 * Do not return errors unless we are in a controller reset, 3193 * the controller works perfectly fine without hwmon. 3194 */ 3195 ret = nvme_hwmon_init(ctrl); 3196 if (ret == -EINTR) 3197 return ret; 3198 } 3199 3200 clear_bit(NVME_CTRL_DIRTY_CAPABILITY, &ctrl->flags); 3201 ctrl->identified = true; 3202 3203 return 0; 3204 } 3205 EXPORT_SYMBOL_GPL(nvme_init_ctrl_finish); 3206 3207 static int nvme_dev_open(struct inode *inode, struct file *file) 3208 { 3209 struct nvme_ctrl *ctrl = 3210 container_of(inode->i_cdev, struct nvme_ctrl, cdev); 3211 3212 switch (nvme_ctrl_state(ctrl)) { 3213 case NVME_CTRL_LIVE: 3214 break; 3215 default: 3216 return -EWOULDBLOCK; 3217 } 3218 3219 nvme_get_ctrl(ctrl); 3220 if (!try_module_get(ctrl->ops->module)) { 3221 nvme_put_ctrl(ctrl); 3222 return -EINVAL; 3223 } 3224 3225 file->private_data = ctrl; 3226 return 0; 3227 } 3228 3229 static int nvme_dev_release(struct inode *inode, struct file *file) 3230 { 3231 struct nvme_ctrl *ctrl = 3232 container_of(inode->i_cdev, struct nvme_ctrl, cdev); 3233 3234 module_put(ctrl->ops->module); 3235 nvme_put_ctrl(ctrl); 3236 return 0; 3237 } 3238 3239 static const struct file_operations nvme_dev_fops = { 3240 .owner = THIS_MODULE, 3241 .open = nvme_dev_open, 3242 .release = nvme_dev_release, 3243 .unlocked_ioctl = nvme_dev_ioctl, 3244 .compat_ioctl = compat_ptr_ioctl, 3245 .uring_cmd = nvme_dev_uring_cmd, 3246 }; 3247 3248 static struct nvme_ns_head *nvme_find_ns_head(struct nvme_ctrl *ctrl, 3249 unsigned nsid) 3250 { 3251 struct nvme_ns_head *h; 3252 3253 lockdep_assert_held(&ctrl->subsys->lock); 3254 3255 list_for_each_entry(h, &ctrl->subsys->nsheads, entry) { 3256 /* 3257 * Private namespaces can share NSIDs under some conditions. 3258 * In that case we can't use the same ns_head for namespaces 3259 * with the same NSID. 3260 */ 3261 if (h->ns_id != nsid || !nvme_is_unique_nsid(ctrl, h)) 3262 continue; 3263 if (!list_empty(&h->list) && nvme_tryget_ns_head(h)) 3264 return h; 3265 } 3266 3267 return NULL; 3268 } 3269 3270 static int nvme_subsys_check_duplicate_ids(struct nvme_subsystem *subsys, 3271 struct nvme_ns_ids *ids) 3272 { 3273 bool has_uuid = !uuid_is_null(&ids->uuid); 3274 bool has_nguid = memchr_inv(ids->nguid, 0, sizeof(ids->nguid)); 3275 bool has_eui64 = memchr_inv(ids->eui64, 0, sizeof(ids->eui64)); 3276 struct nvme_ns_head *h; 3277 3278 lockdep_assert_held(&subsys->lock); 3279 3280 list_for_each_entry(h, &subsys->nsheads, entry) { 3281 if (has_uuid && uuid_equal(&ids->uuid, &h->ids.uuid)) 3282 return -EINVAL; 3283 if (has_nguid && 3284 memcmp(&ids->nguid, &h->ids.nguid, sizeof(ids->nguid)) == 0) 3285 return -EINVAL; 3286 if (has_eui64 && 3287 memcmp(&ids->eui64, &h->ids.eui64, sizeof(ids->eui64)) == 0) 3288 return -EINVAL; 3289 } 3290 3291 return 0; 3292 } 3293 3294 static void nvme_cdev_rel(struct device *dev) 3295 { 3296 ida_free(&nvme_ns_chr_minor_ida, MINOR(dev->devt)); 3297 } 3298 3299 void nvme_cdev_del(struct cdev *cdev, struct device *cdev_device) 3300 { 3301 cdev_device_del(cdev, cdev_device); 3302 put_device(cdev_device); 3303 } 3304 3305 int nvme_cdev_add(struct cdev *cdev, struct device *cdev_device, 3306 const struct file_operations *fops, struct module *owner) 3307 { 3308 int minor, ret; 3309 3310 minor = ida_alloc(&nvme_ns_chr_minor_ida, GFP_KERNEL); 3311 if (minor < 0) 3312 return minor; 3313 cdev_device->devt = MKDEV(MAJOR(nvme_ns_chr_devt), minor); 3314 cdev_device->class = nvme_ns_chr_class; 3315 cdev_device->release = nvme_cdev_rel; 3316 device_initialize(cdev_device); 3317 cdev_init(cdev, fops); 3318 cdev->owner = owner; 3319 ret = cdev_device_add(cdev, cdev_device); 3320 if (ret) 3321 put_device(cdev_device); 3322 3323 return ret; 3324 } 3325 3326 static int nvme_ns_chr_open(struct inode *inode, struct file *file) 3327 { 3328 return nvme_ns_open(container_of(inode->i_cdev, struct nvme_ns, cdev)); 3329 } 3330 3331 static int nvme_ns_chr_release(struct inode *inode, struct file *file) 3332 { 3333 nvme_ns_release(container_of(inode->i_cdev, struct nvme_ns, cdev)); 3334 return 0; 3335 } 3336 3337 static const struct file_operations nvme_ns_chr_fops = { 3338 .owner = THIS_MODULE, 3339 .open = nvme_ns_chr_open, 3340 .release = nvme_ns_chr_release, 3341 .unlocked_ioctl = nvme_ns_chr_ioctl, 3342 .compat_ioctl = compat_ptr_ioctl, 3343 .uring_cmd = nvme_ns_chr_uring_cmd, 3344 .uring_cmd_iopoll = nvme_ns_chr_uring_cmd_iopoll, 3345 }; 3346 3347 static int nvme_add_ns_cdev(struct nvme_ns *ns) 3348 { 3349 int ret; 3350 3351 ns->cdev_device.parent = ns->ctrl->device; 3352 ret = dev_set_name(&ns->cdev_device, "ng%dn%d", 3353 ns->ctrl->instance, ns->head->instance); 3354 if (ret) 3355 return ret; 3356 3357 return nvme_cdev_add(&ns->cdev, &ns->cdev_device, &nvme_ns_chr_fops, 3358 ns->ctrl->ops->module); 3359 } 3360 3361 static struct nvme_ns_head *nvme_alloc_ns_head(struct nvme_ctrl *ctrl, 3362 struct nvme_ns_info *info) 3363 { 3364 struct nvme_ns_head *head; 3365 size_t size = sizeof(*head); 3366 int ret = -ENOMEM; 3367 3368 #ifdef CONFIG_NVME_MULTIPATH 3369 size += num_possible_nodes() * sizeof(struct nvme_ns *); 3370 #endif 3371 3372 head = kzalloc(size, GFP_KERNEL); 3373 if (!head) 3374 goto out; 3375 ret = ida_alloc_min(&ctrl->subsys->ns_ida, 1, GFP_KERNEL); 3376 if (ret < 0) 3377 goto out_free_head; 3378 head->instance = ret; 3379 INIT_LIST_HEAD(&head->list); 3380 ret = init_srcu_struct(&head->srcu); 3381 if (ret) 3382 goto out_ida_remove; 3383 head->subsys = ctrl->subsys; 3384 head->ns_id = info->nsid; 3385 head->ids = info->ids; 3386 head->shared = info->is_shared; 3387 kref_init(&head->ref); 3388 3389 if (head->ids.csi) { 3390 ret = nvme_get_effects_log(ctrl, head->ids.csi, &head->effects); 3391 if (ret) 3392 goto out_cleanup_srcu; 3393 } else 3394 head->effects = ctrl->effects; 3395 3396 ret = nvme_mpath_alloc_disk(ctrl, head); 3397 if (ret) 3398 goto out_cleanup_srcu; 3399 3400 list_add_tail(&head->entry, &ctrl->subsys->nsheads); 3401 3402 kref_get(&ctrl->subsys->ref); 3403 3404 return head; 3405 out_cleanup_srcu: 3406 cleanup_srcu_struct(&head->srcu); 3407 out_ida_remove: 3408 ida_free(&ctrl->subsys->ns_ida, head->instance); 3409 out_free_head: 3410 kfree(head); 3411 out: 3412 if (ret > 0) 3413 ret = blk_status_to_errno(nvme_error_status(ret)); 3414 return ERR_PTR(ret); 3415 } 3416 3417 static int nvme_global_check_duplicate_ids(struct nvme_subsystem *this, 3418 struct nvme_ns_ids *ids) 3419 { 3420 struct nvme_subsystem *s; 3421 int ret = 0; 3422 3423 /* 3424 * Note that this check is racy as we try to avoid holding the global 3425 * lock over the whole ns_head creation. But it is only intended as 3426 * a sanity check anyway. 3427 */ 3428 mutex_lock(&nvme_subsystems_lock); 3429 list_for_each_entry(s, &nvme_subsystems, entry) { 3430 if (s == this) 3431 continue; 3432 mutex_lock(&s->lock); 3433 ret = nvme_subsys_check_duplicate_ids(s, ids); 3434 mutex_unlock(&s->lock); 3435 if (ret) 3436 break; 3437 } 3438 mutex_unlock(&nvme_subsystems_lock); 3439 3440 return ret; 3441 } 3442 3443 static int nvme_init_ns_head(struct nvme_ns *ns, struct nvme_ns_info *info) 3444 { 3445 struct nvme_ctrl *ctrl = ns->ctrl; 3446 struct nvme_ns_head *head = NULL; 3447 int ret; 3448 3449 ret = nvme_global_check_duplicate_ids(ctrl->subsys, &info->ids); 3450 if (ret) { 3451 /* 3452 * We've found two different namespaces on two different 3453 * subsystems that report the same ID. This is pretty nasty 3454 * for anything that actually requires unique device 3455 * identification. In the kernel we need this for multipathing, 3456 * and in user space the /dev/disk/by-id/ links rely on it. 3457 * 3458 * If the device also claims to be multi-path capable back off 3459 * here now and refuse the probe the second device as this is a 3460 * recipe for data corruption. If not this is probably a 3461 * cheap consumer device if on the PCIe bus, so let the user 3462 * proceed and use the shiny toy, but warn that with changing 3463 * probing order (which due to our async probing could just be 3464 * device taking longer to startup) the other device could show 3465 * up at any time. 3466 */ 3467 nvme_print_device_info(ctrl); 3468 if ((ns->ctrl->ops->flags & NVME_F_FABRICS) || /* !PCIe */ 3469 ((ns->ctrl->subsys->cmic & NVME_CTRL_CMIC_MULTI_CTRL) && 3470 info->is_shared)) { 3471 dev_err(ctrl->device, 3472 "ignoring nsid %d because of duplicate IDs\n", 3473 info->nsid); 3474 return ret; 3475 } 3476 3477 dev_err(ctrl->device, 3478 "clearing duplicate IDs for nsid %d\n", info->nsid); 3479 dev_err(ctrl->device, 3480 "use of /dev/disk/by-id/ may cause data corruption\n"); 3481 memset(&info->ids.nguid, 0, sizeof(info->ids.nguid)); 3482 memset(&info->ids.uuid, 0, sizeof(info->ids.uuid)); 3483 memset(&info->ids.eui64, 0, sizeof(info->ids.eui64)); 3484 ctrl->quirks |= NVME_QUIRK_BOGUS_NID; 3485 } 3486 3487 mutex_lock(&ctrl->subsys->lock); 3488 head = nvme_find_ns_head(ctrl, info->nsid); 3489 if (!head) { 3490 ret = nvme_subsys_check_duplicate_ids(ctrl->subsys, &info->ids); 3491 if (ret) { 3492 dev_err(ctrl->device, 3493 "duplicate IDs in subsystem for nsid %d\n", 3494 info->nsid); 3495 goto out_unlock; 3496 } 3497 head = nvme_alloc_ns_head(ctrl, info); 3498 if (IS_ERR(head)) { 3499 ret = PTR_ERR(head); 3500 goto out_unlock; 3501 } 3502 } else { 3503 ret = -EINVAL; 3504 if (!info->is_shared || !head->shared) { 3505 dev_err(ctrl->device, 3506 "Duplicate unshared namespace %d\n", 3507 info->nsid); 3508 goto out_put_ns_head; 3509 } 3510 if (!nvme_ns_ids_equal(&head->ids, &info->ids)) { 3511 dev_err(ctrl->device, 3512 "IDs don't match for shared namespace %d\n", 3513 info->nsid); 3514 goto out_put_ns_head; 3515 } 3516 3517 if (!multipath) { 3518 dev_warn(ctrl->device, 3519 "Found shared namespace %d, but multipathing not supported.\n", 3520 info->nsid); 3521 dev_warn_once(ctrl->device, 3522 "Support for shared namespaces without CONFIG_NVME_MULTIPATH is deprecated and will be removed in Linux 6.0.\n"); 3523 } 3524 } 3525 3526 list_add_tail_rcu(&ns->siblings, &head->list); 3527 ns->head = head; 3528 mutex_unlock(&ctrl->subsys->lock); 3529 return 0; 3530 3531 out_put_ns_head: 3532 nvme_put_ns_head(head); 3533 out_unlock: 3534 mutex_unlock(&ctrl->subsys->lock); 3535 return ret; 3536 } 3537 3538 struct nvme_ns *nvme_find_get_ns(struct nvme_ctrl *ctrl, unsigned nsid) 3539 { 3540 struct nvme_ns *ns, *ret = NULL; 3541 3542 down_read(&ctrl->namespaces_rwsem); 3543 list_for_each_entry(ns, &ctrl->namespaces, list) { 3544 if (ns->head->ns_id == nsid) { 3545 if (!nvme_get_ns(ns)) 3546 continue; 3547 ret = ns; 3548 break; 3549 } 3550 if (ns->head->ns_id > nsid) 3551 break; 3552 } 3553 up_read(&ctrl->namespaces_rwsem); 3554 return ret; 3555 } 3556 EXPORT_SYMBOL_NS_GPL(nvme_find_get_ns, NVME_TARGET_PASSTHRU); 3557 3558 /* 3559 * Add the namespace to the controller list while keeping the list ordered. 3560 */ 3561 static void nvme_ns_add_to_ctrl_list(struct nvme_ns *ns) 3562 { 3563 struct nvme_ns *tmp; 3564 3565 list_for_each_entry_reverse(tmp, &ns->ctrl->namespaces, list) { 3566 if (tmp->head->ns_id < ns->head->ns_id) { 3567 list_add(&ns->list, &tmp->list); 3568 return; 3569 } 3570 } 3571 list_add(&ns->list, &ns->ctrl->namespaces); 3572 } 3573 3574 static void nvme_alloc_ns(struct nvme_ctrl *ctrl, struct nvme_ns_info *info) 3575 { 3576 struct nvme_ns *ns; 3577 struct gendisk *disk; 3578 int node = ctrl->numa_node; 3579 3580 ns = kzalloc_node(sizeof(*ns), GFP_KERNEL, node); 3581 if (!ns) 3582 return; 3583 3584 disk = blk_mq_alloc_disk(ctrl->tagset, ns); 3585 if (IS_ERR(disk)) 3586 goto out_free_ns; 3587 disk->fops = &nvme_bdev_ops; 3588 disk->private_data = ns; 3589 3590 ns->disk = disk; 3591 ns->queue = disk->queue; 3592 3593 if (ctrl->opts && ctrl->opts->data_digest) 3594 blk_queue_flag_set(QUEUE_FLAG_STABLE_WRITES, ns->queue); 3595 3596 blk_queue_flag_set(QUEUE_FLAG_NONROT, ns->queue); 3597 if (ctrl->ops->supports_pci_p2pdma && 3598 ctrl->ops->supports_pci_p2pdma(ctrl)) 3599 blk_queue_flag_set(QUEUE_FLAG_PCI_P2PDMA, ns->queue); 3600 3601 ns->ctrl = ctrl; 3602 kref_init(&ns->kref); 3603 3604 if (nvme_init_ns_head(ns, info)) 3605 goto out_cleanup_disk; 3606 3607 /* 3608 * If multipathing is enabled, the device name for all disks and not 3609 * just those that represent shared namespaces needs to be based on the 3610 * subsystem instance. Using the controller instance for private 3611 * namespaces could lead to naming collisions between shared and private 3612 * namespaces if they don't use a common numbering scheme. 3613 * 3614 * If multipathing is not enabled, disk names must use the controller 3615 * instance as shared namespaces will show up as multiple block 3616 * devices. 3617 */ 3618 if (nvme_ns_head_multipath(ns->head)) { 3619 sprintf(disk->disk_name, "nvme%dc%dn%d", ctrl->subsys->instance, 3620 ctrl->instance, ns->head->instance); 3621 disk->flags |= GENHD_FL_HIDDEN; 3622 } else if (multipath) { 3623 sprintf(disk->disk_name, "nvme%dn%d", ctrl->subsys->instance, 3624 ns->head->instance); 3625 } else { 3626 sprintf(disk->disk_name, "nvme%dn%d", ctrl->instance, 3627 ns->head->instance); 3628 } 3629 3630 if (nvme_update_ns_info(ns, info)) 3631 goto out_unlink_ns; 3632 3633 down_write(&ctrl->namespaces_rwsem); 3634 /* 3635 * Ensure that no namespaces are added to the ctrl list after the queues 3636 * are frozen, thereby avoiding a deadlock between scan and reset. 3637 */ 3638 if (test_bit(NVME_CTRL_FROZEN, &ctrl->flags)) { 3639 up_write(&ctrl->namespaces_rwsem); 3640 goto out_unlink_ns; 3641 } 3642 nvme_ns_add_to_ctrl_list(ns); 3643 up_write(&ctrl->namespaces_rwsem); 3644 nvme_get_ctrl(ctrl); 3645 3646 if (device_add_disk(ctrl->device, ns->disk, nvme_ns_id_attr_groups)) 3647 goto out_cleanup_ns_from_list; 3648 3649 if (!nvme_ns_head_multipath(ns->head)) 3650 nvme_add_ns_cdev(ns); 3651 3652 nvme_mpath_add_disk(ns, info->anagrpid); 3653 nvme_fault_inject_init(&ns->fault_inject, ns->disk->disk_name); 3654 3655 return; 3656 3657 out_cleanup_ns_from_list: 3658 nvme_put_ctrl(ctrl); 3659 down_write(&ctrl->namespaces_rwsem); 3660 list_del_init(&ns->list); 3661 up_write(&ctrl->namespaces_rwsem); 3662 out_unlink_ns: 3663 mutex_lock(&ctrl->subsys->lock); 3664 list_del_rcu(&ns->siblings); 3665 if (list_empty(&ns->head->list)) 3666 list_del_init(&ns->head->entry); 3667 mutex_unlock(&ctrl->subsys->lock); 3668 nvme_put_ns_head(ns->head); 3669 out_cleanup_disk: 3670 put_disk(disk); 3671 out_free_ns: 3672 kfree(ns); 3673 } 3674 3675 static void nvme_ns_remove(struct nvme_ns *ns) 3676 { 3677 bool last_path = false; 3678 3679 if (test_and_set_bit(NVME_NS_REMOVING, &ns->flags)) 3680 return; 3681 3682 clear_bit(NVME_NS_READY, &ns->flags); 3683 set_capacity(ns->disk, 0); 3684 nvme_fault_inject_fini(&ns->fault_inject); 3685 3686 /* 3687 * Ensure that !NVME_NS_READY is seen by other threads to prevent 3688 * this ns going back into current_path. 3689 */ 3690 synchronize_srcu(&ns->head->srcu); 3691 3692 /* wait for concurrent submissions */ 3693 if (nvme_mpath_clear_current_path(ns)) 3694 synchronize_srcu(&ns->head->srcu); 3695 3696 mutex_lock(&ns->ctrl->subsys->lock); 3697 list_del_rcu(&ns->siblings); 3698 if (list_empty(&ns->head->list)) { 3699 list_del_init(&ns->head->entry); 3700 last_path = true; 3701 } 3702 mutex_unlock(&ns->ctrl->subsys->lock); 3703 3704 /* guarantee not available in head->list */ 3705 synchronize_srcu(&ns->head->srcu); 3706 3707 if (!nvme_ns_head_multipath(ns->head)) 3708 nvme_cdev_del(&ns->cdev, &ns->cdev_device); 3709 del_gendisk(ns->disk); 3710 3711 down_write(&ns->ctrl->namespaces_rwsem); 3712 list_del_init(&ns->list); 3713 up_write(&ns->ctrl->namespaces_rwsem); 3714 3715 if (last_path) 3716 nvme_mpath_shutdown_disk(ns->head); 3717 nvme_put_ns(ns); 3718 } 3719 3720 static void nvme_ns_remove_by_nsid(struct nvme_ctrl *ctrl, u32 nsid) 3721 { 3722 struct nvme_ns *ns = nvme_find_get_ns(ctrl, nsid); 3723 3724 if (ns) { 3725 nvme_ns_remove(ns); 3726 nvme_put_ns(ns); 3727 } 3728 } 3729 3730 static void nvme_validate_ns(struct nvme_ns *ns, struct nvme_ns_info *info) 3731 { 3732 int ret = NVME_SC_INVALID_NS | NVME_SC_DNR; 3733 3734 if (!nvme_ns_ids_equal(&ns->head->ids, &info->ids)) { 3735 dev_err(ns->ctrl->device, 3736 "identifiers changed for nsid %d\n", ns->head->ns_id); 3737 goto out; 3738 } 3739 3740 ret = nvme_update_ns_info(ns, info); 3741 out: 3742 /* 3743 * Only remove the namespace if we got a fatal error back from the 3744 * device, otherwise ignore the error and just move on. 3745 * 3746 * TODO: we should probably schedule a delayed retry here. 3747 */ 3748 if (ret > 0 && (ret & NVME_SC_DNR)) 3749 nvme_ns_remove(ns); 3750 } 3751 3752 static void nvme_scan_ns(struct nvme_ctrl *ctrl, unsigned nsid) 3753 { 3754 struct nvme_ns_info info = { .nsid = nsid }; 3755 struct nvme_ns *ns; 3756 int ret; 3757 3758 if (nvme_identify_ns_descs(ctrl, &info)) 3759 return; 3760 3761 if (info.ids.csi != NVME_CSI_NVM && !nvme_multi_css(ctrl)) { 3762 dev_warn(ctrl->device, 3763 "command set not reported for nsid: %d\n", nsid); 3764 return; 3765 } 3766 3767 /* 3768 * If available try to use the Command Set Idependent Identify Namespace 3769 * data structure to find all the generic information that is needed to 3770 * set up a namespace. If not fall back to the legacy version. 3771 */ 3772 if ((ctrl->cap & NVME_CAP_CRMS_CRIMS) || 3773 (info.ids.csi != NVME_CSI_NVM && info.ids.csi != NVME_CSI_ZNS)) 3774 ret = nvme_ns_info_from_id_cs_indep(ctrl, &info); 3775 else 3776 ret = nvme_ns_info_from_identify(ctrl, &info); 3777 3778 if (info.is_removed) 3779 nvme_ns_remove_by_nsid(ctrl, nsid); 3780 3781 /* 3782 * Ignore the namespace if it is not ready. We will get an AEN once it 3783 * becomes ready and restart the scan. 3784 */ 3785 if (ret || !info.is_ready) 3786 return; 3787 3788 ns = nvme_find_get_ns(ctrl, nsid); 3789 if (ns) { 3790 nvme_validate_ns(ns, &info); 3791 nvme_put_ns(ns); 3792 } else { 3793 nvme_alloc_ns(ctrl, &info); 3794 } 3795 } 3796 3797 static void nvme_remove_invalid_namespaces(struct nvme_ctrl *ctrl, 3798 unsigned nsid) 3799 { 3800 struct nvme_ns *ns, *next; 3801 LIST_HEAD(rm_list); 3802 3803 down_write(&ctrl->namespaces_rwsem); 3804 list_for_each_entry_safe(ns, next, &ctrl->namespaces, list) { 3805 if (ns->head->ns_id > nsid) 3806 list_move_tail(&ns->list, &rm_list); 3807 } 3808 up_write(&ctrl->namespaces_rwsem); 3809 3810 list_for_each_entry_safe(ns, next, &rm_list, list) 3811 nvme_ns_remove(ns); 3812 3813 } 3814 3815 static int nvme_scan_ns_list(struct nvme_ctrl *ctrl) 3816 { 3817 const int nr_entries = NVME_IDENTIFY_DATA_SIZE / sizeof(__le32); 3818 __le32 *ns_list; 3819 u32 prev = 0; 3820 int ret = 0, i; 3821 3822 ns_list = kzalloc(NVME_IDENTIFY_DATA_SIZE, GFP_KERNEL); 3823 if (!ns_list) 3824 return -ENOMEM; 3825 3826 for (;;) { 3827 struct nvme_command cmd = { 3828 .identify.opcode = nvme_admin_identify, 3829 .identify.cns = NVME_ID_CNS_NS_ACTIVE_LIST, 3830 .identify.nsid = cpu_to_le32(prev), 3831 }; 3832 3833 ret = nvme_submit_sync_cmd(ctrl->admin_q, &cmd, ns_list, 3834 NVME_IDENTIFY_DATA_SIZE); 3835 if (ret) { 3836 dev_warn(ctrl->device, 3837 "Identify NS List failed (status=0x%x)\n", ret); 3838 goto free; 3839 } 3840 3841 for (i = 0; i < nr_entries; i++) { 3842 u32 nsid = le32_to_cpu(ns_list[i]); 3843 3844 if (!nsid) /* end of the list? */ 3845 goto out; 3846 nvme_scan_ns(ctrl, nsid); 3847 while (++prev < nsid) 3848 nvme_ns_remove_by_nsid(ctrl, prev); 3849 } 3850 } 3851 out: 3852 nvme_remove_invalid_namespaces(ctrl, prev); 3853 free: 3854 kfree(ns_list); 3855 return ret; 3856 } 3857 3858 static void nvme_scan_ns_sequential(struct nvme_ctrl *ctrl) 3859 { 3860 struct nvme_id_ctrl *id; 3861 u32 nn, i; 3862 3863 if (nvme_identify_ctrl(ctrl, &id)) 3864 return; 3865 nn = le32_to_cpu(id->nn); 3866 kfree(id); 3867 3868 for (i = 1; i <= nn; i++) 3869 nvme_scan_ns(ctrl, i); 3870 3871 nvme_remove_invalid_namespaces(ctrl, nn); 3872 } 3873 3874 static void nvme_clear_changed_ns_log(struct nvme_ctrl *ctrl) 3875 { 3876 size_t log_size = NVME_MAX_CHANGED_NAMESPACES * sizeof(__le32); 3877 __le32 *log; 3878 int error; 3879 3880 log = kzalloc(log_size, GFP_KERNEL); 3881 if (!log) 3882 return; 3883 3884 /* 3885 * We need to read the log to clear the AEN, but we don't want to rely 3886 * on it for the changed namespace information as userspace could have 3887 * raced with us in reading the log page, which could cause us to miss 3888 * updates. 3889 */ 3890 error = nvme_get_log(ctrl, NVME_NSID_ALL, NVME_LOG_CHANGED_NS, 0, 3891 NVME_CSI_NVM, log, log_size, 0); 3892 if (error) 3893 dev_warn(ctrl->device, 3894 "reading changed ns log failed: %d\n", error); 3895 3896 kfree(log); 3897 } 3898 3899 static void nvme_scan_work(struct work_struct *work) 3900 { 3901 struct nvme_ctrl *ctrl = 3902 container_of(work, struct nvme_ctrl, scan_work); 3903 int ret; 3904 3905 /* No tagset on a live ctrl means IO queues could not created */ 3906 if (nvme_ctrl_state(ctrl) != NVME_CTRL_LIVE || !ctrl->tagset) 3907 return; 3908 3909 /* 3910 * Identify controller limits can change at controller reset due to 3911 * new firmware download, even though it is not common we cannot ignore 3912 * such scenario. Controller's non-mdts limits are reported in the unit 3913 * of logical blocks that is dependent on the format of attached 3914 * namespace. Hence re-read the limits at the time of ns allocation. 3915 */ 3916 ret = nvme_init_non_mdts_limits(ctrl); 3917 if (ret < 0) { 3918 dev_warn(ctrl->device, 3919 "reading non-mdts-limits failed: %d\n", ret); 3920 return; 3921 } 3922 3923 if (test_and_clear_bit(NVME_AER_NOTICE_NS_CHANGED, &ctrl->events)) { 3924 dev_info(ctrl->device, "rescanning namespaces.\n"); 3925 nvme_clear_changed_ns_log(ctrl); 3926 } 3927 3928 mutex_lock(&ctrl->scan_lock); 3929 if (nvme_ctrl_limited_cns(ctrl)) { 3930 nvme_scan_ns_sequential(ctrl); 3931 } else { 3932 /* 3933 * Fall back to sequential scan if DNR is set to handle broken 3934 * devices which should support Identify NS List (as per the VS 3935 * they report) but don't actually support it. 3936 */ 3937 ret = nvme_scan_ns_list(ctrl); 3938 if (ret > 0 && ret & NVME_SC_DNR) 3939 nvme_scan_ns_sequential(ctrl); 3940 } 3941 mutex_unlock(&ctrl->scan_lock); 3942 } 3943 3944 /* 3945 * This function iterates the namespace list unlocked to allow recovery from 3946 * controller failure. It is up to the caller to ensure the namespace list is 3947 * not modified by scan work while this function is executing. 3948 */ 3949 void nvme_remove_namespaces(struct nvme_ctrl *ctrl) 3950 { 3951 struct nvme_ns *ns, *next; 3952 LIST_HEAD(ns_list); 3953 3954 /* 3955 * make sure to requeue I/O to all namespaces as these 3956 * might result from the scan itself and must complete 3957 * for the scan_work to make progress 3958 */ 3959 nvme_mpath_clear_ctrl_paths(ctrl); 3960 3961 /* 3962 * Unquiesce io queues so any pending IO won't hang, especially 3963 * those submitted from scan work 3964 */ 3965 nvme_unquiesce_io_queues(ctrl); 3966 3967 /* prevent racing with ns scanning */ 3968 flush_work(&ctrl->scan_work); 3969 3970 /* 3971 * The dead states indicates the controller was not gracefully 3972 * disconnected. In that case, we won't be able to flush any data while 3973 * removing the namespaces' disks; fail all the queues now to avoid 3974 * potentially having to clean up the failed sync later. 3975 */ 3976 if (nvme_ctrl_state(ctrl) == NVME_CTRL_DEAD) 3977 nvme_mark_namespaces_dead(ctrl); 3978 3979 /* this is a no-op when called from the controller reset handler */ 3980 nvme_change_ctrl_state(ctrl, NVME_CTRL_DELETING_NOIO); 3981 3982 down_write(&ctrl->namespaces_rwsem); 3983 list_splice_init(&ctrl->namespaces, &ns_list); 3984 up_write(&ctrl->namespaces_rwsem); 3985 3986 list_for_each_entry_safe(ns, next, &ns_list, list) 3987 nvme_ns_remove(ns); 3988 } 3989 EXPORT_SYMBOL_GPL(nvme_remove_namespaces); 3990 3991 static int nvme_class_uevent(const struct device *dev, struct kobj_uevent_env *env) 3992 { 3993 const struct nvme_ctrl *ctrl = 3994 container_of(dev, struct nvme_ctrl, ctrl_device); 3995 struct nvmf_ctrl_options *opts = ctrl->opts; 3996 int ret; 3997 3998 ret = add_uevent_var(env, "NVME_TRTYPE=%s", ctrl->ops->name); 3999 if (ret) 4000 return ret; 4001 4002 if (opts) { 4003 ret = add_uevent_var(env, "NVME_TRADDR=%s", opts->traddr); 4004 if (ret) 4005 return ret; 4006 4007 ret = add_uevent_var(env, "NVME_TRSVCID=%s", 4008 opts->trsvcid ?: "none"); 4009 if (ret) 4010 return ret; 4011 4012 ret = add_uevent_var(env, "NVME_HOST_TRADDR=%s", 4013 opts->host_traddr ?: "none"); 4014 if (ret) 4015 return ret; 4016 4017 ret = add_uevent_var(env, "NVME_HOST_IFACE=%s", 4018 opts->host_iface ?: "none"); 4019 } 4020 return ret; 4021 } 4022 4023 static void nvme_change_uevent(struct nvme_ctrl *ctrl, char *envdata) 4024 { 4025 char *envp[2] = { envdata, NULL }; 4026 4027 kobject_uevent_env(&ctrl->device->kobj, KOBJ_CHANGE, envp); 4028 } 4029 4030 static void nvme_aen_uevent(struct nvme_ctrl *ctrl) 4031 { 4032 char *envp[2] = { NULL, NULL }; 4033 u32 aen_result = ctrl->aen_result; 4034 4035 ctrl->aen_result = 0; 4036 if (!aen_result) 4037 return; 4038 4039 envp[0] = kasprintf(GFP_KERNEL, "NVME_AEN=%#08x", aen_result); 4040 if (!envp[0]) 4041 return; 4042 kobject_uevent_env(&ctrl->device->kobj, KOBJ_CHANGE, envp); 4043 kfree(envp[0]); 4044 } 4045 4046 static void nvme_async_event_work(struct work_struct *work) 4047 { 4048 struct nvme_ctrl *ctrl = 4049 container_of(work, struct nvme_ctrl, async_event_work); 4050 4051 nvme_aen_uevent(ctrl); 4052 4053 /* 4054 * The transport drivers must guarantee AER submission here is safe by 4055 * flushing ctrl async_event_work after changing the controller state 4056 * from LIVE and before freeing the admin queue. 4057 */ 4058 if (nvme_ctrl_state(ctrl) == NVME_CTRL_LIVE) 4059 ctrl->ops->submit_async_event(ctrl); 4060 } 4061 4062 static bool nvme_ctrl_pp_status(struct nvme_ctrl *ctrl) 4063 { 4064 4065 u32 csts; 4066 4067 if (ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts)) 4068 return false; 4069 4070 if (csts == ~0) 4071 return false; 4072 4073 return ((ctrl->ctrl_config & NVME_CC_ENABLE) && (csts & NVME_CSTS_PP)); 4074 } 4075 4076 static void nvme_get_fw_slot_info(struct nvme_ctrl *ctrl) 4077 { 4078 struct nvme_fw_slot_info_log *log; 4079 4080 log = kmalloc(sizeof(*log), GFP_KERNEL); 4081 if (!log) 4082 return; 4083 4084 if (nvme_get_log(ctrl, NVME_NSID_ALL, NVME_LOG_FW_SLOT, 0, NVME_CSI_NVM, 4085 log, sizeof(*log), 0)) 4086 dev_warn(ctrl->device, "Get FW SLOT INFO log error\n"); 4087 kfree(log); 4088 } 4089 4090 static void nvme_fw_act_work(struct work_struct *work) 4091 { 4092 struct nvme_ctrl *ctrl = container_of(work, 4093 struct nvme_ctrl, fw_act_work); 4094 unsigned long fw_act_timeout; 4095 4096 nvme_auth_stop(ctrl); 4097 4098 if (ctrl->mtfa) 4099 fw_act_timeout = jiffies + 4100 msecs_to_jiffies(ctrl->mtfa * 100); 4101 else 4102 fw_act_timeout = jiffies + 4103 msecs_to_jiffies(admin_timeout * 1000); 4104 4105 nvme_quiesce_io_queues(ctrl); 4106 while (nvme_ctrl_pp_status(ctrl)) { 4107 if (time_after(jiffies, fw_act_timeout)) { 4108 dev_warn(ctrl->device, 4109 "Fw activation timeout, reset controller\n"); 4110 nvme_try_sched_reset(ctrl); 4111 return; 4112 } 4113 msleep(100); 4114 } 4115 4116 if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_LIVE)) 4117 return; 4118 4119 nvme_unquiesce_io_queues(ctrl); 4120 /* read FW slot information to clear the AER */ 4121 nvme_get_fw_slot_info(ctrl); 4122 4123 queue_work(nvme_wq, &ctrl->async_event_work); 4124 } 4125 4126 static u32 nvme_aer_type(u32 result) 4127 { 4128 return result & 0x7; 4129 } 4130 4131 static u32 nvme_aer_subtype(u32 result) 4132 { 4133 return (result & 0xff00) >> 8; 4134 } 4135 4136 static bool nvme_handle_aen_notice(struct nvme_ctrl *ctrl, u32 result) 4137 { 4138 u32 aer_notice_type = nvme_aer_subtype(result); 4139 bool requeue = true; 4140 4141 switch (aer_notice_type) { 4142 case NVME_AER_NOTICE_NS_CHANGED: 4143 set_bit(NVME_AER_NOTICE_NS_CHANGED, &ctrl->events); 4144 nvme_queue_scan(ctrl); 4145 break; 4146 case NVME_AER_NOTICE_FW_ACT_STARTING: 4147 /* 4148 * We are (ab)using the RESETTING state to prevent subsequent 4149 * recovery actions from interfering with the controller's 4150 * firmware activation. 4151 */ 4152 if (nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING)) { 4153 requeue = false; 4154 queue_work(nvme_wq, &ctrl->fw_act_work); 4155 } 4156 break; 4157 #ifdef CONFIG_NVME_MULTIPATH 4158 case NVME_AER_NOTICE_ANA: 4159 if (!ctrl->ana_log_buf) 4160 break; 4161 queue_work(nvme_wq, &ctrl->ana_work); 4162 break; 4163 #endif 4164 case NVME_AER_NOTICE_DISC_CHANGED: 4165 ctrl->aen_result = result; 4166 break; 4167 default: 4168 dev_warn(ctrl->device, "async event result %08x\n", result); 4169 } 4170 return requeue; 4171 } 4172 4173 static void nvme_handle_aer_persistent_error(struct nvme_ctrl *ctrl) 4174 { 4175 dev_warn(ctrl->device, "resetting controller due to AER\n"); 4176 nvme_reset_ctrl(ctrl); 4177 } 4178 4179 void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status, 4180 volatile union nvme_result *res) 4181 { 4182 u32 result = le32_to_cpu(res->u32); 4183 u32 aer_type = nvme_aer_type(result); 4184 u32 aer_subtype = nvme_aer_subtype(result); 4185 bool requeue = true; 4186 4187 if (le16_to_cpu(status) >> 1 != NVME_SC_SUCCESS) 4188 return; 4189 4190 trace_nvme_async_event(ctrl, result); 4191 switch (aer_type) { 4192 case NVME_AER_NOTICE: 4193 requeue = nvme_handle_aen_notice(ctrl, result); 4194 break; 4195 case NVME_AER_ERROR: 4196 /* 4197 * For a persistent internal error, don't run async_event_work 4198 * to submit a new AER. The controller reset will do it. 4199 */ 4200 if (aer_subtype == NVME_AER_ERROR_PERSIST_INT_ERR) { 4201 nvme_handle_aer_persistent_error(ctrl); 4202 return; 4203 } 4204 fallthrough; 4205 case NVME_AER_SMART: 4206 case NVME_AER_CSS: 4207 case NVME_AER_VS: 4208 ctrl->aen_result = result; 4209 break; 4210 default: 4211 break; 4212 } 4213 4214 if (requeue) 4215 queue_work(nvme_wq, &ctrl->async_event_work); 4216 } 4217 EXPORT_SYMBOL_GPL(nvme_complete_async_event); 4218 4219 int nvme_alloc_admin_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set, 4220 const struct blk_mq_ops *ops, unsigned int cmd_size) 4221 { 4222 int ret; 4223 4224 memset(set, 0, sizeof(*set)); 4225 set->ops = ops; 4226 set->queue_depth = NVME_AQ_MQ_TAG_DEPTH; 4227 if (ctrl->ops->flags & NVME_F_FABRICS) 4228 /* Reserved for fabric connect and keep alive */ 4229 set->reserved_tags = 2; 4230 set->numa_node = ctrl->numa_node; 4231 set->flags = BLK_MQ_F_NO_SCHED; 4232 if (ctrl->ops->flags & NVME_F_BLOCKING) 4233 set->flags |= BLK_MQ_F_BLOCKING; 4234 set->cmd_size = cmd_size; 4235 set->driver_data = ctrl; 4236 set->nr_hw_queues = 1; 4237 set->timeout = NVME_ADMIN_TIMEOUT; 4238 ret = blk_mq_alloc_tag_set(set); 4239 if (ret) 4240 return ret; 4241 4242 ctrl->admin_q = blk_mq_init_queue(set); 4243 if (IS_ERR(ctrl->admin_q)) { 4244 ret = PTR_ERR(ctrl->admin_q); 4245 goto out_free_tagset; 4246 } 4247 4248 if (ctrl->ops->flags & NVME_F_FABRICS) { 4249 ctrl->fabrics_q = blk_mq_init_queue(set); 4250 if (IS_ERR(ctrl->fabrics_q)) { 4251 ret = PTR_ERR(ctrl->fabrics_q); 4252 goto out_cleanup_admin_q; 4253 } 4254 } 4255 4256 ctrl->admin_tagset = set; 4257 return 0; 4258 4259 out_cleanup_admin_q: 4260 blk_mq_destroy_queue(ctrl->admin_q); 4261 blk_put_queue(ctrl->admin_q); 4262 out_free_tagset: 4263 blk_mq_free_tag_set(set); 4264 ctrl->admin_q = NULL; 4265 ctrl->fabrics_q = NULL; 4266 return ret; 4267 } 4268 EXPORT_SYMBOL_GPL(nvme_alloc_admin_tag_set); 4269 4270 void nvme_remove_admin_tag_set(struct nvme_ctrl *ctrl) 4271 { 4272 blk_mq_destroy_queue(ctrl->admin_q); 4273 blk_put_queue(ctrl->admin_q); 4274 if (ctrl->ops->flags & NVME_F_FABRICS) { 4275 blk_mq_destroy_queue(ctrl->fabrics_q); 4276 blk_put_queue(ctrl->fabrics_q); 4277 } 4278 blk_mq_free_tag_set(ctrl->admin_tagset); 4279 } 4280 EXPORT_SYMBOL_GPL(nvme_remove_admin_tag_set); 4281 4282 int nvme_alloc_io_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set, 4283 const struct blk_mq_ops *ops, unsigned int nr_maps, 4284 unsigned int cmd_size) 4285 { 4286 int ret; 4287 4288 memset(set, 0, sizeof(*set)); 4289 set->ops = ops; 4290 set->queue_depth = min_t(unsigned, ctrl->sqsize, BLK_MQ_MAX_DEPTH - 1); 4291 /* 4292 * Some Apple controllers requires tags to be unique across admin and 4293 * the (only) I/O queue, so reserve the first 32 tags of the I/O queue. 4294 */ 4295 if (ctrl->quirks & NVME_QUIRK_SHARED_TAGS) 4296 set->reserved_tags = NVME_AQ_DEPTH; 4297 else if (ctrl->ops->flags & NVME_F_FABRICS) 4298 /* Reserved for fabric connect */ 4299 set->reserved_tags = 1; 4300 set->numa_node = ctrl->numa_node; 4301 set->flags = BLK_MQ_F_SHOULD_MERGE; 4302 if (ctrl->ops->flags & NVME_F_BLOCKING) 4303 set->flags |= BLK_MQ_F_BLOCKING; 4304 set->cmd_size = cmd_size, 4305 set->driver_data = ctrl; 4306 set->nr_hw_queues = ctrl->queue_count - 1; 4307 set->timeout = NVME_IO_TIMEOUT; 4308 set->nr_maps = nr_maps; 4309 ret = blk_mq_alloc_tag_set(set); 4310 if (ret) 4311 return ret; 4312 4313 if (ctrl->ops->flags & NVME_F_FABRICS) { 4314 ctrl->connect_q = blk_mq_init_queue(set); 4315 if (IS_ERR(ctrl->connect_q)) { 4316 ret = PTR_ERR(ctrl->connect_q); 4317 goto out_free_tag_set; 4318 } 4319 blk_queue_flag_set(QUEUE_FLAG_SKIP_TAGSET_QUIESCE, 4320 ctrl->connect_q); 4321 } 4322 4323 ctrl->tagset = set; 4324 return 0; 4325 4326 out_free_tag_set: 4327 blk_mq_free_tag_set(set); 4328 ctrl->connect_q = NULL; 4329 return ret; 4330 } 4331 EXPORT_SYMBOL_GPL(nvme_alloc_io_tag_set); 4332 4333 void nvme_remove_io_tag_set(struct nvme_ctrl *ctrl) 4334 { 4335 if (ctrl->ops->flags & NVME_F_FABRICS) { 4336 blk_mq_destroy_queue(ctrl->connect_q); 4337 blk_put_queue(ctrl->connect_q); 4338 } 4339 blk_mq_free_tag_set(ctrl->tagset); 4340 } 4341 EXPORT_SYMBOL_GPL(nvme_remove_io_tag_set); 4342 4343 void nvme_stop_ctrl(struct nvme_ctrl *ctrl) 4344 { 4345 nvme_mpath_stop(ctrl); 4346 nvme_auth_stop(ctrl); 4347 nvme_stop_keep_alive(ctrl); 4348 nvme_stop_failfast_work(ctrl); 4349 flush_work(&ctrl->async_event_work); 4350 cancel_work_sync(&ctrl->fw_act_work); 4351 if (ctrl->ops->stop_ctrl) 4352 ctrl->ops->stop_ctrl(ctrl); 4353 } 4354 EXPORT_SYMBOL_GPL(nvme_stop_ctrl); 4355 4356 void nvme_start_ctrl(struct nvme_ctrl *ctrl) 4357 { 4358 nvme_start_keep_alive(ctrl); 4359 4360 nvme_enable_aen(ctrl); 4361 4362 /* 4363 * persistent discovery controllers need to send indication to userspace 4364 * to re-read the discovery log page to learn about possible changes 4365 * that were missed. We identify persistent discovery controllers by 4366 * checking that they started once before, hence are reconnecting back. 4367 */ 4368 if (test_bit(NVME_CTRL_STARTED_ONCE, &ctrl->flags) && 4369 nvme_discovery_ctrl(ctrl)) 4370 nvme_change_uevent(ctrl, "NVME_EVENT=rediscover"); 4371 4372 if (ctrl->queue_count > 1) { 4373 nvme_queue_scan(ctrl); 4374 nvme_unquiesce_io_queues(ctrl); 4375 nvme_mpath_update(ctrl); 4376 } 4377 4378 nvme_change_uevent(ctrl, "NVME_EVENT=connected"); 4379 set_bit(NVME_CTRL_STARTED_ONCE, &ctrl->flags); 4380 } 4381 EXPORT_SYMBOL_GPL(nvme_start_ctrl); 4382 4383 void nvme_uninit_ctrl(struct nvme_ctrl *ctrl) 4384 { 4385 nvme_hwmon_exit(ctrl); 4386 nvme_fault_inject_fini(&ctrl->fault_inject); 4387 dev_pm_qos_hide_latency_tolerance(ctrl->device); 4388 cdev_device_del(&ctrl->cdev, ctrl->device); 4389 nvme_put_ctrl(ctrl); 4390 } 4391 EXPORT_SYMBOL_GPL(nvme_uninit_ctrl); 4392 4393 static void nvme_free_cels(struct nvme_ctrl *ctrl) 4394 { 4395 struct nvme_effects_log *cel; 4396 unsigned long i; 4397 4398 xa_for_each(&ctrl->cels, i, cel) { 4399 xa_erase(&ctrl->cels, i); 4400 kfree(cel); 4401 } 4402 4403 xa_destroy(&ctrl->cels); 4404 } 4405 4406 static void nvme_free_ctrl(struct device *dev) 4407 { 4408 struct nvme_ctrl *ctrl = 4409 container_of(dev, struct nvme_ctrl, ctrl_device); 4410 struct nvme_subsystem *subsys = ctrl->subsys; 4411 4412 if (!subsys || ctrl->instance != subsys->instance) 4413 ida_free(&nvme_instance_ida, ctrl->instance); 4414 4415 nvme_free_cels(ctrl); 4416 nvme_mpath_uninit(ctrl); 4417 nvme_auth_stop(ctrl); 4418 nvme_auth_free(ctrl); 4419 __free_page(ctrl->discard_page); 4420 free_opal_dev(ctrl->opal_dev); 4421 4422 if (subsys) { 4423 mutex_lock(&nvme_subsystems_lock); 4424 list_del(&ctrl->subsys_entry); 4425 sysfs_remove_link(&subsys->dev.kobj, dev_name(ctrl->device)); 4426 mutex_unlock(&nvme_subsystems_lock); 4427 } 4428 4429 ctrl->ops->free_ctrl(ctrl); 4430 4431 if (subsys) 4432 nvme_put_subsystem(subsys); 4433 } 4434 4435 /* 4436 * Initialize a NVMe controller structures. This needs to be called during 4437 * earliest initialization so that we have the initialized structured around 4438 * during probing. 4439 */ 4440 int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev, 4441 const struct nvme_ctrl_ops *ops, unsigned long quirks) 4442 { 4443 int ret; 4444 4445 WRITE_ONCE(ctrl->state, NVME_CTRL_NEW); 4446 clear_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags); 4447 spin_lock_init(&ctrl->lock); 4448 mutex_init(&ctrl->scan_lock); 4449 INIT_LIST_HEAD(&ctrl->namespaces); 4450 xa_init(&ctrl->cels); 4451 init_rwsem(&ctrl->namespaces_rwsem); 4452 ctrl->dev = dev; 4453 ctrl->ops = ops; 4454 ctrl->quirks = quirks; 4455 ctrl->numa_node = NUMA_NO_NODE; 4456 INIT_WORK(&ctrl->scan_work, nvme_scan_work); 4457 INIT_WORK(&ctrl->async_event_work, nvme_async_event_work); 4458 INIT_WORK(&ctrl->fw_act_work, nvme_fw_act_work); 4459 INIT_WORK(&ctrl->delete_work, nvme_delete_ctrl_work); 4460 init_waitqueue_head(&ctrl->state_wq); 4461 4462 INIT_DELAYED_WORK(&ctrl->ka_work, nvme_keep_alive_work); 4463 INIT_DELAYED_WORK(&ctrl->failfast_work, nvme_failfast_work); 4464 memset(&ctrl->ka_cmd, 0, sizeof(ctrl->ka_cmd)); 4465 ctrl->ka_cmd.common.opcode = nvme_admin_keep_alive; 4466 4467 BUILD_BUG_ON(NVME_DSM_MAX_RANGES * sizeof(struct nvme_dsm_range) > 4468 PAGE_SIZE); 4469 ctrl->discard_page = alloc_page(GFP_KERNEL); 4470 if (!ctrl->discard_page) { 4471 ret = -ENOMEM; 4472 goto out; 4473 } 4474 4475 ret = ida_alloc(&nvme_instance_ida, GFP_KERNEL); 4476 if (ret < 0) 4477 goto out; 4478 ctrl->instance = ret; 4479 4480 device_initialize(&ctrl->ctrl_device); 4481 ctrl->device = &ctrl->ctrl_device; 4482 ctrl->device->devt = MKDEV(MAJOR(nvme_ctrl_base_chr_devt), 4483 ctrl->instance); 4484 ctrl->device->class = nvme_class; 4485 ctrl->device->parent = ctrl->dev; 4486 if (ops->dev_attr_groups) 4487 ctrl->device->groups = ops->dev_attr_groups; 4488 else 4489 ctrl->device->groups = nvme_dev_attr_groups; 4490 ctrl->device->release = nvme_free_ctrl; 4491 dev_set_drvdata(ctrl->device, ctrl); 4492 ret = dev_set_name(ctrl->device, "nvme%d", ctrl->instance); 4493 if (ret) 4494 goto out_release_instance; 4495 4496 nvme_get_ctrl(ctrl); 4497 cdev_init(&ctrl->cdev, &nvme_dev_fops); 4498 ctrl->cdev.owner = ops->module; 4499 ret = cdev_device_add(&ctrl->cdev, ctrl->device); 4500 if (ret) 4501 goto out_free_name; 4502 4503 /* 4504 * Initialize latency tolerance controls. The sysfs files won't 4505 * be visible to userspace unless the device actually supports APST. 4506 */ 4507 ctrl->device->power.set_latency_tolerance = nvme_set_latency_tolerance; 4508 dev_pm_qos_update_user_latency_tolerance(ctrl->device, 4509 min(default_ps_max_latency_us, (unsigned long)S32_MAX)); 4510 4511 nvme_fault_inject_init(&ctrl->fault_inject, dev_name(ctrl->device)); 4512 nvme_mpath_init_ctrl(ctrl); 4513 ret = nvme_auth_init_ctrl(ctrl); 4514 if (ret) 4515 goto out_free_cdev; 4516 4517 return 0; 4518 out_free_cdev: 4519 nvme_fault_inject_fini(&ctrl->fault_inject); 4520 dev_pm_qos_hide_latency_tolerance(ctrl->device); 4521 cdev_device_del(&ctrl->cdev, ctrl->device); 4522 out_free_name: 4523 nvme_put_ctrl(ctrl); 4524 kfree_const(ctrl->device->kobj.name); 4525 out_release_instance: 4526 ida_free(&nvme_instance_ida, ctrl->instance); 4527 out: 4528 if (ctrl->discard_page) 4529 __free_page(ctrl->discard_page); 4530 return ret; 4531 } 4532 EXPORT_SYMBOL_GPL(nvme_init_ctrl); 4533 4534 /* let I/O to all namespaces fail in preparation for surprise removal */ 4535 void nvme_mark_namespaces_dead(struct nvme_ctrl *ctrl) 4536 { 4537 struct nvme_ns *ns; 4538 4539 down_read(&ctrl->namespaces_rwsem); 4540 list_for_each_entry(ns, &ctrl->namespaces, list) 4541 blk_mark_disk_dead(ns->disk); 4542 up_read(&ctrl->namespaces_rwsem); 4543 } 4544 EXPORT_SYMBOL_GPL(nvme_mark_namespaces_dead); 4545 4546 void nvme_unfreeze(struct nvme_ctrl *ctrl) 4547 { 4548 struct nvme_ns *ns; 4549 4550 down_read(&ctrl->namespaces_rwsem); 4551 list_for_each_entry(ns, &ctrl->namespaces, list) 4552 blk_mq_unfreeze_queue(ns->queue); 4553 up_read(&ctrl->namespaces_rwsem); 4554 clear_bit(NVME_CTRL_FROZEN, &ctrl->flags); 4555 } 4556 EXPORT_SYMBOL_GPL(nvme_unfreeze); 4557 4558 int nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout) 4559 { 4560 struct nvme_ns *ns; 4561 4562 down_read(&ctrl->namespaces_rwsem); 4563 list_for_each_entry(ns, &ctrl->namespaces, list) { 4564 timeout = blk_mq_freeze_queue_wait_timeout(ns->queue, timeout); 4565 if (timeout <= 0) 4566 break; 4567 } 4568 up_read(&ctrl->namespaces_rwsem); 4569 return timeout; 4570 } 4571 EXPORT_SYMBOL_GPL(nvme_wait_freeze_timeout); 4572 4573 void nvme_wait_freeze(struct nvme_ctrl *ctrl) 4574 { 4575 struct nvme_ns *ns; 4576 4577 down_read(&ctrl->namespaces_rwsem); 4578 list_for_each_entry(ns, &ctrl->namespaces, list) 4579 blk_mq_freeze_queue_wait(ns->queue); 4580 up_read(&ctrl->namespaces_rwsem); 4581 } 4582 EXPORT_SYMBOL_GPL(nvme_wait_freeze); 4583 4584 void nvme_start_freeze(struct nvme_ctrl *ctrl) 4585 { 4586 struct nvme_ns *ns; 4587 4588 set_bit(NVME_CTRL_FROZEN, &ctrl->flags); 4589 down_read(&ctrl->namespaces_rwsem); 4590 list_for_each_entry(ns, &ctrl->namespaces, list) 4591 blk_freeze_queue_start(ns->queue); 4592 up_read(&ctrl->namespaces_rwsem); 4593 } 4594 EXPORT_SYMBOL_GPL(nvme_start_freeze); 4595 4596 void nvme_quiesce_io_queues(struct nvme_ctrl *ctrl) 4597 { 4598 if (!ctrl->tagset) 4599 return; 4600 if (!test_and_set_bit(NVME_CTRL_STOPPED, &ctrl->flags)) 4601 blk_mq_quiesce_tagset(ctrl->tagset); 4602 else 4603 blk_mq_wait_quiesce_done(ctrl->tagset); 4604 } 4605 EXPORT_SYMBOL_GPL(nvme_quiesce_io_queues); 4606 4607 void nvme_unquiesce_io_queues(struct nvme_ctrl *ctrl) 4608 { 4609 if (!ctrl->tagset) 4610 return; 4611 if (test_and_clear_bit(NVME_CTRL_STOPPED, &ctrl->flags)) 4612 blk_mq_unquiesce_tagset(ctrl->tagset); 4613 } 4614 EXPORT_SYMBOL_GPL(nvme_unquiesce_io_queues); 4615 4616 void nvme_quiesce_admin_queue(struct nvme_ctrl *ctrl) 4617 { 4618 if (!test_and_set_bit(NVME_CTRL_ADMIN_Q_STOPPED, &ctrl->flags)) 4619 blk_mq_quiesce_queue(ctrl->admin_q); 4620 else 4621 blk_mq_wait_quiesce_done(ctrl->admin_q->tag_set); 4622 } 4623 EXPORT_SYMBOL_GPL(nvme_quiesce_admin_queue); 4624 4625 void nvme_unquiesce_admin_queue(struct nvme_ctrl *ctrl) 4626 { 4627 if (test_and_clear_bit(NVME_CTRL_ADMIN_Q_STOPPED, &ctrl->flags)) 4628 blk_mq_unquiesce_queue(ctrl->admin_q); 4629 } 4630 EXPORT_SYMBOL_GPL(nvme_unquiesce_admin_queue); 4631 4632 void nvme_sync_io_queues(struct nvme_ctrl *ctrl) 4633 { 4634 struct nvme_ns *ns; 4635 4636 down_read(&ctrl->namespaces_rwsem); 4637 list_for_each_entry(ns, &ctrl->namespaces, list) 4638 blk_sync_queue(ns->queue); 4639 up_read(&ctrl->namespaces_rwsem); 4640 } 4641 EXPORT_SYMBOL_GPL(nvme_sync_io_queues); 4642 4643 void nvme_sync_queues(struct nvme_ctrl *ctrl) 4644 { 4645 nvme_sync_io_queues(ctrl); 4646 if (ctrl->admin_q) 4647 blk_sync_queue(ctrl->admin_q); 4648 } 4649 EXPORT_SYMBOL_GPL(nvme_sync_queues); 4650 4651 struct nvme_ctrl *nvme_ctrl_from_file(struct file *file) 4652 { 4653 if (file->f_op != &nvme_dev_fops) 4654 return NULL; 4655 return file->private_data; 4656 } 4657 EXPORT_SYMBOL_NS_GPL(nvme_ctrl_from_file, NVME_TARGET_PASSTHRU); 4658 4659 /* 4660 * Check we didn't inadvertently grow the command structure sizes: 4661 */ 4662 static inline void _nvme_check_size(void) 4663 { 4664 BUILD_BUG_ON(sizeof(struct nvme_common_command) != 64); 4665 BUILD_BUG_ON(sizeof(struct nvme_rw_command) != 64); 4666 BUILD_BUG_ON(sizeof(struct nvme_identify) != 64); 4667 BUILD_BUG_ON(sizeof(struct nvme_features) != 64); 4668 BUILD_BUG_ON(sizeof(struct nvme_download_firmware) != 64); 4669 BUILD_BUG_ON(sizeof(struct nvme_format_cmd) != 64); 4670 BUILD_BUG_ON(sizeof(struct nvme_dsm_cmd) != 64); 4671 BUILD_BUG_ON(sizeof(struct nvme_write_zeroes_cmd) != 64); 4672 BUILD_BUG_ON(sizeof(struct nvme_abort_cmd) != 64); 4673 BUILD_BUG_ON(sizeof(struct nvme_get_log_page_command) != 64); 4674 BUILD_BUG_ON(sizeof(struct nvme_command) != 64); 4675 BUILD_BUG_ON(sizeof(struct nvme_id_ctrl) != NVME_IDENTIFY_DATA_SIZE); 4676 BUILD_BUG_ON(sizeof(struct nvme_id_ns) != NVME_IDENTIFY_DATA_SIZE); 4677 BUILD_BUG_ON(sizeof(struct nvme_id_ns_cs_indep) != 4678 NVME_IDENTIFY_DATA_SIZE); 4679 BUILD_BUG_ON(sizeof(struct nvme_id_ns_zns) != NVME_IDENTIFY_DATA_SIZE); 4680 BUILD_BUG_ON(sizeof(struct nvme_id_ns_nvm) != NVME_IDENTIFY_DATA_SIZE); 4681 BUILD_BUG_ON(sizeof(struct nvme_id_ctrl_zns) != NVME_IDENTIFY_DATA_SIZE); 4682 BUILD_BUG_ON(sizeof(struct nvme_id_ctrl_nvm) != NVME_IDENTIFY_DATA_SIZE); 4683 BUILD_BUG_ON(sizeof(struct nvme_lba_range_type) != 64); 4684 BUILD_BUG_ON(sizeof(struct nvme_smart_log) != 512); 4685 BUILD_BUG_ON(sizeof(struct nvme_dbbuf) != 64); 4686 BUILD_BUG_ON(sizeof(struct nvme_directive_cmd) != 64); 4687 BUILD_BUG_ON(sizeof(struct nvme_feat_host_behavior) != 512); 4688 } 4689 4690 4691 static int __init nvme_core_init(void) 4692 { 4693 int result = -ENOMEM; 4694 4695 _nvme_check_size(); 4696 4697 nvme_wq = alloc_workqueue("nvme-wq", 4698 WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_SYSFS, 0); 4699 if (!nvme_wq) 4700 goto out; 4701 4702 nvme_reset_wq = alloc_workqueue("nvme-reset-wq", 4703 WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_SYSFS, 0); 4704 if (!nvme_reset_wq) 4705 goto destroy_wq; 4706 4707 nvme_delete_wq = alloc_workqueue("nvme-delete-wq", 4708 WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_SYSFS, 0); 4709 if (!nvme_delete_wq) 4710 goto destroy_reset_wq; 4711 4712 result = alloc_chrdev_region(&nvme_ctrl_base_chr_devt, 0, 4713 NVME_MINORS, "nvme"); 4714 if (result < 0) 4715 goto destroy_delete_wq; 4716 4717 nvme_class = class_create("nvme"); 4718 if (IS_ERR(nvme_class)) { 4719 result = PTR_ERR(nvme_class); 4720 goto unregister_chrdev; 4721 } 4722 nvme_class->dev_uevent = nvme_class_uevent; 4723 4724 nvme_subsys_class = class_create("nvme-subsystem"); 4725 if (IS_ERR(nvme_subsys_class)) { 4726 result = PTR_ERR(nvme_subsys_class); 4727 goto destroy_class; 4728 } 4729 4730 result = alloc_chrdev_region(&nvme_ns_chr_devt, 0, NVME_MINORS, 4731 "nvme-generic"); 4732 if (result < 0) 4733 goto destroy_subsys_class; 4734 4735 nvme_ns_chr_class = class_create("nvme-generic"); 4736 if (IS_ERR(nvme_ns_chr_class)) { 4737 result = PTR_ERR(nvme_ns_chr_class); 4738 goto unregister_generic_ns; 4739 } 4740 4741 result = nvme_init_auth(); 4742 if (result) 4743 goto destroy_ns_chr; 4744 return 0; 4745 4746 destroy_ns_chr: 4747 class_destroy(nvme_ns_chr_class); 4748 unregister_generic_ns: 4749 unregister_chrdev_region(nvme_ns_chr_devt, NVME_MINORS); 4750 destroy_subsys_class: 4751 class_destroy(nvme_subsys_class); 4752 destroy_class: 4753 class_destroy(nvme_class); 4754 unregister_chrdev: 4755 unregister_chrdev_region(nvme_ctrl_base_chr_devt, NVME_MINORS); 4756 destroy_delete_wq: 4757 destroy_workqueue(nvme_delete_wq); 4758 destroy_reset_wq: 4759 destroy_workqueue(nvme_reset_wq); 4760 destroy_wq: 4761 destroy_workqueue(nvme_wq); 4762 out: 4763 return result; 4764 } 4765 4766 static void __exit nvme_core_exit(void) 4767 { 4768 nvme_exit_auth(); 4769 class_destroy(nvme_ns_chr_class); 4770 class_destroy(nvme_subsys_class); 4771 class_destroy(nvme_class); 4772 unregister_chrdev_region(nvme_ns_chr_devt, NVME_MINORS); 4773 unregister_chrdev_region(nvme_ctrl_base_chr_devt, NVME_MINORS); 4774 destroy_workqueue(nvme_delete_wq); 4775 destroy_workqueue(nvme_reset_wq); 4776 destroy_workqueue(nvme_wq); 4777 ida_destroy(&nvme_ns_chr_minor_ida); 4778 ida_destroy(&nvme_instance_ida); 4779 } 4780 4781 MODULE_LICENSE("GPL"); 4782 MODULE_VERSION("1.0"); 4783 module_init(nvme_core_init); 4784 module_exit(nvme_core_exit); 4785