xref: /openbmc/linux/drivers/nvme/host/core.c (revision 6486a57f)
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * NVM Express device driver
4  * Copyright (c) 2011-2014, Intel Corporation.
5  */
6 
7 #include <linux/blkdev.h>
8 #include <linux/blk-mq.h>
9 #include <linux/blk-integrity.h>
10 #include <linux/compat.h>
11 #include <linux/delay.h>
12 #include <linux/errno.h>
13 #include <linux/hdreg.h>
14 #include <linux/kernel.h>
15 #include <linux/module.h>
16 #include <linux/backing-dev.h>
17 #include <linux/slab.h>
18 #include <linux/types.h>
19 #include <linux/pr.h>
20 #include <linux/ptrace.h>
21 #include <linux/nvme_ioctl.h>
22 #include <linux/pm_qos.h>
23 #include <asm/unaligned.h>
24 
25 #include "nvme.h"
26 #include "fabrics.h"
27 #include <linux/nvme-auth.h>
28 
29 #define CREATE_TRACE_POINTS
30 #include "trace.h"
31 
32 #define NVME_MINORS		(1U << MINORBITS)
33 
34 struct nvme_ns_info {
35 	struct nvme_ns_ids ids;
36 	u32 nsid;
37 	__le32 anagrpid;
38 	bool is_shared;
39 	bool is_readonly;
40 	bool is_ready;
41 };
42 
43 unsigned int admin_timeout = 60;
44 module_param(admin_timeout, uint, 0644);
45 MODULE_PARM_DESC(admin_timeout, "timeout in seconds for admin commands");
46 EXPORT_SYMBOL_GPL(admin_timeout);
47 
48 unsigned int nvme_io_timeout = 30;
49 module_param_named(io_timeout, nvme_io_timeout, uint, 0644);
50 MODULE_PARM_DESC(io_timeout, "timeout in seconds for I/O");
51 EXPORT_SYMBOL_GPL(nvme_io_timeout);
52 
53 static unsigned char shutdown_timeout = 5;
54 module_param(shutdown_timeout, byte, 0644);
55 MODULE_PARM_DESC(shutdown_timeout, "timeout in seconds for controller shutdown");
56 
57 static u8 nvme_max_retries = 5;
58 module_param_named(max_retries, nvme_max_retries, byte, 0644);
59 MODULE_PARM_DESC(max_retries, "max number of retries a command may have");
60 
61 static unsigned long default_ps_max_latency_us = 100000;
62 module_param(default_ps_max_latency_us, ulong, 0644);
63 MODULE_PARM_DESC(default_ps_max_latency_us,
64 		 "max power saving latency for new devices; use PM QOS to change per device");
65 
66 static bool force_apst;
67 module_param(force_apst, bool, 0644);
68 MODULE_PARM_DESC(force_apst, "allow APST for newly enumerated devices even if quirked off");
69 
70 static unsigned long apst_primary_timeout_ms = 100;
71 module_param(apst_primary_timeout_ms, ulong, 0644);
72 MODULE_PARM_DESC(apst_primary_timeout_ms,
73 	"primary APST timeout in ms");
74 
75 static unsigned long apst_secondary_timeout_ms = 2000;
76 module_param(apst_secondary_timeout_ms, ulong, 0644);
77 MODULE_PARM_DESC(apst_secondary_timeout_ms,
78 	"secondary APST timeout in ms");
79 
80 static unsigned long apst_primary_latency_tol_us = 15000;
81 module_param(apst_primary_latency_tol_us, ulong, 0644);
82 MODULE_PARM_DESC(apst_primary_latency_tol_us,
83 	"primary APST latency tolerance in us");
84 
85 static unsigned long apst_secondary_latency_tol_us = 100000;
86 module_param(apst_secondary_latency_tol_us, ulong, 0644);
87 MODULE_PARM_DESC(apst_secondary_latency_tol_us,
88 	"secondary APST latency tolerance in us");
89 
90 /*
91  * nvme_wq - hosts nvme related works that are not reset or delete
92  * nvme_reset_wq - hosts nvme reset works
93  * nvme_delete_wq - hosts nvme delete works
94  *
95  * nvme_wq will host works such as scan, aen handling, fw activation,
96  * keep-alive, periodic reconnects etc. nvme_reset_wq
97  * runs reset works which also flush works hosted on nvme_wq for
98  * serialization purposes. nvme_delete_wq host controller deletion
99  * works which flush reset works for serialization.
100  */
101 struct workqueue_struct *nvme_wq;
102 EXPORT_SYMBOL_GPL(nvme_wq);
103 
104 struct workqueue_struct *nvme_reset_wq;
105 EXPORT_SYMBOL_GPL(nvme_reset_wq);
106 
107 struct workqueue_struct *nvme_delete_wq;
108 EXPORT_SYMBOL_GPL(nvme_delete_wq);
109 
110 static LIST_HEAD(nvme_subsystems);
111 static DEFINE_MUTEX(nvme_subsystems_lock);
112 
113 static DEFINE_IDA(nvme_instance_ida);
114 static dev_t nvme_ctrl_base_chr_devt;
115 static struct class *nvme_class;
116 static struct class *nvme_subsys_class;
117 
118 static DEFINE_IDA(nvme_ns_chr_minor_ida);
119 static dev_t nvme_ns_chr_devt;
120 static struct class *nvme_ns_chr_class;
121 
122 static void nvme_put_subsystem(struct nvme_subsystem *subsys);
123 static void nvme_remove_invalid_namespaces(struct nvme_ctrl *ctrl,
124 					   unsigned nsid);
125 static void nvme_update_keep_alive(struct nvme_ctrl *ctrl,
126 				   struct nvme_command *cmd);
127 
128 void nvme_queue_scan(struct nvme_ctrl *ctrl)
129 {
130 	/*
131 	 * Only new queue scan work when admin and IO queues are both alive
132 	 */
133 	if (ctrl->state == NVME_CTRL_LIVE && ctrl->tagset)
134 		queue_work(nvme_wq, &ctrl->scan_work);
135 }
136 
137 /*
138  * Use this function to proceed with scheduling reset_work for a controller
139  * that had previously been set to the resetting state. This is intended for
140  * code paths that can't be interrupted by other reset attempts. A hot removal
141  * may prevent this from succeeding.
142  */
143 int nvme_try_sched_reset(struct nvme_ctrl *ctrl)
144 {
145 	if (ctrl->state != NVME_CTRL_RESETTING)
146 		return -EBUSY;
147 	if (!queue_work(nvme_reset_wq, &ctrl->reset_work))
148 		return -EBUSY;
149 	return 0;
150 }
151 EXPORT_SYMBOL_GPL(nvme_try_sched_reset);
152 
153 static void nvme_failfast_work(struct work_struct *work)
154 {
155 	struct nvme_ctrl *ctrl = container_of(to_delayed_work(work),
156 			struct nvme_ctrl, failfast_work);
157 
158 	if (ctrl->state != NVME_CTRL_CONNECTING)
159 		return;
160 
161 	set_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags);
162 	dev_info(ctrl->device, "failfast expired\n");
163 	nvme_kick_requeue_lists(ctrl);
164 }
165 
166 static inline void nvme_start_failfast_work(struct nvme_ctrl *ctrl)
167 {
168 	if (!ctrl->opts || ctrl->opts->fast_io_fail_tmo == -1)
169 		return;
170 
171 	schedule_delayed_work(&ctrl->failfast_work,
172 			      ctrl->opts->fast_io_fail_tmo * HZ);
173 }
174 
175 static inline void nvme_stop_failfast_work(struct nvme_ctrl *ctrl)
176 {
177 	if (!ctrl->opts)
178 		return;
179 
180 	cancel_delayed_work_sync(&ctrl->failfast_work);
181 	clear_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags);
182 }
183 
184 
185 int nvme_reset_ctrl(struct nvme_ctrl *ctrl)
186 {
187 	if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING))
188 		return -EBUSY;
189 	if (!queue_work(nvme_reset_wq, &ctrl->reset_work))
190 		return -EBUSY;
191 	return 0;
192 }
193 EXPORT_SYMBOL_GPL(nvme_reset_ctrl);
194 
195 int nvme_reset_ctrl_sync(struct nvme_ctrl *ctrl)
196 {
197 	int ret;
198 
199 	ret = nvme_reset_ctrl(ctrl);
200 	if (!ret) {
201 		flush_work(&ctrl->reset_work);
202 		if (ctrl->state != NVME_CTRL_LIVE)
203 			ret = -ENETRESET;
204 	}
205 
206 	return ret;
207 }
208 
209 static void nvme_do_delete_ctrl(struct nvme_ctrl *ctrl)
210 {
211 	dev_info(ctrl->device,
212 		 "Removing ctrl: NQN \"%s\"\n", nvmf_ctrl_subsysnqn(ctrl));
213 
214 	flush_work(&ctrl->reset_work);
215 	nvme_stop_ctrl(ctrl);
216 	nvme_remove_namespaces(ctrl);
217 	ctrl->ops->delete_ctrl(ctrl);
218 	nvme_uninit_ctrl(ctrl);
219 }
220 
221 static void nvme_delete_ctrl_work(struct work_struct *work)
222 {
223 	struct nvme_ctrl *ctrl =
224 		container_of(work, struct nvme_ctrl, delete_work);
225 
226 	nvme_do_delete_ctrl(ctrl);
227 }
228 
229 int nvme_delete_ctrl(struct nvme_ctrl *ctrl)
230 {
231 	if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_DELETING))
232 		return -EBUSY;
233 	if (!queue_work(nvme_delete_wq, &ctrl->delete_work))
234 		return -EBUSY;
235 	return 0;
236 }
237 EXPORT_SYMBOL_GPL(nvme_delete_ctrl);
238 
239 static void nvme_delete_ctrl_sync(struct nvme_ctrl *ctrl)
240 {
241 	/*
242 	 * Keep a reference until nvme_do_delete_ctrl() complete,
243 	 * since ->delete_ctrl can free the controller.
244 	 */
245 	nvme_get_ctrl(ctrl);
246 	if (nvme_change_ctrl_state(ctrl, NVME_CTRL_DELETING))
247 		nvme_do_delete_ctrl(ctrl);
248 	nvme_put_ctrl(ctrl);
249 }
250 
251 static blk_status_t nvme_error_status(u16 status)
252 {
253 	switch (status & 0x7ff) {
254 	case NVME_SC_SUCCESS:
255 		return BLK_STS_OK;
256 	case NVME_SC_CAP_EXCEEDED:
257 		return BLK_STS_NOSPC;
258 	case NVME_SC_LBA_RANGE:
259 	case NVME_SC_CMD_INTERRUPTED:
260 	case NVME_SC_NS_NOT_READY:
261 		return BLK_STS_TARGET;
262 	case NVME_SC_BAD_ATTRIBUTES:
263 	case NVME_SC_ONCS_NOT_SUPPORTED:
264 	case NVME_SC_INVALID_OPCODE:
265 	case NVME_SC_INVALID_FIELD:
266 	case NVME_SC_INVALID_NS:
267 		return BLK_STS_NOTSUPP;
268 	case NVME_SC_WRITE_FAULT:
269 	case NVME_SC_READ_ERROR:
270 	case NVME_SC_UNWRITTEN_BLOCK:
271 	case NVME_SC_ACCESS_DENIED:
272 	case NVME_SC_READ_ONLY:
273 	case NVME_SC_COMPARE_FAILED:
274 		return BLK_STS_MEDIUM;
275 	case NVME_SC_GUARD_CHECK:
276 	case NVME_SC_APPTAG_CHECK:
277 	case NVME_SC_REFTAG_CHECK:
278 	case NVME_SC_INVALID_PI:
279 		return BLK_STS_PROTECTION;
280 	case NVME_SC_RESERVATION_CONFLICT:
281 		return BLK_STS_NEXUS;
282 	case NVME_SC_HOST_PATH_ERROR:
283 		return BLK_STS_TRANSPORT;
284 	case NVME_SC_ZONE_TOO_MANY_ACTIVE:
285 		return BLK_STS_ZONE_ACTIVE_RESOURCE;
286 	case NVME_SC_ZONE_TOO_MANY_OPEN:
287 		return BLK_STS_ZONE_OPEN_RESOURCE;
288 	default:
289 		return BLK_STS_IOERR;
290 	}
291 }
292 
293 static void nvme_retry_req(struct request *req)
294 {
295 	unsigned long delay = 0;
296 	u16 crd;
297 
298 	/* The mask and shift result must be <= 3 */
299 	crd = (nvme_req(req)->status & NVME_SC_CRD) >> 11;
300 	if (crd)
301 		delay = nvme_req(req)->ctrl->crdt[crd - 1] * 100;
302 
303 	nvme_req(req)->retries++;
304 	blk_mq_requeue_request(req, false);
305 	blk_mq_delay_kick_requeue_list(req->q, delay);
306 }
307 
308 static void nvme_log_error(struct request *req)
309 {
310 	struct nvme_ns *ns = req->q->queuedata;
311 	struct nvme_request *nr = nvme_req(req);
312 
313 	if (ns) {
314 		pr_err_ratelimited("%s: %s(0x%x) @ LBA %llu, %llu blocks, %s (sct 0x%x / sc 0x%x) %s%s\n",
315 		       ns->disk ? ns->disk->disk_name : "?",
316 		       nvme_get_opcode_str(nr->cmd->common.opcode),
317 		       nr->cmd->common.opcode,
318 		       (unsigned long long)nvme_sect_to_lba(ns, blk_rq_pos(req)),
319 		       (unsigned long long)blk_rq_bytes(req) >> ns->lba_shift,
320 		       nvme_get_error_status_str(nr->status),
321 		       nr->status >> 8 & 7,	/* Status Code Type */
322 		       nr->status & 0xff,	/* Status Code */
323 		       nr->status & NVME_SC_MORE ? "MORE " : "",
324 		       nr->status & NVME_SC_DNR  ? "DNR "  : "");
325 		return;
326 	}
327 
328 	pr_err_ratelimited("%s: %s(0x%x), %s (sct 0x%x / sc 0x%x) %s%s\n",
329 			   dev_name(nr->ctrl->device),
330 			   nvme_get_admin_opcode_str(nr->cmd->common.opcode),
331 			   nr->cmd->common.opcode,
332 			   nvme_get_error_status_str(nr->status),
333 			   nr->status >> 8 & 7,	/* Status Code Type */
334 			   nr->status & 0xff,	/* Status Code */
335 			   nr->status & NVME_SC_MORE ? "MORE " : "",
336 			   nr->status & NVME_SC_DNR  ? "DNR "  : "");
337 }
338 
339 enum nvme_disposition {
340 	COMPLETE,
341 	RETRY,
342 	FAILOVER,
343 	AUTHENTICATE,
344 };
345 
346 static inline enum nvme_disposition nvme_decide_disposition(struct request *req)
347 {
348 	if (likely(nvme_req(req)->status == 0))
349 		return COMPLETE;
350 
351 	if ((nvme_req(req)->status & 0x7ff) == NVME_SC_AUTH_REQUIRED)
352 		return AUTHENTICATE;
353 
354 	if (blk_noretry_request(req) ||
355 	    (nvme_req(req)->status & NVME_SC_DNR) ||
356 	    nvme_req(req)->retries >= nvme_max_retries)
357 		return COMPLETE;
358 
359 	if (req->cmd_flags & REQ_NVME_MPATH) {
360 		if (nvme_is_path_error(nvme_req(req)->status) ||
361 		    blk_queue_dying(req->q))
362 			return FAILOVER;
363 	} else {
364 		if (blk_queue_dying(req->q))
365 			return COMPLETE;
366 	}
367 
368 	return RETRY;
369 }
370 
371 static inline void nvme_end_req_zoned(struct request *req)
372 {
373 	if (IS_ENABLED(CONFIG_BLK_DEV_ZONED) &&
374 	    req_op(req) == REQ_OP_ZONE_APPEND)
375 		req->__sector = nvme_lba_to_sect(req->q->queuedata,
376 			le64_to_cpu(nvme_req(req)->result.u64));
377 }
378 
379 static inline void nvme_end_req(struct request *req)
380 {
381 	blk_status_t status = nvme_error_status(nvme_req(req)->status);
382 
383 	if (unlikely(nvme_req(req)->status && !(req->rq_flags & RQF_QUIET)))
384 		nvme_log_error(req);
385 	nvme_end_req_zoned(req);
386 	nvme_trace_bio_complete(req);
387 	if (req->cmd_flags & REQ_NVME_MPATH)
388 		nvme_mpath_end_request(req);
389 	blk_mq_end_request(req, status);
390 }
391 
392 void nvme_complete_rq(struct request *req)
393 {
394 	struct nvme_ctrl *ctrl = nvme_req(req)->ctrl;
395 
396 	trace_nvme_complete_rq(req);
397 	nvme_cleanup_cmd(req);
398 
399 	if (ctrl->kas)
400 		ctrl->comp_seen = true;
401 
402 	switch (nvme_decide_disposition(req)) {
403 	case COMPLETE:
404 		nvme_end_req(req);
405 		return;
406 	case RETRY:
407 		nvme_retry_req(req);
408 		return;
409 	case FAILOVER:
410 		nvme_failover_req(req);
411 		return;
412 	case AUTHENTICATE:
413 #ifdef CONFIG_NVME_AUTH
414 		queue_work(nvme_wq, &ctrl->dhchap_auth_work);
415 		nvme_retry_req(req);
416 #else
417 		nvme_end_req(req);
418 #endif
419 		return;
420 	}
421 }
422 EXPORT_SYMBOL_GPL(nvme_complete_rq);
423 
424 void nvme_complete_batch_req(struct request *req)
425 {
426 	trace_nvme_complete_rq(req);
427 	nvme_cleanup_cmd(req);
428 	nvme_end_req_zoned(req);
429 }
430 EXPORT_SYMBOL_GPL(nvme_complete_batch_req);
431 
432 /*
433  * Called to unwind from ->queue_rq on a failed command submission so that the
434  * multipathing code gets called to potentially failover to another path.
435  * The caller needs to unwind all transport specific resource allocations and
436  * must return propagate the return value.
437  */
438 blk_status_t nvme_host_path_error(struct request *req)
439 {
440 	nvme_req(req)->status = NVME_SC_HOST_PATH_ERROR;
441 	blk_mq_set_request_complete(req);
442 	nvme_complete_rq(req);
443 	return BLK_STS_OK;
444 }
445 EXPORT_SYMBOL_GPL(nvme_host_path_error);
446 
447 bool nvme_cancel_request(struct request *req, void *data)
448 {
449 	dev_dbg_ratelimited(((struct nvme_ctrl *) data)->device,
450 				"Cancelling I/O %d", req->tag);
451 
452 	/* don't abort one completed request */
453 	if (blk_mq_request_completed(req))
454 		return true;
455 
456 	nvme_req(req)->status = NVME_SC_HOST_ABORTED_CMD;
457 	nvme_req(req)->flags |= NVME_REQ_CANCELLED;
458 	blk_mq_complete_request(req);
459 	return true;
460 }
461 EXPORT_SYMBOL_GPL(nvme_cancel_request);
462 
463 void nvme_cancel_tagset(struct nvme_ctrl *ctrl)
464 {
465 	if (ctrl->tagset) {
466 		blk_mq_tagset_busy_iter(ctrl->tagset,
467 				nvme_cancel_request, ctrl);
468 		blk_mq_tagset_wait_completed_request(ctrl->tagset);
469 	}
470 }
471 EXPORT_SYMBOL_GPL(nvme_cancel_tagset);
472 
473 void nvme_cancel_admin_tagset(struct nvme_ctrl *ctrl)
474 {
475 	if (ctrl->admin_tagset) {
476 		blk_mq_tagset_busy_iter(ctrl->admin_tagset,
477 				nvme_cancel_request, ctrl);
478 		blk_mq_tagset_wait_completed_request(ctrl->admin_tagset);
479 	}
480 }
481 EXPORT_SYMBOL_GPL(nvme_cancel_admin_tagset);
482 
483 bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl,
484 		enum nvme_ctrl_state new_state)
485 {
486 	enum nvme_ctrl_state old_state;
487 	unsigned long flags;
488 	bool changed = false;
489 
490 	spin_lock_irqsave(&ctrl->lock, flags);
491 
492 	old_state = ctrl->state;
493 	switch (new_state) {
494 	case NVME_CTRL_LIVE:
495 		switch (old_state) {
496 		case NVME_CTRL_NEW:
497 		case NVME_CTRL_RESETTING:
498 		case NVME_CTRL_CONNECTING:
499 			changed = true;
500 			fallthrough;
501 		default:
502 			break;
503 		}
504 		break;
505 	case NVME_CTRL_RESETTING:
506 		switch (old_state) {
507 		case NVME_CTRL_NEW:
508 		case NVME_CTRL_LIVE:
509 			changed = true;
510 			fallthrough;
511 		default:
512 			break;
513 		}
514 		break;
515 	case NVME_CTRL_CONNECTING:
516 		switch (old_state) {
517 		case NVME_CTRL_NEW:
518 		case NVME_CTRL_RESETTING:
519 			changed = true;
520 			fallthrough;
521 		default:
522 			break;
523 		}
524 		break;
525 	case NVME_CTRL_DELETING:
526 		switch (old_state) {
527 		case NVME_CTRL_LIVE:
528 		case NVME_CTRL_RESETTING:
529 		case NVME_CTRL_CONNECTING:
530 			changed = true;
531 			fallthrough;
532 		default:
533 			break;
534 		}
535 		break;
536 	case NVME_CTRL_DELETING_NOIO:
537 		switch (old_state) {
538 		case NVME_CTRL_DELETING:
539 		case NVME_CTRL_DEAD:
540 			changed = true;
541 			fallthrough;
542 		default:
543 			break;
544 		}
545 		break;
546 	case NVME_CTRL_DEAD:
547 		switch (old_state) {
548 		case NVME_CTRL_DELETING:
549 			changed = true;
550 			fallthrough;
551 		default:
552 			break;
553 		}
554 		break;
555 	default:
556 		break;
557 	}
558 
559 	if (changed) {
560 		ctrl->state = new_state;
561 		wake_up_all(&ctrl->state_wq);
562 	}
563 
564 	spin_unlock_irqrestore(&ctrl->lock, flags);
565 	if (!changed)
566 		return false;
567 
568 	if (ctrl->state == NVME_CTRL_LIVE) {
569 		if (old_state == NVME_CTRL_CONNECTING)
570 			nvme_stop_failfast_work(ctrl);
571 		nvme_kick_requeue_lists(ctrl);
572 	} else if (ctrl->state == NVME_CTRL_CONNECTING &&
573 		old_state == NVME_CTRL_RESETTING) {
574 		nvme_start_failfast_work(ctrl);
575 	}
576 	return changed;
577 }
578 EXPORT_SYMBOL_GPL(nvme_change_ctrl_state);
579 
580 /*
581  * Returns true for sink states that can't ever transition back to live.
582  */
583 static bool nvme_state_terminal(struct nvme_ctrl *ctrl)
584 {
585 	switch (ctrl->state) {
586 	case NVME_CTRL_NEW:
587 	case NVME_CTRL_LIVE:
588 	case NVME_CTRL_RESETTING:
589 	case NVME_CTRL_CONNECTING:
590 		return false;
591 	case NVME_CTRL_DELETING:
592 	case NVME_CTRL_DELETING_NOIO:
593 	case NVME_CTRL_DEAD:
594 		return true;
595 	default:
596 		WARN_ONCE(1, "Unhandled ctrl state:%d", ctrl->state);
597 		return true;
598 	}
599 }
600 
601 /*
602  * Waits for the controller state to be resetting, or returns false if it is
603  * not possible to ever transition to that state.
604  */
605 bool nvme_wait_reset(struct nvme_ctrl *ctrl)
606 {
607 	wait_event(ctrl->state_wq,
608 		   nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING) ||
609 		   nvme_state_terminal(ctrl));
610 	return ctrl->state == NVME_CTRL_RESETTING;
611 }
612 EXPORT_SYMBOL_GPL(nvme_wait_reset);
613 
614 static void nvme_free_ns_head(struct kref *ref)
615 {
616 	struct nvme_ns_head *head =
617 		container_of(ref, struct nvme_ns_head, ref);
618 
619 	nvme_mpath_remove_disk(head);
620 	ida_free(&head->subsys->ns_ida, head->instance);
621 	cleanup_srcu_struct(&head->srcu);
622 	nvme_put_subsystem(head->subsys);
623 	kfree(head);
624 }
625 
626 bool nvme_tryget_ns_head(struct nvme_ns_head *head)
627 {
628 	return kref_get_unless_zero(&head->ref);
629 }
630 
631 void nvme_put_ns_head(struct nvme_ns_head *head)
632 {
633 	kref_put(&head->ref, nvme_free_ns_head);
634 }
635 
636 static void nvme_free_ns(struct kref *kref)
637 {
638 	struct nvme_ns *ns = container_of(kref, struct nvme_ns, kref);
639 
640 	put_disk(ns->disk);
641 	nvme_put_ns_head(ns->head);
642 	nvme_put_ctrl(ns->ctrl);
643 	kfree(ns);
644 }
645 
646 static inline bool nvme_get_ns(struct nvme_ns *ns)
647 {
648 	return kref_get_unless_zero(&ns->kref);
649 }
650 
651 void nvme_put_ns(struct nvme_ns *ns)
652 {
653 	kref_put(&ns->kref, nvme_free_ns);
654 }
655 EXPORT_SYMBOL_NS_GPL(nvme_put_ns, NVME_TARGET_PASSTHRU);
656 
657 static inline void nvme_clear_nvme_request(struct request *req)
658 {
659 	nvme_req(req)->status = 0;
660 	nvme_req(req)->retries = 0;
661 	nvme_req(req)->flags = 0;
662 	req->rq_flags |= RQF_DONTPREP;
663 }
664 
665 /* initialize a passthrough request */
666 void nvme_init_request(struct request *req, struct nvme_command *cmd)
667 {
668 	if (req->q->queuedata)
669 		req->timeout = NVME_IO_TIMEOUT;
670 	else /* no queuedata implies admin queue */
671 		req->timeout = NVME_ADMIN_TIMEOUT;
672 
673 	/* passthru commands should let the driver set the SGL flags */
674 	cmd->common.flags &= ~NVME_CMD_SGL_ALL;
675 
676 	req->cmd_flags |= REQ_FAILFAST_DRIVER;
677 	if (req->mq_hctx->type == HCTX_TYPE_POLL)
678 		req->cmd_flags |= REQ_POLLED;
679 	nvme_clear_nvme_request(req);
680 	req->rq_flags |= RQF_QUIET;
681 	memcpy(nvme_req(req)->cmd, cmd, sizeof(*cmd));
682 }
683 EXPORT_SYMBOL_GPL(nvme_init_request);
684 
685 /*
686  * For something we're not in a state to send to the device the default action
687  * is to busy it and retry it after the controller state is recovered.  However,
688  * if the controller is deleting or if anything is marked for failfast or
689  * nvme multipath it is immediately failed.
690  *
691  * Note: commands used to initialize the controller will be marked for failfast.
692  * Note: nvme cli/ioctl commands are marked for failfast.
693  */
694 blk_status_t nvme_fail_nonready_command(struct nvme_ctrl *ctrl,
695 		struct request *rq)
696 {
697 	if (ctrl->state != NVME_CTRL_DELETING_NOIO &&
698 	    ctrl->state != NVME_CTRL_DELETING &&
699 	    ctrl->state != NVME_CTRL_DEAD &&
700 	    !test_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags) &&
701 	    !blk_noretry_request(rq) && !(rq->cmd_flags & REQ_NVME_MPATH))
702 		return BLK_STS_RESOURCE;
703 	return nvme_host_path_error(rq);
704 }
705 EXPORT_SYMBOL_GPL(nvme_fail_nonready_command);
706 
707 bool __nvme_check_ready(struct nvme_ctrl *ctrl, struct request *rq,
708 		bool queue_live)
709 {
710 	struct nvme_request *req = nvme_req(rq);
711 
712 	/*
713 	 * currently we have a problem sending passthru commands
714 	 * on the admin_q if the controller is not LIVE because we can't
715 	 * make sure that they are going out after the admin connect,
716 	 * controller enable and/or other commands in the initialization
717 	 * sequence. until the controller will be LIVE, fail with
718 	 * BLK_STS_RESOURCE so that they will be rescheduled.
719 	 */
720 	if (rq->q == ctrl->admin_q && (req->flags & NVME_REQ_USERCMD))
721 		return false;
722 
723 	if (ctrl->ops->flags & NVME_F_FABRICS) {
724 		/*
725 		 * Only allow commands on a live queue, except for the connect
726 		 * command, which is require to set the queue live in the
727 		 * appropinquate states.
728 		 */
729 		switch (ctrl->state) {
730 		case NVME_CTRL_CONNECTING:
731 			if (blk_rq_is_passthrough(rq) && nvme_is_fabrics(req->cmd) &&
732 			    (req->cmd->fabrics.fctype == nvme_fabrics_type_connect ||
733 			     req->cmd->fabrics.fctype == nvme_fabrics_type_auth_send ||
734 			     req->cmd->fabrics.fctype == nvme_fabrics_type_auth_receive))
735 				return true;
736 			break;
737 		default:
738 			break;
739 		case NVME_CTRL_DEAD:
740 			return false;
741 		}
742 	}
743 
744 	return queue_live;
745 }
746 EXPORT_SYMBOL_GPL(__nvme_check_ready);
747 
748 static inline void nvme_setup_flush(struct nvme_ns *ns,
749 		struct nvme_command *cmnd)
750 {
751 	memset(cmnd, 0, sizeof(*cmnd));
752 	cmnd->common.opcode = nvme_cmd_flush;
753 	cmnd->common.nsid = cpu_to_le32(ns->head->ns_id);
754 }
755 
756 static blk_status_t nvme_setup_discard(struct nvme_ns *ns, struct request *req,
757 		struct nvme_command *cmnd)
758 {
759 	unsigned short segments = blk_rq_nr_discard_segments(req), n = 0;
760 	struct nvme_dsm_range *range;
761 	struct bio *bio;
762 
763 	/*
764 	 * Some devices do not consider the DSM 'Number of Ranges' field when
765 	 * determining how much data to DMA. Always allocate memory for maximum
766 	 * number of segments to prevent device reading beyond end of buffer.
767 	 */
768 	static const size_t alloc_size = sizeof(*range) * NVME_DSM_MAX_RANGES;
769 
770 	range = kzalloc(alloc_size, GFP_ATOMIC | __GFP_NOWARN);
771 	if (!range) {
772 		/*
773 		 * If we fail allocation our range, fallback to the controller
774 		 * discard page. If that's also busy, it's safe to return
775 		 * busy, as we know we can make progress once that's freed.
776 		 */
777 		if (test_and_set_bit_lock(0, &ns->ctrl->discard_page_busy))
778 			return BLK_STS_RESOURCE;
779 
780 		range = page_address(ns->ctrl->discard_page);
781 	}
782 
783 	__rq_for_each_bio(bio, req) {
784 		u64 slba = nvme_sect_to_lba(ns, bio->bi_iter.bi_sector);
785 		u32 nlb = bio->bi_iter.bi_size >> ns->lba_shift;
786 
787 		if (n < segments) {
788 			range[n].cattr = cpu_to_le32(0);
789 			range[n].nlb = cpu_to_le32(nlb);
790 			range[n].slba = cpu_to_le64(slba);
791 		}
792 		n++;
793 	}
794 
795 	if (WARN_ON_ONCE(n != segments)) {
796 		if (virt_to_page(range) == ns->ctrl->discard_page)
797 			clear_bit_unlock(0, &ns->ctrl->discard_page_busy);
798 		else
799 			kfree(range);
800 		return BLK_STS_IOERR;
801 	}
802 
803 	memset(cmnd, 0, sizeof(*cmnd));
804 	cmnd->dsm.opcode = nvme_cmd_dsm;
805 	cmnd->dsm.nsid = cpu_to_le32(ns->head->ns_id);
806 	cmnd->dsm.nr = cpu_to_le32(segments - 1);
807 	cmnd->dsm.attributes = cpu_to_le32(NVME_DSMGMT_AD);
808 
809 	bvec_set_virt(&req->special_vec, range, alloc_size);
810 	req->rq_flags |= RQF_SPECIAL_PAYLOAD;
811 
812 	return BLK_STS_OK;
813 }
814 
815 static void nvme_set_ref_tag(struct nvme_ns *ns, struct nvme_command *cmnd,
816 			      struct request *req)
817 {
818 	u32 upper, lower;
819 	u64 ref48;
820 
821 	/* both rw and write zeroes share the same reftag format */
822 	switch (ns->guard_type) {
823 	case NVME_NVM_NS_16B_GUARD:
824 		cmnd->rw.reftag = cpu_to_le32(t10_pi_ref_tag(req));
825 		break;
826 	case NVME_NVM_NS_64B_GUARD:
827 		ref48 = ext_pi_ref_tag(req);
828 		lower = lower_32_bits(ref48);
829 		upper = upper_32_bits(ref48);
830 
831 		cmnd->rw.reftag = cpu_to_le32(lower);
832 		cmnd->rw.cdw3 = cpu_to_le32(upper);
833 		break;
834 	default:
835 		break;
836 	}
837 }
838 
839 static inline blk_status_t nvme_setup_write_zeroes(struct nvme_ns *ns,
840 		struct request *req, struct nvme_command *cmnd)
841 {
842 	memset(cmnd, 0, sizeof(*cmnd));
843 
844 	if (ns->ctrl->quirks & NVME_QUIRK_DEALLOCATE_ZEROES)
845 		return nvme_setup_discard(ns, req, cmnd);
846 
847 	cmnd->write_zeroes.opcode = nvme_cmd_write_zeroes;
848 	cmnd->write_zeroes.nsid = cpu_to_le32(ns->head->ns_id);
849 	cmnd->write_zeroes.slba =
850 		cpu_to_le64(nvme_sect_to_lba(ns, blk_rq_pos(req)));
851 	cmnd->write_zeroes.length =
852 		cpu_to_le16((blk_rq_bytes(req) >> ns->lba_shift) - 1);
853 
854 	if (!(req->cmd_flags & REQ_NOUNMAP) && (ns->features & NVME_NS_DEAC))
855 		cmnd->write_zeroes.control |= cpu_to_le16(NVME_WZ_DEAC);
856 
857 	if (nvme_ns_has_pi(ns)) {
858 		cmnd->write_zeroes.control |= cpu_to_le16(NVME_RW_PRINFO_PRACT);
859 
860 		switch (ns->pi_type) {
861 		case NVME_NS_DPS_PI_TYPE1:
862 		case NVME_NS_DPS_PI_TYPE2:
863 			nvme_set_ref_tag(ns, cmnd, req);
864 			break;
865 		}
866 	}
867 
868 	return BLK_STS_OK;
869 }
870 
871 static inline blk_status_t nvme_setup_rw(struct nvme_ns *ns,
872 		struct request *req, struct nvme_command *cmnd,
873 		enum nvme_opcode op)
874 {
875 	u16 control = 0;
876 	u32 dsmgmt = 0;
877 
878 	if (req->cmd_flags & REQ_FUA)
879 		control |= NVME_RW_FUA;
880 	if (req->cmd_flags & (REQ_FAILFAST_DEV | REQ_RAHEAD))
881 		control |= NVME_RW_LR;
882 
883 	if (req->cmd_flags & REQ_RAHEAD)
884 		dsmgmt |= NVME_RW_DSM_FREQ_PREFETCH;
885 
886 	cmnd->rw.opcode = op;
887 	cmnd->rw.flags = 0;
888 	cmnd->rw.nsid = cpu_to_le32(ns->head->ns_id);
889 	cmnd->rw.cdw2 = 0;
890 	cmnd->rw.cdw3 = 0;
891 	cmnd->rw.metadata = 0;
892 	cmnd->rw.slba = cpu_to_le64(nvme_sect_to_lba(ns, blk_rq_pos(req)));
893 	cmnd->rw.length = cpu_to_le16((blk_rq_bytes(req) >> ns->lba_shift) - 1);
894 	cmnd->rw.reftag = 0;
895 	cmnd->rw.apptag = 0;
896 	cmnd->rw.appmask = 0;
897 
898 	if (ns->ms) {
899 		/*
900 		 * If formated with metadata, the block layer always provides a
901 		 * metadata buffer if CONFIG_BLK_DEV_INTEGRITY is enabled.  Else
902 		 * we enable the PRACT bit for protection information or set the
903 		 * namespace capacity to zero to prevent any I/O.
904 		 */
905 		if (!blk_integrity_rq(req)) {
906 			if (WARN_ON_ONCE(!nvme_ns_has_pi(ns)))
907 				return BLK_STS_NOTSUPP;
908 			control |= NVME_RW_PRINFO_PRACT;
909 		}
910 
911 		switch (ns->pi_type) {
912 		case NVME_NS_DPS_PI_TYPE3:
913 			control |= NVME_RW_PRINFO_PRCHK_GUARD;
914 			break;
915 		case NVME_NS_DPS_PI_TYPE1:
916 		case NVME_NS_DPS_PI_TYPE2:
917 			control |= NVME_RW_PRINFO_PRCHK_GUARD |
918 					NVME_RW_PRINFO_PRCHK_REF;
919 			if (op == nvme_cmd_zone_append)
920 				control |= NVME_RW_APPEND_PIREMAP;
921 			nvme_set_ref_tag(ns, cmnd, req);
922 			break;
923 		}
924 	}
925 
926 	cmnd->rw.control = cpu_to_le16(control);
927 	cmnd->rw.dsmgmt = cpu_to_le32(dsmgmt);
928 	return 0;
929 }
930 
931 void nvme_cleanup_cmd(struct request *req)
932 {
933 	if (req->rq_flags & RQF_SPECIAL_PAYLOAD) {
934 		struct nvme_ctrl *ctrl = nvme_req(req)->ctrl;
935 
936 		if (req->special_vec.bv_page == ctrl->discard_page)
937 			clear_bit_unlock(0, &ctrl->discard_page_busy);
938 		else
939 			kfree(bvec_virt(&req->special_vec));
940 	}
941 }
942 EXPORT_SYMBOL_GPL(nvme_cleanup_cmd);
943 
944 blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req)
945 {
946 	struct nvme_command *cmd = nvme_req(req)->cmd;
947 	blk_status_t ret = BLK_STS_OK;
948 
949 	if (!(req->rq_flags & RQF_DONTPREP))
950 		nvme_clear_nvme_request(req);
951 
952 	switch (req_op(req)) {
953 	case REQ_OP_DRV_IN:
954 	case REQ_OP_DRV_OUT:
955 		/* these are setup prior to execution in nvme_init_request() */
956 		break;
957 	case REQ_OP_FLUSH:
958 		nvme_setup_flush(ns, cmd);
959 		break;
960 	case REQ_OP_ZONE_RESET_ALL:
961 	case REQ_OP_ZONE_RESET:
962 		ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_RESET);
963 		break;
964 	case REQ_OP_ZONE_OPEN:
965 		ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_OPEN);
966 		break;
967 	case REQ_OP_ZONE_CLOSE:
968 		ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_CLOSE);
969 		break;
970 	case REQ_OP_ZONE_FINISH:
971 		ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_FINISH);
972 		break;
973 	case REQ_OP_WRITE_ZEROES:
974 		ret = nvme_setup_write_zeroes(ns, req, cmd);
975 		break;
976 	case REQ_OP_DISCARD:
977 		ret = nvme_setup_discard(ns, req, cmd);
978 		break;
979 	case REQ_OP_READ:
980 		ret = nvme_setup_rw(ns, req, cmd, nvme_cmd_read);
981 		break;
982 	case REQ_OP_WRITE:
983 		ret = nvme_setup_rw(ns, req, cmd, nvme_cmd_write);
984 		break;
985 	case REQ_OP_ZONE_APPEND:
986 		ret = nvme_setup_rw(ns, req, cmd, nvme_cmd_zone_append);
987 		break;
988 	default:
989 		WARN_ON_ONCE(1);
990 		return BLK_STS_IOERR;
991 	}
992 
993 	cmd->common.command_id = nvme_cid(req);
994 	trace_nvme_setup_cmd(req, cmd);
995 	return ret;
996 }
997 EXPORT_SYMBOL_GPL(nvme_setup_cmd);
998 
999 /*
1000  * Return values:
1001  * 0:  success
1002  * >0: nvme controller's cqe status response
1003  * <0: kernel error in lieu of controller response
1004  */
1005 int nvme_execute_rq(struct request *rq, bool at_head)
1006 {
1007 	blk_status_t status;
1008 
1009 	status = blk_execute_rq(rq, at_head);
1010 	if (nvme_req(rq)->flags & NVME_REQ_CANCELLED)
1011 		return -EINTR;
1012 	if (nvme_req(rq)->status)
1013 		return nvme_req(rq)->status;
1014 	return blk_status_to_errno(status);
1015 }
1016 EXPORT_SYMBOL_NS_GPL(nvme_execute_rq, NVME_TARGET_PASSTHRU);
1017 
1018 /*
1019  * Returns 0 on success.  If the result is negative, it's a Linux error code;
1020  * if the result is positive, it's an NVM Express status code
1021  */
1022 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
1023 		union nvme_result *result, void *buffer, unsigned bufflen,
1024 		int qid, int at_head, blk_mq_req_flags_t flags)
1025 {
1026 	struct request *req;
1027 	int ret;
1028 
1029 	if (qid == NVME_QID_ANY)
1030 		req = blk_mq_alloc_request(q, nvme_req_op(cmd), flags);
1031 	else
1032 		req = blk_mq_alloc_request_hctx(q, nvme_req_op(cmd), flags,
1033 						qid - 1);
1034 
1035 	if (IS_ERR(req))
1036 		return PTR_ERR(req);
1037 	nvme_init_request(req, cmd);
1038 
1039 	if (buffer && bufflen) {
1040 		ret = blk_rq_map_kern(q, req, buffer, bufflen, GFP_KERNEL);
1041 		if (ret)
1042 			goto out;
1043 	}
1044 
1045 	ret = nvme_execute_rq(req, at_head);
1046 	if (result && ret >= 0)
1047 		*result = nvme_req(req)->result;
1048  out:
1049 	blk_mq_free_request(req);
1050 	return ret;
1051 }
1052 EXPORT_SYMBOL_GPL(__nvme_submit_sync_cmd);
1053 
1054 int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
1055 		void *buffer, unsigned bufflen)
1056 {
1057 	return __nvme_submit_sync_cmd(q, cmd, NULL, buffer, bufflen,
1058 			NVME_QID_ANY, 0, 0);
1059 }
1060 EXPORT_SYMBOL_GPL(nvme_submit_sync_cmd);
1061 
1062 u32 nvme_command_effects(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u8 opcode)
1063 {
1064 	u32 effects = 0;
1065 
1066 	if (ns) {
1067 		effects = le32_to_cpu(ns->head->effects->iocs[opcode]);
1068 		if (effects & ~(NVME_CMD_EFFECTS_CSUPP | NVME_CMD_EFFECTS_LBCC))
1069 			dev_warn_once(ctrl->device,
1070 				"IO command:%02x has unusual effects:%08x\n",
1071 				opcode, effects);
1072 
1073 		/*
1074 		 * NVME_CMD_EFFECTS_CSE_MASK causes a freeze all I/O queues,
1075 		 * which would deadlock when done on an I/O command.  Note that
1076 		 * We already warn about an unusual effect above.
1077 		 */
1078 		effects &= ~NVME_CMD_EFFECTS_CSE_MASK;
1079 	} else {
1080 		effects = le32_to_cpu(ctrl->effects->acs[opcode]);
1081 	}
1082 
1083 	return effects;
1084 }
1085 EXPORT_SYMBOL_NS_GPL(nvme_command_effects, NVME_TARGET_PASSTHRU);
1086 
1087 u32 nvme_passthru_start(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u8 opcode)
1088 {
1089 	u32 effects = nvme_command_effects(ctrl, ns, opcode);
1090 
1091 	/*
1092 	 * For simplicity, IO to all namespaces is quiesced even if the command
1093 	 * effects say only one namespace is affected.
1094 	 */
1095 	if (effects & NVME_CMD_EFFECTS_CSE_MASK) {
1096 		mutex_lock(&ctrl->scan_lock);
1097 		mutex_lock(&ctrl->subsys->lock);
1098 		nvme_mpath_start_freeze(ctrl->subsys);
1099 		nvme_mpath_wait_freeze(ctrl->subsys);
1100 		nvme_start_freeze(ctrl);
1101 		nvme_wait_freeze(ctrl);
1102 	}
1103 	return effects;
1104 }
1105 EXPORT_SYMBOL_NS_GPL(nvme_passthru_start, NVME_TARGET_PASSTHRU);
1106 
1107 void nvme_passthru_end(struct nvme_ctrl *ctrl, u32 effects,
1108 		       struct nvme_command *cmd, int status)
1109 {
1110 	if (effects & NVME_CMD_EFFECTS_CSE_MASK) {
1111 		nvme_unfreeze(ctrl);
1112 		nvme_mpath_unfreeze(ctrl->subsys);
1113 		mutex_unlock(&ctrl->subsys->lock);
1114 		mutex_unlock(&ctrl->scan_lock);
1115 	}
1116 	if (effects & NVME_CMD_EFFECTS_CCC) {
1117 		dev_info(ctrl->device,
1118 "controller capabilities changed, reset may be required to take effect.\n");
1119 	}
1120 	if (effects & (NVME_CMD_EFFECTS_NIC | NVME_CMD_EFFECTS_NCC)) {
1121 		nvme_queue_scan(ctrl);
1122 		flush_work(&ctrl->scan_work);
1123 	}
1124 
1125 	switch (cmd->common.opcode) {
1126 	case nvme_admin_set_features:
1127 		switch (le32_to_cpu(cmd->common.cdw10) & 0xFF) {
1128 		case NVME_FEAT_KATO:
1129 			/*
1130 			 * Keep alive commands interval on the host should be
1131 			 * updated when KATO is modified by Set Features
1132 			 * commands.
1133 			 */
1134 			if (!status)
1135 				nvme_update_keep_alive(ctrl, cmd);
1136 			break;
1137 		default:
1138 			break;
1139 		}
1140 		break;
1141 	default:
1142 		break;
1143 	}
1144 }
1145 EXPORT_SYMBOL_NS_GPL(nvme_passthru_end, NVME_TARGET_PASSTHRU);
1146 
1147 /*
1148  * Recommended frequency for KATO commands per NVMe 1.4 section 7.12.1:
1149  *
1150  *   The host should send Keep Alive commands at half of the Keep Alive Timeout
1151  *   accounting for transport roundtrip times [..].
1152  */
1153 static void nvme_queue_keep_alive_work(struct nvme_ctrl *ctrl)
1154 {
1155 	queue_delayed_work(nvme_wq, &ctrl->ka_work, ctrl->kato * HZ / 2);
1156 }
1157 
1158 static enum rq_end_io_ret nvme_keep_alive_end_io(struct request *rq,
1159 						 blk_status_t status)
1160 {
1161 	struct nvme_ctrl *ctrl = rq->end_io_data;
1162 	unsigned long flags;
1163 	bool startka = false;
1164 
1165 	blk_mq_free_request(rq);
1166 
1167 	if (status) {
1168 		dev_err(ctrl->device,
1169 			"failed nvme_keep_alive_end_io error=%d\n",
1170 				status);
1171 		return RQ_END_IO_NONE;
1172 	}
1173 
1174 	ctrl->comp_seen = false;
1175 	spin_lock_irqsave(&ctrl->lock, flags);
1176 	if (ctrl->state == NVME_CTRL_LIVE ||
1177 	    ctrl->state == NVME_CTRL_CONNECTING)
1178 		startka = true;
1179 	spin_unlock_irqrestore(&ctrl->lock, flags);
1180 	if (startka)
1181 		nvme_queue_keep_alive_work(ctrl);
1182 	return RQ_END_IO_NONE;
1183 }
1184 
1185 static void nvme_keep_alive_work(struct work_struct *work)
1186 {
1187 	struct nvme_ctrl *ctrl = container_of(to_delayed_work(work),
1188 			struct nvme_ctrl, ka_work);
1189 	bool comp_seen = ctrl->comp_seen;
1190 	struct request *rq;
1191 
1192 	if ((ctrl->ctratt & NVME_CTRL_ATTR_TBKAS) && comp_seen) {
1193 		dev_dbg(ctrl->device,
1194 			"reschedule traffic based keep-alive timer\n");
1195 		ctrl->comp_seen = false;
1196 		nvme_queue_keep_alive_work(ctrl);
1197 		return;
1198 	}
1199 
1200 	rq = blk_mq_alloc_request(ctrl->admin_q, nvme_req_op(&ctrl->ka_cmd),
1201 				  BLK_MQ_REQ_RESERVED | BLK_MQ_REQ_NOWAIT);
1202 	if (IS_ERR(rq)) {
1203 		/* allocation failure, reset the controller */
1204 		dev_err(ctrl->device, "keep-alive failed: %ld\n", PTR_ERR(rq));
1205 		nvme_reset_ctrl(ctrl);
1206 		return;
1207 	}
1208 	nvme_init_request(rq, &ctrl->ka_cmd);
1209 
1210 	rq->timeout = ctrl->kato * HZ;
1211 	rq->end_io = nvme_keep_alive_end_io;
1212 	rq->end_io_data = ctrl;
1213 	blk_execute_rq_nowait(rq, false);
1214 }
1215 
1216 static void nvme_start_keep_alive(struct nvme_ctrl *ctrl)
1217 {
1218 	if (unlikely(ctrl->kato == 0))
1219 		return;
1220 
1221 	nvme_queue_keep_alive_work(ctrl);
1222 }
1223 
1224 void nvme_stop_keep_alive(struct nvme_ctrl *ctrl)
1225 {
1226 	if (unlikely(ctrl->kato == 0))
1227 		return;
1228 
1229 	cancel_delayed_work_sync(&ctrl->ka_work);
1230 }
1231 EXPORT_SYMBOL_GPL(nvme_stop_keep_alive);
1232 
1233 static void nvme_update_keep_alive(struct nvme_ctrl *ctrl,
1234 				   struct nvme_command *cmd)
1235 {
1236 	unsigned int new_kato =
1237 		DIV_ROUND_UP(le32_to_cpu(cmd->common.cdw11), 1000);
1238 
1239 	dev_info(ctrl->device,
1240 		 "keep alive interval updated from %u ms to %u ms\n",
1241 		 ctrl->kato * 1000 / 2, new_kato * 1000 / 2);
1242 
1243 	nvme_stop_keep_alive(ctrl);
1244 	ctrl->kato = new_kato;
1245 	nvme_start_keep_alive(ctrl);
1246 }
1247 
1248 /*
1249  * In NVMe 1.0 the CNS field was just a binary controller or namespace
1250  * flag, thus sending any new CNS opcodes has a big chance of not working.
1251  * Qemu unfortunately had that bug after reporting a 1.1 version compliance
1252  * (but not for any later version).
1253  */
1254 static bool nvme_ctrl_limited_cns(struct nvme_ctrl *ctrl)
1255 {
1256 	if (ctrl->quirks & NVME_QUIRK_IDENTIFY_CNS)
1257 		return ctrl->vs < NVME_VS(1, 2, 0);
1258 	return ctrl->vs < NVME_VS(1, 1, 0);
1259 }
1260 
1261 static int nvme_identify_ctrl(struct nvme_ctrl *dev, struct nvme_id_ctrl **id)
1262 {
1263 	struct nvme_command c = { };
1264 	int error;
1265 
1266 	/* gcc-4.4.4 (at least) has issues with initializers and anon unions */
1267 	c.identify.opcode = nvme_admin_identify;
1268 	c.identify.cns = NVME_ID_CNS_CTRL;
1269 
1270 	*id = kmalloc(sizeof(struct nvme_id_ctrl), GFP_KERNEL);
1271 	if (!*id)
1272 		return -ENOMEM;
1273 
1274 	error = nvme_submit_sync_cmd(dev->admin_q, &c, *id,
1275 			sizeof(struct nvme_id_ctrl));
1276 	if (error)
1277 		kfree(*id);
1278 	return error;
1279 }
1280 
1281 static int nvme_process_ns_desc(struct nvme_ctrl *ctrl, struct nvme_ns_ids *ids,
1282 		struct nvme_ns_id_desc *cur, bool *csi_seen)
1283 {
1284 	const char *warn_str = "ctrl returned bogus length:";
1285 	void *data = cur;
1286 
1287 	switch (cur->nidt) {
1288 	case NVME_NIDT_EUI64:
1289 		if (cur->nidl != NVME_NIDT_EUI64_LEN) {
1290 			dev_warn(ctrl->device, "%s %d for NVME_NIDT_EUI64\n",
1291 				 warn_str, cur->nidl);
1292 			return -1;
1293 		}
1294 		if (ctrl->quirks & NVME_QUIRK_BOGUS_NID)
1295 			return NVME_NIDT_EUI64_LEN;
1296 		memcpy(ids->eui64, data + sizeof(*cur), NVME_NIDT_EUI64_LEN);
1297 		return NVME_NIDT_EUI64_LEN;
1298 	case NVME_NIDT_NGUID:
1299 		if (cur->nidl != NVME_NIDT_NGUID_LEN) {
1300 			dev_warn(ctrl->device, "%s %d for NVME_NIDT_NGUID\n",
1301 				 warn_str, cur->nidl);
1302 			return -1;
1303 		}
1304 		if (ctrl->quirks & NVME_QUIRK_BOGUS_NID)
1305 			return NVME_NIDT_NGUID_LEN;
1306 		memcpy(ids->nguid, data + sizeof(*cur), NVME_NIDT_NGUID_LEN);
1307 		return NVME_NIDT_NGUID_LEN;
1308 	case NVME_NIDT_UUID:
1309 		if (cur->nidl != NVME_NIDT_UUID_LEN) {
1310 			dev_warn(ctrl->device, "%s %d for NVME_NIDT_UUID\n",
1311 				 warn_str, cur->nidl);
1312 			return -1;
1313 		}
1314 		if (ctrl->quirks & NVME_QUIRK_BOGUS_NID)
1315 			return NVME_NIDT_UUID_LEN;
1316 		uuid_copy(&ids->uuid, data + sizeof(*cur));
1317 		return NVME_NIDT_UUID_LEN;
1318 	case NVME_NIDT_CSI:
1319 		if (cur->nidl != NVME_NIDT_CSI_LEN) {
1320 			dev_warn(ctrl->device, "%s %d for NVME_NIDT_CSI\n",
1321 				 warn_str, cur->nidl);
1322 			return -1;
1323 		}
1324 		memcpy(&ids->csi, data + sizeof(*cur), NVME_NIDT_CSI_LEN);
1325 		*csi_seen = true;
1326 		return NVME_NIDT_CSI_LEN;
1327 	default:
1328 		/* Skip unknown types */
1329 		return cur->nidl;
1330 	}
1331 }
1332 
1333 static int nvme_identify_ns_descs(struct nvme_ctrl *ctrl,
1334 		struct nvme_ns_info *info)
1335 {
1336 	struct nvme_command c = { };
1337 	bool csi_seen = false;
1338 	int status, pos, len;
1339 	void *data;
1340 
1341 	if (ctrl->vs < NVME_VS(1, 3, 0) && !nvme_multi_css(ctrl))
1342 		return 0;
1343 	if (ctrl->quirks & NVME_QUIRK_NO_NS_DESC_LIST)
1344 		return 0;
1345 
1346 	c.identify.opcode = nvme_admin_identify;
1347 	c.identify.nsid = cpu_to_le32(info->nsid);
1348 	c.identify.cns = NVME_ID_CNS_NS_DESC_LIST;
1349 
1350 	data = kzalloc(NVME_IDENTIFY_DATA_SIZE, GFP_KERNEL);
1351 	if (!data)
1352 		return -ENOMEM;
1353 
1354 	status = nvme_submit_sync_cmd(ctrl->admin_q, &c, data,
1355 				      NVME_IDENTIFY_DATA_SIZE);
1356 	if (status) {
1357 		dev_warn(ctrl->device,
1358 			"Identify Descriptors failed (nsid=%u, status=0x%x)\n",
1359 			info->nsid, status);
1360 		goto free_data;
1361 	}
1362 
1363 	for (pos = 0; pos < NVME_IDENTIFY_DATA_SIZE; pos += len) {
1364 		struct nvme_ns_id_desc *cur = data + pos;
1365 
1366 		if (cur->nidl == 0)
1367 			break;
1368 
1369 		len = nvme_process_ns_desc(ctrl, &info->ids, cur, &csi_seen);
1370 		if (len < 0)
1371 			break;
1372 
1373 		len += sizeof(*cur);
1374 	}
1375 
1376 	if (nvme_multi_css(ctrl) && !csi_seen) {
1377 		dev_warn(ctrl->device, "Command set not reported for nsid:%d\n",
1378 			 info->nsid);
1379 		status = -EINVAL;
1380 	}
1381 
1382 free_data:
1383 	kfree(data);
1384 	return status;
1385 }
1386 
1387 static int nvme_identify_ns(struct nvme_ctrl *ctrl, unsigned nsid,
1388 			struct nvme_id_ns **id)
1389 {
1390 	struct nvme_command c = { };
1391 	int error;
1392 
1393 	/* gcc-4.4.4 (at least) has issues with initializers and anon unions */
1394 	c.identify.opcode = nvme_admin_identify;
1395 	c.identify.nsid = cpu_to_le32(nsid);
1396 	c.identify.cns = NVME_ID_CNS_NS;
1397 
1398 	*id = kmalloc(sizeof(**id), GFP_KERNEL);
1399 	if (!*id)
1400 		return -ENOMEM;
1401 
1402 	error = nvme_submit_sync_cmd(ctrl->admin_q, &c, *id, sizeof(**id));
1403 	if (error) {
1404 		dev_warn(ctrl->device, "Identify namespace failed (%d)\n", error);
1405 		goto out_free_id;
1406 	}
1407 
1408 	error = NVME_SC_INVALID_NS | NVME_SC_DNR;
1409 	if ((*id)->ncap == 0) /* namespace not allocated or attached */
1410 		goto out_free_id;
1411 	return 0;
1412 
1413 out_free_id:
1414 	kfree(*id);
1415 	return error;
1416 }
1417 
1418 static int nvme_ns_info_from_identify(struct nvme_ctrl *ctrl,
1419 		struct nvme_ns_info *info)
1420 {
1421 	struct nvme_ns_ids *ids = &info->ids;
1422 	struct nvme_id_ns *id;
1423 	int ret;
1424 
1425 	ret = nvme_identify_ns(ctrl, info->nsid, &id);
1426 	if (ret)
1427 		return ret;
1428 	info->anagrpid = id->anagrpid;
1429 	info->is_shared = id->nmic & NVME_NS_NMIC_SHARED;
1430 	info->is_readonly = id->nsattr & NVME_NS_ATTR_RO;
1431 	info->is_ready = true;
1432 	if (ctrl->quirks & NVME_QUIRK_BOGUS_NID) {
1433 		dev_info(ctrl->device,
1434 			 "Ignoring bogus Namespace Identifiers\n");
1435 	} else {
1436 		if (ctrl->vs >= NVME_VS(1, 1, 0) &&
1437 		    !memchr_inv(ids->eui64, 0, sizeof(ids->eui64)))
1438 			memcpy(ids->eui64, id->eui64, sizeof(ids->eui64));
1439 		if (ctrl->vs >= NVME_VS(1, 2, 0) &&
1440 		    !memchr_inv(ids->nguid, 0, sizeof(ids->nguid)))
1441 			memcpy(ids->nguid, id->nguid, sizeof(ids->nguid));
1442 	}
1443 	kfree(id);
1444 	return 0;
1445 }
1446 
1447 static int nvme_ns_info_from_id_cs_indep(struct nvme_ctrl *ctrl,
1448 		struct nvme_ns_info *info)
1449 {
1450 	struct nvme_id_ns_cs_indep *id;
1451 	struct nvme_command c = {
1452 		.identify.opcode	= nvme_admin_identify,
1453 		.identify.nsid		= cpu_to_le32(info->nsid),
1454 		.identify.cns		= NVME_ID_CNS_NS_CS_INDEP,
1455 	};
1456 	int ret;
1457 
1458 	id = kmalloc(sizeof(*id), GFP_KERNEL);
1459 	if (!id)
1460 		return -ENOMEM;
1461 
1462 	ret = nvme_submit_sync_cmd(ctrl->admin_q, &c, id, sizeof(*id));
1463 	if (!ret) {
1464 		info->anagrpid = id->anagrpid;
1465 		info->is_shared = id->nmic & NVME_NS_NMIC_SHARED;
1466 		info->is_readonly = id->nsattr & NVME_NS_ATTR_RO;
1467 		info->is_ready = id->nstat & NVME_NSTAT_NRDY;
1468 	}
1469 	kfree(id);
1470 	return ret;
1471 }
1472 
1473 static int nvme_features(struct nvme_ctrl *dev, u8 op, unsigned int fid,
1474 		unsigned int dword11, void *buffer, size_t buflen, u32 *result)
1475 {
1476 	union nvme_result res = { 0 };
1477 	struct nvme_command c = { };
1478 	int ret;
1479 
1480 	c.features.opcode = op;
1481 	c.features.fid = cpu_to_le32(fid);
1482 	c.features.dword11 = cpu_to_le32(dword11);
1483 
1484 	ret = __nvme_submit_sync_cmd(dev->admin_q, &c, &res,
1485 			buffer, buflen, NVME_QID_ANY, 0, 0);
1486 	if (ret >= 0 && result)
1487 		*result = le32_to_cpu(res.u32);
1488 	return ret;
1489 }
1490 
1491 int nvme_set_features(struct nvme_ctrl *dev, unsigned int fid,
1492 		      unsigned int dword11, void *buffer, size_t buflen,
1493 		      u32 *result)
1494 {
1495 	return nvme_features(dev, nvme_admin_set_features, fid, dword11, buffer,
1496 			     buflen, result);
1497 }
1498 EXPORT_SYMBOL_GPL(nvme_set_features);
1499 
1500 int nvme_get_features(struct nvme_ctrl *dev, unsigned int fid,
1501 		      unsigned int dword11, void *buffer, size_t buflen,
1502 		      u32 *result)
1503 {
1504 	return nvme_features(dev, nvme_admin_get_features, fid, dword11, buffer,
1505 			     buflen, result);
1506 }
1507 EXPORT_SYMBOL_GPL(nvme_get_features);
1508 
1509 int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count)
1510 {
1511 	u32 q_count = (*count - 1) | ((*count - 1) << 16);
1512 	u32 result;
1513 	int status, nr_io_queues;
1514 
1515 	status = nvme_set_features(ctrl, NVME_FEAT_NUM_QUEUES, q_count, NULL, 0,
1516 			&result);
1517 	if (status < 0)
1518 		return status;
1519 
1520 	/*
1521 	 * Degraded controllers might return an error when setting the queue
1522 	 * count.  We still want to be able to bring them online and offer
1523 	 * access to the admin queue, as that might be only way to fix them up.
1524 	 */
1525 	if (status > 0) {
1526 		dev_err(ctrl->device, "Could not set queue count (%d)\n", status);
1527 		*count = 0;
1528 	} else {
1529 		nr_io_queues = min(result & 0xffff, result >> 16) + 1;
1530 		*count = min(*count, nr_io_queues);
1531 	}
1532 
1533 	return 0;
1534 }
1535 EXPORT_SYMBOL_GPL(nvme_set_queue_count);
1536 
1537 #define NVME_AEN_SUPPORTED \
1538 	(NVME_AEN_CFG_NS_ATTR | NVME_AEN_CFG_FW_ACT | \
1539 	 NVME_AEN_CFG_ANA_CHANGE | NVME_AEN_CFG_DISC_CHANGE)
1540 
1541 static void nvme_enable_aen(struct nvme_ctrl *ctrl)
1542 {
1543 	u32 result, supported_aens = ctrl->oaes & NVME_AEN_SUPPORTED;
1544 	int status;
1545 
1546 	if (!supported_aens)
1547 		return;
1548 
1549 	status = nvme_set_features(ctrl, NVME_FEAT_ASYNC_EVENT, supported_aens,
1550 			NULL, 0, &result);
1551 	if (status)
1552 		dev_warn(ctrl->device, "Failed to configure AEN (cfg %x)\n",
1553 			 supported_aens);
1554 
1555 	queue_work(nvme_wq, &ctrl->async_event_work);
1556 }
1557 
1558 static int nvme_ns_open(struct nvme_ns *ns)
1559 {
1560 
1561 	/* should never be called due to GENHD_FL_HIDDEN */
1562 	if (WARN_ON_ONCE(nvme_ns_head_multipath(ns->head)))
1563 		goto fail;
1564 	if (!nvme_get_ns(ns))
1565 		goto fail;
1566 	if (!try_module_get(ns->ctrl->ops->module))
1567 		goto fail_put_ns;
1568 
1569 	return 0;
1570 
1571 fail_put_ns:
1572 	nvme_put_ns(ns);
1573 fail:
1574 	return -ENXIO;
1575 }
1576 
1577 static void nvme_ns_release(struct nvme_ns *ns)
1578 {
1579 
1580 	module_put(ns->ctrl->ops->module);
1581 	nvme_put_ns(ns);
1582 }
1583 
1584 static int nvme_open(struct block_device *bdev, fmode_t mode)
1585 {
1586 	return nvme_ns_open(bdev->bd_disk->private_data);
1587 }
1588 
1589 static void nvme_release(struct gendisk *disk, fmode_t mode)
1590 {
1591 	nvme_ns_release(disk->private_data);
1592 }
1593 
1594 int nvme_getgeo(struct block_device *bdev, struct hd_geometry *geo)
1595 {
1596 	/* some standard values */
1597 	geo->heads = 1 << 6;
1598 	geo->sectors = 1 << 5;
1599 	geo->cylinders = get_capacity(bdev->bd_disk) >> 11;
1600 	return 0;
1601 }
1602 
1603 #ifdef CONFIG_BLK_DEV_INTEGRITY
1604 static void nvme_init_integrity(struct gendisk *disk, struct nvme_ns *ns,
1605 				u32 max_integrity_segments)
1606 {
1607 	struct blk_integrity integrity = { };
1608 
1609 	switch (ns->pi_type) {
1610 	case NVME_NS_DPS_PI_TYPE3:
1611 		switch (ns->guard_type) {
1612 		case NVME_NVM_NS_16B_GUARD:
1613 			integrity.profile = &t10_pi_type3_crc;
1614 			integrity.tag_size = sizeof(u16) + sizeof(u32);
1615 			integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE;
1616 			break;
1617 		case NVME_NVM_NS_64B_GUARD:
1618 			integrity.profile = &ext_pi_type3_crc64;
1619 			integrity.tag_size = sizeof(u16) + 6;
1620 			integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE;
1621 			break;
1622 		default:
1623 			integrity.profile = NULL;
1624 			break;
1625 		}
1626 		break;
1627 	case NVME_NS_DPS_PI_TYPE1:
1628 	case NVME_NS_DPS_PI_TYPE2:
1629 		switch (ns->guard_type) {
1630 		case NVME_NVM_NS_16B_GUARD:
1631 			integrity.profile = &t10_pi_type1_crc;
1632 			integrity.tag_size = sizeof(u16);
1633 			integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE;
1634 			break;
1635 		case NVME_NVM_NS_64B_GUARD:
1636 			integrity.profile = &ext_pi_type1_crc64;
1637 			integrity.tag_size = sizeof(u16);
1638 			integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE;
1639 			break;
1640 		default:
1641 			integrity.profile = NULL;
1642 			break;
1643 		}
1644 		break;
1645 	default:
1646 		integrity.profile = NULL;
1647 		break;
1648 	}
1649 
1650 	integrity.tuple_size = ns->ms;
1651 	blk_integrity_register(disk, &integrity);
1652 	blk_queue_max_integrity_segments(disk->queue, max_integrity_segments);
1653 }
1654 #else
1655 static void nvme_init_integrity(struct gendisk *disk, struct nvme_ns *ns,
1656 				u32 max_integrity_segments)
1657 {
1658 }
1659 #endif /* CONFIG_BLK_DEV_INTEGRITY */
1660 
1661 static void nvme_config_discard(struct gendisk *disk, struct nvme_ns *ns)
1662 {
1663 	struct nvme_ctrl *ctrl = ns->ctrl;
1664 	struct request_queue *queue = disk->queue;
1665 	u32 size = queue_logical_block_size(queue);
1666 
1667 	if (ctrl->max_discard_sectors == 0) {
1668 		blk_queue_max_discard_sectors(queue, 0);
1669 		return;
1670 	}
1671 
1672 	BUILD_BUG_ON(PAGE_SIZE / sizeof(struct nvme_dsm_range) <
1673 			NVME_DSM_MAX_RANGES);
1674 
1675 	queue->limits.discard_granularity = size;
1676 
1677 	/* If discard is already enabled, don't reset queue limits */
1678 	if (queue->limits.max_discard_sectors)
1679 		return;
1680 
1681 	if (ctrl->dmrsl && ctrl->dmrsl <= nvme_sect_to_lba(ns, UINT_MAX))
1682 		ctrl->max_discard_sectors = nvme_lba_to_sect(ns, ctrl->dmrsl);
1683 
1684 	blk_queue_max_discard_sectors(queue, ctrl->max_discard_sectors);
1685 	blk_queue_max_discard_segments(queue, ctrl->max_discard_segments);
1686 
1687 	if (ctrl->quirks & NVME_QUIRK_DEALLOCATE_ZEROES)
1688 		blk_queue_max_write_zeroes_sectors(queue, UINT_MAX);
1689 }
1690 
1691 static bool nvme_ns_ids_equal(struct nvme_ns_ids *a, struct nvme_ns_ids *b)
1692 {
1693 	return uuid_equal(&a->uuid, &b->uuid) &&
1694 		memcmp(&a->nguid, &b->nguid, sizeof(a->nguid)) == 0 &&
1695 		memcmp(&a->eui64, &b->eui64, sizeof(a->eui64)) == 0 &&
1696 		a->csi == b->csi;
1697 }
1698 
1699 static int nvme_init_ms(struct nvme_ns *ns, struct nvme_id_ns *id)
1700 {
1701 	bool first = id->dps & NVME_NS_DPS_PI_FIRST;
1702 	unsigned lbaf = nvme_lbaf_index(id->flbas);
1703 	struct nvme_ctrl *ctrl = ns->ctrl;
1704 	struct nvme_command c = { };
1705 	struct nvme_id_ns_nvm *nvm;
1706 	int ret = 0;
1707 	u32 elbaf;
1708 
1709 	ns->pi_size = 0;
1710 	ns->ms = le16_to_cpu(id->lbaf[lbaf].ms);
1711 	if (!(ctrl->ctratt & NVME_CTRL_ATTR_ELBAS)) {
1712 		ns->pi_size = sizeof(struct t10_pi_tuple);
1713 		ns->guard_type = NVME_NVM_NS_16B_GUARD;
1714 		goto set_pi;
1715 	}
1716 
1717 	nvm = kzalloc(sizeof(*nvm), GFP_KERNEL);
1718 	if (!nvm)
1719 		return -ENOMEM;
1720 
1721 	c.identify.opcode = nvme_admin_identify;
1722 	c.identify.nsid = cpu_to_le32(ns->head->ns_id);
1723 	c.identify.cns = NVME_ID_CNS_CS_NS;
1724 	c.identify.csi = NVME_CSI_NVM;
1725 
1726 	ret = nvme_submit_sync_cmd(ns->ctrl->admin_q, &c, nvm, sizeof(*nvm));
1727 	if (ret)
1728 		goto free_data;
1729 
1730 	elbaf = le32_to_cpu(nvm->elbaf[lbaf]);
1731 
1732 	/* no support for storage tag formats right now */
1733 	if (nvme_elbaf_sts(elbaf))
1734 		goto free_data;
1735 
1736 	ns->guard_type = nvme_elbaf_guard_type(elbaf);
1737 	switch (ns->guard_type) {
1738 	case NVME_NVM_NS_64B_GUARD:
1739 		ns->pi_size = sizeof(struct crc64_pi_tuple);
1740 		break;
1741 	case NVME_NVM_NS_16B_GUARD:
1742 		ns->pi_size = sizeof(struct t10_pi_tuple);
1743 		break;
1744 	default:
1745 		break;
1746 	}
1747 
1748 free_data:
1749 	kfree(nvm);
1750 set_pi:
1751 	if (ns->pi_size && (first || ns->ms == ns->pi_size))
1752 		ns->pi_type = id->dps & NVME_NS_DPS_PI_MASK;
1753 	else
1754 		ns->pi_type = 0;
1755 
1756 	return ret;
1757 }
1758 
1759 static void nvme_configure_metadata(struct nvme_ns *ns, struct nvme_id_ns *id)
1760 {
1761 	struct nvme_ctrl *ctrl = ns->ctrl;
1762 
1763 	if (nvme_init_ms(ns, id))
1764 		return;
1765 
1766 	ns->features &= ~(NVME_NS_METADATA_SUPPORTED | NVME_NS_EXT_LBAS);
1767 	if (!ns->ms || !(ctrl->ops->flags & NVME_F_METADATA_SUPPORTED))
1768 		return;
1769 
1770 	if (ctrl->ops->flags & NVME_F_FABRICS) {
1771 		/*
1772 		 * The NVMe over Fabrics specification only supports metadata as
1773 		 * part of the extended data LBA.  We rely on HCA/HBA support to
1774 		 * remap the separate metadata buffer from the block layer.
1775 		 */
1776 		if (WARN_ON_ONCE(!(id->flbas & NVME_NS_FLBAS_META_EXT)))
1777 			return;
1778 
1779 		ns->features |= NVME_NS_EXT_LBAS;
1780 
1781 		/*
1782 		 * The current fabrics transport drivers support namespace
1783 		 * metadata formats only if nvme_ns_has_pi() returns true.
1784 		 * Suppress support for all other formats so the namespace will
1785 		 * have a 0 capacity and not be usable through the block stack.
1786 		 *
1787 		 * Note, this check will need to be modified if any drivers
1788 		 * gain the ability to use other metadata formats.
1789 		 */
1790 		if (ctrl->max_integrity_segments && nvme_ns_has_pi(ns))
1791 			ns->features |= NVME_NS_METADATA_SUPPORTED;
1792 	} else {
1793 		/*
1794 		 * For PCIe controllers, we can't easily remap the separate
1795 		 * metadata buffer from the block layer and thus require a
1796 		 * separate metadata buffer for block layer metadata/PI support.
1797 		 * We allow extended LBAs for the passthrough interface, though.
1798 		 */
1799 		if (id->flbas & NVME_NS_FLBAS_META_EXT)
1800 			ns->features |= NVME_NS_EXT_LBAS;
1801 		else
1802 			ns->features |= NVME_NS_METADATA_SUPPORTED;
1803 	}
1804 }
1805 
1806 static void nvme_set_queue_limits(struct nvme_ctrl *ctrl,
1807 		struct request_queue *q)
1808 {
1809 	bool vwc = ctrl->vwc & NVME_CTRL_VWC_PRESENT;
1810 
1811 	if (ctrl->max_hw_sectors) {
1812 		u32 max_segments =
1813 			(ctrl->max_hw_sectors / (NVME_CTRL_PAGE_SIZE >> 9)) + 1;
1814 
1815 		max_segments = min_not_zero(max_segments, ctrl->max_segments);
1816 		blk_queue_max_hw_sectors(q, ctrl->max_hw_sectors);
1817 		blk_queue_max_segments(q, min_t(u32, max_segments, USHRT_MAX));
1818 	}
1819 	blk_queue_virt_boundary(q, NVME_CTRL_PAGE_SIZE - 1);
1820 	blk_queue_dma_alignment(q, 3);
1821 	blk_queue_write_cache(q, vwc, vwc);
1822 }
1823 
1824 static void nvme_update_disk_info(struct gendisk *disk,
1825 		struct nvme_ns *ns, struct nvme_id_ns *id)
1826 {
1827 	sector_t capacity = nvme_lba_to_sect(ns, le64_to_cpu(id->nsze));
1828 	unsigned short bs = 1 << ns->lba_shift;
1829 	u32 atomic_bs, phys_bs, io_opt = 0;
1830 
1831 	/*
1832 	 * The block layer can't support LBA sizes larger than the page size
1833 	 * yet, so catch this early and don't allow block I/O.
1834 	 */
1835 	if (ns->lba_shift > PAGE_SHIFT) {
1836 		capacity = 0;
1837 		bs = (1 << 9);
1838 	}
1839 
1840 	blk_integrity_unregister(disk);
1841 
1842 	atomic_bs = phys_bs = bs;
1843 	if (id->nabo == 0) {
1844 		/*
1845 		 * Bit 1 indicates whether NAWUPF is defined for this namespace
1846 		 * and whether it should be used instead of AWUPF. If NAWUPF ==
1847 		 * 0 then AWUPF must be used instead.
1848 		 */
1849 		if (id->nsfeat & NVME_NS_FEAT_ATOMICS && id->nawupf)
1850 			atomic_bs = (1 + le16_to_cpu(id->nawupf)) * bs;
1851 		else
1852 			atomic_bs = (1 + ns->ctrl->subsys->awupf) * bs;
1853 	}
1854 
1855 	if (id->nsfeat & NVME_NS_FEAT_IO_OPT) {
1856 		/* NPWG = Namespace Preferred Write Granularity */
1857 		phys_bs = bs * (1 + le16_to_cpu(id->npwg));
1858 		/* NOWS = Namespace Optimal Write Size */
1859 		io_opt = bs * (1 + le16_to_cpu(id->nows));
1860 	}
1861 
1862 	blk_queue_logical_block_size(disk->queue, bs);
1863 	/*
1864 	 * Linux filesystems assume writing a single physical block is
1865 	 * an atomic operation. Hence limit the physical block size to the
1866 	 * value of the Atomic Write Unit Power Fail parameter.
1867 	 */
1868 	blk_queue_physical_block_size(disk->queue, min(phys_bs, atomic_bs));
1869 	blk_queue_io_min(disk->queue, phys_bs);
1870 	blk_queue_io_opt(disk->queue, io_opt);
1871 
1872 	/*
1873 	 * Register a metadata profile for PI, or the plain non-integrity NVMe
1874 	 * metadata masquerading as Type 0 if supported, otherwise reject block
1875 	 * I/O to namespaces with metadata except when the namespace supports
1876 	 * PI, as it can strip/insert in that case.
1877 	 */
1878 	if (ns->ms) {
1879 		if (IS_ENABLED(CONFIG_BLK_DEV_INTEGRITY) &&
1880 		    (ns->features & NVME_NS_METADATA_SUPPORTED))
1881 			nvme_init_integrity(disk, ns,
1882 					    ns->ctrl->max_integrity_segments);
1883 		else if (!nvme_ns_has_pi(ns))
1884 			capacity = 0;
1885 	}
1886 
1887 	set_capacity_and_notify(disk, capacity);
1888 
1889 	nvme_config_discard(disk, ns);
1890 	blk_queue_max_write_zeroes_sectors(disk->queue,
1891 					   ns->ctrl->max_zeroes_sectors);
1892 }
1893 
1894 static bool nvme_ns_is_readonly(struct nvme_ns *ns, struct nvme_ns_info *info)
1895 {
1896 	return info->is_readonly || test_bit(NVME_NS_FORCE_RO, &ns->flags);
1897 }
1898 
1899 static inline bool nvme_first_scan(struct gendisk *disk)
1900 {
1901 	/* nvme_alloc_ns() scans the disk prior to adding it */
1902 	return !disk_live(disk);
1903 }
1904 
1905 static void nvme_set_chunk_sectors(struct nvme_ns *ns, struct nvme_id_ns *id)
1906 {
1907 	struct nvme_ctrl *ctrl = ns->ctrl;
1908 	u32 iob;
1909 
1910 	if ((ctrl->quirks & NVME_QUIRK_STRIPE_SIZE) &&
1911 	    is_power_of_2(ctrl->max_hw_sectors))
1912 		iob = ctrl->max_hw_sectors;
1913 	else
1914 		iob = nvme_lba_to_sect(ns, le16_to_cpu(id->noiob));
1915 
1916 	if (!iob)
1917 		return;
1918 
1919 	if (!is_power_of_2(iob)) {
1920 		if (nvme_first_scan(ns->disk))
1921 			pr_warn("%s: ignoring unaligned IO boundary:%u\n",
1922 				ns->disk->disk_name, iob);
1923 		return;
1924 	}
1925 
1926 	if (blk_queue_is_zoned(ns->disk->queue)) {
1927 		if (nvme_first_scan(ns->disk))
1928 			pr_warn("%s: ignoring zoned namespace IO boundary\n",
1929 				ns->disk->disk_name);
1930 		return;
1931 	}
1932 
1933 	blk_queue_chunk_sectors(ns->queue, iob);
1934 }
1935 
1936 static int nvme_update_ns_info_generic(struct nvme_ns *ns,
1937 		struct nvme_ns_info *info)
1938 {
1939 	blk_mq_freeze_queue(ns->disk->queue);
1940 	nvme_set_queue_limits(ns->ctrl, ns->queue);
1941 	set_disk_ro(ns->disk, nvme_ns_is_readonly(ns, info));
1942 	blk_mq_unfreeze_queue(ns->disk->queue);
1943 
1944 	if (nvme_ns_head_multipath(ns->head)) {
1945 		blk_mq_freeze_queue(ns->head->disk->queue);
1946 		set_disk_ro(ns->head->disk, nvme_ns_is_readonly(ns, info));
1947 		nvme_mpath_revalidate_paths(ns);
1948 		blk_stack_limits(&ns->head->disk->queue->limits,
1949 				 &ns->queue->limits, 0);
1950 		ns->head->disk->flags |= GENHD_FL_HIDDEN;
1951 		blk_mq_unfreeze_queue(ns->head->disk->queue);
1952 	}
1953 
1954 	/* Hide the block-interface for these devices */
1955 	ns->disk->flags |= GENHD_FL_HIDDEN;
1956 	set_bit(NVME_NS_READY, &ns->flags);
1957 
1958 	return 0;
1959 }
1960 
1961 static int nvme_update_ns_info_block(struct nvme_ns *ns,
1962 		struct nvme_ns_info *info)
1963 {
1964 	struct nvme_id_ns *id;
1965 	unsigned lbaf;
1966 	int ret;
1967 
1968 	ret = nvme_identify_ns(ns->ctrl, info->nsid, &id);
1969 	if (ret)
1970 		return ret;
1971 
1972 	blk_mq_freeze_queue(ns->disk->queue);
1973 	lbaf = nvme_lbaf_index(id->flbas);
1974 	ns->lba_shift = id->lbaf[lbaf].ds;
1975 	nvme_set_queue_limits(ns->ctrl, ns->queue);
1976 
1977 	nvme_configure_metadata(ns, id);
1978 	nvme_set_chunk_sectors(ns, id);
1979 	nvme_update_disk_info(ns->disk, ns, id);
1980 
1981 	if (ns->head->ids.csi == NVME_CSI_ZNS) {
1982 		ret = nvme_update_zone_info(ns, lbaf);
1983 		if (ret) {
1984 			blk_mq_unfreeze_queue(ns->disk->queue);
1985 			goto out;
1986 		}
1987 	}
1988 
1989 	/*
1990 	 * Only set the DEAC bit if the device guarantees that reads from
1991 	 * deallocated data return zeroes.  While the DEAC bit does not
1992 	 * require that, it must be a no-op if reads from deallocated data
1993 	 * do not return zeroes.
1994 	 */
1995 	if ((id->dlfeat & 0x7) == 0x1 && (id->dlfeat & (1 << 3)))
1996 		ns->features |= NVME_NS_DEAC;
1997 	set_disk_ro(ns->disk, nvme_ns_is_readonly(ns, info));
1998 	set_bit(NVME_NS_READY, &ns->flags);
1999 	blk_mq_unfreeze_queue(ns->disk->queue);
2000 
2001 	if (blk_queue_is_zoned(ns->queue)) {
2002 		ret = nvme_revalidate_zones(ns);
2003 		if (ret && !nvme_first_scan(ns->disk))
2004 			goto out;
2005 	}
2006 
2007 	if (nvme_ns_head_multipath(ns->head)) {
2008 		blk_mq_freeze_queue(ns->head->disk->queue);
2009 		nvme_update_disk_info(ns->head->disk, ns, id);
2010 		set_disk_ro(ns->head->disk, nvme_ns_is_readonly(ns, info));
2011 		nvme_mpath_revalidate_paths(ns);
2012 		blk_stack_limits(&ns->head->disk->queue->limits,
2013 				 &ns->queue->limits, 0);
2014 		disk_update_readahead(ns->head->disk);
2015 		blk_mq_unfreeze_queue(ns->head->disk->queue);
2016 	}
2017 
2018 	ret = 0;
2019 out:
2020 	/*
2021 	 * If probing fails due an unsupported feature, hide the block device,
2022 	 * but still allow other access.
2023 	 */
2024 	if (ret == -ENODEV) {
2025 		ns->disk->flags |= GENHD_FL_HIDDEN;
2026 		set_bit(NVME_NS_READY, &ns->flags);
2027 		ret = 0;
2028 	}
2029 	kfree(id);
2030 	return ret;
2031 }
2032 
2033 static int nvme_update_ns_info(struct nvme_ns *ns, struct nvme_ns_info *info)
2034 {
2035 	switch (info->ids.csi) {
2036 	case NVME_CSI_ZNS:
2037 		if (!IS_ENABLED(CONFIG_BLK_DEV_ZONED)) {
2038 			dev_info(ns->ctrl->device,
2039 	"block device for nsid %u not supported without CONFIG_BLK_DEV_ZONED\n",
2040 				info->nsid);
2041 			return nvme_update_ns_info_generic(ns, info);
2042 		}
2043 		return nvme_update_ns_info_block(ns, info);
2044 	case NVME_CSI_NVM:
2045 		return nvme_update_ns_info_block(ns, info);
2046 	default:
2047 		dev_info(ns->ctrl->device,
2048 			"block device for nsid %u not supported (csi %u)\n",
2049 			info->nsid, info->ids.csi);
2050 		return nvme_update_ns_info_generic(ns, info);
2051 	}
2052 }
2053 
2054 static char nvme_pr_type(enum pr_type type)
2055 {
2056 	switch (type) {
2057 	case PR_WRITE_EXCLUSIVE:
2058 		return 1;
2059 	case PR_EXCLUSIVE_ACCESS:
2060 		return 2;
2061 	case PR_WRITE_EXCLUSIVE_REG_ONLY:
2062 		return 3;
2063 	case PR_EXCLUSIVE_ACCESS_REG_ONLY:
2064 		return 4;
2065 	case PR_WRITE_EXCLUSIVE_ALL_REGS:
2066 		return 5;
2067 	case PR_EXCLUSIVE_ACCESS_ALL_REGS:
2068 		return 6;
2069 	default:
2070 		return 0;
2071 	}
2072 }
2073 
2074 static int nvme_send_ns_head_pr_command(struct block_device *bdev,
2075 		struct nvme_command *c, u8 data[16])
2076 {
2077 	struct nvme_ns_head *head = bdev->bd_disk->private_data;
2078 	int srcu_idx = srcu_read_lock(&head->srcu);
2079 	struct nvme_ns *ns = nvme_find_path(head);
2080 	int ret = -EWOULDBLOCK;
2081 
2082 	if (ns) {
2083 		c->common.nsid = cpu_to_le32(ns->head->ns_id);
2084 		ret = nvme_submit_sync_cmd(ns->queue, c, data, 16);
2085 	}
2086 	srcu_read_unlock(&head->srcu, srcu_idx);
2087 	return ret;
2088 }
2089 
2090 static int nvme_send_ns_pr_command(struct nvme_ns *ns, struct nvme_command *c,
2091 		u8 data[16])
2092 {
2093 	c->common.nsid = cpu_to_le32(ns->head->ns_id);
2094 	return nvme_submit_sync_cmd(ns->queue, c, data, 16);
2095 }
2096 
2097 static int nvme_sc_to_pr_err(int nvme_sc)
2098 {
2099 	if (nvme_is_path_error(nvme_sc))
2100 		return PR_STS_PATH_FAILED;
2101 
2102 	switch (nvme_sc) {
2103 	case NVME_SC_SUCCESS:
2104 		return PR_STS_SUCCESS;
2105 	case NVME_SC_RESERVATION_CONFLICT:
2106 		return PR_STS_RESERVATION_CONFLICT;
2107 	case NVME_SC_ONCS_NOT_SUPPORTED:
2108 		return -EOPNOTSUPP;
2109 	case NVME_SC_BAD_ATTRIBUTES:
2110 	case NVME_SC_INVALID_OPCODE:
2111 	case NVME_SC_INVALID_FIELD:
2112 	case NVME_SC_INVALID_NS:
2113 		return -EINVAL;
2114 	default:
2115 		return PR_STS_IOERR;
2116 	}
2117 }
2118 
2119 static int nvme_pr_command(struct block_device *bdev, u32 cdw10,
2120 				u64 key, u64 sa_key, u8 op)
2121 {
2122 	struct nvme_command c = { };
2123 	u8 data[16] = { 0, };
2124 	int ret;
2125 
2126 	put_unaligned_le64(key, &data[0]);
2127 	put_unaligned_le64(sa_key, &data[8]);
2128 
2129 	c.common.opcode = op;
2130 	c.common.cdw10 = cpu_to_le32(cdw10);
2131 
2132 	if (IS_ENABLED(CONFIG_NVME_MULTIPATH) &&
2133 	    bdev->bd_disk->fops == &nvme_ns_head_ops)
2134 		ret = nvme_send_ns_head_pr_command(bdev, &c, data);
2135 	else
2136 		ret = nvme_send_ns_pr_command(bdev->bd_disk->private_data, &c,
2137 					      data);
2138 	if (ret < 0)
2139 		return ret;
2140 
2141 	return nvme_sc_to_pr_err(ret);
2142 }
2143 
2144 static int nvme_pr_register(struct block_device *bdev, u64 old,
2145 		u64 new, unsigned flags)
2146 {
2147 	u32 cdw10;
2148 
2149 	if (flags & ~PR_FL_IGNORE_KEY)
2150 		return -EOPNOTSUPP;
2151 
2152 	cdw10 = old ? 2 : 0;
2153 	cdw10 |= (flags & PR_FL_IGNORE_KEY) ? 1 << 3 : 0;
2154 	cdw10 |= (1 << 30) | (1 << 31); /* PTPL=1 */
2155 	return nvme_pr_command(bdev, cdw10, old, new, nvme_cmd_resv_register);
2156 }
2157 
2158 static int nvme_pr_reserve(struct block_device *bdev, u64 key,
2159 		enum pr_type type, unsigned flags)
2160 {
2161 	u32 cdw10;
2162 
2163 	if (flags & ~PR_FL_IGNORE_KEY)
2164 		return -EOPNOTSUPP;
2165 
2166 	cdw10 = nvme_pr_type(type) << 8;
2167 	cdw10 |= ((flags & PR_FL_IGNORE_KEY) ? 1 << 3 : 0);
2168 	return nvme_pr_command(bdev, cdw10, key, 0, nvme_cmd_resv_acquire);
2169 }
2170 
2171 static int nvme_pr_preempt(struct block_device *bdev, u64 old, u64 new,
2172 		enum pr_type type, bool abort)
2173 {
2174 	u32 cdw10 = nvme_pr_type(type) << 8 | (abort ? 2 : 1);
2175 
2176 	return nvme_pr_command(bdev, cdw10, old, new, nvme_cmd_resv_acquire);
2177 }
2178 
2179 static int nvme_pr_clear(struct block_device *bdev, u64 key)
2180 {
2181 	u32 cdw10 = 1 | (key ? 0 : 1 << 3);
2182 
2183 	return nvme_pr_command(bdev, cdw10, key, 0, nvme_cmd_resv_release);
2184 }
2185 
2186 static int nvme_pr_release(struct block_device *bdev, u64 key, enum pr_type type)
2187 {
2188 	u32 cdw10 = nvme_pr_type(type) << 8 | (key ? 0 : 1 << 3);
2189 
2190 	return nvme_pr_command(bdev, cdw10, key, 0, nvme_cmd_resv_release);
2191 }
2192 
2193 const struct pr_ops nvme_pr_ops = {
2194 	.pr_register	= nvme_pr_register,
2195 	.pr_reserve	= nvme_pr_reserve,
2196 	.pr_release	= nvme_pr_release,
2197 	.pr_preempt	= nvme_pr_preempt,
2198 	.pr_clear	= nvme_pr_clear,
2199 };
2200 
2201 #ifdef CONFIG_BLK_SED_OPAL
2202 static int nvme_sec_submit(void *data, u16 spsp, u8 secp, void *buffer, size_t len,
2203 		bool send)
2204 {
2205 	struct nvme_ctrl *ctrl = data;
2206 	struct nvme_command cmd = { };
2207 
2208 	if (send)
2209 		cmd.common.opcode = nvme_admin_security_send;
2210 	else
2211 		cmd.common.opcode = nvme_admin_security_recv;
2212 	cmd.common.nsid = 0;
2213 	cmd.common.cdw10 = cpu_to_le32(((u32)secp) << 24 | ((u32)spsp) << 8);
2214 	cmd.common.cdw11 = cpu_to_le32(len);
2215 
2216 	return __nvme_submit_sync_cmd(ctrl->admin_q, &cmd, NULL, buffer, len,
2217 			NVME_QID_ANY, 1, 0);
2218 }
2219 
2220 static void nvme_configure_opal(struct nvme_ctrl *ctrl, bool was_suspended)
2221 {
2222 	if (ctrl->oacs & NVME_CTRL_OACS_SEC_SUPP) {
2223 		if (!ctrl->opal_dev)
2224 			ctrl->opal_dev = init_opal_dev(ctrl, &nvme_sec_submit);
2225 		else if (was_suspended)
2226 			opal_unlock_from_suspend(ctrl->opal_dev);
2227 	} else {
2228 		free_opal_dev(ctrl->opal_dev);
2229 		ctrl->opal_dev = NULL;
2230 	}
2231 }
2232 #else
2233 static void nvme_configure_opal(struct nvme_ctrl *ctrl, bool was_suspended)
2234 {
2235 }
2236 #endif /* CONFIG_BLK_SED_OPAL */
2237 
2238 #ifdef CONFIG_BLK_DEV_ZONED
2239 static int nvme_report_zones(struct gendisk *disk, sector_t sector,
2240 		unsigned int nr_zones, report_zones_cb cb, void *data)
2241 {
2242 	return nvme_ns_report_zones(disk->private_data, sector, nr_zones, cb,
2243 			data);
2244 }
2245 #else
2246 #define nvme_report_zones	NULL
2247 #endif /* CONFIG_BLK_DEV_ZONED */
2248 
2249 static const struct block_device_operations nvme_bdev_ops = {
2250 	.owner		= THIS_MODULE,
2251 	.ioctl		= nvme_ioctl,
2252 	.compat_ioctl	= blkdev_compat_ptr_ioctl,
2253 	.open		= nvme_open,
2254 	.release	= nvme_release,
2255 	.getgeo		= nvme_getgeo,
2256 	.report_zones	= nvme_report_zones,
2257 	.pr_ops		= &nvme_pr_ops,
2258 };
2259 
2260 static int nvme_wait_ready(struct nvme_ctrl *ctrl, u32 mask, u32 val,
2261 		u32 timeout, const char *op)
2262 {
2263 	unsigned long timeout_jiffies = jiffies + timeout * HZ;
2264 	u32 csts;
2265 	int ret;
2266 
2267 	while ((ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts)) == 0) {
2268 		if (csts == ~0)
2269 			return -ENODEV;
2270 		if ((csts & mask) == val)
2271 			break;
2272 
2273 		usleep_range(1000, 2000);
2274 		if (fatal_signal_pending(current))
2275 			return -EINTR;
2276 		if (time_after(jiffies, timeout_jiffies)) {
2277 			dev_err(ctrl->device,
2278 				"Device not ready; aborting %s, CSTS=0x%x\n",
2279 				op, csts);
2280 			return -ENODEV;
2281 		}
2282 	}
2283 
2284 	return ret;
2285 }
2286 
2287 int nvme_disable_ctrl(struct nvme_ctrl *ctrl, bool shutdown)
2288 {
2289 	int ret;
2290 
2291 	ctrl->ctrl_config &= ~NVME_CC_SHN_MASK;
2292 	if (shutdown)
2293 		ctrl->ctrl_config |= NVME_CC_SHN_NORMAL;
2294 	else
2295 		ctrl->ctrl_config &= ~NVME_CC_ENABLE;
2296 
2297 	ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config);
2298 	if (ret)
2299 		return ret;
2300 
2301 	if (shutdown) {
2302 		return nvme_wait_ready(ctrl, NVME_CSTS_SHST_MASK,
2303 				       NVME_CSTS_SHST_CMPLT,
2304 				       ctrl->shutdown_timeout, "shutdown");
2305 	}
2306 	if (ctrl->quirks & NVME_QUIRK_DELAY_BEFORE_CHK_RDY)
2307 		msleep(NVME_QUIRK_DELAY_AMOUNT);
2308 	return nvme_wait_ready(ctrl, NVME_CSTS_RDY, 0,
2309 			       (NVME_CAP_TIMEOUT(ctrl->cap) + 1) / 2, "reset");
2310 }
2311 EXPORT_SYMBOL_GPL(nvme_disable_ctrl);
2312 
2313 int nvme_enable_ctrl(struct nvme_ctrl *ctrl)
2314 {
2315 	unsigned dev_page_min;
2316 	u32 timeout;
2317 	int ret;
2318 
2319 	ret = ctrl->ops->reg_read64(ctrl, NVME_REG_CAP, &ctrl->cap);
2320 	if (ret) {
2321 		dev_err(ctrl->device, "Reading CAP failed (%d)\n", ret);
2322 		return ret;
2323 	}
2324 	dev_page_min = NVME_CAP_MPSMIN(ctrl->cap) + 12;
2325 
2326 	if (NVME_CTRL_PAGE_SHIFT < dev_page_min) {
2327 		dev_err(ctrl->device,
2328 			"Minimum device page size %u too large for host (%u)\n",
2329 			1 << dev_page_min, 1 << NVME_CTRL_PAGE_SHIFT);
2330 		return -ENODEV;
2331 	}
2332 
2333 	if (NVME_CAP_CSS(ctrl->cap) & NVME_CAP_CSS_CSI)
2334 		ctrl->ctrl_config = NVME_CC_CSS_CSI;
2335 	else
2336 		ctrl->ctrl_config = NVME_CC_CSS_NVM;
2337 
2338 	if (ctrl->cap & NVME_CAP_CRMS_CRWMS) {
2339 		u32 crto;
2340 
2341 		ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CRTO, &crto);
2342 		if (ret) {
2343 			dev_err(ctrl->device, "Reading CRTO failed (%d)\n",
2344 				ret);
2345 			return ret;
2346 		}
2347 
2348 		if (ctrl->cap & NVME_CAP_CRMS_CRIMS) {
2349 			ctrl->ctrl_config |= NVME_CC_CRIME;
2350 			timeout = NVME_CRTO_CRIMT(crto);
2351 		} else {
2352 			timeout = NVME_CRTO_CRWMT(crto);
2353 		}
2354 	} else {
2355 		timeout = NVME_CAP_TIMEOUT(ctrl->cap);
2356 	}
2357 
2358 	ctrl->ctrl_config |= (NVME_CTRL_PAGE_SHIFT - 12) << NVME_CC_MPS_SHIFT;
2359 	ctrl->ctrl_config |= NVME_CC_AMS_RR | NVME_CC_SHN_NONE;
2360 	ctrl->ctrl_config |= NVME_CC_IOSQES | NVME_CC_IOCQES;
2361 	ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config);
2362 	if (ret)
2363 		return ret;
2364 
2365 	/* Flush write to device (required if transport is PCI) */
2366 	ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CC, &ctrl->ctrl_config);
2367 	if (ret)
2368 		return ret;
2369 
2370 	ctrl->ctrl_config |= NVME_CC_ENABLE;
2371 	ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config);
2372 	if (ret)
2373 		return ret;
2374 	return nvme_wait_ready(ctrl, NVME_CSTS_RDY, NVME_CSTS_RDY,
2375 			       (timeout + 1) / 2, "initialisation");
2376 }
2377 EXPORT_SYMBOL_GPL(nvme_enable_ctrl);
2378 
2379 static int nvme_configure_timestamp(struct nvme_ctrl *ctrl)
2380 {
2381 	__le64 ts;
2382 	int ret;
2383 
2384 	if (!(ctrl->oncs & NVME_CTRL_ONCS_TIMESTAMP))
2385 		return 0;
2386 
2387 	ts = cpu_to_le64(ktime_to_ms(ktime_get_real()));
2388 	ret = nvme_set_features(ctrl, NVME_FEAT_TIMESTAMP, 0, &ts, sizeof(ts),
2389 			NULL);
2390 	if (ret)
2391 		dev_warn_once(ctrl->device,
2392 			"could not set timestamp (%d)\n", ret);
2393 	return ret;
2394 }
2395 
2396 static int nvme_configure_host_options(struct nvme_ctrl *ctrl)
2397 {
2398 	struct nvme_feat_host_behavior *host;
2399 	u8 acre = 0, lbafee = 0;
2400 	int ret;
2401 
2402 	/* Don't bother enabling the feature if retry delay is not reported */
2403 	if (ctrl->crdt[0])
2404 		acre = NVME_ENABLE_ACRE;
2405 	if (ctrl->ctratt & NVME_CTRL_ATTR_ELBAS)
2406 		lbafee = NVME_ENABLE_LBAFEE;
2407 
2408 	if (!acre && !lbafee)
2409 		return 0;
2410 
2411 	host = kzalloc(sizeof(*host), GFP_KERNEL);
2412 	if (!host)
2413 		return 0;
2414 
2415 	host->acre = acre;
2416 	host->lbafee = lbafee;
2417 	ret = nvme_set_features(ctrl, NVME_FEAT_HOST_BEHAVIOR, 0,
2418 				host, sizeof(*host), NULL);
2419 	kfree(host);
2420 	return ret;
2421 }
2422 
2423 /*
2424  * The function checks whether the given total (exlat + enlat) latency of
2425  * a power state allows the latter to be used as an APST transition target.
2426  * It does so by comparing the latency to the primary and secondary latency
2427  * tolerances defined by module params. If there's a match, the corresponding
2428  * timeout value is returned and the matching tolerance index (1 or 2) is
2429  * reported.
2430  */
2431 static bool nvme_apst_get_transition_time(u64 total_latency,
2432 		u64 *transition_time, unsigned *last_index)
2433 {
2434 	if (total_latency <= apst_primary_latency_tol_us) {
2435 		if (*last_index == 1)
2436 			return false;
2437 		*last_index = 1;
2438 		*transition_time = apst_primary_timeout_ms;
2439 		return true;
2440 	}
2441 	if (apst_secondary_timeout_ms &&
2442 		total_latency <= apst_secondary_latency_tol_us) {
2443 		if (*last_index <= 2)
2444 			return false;
2445 		*last_index = 2;
2446 		*transition_time = apst_secondary_timeout_ms;
2447 		return true;
2448 	}
2449 	return false;
2450 }
2451 
2452 /*
2453  * APST (Autonomous Power State Transition) lets us program a table of power
2454  * state transitions that the controller will perform automatically.
2455  *
2456  * Depending on module params, one of the two supported techniques will be used:
2457  *
2458  * - If the parameters provide explicit timeouts and tolerances, they will be
2459  *   used to build a table with up to 2 non-operational states to transition to.
2460  *   The default parameter values were selected based on the values used by
2461  *   Microsoft's and Intel's NVMe drivers. Yet, since we don't implement dynamic
2462  *   regeneration of the APST table in the event of switching between external
2463  *   and battery power, the timeouts and tolerances reflect a compromise
2464  *   between values used by Microsoft for AC and battery scenarios.
2465  * - If not, we'll configure the table with a simple heuristic: we are willing
2466  *   to spend at most 2% of the time transitioning between power states.
2467  *   Therefore, when running in any given state, we will enter the next
2468  *   lower-power non-operational state after waiting 50 * (enlat + exlat)
2469  *   microseconds, as long as that state's exit latency is under the requested
2470  *   maximum latency.
2471  *
2472  * We will not autonomously enter any non-operational state for which the total
2473  * latency exceeds ps_max_latency_us.
2474  *
2475  * Users can set ps_max_latency_us to zero to turn off APST.
2476  */
2477 static int nvme_configure_apst(struct nvme_ctrl *ctrl)
2478 {
2479 	struct nvme_feat_auto_pst *table;
2480 	unsigned apste = 0;
2481 	u64 max_lat_us = 0;
2482 	__le64 target = 0;
2483 	int max_ps = -1;
2484 	int state;
2485 	int ret;
2486 	unsigned last_lt_index = UINT_MAX;
2487 
2488 	/*
2489 	 * If APST isn't supported or if we haven't been initialized yet,
2490 	 * then don't do anything.
2491 	 */
2492 	if (!ctrl->apsta)
2493 		return 0;
2494 
2495 	if (ctrl->npss > 31) {
2496 		dev_warn(ctrl->device, "NPSS is invalid; not using APST\n");
2497 		return 0;
2498 	}
2499 
2500 	table = kzalloc(sizeof(*table), GFP_KERNEL);
2501 	if (!table)
2502 		return 0;
2503 
2504 	if (!ctrl->apst_enabled || ctrl->ps_max_latency_us == 0) {
2505 		/* Turn off APST. */
2506 		dev_dbg(ctrl->device, "APST disabled\n");
2507 		goto done;
2508 	}
2509 
2510 	/*
2511 	 * Walk through all states from lowest- to highest-power.
2512 	 * According to the spec, lower-numbered states use more power.  NPSS,
2513 	 * despite the name, is the index of the lowest-power state, not the
2514 	 * number of states.
2515 	 */
2516 	for (state = (int)ctrl->npss; state >= 0; state--) {
2517 		u64 total_latency_us, exit_latency_us, transition_ms;
2518 
2519 		if (target)
2520 			table->entries[state] = target;
2521 
2522 		/*
2523 		 * Don't allow transitions to the deepest state if it's quirked
2524 		 * off.
2525 		 */
2526 		if (state == ctrl->npss &&
2527 		    (ctrl->quirks & NVME_QUIRK_NO_DEEPEST_PS))
2528 			continue;
2529 
2530 		/*
2531 		 * Is this state a useful non-operational state for higher-power
2532 		 * states to autonomously transition to?
2533 		 */
2534 		if (!(ctrl->psd[state].flags & NVME_PS_FLAGS_NON_OP_STATE))
2535 			continue;
2536 
2537 		exit_latency_us = (u64)le32_to_cpu(ctrl->psd[state].exit_lat);
2538 		if (exit_latency_us > ctrl->ps_max_latency_us)
2539 			continue;
2540 
2541 		total_latency_us = exit_latency_us +
2542 			le32_to_cpu(ctrl->psd[state].entry_lat);
2543 
2544 		/*
2545 		 * This state is good. It can be used as the APST idle target
2546 		 * for higher power states.
2547 		 */
2548 		if (apst_primary_timeout_ms && apst_primary_latency_tol_us) {
2549 			if (!nvme_apst_get_transition_time(total_latency_us,
2550 					&transition_ms, &last_lt_index))
2551 				continue;
2552 		} else {
2553 			transition_ms = total_latency_us + 19;
2554 			do_div(transition_ms, 20);
2555 			if (transition_ms > (1 << 24) - 1)
2556 				transition_ms = (1 << 24) - 1;
2557 		}
2558 
2559 		target = cpu_to_le64((state << 3) | (transition_ms << 8));
2560 		if (max_ps == -1)
2561 			max_ps = state;
2562 		if (total_latency_us > max_lat_us)
2563 			max_lat_us = total_latency_us;
2564 	}
2565 
2566 	if (max_ps == -1)
2567 		dev_dbg(ctrl->device, "APST enabled but no non-operational states are available\n");
2568 	else
2569 		dev_dbg(ctrl->device, "APST enabled: max PS = %d, max round-trip latency = %lluus, table = %*phN\n",
2570 			max_ps, max_lat_us, (int)sizeof(*table), table);
2571 	apste = 1;
2572 
2573 done:
2574 	ret = nvme_set_features(ctrl, NVME_FEAT_AUTO_PST, apste,
2575 				table, sizeof(*table), NULL);
2576 	if (ret)
2577 		dev_err(ctrl->device, "failed to set APST feature (%d)\n", ret);
2578 	kfree(table);
2579 	return ret;
2580 }
2581 
2582 static void nvme_set_latency_tolerance(struct device *dev, s32 val)
2583 {
2584 	struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
2585 	u64 latency;
2586 
2587 	switch (val) {
2588 	case PM_QOS_LATENCY_TOLERANCE_NO_CONSTRAINT:
2589 	case PM_QOS_LATENCY_ANY:
2590 		latency = U64_MAX;
2591 		break;
2592 
2593 	default:
2594 		latency = val;
2595 	}
2596 
2597 	if (ctrl->ps_max_latency_us != latency) {
2598 		ctrl->ps_max_latency_us = latency;
2599 		if (ctrl->state == NVME_CTRL_LIVE)
2600 			nvme_configure_apst(ctrl);
2601 	}
2602 }
2603 
2604 struct nvme_core_quirk_entry {
2605 	/*
2606 	 * NVMe model and firmware strings are padded with spaces.  For
2607 	 * simplicity, strings in the quirk table are padded with NULLs
2608 	 * instead.
2609 	 */
2610 	u16 vid;
2611 	const char *mn;
2612 	const char *fr;
2613 	unsigned long quirks;
2614 };
2615 
2616 static const struct nvme_core_quirk_entry core_quirks[] = {
2617 	{
2618 		/*
2619 		 * This Toshiba device seems to die using any APST states.  See:
2620 		 * https://bugs.launchpad.net/ubuntu/+source/linux/+bug/1678184/comments/11
2621 		 */
2622 		.vid = 0x1179,
2623 		.mn = "THNSF5256GPUK TOSHIBA",
2624 		.quirks = NVME_QUIRK_NO_APST,
2625 	},
2626 	{
2627 		/*
2628 		 * This LiteON CL1-3D*-Q11 firmware version has a race
2629 		 * condition associated with actions related to suspend to idle
2630 		 * LiteON has resolved the problem in future firmware
2631 		 */
2632 		.vid = 0x14a4,
2633 		.fr = "22301111",
2634 		.quirks = NVME_QUIRK_SIMPLE_SUSPEND,
2635 	},
2636 	{
2637 		/*
2638 		 * This Kioxia CD6-V Series / HPE PE8030 device times out and
2639 		 * aborts I/O during any load, but more easily reproducible
2640 		 * with discards (fstrim).
2641 		 *
2642 		 * The device is left in a state where it is also not possible
2643 		 * to use "nvme set-feature" to disable APST, but booting with
2644 		 * nvme_core.default_ps_max_latency=0 works.
2645 		 */
2646 		.vid = 0x1e0f,
2647 		.mn = "KCD6XVUL6T40",
2648 		.quirks = NVME_QUIRK_NO_APST,
2649 	},
2650 	{
2651 		/*
2652 		 * The external Samsung X5 SSD fails initialization without a
2653 		 * delay before checking if it is ready and has a whole set of
2654 		 * other problems.  To make this even more interesting, it
2655 		 * shares the PCI ID with internal Samsung 970 Evo Plus that
2656 		 * does not need or want these quirks.
2657 		 */
2658 		.vid = 0x144d,
2659 		.mn = "Samsung Portable SSD X5",
2660 		.quirks = NVME_QUIRK_DELAY_BEFORE_CHK_RDY |
2661 			  NVME_QUIRK_NO_DEEPEST_PS |
2662 			  NVME_QUIRK_IGNORE_DEV_SUBNQN,
2663 	}
2664 };
2665 
2666 /* match is null-terminated but idstr is space-padded. */
2667 static bool string_matches(const char *idstr, const char *match, size_t len)
2668 {
2669 	size_t matchlen;
2670 
2671 	if (!match)
2672 		return true;
2673 
2674 	matchlen = strlen(match);
2675 	WARN_ON_ONCE(matchlen > len);
2676 
2677 	if (memcmp(idstr, match, matchlen))
2678 		return false;
2679 
2680 	for (; matchlen < len; matchlen++)
2681 		if (idstr[matchlen] != ' ')
2682 			return false;
2683 
2684 	return true;
2685 }
2686 
2687 static bool quirk_matches(const struct nvme_id_ctrl *id,
2688 			  const struct nvme_core_quirk_entry *q)
2689 {
2690 	return q->vid == le16_to_cpu(id->vid) &&
2691 		string_matches(id->mn, q->mn, sizeof(id->mn)) &&
2692 		string_matches(id->fr, q->fr, sizeof(id->fr));
2693 }
2694 
2695 static void nvme_init_subnqn(struct nvme_subsystem *subsys, struct nvme_ctrl *ctrl,
2696 		struct nvme_id_ctrl *id)
2697 {
2698 	size_t nqnlen;
2699 	int off;
2700 
2701 	if(!(ctrl->quirks & NVME_QUIRK_IGNORE_DEV_SUBNQN)) {
2702 		nqnlen = strnlen(id->subnqn, NVMF_NQN_SIZE);
2703 		if (nqnlen > 0 && nqnlen < NVMF_NQN_SIZE) {
2704 			strscpy(subsys->subnqn, id->subnqn, NVMF_NQN_SIZE);
2705 			return;
2706 		}
2707 
2708 		if (ctrl->vs >= NVME_VS(1, 2, 1))
2709 			dev_warn(ctrl->device, "missing or invalid SUBNQN field.\n");
2710 	}
2711 
2712 	/*
2713 	 * Generate a "fake" NQN similar to the one in Section 4.5 of the NVMe
2714 	 * Base Specification 2.0.  It is slightly different from the format
2715 	 * specified there due to historic reasons, and we can't change it now.
2716 	 */
2717 	off = snprintf(subsys->subnqn, NVMF_NQN_SIZE,
2718 			"nqn.2014.08.org.nvmexpress:%04x%04x",
2719 			le16_to_cpu(id->vid), le16_to_cpu(id->ssvid));
2720 	memcpy(subsys->subnqn + off, id->sn, sizeof(id->sn));
2721 	off += sizeof(id->sn);
2722 	memcpy(subsys->subnqn + off, id->mn, sizeof(id->mn));
2723 	off += sizeof(id->mn);
2724 	memset(subsys->subnqn + off, 0, sizeof(subsys->subnqn) - off);
2725 }
2726 
2727 static void nvme_release_subsystem(struct device *dev)
2728 {
2729 	struct nvme_subsystem *subsys =
2730 		container_of(dev, struct nvme_subsystem, dev);
2731 
2732 	if (subsys->instance >= 0)
2733 		ida_free(&nvme_instance_ida, subsys->instance);
2734 	kfree(subsys);
2735 }
2736 
2737 static void nvme_destroy_subsystem(struct kref *ref)
2738 {
2739 	struct nvme_subsystem *subsys =
2740 			container_of(ref, struct nvme_subsystem, ref);
2741 
2742 	mutex_lock(&nvme_subsystems_lock);
2743 	list_del(&subsys->entry);
2744 	mutex_unlock(&nvme_subsystems_lock);
2745 
2746 	ida_destroy(&subsys->ns_ida);
2747 	device_del(&subsys->dev);
2748 	put_device(&subsys->dev);
2749 }
2750 
2751 static void nvme_put_subsystem(struct nvme_subsystem *subsys)
2752 {
2753 	kref_put(&subsys->ref, nvme_destroy_subsystem);
2754 }
2755 
2756 static struct nvme_subsystem *__nvme_find_get_subsystem(const char *subsysnqn)
2757 {
2758 	struct nvme_subsystem *subsys;
2759 
2760 	lockdep_assert_held(&nvme_subsystems_lock);
2761 
2762 	/*
2763 	 * Fail matches for discovery subsystems. This results
2764 	 * in each discovery controller bound to a unique subsystem.
2765 	 * This avoids issues with validating controller values
2766 	 * that can only be true when there is a single unique subsystem.
2767 	 * There may be multiple and completely independent entities
2768 	 * that provide discovery controllers.
2769 	 */
2770 	if (!strcmp(subsysnqn, NVME_DISC_SUBSYS_NAME))
2771 		return NULL;
2772 
2773 	list_for_each_entry(subsys, &nvme_subsystems, entry) {
2774 		if (strcmp(subsys->subnqn, subsysnqn))
2775 			continue;
2776 		if (!kref_get_unless_zero(&subsys->ref))
2777 			continue;
2778 		return subsys;
2779 	}
2780 
2781 	return NULL;
2782 }
2783 
2784 #define SUBSYS_ATTR_RO(_name, _mode, _show)			\
2785 	struct device_attribute subsys_attr_##_name = \
2786 		__ATTR(_name, _mode, _show, NULL)
2787 
2788 static ssize_t nvme_subsys_show_nqn(struct device *dev,
2789 				    struct device_attribute *attr,
2790 				    char *buf)
2791 {
2792 	struct nvme_subsystem *subsys =
2793 		container_of(dev, struct nvme_subsystem, dev);
2794 
2795 	return sysfs_emit(buf, "%s\n", subsys->subnqn);
2796 }
2797 static SUBSYS_ATTR_RO(subsysnqn, S_IRUGO, nvme_subsys_show_nqn);
2798 
2799 static ssize_t nvme_subsys_show_type(struct device *dev,
2800 				    struct device_attribute *attr,
2801 				    char *buf)
2802 {
2803 	struct nvme_subsystem *subsys =
2804 		container_of(dev, struct nvme_subsystem, dev);
2805 
2806 	switch (subsys->subtype) {
2807 	case NVME_NQN_DISC:
2808 		return sysfs_emit(buf, "discovery\n");
2809 	case NVME_NQN_NVME:
2810 		return sysfs_emit(buf, "nvm\n");
2811 	default:
2812 		return sysfs_emit(buf, "reserved\n");
2813 	}
2814 }
2815 static SUBSYS_ATTR_RO(subsystype, S_IRUGO, nvme_subsys_show_type);
2816 
2817 #define nvme_subsys_show_str_function(field)				\
2818 static ssize_t subsys_##field##_show(struct device *dev,		\
2819 			    struct device_attribute *attr, char *buf)	\
2820 {									\
2821 	struct nvme_subsystem *subsys =					\
2822 		container_of(dev, struct nvme_subsystem, dev);		\
2823 	return sysfs_emit(buf, "%.*s\n",				\
2824 			   (int)sizeof(subsys->field), subsys->field);	\
2825 }									\
2826 static SUBSYS_ATTR_RO(field, S_IRUGO, subsys_##field##_show);
2827 
2828 nvme_subsys_show_str_function(model);
2829 nvme_subsys_show_str_function(serial);
2830 nvme_subsys_show_str_function(firmware_rev);
2831 
2832 static struct attribute *nvme_subsys_attrs[] = {
2833 	&subsys_attr_model.attr,
2834 	&subsys_attr_serial.attr,
2835 	&subsys_attr_firmware_rev.attr,
2836 	&subsys_attr_subsysnqn.attr,
2837 	&subsys_attr_subsystype.attr,
2838 #ifdef CONFIG_NVME_MULTIPATH
2839 	&subsys_attr_iopolicy.attr,
2840 #endif
2841 	NULL,
2842 };
2843 
2844 static const struct attribute_group nvme_subsys_attrs_group = {
2845 	.attrs = nvme_subsys_attrs,
2846 };
2847 
2848 static const struct attribute_group *nvme_subsys_attrs_groups[] = {
2849 	&nvme_subsys_attrs_group,
2850 	NULL,
2851 };
2852 
2853 static inline bool nvme_discovery_ctrl(struct nvme_ctrl *ctrl)
2854 {
2855 	return ctrl->opts && ctrl->opts->discovery_nqn;
2856 }
2857 
2858 static bool nvme_validate_cntlid(struct nvme_subsystem *subsys,
2859 		struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id)
2860 {
2861 	struct nvme_ctrl *tmp;
2862 
2863 	lockdep_assert_held(&nvme_subsystems_lock);
2864 
2865 	list_for_each_entry(tmp, &subsys->ctrls, subsys_entry) {
2866 		if (nvme_state_terminal(tmp))
2867 			continue;
2868 
2869 		if (tmp->cntlid == ctrl->cntlid) {
2870 			dev_err(ctrl->device,
2871 				"Duplicate cntlid %u with %s, subsys %s, rejecting\n",
2872 				ctrl->cntlid, dev_name(tmp->device),
2873 				subsys->subnqn);
2874 			return false;
2875 		}
2876 
2877 		if ((id->cmic & NVME_CTRL_CMIC_MULTI_CTRL) ||
2878 		    nvme_discovery_ctrl(ctrl))
2879 			continue;
2880 
2881 		dev_err(ctrl->device,
2882 			"Subsystem does not support multiple controllers\n");
2883 		return false;
2884 	}
2885 
2886 	return true;
2887 }
2888 
2889 static int nvme_init_subsystem(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id)
2890 {
2891 	struct nvme_subsystem *subsys, *found;
2892 	int ret;
2893 
2894 	subsys = kzalloc(sizeof(*subsys), GFP_KERNEL);
2895 	if (!subsys)
2896 		return -ENOMEM;
2897 
2898 	subsys->instance = -1;
2899 	mutex_init(&subsys->lock);
2900 	kref_init(&subsys->ref);
2901 	INIT_LIST_HEAD(&subsys->ctrls);
2902 	INIT_LIST_HEAD(&subsys->nsheads);
2903 	nvme_init_subnqn(subsys, ctrl, id);
2904 	memcpy(subsys->serial, id->sn, sizeof(subsys->serial));
2905 	memcpy(subsys->model, id->mn, sizeof(subsys->model));
2906 	subsys->vendor_id = le16_to_cpu(id->vid);
2907 	subsys->cmic = id->cmic;
2908 
2909 	/* Versions prior to 1.4 don't necessarily report a valid type */
2910 	if (id->cntrltype == NVME_CTRL_DISC ||
2911 	    !strcmp(subsys->subnqn, NVME_DISC_SUBSYS_NAME))
2912 		subsys->subtype = NVME_NQN_DISC;
2913 	else
2914 		subsys->subtype = NVME_NQN_NVME;
2915 
2916 	if (nvme_discovery_ctrl(ctrl) && subsys->subtype != NVME_NQN_DISC) {
2917 		dev_err(ctrl->device,
2918 			"Subsystem %s is not a discovery controller",
2919 			subsys->subnqn);
2920 		kfree(subsys);
2921 		return -EINVAL;
2922 	}
2923 	subsys->awupf = le16_to_cpu(id->awupf);
2924 	nvme_mpath_default_iopolicy(subsys);
2925 
2926 	subsys->dev.class = nvme_subsys_class;
2927 	subsys->dev.release = nvme_release_subsystem;
2928 	subsys->dev.groups = nvme_subsys_attrs_groups;
2929 	dev_set_name(&subsys->dev, "nvme-subsys%d", ctrl->instance);
2930 	device_initialize(&subsys->dev);
2931 
2932 	mutex_lock(&nvme_subsystems_lock);
2933 	found = __nvme_find_get_subsystem(subsys->subnqn);
2934 	if (found) {
2935 		put_device(&subsys->dev);
2936 		subsys = found;
2937 
2938 		if (!nvme_validate_cntlid(subsys, ctrl, id)) {
2939 			ret = -EINVAL;
2940 			goto out_put_subsystem;
2941 		}
2942 	} else {
2943 		ret = device_add(&subsys->dev);
2944 		if (ret) {
2945 			dev_err(ctrl->device,
2946 				"failed to register subsystem device.\n");
2947 			put_device(&subsys->dev);
2948 			goto out_unlock;
2949 		}
2950 		ida_init(&subsys->ns_ida);
2951 		list_add_tail(&subsys->entry, &nvme_subsystems);
2952 	}
2953 
2954 	ret = sysfs_create_link(&subsys->dev.kobj, &ctrl->device->kobj,
2955 				dev_name(ctrl->device));
2956 	if (ret) {
2957 		dev_err(ctrl->device,
2958 			"failed to create sysfs link from subsystem.\n");
2959 		goto out_put_subsystem;
2960 	}
2961 
2962 	if (!found)
2963 		subsys->instance = ctrl->instance;
2964 	ctrl->subsys = subsys;
2965 	list_add_tail(&ctrl->subsys_entry, &subsys->ctrls);
2966 	mutex_unlock(&nvme_subsystems_lock);
2967 	return 0;
2968 
2969 out_put_subsystem:
2970 	nvme_put_subsystem(subsys);
2971 out_unlock:
2972 	mutex_unlock(&nvme_subsystems_lock);
2973 	return ret;
2974 }
2975 
2976 int nvme_get_log(struct nvme_ctrl *ctrl, u32 nsid, u8 log_page, u8 lsp, u8 csi,
2977 		void *log, size_t size, u64 offset)
2978 {
2979 	struct nvme_command c = { };
2980 	u32 dwlen = nvme_bytes_to_numd(size);
2981 
2982 	c.get_log_page.opcode = nvme_admin_get_log_page;
2983 	c.get_log_page.nsid = cpu_to_le32(nsid);
2984 	c.get_log_page.lid = log_page;
2985 	c.get_log_page.lsp = lsp;
2986 	c.get_log_page.numdl = cpu_to_le16(dwlen & ((1 << 16) - 1));
2987 	c.get_log_page.numdu = cpu_to_le16(dwlen >> 16);
2988 	c.get_log_page.lpol = cpu_to_le32(lower_32_bits(offset));
2989 	c.get_log_page.lpou = cpu_to_le32(upper_32_bits(offset));
2990 	c.get_log_page.csi = csi;
2991 
2992 	return nvme_submit_sync_cmd(ctrl->admin_q, &c, log, size);
2993 }
2994 
2995 static int nvme_get_effects_log(struct nvme_ctrl *ctrl, u8 csi,
2996 				struct nvme_effects_log **log)
2997 {
2998 	struct nvme_effects_log	*cel = xa_load(&ctrl->cels, csi);
2999 	int ret;
3000 
3001 	if (cel)
3002 		goto out;
3003 
3004 	cel = kzalloc(sizeof(*cel), GFP_KERNEL);
3005 	if (!cel)
3006 		return -ENOMEM;
3007 
3008 	ret = nvme_get_log(ctrl, 0x00, NVME_LOG_CMD_EFFECTS, 0, csi,
3009 			cel, sizeof(*cel), 0);
3010 	if (ret) {
3011 		kfree(cel);
3012 		return ret;
3013 	}
3014 
3015 	xa_store(&ctrl->cels, csi, cel, GFP_KERNEL);
3016 out:
3017 	*log = cel;
3018 	return 0;
3019 }
3020 
3021 static inline u32 nvme_mps_to_sectors(struct nvme_ctrl *ctrl, u32 units)
3022 {
3023 	u32 page_shift = NVME_CAP_MPSMIN(ctrl->cap) + 12, val;
3024 
3025 	if (check_shl_overflow(1U, units + page_shift - 9, &val))
3026 		return UINT_MAX;
3027 	return val;
3028 }
3029 
3030 static int nvme_init_non_mdts_limits(struct nvme_ctrl *ctrl)
3031 {
3032 	struct nvme_command c = { };
3033 	struct nvme_id_ctrl_nvm *id;
3034 	int ret;
3035 
3036 	if (ctrl->oncs & NVME_CTRL_ONCS_DSM) {
3037 		ctrl->max_discard_sectors = UINT_MAX;
3038 		ctrl->max_discard_segments = NVME_DSM_MAX_RANGES;
3039 	} else {
3040 		ctrl->max_discard_sectors = 0;
3041 		ctrl->max_discard_segments = 0;
3042 	}
3043 
3044 	/*
3045 	 * Even though NVMe spec explicitly states that MDTS is not applicable
3046 	 * to the write-zeroes, we are cautious and limit the size to the
3047 	 * controllers max_hw_sectors value, which is based on the MDTS field
3048 	 * and possibly other limiting factors.
3049 	 */
3050 	if ((ctrl->oncs & NVME_CTRL_ONCS_WRITE_ZEROES) &&
3051 	    !(ctrl->quirks & NVME_QUIRK_DISABLE_WRITE_ZEROES))
3052 		ctrl->max_zeroes_sectors = ctrl->max_hw_sectors;
3053 	else
3054 		ctrl->max_zeroes_sectors = 0;
3055 
3056 	if (nvme_ctrl_limited_cns(ctrl))
3057 		return 0;
3058 
3059 	id = kzalloc(sizeof(*id), GFP_KERNEL);
3060 	if (!id)
3061 		return -ENOMEM;
3062 
3063 	c.identify.opcode = nvme_admin_identify;
3064 	c.identify.cns = NVME_ID_CNS_CS_CTRL;
3065 	c.identify.csi = NVME_CSI_NVM;
3066 
3067 	ret = nvme_submit_sync_cmd(ctrl->admin_q, &c, id, sizeof(*id));
3068 	if (ret)
3069 		goto free_data;
3070 
3071 	if (id->dmrl)
3072 		ctrl->max_discard_segments = id->dmrl;
3073 	ctrl->dmrsl = le32_to_cpu(id->dmrsl);
3074 	if (id->wzsl)
3075 		ctrl->max_zeroes_sectors = nvme_mps_to_sectors(ctrl, id->wzsl);
3076 
3077 free_data:
3078 	kfree(id);
3079 	return ret;
3080 }
3081 
3082 static void nvme_init_known_nvm_effects(struct nvme_ctrl *ctrl)
3083 {
3084 	struct nvme_effects_log	*log = ctrl->effects;
3085 
3086 	log->acs[nvme_admin_format_nvm] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC |
3087 						NVME_CMD_EFFECTS_NCC |
3088 						NVME_CMD_EFFECTS_CSE_MASK);
3089 	log->acs[nvme_admin_sanitize_nvm] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC |
3090 						NVME_CMD_EFFECTS_CSE_MASK);
3091 
3092 	/*
3093 	 * The spec says the result of a security receive command depends on
3094 	 * the previous security send command. As such, many vendors log this
3095 	 * command as one to submitted only when no other commands to the same
3096 	 * namespace are outstanding. The intention is to tell the host to
3097 	 * prevent mixing security send and receive.
3098 	 *
3099 	 * This driver can only enforce such exclusive access against IO
3100 	 * queues, though. We are not readily able to enforce such a rule for
3101 	 * two commands to the admin queue, which is the only queue that
3102 	 * matters for this command.
3103 	 *
3104 	 * Rather than blindly freezing the IO queues for this effect that
3105 	 * doesn't even apply to IO, mask it off.
3106 	 */
3107 	log->acs[nvme_admin_security_recv] &= ~NVME_CMD_EFFECTS_CSE_MASK;
3108 
3109 	log->iocs[nvme_cmd_write] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC);
3110 	log->iocs[nvme_cmd_write_zeroes] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC);
3111 	log->iocs[nvme_cmd_write_uncor] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC);
3112 }
3113 
3114 static int nvme_init_effects(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id)
3115 {
3116 	int ret = 0;
3117 
3118 	if (ctrl->effects)
3119 		return 0;
3120 
3121 	if (id->lpa & NVME_CTRL_LPA_CMD_EFFECTS_LOG) {
3122 		ret = nvme_get_effects_log(ctrl, NVME_CSI_NVM, &ctrl->effects);
3123 		if (ret < 0)
3124 			return ret;
3125 	}
3126 
3127 	if (!ctrl->effects) {
3128 		ctrl->effects = kzalloc(sizeof(*ctrl->effects), GFP_KERNEL);
3129 		if (!ctrl->effects)
3130 			return -ENOMEM;
3131 		xa_store(&ctrl->cels, NVME_CSI_NVM, ctrl->effects, GFP_KERNEL);
3132 	}
3133 
3134 	nvme_init_known_nvm_effects(ctrl);
3135 	return 0;
3136 }
3137 
3138 static int nvme_init_identify(struct nvme_ctrl *ctrl)
3139 {
3140 	struct nvme_id_ctrl *id;
3141 	u32 max_hw_sectors;
3142 	bool prev_apst_enabled;
3143 	int ret;
3144 
3145 	ret = nvme_identify_ctrl(ctrl, &id);
3146 	if (ret) {
3147 		dev_err(ctrl->device, "Identify Controller failed (%d)\n", ret);
3148 		return -EIO;
3149 	}
3150 
3151 	if (!(ctrl->ops->flags & NVME_F_FABRICS))
3152 		ctrl->cntlid = le16_to_cpu(id->cntlid);
3153 
3154 	if (!ctrl->identified) {
3155 		unsigned int i;
3156 
3157 		/*
3158 		 * Check for quirks.  Quirk can depend on firmware version,
3159 		 * so, in principle, the set of quirks present can change
3160 		 * across a reset.  As a possible future enhancement, we
3161 		 * could re-scan for quirks every time we reinitialize
3162 		 * the device, but we'd have to make sure that the driver
3163 		 * behaves intelligently if the quirks change.
3164 		 */
3165 		for (i = 0; i < ARRAY_SIZE(core_quirks); i++) {
3166 			if (quirk_matches(id, &core_quirks[i]))
3167 				ctrl->quirks |= core_quirks[i].quirks;
3168 		}
3169 
3170 		ret = nvme_init_subsystem(ctrl, id);
3171 		if (ret)
3172 			goto out_free;
3173 
3174 		ret = nvme_init_effects(ctrl, id);
3175 		if (ret)
3176 			goto out_free;
3177 	}
3178 	memcpy(ctrl->subsys->firmware_rev, id->fr,
3179 	       sizeof(ctrl->subsys->firmware_rev));
3180 
3181 	if (force_apst && (ctrl->quirks & NVME_QUIRK_NO_DEEPEST_PS)) {
3182 		dev_warn(ctrl->device, "forcibly allowing all power states due to nvme_core.force_apst -- use at your own risk\n");
3183 		ctrl->quirks &= ~NVME_QUIRK_NO_DEEPEST_PS;
3184 	}
3185 
3186 	ctrl->crdt[0] = le16_to_cpu(id->crdt1);
3187 	ctrl->crdt[1] = le16_to_cpu(id->crdt2);
3188 	ctrl->crdt[2] = le16_to_cpu(id->crdt3);
3189 
3190 	ctrl->oacs = le16_to_cpu(id->oacs);
3191 	ctrl->oncs = le16_to_cpu(id->oncs);
3192 	ctrl->mtfa = le16_to_cpu(id->mtfa);
3193 	ctrl->oaes = le32_to_cpu(id->oaes);
3194 	ctrl->wctemp = le16_to_cpu(id->wctemp);
3195 	ctrl->cctemp = le16_to_cpu(id->cctemp);
3196 
3197 	atomic_set(&ctrl->abort_limit, id->acl + 1);
3198 	ctrl->vwc = id->vwc;
3199 	if (id->mdts)
3200 		max_hw_sectors = nvme_mps_to_sectors(ctrl, id->mdts);
3201 	else
3202 		max_hw_sectors = UINT_MAX;
3203 	ctrl->max_hw_sectors =
3204 		min_not_zero(ctrl->max_hw_sectors, max_hw_sectors);
3205 
3206 	nvme_set_queue_limits(ctrl, ctrl->admin_q);
3207 	ctrl->sgls = le32_to_cpu(id->sgls);
3208 	ctrl->kas = le16_to_cpu(id->kas);
3209 	ctrl->max_namespaces = le32_to_cpu(id->mnan);
3210 	ctrl->ctratt = le32_to_cpu(id->ctratt);
3211 
3212 	ctrl->cntrltype = id->cntrltype;
3213 	ctrl->dctype = id->dctype;
3214 
3215 	if (id->rtd3e) {
3216 		/* us -> s */
3217 		u32 transition_time = le32_to_cpu(id->rtd3e) / USEC_PER_SEC;
3218 
3219 		ctrl->shutdown_timeout = clamp_t(unsigned int, transition_time,
3220 						 shutdown_timeout, 60);
3221 
3222 		if (ctrl->shutdown_timeout != shutdown_timeout)
3223 			dev_info(ctrl->device,
3224 				 "Shutdown timeout set to %u seconds\n",
3225 				 ctrl->shutdown_timeout);
3226 	} else
3227 		ctrl->shutdown_timeout = shutdown_timeout;
3228 
3229 	ctrl->npss = id->npss;
3230 	ctrl->apsta = id->apsta;
3231 	prev_apst_enabled = ctrl->apst_enabled;
3232 	if (ctrl->quirks & NVME_QUIRK_NO_APST) {
3233 		if (force_apst && id->apsta) {
3234 			dev_warn(ctrl->device, "forcibly allowing APST due to nvme_core.force_apst -- use at your own risk\n");
3235 			ctrl->apst_enabled = true;
3236 		} else {
3237 			ctrl->apst_enabled = false;
3238 		}
3239 	} else {
3240 		ctrl->apst_enabled = id->apsta;
3241 	}
3242 	memcpy(ctrl->psd, id->psd, sizeof(ctrl->psd));
3243 
3244 	if (ctrl->ops->flags & NVME_F_FABRICS) {
3245 		ctrl->icdoff = le16_to_cpu(id->icdoff);
3246 		ctrl->ioccsz = le32_to_cpu(id->ioccsz);
3247 		ctrl->iorcsz = le32_to_cpu(id->iorcsz);
3248 		ctrl->maxcmd = le16_to_cpu(id->maxcmd);
3249 
3250 		/*
3251 		 * In fabrics we need to verify the cntlid matches the
3252 		 * admin connect
3253 		 */
3254 		if (ctrl->cntlid != le16_to_cpu(id->cntlid)) {
3255 			dev_err(ctrl->device,
3256 				"Mismatching cntlid: Connect %u vs Identify "
3257 				"%u, rejecting\n",
3258 				ctrl->cntlid, le16_to_cpu(id->cntlid));
3259 			ret = -EINVAL;
3260 			goto out_free;
3261 		}
3262 
3263 		if (!nvme_discovery_ctrl(ctrl) && !ctrl->kas) {
3264 			dev_err(ctrl->device,
3265 				"keep-alive support is mandatory for fabrics\n");
3266 			ret = -EINVAL;
3267 			goto out_free;
3268 		}
3269 	} else {
3270 		ctrl->hmpre = le32_to_cpu(id->hmpre);
3271 		ctrl->hmmin = le32_to_cpu(id->hmmin);
3272 		ctrl->hmminds = le32_to_cpu(id->hmminds);
3273 		ctrl->hmmaxd = le16_to_cpu(id->hmmaxd);
3274 	}
3275 
3276 	ret = nvme_mpath_init_identify(ctrl, id);
3277 	if (ret < 0)
3278 		goto out_free;
3279 
3280 	if (ctrl->apst_enabled && !prev_apst_enabled)
3281 		dev_pm_qos_expose_latency_tolerance(ctrl->device);
3282 	else if (!ctrl->apst_enabled && prev_apst_enabled)
3283 		dev_pm_qos_hide_latency_tolerance(ctrl->device);
3284 
3285 out_free:
3286 	kfree(id);
3287 	return ret;
3288 }
3289 
3290 /*
3291  * Initialize the cached copies of the Identify data and various controller
3292  * register in our nvme_ctrl structure.  This should be called as soon as
3293  * the admin queue is fully up and running.
3294  */
3295 int nvme_init_ctrl_finish(struct nvme_ctrl *ctrl, bool was_suspended)
3296 {
3297 	int ret;
3298 
3299 	ret = ctrl->ops->reg_read32(ctrl, NVME_REG_VS, &ctrl->vs);
3300 	if (ret) {
3301 		dev_err(ctrl->device, "Reading VS failed (%d)\n", ret);
3302 		return ret;
3303 	}
3304 
3305 	ctrl->sqsize = min_t(u16, NVME_CAP_MQES(ctrl->cap), ctrl->sqsize);
3306 
3307 	if (ctrl->vs >= NVME_VS(1, 1, 0))
3308 		ctrl->subsystem = NVME_CAP_NSSRC(ctrl->cap);
3309 
3310 	ret = nvme_init_identify(ctrl);
3311 	if (ret)
3312 		return ret;
3313 
3314 	ret = nvme_configure_apst(ctrl);
3315 	if (ret < 0)
3316 		return ret;
3317 
3318 	ret = nvme_configure_timestamp(ctrl);
3319 	if (ret < 0)
3320 		return ret;
3321 
3322 	ret = nvme_configure_host_options(ctrl);
3323 	if (ret < 0)
3324 		return ret;
3325 
3326 	nvme_configure_opal(ctrl, was_suspended);
3327 
3328 	if (!ctrl->identified && !nvme_discovery_ctrl(ctrl)) {
3329 		/*
3330 		 * Do not return errors unless we are in a controller reset,
3331 		 * the controller works perfectly fine without hwmon.
3332 		 */
3333 		ret = nvme_hwmon_init(ctrl);
3334 		if (ret == -EINTR)
3335 			return ret;
3336 	}
3337 
3338 	ctrl->identified = true;
3339 
3340 	return 0;
3341 }
3342 EXPORT_SYMBOL_GPL(nvme_init_ctrl_finish);
3343 
3344 static int nvme_dev_open(struct inode *inode, struct file *file)
3345 {
3346 	struct nvme_ctrl *ctrl =
3347 		container_of(inode->i_cdev, struct nvme_ctrl, cdev);
3348 
3349 	switch (ctrl->state) {
3350 	case NVME_CTRL_LIVE:
3351 		break;
3352 	default:
3353 		return -EWOULDBLOCK;
3354 	}
3355 
3356 	nvme_get_ctrl(ctrl);
3357 	if (!try_module_get(ctrl->ops->module)) {
3358 		nvme_put_ctrl(ctrl);
3359 		return -EINVAL;
3360 	}
3361 
3362 	file->private_data = ctrl;
3363 	return 0;
3364 }
3365 
3366 static int nvme_dev_release(struct inode *inode, struct file *file)
3367 {
3368 	struct nvme_ctrl *ctrl =
3369 		container_of(inode->i_cdev, struct nvme_ctrl, cdev);
3370 
3371 	module_put(ctrl->ops->module);
3372 	nvme_put_ctrl(ctrl);
3373 	return 0;
3374 }
3375 
3376 static const struct file_operations nvme_dev_fops = {
3377 	.owner		= THIS_MODULE,
3378 	.open		= nvme_dev_open,
3379 	.release	= nvme_dev_release,
3380 	.unlocked_ioctl	= nvme_dev_ioctl,
3381 	.compat_ioctl	= compat_ptr_ioctl,
3382 	.uring_cmd	= nvme_dev_uring_cmd,
3383 };
3384 
3385 static ssize_t nvme_sysfs_reset(struct device *dev,
3386 				struct device_attribute *attr, const char *buf,
3387 				size_t count)
3388 {
3389 	struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
3390 	int ret;
3391 
3392 	ret = nvme_reset_ctrl_sync(ctrl);
3393 	if (ret < 0)
3394 		return ret;
3395 	return count;
3396 }
3397 static DEVICE_ATTR(reset_controller, S_IWUSR, NULL, nvme_sysfs_reset);
3398 
3399 static ssize_t nvme_sysfs_rescan(struct device *dev,
3400 				struct device_attribute *attr, const char *buf,
3401 				size_t count)
3402 {
3403 	struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
3404 
3405 	nvme_queue_scan(ctrl);
3406 	return count;
3407 }
3408 static DEVICE_ATTR(rescan_controller, S_IWUSR, NULL, nvme_sysfs_rescan);
3409 
3410 static inline struct nvme_ns_head *dev_to_ns_head(struct device *dev)
3411 {
3412 	struct gendisk *disk = dev_to_disk(dev);
3413 
3414 	if (disk->fops == &nvme_bdev_ops)
3415 		return nvme_get_ns_from_dev(dev)->head;
3416 	else
3417 		return disk->private_data;
3418 }
3419 
3420 static ssize_t wwid_show(struct device *dev, struct device_attribute *attr,
3421 		char *buf)
3422 {
3423 	struct nvme_ns_head *head = dev_to_ns_head(dev);
3424 	struct nvme_ns_ids *ids = &head->ids;
3425 	struct nvme_subsystem *subsys = head->subsys;
3426 	int serial_len = sizeof(subsys->serial);
3427 	int model_len = sizeof(subsys->model);
3428 
3429 	if (!uuid_is_null(&ids->uuid))
3430 		return sysfs_emit(buf, "uuid.%pU\n", &ids->uuid);
3431 
3432 	if (memchr_inv(ids->nguid, 0, sizeof(ids->nguid)))
3433 		return sysfs_emit(buf, "eui.%16phN\n", ids->nguid);
3434 
3435 	if (memchr_inv(ids->eui64, 0, sizeof(ids->eui64)))
3436 		return sysfs_emit(buf, "eui.%8phN\n", ids->eui64);
3437 
3438 	while (serial_len > 0 && (subsys->serial[serial_len - 1] == ' ' ||
3439 				  subsys->serial[serial_len - 1] == '\0'))
3440 		serial_len--;
3441 	while (model_len > 0 && (subsys->model[model_len - 1] == ' ' ||
3442 				 subsys->model[model_len - 1] == '\0'))
3443 		model_len--;
3444 
3445 	return sysfs_emit(buf, "nvme.%04x-%*phN-%*phN-%08x\n", subsys->vendor_id,
3446 		serial_len, subsys->serial, model_len, subsys->model,
3447 		head->ns_id);
3448 }
3449 static DEVICE_ATTR_RO(wwid);
3450 
3451 static ssize_t nguid_show(struct device *dev, struct device_attribute *attr,
3452 		char *buf)
3453 {
3454 	return sysfs_emit(buf, "%pU\n", dev_to_ns_head(dev)->ids.nguid);
3455 }
3456 static DEVICE_ATTR_RO(nguid);
3457 
3458 static ssize_t uuid_show(struct device *dev, struct device_attribute *attr,
3459 		char *buf)
3460 {
3461 	struct nvme_ns_ids *ids = &dev_to_ns_head(dev)->ids;
3462 
3463 	/* For backward compatibility expose the NGUID to userspace if
3464 	 * we have no UUID set
3465 	 */
3466 	if (uuid_is_null(&ids->uuid)) {
3467 		dev_warn_ratelimited(dev,
3468 			"No UUID available providing old NGUID\n");
3469 		return sysfs_emit(buf, "%pU\n", ids->nguid);
3470 	}
3471 	return sysfs_emit(buf, "%pU\n", &ids->uuid);
3472 }
3473 static DEVICE_ATTR_RO(uuid);
3474 
3475 static ssize_t eui_show(struct device *dev, struct device_attribute *attr,
3476 		char *buf)
3477 {
3478 	return sysfs_emit(buf, "%8ph\n", dev_to_ns_head(dev)->ids.eui64);
3479 }
3480 static DEVICE_ATTR_RO(eui);
3481 
3482 static ssize_t nsid_show(struct device *dev, struct device_attribute *attr,
3483 		char *buf)
3484 {
3485 	return sysfs_emit(buf, "%d\n", dev_to_ns_head(dev)->ns_id);
3486 }
3487 static DEVICE_ATTR_RO(nsid);
3488 
3489 static struct attribute *nvme_ns_id_attrs[] = {
3490 	&dev_attr_wwid.attr,
3491 	&dev_attr_uuid.attr,
3492 	&dev_attr_nguid.attr,
3493 	&dev_attr_eui.attr,
3494 	&dev_attr_nsid.attr,
3495 #ifdef CONFIG_NVME_MULTIPATH
3496 	&dev_attr_ana_grpid.attr,
3497 	&dev_attr_ana_state.attr,
3498 #endif
3499 	NULL,
3500 };
3501 
3502 static umode_t nvme_ns_id_attrs_are_visible(struct kobject *kobj,
3503 		struct attribute *a, int n)
3504 {
3505 	struct device *dev = container_of(kobj, struct device, kobj);
3506 	struct nvme_ns_ids *ids = &dev_to_ns_head(dev)->ids;
3507 
3508 	if (a == &dev_attr_uuid.attr) {
3509 		if (uuid_is_null(&ids->uuid) &&
3510 		    !memchr_inv(ids->nguid, 0, sizeof(ids->nguid)))
3511 			return 0;
3512 	}
3513 	if (a == &dev_attr_nguid.attr) {
3514 		if (!memchr_inv(ids->nguid, 0, sizeof(ids->nguid)))
3515 			return 0;
3516 	}
3517 	if (a == &dev_attr_eui.attr) {
3518 		if (!memchr_inv(ids->eui64, 0, sizeof(ids->eui64)))
3519 			return 0;
3520 	}
3521 #ifdef CONFIG_NVME_MULTIPATH
3522 	if (a == &dev_attr_ana_grpid.attr || a == &dev_attr_ana_state.attr) {
3523 		if (dev_to_disk(dev)->fops != &nvme_bdev_ops) /* per-path attr */
3524 			return 0;
3525 		if (!nvme_ctrl_use_ana(nvme_get_ns_from_dev(dev)->ctrl))
3526 			return 0;
3527 	}
3528 #endif
3529 	return a->mode;
3530 }
3531 
3532 static const struct attribute_group nvme_ns_id_attr_group = {
3533 	.attrs		= nvme_ns_id_attrs,
3534 	.is_visible	= nvme_ns_id_attrs_are_visible,
3535 };
3536 
3537 const struct attribute_group *nvme_ns_id_attr_groups[] = {
3538 	&nvme_ns_id_attr_group,
3539 	NULL,
3540 };
3541 
3542 #define nvme_show_str_function(field)						\
3543 static ssize_t  field##_show(struct device *dev,				\
3544 			    struct device_attribute *attr, char *buf)		\
3545 {										\
3546         struct nvme_ctrl *ctrl = dev_get_drvdata(dev);				\
3547         return sysfs_emit(buf, "%.*s\n",					\
3548 		(int)sizeof(ctrl->subsys->field), ctrl->subsys->field);		\
3549 }										\
3550 static DEVICE_ATTR(field, S_IRUGO, field##_show, NULL);
3551 
3552 nvme_show_str_function(model);
3553 nvme_show_str_function(serial);
3554 nvme_show_str_function(firmware_rev);
3555 
3556 #define nvme_show_int_function(field)						\
3557 static ssize_t  field##_show(struct device *dev,				\
3558 			    struct device_attribute *attr, char *buf)		\
3559 {										\
3560         struct nvme_ctrl *ctrl = dev_get_drvdata(dev);				\
3561         return sysfs_emit(buf, "%d\n", ctrl->field);				\
3562 }										\
3563 static DEVICE_ATTR(field, S_IRUGO, field##_show, NULL);
3564 
3565 nvme_show_int_function(cntlid);
3566 nvme_show_int_function(numa_node);
3567 nvme_show_int_function(queue_count);
3568 nvme_show_int_function(sqsize);
3569 nvme_show_int_function(kato);
3570 
3571 static ssize_t nvme_sysfs_delete(struct device *dev,
3572 				struct device_attribute *attr, const char *buf,
3573 				size_t count)
3574 {
3575 	struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
3576 
3577 	if (device_remove_file_self(dev, attr))
3578 		nvme_delete_ctrl_sync(ctrl);
3579 	return count;
3580 }
3581 static DEVICE_ATTR(delete_controller, S_IWUSR, NULL, nvme_sysfs_delete);
3582 
3583 static ssize_t nvme_sysfs_show_transport(struct device *dev,
3584 					 struct device_attribute *attr,
3585 					 char *buf)
3586 {
3587 	struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
3588 
3589 	return sysfs_emit(buf, "%s\n", ctrl->ops->name);
3590 }
3591 static DEVICE_ATTR(transport, S_IRUGO, nvme_sysfs_show_transport, NULL);
3592 
3593 static ssize_t nvme_sysfs_show_state(struct device *dev,
3594 				     struct device_attribute *attr,
3595 				     char *buf)
3596 {
3597 	struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
3598 	static const char *const state_name[] = {
3599 		[NVME_CTRL_NEW]		= "new",
3600 		[NVME_CTRL_LIVE]	= "live",
3601 		[NVME_CTRL_RESETTING]	= "resetting",
3602 		[NVME_CTRL_CONNECTING]	= "connecting",
3603 		[NVME_CTRL_DELETING]	= "deleting",
3604 		[NVME_CTRL_DELETING_NOIO]= "deleting (no IO)",
3605 		[NVME_CTRL_DEAD]	= "dead",
3606 	};
3607 
3608 	if ((unsigned)ctrl->state < ARRAY_SIZE(state_name) &&
3609 	    state_name[ctrl->state])
3610 		return sysfs_emit(buf, "%s\n", state_name[ctrl->state]);
3611 
3612 	return sysfs_emit(buf, "unknown state\n");
3613 }
3614 
3615 static DEVICE_ATTR(state, S_IRUGO, nvme_sysfs_show_state, NULL);
3616 
3617 static ssize_t nvme_sysfs_show_subsysnqn(struct device *dev,
3618 					 struct device_attribute *attr,
3619 					 char *buf)
3620 {
3621 	struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
3622 
3623 	return sysfs_emit(buf, "%s\n", ctrl->subsys->subnqn);
3624 }
3625 static DEVICE_ATTR(subsysnqn, S_IRUGO, nvme_sysfs_show_subsysnqn, NULL);
3626 
3627 static ssize_t nvme_sysfs_show_hostnqn(struct device *dev,
3628 					struct device_attribute *attr,
3629 					char *buf)
3630 {
3631 	struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
3632 
3633 	return sysfs_emit(buf, "%s\n", ctrl->opts->host->nqn);
3634 }
3635 static DEVICE_ATTR(hostnqn, S_IRUGO, nvme_sysfs_show_hostnqn, NULL);
3636 
3637 static ssize_t nvme_sysfs_show_hostid(struct device *dev,
3638 					struct device_attribute *attr,
3639 					char *buf)
3640 {
3641 	struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
3642 
3643 	return sysfs_emit(buf, "%pU\n", &ctrl->opts->host->id);
3644 }
3645 static DEVICE_ATTR(hostid, S_IRUGO, nvme_sysfs_show_hostid, NULL);
3646 
3647 static ssize_t nvme_sysfs_show_address(struct device *dev,
3648 					 struct device_attribute *attr,
3649 					 char *buf)
3650 {
3651 	struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
3652 
3653 	return ctrl->ops->get_address(ctrl, buf, PAGE_SIZE);
3654 }
3655 static DEVICE_ATTR(address, S_IRUGO, nvme_sysfs_show_address, NULL);
3656 
3657 static ssize_t nvme_ctrl_loss_tmo_show(struct device *dev,
3658 		struct device_attribute *attr, char *buf)
3659 {
3660 	struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
3661 	struct nvmf_ctrl_options *opts = ctrl->opts;
3662 
3663 	if (ctrl->opts->max_reconnects == -1)
3664 		return sysfs_emit(buf, "off\n");
3665 	return sysfs_emit(buf, "%d\n",
3666 			  opts->max_reconnects * opts->reconnect_delay);
3667 }
3668 
3669 static ssize_t nvme_ctrl_loss_tmo_store(struct device *dev,
3670 		struct device_attribute *attr, const char *buf, size_t count)
3671 {
3672 	struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
3673 	struct nvmf_ctrl_options *opts = ctrl->opts;
3674 	int ctrl_loss_tmo, err;
3675 
3676 	err = kstrtoint(buf, 10, &ctrl_loss_tmo);
3677 	if (err)
3678 		return -EINVAL;
3679 
3680 	if (ctrl_loss_tmo < 0)
3681 		opts->max_reconnects = -1;
3682 	else
3683 		opts->max_reconnects = DIV_ROUND_UP(ctrl_loss_tmo,
3684 						opts->reconnect_delay);
3685 	return count;
3686 }
3687 static DEVICE_ATTR(ctrl_loss_tmo, S_IRUGO | S_IWUSR,
3688 	nvme_ctrl_loss_tmo_show, nvme_ctrl_loss_tmo_store);
3689 
3690 static ssize_t nvme_ctrl_reconnect_delay_show(struct device *dev,
3691 		struct device_attribute *attr, char *buf)
3692 {
3693 	struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
3694 
3695 	if (ctrl->opts->reconnect_delay == -1)
3696 		return sysfs_emit(buf, "off\n");
3697 	return sysfs_emit(buf, "%d\n", ctrl->opts->reconnect_delay);
3698 }
3699 
3700 static ssize_t nvme_ctrl_reconnect_delay_store(struct device *dev,
3701 		struct device_attribute *attr, const char *buf, size_t count)
3702 {
3703 	struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
3704 	unsigned int v;
3705 	int err;
3706 
3707 	err = kstrtou32(buf, 10, &v);
3708 	if (err)
3709 		return err;
3710 
3711 	ctrl->opts->reconnect_delay = v;
3712 	return count;
3713 }
3714 static DEVICE_ATTR(reconnect_delay, S_IRUGO | S_IWUSR,
3715 	nvme_ctrl_reconnect_delay_show, nvme_ctrl_reconnect_delay_store);
3716 
3717 static ssize_t nvme_ctrl_fast_io_fail_tmo_show(struct device *dev,
3718 		struct device_attribute *attr, char *buf)
3719 {
3720 	struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
3721 
3722 	if (ctrl->opts->fast_io_fail_tmo == -1)
3723 		return sysfs_emit(buf, "off\n");
3724 	return sysfs_emit(buf, "%d\n", ctrl->opts->fast_io_fail_tmo);
3725 }
3726 
3727 static ssize_t nvme_ctrl_fast_io_fail_tmo_store(struct device *dev,
3728 		struct device_attribute *attr, const char *buf, size_t count)
3729 {
3730 	struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
3731 	struct nvmf_ctrl_options *opts = ctrl->opts;
3732 	int fast_io_fail_tmo, err;
3733 
3734 	err = kstrtoint(buf, 10, &fast_io_fail_tmo);
3735 	if (err)
3736 		return -EINVAL;
3737 
3738 	if (fast_io_fail_tmo < 0)
3739 		opts->fast_io_fail_tmo = -1;
3740 	else
3741 		opts->fast_io_fail_tmo = fast_io_fail_tmo;
3742 	return count;
3743 }
3744 static DEVICE_ATTR(fast_io_fail_tmo, S_IRUGO | S_IWUSR,
3745 	nvme_ctrl_fast_io_fail_tmo_show, nvme_ctrl_fast_io_fail_tmo_store);
3746 
3747 static ssize_t cntrltype_show(struct device *dev,
3748 			      struct device_attribute *attr, char *buf)
3749 {
3750 	static const char * const type[] = {
3751 		[NVME_CTRL_IO] = "io\n",
3752 		[NVME_CTRL_DISC] = "discovery\n",
3753 		[NVME_CTRL_ADMIN] = "admin\n",
3754 	};
3755 	struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
3756 
3757 	if (ctrl->cntrltype > NVME_CTRL_ADMIN || !type[ctrl->cntrltype])
3758 		return sysfs_emit(buf, "reserved\n");
3759 
3760 	return sysfs_emit(buf, type[ctrl->cntrltype]);
3761 }
3762 static DEVICE_ATTR_RO(cntrltype);
3763 
3764 static ssize_t dctype_show(struct device *dev,
3765 			   struct device_attribute *attr, char *buf)
3766 {
3767 	static const char * const type[] = {
3768 		[NVME_DCTYPE_NOT_REPORTED] = "none\n",
3769 		[NVME_DCTYPE_DDC] = "ddc\n",
3770 		[NVME_DCTYPE_CDC] = "cdc\n",
3771 	};
3772 	struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
3773 
3774 	if (ctrl->dctype > NVME_DCTYPE_CDC || !type[ctrl->dctype])
3775 		return sysfs_emit(buf, "reserved\n");
3776 
3777 	return sysfs_emit(buf, type[ctrl->dctype]);
3778 }
3779 static DEVICE_ATTR_RO(dctype);
3780 
3781 #ifdef CONFIG_NVME_AUTH
3782 static ssize_t nvme_ctrl_dhchap_secret_show(struct device *dev,
3783 		struct device_attribute *attr, char *buf)
3784 {
3785 	struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
3786 	struct nvmf_ctrl_options *opts = ctrl->opts;
3787 
3788 	if (!opts->dhchap_secret)
3789 		return sysfs_emit(buf, "none\n");
3790 	return sysfs_emit(buf, "%s\n", opts->dhchap_secret);
3791 }
3792 
3793 static ssize_t nvme_ctrl_dhchap_secret_store(struct device *dev,
3794 		struct device_attribute *attr, const char *buf, size_t count)
3795 {
3796 	struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
3797 	struct nvmf_ctrl_options *opts = ctrl->opts;
3798 	char *dhchap_secret;
3799 
3800 	if (!ctrl->opts->dhchap_secret)
3801 		return -EINVAL;
3802 	if (count < 7)
3803 		return -EINVAL;
3804 	if (memcmp(buf, "DHHC-1:", 7))
3805 		return -EINVAL;
3806 
3807 	dhchap_secret = kzalloc(count + 1, GFP_KERNEL);
3808 	if (!dhchap_secret)
3809 		return -ENOMEM;
3810 	memcpy(dhchap_secret, buf, count);
3811 	nvme_auth_stop(ctrl);
3812 	if (strcmp(dhchap_secret, opts->dhchap_secret)) {
3813 		struct nvme_dhchap_key *key, *host_key;
3814 		int ret;
3815 
3816 		ret = nvme_auth_generate_key(dhchap_secret, &key);
3817 		if (ret)
3818 			return ret;
3819 		kfree(opts->dhchap_secret);
3820 		opts->dhchap_secret = dhchap_secret;
3821 		host_key = ctrl->host_key;
3822 		mutex_lock(&ctrl->dhchap_auth_mutex);
3823 		ctrl->host_key = key;
3824 		mutex_unlock(&ctrl->dhchap_auth_mutex);
3825 		nvme_auth_free_key(host_key);
3826 	}
3827 	/* Start re-authentication */
3828 	dev_info(ctrl->device, "re-authenticating controller\n");
3829 	queue_work(nvme_wq, &ctrl->dhchap_auth_work);
3830 
3831 	return count;
3832 }
3833 static DEVICE_ATTR(dhchap_secret, S_IRUGO | S_IWUSR,
3834 	nvme_ctrl_dhchap_secret_show, nvme_ctrl_dhchap_secret_store);
3835 
3836 static ssize_t nvme_ctrl_dhchap_ctrl_secret_show(struct device *dev,
3837 		struct device_attribute *attr, char *buf)
3838 {
3839 	struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
3840 	struct nvmf_ctrl_options *opts = ctrl->opts;
3841 
3842 	if (!opts->dhchap_ctrl_secret)
3843 		return sysfs_emit(buf, "none\n");
3844 	return sysfs_emit(buf, "%s\n", opts->dhchap_ctrl_secret);
3845 }
3846 
3847 static ssize_t nvme_ctrl_dhchap_ctrl_secret_store(struct device *dev,
3848 		struct device_attribute *attr, const char *buf, size_t count)
3849 {
3850 	struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
3851 	struct nvmf_ctrl_options *opts = ctrl->opts;
3852 	char *dhchap_secret;
3853 
3854 	if (!ctrl->opts->dhchap_ctrl_secret)
3855 		return -EINVAL;
3856 	if (count < 7)
3857 		return -EINVAL;
3858 	if (memcmp(buf, "DHHC-1:", 7))
3859 		return -EINVAL;
3860 
3861 	dhchap_secret = kzalloc(count + 1, GFP_KERNEL);
3862 	if (!dhchap_secret)
3863 		return -ENOMEM;
3864 	memcpy(dhchap_secret, buf, count);
3865 	nvme_auth_stop(ctrl);
3866 	if (strcmp(dhchap_secret, opts->dhchap_ctrl_secret)) {
3867 		struct nvme_dhchap_key *key, *ctrl_key;
3868 		int ret;
3869 
3870 		ret = nvme_auth_generate_key(dhchap_secret, &key);
3871 		if (ret)
3872 			return ret;
3873 		kfree(opts->dhchap_ctrl_secret);
3874 		opts->dhchap_ctrl_secret = dhchap_secret;
3875 		ctrl_key = ctrl->ctrl_key;
3876 		mutex_lock(&ctrl->dhchap_auth_mutex);
3877 		ctrl->ctrl_key = key;
3878 		mutex_unlock(&ctrl->dhchap_auth_mutex);
3879 		nvme_auth_free_key(ctrl_key);
3880 	}
3881 	/* Start re-authentication */
3882 	dev_info(ctrl->device, "re-authenticating controller\n");
3883 	queue_work(nvme_wq, &ctrl->dhchap_auth_work);
3884 
3885 	return count;
3886 }
3887 static DEVICE_ATTR(dhchap_ctrl_secret, S_IRUGO | S_IWUSR,
3888 	nvme_ctrl_dhchap_ctrl_secret_show, nvme_ctrl_dhchap_ctrl_secret_store);
3889 #endif
3890 
3891 static struct attribute *nvme_dev_attrs[] = {
3892 	&dev_attr_reset_controller.attr,
3893 	&dev_attr_rescan_controller.attr,
3894 	&dev_attr_model.attr,
3895 	&dev_attr_serial.attr,
3896 	&dev_attr_firmware_rev.attr,
3897 	&dev_attr_cntlid.attr,
3898 	&dev_attr_delete_controller.attr,
3899 	&dev_attr_transport.attr,
3900 	&dev_attr_subsysnqn.attr,
3901 	&dev_attr_address.attr,
3902 	&dev_attr_state.attr,
3903 	&dev_attr_numa_node.attr,
3904 	&dev_attr_queue_count.attr,
3905 	&dev_attr_sqsize.attr,
3906 	&dev_attr_hostnqn.attr,
3907 	&dev_attr_hostid.attr,
3908 	&dev_attr_ctrl_loss_tmo.attr,
3909 	&dev_attr_reconnect_delay.attr,
3910 	&dev_attr_fast_io_fail_tmo.attr,
3911 	&dev_attr_kato.attr,
3912 	&dev_attr_cntrltype.attr,
3913 	&dev_attr_dctype.attr,
3914 #ifdef CONFIG_NVME_AUTH
3915 	&dev_attr_dhchap_secret.attr,
3916 	&dev_attr_dhchap_ctrl_secret.attr,
3917 #endif
3918 	NULL
3919 };
3920 
3921 static umode_t nvme_dev_attrs_are_visible(struct kobject *kobj,
3922 		struct attribute *a, int n)
3923 {
3924 	struct device *dev = container_of(kobj, struct device, kobj);
3925 	struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
3926 
3927 	if (a == &dev_attr_delete_controller.attr && !ctrl->ops->delete_ctrl)
3928 		return 0;
3929 	if (a == &dev_attr_address.attr && !ctrl->ops->get_address)
3930 		return 0;
3931 	if (a == &dev_attr_hostnqn.attr && !ctrl->opts)
3932 		return 0;
3933 	if (a == &dev_attr_hostid.attr && !ctrl->opts)
3934 		return 0;
3935 	if (a == &dev_attr_ctrl_loss_tmo.attr && !ctrl->opts)
3936 		return 0;
3937 	if (a == &dev_attr_reconnect_delay.attr && !ctrl->opts)
3938 		return 0;
3939 	if (a == &dev_attr_fast_io_fail_tmo.attr && !ctrl->opts)
3940 		return 0;
3941 #ifdef CONFIG_NVME_AUTH
3942 	if (a == &dev_attr_dhchap_secret.attr && !ctrl->opts)
3943 		return 0;
3944 	if (a == &dev_attr_dhchap_ctrl_secret.attr && !ctrl->opts)
3945 		return 0;
3946 #endif
3947 
3948 	return a->mode;
3949 }
3950 
3951 const struct attribute_group nvme_dev_attrs_group = {
3952 	.attrs		= nvme_dev_attrs,
3953 	.is_visible	= nvme_dev_attrs_are_visible,
3954 };
3955 EXPORT_SYMBOL_GPL(nvme_dev_attrs_group);
3956 
3957 static const struct attribute_group *nvme_dev_attr_groups[] = {
3958 	&nvme_dev_attrs_group,
3959 	NULL,
3960 };
3961 
3962 static struct nvme_ns_head *nvme_find_ns_head(struct nvme_ctrl *ctrl,
3963 		unsigned nsid)
3964 {
3965 	struct nvme_ns_head *h;
3966 
3967 	lockdep_assert_held(&ctrl->subsys->lock);
3968 
3969 	list_for_each_entry(h, &ctrl->subsys->nsheads, entry) {
3970 		/*
3971 		 * Private namespaces can share NSIDs under some conditions.
3972 		 * In that case we can't use the same ns_head for namespaces
3973 		 * with the same NSID.
3974 		 */
3975 		if (h->ns_id != nsid || !nvme_is_unique_nsid(ctrl, h))
3976 			continue;
3977 		if (!list_empty(&h->list) && nvme_tryget_ns_head(h))
3978 			return h;
3979 	}
3980 
3981 	return NULL;
3982 }
3983 
3984 static int nvme_subsys_check_duplicate_ids(struct nvme_subsystem *subsys,
3985 		struct nvme_ns_ids *ids)
3986 {
3987 	bool has_uuid = !uuid_is_null(&ids->uuid);
3988 	bool has_nguid = memchr_inv(ids->nguid, 0, sizeof(ids->nguid));
3989 	bool has_eui64 = memchr_inv(ids->eui64, 0, sizeof(ids->eui64));
3990 	struct nvme_ns_head *h;
3991 
3992 	lockdep_assert_held(&subsys->lock);
3993 
3994 	list_for_each_entry(h, &subsys->nsheads, entry) {
3995 		if (has_uuid && uuid_equal(&ids->uuid, &h->ids.uuid))
3996 			return -EINVAL;
3997 		if (has_nguid &&
3998 		    memcmp(&ids->nguid, &h->ids.nguid, sizeof(ids->nguid)) == 0)
3999 			return -EINVAL;
4000 		if (has_eui64 &&
4001 		    memcmp(&ids->eui64, &h->ids.eui64, sizeof(ids->eui64)) == 0)
4002 			return -EINVAL;
4003 	}
4004 
4005 	return 0;
4006 }
4007 
4008 static void nvme_cdev_rel(struct device *dev)
4009 {
4010 	ida_free(&nvme_ns_chr_minor_ida, MINOR(dev->devt));
4011 }
4012 
4013 void nvme_cdev_del(struct cdev *cdev, struct device *cdev_device)
4014 {
4015 	cdev_device_del(cdev, cdev_device);
4016 	put_device(cdev_device);
4017 }
4018 
4019 int nvme_cdev_add(struct cdev *cdev, struct device *cdev_device,
4020 		const struct file_operations *fops, struct module *owner)
4021 {
4022 	int minor, ret;
4023 
4024 	minor = ida_alloc(&nvme_ns_chr_minor_ida, GFP_KERNEL);
4025 	if (minor < 0)
4026 		return minor;
4027 	cdev_device->devt = MKDEV(MAJOR(nvme_ns_chr_devt), minor);
4028 	cdev_device->class = nvme_ns_chr_class;
4029 	cdev_device->release = nvme_cdev_rel;
4030 	device_initialize(cdev_device);
4031 	cdev_init(cdev, fops);
4032 	cdev->owner = owner;
4033 	ret = cdev_device_add(cdev, cdev_device);
4034 	if (ret)
4035 		put_device(cdev_device);
4036 
4037 	return ret;
4038 }
4039 
4040 static int nvme_ns_chr_open(struct inode *inode, struct file *file)
4041 {
4042 	return nvme_ns_open(container_of(inode->i_cdev, struct nvme_ns, cdev));
4043 }
4044 
4045 static int nvme_ns_chr_release(struct inode *inode, struct file *file)
4046 {
4047 	nvme_ns_release(container_of(inode->i_cdev, struct nvme_ns, cdev));
4048 	return 0;
4049 }
4050 
4051 static const struct file_operations nvme_ns_chr_fops = {
4052 	.owner		= THIS_MODULE,
4053 	.open		= nvme_ns_chr_open,
4054 	.release	= nvme_ns_chr_release,
4055 	.unlocked_ioctl	= nvme_ns_chr_ioctl,
4056 	.compat_ioctl	= compat_ptr_ioctl,
4057 	.uring_cmd	= nvme_ns_chr_uring_cmd,
4058 	.uring_cmd_iopoll = nvme_ns_chr_uring_cmd_iopoll,
4059 };
4060 
4061 static int nvme_add_ns_cdev(struct nvme_ns *ns)
4062 {
4063 	int ret;
4064 
4065 	ns->cdev_device.parent = ns->ctrl->device;
4066 	ret = dev_set_name(&ns->cdev_device, "ng%dn%d",
4067 			   ns->ctrl->instance, ns->head->instance);
4068 	if (ret)
4069 		return ret;
4070 
4071 	return nvme_cdev_add(&ns->cdev, &ns->cdev_device, &nvme_ns_chr_fops,
4072 			     ns->ctrl->ops->module);
4073 }
4074 
4075 static struct nvme_ns_head *nvme_alloc_ns_head(struct nvme_ctrl *ctrl,
4076 		struct nvme_ns_info *info)
4077 {
4078 	struct nvme_ns_head *head;
4079 	size_t size = sizeof(*head);
4080 	int ret = -ENOMEM;
4081 
4082 #ifdef CONFIG_NVME_MULTIPATH
4083 	size += num_possible_nodes() * sizeof(struct nvme_ns *);
4084 #endif
4085 
4086 	head = kzalloc(size, GFP_KERNEL);
4087 	if (!head)
4088 		goto out;
4089 	ret = ida_alloc_min(&ctrl->subsys->ns_ida, 1, GFP_KERNEL);
4090 	if (ret < 0)
4091 		goto out_free_head;
4092 	head->instance = ret;
4093 	INIT_LIST_HEAD(&head->list);
4094 	ret = init_srcu_struct(&head->srcu);
4095 	if (ret)
4096 		goto out_ida_remove;
4097 	head->subsys = ctrl->subsys;
4098 	head->ns_id = info->nsid;
4099 	head->ids = info->ids;
4100 	head->shared = info->is_shared;
4101 	kref_init(&head->ref);
4102 
4103 	if (head->ids.csi) {
4104 		ret = nvme_get_effects_log(ctrl, head->ids.csi, &head->effects);
4105 		if (ret)
4106 			goto out_cleanup_srcu;
4107 	} else
4108 		head->effects = ctrl->effects;
4109 
4110 	ret = nvme_mpath_alloc_disk(ctrl, head);
4111 	if (ret)
4112 		goto out_cleanup_srcu;
4113 
4114 	list_add_tail(&head->entry, &ctrl->subsys->nsheads);
4115 
4116 	kref_get(&ctrl->subsys->ref);
4117 
4118 	return head;
4119 out_cleanup_srcu:
4120 	cleanup_srcu_struct(&head->srcu);
4121 out_ida_remove:
4122 	ida_free(&ctrl->subsys->ns_ida, head->instance);
4123 out_free_head:
4124 	kfree(head);
4125 out:
4126 	if (ret > 0)
4127 		ret = blk_status_to_errno(nvme_error_status(ret));
4128 	return ERR_PTR(ret);
4129 }
4130 
4131 static int nvme_global_check_duplicate_ids(struct nvme_subsystem *this,
4132 		struct nvme_ns_ids *ids)
4133 {
4134 	struct nvme_subsystem *s;
4135 	int ret = 0;
4136 
4137 	/*
4138 	 * Note that this check is racy as we try to avoid holding the global
4139 	 * lock over the whole ns_head creation.  But it is only intended as
4140 	 * a sanity check anyway.
4141 	 */
4142 	mutex_lock(&nvme_subsystems_lock);
4143 	list_for_each_entry(s, &nvme_subsystems, entry) {
4144 		if (s == this)
4145 			continue;
4146 		mutex_lock(&s->lock);
4147 		ret = nvme_subsys_check_duplicate_ids(s, ids);
4148 		mutex_unlock(&s->lock);
4149 		if (ret)
4150 			break;
4151 	}
4152 	mutex_unlock(&nvme_subsystems_lock);
4153 
4154 	return ret;
4155 }
4156 
4157 static int nvme_init_ns_head(struct nvme_ns *ns, struct nvme_ns_info *info)
4158 {
4159 	struct nvme_ctrl *ctrl = ns->ctrl;
4160 	struct nvme_ns_head *head = NULL;
4161 	int ret;
4162 
4163 	ret = nvme_global_check_duplicate_ids(ctrl->subsys, &info->ids);
4164 	if (ret) {
4165 		dev_err(ctrl->device,
4166 			"globally duplicate IDs for nsid %d\n", info->nsid);
4167 		nvme_print_device_info(ctrl);
4168 		return ret;
4169 	}
4170 
4171 	mutex_lock(&ctrl->subsys->lock);
4172 	head = nvme_find_ns_head(ctrl, info->nsid);
4173 	if (!head) {
4174 		ret = nvme_subsys_check_duplicate_ids(ctrl->subsys, &info->ids);
4175 		if (ret) {
4176 			dev_err(ctrl->device,
4177 				"duplicate IDs in subsystem for nsid %d\n",
4178 				info->nsid);
4179 			goto out_unlock;
4180 		}
4181 		head = nvme_alloc_ns_head(ctrl, info);
4182 		if (IS_ERR(head)) {
4183 			ret = PTR_ERR(head);
4184 			goto out_unlock;
4185 		}
4186 	} else {
4187 		ret = -EINVAL;
4188 		if (!info->is_shared || !head->shared) {
4189 			dev_err(ctrl->device,
4190 				"Duplicate unshared namespace %d\n",
4191 				info->nsid);
4192 			goto out_put_ns_head;
4193 		}
4194 		if (!nvme_ns_ids_equal(&head->ids, &info->ids)) {
4195 			dev_err(ctrl->device,
4196 				"IDs don't match for shared namespace %d\n",
4197 					info->nsid);
4198 			goto out_put_ns_head;
4199 		}
4200 
4201 		if (!multipath && !list_empty(&head->list)) {
4202 			dev_warn(ctrl->device,
4203 				"Found shared namespace %d, but multipathing not supported.\n",
4204 				info->nsid);
4205 			dev_warn_once(ctrl->device,
4206 				"Support for shared namespaces without CONFIG_NVME_MULTIPATH is deprecated and will be removed in Linux 6.0\n.");
4207 		}
4208 	}
4209 
4210 	list_add_tail_rcu(&ns->siblings, &head->list);
4211 	ns->head = head;
4212 	mutex_unlock(&ctrl->subsys->lock);
4213 	return 0;
4214 
4215 out_put_ns_head:
4216 	nvme_put_ns_head(head);
4217 out_unlock:
4218 	mutex_unlock(&ctrl->subsys->lock);
4219 	return ret;
4220 }
4221 
4222 struct nvme_ns *nvme_find_get_ns(struct nvme_ctrl *ctrl, unsigned nsid)
4223 {
4224 	struct nvme_ns *ns, *ret = NULL;
4225 
4226 	down_read(&ctrl->namespaces_rwsem);
4227 	list_for_each_entry(ns, &ctrl->namespaces, list) {
4228 		if (ns->head->ns_id == nsid) {
4229 			if (!nvme_get_ns(ns))
4230 				continue;
4231 			ret = ns;
4232 			break;
4233 		}
4234 		if (ns->head->ns_id > nsid)
4235 			break;
4236 	}
4237 	up_read(&ctrl->namespaces_rwsem);
4238 	return ret;
4239 }
4240 EXPORT_SYMBOL_NS_GPL(nvme_find_get_ns, NVME_TARGET_PASSTHRU);
4241 
4242 /*
4243  * Add the namespace to the controller list while keeping the list ordered.
4244  */
4245 static void nvme_ns_add_to_ctrl_list(struct nvme_ns *ns)
4246 {
4247 	struct nvme_ns *tmp;
4248 
4249 	list_for_each_entry_reverse(tmp, &ns->ctrl->namespaces, list) {
4250 		if (tmp->head->ns_id < ns->head->ns_id) {
4251 			list_add(&ns->list, &tmp->list);
4252 			return;
4253 		}
4254 	}
4255 	list_add(&ns->list, &ns->ctrl->namespaces);
4256 }
4257 
4258 static void nvme_alloc_ns(struct nvme_ctrl *ctrl, struct nvme_ns_info *info)
4259 {
4260 	struct nvme_ns *ns;
4261 	struct gendisk *disk;
4262 	int node = ctrl->numa_node;
4263 
4264 	ns = kzalloc_node(sizeof(*ns), GFP_KERNEL, node);
4265 	if (!ns)
4266 		return;
4267 
4268 	disk = blk_mq_alloc_disk(ctrl->tagset, ns);
4269 	if (IS_ERR(disk))
4270 		goto out_free_ns;
4271 	disk->fops = &nvme_bdev_ops;
4272 	disk->private_data = ns;
4273 
4274 	ns->disk = disk;
4275 	ns->queue = disk->queue;
4276 
4277 	if (ctrl->opts && ctrl->opts->data_digest)
4278 		blk_queue_flag_set(QUEUE_FLAG_STABLE_WRITES, ns->queue);
4279 
4280 	blk_queue_flag_set(QUEUE_FLAG_NONROT, ns->queue);
4281 	if (ctrl->ops->supports_pci_p2pdma &&
4282 	    ctrl->ops->supports_pci_p2pdma(ctrl))
4283 		blk_queue_flag_set(QUEUE_FLAG_PCI_P2PDMA, ns->queue);
4284 
4285 	ns->ctrl = ctrl;
4286 	kref_init(&ns->kref);
4287 
4288 	if (nvme_init_ns_head(ns, info))
4289 		goto out_cleanup_disk;
4290 
4291 	/*
4292 	 * If multipathing is enabled, the device name for all disks and not
4293 	 * just those that represent shared namespaces needs to be based on the
4294 	 * subsystem instance.  Using the controller instance for private
4295 	 * namespaces could lead to naming collisions between shared and private
4296 	 * namespaces if they don't use a common numbering scheme.
4297 	 *
4298 	 * If multipathing is not enabled, disk names must use the controller
4299 	 * instance as shared namespaces will show up as multiple block
4300 	 * devices.
4301 	 */
4302 	if (ns->head->disk) {
4303 		sprintf(disk->disk_name, "nvme%dc%dn%d", ctrl->subsys->instance,
4304 			ctrl->instance, ns->head->instance);
4305 		disk->flags |= GENHD_FL_HIDDEN;
4306 	} else if (multipath) {
4307 		sprintf(disk->disk_name, "nvme%dn%d", ctrl->subsys->instance,
4308 			ns->head->instance);
4309 	} else {
4310 		sprintf(disk->disk_name, "nvme%dn%d", ctrl->instance,
4311 			ns->head->instance);
4312 	}
4313 
4314 	if (nvme_update_ns_info(ns, info))
4315 		goto out_unlink_ns;
4316 
4317 	down_write(&ctrl->namespaces_rwsem);
4318 	nvme_ns_add_to_ctrl_list(ns);
4319 	up_write(&ctrl->namespaces_rwsem);
4320 	nvme_get_ctrl(ctrl);
4321 
4322 	if (device_add_disk(ctrl->device, ns->disk, nvme_ns_id_attr_groups))
4323 		goto out_cleanup_ns_from_list;
4324 
4325 	if (!nvme_ns_head_multipath(ns->head))
4326 		nvme_add_ns_cdev(ns);
4327 
4328 	nvme_mpath_add_disk(ns, info->anagrpid);
4329 	nvme_fault_inject_init(&ns->fault_inject, ns->disk->disk_name);
4330 
4331 	return;
4332 
4333  out_cleanup_ns_from_list:
4334 	nvme_put_ctrl(ctrl);
4335 	down_write(&ctrl->namespaces_rwsem);
4336 	list_del_init(&ns->list);
4337 	up_write(&ctrl->namespaces_rwsem);
4338  out_unlink_ns:
4339 	mutex_lock(&ctrl->subsys->lock);
4340 	list_del_rcu(&ns->siblings);
4341 	if (list_empty(&ns->head->list))
4342 		list_del_init(&ns->head->entry);
4343 	mutex_unlock(&ctrl->subsys->lock);
4344 	nvme_put_ns_head(ns->head);
4345  out_cleanup_disk:
4346 	put_disk(disk);
4347  out_free_ns:
4348 	kfree(ns);
4349 }
4350 
4351 static void nvme_ns_remove(struct nvme_ns *ns)
4352 {
4353 	bool last_path = false;
4354 
4355 	if (test_and_set_bit(NVME_NS_REMOVING, &ns->flags))
4356 		return;
4357 
4358 	clear_bit(NVME_NS_READY, &ns->flags);
4359 	set_capacity(ns->disk, 0);
4360 	nvme_fault_inject_fini(&ns->fault_inject);
4361 
4362 	/*
4363 	 * Ensure that !NVME_NS_READY is seen by other threads to prevent
4364 	 * this ns going back into current_path.
4365 	 */
4366 	synchronize_srcu(&ns->head->srcu);
4367 
4368 	/* wait for concurrent submissions */
4369 	if (nvme_mpath_clear_current_path(ns))
4370 		synchronize_srcu(&ns->head->srcu);
4371 
4372 	mutex_lock(&ns->ctrl->subsys->lock);
4373 	list_del_rcu(&ns->siblings);
4374 	if (list_empty(&ns->head->list)) {
4375 		list_del_init(&ns->head->entry);
4376 		last_path = true;
4377 	}
4378 	mutex_unlock(&ns->ctrl->subsys->lock);
4379 
4380 	/* guarantee not available in head->list */
4381 	synchronize_srcu(&ns->head->srcu);
4382 
4383 	if (!nvme_ns_head_multipath(ns->head))
4384 		nvme_cdev_del(&ns->cdev, &ns->cdev_device);
4385 	del_gendisk(ns->disk);
4386 
4387 	down_write(&ns->ctrl->namespaces_rwsem);
4388 	list_del_init(&ns->list);
4389 	up_write(&ns->ctrl->namespaces_rwsem);
4390 
4391 	if (last_path)
4392 		nvme_mpath_shutdown_disk(ns->head);
4393 	nvme_put_ns(ns);
4394 }
4395 
4396 static void nvme_ns_remove_by_nsid(struct nvme_ctrl *ctrl, u32 nsid)
4397 {
4398 	struct nvme_ns *ns = nvme_find_get_ns(ctrl, nsid);
4399 
4400 	if (ns) {
4401 		nvme_ns_remove(ns);
4402 		nvme_put_ns(ns);
4403 	}
4404 }
4405 
4406 static void nvme_validate_ns(struct nvme_ns *ns, struct nvme_ns_info *info)
4407 {
4408 	int ret = NVME_SC_INVALID_NS | NVME_SC_DNR;
4409 
4410 	if (!nvme_ns_ids_equal(&ns->head->ids, &info->ids)) {
4411 		dev_err(ns->ctrl->device,
4412 			"identifiers changed for nsid %d\n", ns->head->ns_id);
4413 		goto out;
4414 	}
4415 
4416 	ret = nvme_update_ns_info(ns, info);
4417 out:
4418 	/*
4419 	 * Only remove the namespace if we got a fatal error back from the
4420 	 * device, otherwise ignore the error and just move on.
4421 	 *
4422 	 * TODO: we should probably schedule a delayed retry here.
4423 	 */
4424 	if (ret > 0 && (ret & NVME_SC_DNR))
4425 		nvme_ns_remove(ns);
4426 }
4427 
4428 static void nvme_scan_ns(struct nvme_ctrl *ctrl, unsigned nsid)
4429 {
4430 	struct nvme_ns_info info = { .nsid = nsid };
4431 	struct nvme_ns *ns;
4432 
4433 	if (nvme_identify_ns_descs(ctrl, &info))
4434 		return;
4435 
4436 	if (info.ids.csi != NVME_CSI_NVM && !nvme_multi_css(ctrl)) {
4437 		dev_warn(ctrl->device,
4438 			"command set not reported for nsid: %d\n", nsid);
4439 		return;
4440 	}
4441 
4442 	/*
4443 	 * If available try to use the Command Set Idependent Identify Namespace
4444 	 * data structure to find all the generic information that is needed to
4445 	 * set up a namespace.  If not fall back to the legacy version.
4446 	 */
4447 	if ((ctrl->cap & NVME_CAP_CRMS_CRIMS) ||
4448 	    (info.ids.csi != NVME_CSI_NVM && info.ids.csi != NVME_CSI_ZNS)) {
4449 		if (nvme_ns_info_from_id_cs_indep(ctrl, &info))
4450 			return;
4451 	} else {
4452 		if (nvme_ns_info_from_identify(ctrl, &info))
4453 			return;
4454 	}
4455 
4456 	/*
4457 	 * Ignore the namespace if it is not ready. We will get an AEN once it
4458 	 * becomes ready and restart the scan.
4459 	 */
4460 	if (!info.is_ready)
4461 		return;
4462 
4463 	ns = nvme_find_get_ns(ctrl, nsid);
4464 	if (ns) {
4465 		nvme_validate_ns(ns, &info);
4466 		nvme_put_ns(ns);
4467 	} else {
4468 		nvme_alloc_ns(ctrl, &info);
4469 	}
4470 }
4471 
4472 static void nvme_remove_invalid_namespaces(struct nvme_ctrl *ctrl,
4473 					unsigned nsid)
4474 {
4475 	struct nvme_ns *ns, *next;
4476 	LIST_HEAD(rm_list);
4477 
4478 	down_write(&ctrl->namespaces_rwsem);
4479 	list_for_each_entry_safe(ns, next, &ctrl->namespaces, list) {
4480 		if (ns->head->ns_id > nsid)
4481 			list_move_tail(&ns->list, &rm_list);
4482 	}
4483 	up_write(&ctrl->namespaces_rwsem);
4484 
4485 	list_for_each_entry_safe(ns, next, &rm_list, list)
4486 		nvme_ns_remove(ns);
4487 
4488 }
4489 
4490 static int nvme_scan_ns_list(struct nvme_ctrl *ctrl)
4491 {
4492 	const int nr_entries = NVME_IDENTIFY_DATA_SIZE / sizeof(__le32);
4493 	__le32 *ns_list;
4494 	u32 prev = 0;
4495 	int ret = 0, i;
4496 
4497 	ns_list = kzalloc(NVME_IDENTIFY_DATA_SIZE, GFP_KERNEL);
4498 	if (!ns_list)
4499 		return -ENOMEM;
4500 
4501 	for (;;) {
4502 		struct nvme_command cmd = {
4503 			.identify.opcode	= nvme_admin_identify,
4504 			.identify.cns		= NVME_ID_CNS_NS_ACTIVE_LIST,
4505 			.identify.nsid		= cpu_to_le32(prev),
4506 		};
4507 
4508 		ret = nvme_submit_sync_cmd(ctrl->admin_q, &cmd, ns_list,
4509 					    NVME_IDENTIFY_DATA_SIZE);
4510 		if (ret) {
4511 			dev_warn(ctrl->device,
4512 				"Identify NS List failed (status=0x%x)\n", ret);
4513 			goto free;
4514 		}
4515 
4516 		for (i = 0; i < nr_entries; i++) {
4517 			u32 nsid = le32_to_cpu(ns_list[i]);
4518 
4519 			if (!nsid)	/* end of the list? */
4520 				goto out;
4521 			nvme_scan_ns(ctrl, nsid);
4522 			while (++prev < nsid)
4523 				nvme_ns_remove_by_nsid(ctrl, prev);
4524 		}
4525 	}
4526  out:
4527 	nvme_remove_invalid_namespaces(ctrl, prev);
4528  free:
4529 	kfree(ns_list);
4530 	return ret;
4531 }
4532 
4533 static void nvme_scan_ns_sequential(struct nvme_ctrl *ctrl)
4534 {
4535 	struct nvme_id_ctrl *id;
4536 	u32 nn, i;
4537 
4538 	if (nvme_identify_ctrl(ctrl, &id))
4539 		return;
4540 	nn = le32_to_cpu(id->nn);
4541 	kfree(id);
4542 
4543 	for (i = 1; i <= nn; i++)
4544 		nvme_scan_ns(ctrl, i);
4545 
4546 	nvme_remove_invalid_namespaces(ctrl, nn);
4547 }
4548 
4549 static void nvme_clear_changed_ns_log(struct nvme_ctrl *ctrl)
4550 {
4551 	size_t log_size = NVME_MAX_CHANGED_NAMESPACES * sizeof(__le32);
4552 	__le32 *log;
4553 	int error;
4554 
4555 	log = kzalloc(log_size, GFP_KERNEL);
4556 	if (!log)
4557 		return;
4558 
4559 	/*
4560 	 * We need to read the log to clear the AEN, but we don't want to rely
4561 	 * on it for the changed namespace information as userspace could have
4562 	 * raced with us in reading the log page, which could cause us to miss
4563 	 * updates.
4564 	 */
4565 	error = nvme_get_log(ctrl, NVME_NSID_ALL, NVME_LOG_CHANGED_NS, 0,
4566 			NVME_CSI_NVM, log, log_size, 0);
4567 	if (error)
4568 		dev_warn(ctrl->device,
4569 			"reading changed ns log failed: %d\n", error);
4570 
4571 	kfree(log);
4572 }
4573 
4574 static void nvme_scan_work(struct work_struct *work)
4575 {
4576 	struct nvme_ctrl *ctrl =
4577 		container_of(work, struct nvme_ctrl, scan_work);
4578 	int ret;
4579 
4580 	/* No tagset on a live ctrl means IO queues could not created */
4581 	if (ctrl->state != NVME_CTRL_LIVE || !ctrl->tagset)
4582 		return;
4583 
4584 	/*
4585 	 * Identify controller limits can change at controller reset due to
4586 	 * new firmware download, even though it is not common we cannot ignore
4587 	 * such scenario. Controller's non-mdts limits are reported in the unit
4588 	 * of logical blocks that is dependent on the format of attached
4589 	 * namespace. Hence re-read the limits at the time of ns allocation.
4590 	 */
4591 	ret = nvme_init_non_mdts_limits(ctrl);
4592 	if (ret < 0) {
4593 		dev_warn(ctrl->device,
4594 			"reading non-mdts-limits failed: %d\n", ret);
4595 		return;
4596 	}
4597 
4598 	if (test_and_clear_bit(NVME_AER_NOTICE_NS_CHANGED, &ctrl->events)) {
4599 		dev_info(ctrl->device, "rescanning namespaces.\n");
4600 		nvme_clear_changed_ns_log(ctrl);
4601 	}
4602 
4603 	mutex_lock(&ctrl->scan_lock);
4604 	if (nvme_ctrl_limited_cns(ctrl)) {
4605 		nvme_scan_ns_sequential(ctrl);
4606 	} else {
4607 		/*
4608 		 * Fall back to sequential scan if DNR is set to handle broken
4609 		 * devices which should support Identify NS List (as per the VS
4610 		 * they report) but don't actually support it.
4611 		 */
4612 		ret = nvme_scan_ns_list(ctrl);
4613 		if (ret > 0 && ret & NVME_SC_DNR)
4614 			nvme_scan_ns_sequential(ctrl);
4615 	}
4616 	mutex_unlock(&ctrl->scan_lock);
4617 }
4618 
4619 /*
4620  * This function iterates the namespace list unlocked to allow recovery from
4621  * controller failure. It is up to the caller to ensure the namespace list is
4622  * not modified by scan work while this function is executing.
4623  */
4624 void nvme_remove_namespaces(struct nvme_ctrl *ctrl)
4625 {
4626 	struct nvme_ns *ns, *next;
4627 	LIST_HEAD(ns_list);
4628 
4629 	/*
4630 	 * make sure to requeue I/O to all namespaces as these
4631 	 * might result from the scan itself and must complete
4632 	 * for the scan_work to make progress
4633 	 */
4634 	nvme_mpath_clear_ctrl_paths(ctrl);
4635 
4636 	/* prevent racing with ns scanning */
4637 	flush_work(&ctrl->scan_work);
4638 
4639 	/*
4640 	 * The dead states indicates the controller was not gracefully
4641 	 * disconnected. In that case, we won't be able to flush any data while
4642 	 * removing the namespaces' disks; fail all the queues now to avoid
4643 	 * potentially having to clean up the failed sync later.
4644 	 */
4645 	if (ctrl->state == NVME_CTRL_DEAD) {
4646 		nvme_mark_namespaces_dead(ctrl);
4647 		nvme_unquiesce_io_queues(ctrl);
4648 	}
4649 
4650 	/* this is a no-op when called from the controller reset handler */
4651 	nvme_change_ctrl_state(ctrl, NVME_CTRL_DELETING_NOIO);
4652 
4653 	down_write(&ctrl->namespaces_rwsem);
4654 	list_splice_init(&ctrl->namespaces, &ns_list);
4655 	up_write(&ctrl->namespaces_rwsem);
4656 
4657 	list_for_each_entry_safe(ns, next, &ns_list, list)
4658 		nvme_ns_remove(ns);
4659 }
4660 EXPORT_SYMBOL_GPL(nvme_remove_namespaces);
4661 
4662 static int nvme_class_uevent(const struct device *dev, struct kobj_uevent_env *env)
4663 {
4664 	const struct nvme_ctrl *ctrl =
4665 		container_of(dev, struct nvme_ctrl, ctrl_device);
4666 	struct nvmf_ctrl_options *opts = ctrl->opts;
4667 	int ret;
4668 
4669 	ret = add_uevent_var(env, "NVME_TRTYPE=%s", ctrl->ops->name);
4670 	if (ret)
4671 		return ret;
4672 
4673 	if (opts) {
4674 		ret = add_uevent_var(env, "NVME_TRADDR=%s", opts->traddr);
4675 		if (ret)
4676 			return ret;
4677 
4678 		ret = add_uevent_var(env, "NVME_TRSVCID=%s",
4679 				opts->trsvcid ?: "none");
4680 		if (ret)
4681 			return ret;
4682 
4683 		ret = add_uevent_var(env, "NVME_HOST_TRADDR=%s",
4684 				opts->host_traddr ?: "none");
4685 		if (ret)
4686 			return ret;
4687 
4688 		ret = add_uevent_var(env, "NVME_HOST_IFACE=%s",
4689 				opts->host_iface ?: "none");
4690 	}
4691 	return ret;
4692 }
4693 
4694 static void nvme_change_uevent(struct nvme_ctrl *ctrl, char *envdata)
4695 {
4696 	char *envp[2] = { envdata, NULL };
4697 
4698 	kobject_uevent_env(&ctrl->device->kobj, KOBJ_CHANGE, envp);
4699 }
4700 
4701 static void nvme_aen_uevent(struct nvme_ctrl *ctrl)
4702 {
4703 	char *envp[2] = { NULL, NULL };
4704 	u32 aen_result = ctrl->aen_result;
4705 
4706 	ctrl->aen_result = 0;
4707 	if (!aen_result)
4708 		return;
4709 
4710 	envp[0] = kasprintf(GFP_KERNEL, "NVME_AEN=%#08x", aen_result);
4711 	if (!envp[0])
4712 		return;
4713 	kobject_uevent_env(&ctrl->device->kobj, KOBJ_CHANGE, envp);
4714 	kfree(envp[0]);
4715 }
4716 
4717 static void nvme_async_event_work(struct work_struct *work)
4718 {
4719 	struct nvme_ctrl *ctrl =
4720 		container_of(work, struct nvme_ctrl, async_event_work);
4721 
4722 	nvme_aen_uevent(ctrl);
4723 
4724 	/*
4725 	 * The transport drivers must guarantee AER submission here is safe by
4726 	 * flushing ctrl async_event_work after changing the controller state
4727 	 * from LIVE and before freeing the admin queue.
4728 	*/
4729 	if (ctrl->state == NVME_CTRL_LIVE)
4730 		ctrl->ops->submit_async_event(ctrl);
4731 }
4732 
4733 static bool nvme_ctrl_pp_status(struct nvme_ctrl *ctrl)
4734 {
4735 
4736 	u32 csts;
4737 
4738 	if (ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts))
4739 		return false;
4740 
4741 	if (csts == ~0)
4742 		return false;
4743 
4744 	return ((ctrl->ctrl_config & NVME_CC_ENABLE) && (csts & NVME_CSTS_PP));
4745 }
4746 
4747 static void nvme_get_fw_slot_info(struct nvme_ctrl *ctrl)
4748 {
4749 	struct nvme_fw_slot_info_log *log;
4750 
4751 	log = kmalloc(sizeof(*log), GFP_KERNEL);
4752 	if (!log)
4753 		return;
4754 
4755 	if (nvme_get_log(ctrl, NVME_NSID_ALL, NVME_LOG_FW_SLOT, 0, NVME_CSI_NVM,
4756 			log, sizeof(*log), 0))
4757 		dev_warn(ctrl->device, "Get FW SLOT INFO log error\n");
4758 	kfree(log);
4759 }
4760 
4761 static void nvme_fw_act_work(struct work_struct *work)
4762 {
4763 	struct nvme_ctrl *ctrl = container_of(work,
4764 				struct nvme_ctrl, fw_act_work);
4765 	unsigned long fw_act_timeout;
4766 
4767 	if (ctrl->mtfa)
4768 		fw_act_timeout = jiffies +
4769 				msecs_to_jiffies(ctrl->mtfa * 100);
4770 	else
4771 		fw_act_timeout = jiffies +
4772 				msecs_to_jiffies(admin_timeout * 1000);
4773 
4774 	nvme_quiesce_io_queues(ctrl);
4775 	while (nvme_ctrl_pp_status(ctrl)) {
4776 		if (time_after(jiffies, fw_act_timeout)) {
4777 			dev_warn(ctrl->device,
4778 				"Fw activation timeout, reset controller\n");
4779 			nvme_try_sched_reset(ctrl);
4780 			return;
4781 		}
4782 		msleep(100);
4783 	}
4784 
4785 	if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_LIVE))
4786 		return;
4787 
4788 	nvme_unquiesce_io_queues(ctrl);
4789 	/* read FW slot information to clear the AER */
4790 	nvme_get_fw_slot_info(ctrl);
4791 
4792 	queue_work(nvme_wq, &ctrl->async_event_work);
4793 }
4794 
4795 static u32 nvme_aer_type(u32 result)
4796 {
4797 	return result & 0x7;
4798 }
4799 
4800 static u32 nvme_aer_subtype(u32 result)
4801 {
4802 	return (result & 0xff00) >> 8;
4803 }
4804 
4805 static bool nvme_handle_aen_notice(struct nvme_ctrl *ctrl, u32 result)
4806 {
4807 	u32 aer_notice_type = nvme_aer_subtype(result);
4808 	bool requeue = true;
4809 
4810 	trace_nvme_async_event(ctrl, aer_notice_type);
4811 
4812 	switch (aer_notice_type) {
4813 	case NVME_AER_NOTICE_NS_CHANGED:
4814 		set_bit(NVME_AER_NOTICE_NS_CHANGED, &ctrl->events);
4815 		nvme_queue_scan(ctrl);
4816 		break;
4817 	case NVME_AER_NOTICE_FW_ACT_STARTING:
4818 		/*
4819 		 * We are (ab)using the RESETTING state to prevent subsequent
4820 		 * recovery actions from interfering with the controller's
4821 		 * firmware activation.
4822 		 */
4823 		if (nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING)) {
4824 			nvme_auth_stop(ctrl);
4825 			requeue = false;
4826 			queue_work(nvme_wq, &ctrl->fw_act_work);
4827 		}
4828 		break;
4829 #ifdef CONFIG_NVME_MULTIPATH
4830 	case NVME_AER_NOTICE_ANA:
4831 		if (!ctrl->ana_log_buf)
4832 			break;
4833 		queue_work(nvme_wq, &ctrl->ana_work);
4834 		break;
4835 #endif
4836 	case NVME_AER_NOTICE_DISC_CHANGED:
4837 		ctrl->aen_result = result;
4838 		break;
4839 	default:
4840 		dev_warn(ctrl->device, "async event result %08x\n", result);
4841 	}
4842 	return requeue;
4843 }
4844 
4845 static void nvme_handle_aer_persistent_error(struct nvme_ctrl *ctrl)
4846 {
4847 	trace_nvme_async_event(ctrl, NVME_AER_ERROR);
4848 	dev_warn(ctrl->device, "resetting controller due to AER\n");
4849 	nvme_reset_ctrl(ctrl);
4850 }
4851 
4852 void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status,
4853 		volatile union nvme_result *res)
4854 {
4855 	u32 result = le32_to_cpu(res->u32);
4856 	u32 aer_type = nvme_aer_type(result);
4857 	u32 aer_subtype = nvme_aer_subtype(result);
4858 	bool requeue = true;
4859 
4860 	if (le16_to_cpu(status) >> 1 != NVME_SC_SUCCESS)
4861 		return;
4862 
4863 	switch (aer_type) {
4864 	case NVME_AER_NOTICE:
4865 		requeue = nvme_handle_aen_notice(ctrl, result);
4866 		break;
4867 	case NVME_AER_ERROR:
4868 		/*
4869 		 * For a persistent internal error, don't run async_event_work
4870 		 * to submit a new AER. The controller reset will do it.
4871 		 */
4872 		if (aer_subtype == NVME_AER_ERROR_PERSIST_INT_ERR) {
4873 			nvme_handle_aer_persistent_error(ctrl);
4874 			return;
4875 		}
4876 		fallthrough;
4877 	case NVME_AER_SMART:
4878 	case NVME_AER_CSS:
4879 	case NVME_AER_VS:
4880 		trace_nvme_async_event(ctrl, aer_type);
4881 		ctrl->aen_result = result;
4882 		break;
4883 	default:
4884 		break;
4885 	}
4886 
4887 	if (requeue)
4888 		queue_work(nvme_wq, &ctrl->async_event_work);
4889 }
4890 EXPORT_SYMBOL_GPL(nvme_complete_async_event);
4891 
4892 int nvme_alloc_admin_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set,
4893 		const struct blk_mq_ops *ops, unsigned int cmd_size)
4894 {
4895 	int ret;
4896 
4897 	memset(set, 0, sizeof(*set));
4898 	set->ops = ops;
4899 	set->queue_depth = NVME_AQ_MQ_TAG_DEPTH;
4900 	if (ctrl->ops->flags & NVME_F_FABRICS)
4901 		set->reserved_tags = NVMF_RESERVED_TAGS;
4902 	set->numa_node = ctrl->numa_node;
4903 	set->flags = BLK_MQ_F_NO_SCHED;
4904 	if (ctrl->ops->flags & NVME_F_BLOCKING)
4905 		set->flags |= BLK_MQ_F_BLOCKING;
4906 	set->cmd_size = cmd_size;
4907 	set->driver_data = ctrl;
4908 	set->nr_hw_queues = 1;
4909 	set->timeout = NVME_ADMIN_TIMEOUT;
4910 	ret = blk_mq_alloc_tag_set(set);
4911 	if (ret)
4912 		return ret;
4913 
4914 	ctrl->admin_q = blk_mq_init_queue(set);
4915 	if (IS_ERR(ctrl->admin_q)) {
4916 		ret = PTR_ERR(ctrl->admin_q);
4917 		goto out_free_tagset;
4918 	}
4919 
4920 	if (ctrl->ops->flags & NVME_F_FABRICS) {
4921 		ctrl->fabrics_q = blk_mq_init_queue(set);
4922 		if (IS_ERR(ctrl->fabrics_q)) {
4923 			ret = PTR_ERR(ctrl->fabrics_q);
4924 			goto out_cleanup_admin_q;
4925 		}
4926 	}
4927 
4928 	ctrl->admin_tagset = set;
4929 	return 0;
4930 
4931 out_cleanup_admin_q:
4932 	blk_mq_destroy_queue(ctrl->admin_q);
4933 	blk_put_queue(ctrl->admin_q);
4934 out_free_tagset:
4935 	blk_mq_free_tag_set(set);
4936 	ctrl->admin_q = NULL;
4937 	ctrl->fabrics_q = NULL;
4938 	return ret;
4939 }
4940 EXPORT_SYMBOL_GPL(nvme_alloc_admin_tag_set);
4941 
4942 void nvme_remove_admin_tag_set(struct nvme_ctrl *ctrl)
4943 {
4944 	blk_mq_destroy_queue(ctrl->admin_q);
4945 	blk_put_queue(ctrl->admin_q);
4946 	if (ctrl->ops->flags & NVME_F_FABRICS) {
4947 		blk_mq_destroy_queue(ctrl->fabrics_q);
4948 		blk_put_queue(ctrl->fabrics_q);
4949 	}
4950 	blk_mq_free_tag_set(ctrl->admin_tagset);
4951 }
4952 EXPORT_SYMBOL_GPL(nvme_remove_admin_tag_set);
4953 
4954 int nvme_alloc_io_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set,
4955 		const struct blk_mq_ops *ops, unsigned int nr_maps,
4956 		unsigned int cmd_size)
4957 {
4958 	int ret;
4959 
4960 	memset(set, 0, sizeof(*set));
4961 	set->ops = ops;
4962 	set->queue_depth = min_t(unsigned, ctrl->sqsize, BLK_MQ_MAX_DEPTH - 1);
4963 	/*
4964 	 * Some Apple controllers requires tags to be unique across admin and
4965 	 * the (only) I/O queue, so reserve the first 32 tags of the I/O queue.
4966 	 */
4967 	if (ctrl->quirks & NVME_QUIRK_SHARED_TAGS)
4968 		set->reserved_tags = NVME_AQ_DEPTH;
4969 	else if (ctrl->ops->flags & NVME_F_FABRICS)
4970 		set->reserved_tags = NVMF_RESERVED_TAGS;
4971 	set->numa_node = ctrl->numa_node;
4972 	set->flags = BLK_MQ_F_SHOULD_MERGE;
4973 	if (ctrl->ops->flags & NVME_F_BLOCKING)
4974 		set->flags |= BLK_MQ_F_BLOCKING;
4975 	set->cmd_size = cmd_size,
4976 	set->driver_data = ctrl;
4977 	set->nr_hw_queues = ctrl->queue_count - 1;
4978 	set->timeout = NVME_IO_TIMEOUT;
4979 	set->nr_maps = nr_maps;
4980 	ret = blk_mq_alloc_tag_set(set);
4981 	if (ret)
4982 		return ret;
4983 
4984 	if (ctrl->ops->flags & NVME_F_FABRICS) {
4985 		ctrl->connect_q = blk_mq_init_queue(set);
4986         	if (IS_ERR(ctrl->connect_q)) {
4987 			ret = PTR_ERR(ctrl->connect_q);
4988 			goto out_free_tag_set;
4989 		}
4990 		blk_queue_flag_set(QUEUE_FLAG_SKIP_TAGSET_QUIESCE,
4991 				   ctrl->connect_q);
4992 	}
4993 
4994 	ctrl->tagset = set;
4995 	return 0;
4996 
4997 out_free_tag_set:
4998 	blk_mq_free_tag_set(set);
4999 	ctrl->connect_q = NULL;
5000 	return ret;
5001 }
5002 EXPORT_SYMBOL_GPL(nvme_alloc_io_tag_set);
5003 
5004 void nvme_remove_io_tag_set(struct nvme_ctrl *ctrl)
5005 {
5006 	if (ctrl->ops->flags & NVME_F_FABRICS) {
5007 		blk_mq_destroy_queue(ctrl->connect_q);
5008 		blk_put_queue(ctrl->connect_q);
5009 	}
5010 	blk_mq_free_tag_set(ctrl->tagset);
5011 }
5012 EXPORT_SYMBOL_GPL(nvme_remove_io_tag_set);
5013 
5014 void nvme_stop_ctrl(struct nvme_ctrl *ctrl)
5015 {
5016 	nvme_mpath_stop(ctrl);
5017 	nvme_auth_stop(ctrl);
5018 	nvme_stop_keep_alive(ctrl);
5019 	nvme_stop_failfast_work(ctrl);
5020 	flush_work(&ctrl->async_event_work);
5021 	cancel_work_sync(&ctrl->fw_act_work);
5022 	if (ctrl->ops->stop_ctrl)
5023 		ctrl->ops->stop_ctrl(ctrl);
5024 }
5025 EXPORT_SYMBOL_GPL(nvme_stop_ctrl);
5026 
5027 void nvme_start_ctrl(struct nvme_ctrl *ctrl)
5028 {
5029 	nvme_start_keep_alive(ctrl);
5030 
5031 	nvme_enable_aen(ctrl);
5032 
5033 	/*
5034 	 * persistent discovery controllers need to send indication to userspace
5035 	 * to re-read the discovery log page to learn about possible changes
5036 	 * that were missed. We identify persistent discovery controllers by
5037 	 * checking that they started once before, hence are reconnecting back.
5038 	 */
5039 	if (test_and_set_bit(NVME_CTRL_STARTED_ONCE, &ctrl->flags) &&
5040 	    nvme_discovery_ctrl(ctrl))
5041 		nvme_change_uevent(ctrl, "NVME_EVENT=rediscover");
5042 
5043 	if (ctrl->queue_count > 1) {
5044 		nvme_queue_scan(ctrl);
5045 		nvme_unquiesce_io_queues(ctrl);
5046 		nvme_mpath_update(ctrl);
5047 	}
5048 
5049 	nvme_change_uevent(ctrl, "NVME_EVENT=connected");
5050 }
5051 EXPORT_SYMBOL_GPL(nvme_start_ctrl);
5052 
5053 void nvme_uninit_ctrl(struct nvme_ctrl *ctrl)
5054 {
5055 	nvme_hwmon_exit(ctrl);
5056 	nvme_fault_inject_fini(&ctrl->fault_inject);
5057 	dev_pm_qos_hide_latency_tolerance(ctrl->device);
5058 	cdev_device_del(&ctrl->cdev, ctrl->device);
5059 	nvme_put_ctrl(ctrl);
5060 }
5061 EXPORT_SYMBOL_GPL(nvme_uninit_ctrl);
5062 
5063 static void nvme_free_cels(struct nvme_ctrl *ctrl)
5064 {
5065 	struct nvme_effects_log	*cel;
5066 	unsigned long i;
5067 
5068 	xa_for_each(&ctrl->cels, i, cel) {
5069 		xa_erase(&ctrl->cels, i);
5070 		kfree(cel);
5071 	}
5072 
5073 	xa_destroy(&ctrl->cels);
5074 }
5075 
5076 static void nvme_free_ctrl(struct device *dev)
5077 {
5078 	struct nvme_ctrl *ctrl =
5079 		container_of(dev, struct nvme_ctrl, ctrl_device);
5080 	struct nvme_subsystem *subsys = ctrl->subsys;
5081 
5082 	if (!subsys || ctrl->instance != subsys->instance)
5083 		ida_free(&nvme_instance_ida, ctrl->instance);
5084 
5085 	nvme_free_cels(ctrl);
5086 	nvme_mpath_uninit(ctrl);
5087 	nvme_auth_stop(ctrl);
5088 	nvme_auth_free(ctrl);
5089 	__free_page(ctrl->discard_page);
5090 	free_opal_dev(ctrl->opal_dev);
5091 
5092 	if (subsys) {
5093 		mutex_lock(&nvme_subsystems_lock);
5094 		list_del(&ctrl->subsys_entry);
5095 		sysfs_remove_link(&subsys->dev.kobj, dev_name(ctrl->device));
5096 		mutex_unlock(&nvme_subsystems_lock);
5097 	}
5098 
5099 	ctrl->ops->free_ctrl(ctrl);
5100 
5101 	if (subsys)
5102 		nvme_put_subsystem(subsys);
5103 }
5104 
5105 /*
5106  * Initialize a NVMe controller structures.  This needs to be called during
5107  * earliest initialization so that we have the initialized structured around
5108  * during probing.
5109  */
5110 int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev,
5111 		const struct nvme_ctrl_ops *ops, unsigned long quirks)
5112 {
5113 	int ret;
5114 
5115 	ctrl->state = NVME_CTRL_NEW;
5116 	clear_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags);
5117 	spin_lock_init(&ctrl->lock);
5118 	mutex_init(&ctrl->scan_lock);
5119 	INIT_LIST_HEAD(&ctrl->namespaces);
5120 	xa_init(&ctrl->cels);
5121 	init_rwsem(&ctrl->namespaces_rwsem);
5122 	ctrl->dev = dev;
5123 	ctrl->ops = ops;
5124 	ctrl->quirks = quirks;
5125 	ctrl->numa_node = NUMA_NO_NODE;
5126 	INIT_WORK(&ctrl->scan_work, nvme_scan_work);
5127 	INIT_WORK(&ctrl->async_event_work, nvme_async_event_work);
5128 	INIT_WORK(&ctrl->fw_act_work, nvme_fw_act_work);
5129 	INIT_WORK(&ctrl->delete_work, nvme_delete_ctrl_work);
5130 	init_waitqueue_head(&ctrl->state_wq);
5131 
5132 	INIT_DELAYED_WORK(&ctrl->ka_work, nvme_keep_alive_work);
5133 	INIT_DELAYED_WORK(&ctrl->failfast_work, nvme_failfast_work);
5134 	memset(&ctrl->ka_cmd, 0, sizeof(ctrl->ka_cmd));
5135 	ctrl->ka_cmd.common.opcode = nvme_admin_keep_alive;
5136 
5137 	BUILD_BUG_ON(NVME_DSM_MAX_RANGES * sizeof(struct nvme_dsm_range) >
5138 			PAGE_SIZE);
5139 	ctrl->discard_page = alloc_page(GFP_KERNEL);
5140 	if (!ctrl->discard_page) {
5141 		ret = -ENOMEM;
5142 		goto out;
5143 	}
5144 
5145 	ret = ida_alloc(&nvme_instance_ida, GFP_KERNEL);
5146 	if (ret < 0)
5147 		goto out;
5148 	ctrl->instance = ret;
5149 
5150 	device_initialize(&ctrl->ctrl_device);
5151 	ctrl->device = &ctrl->ctrl_device;
5152 	ctrl->device->devt = MKDEV(MAJOR(nvme_ctrl_base_chr_devt),
5153 			ctrl->instance);
5154 	ctrl->device->class = nvme_class;
5155 	ctrl->device->parent = ctrl->dev;
5156 	if (ops->dev_attr_groups)
5157 		ctrl->device->groups = ops->dev_attr_groups;
5158 	else
5159 		ctrl->device->groups = nvme_dev_attr_groups;
5160 	ctrl->device->release = nvme_free_ctrl;
5161 	dev_set_drvdata(ctrl->device, ctrl);
5162 	ret = dev_set_name(ctrl->device, "nvme%d", ctrl->instance);
5163 	if (ret)
5164 		goto out_release_instance;
5165 
5166 	nvme_get_ctrl(ctrl);
5167 	cdev_init(&ctrl->cdev, &nvme_dev_fops);
5168 	ctrl->cdev.owner = ops->module;
5169 	ret = cdev_device_add(&ctrl->cdev, ctrl->device);
5170 	if (ret)
5171 		goto out_free_name;
5172 
5173 	/*
5174 	 * Initialize latency tolerance controls.  The sysfs files won't
5175 	 * be visible to userspace unless the device actually supports APST.
5176 	 */
5177 	ctrl->device->power.set_latency_tolerance = nvme_set_latency_tolerance;
5178 	dev_pm_qos_update_user_latency_tolerance(ctrl->device,
5179 		min(default_ps_max_latency_us, (unsigned long)S32_MAX));
5180 
5181 	nvme_fault_inject_init(&ctrl->fault_inject, dev_name(ctrl->device));
5182 	nvme_mpath_init_ctrl(ctrl);
5183 	ret = nvme_auth_init_ctrl(ctrl);
5184 	if (ret)
5185 		goto out_free_cdev;
5186 
5187 	return 0;
5188 out_free_cdev:
5189 	cdev_device_del(&ctrl->cdev, ctrl->device);
5190 out_free_name:
5191 	nvme_put_ctrl(ctrl);
5192 	kfree_const(ctrl->device->kobj.name);
5193 out_release_instance:
5194 	ida_free(&nvme_instance_ida, ctrl->instance);
5195 out:
5196 	if (ctrl->discard_page)
5197 		__free_page(ctrl->discard_page);
5198 	return ret;
5199 }
5200 EXPORT_SYMBOL_GPL(nvme_init_ctrl);
5201 
5202 /* let I/O to all namespaces fail in preparation for surprise removal */
5203 void nvme_mark_namespaces_dead(struct nvme_ctrl *ctrl)
5204 {
5205 	struct nvme_ns *ns;
5206 
5207 	down_read(&ctrl->namespaces_rwsem);
5208 	list_for_each_entry(ns, &ctrl->namespaces, list)
5209 		blk_mark_disk_dead(ns->disk);
5210 	up_read(&ctrl->namespaces_rwsem);
5211 }
5212 EXPORT_SYMBOL_GPL(nvme_mark_namespaces_dead);
5213 
5214 void nvme_unfreeze(struct nvme_ctrl *ctrl)
5215 {
5216 	struct nvme_ns *ns;
5217 
5218 	down_read(&ctrl->namespaces_rwsem);
5219 	list_for_each_entry(ns, &ctrl->namespaces, list)
5220 		blk_mq_unfreeze_queue(ns->queue);
5221 	up_read(&ctrl->namespaces_rwsem);
5222 }
5223 EXPORT_SYMBOL_GPL(nvme_unfreeze);
5224 
5225 int nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout)
5226 {
5227 	struct nvme_ns *ns;
5228 
5229 	down_read(&ctrl->namespaces_rwsem);
5230 	list_for_each_entry(ns, &ctrl->namespaces, list) {
5231 		timeout = blk_mq_freeze_queue_wait_timeout(ns->queue, timeout);
5232 		if (timeout <= 0)
5233 			break;
5234 	}
5235 	up_read(&ctrl->namespaces_rwsem);
5236 	return timeout;
5237 }
5238 EXPORT_SYMBOL_GPL(nvme_wait_freeze_timeout);
5239 
5240 void nvme_wait_freeze(struct nvme_ctrl *ctrl)
5241 {
5242 	struct nvme_ns *ns;
5243 
5244 	down_read(&ctrl->namespaces_rwsem);
5245 	list_for_each_entry(ns, &ctrl->namespaces, list)
5246 		blk_mq_freeze_queue_wait(ns->queue);
5247 	up_read(&ctrl->namespaces_rwsem);
5248 }
5249 EXPORT_SYMBOL_GPL(nvme_wait_freeze);
5250 
5251 void nvme_start_freeze(struct nvme_ctrl *ctrl)
5252 {
5253 	struct nvme_ns *ns;
5254 
5255 	down_read(&ctrl->namespaces_rwsem);
5256 	list_for_each_entry(ns, &ctrl->namespaces, list)
5257 		blk_freeze_queue_start(ns->queue);
5258 	up_read(&ctrl->namespaces_rwsem);
5259 }
5260 EXPORT_SYMBOL_GPL(nvme_start_freeze);
5261 
5262 void nvme_quiesce_io_queues(struct nvme_ctrl *ctrl)
5263 {
5264 	if (!ctrl->tagset)
5265 		return;
5266 	if (!test_and_set_bit(NVME_CTRL_STOPPED, &ctrl->flags))
5267 		blk_mq_quiesce_tagset(ctrl->tagset);
5268 	else
5269 		blk_mq_wait_quiesce_done(ctrl->tagset);
5270 }
5271 EXPORT_SYMBOL_GPL(nvme_quiesce_io_queues);
5272 
5273 void nvme_unquiesce_io_queues(struct nvme_ctrl *ctrl)
5274 {
5275 	if (!ctrl->tagset)
5276 		return;
5277 	if (test_and_clear_bit(NVME_CTRL_STOPPED, &ctrl->flags))
5278 		blk_mq_unquiesce_tagset(ctrl->tagset);
5279 }
5280 EXPORT_SYMBOL_GPL(nvme_unquiesce_io_queues);
5281 
5282 void nvme_quiesce_admin_queue(struct nvme_ctrl *ctrl)
5283 {
5284 	if (!test_and_set_bit(NVME_CTRL_ADMIN_Q_STOPPED, &ctrl->flags))
5285 		blk_mq_quiesce_queue(ctrl->admin_q);
5286 	else
5287 		blk_mq_wait_quiesce_done(ctrl->admin_q->tag_set);
5288 }
5289 EXPORT_SYMBOL_GPL(nvme_quiesce_admin_queue);
5290 
5291 void nvme_unquiesce_admin_queue(struct nvme_ctrl *ctrl)
5292 {
5293 	if (test_and_clear_bit(NVME_CTRL_ADMIN_Q_STOPPED, &ctrl->flags))
5294 		blk_mq_unquiesce_queue(ctrl->admin_q);
5295 }
5296 EXPORT_SYMBOL_GPL(nvme_unquiesce_admin_queue);
5297 
5298 void nvme_sync_io_queues(struct nvme_ctrl *ctrl)
5299 {
5300 	struct nvme_ns *ns;
5301 
5302 	down_read(&ctrl->namespaces_rwsem);
5303 	list_for_each_entry(ns, &ctrl->namespaces, list)
5304 		blk_sync_queue(ns->queue);
5305 	up_read(&ctrl->namespaces_rwsem);
5306 }
5307 EXPORT_SYMBOL_GPL(nvme_sync_io_queues);
5308 
5309 void nvme_sync_queues(struct nvme_ctrl *ctrl)
5310 {
5311 	nvme_sync_io_queues(ctrl);
5312 	if (ctrl->admin_q)
5313 		blk_sync_queue(ctrl->admin_q);
5314 }
5315 EXPORT_SYMBOL_GPL(nvme_sync_queues);
5316 
5317 struct nvme_ctrl *nvme_ctrl_from_file(struct file *file)
5318 {
5319 	if (file->f_op != &nvme_dev_fops)
5320 		return NULL;
5321 	return file->private_data;
5322 }
5323 EXPORT_SYMBOL_NS_GPL(nvme_ctrl_from_file, NVME_TARGET_PASSTHRU);
5324 
5325 /*
5326  * Check we didn't inadvertently grow the command structure sizes:
5327  */
5328 static inline void _nvme_check_size(void)
5329 {
5330 	BUILD_BUG_ON(sizeof(struct nvme_common_command) != 64);
5331 	BUILD_BUG_ON(sizeof(struct nvme_rw_command) != 64);
5332 	BUILD_BUG_ON(sizeof(struct nvme_identify) != 64);
5333 	BUILD_BUG_ON(sizeof(struct nvme_features) != 64);
5334 	BUILD_BUG_ON(sizeof(struct nvme_download_firmware) != 64);
5335 	BUILD_BUG_ON(sizeof(struct nvme_format_cmd) != 64);
5336 	BUILD_BUG_ON(sizeof(struct nvme_dsm_cmd) != 64);
5337 	BUILD_BUG_ON(sizeof(struct nvme_write_zeroes_cmd) != 64);
5338 	BUILD_BUG_ON(sizeof(struct nvme_abort_cmd) != 64);
5339 	BUILD_BUG_ON(sizeof(struct nvme_get_log_page_command) != 64);
5340 	BUILD_BUG_ON(sizeof(struct nvme_command) != 64);
5341 	BUILD_BUG_ON(sizeof(struct nvme_id_ctrl) != NVME_IDENTIFY_DATA_SIZE);
5342 	BUILD_BUG_ON(sizeof(struct nvme_id_ns) != NVME_IDENTIFY_DATA_SIZE);
5343 	BUILD_BUG_ON(sizeof(struct nvme_id_ns_cs_indep) !=
5344 			NVME_IDENTIFY_DATA_SIZE);
5345 	BUILD_BUG_ON(sizeof(struct nvme_id_ns_zns) != NVME_IDENTIFY_DATA_SIZE);
5346 	BUILD_BUG_ON(sizeof(struct nvme_id_ns_nvm) != NVME_IDENTIFY_DATA_SIZE);
5347 	BUILD_BUG_ON(sizeof(struct nvme_id_ctrl_zns) != NVME_IDENTIFY_DATA_SIZE);
5348 	BUILD_BUG_ON(sizeof(struct nvme_id_ctrl_nvm) != NVME_IDENTIFY_DATA_SIZE);
5349 	BUILD_BUG_ON(sizeof(struct nvme_lba_range_type) != 64);
5350 	BUILD_BUG_ON(sizeof(struct nvme_smart_log) != 512);
5351 	BUILD_BUG_ON(sizeof(struct nvme_dbbuf) != 64);
5352 	BUILD_BUG_ON(sizeof(struct nvme_directive_cmd) != 64);
5353 	BUILD_BUG_ON(sizeof(struct nvme_feat_host_behavior) != 512);
5354 }
5355 
5356 
5357 static int __init nvme_core_init(void)
5358 {
5359 	int result = -ENOMEM;
5360 
5361 	_nvme_check_size();
5362 
5363 	nvme_wq = alloc_workqueue("nvme-wq",
5364 			WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_SYSFS, 0);
5365 	if (!nvme_wq)
5366 		goto out;
5367 
5368 	nvme_reset_wq = alloc_workqueue("nvme-reset-wq",
5369 			WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_SYSFS, 0);
5370 	if (!nvme_reset_wq)
5371 		goto destroy_wq;
5372 
5373 	nvme_delete_wq = alloc_workqueue("nvme-delete-wq",
5374 			WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_SYSFS, 0);
5375 	if (!nvme_delete_wq)
5376 		goto destroy_reset_wq;
5377 
5378 	result = alloc_chrdev_region(&nvme_ctrl_base_chr_devt, 0,
5379 			NVME_MINORS, "nvme");
5380 	if (result < 0)
5381 		goto destroy_delete_wq;
5382 
5383 	nvme_class = class_create(THIS_MODULE, "nvme");
5384 	if (IS_ERR(nvme_class)) {
5385 		result = PTR_ERR(nvme_class);
5386 		goto unregister_chrdev;
5387 	}
5388 	nvme_class->dev_uevent = nvme_class_uevent;
5389 
5390 	nvme_subsys_class = class_create(THIS_MODULE, "nvme-subsystem");
5391 	if (IS_ERR(nvme_subsys_class)) {
5392 		result = PTR_ERR(nvme_subsys_class);
5393 		goto destroy_class;
5394 	}
5395 
5396 	result = alloc_chrdev_region(&nvme_ns_chr_devt, 0, NVME_MINORS,
5397 				     "nvme-generic");
5398 	if (result < 0)
5399 		goto destroy_subsys_class;
5400 
5401 	nvme_ns_chr_class = class_create(THIS_MODULE, "nvme-generic");
5402 	if (IS_ERR(nvme_ns_chr_class)) {
5403 		result = PTR_ERR(nvme_ns_chr_class);
5404 		goto unregister_generic_ns;
5405 	}
5406 
5407 	result = nvme_init_auth();
5408 	if (result)
5409 		goto destroy_ns_chr;
5410 	return 0;
5411 
5412 destroy_ns_chr:
5413 	class_destroy(nvme_ns_chr_class);
5414 unregister_generic_ns:
5415 	unregister_chrdev_region(nvme_ns_chr_devt, NVME_MINORS);
5416 destroy_subsys_class:
5417 	class_destroy(nvme_subsys_class);
5418 destroy_class:
5419 	class_destroy(nvme_class);
5420 unregister_chrdev:
5421 	unregister_chrdev_region(nvme_ctrl_base_chr_devt, NVME_MINORS);
5422 destroy_delete_wq:
5423 	destroy_workqueue(nvme_delete_wq);
5424 destroy_reset_wq:
5425 	destroy_workqueue(nvme_reset_wq);
5426 destroy_wq:
5427 	destroy_workqueue(nvme_wq);
5428 out:
5429 	return result;
5430 }
5431 
5432 static void __exit nvme_core_exit(void)
5433 {
5434 	nvme_exit_auth();
5435 	class_destroy(nvme_ns_chr_class);
5436 	class_destroy(nvme_subsys_class);
5437 	class_destroy(nvme_class);
5438 	unregister_chrdev_region(nvme_ns_chr_devt, NVME_MINORS);
5439 	unregister_chrdev_region(nvme_ctrl_base_chr_devt, NVME_MINORS);
5440 	destroy_workqueue(nvme_delete_wq);
5441 	destroy_workqueue(nvme_reset_wq);
5442 	destroy_workqueue(nvme_wq);
5443 	ida_destroy(&nvme_ns_chr_minor_ida);
5444 	ida_destroy(&nvme_instance_ida);
5445 }
5446 
5447 MODULE_LICENSE("GPL");
5448 MODULE_VERSION("1.0");
5449 module_init(nvme_core_init);
5450 module_exit(nvme_core_exit);
5451