1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * NVM Express device driver 4 * Copyright (c) 2011-2014, Intel Corporation. 5 */ 6 7 #include <linux/blkdev.h> 8 #include <linux/blk-mq.h> 9 #include <linux/blk-integrity.h> 10 #include <linux/compat.h> 11 #include <linux/delay.h> 12 #include <linux/errno.h> 13 #include <linux/hdreg.h> 14 #include <linux/kernel.h> 15 #include <linux/module.h> 16 #include <linux/backing-dev.h> 17 #include <linux/slab.h> 18 #include <linux/types.h> 19 #include <linux/pr.h> 20 #include <linux/ptrace.h> 21 #include <linux/nvme_ioctl.h> 22 #include <linux/pm_qos.h> 23 #include <asm/unaligned.h> 24 25 #include "nvme.h" 26 #include "fabrics.h" 27 28 #define CREATE_TRACE_POINTS 29 #include "trace.h" 30 31 #define NVME_MINORS (1U << MINORBITS) 32 33 unsigned int admin_timeout = 60; 34 module_param(admin_timeout, uint, 0644); 35 MODULE_PARM_DESC(admin_timeout, "timeout in seconds for admin commands"); 36 EXPORT_SYMBOL_GPL(admin_timeout); 37 38 unsigned int nvme_io_timeout = 30; 39 module_param_named(io_timeout, nvme_io_timeout, uint, 0644); 40 MODULE_PARM_DESC(io_timeout, "timeout in seconds for I/O"); 41 EXPORT_SYMBOL_GPL(nvme_io_timeout); 42 43 static unsigned char shutdown_timeout = 5; 44 module_param(shutdown_timeout, byte, 0644); 45 MODULE_PARM_DESC(shutdown_timeout, "timeout in seconds for controller shutdown"); 46 47 static u8 nvme_max_retries = 5; 48 module_param_named(max_retries, nvme_max_retries, byte, 0644); 49 MODULE_PARM_DESC(max_retries, "max number of retries a command may have"); 50 51 static unsigned long default_ps_max_latency_us = 100000; 52 module_param(default_ps_max_latency_us, ulong, 0644); 53 MODULE_PARM_DESC(default_ps_max_latency_us, 54 "max power saving latency for new devices; use PM QOS to change per device"); 55 56 static bool force_apst; 57 module_param(force_apst, bool, 0644); 58 MODULE_PARM_DESC(force_apst, "allow APST for newly enumerated devices even if quirked off"); 59 60 static unsigned long apst_primary_timeout_ms = 100; 61 module_param(apst_primary_timeout_ms, ulong, 0644); 62 MODULE_PARM_DESC(apst_primary_timeout_ms, 63 "primary APST timeout in ms"); 64 65 static unsigned long apst_secondary_timeout_ms = 2000; 66 module_param(apst_secondary_timeout_ms, ulong, 0644); 67 MODULE_PARM_DESC(apst_secondary_timeout_ms, 68 "secondary APST timeout in ms"); 69 70 static unsigned long apst_primary_latency_tol_us = 15000; 71 module_param(apst_primary_latency_tol_us, ulong, 0644); 72 MODULE_PARM_DESC(apst_primary_latency_tol_us, 73 "primary APST latency tolerance in us"); 74 75 static unsigned long apst_secondary_latency_tol_us = 100000; 76 module_param(apst_secondary_latency_tol_us, ulong, 0644); 77 MODULE_PARM_DESC(apst_secondary_latency_tol_us, 78 "secondary APST latency tolerance in us"); 79 80 static bool streams; 81 module_param(streams, bool, 0644); 82 MODULE_PARM_DESC(streams, "turn on support for Streams write directives"); 83 84 /* 85 * nvme_wq - hosts nvme related works that are not reset or delete 86 * nvme_reset_wq - hosts nvme reset works 87 * nvme_delete_wq - hosts nvme delete works 88 * 89 * nvme_wq will host works such as scan, aen handling, fw activation, 90 * keep-alive, periodic reconnects etc. nvme_reset_wq 91 * runs reset works which also flush works hosted on nvme_wq for 92 * serialization purposes. nvme_delete_wq host controller deletion 93 * works which flush reset works for serialization. 94 */ 95 struct workqueue_struct *nvme_wq; 96 EXPORT_SYMBOL_GPL(nvme_wq); 97 98 struct workqueue_struct *nvme_reset_wq; 99 EXPORT_SYMBOL_GPL(nvme_reset_wq); 100 101 struct workqueue_struct *nvme_delete_wq; 102 EXPORT_SYMBOL_GPL(nvme_delete_wq); 103 104 static LIST_HEAD(nvme_subsystems); 105 static DEFINE_MUTEX(nvme_subsystems_lock); 106 107 static DEFINE_IDA(nvme_instance_ida); 108 static dev_t nvme_ctrl_base_chr_devt; 109 static struct class *nvme_class; 110 static struct class *nvme_subsys_class; 111 112 static DEFINE_IDA(nvme_ns_chr_minor_ida); 113 static dev_t nvme_ns_chr_devt; 114 static struct class *nvme_ns_chr_class; 115 116 static void nvme_put_subsystem(struct nvme_subsystem *subsys); 117 static void nvme_remove_invalid_namespaces(struct nvme_ctrl *ctrl, 118 unsigned nsid); 119 static void nvme_update_keep_alive(struct nvme_ctrl *ctrl, 120 struct nvme_command *cmd); 121 122 void nvme_queue_scan(struct nvme_ctrl *ctrl) 123 { 124 /* 125 * Only new queue scan work when admin and IO queues are both alive 126 */ 127 if (ctrl->state == NVME_CTRL_LIVE && ctrl->tagset) 128 queue_work(nvme_wq, &ctrl->scan_work); 129 } 130 131 /* 132 * Use this function to proceed with scheduling reset_work for a controller 133 * that had previously been set to the resetting state. This is intended for 134 * code paths that can't be interrupted by other reset attempts. A hot removal 135 * may prevent this from succeeding. 136 */ 137 int nvme_try_sched_reset(struct nvme_ctrl *ctrl) 138 { 139 if (ctrl->state != NVME_CTRL_RESETTING) 140 return -EBUSY; 141 if (!queue_work(nvme_reset_wq, &ctrl->reset_work)) 142 return -EBUSY; 143 return 0; 144 } 145 EXPORT_SYMBOL_GPL(nvme_try_sched_reset); 146 147 static void nvme_failfast_work(struct work_struct *work) 148 { 149 struct nvme_ctrl *ctrl = container_of(to_delayed_work(work), 150 struct nvme_ctrl, failfast_work); 151 152 if (ctrl->state != NVME_CTRL_CONNECTING) 153 return; 154 155 set_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags); 156 dev_info(ctrl->device, "failfast expired\n"); 157 nvme_kick_requeue_lists(ctrl); 158 } 159 160 static inline void nvme_start_failfast_work(struct nvme_ctrl *ctrl) 161 { 162 if (!ctrl->opts || ctrl->opts->fast_io_fail_tmo == -1) 163 return; 164 165 schedule_delayed_work(&ctrl->failfast_work, 166 ctrl->opts->fast_io_fail_tmo * HZ); 167 } 168 169 static inline void nvme_stop_failfast_work(struct nvme_ctrl *ctrl) 170 { 171 if (!ctrl->opts) 172 return; 173 174 cancel_delayed_work_sync(&ctrl->failfast_work); 175 clear_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags); 176 } 177 178 179 int nvme_reset_ctrl(struct nvme_ctrl *ctrl) 180 { 181 if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING)) 182 return -EBUSY; 183 if (!queue_work(nvme_reset_wq, &ctrl->reset_work)) 184 return -EBUSY; 185 return 0; 186 } 187 EXPORT_SYMBOL_GPL(nvme_reset_ctrl); 188 189 int nvme_reset_ctrl_sync(struct nvme_ctrl *ctrl) 190 { 191 int ret; 192 193 ret = nvme_reset_ctrl(ctrl); 194 if (!ret) { 195 flush_work(&ctrl->reset_work); 196 if (ctrl->state != NVME_CTRL_LIVE) 197 ret = -ENETRESET; 198 } 199 200 return ret; 201 } 202 203 static void nvme_do_delete_ctrl(struct nvme_ctrl *ctrl) 204 { 205 dev_info(ctrl->device, 206 "Removing ctrl: NQN \"%s\"\n", nvmf_ctrl_subsysnqn(ctrl)); 207 208 flush_work(&ctrl->reset_work); 209 nvme_stop_ctrl(ctrl); 210 nvme_remove_namespaces(ctrl); 211 ctrl->ops->delete_ctrl(ctrl); 212 nvme_uninit_ctrl(ctrl); 213 } 214 215 static void nvme_delete_ctrl_work(struct work_struct *work) 216 { 217 struct nvme_ctrl *ctrl = 218 container_of(work, struct nvme_ctrl, delete_work); 219 220 nvme_do_delete_ctrl(ctrl); 221 } 222 223 int nvme_delete_ctrl(struct nvme_ctrl *ctrl) 224 { 225 if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_DELETING)) 226 return -EBUSY; 227 if (!queue_work(nvme_delete_wq, &ctrl->delete_work)) 228 return -EBUSY; 229 return 0; 230 } 231 EXPORT_SYMBOL_GPL(nvme_delete_ctrl); 232 233 static void nvme_delete_ctrl_sync(struct nvme_ctrl *ctrl) 234 { 235 /* 236 * Keep a reference until nvme_do_delete_ctrl() complete, 237 * since ->delete_ctrl can free the controller. 238 */ 239 nvme_get_ctrl(ctrl); 240 if (nvme_change_ctrl_state(ctrl, NVME_CTRL_DELETING)) 241 nvme_do_delete_ctrl(ctrl); 242 nvme_put_ctrl(ctrl); 243 } 244 245 static blk_status_t nvme_error_status(u16 status) 246 { 247 switch (status & 0x7ff) { 248 case NVME_SC_SUCCESS: 249 return BLK_STS_OK; 250 case NVME_SC_CAP_EXCEEDED: 251 return BLK_STS_NOSPC; 252 case NVME_SC_LBA_RANGE: 253 case NVME_SC_CMD_INTERRUPTED: 254 case NVME_SC_NS_NOT_READY: 255 return BLK_STS_TARGET; 256 case NVME_SC_BAD_ATTRIBUTES: 257 case NVME_SC_ONCS_NOT_SUPPORTED: 258 case NVME_SC_INVALID_OPCODE: 259 case NVME_SC_INVALID_FIELD: 260 case NVME_SC_INVALID_NS: 261 return BLK_STS_NOTSUPP; 262 case NVME_SC_WRITE_FAULT: 263 case NVME_SC_READ_ERROR: 264 case NVME_SC_UNWRITTEN_BLOCK: 265 case NVME_SC_ACCESS_DENIED: 266 case NVME_SC_READ_ONLY: 267 case NVME_SC_COMPARE_FAILED: 268 return BLK_STS_MEDIUM; 269 case NVME_SC_GUARD_CHECK: 270 case NVME_SC_APPTAG_CHECK: 271 case NVME_SC_REFTAG_CHECK: 272 case NVME_SC_INVALID_PI: 273 return BLK_STS_PROTECTION; 274 case NVME_SC_RESERVATION_CONFLICT: 275 return BLK_STS_NEXUS; 276 case NVME_SC_HOST_PATH_ERROR: 277 return BLK_STS_TRANSPORT; 278 case NVME_SC_ZONE_TOO_MANY_ACTIVE: 279 return BLK_STS_ZONE_ACTIVE_RESOURCE; 280 case NVME_SC_ZONE_TOO_MANY_OPEN: 281 return BLK_STS_ZONE_OPEN_RESOURCE; 282 default: 283 return BLK_STS_IOERR; 284 } 285 } 286 287 static void nvme_retry_req(struct request *req) 288 { 289 unsigned long delay = 0; 290 u16 crd; 291 292 /* The mask and shift result must be <= 3 */ 293 crd = (nvme_req(req)->status & NVME_SC_CRD) >> 11; 294 if (crd) 295 delay = nvme_req(req)->ctrl->crdt[crd - 1] * 100; 296 297 nvme_req(req)->retries++; 298 blk_mq_requeue_request(req, false); 299 blk_mq_delay_kick_requeue_list(req->q, delay); 300 } 301 302 enum nvme_disposition { 303 COMPLETE, 304 RETRY, 305 FAILOVER, 306 }; 307 308 static inline enum nvme_disposition nvme_decide_disposition(struct request *req) 309 { 310 if (likely(nvme_req(req)->status == 0)) 311 return COMPLETE; 312 313 if (blk_noretry_request(req) || 314 (nvme_req(req)->status & NVME_SC_DNR) || 315 nvme_req(req)->retries >= nvme_max_retries) 316 return COMPLETE; 317 318 if (req->cmd_flags & REQ_NVME_MPATH) { 319 if (nvme_is_path_error(nvme_req(req)->status) || 320 blk_queue_dying(req->q)) 321 return FAILOVER; 322 } else { 323 if (blk_queue_dying(req->q)) 324 return COMPLETE; 325 } 326 327 return RETRY; 328 } 329 330 static inline void nvme_end_req_zoned(struct request *req) 331 { 332 if (IS_ENABLED(CONFIG_BLK_DEV_ZONED) && 333 req_op(req) == REQ_OP_ZONE_APPEND) 334 req->__sector = nvme_lba_to_sect(req->q->queuedata, 335 le64_to_cpu(nvme_req(req)->result.u64)); 336 } 337 338 static inline void nvme_end_req(struct request *req) 339 { 340 blk_status_t status = nvme_error_status(nvme_req(req)->status); 341 342 nvme_end_req_zoned(req); 343 nvme_trace_bio_complete(req); 344 blk_mq_end_request(req, status); 345 } 346 347 void nvme_complete_rq(struct request *req) 348 { 349 trace_nvme_complete_rq(req); 350 nvme_cleanup_cmd(req); 351 352 if (nvme_req(req)->ctrl->kas) 353 nvme_req(req)->ctrl->comp_seen = true; 354 355 switch (nvme_decide_disposition(req)) { 356 case COMPLETE: 357 nvme_end_req(req); 358 return; 359 case RETRY: 360 nvme_retry_req(req); 361 return; 362 case FAILOVER: 363 nvme_failover_req(req); 364 return; 365 } 366 } 367 EXPORT_SYMBOL_GPL(nvme_complete_rq); 368 369 void nvme_complete_batch_req(struct request *req) 370 { 371 nvme_cleanup_cmd(req); 372 nvme_end_req_zoned(req); 373 } 374 EXPORT_SYMBOL_GPL(nvme_complete_batch_req); 375 376 /* 377 * Called to unwind from ->queue_rq on a failed command submission so that the 378 * multipathing code gets called to potentially failover to another path. 379 * The caller needs to unwind all transport specific resource allocations and 380 * must return propagate the return value. 381 */ 382 blk_status_t nvme_host_path_error(struct request *req) 383 { 384 nvme_req(req)->status = NVME_SC_HOST_PATH_ERROR; 385 blk_mq_set_request_complete(req); 386 nvme_complete_rq(req); 387 return BLK_STS_OK; 388 } 389 EXPORT_SYMBOL_GPL(nvme_host_path_error); 390 391 bool nvme_cancel_request(struct request *req, void *data, bool reserved) 392 { 393 dev_dbg_ratelimited(((struct nvme_ctrl *) data)->device, 394 "Cancelling I/O %d", req->tag); 395 396 /* don't abort one completed request */ 397 if (blk_mq_request_completed(req)) 398 return true; 399 400 nvme_req(req)->status = NVME_SC_HOST_ABORTED_CMD; 401 nvme_req(req)->flags |= NVME_REQ_CANCELLED; 402 blk_mq_complete_request(req); 403 return true; 404 } 405 EXPORT_SYMBOL_GPL(nvme_cancel_request); 406 407 void nvme_cancel_tagset(struct nvme_ctrl *ctrl) 408 { 409 if (ctrl->tagset) { 410 blk_mq_tagset_busy_iter(ctrl->tagset, 411 nvme_cancel_request, ctrl); 412 blk_mq_tagset_wait_completed_request(ctrl->tagset); 413 } 414 } 415 EXPORT_SYMBOL_GPL(nvme_cancel_tagset); 416 417 void nvme_cancel_admin_tagset(struct nvme_ctrl *ctrl) 418 { 419 if (ctrl->admin_tagset) { 420 blk_mq_tagset_busy_iter(ctrl->admin_tagset, 421 nvme_cancel_request, ctrl); 422 blk_mq_tagset_wait_completed_request(ctrl->admin_tagset); 423 } 424 } 425 EXPORT_SYMBOL_GPL(nvme_cancel_admin_tagset); 426 427 bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl, 428 enum nvme_ctrl_state new_state) 429 { 430 enum nvme_ctrl_state old_state; 431 unsigned long flags; 432 bool changed = false; 433 434 spin_lock_irqsave(&ctrl->lock, flags); 435 436 old_state = ctrl->state; 437 switch (new_state) { 438 case NVME_CTRL_LIVE: 439 switch (old_state) { 440 case NVME_CTRL_NEW: 441 case NVME_CTRL_RESETTING: 442 case NVME_CTRL_CONNECTING: 443 changed = true; 444 fallthrough; 445 default: 446 break; 447 } 448 break; 449 case NVME_CTRL_RESETTING: 450 switch (old_state) { 451 case NVME_CTRL_NEW: 452 case NVME_CTRL_LIVE: 453 changed = true; 454 fallthrough; 455 default: 456 break; 457 } 458 break; 459 case NVME_CTRL_CONNECTING: 460 switch (old_state) { 461 case NVME_CTRL_NEW: 462 case NVME_CTRL_RESETTING: 463 changed = true; 464 fallthrough; 465 default: 466 break; 467 } 468 break; 469 case NVME_CTRL_DELETING: 470 switch (old_state) { 471 case NVME_CTRL_LIVE: 472 case NVME_CTRL_RESETTING: 473 case NVME_CTRL_CONNECTING: 474 changed = true; 475 fallthrough; 476 default: 477 break; 478 } 479 break; 480 case NVME_CTRL_DELETING_NOIO: 481 switch (old_state) { 482 case NVME_CTRL_DELETING: 483 case NVME_CTRL_DEAD: 484 changed = true; 485 fallthrough; 486 default: 487 break; 488 } 489 break; 490 case NVME_CTRL_DEAD: 491 switch (old_state) { 492 case NVME_CTRL_DELETING: 493 changed = true; 494 fallthrough; 495 default: 496 break; 497 } 498 break; 499 default: 500 break; 501 } 502 503 if (changed) { 504 ctrl->state = new_state; 505 wake_up_all(&ctrl->state_wq); 506 } 507 508 spin_unlock_irqrestore(&ctrl->lock, flags); 509 if (!changed) 510 return false; 511 512 if (ctrl->state == NVME_CTRL_LIVE) { 513 if (old_state == NVME_CTRL_CONNECTING) 514 nvme_stop_failfast_work(ctrl); 515 nvme_kick_requeue_lists(ctrl); 516 } else if (ctrl->state == NVME_CTRL_CONNECTING && 517 old_state == NVME_CTRL_RESETTING) { 518 nvme_start_failfast_work(ctrl); 519 } 520 return changed; 521 } 522 EXPORT_SYMBOL_GPL(nvme_change_ctrl_state); 523 524 /* 525 * Returns true for sink states that can't ever transition back to live. 526 */ 527 static bool nvme_state_terminal(struct nvme_ctrl *ctrl) 528 { 529 switch (ctrl->state) { 530 case NVME_CTRL_NEW: 531 case NVME_CTRL_LIVE: 532 case NVME_CTRL_RESETTING: 533 case NVME_CTRL_CONNECTING: 534 return false; 535 case NVME_CTRL_DELETING: 536 case NVME_CTRL_DELETING_NOIO: 537 case NVME_CTRL_DEAD: 538 return true; 539 default: 540 WARN_ONCE(1, "Unhandled ctrl state:%d", ctrl->state); 541 return true; 542 } 543 } 544 545 /* 546 * Waits for the controller state to be resetting, or returns false if it is 547 * not possible to ever transition to that state. 548 */ 549 bool nvme_wait_reset(struct nvme_ctrl *ctrl) 550 { 551 wait_event(ctrl->state_wq, 552 nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING) || 553 nvme_state_terminal(ctrl)); 554 return ctrl->state == NVME_CTRL_RESETTING; 555 } 556 EXPORT_SYMBOL_GPL(nvme_wait_reset); 557 558 static void nvme_free_ns_head(struct kref *ref) 559 { 560 struct nvme_ns_head *head = 561 container_of(ref, struct nvme_ns_head, ref); 562 563 nvme_mpath_remove_disk(head); 564 ida_simple_remove(&head->subsys->ns_ida, head->instance); 565 cleanup_srcu_struct(&head->srcu); 566 nvme_put_subsystem(head->subsys); 567 kfree(head); 568 } 569 570 bool nvme_tryget_ns_head(struct nvme_ns_head *head) 571 { 572 return kref_get_unless_zero(&head->ref); 573 } 574 575 void nvme_put_ns_head(struct nvme_ns_head *head) 576 { 577 kref_put(&head->ref, nvme_free_ns_head); 578 } 579 580 static void nvme_free_ns(struct kref *kref) 581 { 582 struct nvme_ns *ns = container_of(kref, struct nvme_ns, kref); 583 584 put_disk(ns->disk); 585 nvme_put_ns_head(ns->head); 586 nvme_put_ctrl(ns->ctrl); 587 kfree(ns); 588 } 589 590 static inline bool nvme_get_ns(struct nvme_ns *ns) 591 { 592 return kref_get_unless_zero(&ns->kref); 593 } 594 595 void nvme_put_ns(struct nvme_ns *ns) 596 { 597 kref_put(&ns->kref, nvme_free_ns); 598 } 599 EXPORT_SYMBOL_NS_GPL(nvme_put_ns, NVME_TARGET_PASSTHRU); 600 601 static inline void nvme_clear_nvme_request(struct request *req) 602 { 603 nvme_req(req)->status = 0; 604 nvme_req(req)->retries = 0; 605 nvme_req(req)->flags = 0; 606 req->rq_flags |= RQF_DONTPREP; 607 } 608 609 static inline unsigned int nvme_req_op(struct nvme_command *cmd) 610 { 611 return nvme_is_write(cmd) ? REQ_OP_DRV_OUT : REQ_OP_DRV_IN; 612 } 613 614 static inline void nvme_init_request(struct request *req, 615 struct nvme_command *cmd) 616 { 617 if (req->q->queuedata) 618 req->timeout = NVME_IO_TIMEOUT; 619 else /* no queuedata implies admin queue */ 620 req->timeout = NVME_ADMIN_TIMEOUT; 621 622 /* passthru commands should let the driver set the SGL flags */ 623 cmd->common.flags &= ~NVME_CMD_SGL_ALL; 624 625 req->cmd_flags |= REQ_FAILFAST_DRIVER; 626 if (req->mq_hctx->type == HCTX_TYPE_POLL) 627 req->cmd_flags |= REQ_POLLED; 628 nvme_clear_nvme_request(req); 629 memcpy(nvme_req(req)->cmd, cmd, sizeof(*cmd)); 630 } 631 632 struct request *nvme_alloc_request(struct request_queue *q, 633 struct nvme_command *cmd, blk_mq_req_flags_t flags) 634 { 635 struct request *req; 636 637 req = blk_mq_alloc_request(q, nvme_req_op(cmd), flags); 638 if (!IS_ERR(req)) 639 nvme_init_request(req, cmd); 640 return req; 641 } 642 EXPORT_SYMBOL_GPL(nvme_alloc_request); 643 644 static struct request *nvme_alloc_request_qid(struct request_queue *q, 645 struct nvme_command *cmd, blk_mq_req_flags_t flags, int qid) 646 { 647 struct request *req; 648 649 req = blk_mq_alloc_request_hctx(q, nvme_req_op(cmd), flags, 650 qid ? qid - 1 : 0); 651 if (!IS_ERR(req)) 652 nvme_init_request(req, cmd); 653 return req; 654 } 655 656 /* 657 * For something we're not in a state to send to the device the default action 658 * is to busy it and retry it after the controller state is recovered. However, 659 * if the controller is deleting or if anything is marked for failfast or 660 * nvme multipath it is immediately failed. 661 * 662 * Note: commands used to initialize the controller will be marked for failfast. 663 * Note: nvme cli/ioctl commands are marked for failfast. 664 */ 665 blk_status_t nvme_fail_nonready_command(struct nvme_ctrl *ctrl, 666 struct request *rq) 667 { 668 if (ctrl->state != NVME_CTRL_DELETING_NOIO && 669 ctrl->state != NVME_CTRL_DELETING && 670 ctrl->state != NVME_CTRL_DEAD && 671 !test_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags) && 672 !blk_noretry_request(rq) && !(rq->cmd_flags & REQ_NVME_MPATH)) 673 return BLK_STS_RESOURCE; 674 return nvme_host_path_error(rq); 675 } 676 EXPORT_SYMBOL_GPL(nvme_fail_nonready_command); 677 678 bool __nvme_check_ready(struct nvme_ctrl *ctrl, struct request *rq, 679 bool queue_live) 680 { 681 struct nvme_request *req = nvme_req(rq); 682 683 /* 684 * currently we have a problem sending passthru commands 685 * on the admin_q if the controller is not LIVE because we can't 686 * make sure that they are going out after the admin connect, 687 * controller enable and/or other commands in the initialization 688 * sequence. until the controller will be LIVE, fail with 689 * BLK_STS_RESOURCE so that they will be rescheduled. 690 */ 691 if (rq->q == ctrl->admin_q && (req->flags & NVME_REQ_USERCMD)) 692 return false; 693 694 if (ctrl->ops->flags & NVME_F_FABRICS) { 695 /* 696 * Only allow commands on a live queue, except for the connect 697 * command, which is require to set the queue live in the 698 * appropinquate states. 699 */ 700 switch (ctrl->state) { 701 case NVME_CTRL_CONNECTING: 702 if (blk_rq_is_passthrough(rq) && nvme_is_fabrics(req->cmd) && 703 req->cmd->fabrics.fctype == nvme_fabrics_type_connect) 704 return true; 705 break; 706 default: 707 break; 708 case NVME_CTRL_DEAD: 709 return false; 710 } 711 } 712 713 return queue_live; 714 } 715 EXPORT_SYMBOL_GPL(__nvme_check_ready); 716 717 static int nvme_toggle_streams(struct nvme_ctrl *ctrl, bool enable) 718 { 719 struct nvme_command c = { }; 720 721 c.directive.opcode = nvme_admin_directive_send; 722 c.directive.nsid = cpu_to_le32(NVME_NSID_ALL); 723 c.directive.doper = NVME_DIR_SND_ID_OP_ENABLE; 724 c.directive.dtype = NVME_DIR_IDENTIFY; 725 c.directive.tdtype = NVME_DIR_STREAMS; 726 c.directive.endir = enable ? NVME_DIR_ENDIR : 0; 727 728 return nvme_submit_sync_cmd(ctrl->admin_q, &c, NULL, 0); 729 } 730 731 static int nvme_disable_streams(struct nvme_ctrl *ctrl) 732 { 733 return nvme_toggle_streams(ctrl, false); 734 } 735 736 static int nvme_enable_streams(struct nvme_ctrl *ctrl) 737 { 738 return nvme_toggle_streams(ctrl, true); 739 } 740 741 static int nvme_get_stream_params(struct nvme_ctrl *ctrl, 742 struct streams_directive_params *s, u32 nsid) 743 { 744 struct nvme_command c = { }; 745 746 memset(s, 0, sizeof(*s)); 747 748 c.directive.opcode = nvme_admin_directive_recv; 749 c.directive.nsid = cpu_to_le32(nsid); 750 c.directive.numd = cpu_to_le32(nvme_bytes_to_numd(sizeof(*s))); 751 c.directive.doper = NVME_DIR_RCV_ST_OP_PARAM; 752 c.directive.dtype = NVME_DIR_STREAMS; 753 754 return nvme_submit_sync_cmd(ctrl->admin_q, &c, s, sizeof(*s)); 755 } 756 757 static int nvme_configure_directives(struct nvme_ctrl *ctrl) 758 { 759 struct streams_directive_params s; 760 int ret; 761 762 if (!(ctrl->oacs & NVME_CTRL_OACS_DIRECTIVES)) 763 return 0; 764 if (!streams) 765 return 0; 766 767 ret = nvme_enable_streams(ctrl); 768 if (ret) 769 return ret; 770 771 ret = nvme_get_stream_params(ctrl, &s, NVME_NSID_ALL); 772 if (ret) 773 goto out_disable_stream; 774 775 ctrl->nssa = le16_to_cpu(s.nssa); 776 if (ctrl->nssa < BLK_MAX_WRITE_HINTS - 1) { 777 dev_info(ctrl->device, "too few streams (%u) available\n", 778 ctrl->nssa); 779 goto out_disable_stream; 780 } 781 782 ctrl->nr_streams = min_t(u16, ctrl->nssa, BLK_MAX_WRITE_HINTS - 1); 783 dev_info(ctrl->device, "Using %u streams\n", ctrl->nr_streams); 784 return 0; 785 786 out_disable_stream: 787 nvme_disable_streams(ctrl); 788 return ret; 789 } 790 791 /* 792 * Check if 'req' has a write hint associated with it. If it does, assign 793 * a valid namespace stream to the write. 794 */ 795 static void nvme_assign_write_stream(struct nvme_ctrl *ctrl, 796 struct request *req, u16 *control, 797 u32 *dsmgmt) 798 { 799 enum rw_hint streamid = req->write_hint; 800 801 if (streamid == WRITE_LIFE_NOT_SET || streamid == WRITE_LIFE_NONE) 802 streamid = 0; 803 else { 804 streamid--; 805 if (WARN_ON_ONCE(streamid > ctrl->nr_streams)) 806 return; 807 808 *control |= NVME_RW_DTYPE_STREAMS; 809 *dsmgmt |= streamid << 16; 810 } 811 812 if (streamid < ARRAY_SIZE(req->q->write_hints)) 813 req->q->write_hints[streamid] += blk_rq_bytes(req) >> 9; 814 } 815 816 static inline void nvme_setup_flush(struct nvme_ns *ns, 817 struct nvme_command *cmnd) 818 { 819 memset(cmnd, 0, sizeof(*cmnd)); 820 cmnd->common.opcode = nvme_cmd_flush; 821 cmnd->common.nsid = cpu_to_le32(ns->head->ns_id); 822 } 823 824 static blk_status_t nvme_setup_discard(struct nvme_ns *ns, struct request *req, 825 struct nvme_command *cmnd) 826 { 827 unsigned short segments = blk_rq_nr_discard_segments(req), n = 0; 828 struct nvme_dsm_range *range; 829 struct bio *bio; 830 831 /* 832 * Some devices do not consider the DSM 'Number of Ranges' field when 833 * determining how much data to DMA. Always allocate memory for maximum 834 * number of segments to prevent device reading beyond end of buffer. 835 */ 836 static const size_t alloc_size = sizeof(*range) * NVME_DSM_MAX_RANGES; 837 838 range = kzalloc(alloc_size, GFP_ATOMIC | __GFP_NOWARN); 839 if (!range) { 840 /* 841 * If we fail allocation our range, fallback to the controller 842 * discard page. If that's also busy, it's safe to return 843 * busy, as we know we can make progress once that's freed. 844 */ 845 if (test_and_set_bit_lock(0, &ns->ctrl->discard_page_busy)) 846 return BLK_STS_RESOURCE; 847 848 range = page_address(ns->ctrl->discard_page); 849 } 850 851 __rq_for_each_bio(bio, req) { 852 u64 slba = nvme_sect_to_lba(ns, bio->bi_iter.bi_sector); 853 u32 nlb = bio->bi_iter.bi_size >> ns->lba_shift; 854 855 if (n < segments) { 856 range[n].cattr = cpu_to_le32(0); 857 range[n].nlb = cpu_to_le32(nlb); 858 range[n].slba = cpu_to_le64(slba); 859 } 860 n++; 861 } 862 863 if (WARN_ON_ONCE(n != segments)) { 864 if (virt_to_page(range) == ns->ctrl->discard_page) 865 clear_bit_unlock(0, &ns->ctrl->discard_page_busy); 866 else 867 kfree(range); 868 return BLK_STS_IOERR; 869 } 870 871 memset(cmnd, 0, sizeof(*cmnd)); 872 cmnd->dsm.opcode = nvme_cmd_dsm; 873 cmnd->dsm.nsid = cpu_to_le32(ns->head->ns_id); 874 cmnd->dsm.nr = cpu_to_le32(segments - 1); 875 cmnd->dsm.attributes = cpu_to_le32(NVME_DSMGMT_AD); 876 877 req->special_vec.bv_page = virt_to_page(range); 878 req->special_vec.bv_offset = offset_in_page(range); 879 req->special_vec.bv_len = alloc_size; 880 req->rq_flags |= RQF_SPECIAL_PAYLOAD; 881 882 return BLK_STS_OK; 883 } 884 885 static inline blk_status_t nvme_setup_write_zeroes(struct nvme_ns *ns, 886 struct request *req, struct nvme_command *cmnd) 887 { 888 memset(cmnd, 0, sizeof(*cmnd)); 889 890 if (ns->ctrl->quirks & NVME_QUIRK_DEALLOCATE_ZEROES) 891 return nvme_setup_discard(ns, req, cmnd); 892 893 cmnd->write_zeroes.opcode = nvme_cmd_write_zeroes; 894 cmnd->write_zeroes.nsid = cpu_to_le32(ns->head->ns_id); 895 cmnd->write_zeroes.slba = 896 cpu_to_le64(nvme_sect_to_lba(ns, blk_rq_pos(req))); 897 cmnd->write_zeroes.length = 898 cpu_to_le16((blk_rq_bytes(req) >> ns->lba_shift) - 1); 899 900 if (nvme_ns_has_pi(ns)) { 901 cmnd->write_zeroes.control = cpu_to_le16(NVME_RW_PRINFO_PRACT); 902 903 switch (ns->pi_type) { 904 case NVME_NS_DPS_PI_TYPE1: 905 case NVME_NS_DPS_PI_TYPE2: 906 cmnd->write_zeroes.reftag = 907 cpu_to_le32(t10_pi_ref_tag(req)); 908 break; 909 } 910 } 911 912 return BLK_STS_OK; 913 } 914 915 static inline blk_status_t nvme_setup_rw(struct nvme_ns *ns, 916 struct request *req, struct nvme_command *cmnd, 917 enum nvme_opcode op) 918 { 919 struct nvme_ctrl *ctrl = ns->ctrl; 920 u16 control = 0; 921 u32 dsmgmt = 0; 922 923 if (req->cmd_flags & REQ_FUA) 924 control |= NVME_RW_FUA; 925 if (req->cmd_flags & (REQ_FAILFAST_DEV | REQ_RAHEAD)) 926 control |= NVME_RW_LR; 927 928 if (req->cmd_flags & REQ_RAHEAD) 929 dsmgmt |= NVME_RW_DSM_FREQ_PREFETCH; 930 931 cmnd->rw.opcode = op; 932 cmnd->rw.flags = 0; 933 cmnd->rw.nsid = cpu_to_le32(ns->head->ns_id); 934 cmnd->rw.rsvd2 = 0; 935 cmnd->rw.metadata = 0; 936 cmnd->rw.slba = cpu_to_le64(nvme_sect_to_lba(ns, blk_rq_pos(req))); 937 cmnd->rw.length = cpu_to_le16((blk_rq_bytes(req) >> ns->lba_shift) - 1); 938 cmnd->rw.reftag = 0; 939 cmnd->rw.apptag = 0; 940 cmnd->rw.appmask = 0; 941 942 if (req_op(req) == REQ_OP_WRITE && ctrl->nr_streams) 943 nvme_assign_write_stream(ctrl, req, &control, &dsmgmt); 944 945 if (ns->ms) { 946 /* 947 * If formated with metadata, the block layer always provides a 948 * metadata buffer if CONFIG_BLK_DEV_INTEGRITY is enabled. Else 949 * we enable the PRACT bit for protection information or set the 950 * namespace capacity to zero to prevent any I/O. 951 */ 952 if (!blk_integrity_rq(req)) { 953 if (WARN_ON_ONCE(!nvme_ns_has_pi(ns))) 954 return BLK_STS_NOTSUPP; 955 control |= NVME_RW_PRINFO_PRACT; 956 } 957 958 switch (ns->pi_type) { 959 case NVME_NS_DPS_PI_TYPE3: 960 control |= NVME_RW_PRINFO_PRCHK_GUARD; 961 break; 962 case NVME_NS_DPS_PI_TYPE1: 963 case NVME_NS_DPS_PI_TYPE2: 964 control |= NVME_RW_PRINFO_PRCHK_GUARD | 965 NVME_RW_PRINFO_PRCHK_REF; 966 if (op == nvme_cmd_zone_append) 967 control |= NVME_RW_APPEND_PIREMAP; 968 cmnd->rw.reftag = cpu_to_le32(t10_pi_ref_tag(req)); 969 break; 970 } 971 } 972 973 cmnd->rw.control = cpu_to_le16(control); 974 cmnd->rw.dsmgmt = cpu_to_le32(dsmgmt); 975 return 0; 976 } 977 978 void nvme_cleanup_cmd(struct request *req) 979 { 980 if (req->rq_flags & RQF_SPECIAL_PAYLOAD) { 981 struct nvme_ctrl *ctrl = nvme_req(req)->ctrl; 982 983 if (req->special_vec.bv_page == ctrl->discard_page) 984 clear_bit_unlock(0, &ctrl->discard_page_busy); 985 else 986 kfree(bvec_virt(&req->special_vec)); 987 } 988 } 989 EXPORT_SYMBOL_GPL(nvme_cleanup_cmd); 990 991 blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req) 992 { 993 struct nvme_command *cmd = nvme_req(req)->cmd; 994 struct nvme_ctrl *ctrl = nvme_req(req)->ctrl; 995 blk_status_t ret = BLK_STS_OK; 996 997 if (!(req->rq_flags & RQF_DONTPREP)) 998 nvme_clear_nvme_request(req); 999 1000 switch (req_op(req)) { 1001 case REQ_OP_DRV_IN: 1002 case REQ_OP_DRV_OUT: 1003 /* these are setup prior to execution in nvme_init_request() */ 1004 break; 1005 case REQ_OP_FLUSH: 1006 nvme_setup_flush(ns, cmd); 1007 break; 1008 case REQ_OP_ZONE_RESET_ALL: 1009 case REQ_OP_ZONE_RESET: 1010 ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_RESET); 1011 break; 1012 case REQ_OP_ZONE_OPEN: 1013 ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_OPEN); 1014 break; 1015 case REQ_OP_ZONE_CLOSE: 1016 ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_CLOSE); 1017 break; 1018 case REQ_OP_ZONE_FINISH: 1019 ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_FINISH); 1020 break; 1021 case REQ_OP_WRITE_ZEROES: 1022 ret = nvme_setup_write_zeroes(ns, req, cmd); 1023 break; 1024 case REQ_OP_DISCARD: 1025 ret = nvme_setup_discard(ns, req, cmd); 1026 break; 1027 case REQ_OP_READ: 1028 ret = nvme_setup_rw(ns, req, cmd, nvme_cmd_read); 1029 break; 1030 case REQ_OP_WRITE: 1031 ret = nvme_setup_rw(ns, req, cmd, nvme_cmd_write); 1032 break; 1033 case REQ_OP_ZONE_APPEND: 1034 ret = nvme_setup_rw(ns, req, cmd, nvme_cmd_zone_append); 1035 break; 1036 default: 1037 WARN_ON_ONCE(1); 1038 return BLK_STS_IOERR; 1039 } 1040 1041 if (!(ctrl->quirks & NVME_QUIRK_SKIP_CID_GEN)) 1042 nvme_req(req)->genctr++; 1043 cmd->common.command_id = nvme_cid(req); 1044 trace_nvme_setup_cmd(req, cmd); 1045 return ret; 1046 } 1047 EXPORT_SYMBOL_GPL(nvme_setup_cmd); 1048 1049 /* 1050 * Return values: 1051 * 0: success 1052 * >0: nvme controller's cqe status response 1053 * <0: kernel error in lieu of controller response 1054 */ 1055 static int nvme_execute_rq(struct gendisk *disk, struct request *rq, 1056 bool at_head) 1057 { 1058 blk_status_t status; 1059 1060 status = blk_execute_rq(disk, rq, at_head); 1061 if (nvme_req(rq)->flags & NVME_REQ_CANCELLED) 1062 return -EINTR; 1063 if (nvme_req(rq)->status) 1064 return nvme_req(rq)->status; 1065 return blk_status_to_errno(status); 1066 } 1067 1068 /* 1069 * Returns 0 on success. If the result is negative, it's a Linux error code; 1070 * if the result is positive, it's an NVM Express status code 1071 */ 1072 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 1073 union nvme_result *result, void *buffer, unsigned bufflen, 1074 unsigned timeout, int qid, int at_head, 1075 blk_mq_req_flags_t flags) 1076 { 1077 struct request *req; 1078 int ret; 1079 1080 if (qid == NVME_QID_ANY) 1081 req = nvme_alloc_request(q, cmd, flags); 1082 else 1083 req = nvme_alloc_request_qid(q, cmd, flags, qid); 1084 if (IS_ERR(req)) 1085 return PTR_ERR(req); 1086 1087 if (timeout) 1088 req->timeout = timeout; 1089 1090 if (buffer && bufflen) { 1091 ret = blk_rq_map_kern(q, req, buffer, bufflen, GFP_KERNEL); 1092 if (ret) 1093 goto out; 1094 } 1095 1096 ret = nvme_execute_rq(NULL, req, at_head); 1097 if (result && ret >= 0) 1098 *result = nvme_req(req)->result; 1099 out: 1100 blk_mq_free_request(req); 1101 return ret; 1102 } 1103 EXPORT_SYMBOL_GPL(__nvme_submit_sync_cmd); 1104 1105 int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 1106 void *buffer, unsigned bufflen) 1107 { 1108 return __nvme_submit_sync_cmd(q, cmd, NULL, buffer, bufflen, 0, 1109 NVME_QID_ANY, 0, 0); 1110 } 1111 EXPORT_SYMBOL_GPL(nvme_submit_sync_cmd); 1112 1113 static u32 nvme_known_admin_effects(u8 opcode) 1114 { 1115 switch (opcode) { 1116 case nvme_admin_format_nvm: 1117 return NVME_CMD_EFFECTS_LBCC | NVME_CMD_EFFECTS_NCC | 1118 NVME_CMD_EFFECTS_CSE_MASK; 1119 case nvme_admin_sanitize_nvm: 1120 return NVME_CMD_EFFECTS_LBCC | NVME_CMD_EFFECTS_CSE_MASK; 1121 default: 1122 break; 1123 } 1124 return 0; 1125 } 1126 1127 u32 nvme_command_effects(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u8 opcode) 1128 { 1129 u32 effects = 0; 1130 1131 if (ns) { 1132 if (ns->head->effects) 1133 effects = le32_to_cpu(ns->head->effects->iocs[opcode]); 1134 if (effects & ~(NVME_CMD_EFFECTS_CSUPP | NVME_CMD_EFFECTS_LBCC)) 1135 dev_warn_once(ctrl->device, 1136 "IO command:%02x has unhandled effects:%08x\n", 1137 opcode, effects); 1138 return 0; 1139 } 1140 1141 if (ctrl->effects) 1142 effects = le32_to_cpu(ctrl->effects->acs[opcode]); 1143 effects |= nvme_known_admin_effects(opcode); 1144 1145 return effects; 1146 } 1147 EXPORT_SYMBOL_NS_GPL(nvme_command_effects, NVME_TARGET_PASSTHRU); 1148 1149 static u32 nvme_passthru_start(struct nvme_ctrl *ctrl, struct nvme_ns *ns, 1150 u8 opcode) 1151 { 1152 u32 effects = nvme_command_effects(ctrl, ns, opcode); 1153 1154 /* 1155 * For simplicity, IO to all namespaces is quiesced even if the command 1156 * effects say only one namespace is affected. 1157 */ 1158 if (effects & NVME_CMD_EFFECTS_CSE_MASK) { 1159 mutex_lock(&ctrl->scan_lock); 1160 mutex_lock(&ctrl->subsys->lock); 1161 nvme_mpath_start_freeze(ctrl->subsys); 1162 nvme_mpath_wait_freeze(ctrl->subsys); 1163 nvme_start_freeze(ctrl); 1164 nvme_wait_freeze(ctrl); 1165 } 1166 return effects; 1167 } 1168 1169 static void nvme_passthru_end(struct nvme_ctrl *ctrl, u32 effects, 1170 struct nvme_command *cmd, int status) 1171 { 1172 if (effects & NVME_CMD_EFFECTS_CSE_MASK) { 1173 nvme_unfreeze(ctrl); 1174 nvme_mpath_unfreeze(ctrl->subsys); 1175 mutex_unlock(&ctrl->subsys->lock); 1176 nvme_remove_invalid_namespaces(ctrl, NVME_NSID_ALL); 1177 mutex_unlock(&ctrl->scan_lock); 1178 } 1179 if (effects & NVME_CMD_EFFECTS_CCC) 1180 nvme_init_ctrl_finish(ctrl); 1181 if (effects & (NVME_CMD_EFFECTS_NIC | NVME_CMD_EFFECTS_NCC)) { 1182 nvme_queue_scan(ctrl); 1183 flush_work(&ctrl->scan_work); 1184 } 1185 1186 switch (cmd->common.opcode) { 1187 case nvme_admin_set_features: 1188 switch (le32_to_cpu(cmd->common.cdw10) & 0xFF) { 1189 case NVME_FEAT_KATO: 1190 /* 1191 * Keep alive commands interval on the host should be 1192 * updated when KATO is modified by Set Features 1193 * commands. 1194 */ 1195 if (!status) 1196 nvme_update_keep_alive(ctrl, cmd); 1197 break; 1198 default: 1199 break; 1200 } 1201 break; 1202 default: 1203 break; 1204 } 1205 } 1206 1207 int nvme_execute_passthru_rq(struct request *rq) 1208 { 1209 struct nvme_command *cmd = nvme_req(rq)->cmd; 1210 struct nvme_ctrl *ctrl = nvme_req(rq)->ctrl; 1211 struct nvme_ns *ns = rq->q->queuedata; 1212 struct gendisk *disk = ns ? ns->disk : NULL; 1213 u32 effects; 1214 int ret; 1215 1216 effects = nvme_passthru_start(ctrl, ns, cmd->common.opcode); 1217 ret = nvme_execute_rq(disk, rq, false); 1218 if (effects) /* nothing to be done for zero cmd effects */ 1219 nvme_passthru_end(ctrl, effects, cmd, ret); 1220 1221 return ret; 1222 } 1223 EXPORT_SYMBOL_NS_GPL(nvme_execute_passthru_rq, NVME_TARGET_PASSTHRU); 1224 1225 /* 1226 * Recommended frequency for KATO commands per NVMe 1.4 section 7.12.1: 1227 * 1228 * The host should send Keep Alive commands at half of the Keep Alive Timeout 1229 * accounting for transport roundtrip times [..]. 1230 */ 1231 static void nvme_queue_keep_alive_work(struct nvme_ctrl *ctrl) 1232 { 1233 queue_delayed_work(nvme_wq, &ctrl->ka_work, ctrl->kato * HZ / 2); 1234 } 1235 1236 static void nvme_keep_alive_end_io(struct request *rq, blk_status_t status) 1237 { 1238 struct nvme_ctrl *ctrl = rq->end_io_data; 1239 unsigned long flags; 1240 bool startka = false; 1241 1242 blk_mq_free_request(rq); 1243 1244 if (status) { 1245 dev_err(ctrl->device, 1246 "failed nvme_keep_alive_end_io error=%d\n", 1247 status); 1248 return; 1249 } 1250 1251 ctrl->comp_seen = false; 1252 spin_lock_irqsave(&ctrl->lock, flags); 1253 if (ctrl->state == NVME_CTRL_LIVE || 1254 ctrl->state == NVME_CTRL_CONNECTING) 1255 startka = true; 1256 spin_unlock_irqrestore(&ctrl->lock, flags); 1257 if (startka) 1258 nvme_queue_keep_alive_work(ctrl); 1259 } 1260 1261 static void nvme_keep_alive_work(struct work_struct *work) 1262 { 1263 struct nvme_ctrl *ctrl = container_of(to_delayed_work(work), 1264 struct nvme_ctrl, ka_work); 1265 bool comp_seen = ctrl->comp_seen; 1266 struct request *rq; 1267 1268 if ((ctrl->ctratt & NVME_CTRL_ATTR_TBKAS) && comp_seen) { 1269 dev_dbg(ctrl->device, 1270 "reschedule traffic based keep-alive timer\n"); 1271 ctrl->comp_seen = false; 1272 nvme_queue_keep_alive_work(ctrl); 1273 return; 1274 } 1275 1276 rq = nvme_alloc_request(ctrl->admin_q, &ctrl->ka_cmd, 1277 BLK_MQ_REQ_RESERVED | BLK_MQ_REQ_NOWAIT); 1278 if (IS_ERR(rq)) { 1279 /* allocation failure, reset the controller */ 1280 dev_err(ctrl->device, "keep-alive failed: %ld\n", PTR_ERR(rq)); 1281 nvme_reset_ctrl(ctrl); 1282 return; 1283 } 1284 1285 rq->timeout = ctrl->kato * HZ; 1286 rq->end_io_data = ctrl; 1287 blk_execute_rq_nowait(NULL, rq, 0, nvme_keep_alive_end_io); 1288 } 1289 1290 static void nvme_start_keep_alive(struct nvme_ctrl *ctrl) 1291 { 1292 if (unlikely(ctrl->kato == 0)) 1293 return; 1294 1295 nvme_queue_keep_alive_work(ctrl); 1296 } 1297 1298 void nvme_stop_keep_alive(struct nvme_ctrl *ctrl) 1299 { 1300 if (unlikely(ctrl->kato == 0)) 1301 return; 1302 1303 cancel_delayed_work_sync(&ctrl->ka_work); 1304 } 1305 EXPORT_SYMBOL_GPL(nvme_stop_keep_alive); 1306 1307 static void nvme_update_keep_alive(struct nvme_ctrl *ctrl, 1308 struct nvme_command *cmd) 1309 { 1310 unsigned int new_kato = 1311 DIV_ROUND_UP(le32_to_cpu(cmd->common.cdw11), 1000); 1312 1313 dev_info(ctrl->device, 1314 "keep alive interval updated from %u ms to %u ms\n", 1315 ctrl->kato * 1000 / 2, new_kato * 1000 / 2); 1316 1317 nvme_stop_keep_alive(ctrl); 1318 ctrl->kato = new_kato; 1319 nvme_start_keep_alive(ctrl); 1320 } 1321 1322 /* 1323 * In NVMe 1.0 the CNS field was just a binary controller or namespace 1324 * flag, thus sending any new CNS opcodes has a big chance of not working. 1325 * Qemu unfortunately had that bug after reporting a 1.1 version compliance 1326 * (but not for any later version). 1327 */ 1328 static bool nvme_ctrl_limited_cns(struct nvme_ctrl *ctrl) 1329 { 1330 if (ctrl->quirks & NVME_QUIRK_IDENTIFY_CNS) 1331 return ctrl->vs < NVME_VS(1, 2, 0); 1332 return ctrl->vs < NVME_VS(1, 1, 0); 1333 } 1334 1335 static int nvme_identify_ctrl(struct nvme_ctrl *dev, struct nvme_id_ctrl **id) 1336 { 1337 struct nvme_command c = { }; 1338 int error; 1339 1340 /* gcc-4.4.4 (at least) has issues with initializers and anon unions */ 1341 c.identify.opcode = nvme_admin_identify; 1342 c.identify.cns = NVME_ID_CNS_CTRL; 1343 1344 *id = kmalloc(sizeof(struct nvme_id_ctrl), GFP_KERNEL); 1345 if (!*id) 1346 return -ENOMEM; 1347 1348 error = nvme_submit_sync_cmd(dev->admin_q, &c, *id, 1349 sizeof(struct nvme_id_ctrl)); 1350 if (error) 1351 kfree(*id); 1352 return error; 1353 } 1354 1355 static int nvme_process_ns_desc(struct nvme_ctrl *ctrl, struct nvme_ns_ids *ids, 1356 struct nvme_ns_id_desc *cur, bool *csi_seen) 1357 { 1358 const char *warn_str = "ctrl returned bogus length:"; 1359 void *data = cur; 1360 1361 switch (cur->nidt) { 1362 case NVME_NIDT_EUI64: 1363 if (cur->nidl != NVME_NIDT_EUI64_LEN) { 1364 dev_warn(ctrl->device, "%s %d for NVME_NIDT_EUI64\n", 1365 warn_str, cur->nidl); 1366 return -1; 1367 } 1368 memcpy(ids->eui64, data + sizeof(*cur), NVME_NIDT_EUI64_LEN); 1369 return NVME_NIDT_EUI64_LEN; 1370 case NVME_NIDT_NGUID: 1371 if (cur->nidl != NVME_NIDT_NGUID_LEN) { 1372 dev_warn(ctrl->device, "%s %d for NVME_NIDT_NGUID\n", 1373 warn_str, cur->nidl); 1374 return -1; 1375 } 1376 memcpy(ids->nguid, data + sizeof(*cur), NVME_NIDT_NGUID_LEN); 1377 return NVME_NIDT_NGUID_LEN; 1378 case NVME_NIDT_UUID: 1379 if (cur->nidl != NVME_NIDT_UUID_LEN) { 1380 dev_warn(ctrl->device, "%s %d for NVME_NIDT_UUID\n", 1381 warn_str, cur->nidl); 1382 return -1; 1383 } 1384 uuid_copy(&ids->uuid, data + sizeof(*cur)); 1385 return NVME_NIDT_UUID_LEN; 1386 case NVME_NIDT_CSI: 1387 if (cur->nidl != NVME_NIDT_CSI_LEN) { 1388 dev_warn(ctrl->device, "%s %d for NVME_NIDT_CSI\n", 1389 warn_str, cur->nidl); 1390 return -1; 1391 } 1392 memcpy(&ids->csi, data + sizeof(*cur), NVME_NIDT_CSI_LEN); 1393 *csi_seen = true; 1394 return NVME_NIDT_CSI_LEN; 1395 default: 1396 /* Skip unknown types */ 1397 return cur->nidl; 1398 } 1399 } 1400 1401 static int nvme_identify_ns_descs(struct nvme_ctrl *ctrl, unsigned nsid, 1402 struct nvme_ns_ids *ids) 1403 { 1404 struct nvme_command c = { }; 1405 bool csi_seen = false; 1406 int status, pos, len; 1407 void *data; 1408 1409 if (ctrl->vs < NVME_VS(1, 3, 0) && !nvme_multi_css(ctrl)) 1410 return 0; 1411 if (ctrl->quirks & NVME_QUIRK_NO_NS_DESC_LIST) 1412 return 0; 1413 1414 c.identify.opcode = nvme_admin_identify; 1415 c.identify.nsid = cpu_to_le32(nsid); 1416 c.identify.cns = NVME_ID_CNS_NS_DESC_LIST; 1417 1418 data = kzalloc(NVME_IDENTIFY_DATA_SIZE, GFP_KERNEL); 1419 if (!data) 1420 return -ENOMEM; 1421 1422 status = nvme_submit_sync_cmd(ctrl->admin_q, &c, data, 1423 NVME_IDENTIFY_DATA_SIZE); 1424 if (status) { 1425 dev_warn(ctrl->device, 1426 "Identify Descriptors failed (nsid=%u, status=0x%x)\n", 1427 nsid, status); 1428 goto free_data; 1429 } 1430 1431 for (pos = 0; pos < NVME_IDENTIFY_DATA_SIZE; pos += len) { 1432 struct nvme_ns_id_desc *cur = data + pos; 1433 1434 if (cur->nidl == 0) 1435 break; 1436 1437 len = nvme_process_ns_desc(ctrl, ids, cur, &csi_seen); 1438 if (len < 0) 1439 break; 1440 1441 len += sizeof(*cur); 1442 } 1443 1444 if (nvme_multi_css(ctrl) && !csi_seen) { 1445 dev_warn(ctrl->device, "Command set not reported for nsid:%d\n", 1446 nsid); 1447 status = -EINVAL; 1448 } 1449 1450 free_data: 1451 kfree(data); 1452 return status; 1453 } 1454 1455 static int nvme_identify_ns(struct nvme_ctrl *ctrl, unsigned nsid, 1456 struct nvme_ns_ids *ids, struct nvme_id_ns **id) 1457 { 1458 struct nvme_command c = { }; 1459 int error; 1460 1461 /* gcc-4.4.4 (at least) has issues with initializers and anon unions */ 1462 c.identify.opcode = nvme_admin_identify; 1463 c.identify.nsid = cpu_to_le32(nsid); 1464 c.identify.cns = NVME_ID_CNS_NS; 1465 1466 *id = kmalloc(sizeof(**id), GFP_KERNEL); 1467 if (!*id) 1468 return -ENOMEM; 1469 1470 error = nvme_submit_sync_cmd(ctrl->admin_q, &c, *id, sizeof(**id)); 1471 if (error) { 1472 dev_warn(ctrl->device, "Identify namespace failed (%d)\n", error); 1473 goto out_free_id; 1474 } 1475 1476 error = NVME_SC_INVALID_NS | NVME_SC_DNR; 1477 if ((*id)->ncap == 0) /* namespace not allocated or attached */ 1478 goto out_free_id; 1479 1480 if (ctrl->vs >= NVME_VS(1, 1, 0) && 1481 !memchr_inv(ids->eui64, 0, sizeof(ids->eui64))) 1482 memcpy(ids->eui64, (*id)->eui64, sizeof(ids->eui64)); 1483 if (ctrl->vs >= NVME_VS(1, 2, 0) && 1484 !memchr_inv(ids->nguid, 0, sizeof(ids->nguid))) 1485 memcpy(ids->nguid, (*id)->nguid, sizeof(ids->nguid)); 1486 1487 return 0; 1488 1489 out_free_id: 1490 kfree(*id); 1491 return error; 1492 } 1493 1494 static int nvme_features(struct nvme_ctrl *dev, u8 op, unsigned int fid, 1495 unsigned int dword11, void *buffer, size_t buflen, u32 *result) 1496 { 1497 union nvme_result res = { 0 }; 1498 struct nvme_command c = { }; 1499 int ret; 1500 1501 c.features.opcode = op; 1502 c.features.fid = cpu_to_le32(fid); 1503 c.features.dword11 = cpu_to_le32(dword11); 1504 1505 ret = __nvme_submit_sync_cmd(dev->admin_q, &c, &res, 1506 buffer, buflen, 0, NVME_QID_ANY, 0, 0); 1507 if (ret >= 0 && result) 1508 *result = le32_to_cpu(res.u32); 1509 return ret; 1510 } 1511 1512 int nvme_set_features(struct nvme_ctrl *dev, unsigned int fid, 1513 unsigned int dword11, void *buffer, size_t buflen, 1514 u32 *result) 1515 { 1516 return nvme_features(dev, nvme_admin_set_features, fid, dword11, buffer, 1517 buflen, result); 1518 } 1519 EXPORT_SYMBOL_GPL(nvme_set_features); 1520 1521 int nvme_get_features(struct nvme_ctrl *dev, unsigned int fid, 1522 unsigned int dword11, void *buffer, size_t buflen, 1523 u32 *result) 1524 { 1525 return nvme_features(dev, nvme_admin_get_features, fid, dword11, buffer, 1526 buflen, result); 1527 } 1528 EXPORT_SYMBOL_GPL(nvme_get_features); 1529 1530 int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count) 1531 { 1532 u32 q_count = (*count - 1) | ((*count - 1) << 16); 1533 u32 result; 1534 int status, nr_io_queues; 1535 1536 status = nvme_set_features(ctrl, NVME_FEAT_NUM_QUEUES, q_count, NULL, 0, 1537 &result); 1538 if (status < 0) 1539 return status; 1540 1541 /* 1542 * Degraded controllers might return an error when setting the queue 1543 * count. We still want to be able to bring them online and offer 1544 * access to the admin queue, as that might be only way to fix them up. 1545 */ 1546 if (status > 0) { 1547 dev_err(ctrl->device, "Could not set queue count (%d)\n", status); 1548 *count = 0; 1549 } else { 1550 nr_io_queues = min(result & 0xffff, result >> 16) + 1; 1551 *count = min(*count, nr_io_queues); 1552 } 1553 1554 return 0; 1555 } 1556 EXPORT_SYMBOL_GPL(nvme_set_queue_count); 1557 1558 #define NVME_AEN_SUPPORTED \ 1559 (NVME_AEN_CFG_NS_ATTR | NVME_AEN_CFG_FW_ACT | \ 1560 NVME_AEN_CFG_ANA_CHANGE | NVME_AEN_CFG_DISC_CHANGE) 1561 1562 static void nvme_enable_aen(struct nvme_ctrl *ctrl) 1563 { 1564 u32 result, supported_aens = ctrl->oaes & NVME_AEN_SUPPORTED; 1565 int status; 1566 1567 if (!supported_aens) 1568 return; 1569 1570 status = nvme_set_features(ctrl, NVME_FEAT_ASYNC_EVENT, supported_aens, 1571 NULL, 0, &result); 1572 if (status) 1573 dev_warn(ctrl->device, "Failed to configure AEN (cfg %x)\n", 1574 supported_aens); 1575 1576 queue_work(nvme_wq, &ctrl->async_event_work); 1577 } 1578 1579 static int nvme_ns_open(struct nvme_ns *ns) 1580 { 1581 1582 /* should never be called due to GENHD_FL_HIDDEN */ 1583 if (WARN_ON_ONCE(nvme_ns_head_multipath(ns->head))) 1584 goto fail; 1585 if (!nvme_get_ns(ns)) 1586 goto fail; 1587 if (!try_module_get(ns->ctrl->ops->module)) 1588 goto fail_put_ns; 1589 1590 return 0; 1591 1592 fail_put_ns: 1593 nvme_put_ns(ns); 1594 fail: 1595 return -ENXIO; 1596 } 1597 1598 static void nvme_ns_release(struct nvme_ns *ns) 1599 { 1600 1601 module_put(ns->ctrl->ops->module); 1602 nvme_put_ns(ns); 1603 } 1604 1605 static int nvme_open(struct block_device *bdev, fmode_t mode) 1606 { 1607 return nvme_ns_open(bdev->bd_disk->private_data); 1608 } 1609 1610 static void nvme_release(struct gendisk *disk, fmode_t mode) 1611 { 1612 nvme_ns_release(disk->private_data); 1613 } 1614 1615 int nvme_getgeo(struct block_device *bdev, struct hd_geometry *geo) 1616 { 1617 /* some standard values */ 1618 geo->heads = 1 << 6; 1619 geo->sectors = 1 << 5; 1620 geo->cylinders = get_capacity(bdev->bd_disk) >> 11; 1621 return 0; 1622 } 1623 1624 #ifdef CONFIG_BLK_DEV_INTEGRITY 1625 static void nvme_init_integrity(struct gendisk *disk, u16 ms, u8 pi_type, 1626 u32 max_integrity_segments) 1627 { 1628 struct blk_integrity integrity = { }; 1629 1630 switch (pi_type) { 1631 case NVME_NS_DPS_PI_TYPE3: 1632 integrity.profile = &t10_pi_type3_crc; 1633 integrity.tag_size = sizeof(u16) + sizeof(u32); 1634 integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE; 1635 break; 1636 case NVME_NS_DPS_PI_TYPE1: 1637 case NVME_NS_DPS_PI_TYPE2: 1638 integrity.profile = &t10_pi_type1_crc; 1639 integrity.tag_size = sizeof(u16); 1640 integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE; 1641 break; 1642 default: 1643 integrity.profile = NULL; 1644 break; 1645 } 1646 integrity.tuple_size = ms; 1647 blk_integrity_register(disk, &integrity); 1648 blk_queue_max_integrity_segments(disk->queue, max_integrity_segments); 1649 } 1650 #else 1651 static void nvme_init_integrity(struct gendisk *disk, u16 ms, u8 pi_type, 1652 u32 max_integrity_segments) 1653 { 1654 } 1655 #endif /* CONFIG_BLK_DEV_INTEGRITY */ 1656 1657 static void nvme_config_discard(struct gendisk *disk, struct nvme_ns *ns) 1658 { 1659 struct nvme_ctrl *ctrl = ns->ctrl; 1660 struct request_queue *queue = disk->queue; 1661 u32 size = queue_logical_block_size(queue); 1662 1663 if (ctrl->max_discard_sectors == 0) { 1664 blk_queue_flag_clear(QUEUE_FLAG_DISCARD, queue); 1665 return; 1666 } 1667 1668 if (ctrl->nr_streams && ns->sws && ns->sgs) 1669 size *= ns->sws * ns->sgs; 1670 1671 BUILD_BUG_ON(PAGE_SIZE / sizeof(struct nvme_dsm_range) < 1672 NVME_DSM_MAX_RANGES); 1673 1674 queue->limits.discard_alignment = 0; 1675 queue->limits.discard_granularity = size; 1676 1677 /* If discard is already enabled, don't reset queue limits */ 1678 if (blk_queue_flag_test_and_set(QUEUE_FLAG_DISCARD, queue)) 1679 return; 1680 1681 blk_queue_max_discard_sectors(queue, ctrl->max_discard_sectors); 1682 blk_queue_max_discard_segments(queue, ctrl->max_discard_segments); 1683 1684 if (ctrl->quirks & NVME_QUIRK_DEALLOCATE_ZEROES) 1685 blk_queue_max_write_zeroes_sectors(queue, UINT_MAX); 1686 } 1687 1688 static bool nvme_ns_ids_valid(struct nvme_ns_ids *ids) 1689 { 1690 return !uuid_is_null(&ids->uuid) || 1691 memchr_inv(ids->nguid, 0, sizeof(ids->nguid)) || 1692 memchr_inv(ids->eui64, 0, sizeof(ids->eui64)); 1693 } 1694 1695 static bool nvme_ns_ids_equal(struct nvme_ns_ids *a, struct nvme_ns_ids *b) 1696 { 1697 return uuid_equal(&a->uuid, &b->uuid) && 1698 memcmp(&a->nguid, &b->nguid, sizeof(a->nguid)) == 0 && 1699 memcmp(&a->eui64, &b->eui64, sizeof(a->eui64)) == 0 && 1700 a->csi == b->csi; 1701 } 1702 1703 static int nvme_setup_streams_ns(struct nvme_ctrl *ctrl, struct nvme_ns *ns, 1704 u32 *phys_bs, u32 *io_opt) 1705 { 1706 struct streams_directive_params s; 1707 int ret; 1708 1709 if (!ctrl->nr_streams) 1710 return 0; 1711 1712 ret = nvme_get_stream_params(ctrl, &s, ns->head->ns_id); 1713 if (ret) 1714 return ret; 1715 1716 ns->sws = le32_to_cpu(s.sws); 1717 ns->sgs = le16_to_cpu(s.sgs); 1718 1719 if (ns->sws) { 1720 *phys_bs = ns->sws * (1 << ns->lba_shift); 1721 if (ns->sgs) 1722 *io_opt = *phys_bs * ns->sgs; 1723 } 1724 1725 return 0; 1726 } 1727 1728 static int nvme_configure_metadata(struct nvme_ns *ns, struct nvme_id_ns *id) 1729 { 1730 struct nvme_ctrl *ctrl = ns->ctrl; 1731 1732 /* 1733 * The PI implementation requires the metadata size to be equal to the 1734 * t10 pi tuple size. 1735 */ 1736 ns->ms = le16_to_cpu(id->lbaf[id->flbas & NVME_NS_FLBAS_LBA_MASK].ms); 1737 if (ns->ms == sizeof(struct t10_pi_tuple)) 1738 ns->pi_type = id->dps & NVME_NS_DPS_PI_MASK; 1739 else 1740 ns->pi_type = 0; 1741 1742 ns->features &= ~(NVME_NS_METADATA_SUPPORTED | NVME_NS_EXT_LBAS); 1743 if (!ns->ms || !(ctrl->ops->flags & NVME_F_METADATA_SUPPORTED)) 1744 return 0; 1745 if (ctrl->ops->flags & NVME_F_FABRICS) { 1746 /* 1747 * The NVMe over Fabrics specification only supports metadata as 1748 * part of the extended data LBA. We rely on HCA/HBA support to 1749 * remap the separate metadata buffer from the block layer. 1750 */ 1751 if (WARN_ON_ONCE(!(id->flbas & NVME_NS_FLBAS_META_EXT))) 1752 return -EINVAL; 1753 1754 ns->features |= NVME_NS_EXT_LBAS; 1755 1756 /* 1757 * The current fabrics transport drivers support namespace 1758 * metadata formats only if nvme_ns_has_pi() returns true. 1759 * Suppress support for all other formats so the namespace will 1760 * have a 0 capacity and not be usable through the block stack. 1761 * 1762 * Note, this check will need to be modified if any drivers 1763 * gain the ability to use other metadata formats. 1764 */ 1765 if (ctrl->max_integrity_segments && nvme_ns_has_pi(ns)) 1766 ns->features |= NVME_NS_METADATA_SUPPORTED; 1767 } else { 1768 /* 1769 * For PCIe controllers, we can't easily remap the separate 1770 * metadata buffer from the block layer and thus require a 1771 * separate metadata buffer for block layer metadata/PI support. 1772 * We allow extended LBAs for the passthrough interface, though. 1773 */ 1774 if (id->flbas & NVME_NS_FLBAS_META_EXT) 1775 ns->features |= NVME_NS_EXT_LBAS; 1776 else 1777 ns->features |= NVME_NS_METADATA_SUPPORTED; 1778 } 1779 1780 return 0; 1781 } 1782 1783 static void nvme_set_queue_limits(struct nvme_ctrl *ctrl, 1784 struct request_queue *q) 1785 { 1786 bool vwc = ctrl->vwc & NVME_CTRL_VWC_PRESENT; 1787 1788 if (ctrl->max_hw_sectors) { 1789 u32 max_segments = 1790 (ctrl->max_hw_sectors / (NVME_CTRL_PAGE_SIZE >> 9)) + 1; 1791 1792 max_segments = min_not_zero(max_segments, ctrl->max_segments); 1793 blk_queue_max_hw_sectors(q, ctrl->max_hw_sectors); 1794 blk_queue_max_segments(q, min_t(u32, max_segments, USHRT_MAX)); 1795 } 1796 blk_queue_virt_boundary(q, NVME_CTRL_PAGE_SIZE - 1); 1797 blk_queue_dma_alignment(q, 7); 1798 blk_queue_write_cache(q, vwc, vwc); 1799 } 1800 1801 static void nvme_update_disk_info(struct gendisk *disk, 1802 struct nvme_ns *ns, struct nvme_id_ns *id) 1803 { 1804 sector_t capacity = nvme_lba_to_sect(ns, le64_to_cpu(id->nsze)); 1805 unsigned short bs = 1 << ns->lba_shift; 1806 u32 atomic_bs, phys_bs, io_opt = 0; 1807 1808 /* 1809 * The block layer can't support LBA sizes larger than the page size 1810 * yet, so catch this early and don't allow block I/O. 1811 */ 1812 if (ns->lba_shift > PAGE_SHIFT) { 1813 capacity = 0; 1814 bs = (1 << 9); 1815 } 1816 1817 blk_integrity_unregister(disk); 1818 1819 atomic_bs = phys_bs = bs; 1820 nvme_setup_streams_ns(ns->ctrl, ns, &phys_bs, &io_opt); 1821 if (id->nabo == 0) { 1822 /* 1823 * Bit 1 indicates whether NAWUPF is defined for this namespace 1824 * and whether it should be used instead of AWUPF. If NAWUPF == 1825 * 0 then AWUPF must be used instead. 1826 */ 1827 if (id->nsfeat & NVME_NS_FEAT_ATOMICS && id->nawupf) 1828 atomic_bs = (1 + le16_to_cpu(id->nawupf)) * bs; 1829 else 1830 atomic_bs = (1 + ns->ctrl->subsys->awupf) * bs; 1831 } 1832 1833 if (id->nsfeat & NVME_NS_FEAT_IO_OPT) { 1834 /* NPWG = Namespace Preferred Write Granularity */ 1835 phys_bs = bs * (1 + le16_to_cpu(id->npwg)); 1836 /* NOWS = Namespace Optimal Write Size */ 1837 io_opt = bs * (1 + le16_to_cpu(id->nows)); 1838 } 1839 1840 blk_queue_logical_block_size(disk->queue, bs); 1841 /* 1842 * Linux filesystems assume writing a single physical block is 1843 * an atomic operation. Hence limit the physical block size to the 1844 * value of the Atomic Write Unit Power Fail parameter. 1845 */ 1846 blk_queue_physical_block_size(disk->queue, min(phys_bs, atomic_bs)); 1847 blk_queue_io_min(disk->queue, phys_bs); 1848 blk_queue_io_opt(disk->queue, io_opt); 1849 1850 /* 1851 * Register a metadata profile for PI, or the plain non-integrity NVMe 1852 * metadata masquerading as Type 0 if supported, otherwise reject block 1853 * I/O to namespaces with metadata except when the namespace supports 1854 * PI, as it can strip/insert in that case. 1855 */ 1856 if (ns->ms) { 1857 if (IS_ENABLED(CONFIG_BLK_DEV_INTEGRITY) && 1858 (ns->features & NVME_NS_METADATA_SUPPORTED)) 1859 nvme_init_integrity(disk, ns->ms, ns->pi_type, 1860 ns->ctrl->max_integrity_segments); 1861 else if (!nvme_ns_has_pi(ns)) 1862 capacity = 0; 1863 } 1864 1865 set_capacity_and_notify(disk, capacity); 1866 1867 nvme_config_discard(disk, ns); 1868 blk_queue_max_write_zeroes_sectors(disk->queue, 1869 ns->ctrl->max_zeroes_sectors); 1870 1871 set_disk_ro(disk, (id->nsattr & NVME_NS_ATTR_RO) || 1872 test_bit(NVME_NS_FORCE_RO, &ns->flags)); 1873 } 1874 1875 static inline bool nvme_first_scan(struct gendisk *disk) 1876 { 1877 /* nvme_alloc_ns() scans the disk prior to adding it */ 1878 return !disk_live(disk); 1879 } 1880 1881 static void nvme_set_chunk_sectors(struct nvme_ns *ns, struct nvme_id_ns *id) 1882 { 1883 struct nvme_ctrl *ctrl = ns->ctrl; 1884 u32 iob; 1885 1886 if ((ctrl->quirks & NVME_QUIRK_STRIPE_SIZE) && 1887 is_power_of_2(ctrl->max_hw_sectors)) 1888 iob = ctrl->max_hw_sectors; 1889 else 1890 iob = nvme_lba_to_sect(ns, le16_to_cpu(id->noiob)); 1891 1892 if (!iob) 1893 return; 1894 1895 if (!is_power_of_2(iob)) { 1896 if (nvme_first_scan(ns->disk)) 1897 pr_warn("%s: ignoring unaligned IO boundary:%u\n", 1898 ns->disk->disk_name, iob); 1899 return; 1900 } 1901 1902 if (blk_queue_is_zoned(ns->disk->queue)) { 1903 if (nvme_first_scan(ns->disk)) 1904 pr_warn("%s: ignoring zoned namespace IO boundary\n", 1905 ns->disk->disk_name); 1906 return; 1907 } 1908 1909 blk_queue_chunk_sectors(ns->queue, iob); 1910 } 1911 1912 static int nvme_update_ns_info(struct nvme_ns *ns, struct nvme_id_ns *id) 1913 { 1914 unsigned lbaf = id->flbas & NVME_NS_FLBAS_LBA_MASK; 1915 int ret; 1916 1917 blk_mq_freeze_queue(ns->disk->queue); 1918 ns->lba_shift = id->lbaf[lbaf].ds; 1919 nvme_set_queue_limits(ns->ctrl, ns->queue); 1920 1921 ret = nvme_configure_metadata(ns, id); 1922 if (ret) 1923 goto out_unfreeze; 1924 nvme_set_chunk_sectors(ns, id); 1925 nvme_update_disk_info(ns->disk, ns, id); 1926 1927 if (ns->head->ids.csi == NVME_CSI_ZNS) { 1928 ret = nvme_update_zone_info(ns, lbaf); 1929 if (ret) 1930 goto out_unfreeze; 1931 } 1932 1933 set_bit(NVME_NS_READY, &ns->flags); 1934 blk_mq_unfreeze_queue(ns->disk->queue); 1935 1936 if (blk_queue_is_zoned(ns->queue)) { 1937 ret = nvme_revalidate_zones(ns); 1938 if (ret && !nvme_first_scan(ns->disk)) 1939 goto out; 1940 } 1941 1942 if (nvme_ns_head_multipath(ns->head)) { 1943 blk_mq_freeze_queue(ns->head->disk->queue); 1944 nvme_update_disk_info(ns->head->disk, ns, id); 1945 nvme_mpath_revalidate_paths(ns); 1946 blk_stack_limits(&ns->head->disk->queue->limits, 1947 &ns->queue->limits, 0); 1948 disk_update_readahead(ns->head->disk); 1949 blk_mq_unfreeze_queue(ns->head->disk->queue); 1950 } 1951 return 0; 1952 1953 out_unfreeze: 1954 blk_mq_unfreeze_queue(ns->disk->queue); 1955 out: 1956 /* 1957 * If probing fails due an unsupported feature, hide the block device, 1958 * but still allow other access. 1959 */ 1960 if (ret == -ENODEV) { 1961 ns->disk->flags |= GENHD_FL_HIDDEN; 1962 ret = 0; 1963 } 1964 return ret; 1965 } 1966 1967 static char nvme_pr_type(enum pr_type type) 1968 { 1969 switch (type) { 1970 case PR_WRITE_EXCLUSIVE: 1971 return 1; 1972 case PR_EXCLUSIVE_ACCESS: 1973 return 2; 1974 case PR_WRITE_EXCLUSIVE_REG_ONLY: 1975 return 3; 1976 case PR_EXCLUSIVE_ACCESS_REG_ONLY: 1977 return 4; 1978 case PR_WRITE_EXCLUSIVE_ALL_REGS: 1979 return 5; 1980 case PR_EXCLUSIVE_ACCESS_ALL_REGS: 1981 return 6; 1982 default: 1983 return 0; 1984 } 1985 }; 1986 1987 static int nvme_send_ns_head_pr_command(struct block_device *bdev, 1988 struct nvme_command *c, u8 data[16]) 1989 { 1990 struct nvme_ns_head *head = bdev->bd_disk->private_data; 1991 int srcu_idx = srcu_read_lock(&head->srcu); 1992 struct nvme_ns *ns = nvme_find_path(head); 1993 int ret = -EWOULDBLOCK; 1994 1995 if (ns) { 1996 c->common.nsid = cpu_to_le32(ns->head->ns_id); 1997 ret = nvme_submit_sync_cmd(ns->queue, c, data, 16); 1998 } 1999 srcu_read_unlock(&head->srcu, srcu_idx); 2000 return ret; 2001 } 2002 2003 static int nvme_send_ns_pr_command(struct nvme_ns *ns, struct nvme_command *c, 2004 u8 data[16]) 2005 { 2006 c->common.nsid = cpu_to_le32(ns->head->ns_id); 2007 return nvme_submit_sync_cmd(ns->queue, c, data, 16); 2008 } 2009 2010 static int nvme_pr_command(struct block_device *bdev, u32 cdw10, 2011 u64 key, u64 sa_key, u8 op) 2012 { 2013 struct nvme_command c = { }; 2014 u8 data[16] = { 0, }; 2015 2016 put_unaligned_le64(key, &data[0]); 2017 put_unaligned_le64(sa_key, &data[8]); 2018 2019 c.common.opcode = op; 2020 c.common.cdw10 = cpu_to_le32(cdw10); 2021 2022 if (IS_ENABLED(CONFIG_NVME_MULTIPATH) && 2023 bdev->bd_disk->fops == &nvme_ns_head_ops) 2024 return nvme_send_ns_head_pr_command(bdev, &c, data); 2025 return nvme_send_ns_pr_command(bdev->bd_disk->private_data, &c, data); 2026 } 2027 2028 static int nvme_pr_register(struct block_device *bdev, u64 old, 2029 u64 new, unsigned flags) 2030 { 2031 u32 cdw10; 2032 2033 if (flags & ~PR_FL_IGNORE_KEY) 2034 return -EOPNOTSUPP; 2035 2036 cdw10 = old ? 2 : 0; 2037 cdw10 |= (flags & PR_FL_IGNORE_KEY) ? 1 << 3 : 0; 2038 cdw10 |= (1 << 30) | (1 << 31); /* PTPL=1 */ 2039 return nvme_pr_command(bdev, cdw10, old, new, nvme_cmd_resv_register); 2040 } 2041 2042 static int nvme_pr_reserve(struct block_device *bdev, u64 key, 2043 enum pr_type type, unsigned flags) 2044 { 2045 u32 cdw10; 2046 2047 if (flags & ~PR_FL_IGNORE_KEY) 2048 return -EOPNOTSUPP; 2049 2050 cdw10 = nvme_pr_type(type) << 8; 2051 cdw10 |= ((flags & PR_FL_IGNORE_KEY) ? 1 << 3 : 0); 2052 return nvme_pr_command(bdev, cdw10, key, 0, nvme_cmd_resv_acquire); 2053 } 2054 2055 static int nvme_pr_preempt(struct block_device *bdev, u64 old, u64 new, 2056 enum pr_type type, bool abort) 2057 { 2058 u32 cdw10 = nvme_pr_type(type) << 8 | (abort ? 2 : 1); 2059 2060 return nvme_pr_command(bdev, cdw10, old, new, nvme_cmd_resv_acquire); 2061 } 2062 2063 static int nvme_pr_clear(struct block_device *bdev, u64 key) 2064 { 2065 u32 cdw10 = 1 | (key ? 1 << 3 : 0); 2066 2067 return nvme_pr_command(bdev, cdw10, key, 0, nvme_cmd_resv_register); 2068 } 2069 2070 static int nvme_pr_release(struct block_device *bdev, u64 key, enum pr_type type) 2071 { 2072 u32 cdw10 = nvme_pr_type(type) << 8 | (key ? 1 << 3 : 0); 2073 2074 return nvme_pr_command(bdev, cdw10, key, 0, nvme_cmd_resv_release); 2075 } 2076 2077 const struct pr_ops nvme_pr_ops = { 2078 .pr_register = nvme_pr_register, 2079 .pr_reserve = nvme_pr_reserve, 2080 .pr_release = nvme_pr_release, 2081 .pr_preempt = nvme_pr_preempt, 2082 .pr_clear = nvme_pr_clear, 2083 }; 2084 2085 #ifdef CONFIG_BLK_SED_OPAL 2086 int nvme_sec_submit(void *data, u16 spsp, u8 secp, void *buffer, size_t len, 2087 bool send) 2088 { 2089 struct nvme_ctrl *ctrl = data; 2090 struct nvme_command cmd = { }; 2091 2092 if (send) 2093 cmd.common.opcode = nvme_admin_security_send; 2094 else 2095 cmd.common.opcode = nvme_admin_security_recv; 2096 cmd.common.nsid = 0; 2097 cmd.common.cdw10 = cpu_to_le32(((u32)secp) << 24 | ((u32)spsp) << 8); 2098 cmd.common.cdw11 = cpu_to_le32(len); 2099 2100 return __nvme_submit_sync_cmd(ctrl->admin_q, &cmd, NULL, buffer, len, 0, 2101 NVME_QID_ANY, 1, 0); 2102 } 2103 EXPORT_SYMBOL_GPL(nvme_sec_submit); 2104 #endif /* CONFIG_BLK_SED_OPAL */ 2105 2106 #ifdef CONFIG_BLK_DEV_ZONED 2107 static int nvme_report_zones(struct gendisk *disk, sector_t sector, 2108 unsigned int nr_zones, report_zones_cb cb, void *data) 2109 { 2110 return nvme_ns_report_zones(disk->private_data, sector, nr_zones, cb, 2111 data); 2112 } 2113 #else 2114 #define nvme_report_zones NULL 2115 #endif /* CONFIG_BLK_DEV_ZONED */ 2116 2117 static const struct block_device_operations nvme_bdev_ops = { 2118 .owner = THIS_MODULE, 2119 .ioctl = nvme_ioctl, 2120 .open = nvme_open, 2121 .release = nvme_release, 2122 .getgeo = nvme_getgeo, 2123 .report_zones = nvme_report_zones, 2124 .pr_ops = &nvme_pr_ops, 2125 }; 2126 2127 static int nvme_wait_ready(struct nvme_ctrl *ctrl, u64 cap, bool enabled) 2128 { 2129 unsigned long timeout = 2130 ((NVME_CAP_TIMEOUT(cap) + 1) * HZ / 2) + jiffies; 2131 u32 csts, bit = enabled ? NVME_CSTS_RDY : 0; 2132 int ret; 2133 2134 while ((ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts)) == 0) { 2135 if (csts == ~0) 2136 return -ENODEV; 2137 if ((csts & NVME_CSTS_RDY) == bit) 2138 break; 2139 2140 usleep_range(1000, 2000); 2141 if (fatal_signal_pending(current)) 2142 return -EINTR; 2143 if (time_after(jiffies, timeout)) { 2144 dev_err(ctrl->device, 2145 "Device not ready; aborting %s, CSTS=0x%x\n", 2146 enabled ? "initialisation" : "reset", csts); 2147 return -ENODEV; 2148 } 2149 } 2150 2151 return ret; 2152 } 2153 2154 /* 2155 * If the device has been passed off to us in an enabled state, just clear 2156 * the enabled bit. The spec says we should set the 'shutdown notification 2157 * bits', but doing so may cause the device to complete commands to the 2158 * admin queue ... and we don't know what memory that might be pointing at! 2159 */ 2160 int nvme_disable_ctrl(struct nvme_ctrl *ctrl) 2161 { 2162 int ret; 2163 2164 ctrl->ctrl_config &= ~NVME_CC_SHN_MASK; 2165 ctrl->ctrl_config &= ~NVME_CC_ENABLE; 2166 2167 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config); 2168 if (ret) 2169 return ret; 2170 2171 if (ctrl->quirks & NVME_QUIRK_DELAY_BEFORE_CHK_RDY) 2172 msleep(NVME_QUIRK_DELAY_AMOUNT); 2173 2174 return nvme_wait_ready(ctrl, ctrl->cap, false); 2175 } 2176 EXPORT_SYMBOL_GPL(nvme_disable_ctrl); 2177 2178 int nvme_enable_ctrl(struct nvme_ctrl *ctrl) 2179 { 2180 unsigned dev_page_min; 2181 int ret; 2182 2183 ret = ctrl->ops->reg_read64(ctrl, NVME_REG_CAP, &ctrl->cap); 2184 if (ret) { 2185 dev_err(ctrl->device, "Reading CAP failed (%d)\n", ret); 2186 return ret; 2187 } 2188 dev_page_min = NVME_CAP_MPSMIN(ctrl->cap) + 12; 2189 2190 if (NVME_CTRL_PAGE_SHIFT < dev_page_min) { 2191 dev_err(ctrl->device, 2192 "Minimum device page size %u too large for host (%u)\n", 2193 1 << dev_page_min, 1 << NVME_CTRL_PAGE_SHIFT); 2194 return -ENODEV; 2195 } 2196 2197 if (NVME_CAP_CSS(ctrl->cap) & NVME_CAP_CSS_CSI) 2198 ctrl->ctrl_config = NVME_CC_CSS_CSI; 2199 else 2200 ctrl->ctrl_config = NVME_CC_CSS_NVM; 2201 ctrl->ctrl_config |= (NVME_CTRL_PAGE_SHIFT - 12) << NVME_CC_MPS_SHIFT; 2202 ctrl->ctrl_config |= NVME_CC_AMS_RR | NVME_CC_SHN_NONE; 2203 ctrl->ctrl_config |= NVME_CC_IOSQES | NVME_CC_IOCQES; 2204 ctrl->ctrl_config |= NVME_CC_ENABLE; 2205 2206 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config); 2207 if (ret) 2208 return ret; 2209 return nvme_wait_ready(ctrl, ctrl->cap, true); 2210 } 2211 EXPORT_SYMBOL_GPL(nvme_enable_ctrl); 2212 2213 int nvme_shutdown_ctrl(struct nvme_ctrl *ctrl) 2214 { 2215 unsigned long timeout = jiffies + (ctrl->shutdown_timeout * HZ); 2216 u32 csts; 2217 int ret; 2218 2219 ctrl->ctrl_config &= ~NVME_CC_SHN_MASK; 2220 ctrl->ctrl_config |= NVME_CC_SHN_NORMAL; 2221 2222 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config); 2223 if (ret) 2224 return ret; 2225 2226 while ((ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts)) == 0) { 2227 if ((csts & NVME_CSTS_SHST_MASK) == NVME_CSTS_SHST_CMPLT) 2228 break; 2229 2230 msleep(100); 2231 if (fatal_signal_pending(current)) 2232 return -EINTR; 2233 if (time_after(jiffies, timeout)) { 2234 dev_err(ctrl->device, 2235 "Device shutdown incomplete; abort shutdown\n"); 2236 return -ENODEV; 2237 } 2238 } 2239 2240 return ret; 2241 } 2242 EXPORT_SYMBOL_GPL(nvme_shutdown_ctrl); 2243 2244 static int nvme_configure_timestamp(struct nvme_ctrl *ctrl) 2245 { 2246 __le64 ts; 2247 int ret; 2248 2249 if (!(ctrl->oncs & NVME_CTRL_ONCS_TIMESTAMP)) 2250 return 0; 2251 2252 ts = cpu_to_le64(ktime_to_ms(ktime_get_real())); 2253 ret = nvme_set_features(ctrl, NVME_FEAT_TIMESTAMP, 0, &ts, sizeof(ts), 2254 NULL); 2255 if (ret) 2256 dev_warn_once(ctrl->device, 2257 "could not set timestamp (%d)\n", ret); 2258 return ret; 2259 } 2260 2261 static int nvme_configure_acre(struct nvme_ctrl *ctrl) 2262 { 2263 struct nvme_feat_host_behavior *host; 2264 int ret; 2265 2266 /* Don't bother enabling the feature if retry delay is not reported */ 2267 if (!ctrl->crdt[0]) 2268 return 0; 2269 2270 host = kzalloc(sizeof(*host), GFP_KERNEL); 2271 if (!host) 2272 return 0; 2273 2274 host->acre = NVME_ENABLE_ACRE; 2275 ret = nvme_set_features(ctrl, NVME_FEAT_HOST_BEHAVIOR, 0, 2276 host, sizeof(*host), NULL); 2277 kfree(host); 2278 return ret; 2279 } 2280 2281 /* 2282 * The function checks whether the given total (exlat + enlat) latency of 2283 * a power state allows the latter to be used as an APST transition target. 2284 * It does so by comparing the latency to the primary and secondary latency 2285 * tolerances defined by module params. If there's a match, the corresponding 2286 * timeout value is returned and the matching tolerance index (1 or 2) is 2287 * reported. 2288 */ 2289 static bool nvme_apst_get_transition_time(u64 total_latency, 2290 u64 *transition_time, unsigned *last_index) 2291 { 2292 if (total_latency <= apst_primary_latency_tol_us) { 2293 if (*last_index == 1) 2294 return false; 2295 *last_index = 1; 2296 *transition_time = apst_primary_timeout_ms; 2297 return true; 2298 } 2299 if (apst_secondary_timeout_ms && 2300 total_latency <= apst_secondary_latency_tol_us) { 2301 if (*last_index <= 2) 2302 return false; 2303 *last_index = 2; 2304 *transition_time = apst_secondary_timeout_ms; 2305 return true; 2306 } 2307 return false; 2308 } 2309 2310 /* 2311 * APST (Autonomous Power State Transition) lets us program a table of power 2312 * state transitions that the controller will perform automatically. 2313 * 2314 * Depending on module params, one of the two supported techniques will be used: 2315 * 2316 * - If the parameters provide explicit timeouts and tolerances, they will be 2317 * used to build a table with up to 2 non-operational states to transition to. 2318 * The default parameter values were selected based on the values used by 2319 * Microsoft's and Intel's NVMe drivers. Yet, since we don't implement dynamic 2320 * regeneration of the APST table in the event of switching between external 2321 * and battery power, the timeouts and tolerances reflect a compromise 2322 * between values used by Microsoft for AC and battery scenarios. 2323 * - If not, we'll configure the table with a simple heuristic: we are willing 2324 * to spend at most 2% of the time transitioning between power states. 2325 * Therefore, when running in any given state, we will enter the next 2326 * lower-power non-operational state after waiting 50 * (enlat + exlat) 2327 * microseconds, as long as that state's exit latency is under the requested 2328 * maximum latency. 2329 * 2330 * We will not autonomously enter any non-operational state for which the total 2331 * latency exceeds ps_max_latency_us. 2332 * 2333 * Users can set ps_max_latency_us to zero to turn off APST. 2334 */ 2335 static int nvme_configure_apst(struct nvme_ctrl *ctrl) 2336 { 2337 struct nvme_feat_auto_pst *table; 2338 unsigned apste = 0; 2339 u64 max_lat_us = 0; 2340 __le64 target = 0; 2341 int max_ps = -1; 2342 int state; 2343 int ret; 2344 unsigned last_lt_index = UINT_MAX; 2345 2346 /* 2347 * If APST isn't supported or if we haven't been initialized yet, 2348 * then don't do anything. 2349 */ 2350 if (!ctrl->apsta) 2351 return 0; 2352 2353 if (ctrl->npss > 31) { 2354 dev_warn(ctrl->device, "NPSS is invalid; not using APST\n"); 2355 return 0; 2356 } 2357 2358 table = kzalloc(sizeof(*table), GFP_KERNEL); 2359 if (!table) 2360 return 0; 2361 2362 if (!ctrl->apst_enabled || ctrl->ps_max_latency_us == 0) { 2363 /* Turn off APST. */ 2364 dev_dbg(ctrl->device, "APST disabled\n"); 2365 goto done; 2366 } 2367 2368 /* 2369 * Walk through all states from lowest- to highest-power. 2370 * According to the spec, lower-numbered states use more power. NPSS, 2371 * despite the name, is the index of the lowest-power state, not the 2372 * number of states. 2373 */ 2374 for (state = (int)ctrl->npss; state >= 0; state--) { 2375 u64 total_latency_us, exit_latency_us, transition_ms; 2376 2377 if (target) 2378 table->entries[state] = target; 2379 2380 /* 2381 * Don't allow transitions to the deepest state if it's quirked 2382 * off. 2383 */ 2384 if (state == ctrl->npss && 2385 (ctrl->quirks & NVME_QUIRK_NO_DEEPEST_PS)) 2386 continue; 2387 2388 /* 2389 * Is this state a useful non-operational state for higher-power 2390 * states to autonomously transition to? 2391 */ 2392 if (!(ctrl->psd[state].flags & NVME_PS_FLAGS_NON_OP_STATE)) 2393 continue; 2394 2395 exit_latency_us = (u64)le32_to_cpu(ctrl->psd[state].exit_lat); 2396 if (exit_latency_us > ctrl->ps_max_latency_us) 2397 continue; 2398 2399 total_latency_us = exit_latency_us + 2400 le32_to_cpu(ctrl->psd[state].entry_lat); 2401 2402 /* 2403 * This state is good. It can be used as the APST idle target 2404 * for higher power states. 2405 */ 2406 if (apst_primary_timeout_ms && apst_primary_latency_tol_us) { 2407 if (!nvme_apst_get_transition_time(total_latency_us, 2408 &transition_ms, &last_lt_index)) 2409 continue; 2410 } else { 2411 transition_ms = total_latency_us + 19; 2412 do_div(transition_ms, 20); 2413 if (transition_ms > (1 << 24) - 1) 2414 transition_ms = (1 << 24) - 1; 2415 } 2416 2417 target = cpu_to_le64((state << 3) | (transition_ms << 8)); 2418 if (max_ps == -1) 2419 max_ps = state; 2420 if (total_latency_us > max_lat_us) 2421 max_lat_us = total_latency_us; 2422 } 2423 2424 if (max_ps == -1) 2425 dev_dbg(ctrl->device, "APST enabled but no non-operational states are available\n"); 2426 else 2427 dev_dbg(ctrl->device, "APST enabled: max PS = %d, max round-trip latency = %lluus, table = %*phN\n", 2428 max_ps, max_lat_us, (int)sizeof(*table), table); 2429 apste = 1; 2430 2431 done: 2432 ret = nvme_set_features(ctrl, NVME_FEAT_AUTO_PST, apste, 2433 table, sizeof(*table), NULL); 2434 if (ret) 2435 dev_err(ctrl->device, "failed to set APST feature (%d)\n", ret); 2436 kfree(table); 2437 return ret; 2438 } 2439 2440 static void nvme_set_latency_tolerance(struct device *dev, s32 val) 2441 { 2442 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 2443 u64 latency; 2444 2445 switch (val) { 2446 case PM_QOS_LATENCY_TOLERANCE_NO_CONSTRAINT: 2447 case PM_QOS_LATENCY_ANY: 2448 latency = U64_MAX; 2449 break; 2450 2451 default: 2452 latency = val; 2453 } 2454 2455 if (ctrl->ps_max_latency_us != latency) { 2456 ctrl->ps_max_latency_us = latency; 2457 if (ctrl->state == NVME_CTRL_LIVE) 2458 nvme_configure_apst(ctrl); 2459 } 2460 } 2461 2462 struct nvme_core_quirk_entry { 2463 /* 2464 * NVMe model and firmware strings are padded with spaces. For 2465 * simplicity, strings in the quirk table are padded with NULLs 2466 * instead. 2467 */ 2468 u16 vid; 2469 const char *mn; 2470 const char *fr; 2471 unsigned long quirks; 2472 }; 2473 2474 static const struct nvme_core_quirk_entry core_quirks[] = { 2475 { 2476 /* 2477 * This Toshiba device seems to die using any APST states. See: 2478 * https://bugs.launchpad.net/ubuntu/+source/linux/+bug/1678184/comments/11 2479 */ 2480 .vid = 0x1179, 2481 .mn = "THNSF5256GPUK TOSHIBA", 2482 .quirks = NVME_QUIRK_NO_APST, 2483 }, 2484 { 2485 /* 2486 * This LiteON CL1-3D*-Q11 firmware version has a race 2487 * condition associated with actions related to suspend to idle 2488 * LiteON has resolved the problem in future firmware 2489 */ 2490 .vid = 0x14a4, 2491 .fr = "22301111", 2492 .quirks = NVME_QUIRK_SIMPLE_SUSPEND, 2493 }, 2494 { 2495 /* 2496 * This Kioxia CD6-V Series / HPE PE8030 device times out and 2497 * aborts I/O during any load, but more easily reproducible 2498 * with discards (fstrim). 2499 * 2500 * The device is left in a state where it is also not possible 2501 * to use "nvme set-feature" to disable APST, but booting with 2502 * nvme_core.default_ps_max_latency=0 works. 2503 */ 2504 .vid = 0x1e0f, 2505 .mn = "KCD6XVUL6T40", 2506 .quirks = NVME_QUIRK_NO_APST, 2507 } 2508 }; 2509 2510 /* match is null-terminated but idstr is space-padded. */ 2511 static bool string_matches(const char *idstr, const char *match, size_t len) 2512 { 2513 size_t matchlen; 2514 2515 if (!match) 2516 return true; 2517 2518 matchlen = strlen(match); 2519 WARN_ON_ONCE(matchlen > len); 2520 2521 if (memcmp(idstr, match, matchlen)) 2522 return false; 2523 2524 for (; matchlen < len; matchlen++) 2525 if (idstr[matchlen] != ' ') 2526 return false; 2527 2528 return true; 2529 } 2530 2531 static bool quirk_matches(const struct nvme_id_ctrl *id, 2532 const struct nvme_core_quirk_entry *q) 2533 { 2534 return q->vid == le16_to_cpu(id->vid) && 2535 string_matches(id->mn, q->mn, sizeof(id->mn)) && 2536 string_matches(id->fr, q->fr, sizeof(id->fr)); 2537 } 2538 2539 static void nvme_init_subnqn(struct nvme_subsystem *subsys, struct nvme_ctrl *ctrl, 2540 struct nvme_id_ctrl *id) 2541 { 2542 size_t nqnlen; 2543 int off; 2544 2545 if(!(ctrl->quirks & NVME_QUIRK_IGNORE_DEV_SUBNQN)) { 2546 nqnlen = strnlen(id->subnqn, NVMF_NQN_SIZE); 2547 if (nqnlen > 0 && nqnlen < NVMF_NQN_SIZE) { 2548 strlcpy(subsys->subnqn, id->subnqn, NVMF_NQN_SIZE); 2549 return; 2550 } 2551 2552 if (ctrl->vs >= NVME_VS(1, 2, 1)) 2553 dev_warn(ctrl->device, "missing or invalid SUBNQN field.\n"); 2554 } 2555 2556 /* Generate a "fake" NQN per Figure 254 in NVMe 1.3 + ECN 001 */ 2557 off = snprintf(subsys->subnqn, NVMF_NQN_SIZE, 2558 "nqn.2014.08.org.nvmexpress:%04x%04x", 2559 le16_to_cpu(id->vid), le16_to_cpu(id->ssvid)); 2560 memcpy(subsys->subnqn + off, id->sn, sizeof(id->sn)); 2561 off += sizeof(id->sn); 2562 memcpy(subsys->subnqn + off, id->mn, sizeof(id->mn)); 2563 off += sizeof(id->mn); 2564 memset(subsys->subnqn + off, 0, sizeof(subsys->subnqn) - off); 2565 } 2566 2567 static void nvme_release_subsystem(struct device *dev) 2568 { 2569 struct nvme_subsystem *subsys = 2570 container_of(dev, struct nvme_subsystem, dev); 2571 2572 if (subsys->instance >= 0) 2573 ida_simple_remove(&nvme_instance_ida, subsys->instance); 2574 kfree(subsys); 2575 } 2576 2577 static void nvme_destroy_subsystem(struct kref *ref) 2578 { 2579 struct nvme_subsystem *subsys = 2580 container_of(ref, struct nvme_subsystem, ref); 2581 2582 mutex_lock(&nvme_subsystems_lock); 2583 list_del(&subsys->entry); 2584 mutex_unlock(&nvme_subsystems_lock); 2585 2586 ida_destroy(&subsys->ns_ida); 2587 device_del(&subsys->dev); 2588 put_device(&subsys->dev); 2589 } 2590 2591 static void nvme_put_subsystem(struct nvme_subsystem *subsys) 2592 { 2593 kref_put(&subsys->ref, nvme_destroy_subsystem); 2594 } 2595 2596 static struct nvme_subsystem *__nvme_find_get_subsystem(const char *subsysnqn) 2597 { 2598 struct nvme_subsystem *subsys; 2599 2600 lockdep_assert_held(&nvme_subsystems_lock); 2601 2602 /* 2603 * Fail matches for discovery subsystems. This results 2604 * in each discovery controller bound to a unique subsystem. 2605 * This avoids issues with validating controller values 2606 * that can only be true when there is a single unique subsystem. 2607 * There may be multiple and completely independent entities 2608 * that provide discovery controllers. 2609 */ 2610 if (!strcmp(subsysnqn, NVME_DISC_SUBSYS_NAME)) 2611 return NULL; 2612 2613 list_for_each_entry(subsys, &nvme_subsystems, entry) { 2614 if (strcmp(subsys->subnqn, subsysnqn)) 2615 continue; 2616 if (!kref_get_unless_zero(&subsys->ref)) 2617 continue; 2618 return subsys; 2619 } 2620 2621 return NULL; 2622 } 2623 2624 #define SUBSYS_ATTR_RO(_name, _mode, _show) \ 2625 struct device_attribute subsys_attr_##_name = \ 2626 __ATTR(_name, _mode, _show, NULL) 2627 2628 static ssize_t nvme_subsys_show_nqn(struct device *dev, 2629 struct device_attribute *attr, 2630 char *buf) 2631 { 2632 struct nvme_subsystem *subsys = 2633 container_of(dev, struct nvme_subsystem, dev); 2634 2635 return sysfs_emit(buf, "%s\n", subsys->subnqn); 2636 } 2637 static SUBSYS_ATTR_RO(subsysnqn, S_IRUGO, nvme_subsys_show_nqn); 2638 2639 static ssize_t nvme_subsys_show_type(struct device *dev, 2640 struct device_attribute *attr, 2641 char *buf) 2642 { 2643 struct nvme_subsystem *subsys = 2644 container_of(dev, struct nvme_subsystem, dev); 2645 2646 switch (subsys->subtype) { 2647 case NVME_NQN_DISC: 2648 return sysfs_emit(buf, "discovery\n"); 2649 case NVME_NQN_NVME: 2650 return sysfs_emit(buf, "nvm\n"); 2651 default: 2652 return sysfs_emit(buf, "reserved\n"); 2653 } 2654 } 2655 static SUBSYS_ATTR_RO(subsystype, S_IRUGO, nvme_subsys_show_type); 2656 2657 #define nvme_subsys_show_str_function(field) \ 2658 static ssize_t subsys_##field##_show(struct device *dev, \ 2659 struct device_attribute *attr, char *buf) \ 2660 { \ 2661 struct nvme_subsystem *subsys = \ 2662 container_of(dev, struct nvme_subsystem, dev); \ 2663 return sysfs_emit(buf, "%.*s\n", \ 2664 (int)sizeof(subsys->field), subsys->field); \ 2665 } \ 2666 static SUBSYS_ATTR_RO(field, S_IRUGO, subsys_##field##_show); 2667 2668 nvme_subsys_show_str_function(model); 2669 nvme_subsys_show_str_function(serial); 2670 nvme_subsys_show_str_function(firmware_rev); 2671 2672 static struct attribute *nvme_subsys_attrs[] = { 2673 &subsys_attr_model.attr, 2674 &subsys_attr_serial.attr, 2675 &subsys_attr_firmware_rev.attr, 2676 &subsys_attr_subsysnqn.attr, 2677 &subsys_attr_subsystype.attr, 2678 #ifdef CONFIG_NVME_MULTIPATH 2679 &subsys_attr_iopolicy.attr, 2680 #endif 2681 NULL, 2682 }; 2683 2684 static const struct attribute_group nvme_subsys_attrs_group = { 2685 .attrs = nvme_subsys_attrs, 2686 }; 2687 2688 static const struct attribute_group *nvme_subsys_attrs_groups[] = { 2689 &nvme_subsys_attrs_group, 2690 NULL, 2691 }; 2692 2693 static inline bool nvme_discovery_ctrl(struct nvme_ctrl *ctrl) 2694 { 2695 return ctrl->opts && ctrl->opts->discovery_nqn; 2696 } 2697 2698 static bool nvme_validate_cntlid(struct nvme_subsystem *subsys, 2699 struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id) 2700 { 2701 struct nvme_ctrl *tmp; 2702 2703 lockdep_assert_held(&nvme_subsystems_lock); 2704 2705 list_for_each_entry(tmp, &subsys->ctrls, subsys_entry) { 2706 if (nvme_state_terminal(tmp)) 2707 continue; 2708 2709 if (tmp->cntlid == ctrl->cntlid) { 2710 dev_err(ctrl->device, 2711 "Duplicate cntlid %u with %s, subsys %s, rejecting\n", 2712 ctrl->cntlid, dev_name(tmp->device), 2713 subsys->subnqn); 2714 return false; 2715 } 2716 2717 if ((id->cmic & NVME_CTRL_CMIC_MULTI_CTRL) || 2718 nvme_discovery_ctrl(ctrl)) 2719 continue; 2720 2721 dev_err(ctrl->device, 2722 "Subsystem does not support multiple controllers\n"); 2723 return false; 2724 } 2725 2726 return true; 2727 } 2728 2729 static int nvme_init_subsystem(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id) 2730 { 2731 struct nvme_subsystem *subsys, *found; 2732 int ret; 2733 2734 subsys = kzalloc(sizeof(*subsys), GFP_KERNEL); 2735 if (!subsys) 2736 return -ENOMEM; 2737 2738 subsys->instance = -1; 2739 mutex_init(&subsys->lock); 2740 kref_init(&subsys->ref); 2741 INIT_LIST_HEAD(&subsys->ctrls); 2742 INIT_LIST_HEAD(&subsys->nsheads); 2743 nvme_init_subnqn(subsys, ctrl, id); 2744 memcpy(subsys->serial, id->sn, sizeof(subsys->serial)); 2745 memcpy(subsys->model, id->mn, sizeof(subsys->model)); 2746 memcpy(subsys->firmware_rev, id->fr, sizeof(subsys->firmware_rev)); 2747 subsys->vendor_id = le16_to_cpu(id->vid); 2748 subsys->cmic = id->cmic; 2749 2750 /* Versions prior to 1.4 don't necessarily report a valid type */ 2751 if (id->cntrltype == NVME_CTRL_DISC || 2752 !strcmp(subsys->subnqn, NVME_DISC_SUBSYS_NAME)) 2753 subsys->subtype = NVME_NQN_DISC; 2754 else 2755 subsys->subtype = NVME_NQN_NVME; 2756 2757 if (nvme_discovery_ctrl(ctrl) && subsys->subtype != NVME_NQN_DISC) { 2758 dev_err(ctrl->device, 2759 "Subsystem %s is not a discovery controller", 2760 subsys->subnqn); 2761 kfree(subsys); 2762 return -EINVAL; 2763 } 2764 subsys->awupf = le16_to_cpu(id->awupf); 2765 #ifdef CONFIG_NVME_MULTIPATH 2766 subsys->iopolicy = NVME_IOPOLICY_NUMA; 2767 #endif 2768 2769 subsys->dev.class = nvme_subsys_class; 2770 subsys->dev.release = nvme_release_subsystem; 2771 subsys->dev.groups = nvme_subsys_attrs_groups; 2772 dev_set_name(&subsys->dev, "nvme-subsys%d", ctrl->instance); 2773 device_initialize(&subsys->dev); 2774 2775 mutex_lock(&nvme_subsystems_lock); 2776 found = __nvme_find_get_subsystem(subsys->subnqn); 2777 if (found) { 2778 put_device(&subsys->dev); 2779 subsys = found; 2780 2781 if (!nvme_validate_cntlid(subsys, ctrl, id)) { 2782 ret = -EINVAL; 2783 goto out_put_subsystem; 2784 } 2785 } else { 2786 ret = device_add(&subsys->dev); 2787 if (ret) { 2788 dev_err(ctrl->device, 2789 "failed to register subsystem device.\n"); 2790 put_device(&subsys->dev); 2791 goto out_unlock; 2792 } 2793 ida_init(&subsys->ns_ida); 2794 list_add_tail(&subsys->entry, &nvme_subsystems); 2795 } 2796 2797 ret = sysfs_create_link(&subsys->dev.kobj, &ctrl->device->kobj, 2798 dev_name(ctrl->device)); 2799 if (ret) { 2800 dev_err(ctrl->device, 2801 "failed to create sysfs link from subsystem.\n"); 2802 goto out_put_subsystem; 2803 } 2804 2805 if (!found) 2806 subsys->instance = ctrl->instance; 2807 ctrl->subsys = subsys; 2808 list_add_tail(&ctrl->subsys_entry, &subsys->ctrls); 2809 mutex_unlock(&nvme_subsystems_lock); 2810 return 0; 2811 2812 out_put_subsystem: 2813 nvme_put_subsystem(subsys); 2814 out_unlock: 2815 mutex_unlock(&nvme_subsystems_lock); 2816 return ret; 2817 } 2818 2819 int nvme_get_log(struct nvme_ctrl *ctrl, u32 nsid, u8 log_page, u8 lsp, u8 csi, 2820 void *log, size_t size, u64 offset) 2821 { 2822 struct nvme_command c = { }; 2823 u32 dwlen = nvme_bytes_to_numd(size); 2824 2825 c.get_log_page.opcode = nvme_admin_get_log_page; 2826 c.get_log_page.nsid = cpu_to_le32(nsid); 2827 c.get_log_page.lid = log_page; 2828 c.get_log_page.lsp = lsp; 2829 c.get_log_page.numdl = cpu_to_le16(dwlen & ((1 << 16) - 1)); 2830 c.get_log_page.numdu = cpu_to_le16(dwlen >> 16); 2831 c.get_log_page.lpol = cpu_to_le32(lower_32_bits(offset)); 2832 c.get_log_page.lpou = cpu_to_le32(upper_32_bits(offset)); 2833 c.get_log_page.csi = csi; 2834 2835 return nvme_submit_sync_cmd(ctrl->admin_q, &c, log, size); 2836 } 2837 2838 static int nvme_get_effects_log(struct nvme_ctrl *ctrl, u8 csi, 2839 struct nvme_effects_log **log) 2840 { 2841 struct nvme_effects_log *cel = xa_load(&ctrl->cels, csi); 2842 int ret; 2843 2844 if (cel) 2845 goto out; 2846 2847 cel = kzalloc(sizeof(*cel), GFP_KERNEL); 2848 if (!cel) 2849 return -ENOMEM; 2850 2851 ret = nvme_get_log(ctrl, 0x00, NVME_LOG_CMD_EFFECTS, 0, csi, 2852 cel, sizeof(*cel), 0); 2853 if (ret) { 2854 kfree(cel); 2855 return ret; 2856 } 2857 2858 xa_store(&ctrl->cels, csi, cel, GFP_KERNEL); 2859 out: 2860 *log = cel; 2861 return 0; 2862 } 2863 2864 static inline u32 nvme_mps_to_sectors(struct nvme_ctrl *ctrl, u32 units) 2865 { 2866 u32 page_shift = NVME_CAP_MPSMIN(ctrl->cap) + 12, val; 2867 2868 if (check_shl_overflow(1U, units + page_shift - 9, &val)) 2869 return UINT_MAX; 2870 return val; 2871 } 2872 2873 static int nvme_init_non_mdts_limits(struct nvme_ctrl *ctrl) 2874 { 2875 struct nvme_command c = { }; 2876 struct nvme_id_ctrl_nvm *id; 2877 int ret; 2878 2879 if (ctrl->oncs & NVME_CTRL_ONCS_DSM) { 2880 ctrl->max_discard_sectors = UINT_MAX; 2881 ctrl->max_discard_segments = NVME_DSM_MAX_RANGES; 2882 } else { 2883 ctrl->max_discard_sectors = 0; 2884 ctrl->max_discard_segments = 0; 2885 } 2886 2887 /* 2888 * Even though NVMe spec explicitly states that MDTS is not applicable 2889 * to the write-zeroes, we are cautious and limit the size to the 2890 * controllers max_hw_sectors value, which is based on the MDTS field 2891 * and possibly other limiting factors. 2892 */ 2893 if ((ctrl->oncs & NVME_CTRL_ONCS_WRITE_ZEROES) && 2894 !(ctrl->quirks & NVME_QUIRK_DISABLE_WRITE_ZEROES)) 2895 ctrl->max_zeroes_sectors = ctrl->max_hw_sectors; 2896 else 2897 ctrl->max_zeroes_sectors = 0; 2898 2899 if (nvme_ctrl_limited_cns(ctrl)) 2900 return 0; 2901 2902 id = kzalloc(sizeof(*id), GFP_KERNEL); 2903 if (!id) 2904 return 0; 2905 2906 c.identify.opcode = nvme_admin_identify; 2907 c.identify.cns = NVME_ID_CNS_CS_CTRL; 2908 c.identify.csi = NVME_CSI_NVM; 2909 2910 ret = nvme_submit_sync_cmd(ctrl->admin_q, &c, id, sizeof(*id)); 2911 if (ret) 2912 goto free_data; 2913 2914 if (id->dmrl) 2915 ctrl->max_discard_segments = id->dmrl; 2916 if (id->dmrsl) 2917 ctrl->max_discard_sectors = le32_to_cpu(id->dmrsl); 2918 if (id->wzsl) 2919 ctrl->max_zeroes_sectors = nvme_mps_to_sectors(ctrl, id->wzsl); 2920 2921 free_data: 2922 kfree(id); 2923 return ret; 2924 } 2925 2926 static int nvme_init_identify(struct nvme_ctrl *ctrl) 2927 { 2928 struct nvme_id_ctrl *id; 2929 u32 max_hw_sectors; 2930 bool prev_apst_enabled; 2931 int ret; 2932 2933 ret = nvme_identify_ctrl(ctrl, &id); 2934 if (ret) { 2935 dev_err(ctrl->device, "Identify Controller failed (%d)\n", ret); 2936 return -EIO; 2937 } 2938 2939 if (id->lpa & NVME_CTRL_LPA_CMD_EFFECTS_LOG) { 2940 ret = nvme_get_effects_log(ctrl, NVME_CSI_NVM, &ctrl->effects); 2941 if (ret < 0) 2942 goto out_free; 2943 } 2944 2945 if (!(ctrl->ops->flags & NVME_F_FABRICS)) 2946 ctrl->cntlid = le16_to_cpu(id->cntlid); 2947 2948 if (!ctrl->identified) { 2949 unsigned int i; 2950 2951 ret = nvme_init_subsystem(ctrl, id); 2952 if (ret) 2953 goto out_free; 2954 2955 /* 2956 * Check for quirks. Quirk can depend on firmware version, 2957 * so, in principle, the set of quirks present can change 2958 * across a reset. As a possible future enhancement, we 2959 * could re-scan for quirks every time we reinitialize 2960 * the device, but we'd have to make sure that the driver 2961 * behaves intelligently if the quirks change. 2962 */ 2963 for (i = 0; i < ARRAY_SIZE(core_quirks); i++) { 2964 if (quirk_matches(id, &core_quirks[i])) 2965 ctrl->quirks |= core_quirks[i].quirks; 2966 } 2967 } 2968 2969 if (force_apst && (ctrl->quirks & NVME_QUIRK_NO_DEEPEST_PS)) { 2970 dev_warn(ctrl->device, "forcibly allowing all power states due to nvme_core.force_apst -- use at your own risk\n"); 2971 ctrl->quirks &= ~NVME_QUIRK_NO_DEEPEST_PS; 2972 } 2973 2974 ctrl->crdt[0] = le16_to_cpu(id->crdt1); 2975 ctrl->crdt[1] = le16_to_cpu(id->crdt2); 2976 ctrl->crdt[2] = le16_to_cpu(id->crdt3); 2977 2978 ctrl->oacs = le16_to_cpu(id->oacs); 2979 ctrl->oncs = le16_to_cpu(id->oncs); 2980 ctrl->mtfa = le16_to_cpu(id->mtfa); 2981 ctrl->oaes = le32_to_cpu(id->oaes); 2982 ctrl->wctemp = le16_to_cpu(id->wctemp); 2983 ctrl->cctemp = le16_to_cpu(id->cctemp); 2984 2985 atomic_set(&ctrl->abort_limit, id->acl + 1); 2986 ctrl->vwc = id->vwc; 2987 if (id->mdts) 2988 max_hw_sectors = nvme_mps_to_sectors(ctrl, id->mdts); 2989 else 2990 max_hw_sectors = UINT_MAX; 2991 ctrl->max_hw_sectors = 2992 min_not_zero(ctrl->max_hw_sectors, max_hw_sectors); 2993 2994 nvme_set_queue_limits(ctrl, ctrl->admin_q); 2995 ctrl->sgls = le32_to_cpu(id->sgls); 2996 ctrl->kas = le16_to_cpu(id->kas); 2997 ctrl->max_namespaces = le32_to_cpu(id->mnan); 2998 ctrl->ctratt = le32_to_cpu(id->ctratt); 2999 3000 if (id->rtd3e) { 3001 /* us -> s */ 3002 u32 transition_time = le32_to_cpu(id->rtd3e) / USEC_PER_SEC; 3003 3004 ctrl->shutdown_timeout = clamp_t(unsigned int, transition_time, 3005 shutdown_timeout, 60); 3006 3007 if (ctrl->shutdown_timeout != shutdown_timeout) 3008 dev_info(ctrl->device, 3009 "Shutdown timeout set to %u seconds\n", 3010 ctrl->shutdown_timeout); 3011 } else 3012 ctrl->shutdown_timeout = shutdown_timeout; 3013 3014 ctrl->npss = id->npss; 3015 ctrl->apsta = id->apsta; 3016 prev_apst_enabled = ctrl->apst_enabled; 3017 if (ctrl->quirks & NVME_QUIRK_NO_APST) { 3018 if (force_apst && id->apsta) { 3019 dev_warn(ctrl->device, "forcibly allowing APST due to nvme_core.force_apst -- use at your own risk\n"); 3020 ctrl->apst_enabled = true; 3021 } else { 3022 ctrl->apst_enabled = false; 3023 } 3024 } else { 3025 ctrl->apst_enabled = id->apsta; 3026 } 3027 memcpy(ctrl->psd, id->psd, sizeof(ctrl->psd)); 3028 3029 if (ctrl->ops->flags & NVME_F_FABRICS) { 3030 ctrl->icdoff = le16_to_cpu(id->icdoff); 3031 ctrl->ioccsz = le32_to_cpu(id->ioccsz); 3032 ctrl->iorcsz = le32_to_cpu(id->iorcsz); 3033 ctrl->maxcmd = le16_to_cpu(id->maxcmd); 3034 3035 /* 3036 * In fabrics we need to verify the cntlid matches the 3037 * admin connect 3038 */ 3039 if (ctrl->cntlid != le16_to_cpu(id->cntlid)) { 3040 dev_err(ctrl->device, 3041 "Mismatching cntlid: Connect %u vs Identify " 3042 "%u, rejecting\n", 3043 ctrl->cntlid, le16_to_cpu(id->cntlid)); 3044 ret = -EINVAL; 3045 goto out_free; 3046 } 3047 3048 if (!nvme_discovery_ctrl(ctrl) && !ctrl->kas) { 3049 dev_err(ctrl->device, 3050 "keep-alive support is mandatory for fabrics\n"); 3051 ret = -EINVAL; 3052 goto out_free; 3053 } 3054 } else { 3055 ctrl->hmpre = le32_to_cpu(id->hmpre); 3056 ctrl->hmmin = le32_to_cpu(id->hmmin); 3057 ctrl->hmminds = le32_to_cpu(id->hmminds); 3058 ctrl->hmmaxd = le16_to_cpu(id->hmmaxd); 3059 } 3060 3061 ret = nvme_mpath_init_identify(ctrl, id); 3062 if (ret < 0) 3063 goto out_free; 3064 3065 if (ctrl->apst_enabled && !prev_apst_enabled) 3066 dev_pm_qos_expose_latency_tolerance(ctrl->device); 3067 else if (!ctrl->apst_enabled && prev_apst_enabled) 3068 dev_pm_qos_hide_latency_tolerance(ctrl->device); 3069 3070 out_free: 3071 kfree(id); 3072 return ret; 3073 } 3074 3075 /* 3076 * Initialize the cached copies of the Identify data and various controller 3077 * register in our nvme_ctrl structure. This should be called as soon as 3078 * the admin queue is fully up and running. 3079 */ 3080 int nvme_init_ctrl_finish(struct nvme_ctrl *ctrl) 3081 { 3082 int ret; 3083 3084 ret = ctrl->ops->reg_read32(ctrl, NVME_REG_VS, &ctrl->vs); 3085 if (ret) { 3086 dev_err(ctrl->device, "Reading VS failed (%d)\n", ret); 3087 return ret; 3088 } 3089 3090 ctrl->sqsize = min_t(u16, NVME_CAP_MQES(ctrl->cap), ctrl->sqsize); 3091 3092 if (ctrl->vs >= NVME_VS(1, 1, 0)) 3093 ctrl->subsystem = NVME_CAP_NSSRC(ctrl->cap); 3094 3095 ret = nvme_init_identify(ctrl); 3096 if (ret) 3097 return ret; 3098 3099 ret = nvme_init_non_mdts_limits(ctrl); 3100 if (ret < 0) 3101 return ret; 3102 3103 ret = nvme_configure_apst(ctrl); 3104 if (ret < 0) 3105 return ret; 3106 3107 ret = nvme_configure_timestamp(ctrl); 3108 if (ret < 0) 3109 return ret; 3110 3111 ret = nvme_configure_directives(ctrl); 3112 if (ret < 0) 3113 return ret; 3114 3115 ret = nvme_configure_acre(ctrl); 3116 if (ret < 0) 3117 return ret; 3118 3119 if (!ctrl->identified && !nvme_discovery_ctrl(ctrl)) { 3120 ret = nvme_hwmon_init(ctrl); 3121 if (ret < 0) 3122 return ret; 3123 } 3124 3125 ctrl->identified = true; 3126 3127 return 0; 3128 } 3129 EXPORT_SYMBOL_GPL(nvme_init_ctrl_finish); 3130 3131 static int nvme_dev_open(struct inode *inode, struct file *file) 3132 { 3133 struct nvme_ctrl *ctrl = 3134 container_of(inode->i_cdev, struct nvme_ctrl, cdev); 3135 3136 switch (ctrl->state) { 3137 case NVME_CTRL_LIVE: 3138 break; 3139 default: 3140 return -EWOULDBLOCK; 3141 } 3142 3143 nvme_get_ctrl(ctrl); 3144 if (!try_module_get(ctrl->ops->module)) { 3145 nvme_put_ctrl(ctrl); 3146 return -EINVAL; 3147 } 3148 3149 file->private_data = ctrl; 3150 return 0; 3151 } 3152 3153 static int nvme_dev_release(struct inode *inode, struct file *file) 3154 { 3155 struct nvme_ctrl *ctrl = 3156 container_of(inode->i_cdev, struct nvme_ctrl, cdev); 3157 3158 module_put(ctrl->ops->module); 3159 nvme_put_ctrl(ctrl); 3160 return 0; 3161 } 3162 3163 static const struct file_operations nvme_dev_fops = { 3164 .owner = THIS_MODULE, 3165 .open = nvme_dev_open, 3166 .release = nvme_dev_release, 3167 .unlocked_ioctl = nvme_dev_ioctl, 3168 .compat_ioctl = compat_ptr_ioctl, 3169 }; 3170 3171 static ssize_t nvme_sysfs_reset(struct device *dev, 3172 struct device_attribute *attr, const char *buf, 3173 size_t count) 3174 { 3175 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 3176 int ret; 3177 3178 ret = nvme_reset_ctrl_sync(ctrl); 3179 if (ret < 0) 3180 return ret; 3181 return count; 3182 } 3183 static DEVICE_ATTR(reset_controller, S_IWUSR, NULL, nvme_sysfs_reset); 3184 3185 static ssize_t nvme_sysfs_rescan(struct device *dev, 3186 struct device_attribute *attr, const char *buf, 3187 size_t count) 3188 { 3189 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 3190 3191 nvme_queue_scan(ctrl); 3192 return count; 3193 } 3194 static DEVICE_ATTR(rescan_controller, S_IWUSR, NULL, nvme_sysfs_rescan); 3195 3196 static inline struct nvme_ns_head *dev_to_ns_head(struct device *dev) 3197 { 3198 struct gendisk *disk = dev_to_disk(dev); 3199 3200 if (disk->fops == &nvme_bdev_ops) 3201 return nvme_get_ns_from_dev(dev)->head; 3202 else 3203 return disk->private_data; 3204 } 3205 3206 static ssize_t wwid_show(struct device *dev, struct device_attribute *attr, 3207 char *buf) 3208 { 3209 struct nvme_ns_head *head = dev_to_ns_head(dev); 3210 struct nvme_ns_ids *ids = &head->ids; 3211 struct nvme_subsystem *subsys = head->subsys; 3212 int serial_len = sizeof(subsys->serial); 3213 int model_len = sizeof(subsys->model); 3214 3215 if (!uuid_is_null(&ids->uuid)) 3216 return sysfs_emit(buf, "uuid.%pU\n", &ids->uuid); 3217 3218 if (memchr_inv(ids->nguid, 0, sizeof(ids->nguid))) 3219 return sysfs_emit(buf, "eui.%16phN\n", ids->nguid); 3220 3221 if (memchr_inv(ids->eui64, 0, sizeof(ids->eui64))) 3222 return sysfs_emit(buf, "eui.%8phN\n", ids->eui64); 3223 3224 while (serial_len > 0 && (subsys->serial[serial_len - 1] == ' ' || 3225 subsys->serial[serial_len - 1] == '\0')) 3226 serial_len--; 3227 while (model_len > 0 && (subsys->model[model_len - 1] == ' ' || 3228 subsys->model[model_len - 1] == '\0')) 3229 model_len--; 3230 3231 return sysfs_emit(buf, "nvme.%04x-%*phN-%*phN-%08x\n", subsys->vendor_id, 3232 serial_len, subsys->serial, model_len, subsys->model, 3233 head->ns_id); 3234 } 3235 static DEVICE_ATTR_RO(wwid); 3236 3237 static ssize_t nguid_show(struct device *dev, struct device_attribute *attr, 3238 char *buf) 3239 { 3240 return sysfs_emit(buf, "%pU\n", dev_to_ns_head(dev)->ids.nguid); 3241 } 3242 static DEVICE_ATTR_RO(nguid); 3243 3244 static ssize_t uuid_show(struct device *dev, struct device_attribute *attr, 3245 char *buf) 3246 { 3247 struct nvme_ns_ids *ids = &dev_to_ns_head(dev)->ids; 3248 3249 /* For backward compatibility expose the NGUID to userspace if 3250 * we have no UUID set 3251 */ 3252 if (uuid_is_null(&ids->uuid)) { 3253 printk_ratelimited(KERN_WARNING 3254 "No UUID available providing old NGUID\n"); 3255 return sysfs_emit(buf, "%pU\n", ids->nguid); 3256 } 3257 return sysfs_emit(buf, "%pU\n", &ids->uuid); 3258 } 3259 static DEVICE_ATTR_RO(uuid); 3260 3261 static ssize_t eui_show(struct device *dev, struct device_attribute *attr, 3262 char *buf) 3263 { 3264 return sysfs_emit(buf, "%8ph\n", dev_to_ns_head(dev)->ids.eui64); 3265 } 3266 static DEVICE_ATTR_RO(eui); 3267 3268 static ssize_t nsid_show(struct device *dev, struct device_attribute *attr, 3269 char *buf) 3270 { 3271 return sysfs_emit(buf, "%d\n", dev_to_ns_head(dev)->ns_id); 3272 } 3273 static DEVICE_ATTR_RO(nsid); 3274 3275 static struct attribute *nvme_ns_id_attrs[] = { 3276 &dev_attr_wwid.attr, 3277 &dev_attr_uuid.attr, 3278 &dev_attr_nguid.attr, 3279 &dev_attr_eui.attr, 3280 &dev_attr_nsid.attr, 3281 #ifdef CONFIG_NVME_MULTIPATH 3282 &dev_attr_ana_grpid.attr, 3283 &dev_attr_ana_state.attr, 3284 #endif 3285 NULL, 3286 }; 3287 3288 static umode_t nvme_ns_id_attrs_are_visible(struct kobject *kobj, 3289 struct attribute *a, int n) 3290 { 3291 struct device *dev = container_of(kobj, struct device, kobj); 3292 struct nvme_ns_ids *ids = &dev_to_ns_head(dev)->ids; 3293 3294 if (a == &dev_attr_uuid.attr) { 3295 if (uuid_is_null(&ids->uuid) && 3296 !memchr_inv(ids->nguid, 0, sizeof(ids->nguid))) 3297 return 0; 3298 } 3299 if (a == &dev_attr_nguid.attr) { 3300 if (!memchr_inv(ids->nguid, 0, sizeof(ids->nguid))) 3301 return 0; 3302 } 3303 if (a == &dev_attr_eui.attr) { 3304 if (!memchr_inv(ids->eui64, 0, sizeof(ids->eui64))) 3305 return 0; 3306 } 3307 #ifdef CONFIG_NVME_MULTIPATH 3308 if (a == &dev_attr_ana_grpid.attr || a == &dev_attr_ana_state.attr) { 3309 if (dev_to_disk(dev)->fops != &nvme_bdev_ops) /* per-path attr */ 3310 return 0; 3311 if (!nvme_ctrl_use_ana(nvme_get_ns_from_dev(dev)->ctrl)) 3312 return 0; 3313 } 3314 #endif 3315 return a->mode; 3316 } 3317 3318 static const struct attribute_group nvme_ns_id_attr_group = { 3319 .attrs = nvme_ns_id_attrs, 3320 .is_visible = nvme_ns_id_attrs_are_visible, 3321 }; 3322 3323 const struct attribute_group *nvme_ns_id_attr_groups[] = { 3324 &nvme_ns_id_attr_group, 3325 NULL, 3326 }; 3327 3328 #define nvme_show_str_function(field) \ 3329 static ssize_t field##_show(struct device *dev, \ 3330 struct device_attribute *attr, char *buf) \ 3331 { \ 3332 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); \ 3333 return sysfs_emit(buf, "%.*s\n", \ 3334 (int)sizeof(ctrl->subsys->field), ctrl->subsys->field); \ 3335 } \ 3336 static DEVICE_ATTR(field, S_IRUGO, field##_show, NULL); 3337 3338 nvme_show_str_function(model); 3339 nvme_show_str_function(serial); 3340 nvme_show_str_function(firmware_rev); 3341 3342 #define nvme_show_int_function(field) \ 3343 static ssize_t field##_show(struct device *dev, \ 3344 struct device_attribute *attr, char *buf) \ 3345 { \ 3346 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); \ 3347 return sysfs_emit(buf, "%d\n", ctrl->field); \ 3348 } \ 3349 static DEVICE_ATTR(field, S_IRUGO, field##_show, NULL); 3350 3351 nvme_show_int_function(cntlid); 3352 nvme_show_int_function(numa_node); 3353 nvme_show_int_function(queue_count); 3354 nvme_show_int_function(sqsize); 3355 nvme_show_int_function(kato); 3356 3357 static ssize_t nvme_sysfs_delete(struct device *dev, 3358 struct device_attribute *attr, const char *buf, 3359 size_t count) 3360 { 3361 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 3362 3363 if (device_remove_file_self(dev, attr)) 3364 nvme_delete_ctrl_sync(ctrl); 3365 return count; 3366 } 3367 static DEVICE_ATTR(delete_controller, S_IWUSR, NULL, nvme_sysfs_delete); 3368 3369 static ssize_t nvme_sysfs_show_transport(struct device *dev, 3370 struct device_attribute *attr, 3371 char *buf) 3372 { 3373 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 3374 3375 return sysfs_emit(buf, "%s\n", ctrl->ops->name); 3376 } 3377 static DEVICE_ATTR(transport, S_IRUGO, nvme_sysfs_show_transport, NULL); 3378 3379 static ssize_t nvme_sysfs_show_state(struct device *dev, 3380 struct device_attribute *attr, 3381 char *buf) 3382 { 3383 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 3384 static const char *const state_name[] = { 3385 [NVME_CTRL_NEW] = "new", 3386 [NVME_CTRL_LIVE] = "live", 3387 [NVME_CTRL_RESETTING] = "resetting", 3388 [NVME_CTRL_CONNECTING] = "connecting", 3389 [NVME_CTRL_DELETING] = "deleting", 3390 [NVME_CTRL_DELETING_NOIO]= "deleting (no IO)", 3391 [NVME_CTRL_DEAD] = "dead", 3392 }; 3393 3394 if ((unsigned)ctrl->state < ARRAY_SIZE(state_name) && 3395 state_name[ctrl->state]) 3396 return sysfs_emit(buf, "%s\n", state_name[ctrl->state]); 3397 3398 return sysfs_emit(buf, "unknown state\n"); 3399 } 3400 3401 static DEVICE_ATTR(state, S_IRUGO, nvme_sysfs_show_state, NULL); 3402 3403 static ssize_t nvme_sysfs_show_subsysnqn(struct device *dev, 3404 struct device_attribute *attr, 3405 char *buf) 3406 { 3407 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 3408 3409 return sysfs_emit(buf, "%s\n", ctrl->subsys->subnqn); 3410 } 3411 static DEVICE_ATTR(subsysnqn, S_IRUGO, nvme_sysfs_show_subsysnqn, NULL); 3412 3413 static ssize_t nvme_sysfs_show_hostnqn(struct device *dev, 3414 struct device_attribute *attr, 3415 char *buf) 3416 { 3417 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 3418 3419 return sysfs_emit(buf, "%s\n", ctrl->opts->host->nqn); 3420 } 3421 static DEVICE_ATTR(hostnqn, S_IRUGO, nvme_sysfs_show_hostnqn, NULL); 3422 3423 static ssize_t nvme_sysfs_show_hostid(struct device *dev, 3424 struct device_attribute *attr, 3425 char *buf) 3426 { 3427 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 3428 3429 return sysfs_emit(buf, "%pU\n", &ctrl->opts->host->id); 3430 } 3431 static DEVICE_ATTR(hostid, S_IRUGO, nvme_sysfs_show_hostid, NULL); 3432 3433 static ssize_t nvme_sysfs_show_address(struct device *dev, 3434 struct device_attribute *attr, 3435 char *buf) 3436 { 3437 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 3438 3439 return ctrl->ops->get_address(ctrl, buf, PAGE_SIZE); 3440 } 3441 static DEVICE_ATTR(address, S_IRUGO, nvme_sysfs_show_address, NULL); 3442 3443 static ssize_t nvme_ctrl_loss_tmo_show(struct device *dev, 3444 struct device_attribute *attr, char *buf) 3445 { 3446 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 3447 struct nvmf_ctrl_options *opts = ctrl->opts; 3448 3449 if (ctrl->opts->max_reconnects == -1) 3450 return sysfs_emit(buf, "off\n"); 3451 return sysfs_emit(buf, "%d\n", 3452 opts->max_reconnects * opts->reconnect_delay); 3453 } 3454 3455 static ssize_t nvme_ctrl_loss_tmo_store(struct device *dev, 3456 struct device_attribute *attr, const char *buf, size_t count) 3457 { 3458 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 3459 struct nvmf_ctrl_options *opts = ctrl->opts; 3460 int ctrl_loss_tmo, err; 3461 3462 err = kstrtoint(buf, 10, &ctrl_loss_tmo); 3463 if (err) 3464 return -EINVAL; 3465 3466 if (ctrl_loss_tmo < 0) 3467 opts->max_reconnects = -1; 3468 else 3469 opts->max_reconnects = DIV_ROUND_UP(ctrl_loss_tmo, 3470 opts->reconnect_delay); 3471 return count; 3472 } 3473 static DEVICE_ATTR(ctrl_loss_tmo, S_IRUGO | S_IWUSR, 3474 nvme_ctrl_loss_tmo_show, nvme_ctrl_loss_tmo_store); 3475 3476 static ssize_t nvme_ctrl_reconnect_delay_show(struct device *dev, 3477 struct device_attribute *attr, char *buf) 3478 { 3479 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 3480 3481 if (ctrl->opts->reconnect_delay == -1) 3482 return sysfs_emit(buf, "off\n"); 3483 return sysfs_emit(buf, "%d\n", ctrl->opts->reconnect_delay); 3484 } 3485 3486 static ssize_t nvme_ctrl_reconnect_delay_store(struct device *dev, 3487 struct device_attribute *attr, const char *buf, size_t count) 3488 { 3489 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 3490 unsigned int v; 3491 int err; 3492 3493 err = kstrtou32(buf, 10, &v); 3494 if (err) 3495 return err; 3496 3497 ctrl->opts->reconnect_delay = v; 3498 return count; 3499 } 3500 static DEVICE_ATTR(reconnect_delay, S_IRUGO | S_IWUSR, 3501 nvme_ctrl_reconnect_delay_show, nvme_ctrl_reconnect_delay_store); 3502 3503 static ssize_t nvme_ctrl_fast_io_fail_tmo_show(struct device *dev, 3504 struct device_attribute *attr, char *buf) 3505 { 3506 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 3507 3508 if (ctrl->opts->fast_io_fail_tmo == -1) 3509 return sysfs_emit(buf, "off\n"); 3510 return sysfs_emit(buf, "%d\n", ctrl->opts->fast_io_fail_tmo); 3511 } 3512 3513 static ssize_t nvme_ctrl_fast_io_fail_tmo_store(struct device *dev, 3514 struct device_attribute *attr, const char *buf, size_t count) 3515 { 3516 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 3517 struct nvmf_ctrl_options *opts = ctrl->opts; 3518 int fast_io_fail_tmo, err; 3519 3520 err = kstrtoint(buf, 10, &fast_io_fail_tmo); 3521 if (err) 3522 return -EINVAL; 3523 3524 if (fast_io_fail_tmo < 0) 3525 opts->fast_io_fail_tmo = -1; 3526 else 3527 opts->fast_io_fail_tmo = fast_io_fail_tmo; 3528 return count; 3529 } 3530 static DEVICE_ATTR(fast_io_fail_tmo, S_IRUGO | S_IWUSR, 3531 nvme_ctrl_fast_io_fail_tmo_show, nvme_ctrl_fast_io_fail_tmo_store); 3532 3533 static struct attribute *nvme_dev_attrs[] = { 3534 &dev_attr_reset_controller.attr, 3535 &dev_attr_rescan_controller.attr, 3536 &dev_attr_model.attr, 3537 &dev_attr_serial.attr, 3538 &dev_attr_firmware_rev.attr, 3539 &dev_attr_cntlid.attr, 3540 &dev_attr_delete_controller.attr, 3541 &dev_attr_transport.attr, 3542 &dev_attr_subsysnqn.attr, 3543 &dev_attr_address.attr, 3544 &dev_attr_state.attr, 3545 &dev_attr_numa_node.attr, 3546 &dev_attr_queue_count.attr, 3547 &dev_attr_sqsize.attr, 3548 &dev_attr_hostnqn.attr, 3549 &dev_attr_hostid.attr, 3550 &dev_attr_ctrl_loss_tmo.attr, 3551 &dev_attr_reconnect_delay.attr, 3552 &dev_attr_fast_io_fail_tmo.attr, 3553 &dev_attr_kato.attr, 3554 NULL 3555 }; 3556 3557 static umode_t nvme_dev_attrs_are_visible(struct kobject *kobj, 3558 struct attribute *a, int n) 3559 { 3560 struct device *dev = container_of(kobj, struct device, kobj); 3561 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 3562 3563 if (a == &dev_attr_delete_controller.attr && !ctrl->ops->delete_ctrl) 3564 return 0; 3565 if (a == &dev_attr_address.attr && !ctrl->ops->get_address) 3566 return 0; 3567 if (a == &dev_attr_hostnqn.attr && !ctrl->opts) 3568 return 0; 3569 if (a == &dev_attr_hostid.attr && !ctrl->opts) 3570 return 0; 3571 if (a == &dev_attr_ctrl_loss_tmo.attr && !ctrl->opts) 3572 return 0; 3573 if (a == &dev_attr_reconnect_delay.attr && !ctrl->opts) 3574 return 0; 3575 if (a == &dev_attr_fast_io_fail_tmo.attr && !ctrl->opts) 3576 return 0; 3577 3578 return a->mode; 3579 } 3580 3581 static const struct attribute_group nvme_dev_attrs_group = { 3582 .attrs = nvme_dev_attrs, 3583 .is_visible = nvme_dev_attrs_are_visible, 3584 }; 3585 3586 static const struct attribute_group *nvme_dev_attr_groups[] = { 3587 &nvme_dev_attrs_group, 3588 NULL, 3589 }; 3590 3591 static struct nvme_ns_head *nvme_find_ns_head(struct nvme_subsystem *subsys, 3592 unsigned nsid) 3593 { 3594 struct nvme_ns_head *h; 3595 3596 lockdep_assert_held(&subsys->lock); 3597 3598 list_for_each_entry(h, &subsys->nsheads, entry) { 3599 if (h->ns_id != nsid) 3600 continue; 3601 if (!list_empty(&h->list) && nvme_tryget_ns_head(h)) 3602 return h; 3603 } 3604 3605 return NULL; 3606 } 3607 3608 static int __nvme_check_ids(struct nvme_subsystem *subsys, 3609 struct nvme_ns_head *new) 3610 { 3611 struct nvme_ns_head *h; 3612 3613 lockdep_assert_held(&subsys->lock); 3614 3615 list_for_each_entry(h, &subsys->nsheads, entry) { 3616 if (nvme_ns_ids_valid(&new->ids) && 3617 nvme_ns_ids_equal(&new->ids, &h->ids)) 3618 return -EINVAL; 3619 } 3620 3621 return 0; 3622 } 3623 3624 static void nvme_cdev_rel(struct device *dev) 3625 { 3626 ida_simple_remove(&nvme_ns_chr_minor_ida, MINOR(dev->devt)); 3627 } 3628 3629 void nvme_cdev_del(struct cdev *cdev, struct device *cdev_device) 3630 { 3631 cdev_device_del(cdev, cdev_device); 3632 put_device(cdev_device); 3633 } 3634 3635 int nvme_cdev_add(struct cdev *cdev, struct device *cdev_device, 3636 const struct file_operations *fops, struct module *owner) 3637 { 3638 int minor, ret; 3639 3640 minor = ida_simple_get(&nvme_ns_chr_minor_ida, 0, 0, GFP_KERNEL); 3641 if (minor < 0) 3642 return minor; 3643 cdev_device->devt = MKDEV(MAJOR(nvme_ns_chr_devt), minor); 3644 cdev_device->class = nvme_ns_chr_class; 3645 cdev_device->release = nvme_cdev_rel; 3646 device_initialize(cdev_device); 3647 cdev_init(cdev, fops); 3648 cdev->owner = owner; 3649 ret = cdev_device_add(cdev, cdev_device); 3650 if (ret) 3651 put_device(cdev_device); 3652 3653 return ret; 3654 } 3655 3656 static int nvme_ns_chr_open(struct inode *inode, struct file *file) 3657 { 3658 return nvme_ns_open(container_of(inode->i_cdev, struct nvme_ns, cdev)); 3659 } 3660 3661 static int nvme_ns_chr_release(struct inode *inode, struct file *file) 3662 { 3663 nvme_ns_release(container_of(inode->i_cdev, struct nvme_ns, cdev)); 3664 return 0; 3665 } 3666 3667 static const struct file_operations nvme_ns_chr_fops = { 3668 .owner = THIS_MODULE, 3669 .open = nvme_ns_chr_open, 3670 .release = nvme_ns_chr_release, 3671 .unlocked_ioctl = nvme_ns_chr_ioctl, 3672 .compat_ioctl = compat_ptr_ioctl, 3673 }; 3674 3675 static int nvme_add_ns_cdev(struct nvme_ns *ns) 3676 { 3677 int ret; 3678 3679 ns->cdev_device.parent = ns->ctrl->device; 3680 ret = dev_set_name(&ns->cdev_device, "ng%dn%d", 3681 ns->ctrl->instance, ns->head->instance); 3682 if (ret) 3683 return ret; 3684 3685 return nvme_cdev_add(&ns->cdev, &ns->cdev_device, &nvme_ns_chr_fops, 3686 ns->ctrl->ops->module); 3687 } 3688 3689 static struct nvme_ns_head *nvme_alloc_ns_head(struct nvme_ctrl *ctrl, 3690 unsigned nsid, struct nvme_ns_ids *ids) 3691 { 3692 struct nvme_ns_head *head; 3693 size_t size = sizeof(*head); 3694 int ret = -ENOMEM; 3695 3696 #ifdef CONFIG_NVME_MULTIPATH 3697 size += num_possible_nodes() * sizeof(struct nvme_ns *); 3698 #endif 3699 3700 head = kzalloc(size, GFP_KERNEL); 3701 if (!head) 3702 goto out; 3703 ret = ida_simple_get(&ctrl->subsys->ns_ida, 1, 0, GFP_KERNEL); 3704 if (ret < 0) 3705 goto out_free_head; 3706 head->instance = ret; 3707 INIT_LIST_HEAD(&head->list); 3708 ret = init_srcu_struct(&head->srcu); 3709 if (ret) 3710 goto out_ida_remove; 3711 head->subsys = ctrl->subsys; 3712 head->ns_id = nsid; 3713 head->ids = *ids; 3714 kref_init(&head->ref); 3715 3716 ret = __nvme_check_ids(ctrl->subsys, head); 3717 if (ret) { 3718 dev_err(ctrl->device, 3719 "duplicate IDs for nsid %d\n", nsid); 3720 goto out_cleanup_srcu; 3721 } 3722 3723 if (head->ids.csi) { 3724 ret = nvme_get_effects_log(ctrl, head->ids.csi, &head->effects); 3725 if (ret) 3726 goto out_cleanup_srcu; 3727 } else 3728 head->effects = ctrl->effects; 3729 3730 ret = nvme_mpath_alloc_disk(ctrl, head); 3731 if (ret) 3732 goto out_cleanup_srcu; 3733 3734 list_add_tail(&head->entry, &ctrl->subsys->nsheads); 3735 3736 kref_get(&ctrl->subsys->ref); 3737 3738 return head; 3739 out_cleanup_srcu: 3740 cleanup_srcu_struct(&head->srcu); 3741 out_ida_remove: 3742 ida_simple_remove(&ctrl->subsys->ns_ida, head->instance); 3743 out_free_head: 3744 kfree(head); 3745 out: 3746 if (ret > 0) 3747 ret = blk_status_to_errno(nvme_error_status(ret)); 3748 return ERR_PTR(ret); 3749 } 3750 3751 static int nvme_init_ns_head(struct nvme_ns *ns, unsigned nsid, 3752 struct nvme_ns_ids *ids, bool is_shared) 3753 { 3754 struct nvme_ctrl *ctrl = ns->ctrl; 3755 struct nvme_ns_head *head = NULL; 3756 int ret = 0; 3757 3758 mutex_lock(&ctrl->subsys->lock); 3759 head = nvme_find_ns_head(ctrl->subsys, nsid); 3760 if (!head) { 3761 head = nvme_alloc_ns_head(ctrl, nsid, ids); 3762 if (IS_ERR(head)) { 3763 ret = PTR_ERR(head); 3764 goto out_unlock; 3765 } 3766 head->shared = is_shared; 3767 } else { 3768 ret = -EINVAL; 3769 if (!is_shared || !head->shared) { 3770 dev_err(ctrl->device, 3771 "Duplicate unshared namespace %d\n", nsid); 3772 goto out_put_ns_head; 3773 } 3774 if (!nvme_ns_ids_equal(&head->ids, ids)) { 3775 dev_err(ctrl->device, 3776 "IDs don't match for shared namespace %d\n", 3777 nsid); 3778 goto out_put_ns_head; 3779 } 3780 } 3781 3782 list_add_tail_rcu(&ns->siblings, &head->list); 3783 ns->head = head; 3784 mutex_unlock(&ctrl->subsys->lock); 3785 return 0; 3786 3787 out_put_ns_head: 3788 nvme_put_ns_head(head); 3789 out_unlock: 3790 mutex_unlock(&ctrl->subsys->lock); 3791 return ret; 3792 } 3793 3794 struct nvme_ns *nvme_find_get_ns(struct nvme_ctrl *ctrl, unsigned nsid) 3795 { 3796 struct nvme_ns *ns, *ret = NULL; 3797 3798 down_read(&ctrl->namespaces_rwsem); 3799 list_for_each_entry(ns, &ctrl->namespaces, list) { 3800 if (ns->head->ns_id == nsid) { 3801 if (!nvme_get_ns(ns)) 3802 continue; 3803 ret = ns; 3804 break; 3805 } 3806 if (ns->head->ns_id > nsid) 3807 break; 3808 } 3809 up_read(&ctrl->namespaces_rwsem); 3810 return ret; 3811 } 3812 EXPORT_SYMBOL_NS_GPL(nvme_find_get_ns, NVME_TARGET_PASSTHRU); 3813 3814 /* 3815 * Add the namespace to the controller list while keeping the list ordered. 3816 */ 3817 static void nvme_ns_add_to_ctrl_list(struct nvme_ns *ns) 3818 { 3819 struct nvme_ns *tmp; 3820 3821 list_for_each_entry_reverse(tmp, &ns->ctrl->namespaces, list) { 3822 if (tmp->head->ns_id < ns->head->ns_id) { 3823 list_add(&ns->list, &tmp->list); 3824 return; 3825 } 3826 } 3827 list_add(&ns->list, &ns->ctrl->namespaces); 3828 } 3829 3830 static void nvme_alloc_ns(struct nvme_ctrl *ctrl, unsigned nsid, 3831 struct nvme_ns_ids *ids) 3832 { 3833 struct nvme_ns *ns; 3834 struct gendisk *disk; 3835 struct nvme_id_ns *id; 3836 int node = ctrl->numa_node; 3837 3838 if (nvme_identify_ns(ctrl, nsid, ids, &id)) 3839 return; 3840 3841 ns = kzalloc_node(sizeof(*ns), GFP_KERNEL, node); 3842 if (!ns) 3843 goto out_free_id; 3844 3845 disk = blk_mq_alloc_disk(ctrl->tagset, ns); 3846 if (IS_ERR(disk)) 3847 goto out_free_ns; 3848 disk->fops = &nvme_bdev_ops; 3849 disk->private_data = ns; 3850 3851 ns->disk = disk; 3852 ns->queue = disk->queue; 3853 3854 if (ctrl->opts && ctrl->opts->data_digest) 3855 blk_queue_flag_set(QUEUE_FLAG_STABLE_WRITES, ns->queue); 3856 3857 blk_queue_flag_set(QUEUE_FLAG_NONROT, ns->queue); 3858 if (ctrl->ops->flags & NVME_F_PCI_P2PDMA) 3859 blk_queue_flag_set(QUEUE_FLAG_PCI_P2PDMA, ns->queue); 3860 3861 ns->ctrl = ctrl; 3862 kref_init(&ns->kref); 3863 3864 if (nvme_init_ns_head(ns, nsid, ids, id->nmic & NVME_NS_NMIC_SHARED)) 3865 goto out_cleanup_disk; 3866 3867 /* 3868 * Without the multipath code enabled, multiple controller per 3869 * subsystems are visible as devices and thus we cannot use the 3870 * subsystem instance. 3871 */ 3872 if (!nvme_mpath_set_disk_name(ns, disk->disk_name, &disk->flags)) 3873 sprintf(disk->disk_name, "nvme%dn%d", ctrl->instance, 3874 ns->head->instance); 3875 3876 if (nvme_update_ns_info(ns, id)) 3877 goto out_unlink_ns; 3878 3879 down_write(&ctrl->namespaces_rwsem); 3880 nvme_ns_add_to_ctrl_list(ns); 3881 up_write(&ctrl->namespaces_rwsem); 3882 nvme_get_ctrl(ctrl); 3883 3884 if (device_add_disk(ctrl->device, ns->disk, nvme_ns_id_attr_groups)) 3885 goto out_cleanup_ns_from_list; 3886 3887 if (!nvme_ns_head_multipath(ns->head)) 3888 nvme_add_ns_cdev(ns); 3889 3890 nvme_mpath_add_disk(ns, id); 3891 nvme_fault_inject_init(&ns->fault_inject, ns->disk->disk_name); 3892 kfree(id); 3893 3894 return; 3895 3896 out_cleanup_ns_from_list: 3897 nvme_put_ctrl(ctrl); 3898 down_write(&ctrl->namespaces_rwsem); 3899 list_del_init(&ns->list); 3900 up_write(&ctrl->namespaces_rwsem); 3901 out_unlink_ns: 3902 mutex_lock(&ctrl->subsys->lock); 3903 list_del_rcu(&ns->siblings); 3904 if (list_empty(&ns->head->list)) 3905 list_del_init(&ns->head->entry); 3906 mutex_unlock(&ctrl->subsys->lock); 3907 nvme_put_ns_head(ns->head); 3908 out_cleanup_disk: 3909 blk_cleanup_disk(disk); 3910 out_free_ns: 3911 kfree(ns); 3912 out_free_id: 3913 kfree(id); 3914 } 3915 3916 static void nvme_ns_remove(struct nvme_ns *ns) 3917 { 3918 bool last_path = false; 3919 3920 if (test_and_set_bit(NVME_NS_REMOVING, &ns->flags)) 3921 return; 3922 3923 clear_bit(NVME_NS_READY, &ns->flags); 3924 set_capacity(ns->disk, 0); 3925 nvme_fault_inject_fini(&ns->fault_inject); 3926 3927 mutex_lock(&ns->ctrl->subsys->lock); 3928 list_del_rcu(&ns->siblings); 3929 if (list_empty(&ns->head->list)) { 3930 list_del_init(&ns->head->entry); 3931 last_path = true; 3932 } 3933 mutex_unlock(&ns->ctrl->subsys->lock); 3934 3935 /* guarantee not available in head->list */ 3936 synchronize_rcu(); 3937 3938 /* wait for concurrent submissions */ 3939 if (nvme_mpath_clear_current_path(ns)) 3940 synchronize_srcu(&ns->head->srcu); 3941 3942 if (!nvme_ns_head_multipath(ns->head)) 3943 nvme_cdev_del(&ns->cdev, &ns->cdev_device); 3944 del_gendisk(ns->disk); 3945 blk_cleanup_queue(ns->queue); 3946 3947 down_write(&ns->ctrl->namespaces_rwsem); 3948 list_del_init(&ns->list); 3949 up_write(&ns->ctrl->namespaces_rwsem); 3950 3951 if (last_path) 3952 nvme_mpath_shutdown_disk(ns->head); 3953 nvme_put_ns(ns); 3954 } 3955 3956 static void nvme_ns_remove_by_nsid(struct nvme_ctrl *ctrl, u32 nsid) 3957 { 3958 struct nvme_ns *ns = nvme_find_get_ns(ctrl, nsid); 3959 3960 if (ns) { 3961 nvme_ns_remove(ns); 3962 nvme_put_ns(ns); 3963 } 3964 } 3965 3966 static void nvme_validate_ns(struct nvme_ns *ns, struct nvme_ns_ids *ids) 3967 { 3968 struct nvme_id_ns *id; 3969 int ret = NVME_SC_INVALID_NS | NVME_SC_DNR; 3970 3971 if (test_bit(NVME_NS_DEAD, &ns->flags)) 3972 goto out; 3973 3974 ret = nvme_identify_ns(ns->ctrl, ns->head->ns_id, ids, &id); 3975 if (ret) 3976 goto out; 3977 3978 ret = NVME_SC_INVALID_NS | NVME_SC_DNR; 3979 if (!nvme_ns_ids_equal(&ns->head->ids, ids)) { 3980 dev_err(ns->ctrl->device, 3981 "identifiers changed for nsid %d\n", ns->head->ns_id); 3982 goto out_free_id; 3983 } 3984 3985 ret = nvme_update_ns_info(ns, id); 3986 3987 out_free_id: 3988 kfree(id); 3989 out: 3990 /* 3991 * Only remove the namespace if we got a fatal error back from the 3992 * device, otherwise ignore the error and just move on. 3993 * 3994 * TODO: we should probably schedule a delayed retry here. 3995 */ 3996 if (ret > 0 && (ret & NVME_SC_DNR)) 3997 nvme_ns_remove(ns); 3998 } 3999 4000 static void nvme_validate_or_alloc_ns(struct nvme_ctrl *ctrl, unsigned nsid) 4001 { 4002 struct nvme_ns_ids ids = { }; 4003 struct nvme_ns *ns; 4004 4005 if (nvme_identify_ns_descs(ctrl, nsid, &ids)) 4006 return; 4007 4008 ns = nvme_find_get_ns(ctrl, nsid); 4009 if (ns) { 4010 nvme_validate_ns(ns, &ids); 4011 nvme_put_ns(ns); 4012 return; 4013 } 4014 4015 switch (ids.csi) { 4016 case NVME_CSI_NVM: 4017 nvme_alloc_ns(ctrl, nsid, &ids); 4018 break; 4019 case NVME_CSI_ZNS: 4020 if (!IS_ENABLED(CONFIG_BLK_DEV_ZONED)) { 4021 dev_warn(ctrl->device, 4022 "nsid %u not supported without CONFIG_BLK_DEV_ZONED\n", 4023 nsid); 4024 break; 4025 } 4026 if (!nvme_multi_css(ctrl)) { 4027 dev_warn(ctrl->device, 4028 "command set not reported for nsid: %d\n", 4029 nsid); 4030 break; 4031 } 4032 nvme_alloc_ns(ctrl, nsid, &ids); 4033 break; 4034 default: 4035 dev_warn(ctrl->device, "unknown csi %u for nsid %u\n", 4036 ids.csi, nsid); 4037 break; 4038 } 4039 } 4040 4041 static void nvme_remove_invalid_namespaces(struct nvme_ctrl *ctrl, 4042 unsigned nsid) 4043 { 4044 struct nvme_ns *ns, *next; 4045 LIST_HEAD(rm_list); 4046 4047 down_write(&ctrl->namespaces_rwsem); 4048 list_for_each_entry_safe(ns, next, &ctrl->namespaces, list) { 4049 if (ns->head->ns_id > nsid || test_bit(NVME_NS_DEAD, &ns->flags)) 4050 list_move_tail(&ns->list, &rm_list); 4051 } 4052 up_write(&ctrl->namespaces_rwsem); 4053 4054 list_for_each_entry_safe(ns, next, &rm_list, list) 4055 nvme_ns_remove(ns); 4056 4057 } 4058 4059 static int nvme_scan_ns_list(struct nvme_ctrl *ctrl) 4060 { 4061 const int nr_entries = NVME_IDENTIFY_DATA_SIZE / sizeof(__le32); 4062 __le32 *ns_list; 4063 u32 prev = 0; 4064 int ret = 0, i; 4065 4066 if (nvme_ctrl_limited_cns(ctrl)) 4067 return -EOPNOTSUPP; 4068 4069 ns_list = kzalloc(NVME_IDENTIFY_DATA_SIZE, GFP_KERNEL); 4070 if (!ns_list) 4071 return -ENOMEM; 4072 4073 for (;;) { 4074 struct nvme_command cmd = { 4075 .identify.opcode = nvme_admin_identify, 4076 .identify.cns = NVME_ID_CNS_NS_ACTIVE_LIST, 4077 .identify.nsid = cpu_to_le32(prev), 4078 }; 4079 4080 ret = nvme_submit_sync_cmd(ctrl->admin_q, &cmd, ns_list, 4081 NVME_IDENTIFY_DATA_SIZE); 4082 if (ret) { 4083 dev_warn(ctrl->device, 4084 "Identify NS List failed (status=0x%x)\n", ret); 4085 goto free; 4086 } 4087 4088 for (i = 0; i < nr_entries; i++) { 4089 u32 nsid = le32_to_cpu(ns_list[i]); 4090 4091 if (!nsid) /* end of the list? */ 4092 goto out; 4093 nvme_validate_or_alloc_ns(ctrl, nsid); 4094 while (++prev < nsid) 4095 nvme_ns_remove_by_nsid(ctrl, prev); 4096 } 4097 } 4098 out: 4099 nvme_remove_invalid_namespaces(ctrl, prev); 4100 free: 4101 kfree(ns_list); 4102 return ret; 4103 } 4104 4105 static void nvme_scan_ns_sequential(struct nvme_ctrl *ctrl) 4106 { 4107 struct nvme_id_ctrl *id; 4108 u32 nn, i; 4109 4110 if (nvme_identify_ctrl(ctrl, &id)) 4111 return; 4112 nn = le32_to_cpu(id->nn); 4113 kfree(id); 4114 4115 for (i = 1; i <= nn; i++) 4116 nvme_validate_or_alloc_ns(ctrl, i); 4117 4118 nvme_remove_invalid_namespaces(ctrl, nn); 4119 } 4120 4121 static void nvme_clear_changed_ns_log(struct nvme_ctrl *ctrl) 4122 { 4123 size_t log_size = NVME_MAX_CHANGED_NAMESPACES * sizeof(__le32); 4124 __le32 *log; 4125 int error; 4126 4127 log = kzalloc(log_size, GFP_KERNEL); 4128 if (!log) 4129 return; 4130 4131 /* 4132 * We need to read the log to clear the AEN, but we don't want to rely 4133 * on it for the changed namespace information as userspace could have 4134 * raced with us in reading the log page, which could cause us to miss 4135 * updates. 4136 */ 4137 error = nvme_get_log(ctrl, NVME_NSID_ALL, NVME_LOG_CHANGED_NS, 0, 4138 NVME_CSI_NVM, log, log_size, 0); 4139 if (error) 4140 dev_warn(ctrl->device, 4141 "reading changed ns log failed: %d\n", error); 4142 4143 kfree(log); 4144 } 4145 4146 static void nvme_scan_work(struct work_struct *work) 4147 { 4148 struct nvme_ctrl *ctrl = 4149 container_of(work, struct nvme_ctrl, scan_work); 4150 4151 /* No tagset on a live ctrl means IO queues could not created */ 4152 if (ctrl->state != NVME_CTRL_LIVE || !ctrl->tagset) 4153 return; 4154 4155 if (test_and_clear_bit(NVME_AER_NOTICE_NS_CHANGED, &ctrl->events)) { 4156 dev_info(ctrl->device, "rescanning namespaces.\n"); 4157 nvme_clear_changed_ns_log(ctrl); 4158 } 4159 4160 mutex_lock(&ctrl->scan_lock); 4161 if (nvme_scan_ns_list(ctrl) != 0) 4162 nvme_scan_ns_sequential(ctrl); 4163 mutex_unlock(&ctrl->scan_lock); 4164 } 4165 4166 /* 4167 * This function iterates the namespace list unlocked to allow recovery from 4168 * controller failure. It is up to the caller to ensure the namespace list is 4169 * not modified by scan work while this function is executing. 4170 */ 4171 void nvme_remove_namespaces(struct nvme_ctrl *ctrl) 4172 { 4173 struct nvme_ns *ns, *next; 4174 LIST_HEAD(ns_list); 4175 4176 /* 4177 * make sure to requeue I/O to all namespaces as these 4178 * might result from the scan itself and must complete 4179 * for the scan_work to make progress 4180 */ 4181 nvme_mpath_clear_ctrl_paths(ctrl); 4182 4183 /* prevent racing with ns scanning */ 4184 flush_work(&ctrl->scan_work); 4185 4186 /* 4187 * The dead states indicates the controller was not gracefully 4188 * disconnected. In that case, we won't be able to flush any data while 4189 * removing the namespaces' disks; fail all the queues now to avoid 4190 * potentially having to clean up the failed sync later. 4191 */ 4192 if (ctrl->state == NVME_CTRL_DEAD) 4193 nvme_kill_queues(ctrl); 4194 4195 /* this is a no-op when called from the controller reset handler */ 4196 nvme_change_ctrl_state(ctrl, NVME_CTRL_DELETING_NOIO); 4197 4198 down_write(&ctrl->namespaces_rwsem); 4199 list_splice_init(&ctrl->namespaces, &ns_list); 4200 up_write(&ctrl->namespaces_rwsem); 4201 4202 list_for_each_entry_safe(ns, next, &ns_list, list) 4203 nvme_ns_remove(ns); 4204 } 4205 EXPORT_SYMBOL_GPL(nvme_remove_namespaces); 4206 4207 static int nvme_class_uevent(struct device *dev, struct kobj_uevent_env *env) 4208 { 4209 struct nvme_ctrl *ctrl = 4210 container_of(dev, struct nvme_ctrl, ctrl_device); 4211 struct nvmf_ctrl_options *opts = ctrl->opts; 4212 int ret; 4213 4214 ret = add_uevent_var(env, "NVME_TRTYPE=%s", ctrl->ops->name); 4215 if (ret) 4216 return ret; 4217 4218 if (opts) { 4219 ret = add_uevent_var(env, "NVME_TRADDR=%s", opts->traddr); 4220 if (ret) 4221 return ret; 4222 4223 ret = add_uevent_var(env, "NVME_TRSVCID=%s", 4224 opts->trsvcid ?: "none"); 4225 if (ret) 4226 return ret; 4227 4228 ret = add_uevent_var(env, "NVME_HOST_TRADDR=%s", 4229 opts->host_traddr ?: "none"); 4230 if (ret) 4231 return ret; 4232 4233 ret = add_uevent_var(env, "NVME_HOST_IFACE=%s", 4234 opts->host_iface ?: "none"); 4235 } 4236 return ret; 4237 } 4238 4239 static void nvme_aen_uevent(struct nvme_ctrl *ctrl) 4240 { 4241 char *envp[2] = { NULL, NULL }; 4242 u32 aen_result = ctrl->aen_result; 4243 4244 ctrl->aen_result = 0; 4245 if (!aen_result) 4246 return; 4247 4248 envp[0] = kasprintf(GFP_KERNEL, "NVME_AEN=%#08x", aen_result); 4249 if (!envp[0]) 4250 return; 4251 kobject_uevent_env(&ctrl->device->kobj, KOBJ_CHANGE, envp); 4252 kfree(envp[0]); 4253 } 4254 4255 static void nvme_async_event_work(struct work_struct *work) 4256 { 4257 struct nvme_ctrl *ctrl = 4258 container_of(work, struct nvme_ctrl, async_event_work); 4259 4260 nvme_aen_uevent(ctrl); 4261 ctrl->ops->submit_async_event(ctrl); 4262 } 4263 4264 static bool nvme_ctrl_pp_status(struct nvme_ctrl *ctrl) 4265 { 4266 4267 u32 csts; 4268 4269 if (ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts)) 4270 return false; 4271 4272 if (csts == ~0) 4273 return false; 4274 4275 return ((ctrl->ctrl_config & NVME_CC_ENABLE) && (csts & NVME_CSTS_PP)); 4276 } 4277 4278 static void nvme_get_fw_slot_info(struct nvme_ctrl *ctrl) 4279 { 4280 struct nvme_fw_slot_info_log *log; 4281 4282 log = kmalloc(sizeof(*log), GFP_KERNEL); 4283 if (!log) 4284 return; 4285 4286 if (nvme_get_log(ctrl, NVME_NSID_ALL, NVME_LOG_FW_SLOT, 0, NVME_CSI_NVM, 4287 log, sizeof(*log), 0)) 4288 dev_warn(ctrl->device, "Get FW SLOT INFO log error\n"); 4289 kfree(log); 4290 } 4291 4292 static void nvme_fw_act_work(struct work_struct *work) 4293 { 4294 struct nvme_ctrl *ctrl = container_of(work, 4295 struct nvme_ctrl, fw_act_work); 4296 unsigned long fw_act_timeout; 4297 4298 if (ctrl->mtfa) 4299 fw_act_timeout = jiffies + 4300 msecs_to_jiffies(ctrl->mtfa * 100); 4301 else 4302 fw_act_timeout = jiffies + 4303 msecs_to_jiffies(admin_timeout * 1000); 4304 4305 nvme_stop_queues(ctrl); 4306 while (nvme_ctrl_pp_status(ctrl)) { 4307 if (time_after(jiffies, fw_act_timeout)) { 4308 dev_warn(ctrl->device, 4309 "Fw activation timeout, reset controller\n"); 4310 nvme_try_sched_reset(ctrl); 4311 return; 4312 } 4313 msleep(100); 4314 } 4315 4316 if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_LIVE)) 4317 return; 4318 4319 nvme_start_queues(ctrl); 4320 /* read FW slot information to clear the AER */ 4321 nvme_get_fw_slot_info(ctrl); 4322 } 4323 4324 static void nvme_handle_aen_notice(struct nvme_ctrl *ctrl, u32 result) 4325 { 4326 u32 aer_notice_type = (result & 0xff00) >> 8; 4327 4328 trace_nvme_async_event(ctrl, aer_notice_type); 4329 4330 switch (aer_notice_type) { 4331 case NVME_AER_NOTICE_NS_CHANGED: 4332 set_bit(NVME_AER_NOTICE_NS_CHANGED, &ctrl->events); 4333 nvme_queue_scan(ctrl); 4334 break; 4335 case NVME_AER_NOTICE_FW_ACT_STARTING: 4336 /* 4337 * We are (ab)using the RESETTING state to prevent subsequent 4338 * recovery actions from interfering with the controller's 4339 * firmware activation. 4340 */ 4341 if (nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING)) 4342 queue_work(nvme_wq, &ctrl->fw_act_work); 4343 break; 4344 #ifdef CONFIG_NVME_MULTIPATH 4345 case NVME_AER_NOTICE_ANA: 4346 if (!ctrl->ana_log_buf) 4347 break; 4348 queue_work(nvme_wq, &ctrl->ana_work); 4349 break; 4350 #endif 4351 case NVME_AER_NOTICE_DISC_CHANGED: 4352 ctrl->aen_result = result; 4353 break; 4354 default: 4355 dev_warn(ctrl->device, "async event result %08x\n", result); 4356 } 4357 } 4358 4359 void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status, 4360 volatile union nvme_result *res) 4361 { 4362 u32 result = le32_to_cpu(res->u32); 4363 u32 aer_type = result & 0x07; 4364 4365 if (le16_to_cpu(status) >> 1 != NVME_SC_SUCCESS) 4366 return; 4367 4368 switch (aer_type) { 4369 case NVME_AER_NOTICE: 4370 nvme_handle_aen_notice(ctrl, result); 4371 break; 4372 case NVME_AER_ERROR: 4373 case NVME_AER_SMART: 4374 case NVME_AER_CSS: 4375 case NVME_AER_VS: 4376 trace_nvme_async_event(ctrl, aer_type); 4377 ctrl->aen_result = result; 4378 break; 4379 default: 4380 break; 4381 } 4382 queue_work(nvme_wq, &ctrl->async_event_work); 4383 } 4384 EXPORT_SYMBOL_GPL(nvme_complete_async_event); 4385 4386 void nvme_stop_ctrl(struct nvme_ctrl *ctrl) 4387 { 4388 nvme_mpath_stop(ctrl); 4389 nvme_stop_keep_alive(ctrl); 4390 nvme_stop_failfast_work(ctrl); 4391 flush_work(&ctrl->async_event_work); 4392 cancel_work_sync(&ctrl->fw_act_work); 4393 } 4394 EXPORT_SYMBOL_GPL(nvme_stop_ctrl); 4395 4396 void nvme_start_ctrl(struct nvme_ctrl *ctrl) 4397 { 4398 nvme_start_keep_alive(ctrl); 4399 4400 nvme_enable_aen(ctrl); 4401 4402 if (ctrl->queue_count > 1) { 4403 nvme_queue_scan(ctrl); 4404 nvme_start_queues(ctrl); 4405 } 4406 } 4407 EXPORT_SYMBOL_GPL(nvme_start_ctrl); 4408 4409 void nvme_uninit_ctrl(struct nvme_ctrl *ctrl) 4410 { 4411 nvme_hwmon_exit(ctrl); 4412 nvme_fault_inject_fini(&ctrl->fault_inject); 4413 dev_pm_qos_hide_latency_tolerance(ctrl->device); 4414 cdev_device_del(&ctrl->cdev, ctrl->device); 4415 nvme_put_ctrl(ctrl); 4416 } 4417 EXPORT_SYMBOL_GPL(nvme_uninit_ctrl); 4418 4419 static void nvme_free_cels(struct nvme_ctrl *ctrl) 4420 { 4421 struct nvme_effects_log *cel; 4422 unsigned long i; 4423 4424 xa_for_each(&ctrl->cels, i, cel) { 4425 xa_erase(&ctrl->cels, i); 4426 kfree(cel); 4427 } 4428 4429 xa_destroy(&ctrl->cels); 4430 } 4431 4432 static void nvme_free_ctrl(struct device *dev) 4433 { 4434 struct nvme_ctrl *ctrl = 4435 container_of(dev, struct nvme_ctrl, ctrl_device); 4436 struct nvme_subsystem *subsys = ctrl->subsys; 4437 4438 if (!subsys || ctrl->instance != subsys->instance) 4439 ida_simple_remove(&nvme_instance_ida, ctrl->instance); 4440 4441 nvme_free_cels(ctrl); 4442 nvme_mpath_uninit(ctrl); 4443 __free_page(ctrl->discard_page); 4444 4445 if (subsys) { 4446 mutex_lock(&nvme_subsystems_lock); 4447 list_del(&ctrl->subsys_entry); 4448 sysfs_remove_link(&subsys->dev.kobj, dev_name(ctrl->device)); 4449 mutex_unlock(&nvme_subsystems_lock); 4450 } 4451 4452 ctrl->ops->free_ctrl(ctrl); 4453 4454 if (subsys) 4455 nvme_put_subsystem(subsys); 4456 } 4457 4458 /* 4459 * Initialize a NVMe controller structures. This needs to be called during 4460 * earliest initialization so that we have the initialized structured around 4461 * during probing. 4462 */ 4463 int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev, 4464 const struct nvme_ctrl_ops *ops, unsigned long quirks) 4465 { 4466 int ret; 4467 4468 ctrl->state = NVME_CTRL_NEW; 4469 clear_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags); 4470 spin_lock_init(&ctrl->lock); 4471 mutex_init(&ctrl->scan_lock); 4472 INIT_LIST_HEAD(&ctrl->namespaces); 4473 xa_init(&ctrl->cels); 4474 init_rwsem(&ctrl->namespaces_rwsem); 4475 ctrl->dev = dev; 4476 ctrl->ops = ops; 4477 ctrl->quirks = quirks; 4478 ctrl->numa_node = NUMA_NO_NODE; 4479 INIT_WORK(&ctrl->scan_work, nvme_scan_work); 4480 INIT_WORK(&ctrl->async_event_work, nvme_async_event_work); 4481 INIT_WORK(&ctrl->fw_act_work, nvme_fw_act_work); 4482 INIT_WORK(&ctrl->delete_work, nvme_delete_ctrl_work); 4483 init_waitqueue_head(&ctrl->state_wq); 4484 4485 INIT_DELAYED_WORK(&ctrl->ka_work, nvme_keep_alive_work); 4486 INIT_DELAYED_WORK(&ctrl->failfast_work, nvme_failfast_work); 4487 memset(&ctrl->ka_cmd, 0, sizeof(ctrl->ka_cmd)); 4488 ctrl->ka_cmd.common.opcode = nvme_admin_keep_alive; 4489 4490 BUILD_BUG_ON(NVME_DSM_MAX_RANGES * sizeof(struct nvme_dsm_range) > 4491 PAGE_SIZE); 4492 ctrl->discard_page = alloc_page(GFP_KERNEL); 4493 if (!ctrl->discard_page) { 4494 ret = -ENOMEM; 4495 goto out; 4496 } 4497 4498 ret = ida_simple_get(&nvme_instance_ida, 0, 0, GFP_KERNEL); 4499 if (ret < 0) 4500 goto out; 4501 ctrl->instance = ret; 4502 4503 device_initialize(&ctrl->ctrl_device); 4504 ctrl->device = &ctrl->ctrl_device; 4505 ctrl->device->devt = MKDEV(MAJOR(nvme_ctrl_base_chr_devt), 4506 ctrl->instance); 4507 ctrl->device->class = nvme_class; 4508 ctrl->device->parent = ctrl->dev; 4509 ctrl->device->groups = nvme_dev_attr_groups; 4510 ctrl->device->release = nvme_free_ctrl; 4511 dev_set_drvdata(ctrl->device, ctrl); 4512 ret = dev_set_name(ctrl->device, "nvme%d", ctrl->instance); 4513 if (ret) 4514 goto out_release_instance; 4515 4516 nvme_get_ctrl(ctrl); 4517 cdev_init(&ctrl->cdev, &nvme_dev_fops); 4518 ctrl->cdev.owner = ops->module; 4519 ret = cdev_device_add(&ctrl->cdev, ctrl->device); 4520 if (ret) 4521 goto out_free_name; 4522 4523 /* 4524 * Initialize latency tolerance controls. The sysfs files won't 4525 * be visible to userspace unless the device actually supports APST. 4526 */ 4527 ctrl->device->power.set_latency_tolerance = nvme_set_latency_tolerance; 4528 dev_pm_qos_update_user_latency_tolerance(ctrl->device, 4529 min(default_ps_max_latency_us, (unsigned long)S32_MAX)); 4530 4531 nvme_fault_inject_init(&ctrl->fault_inject, dev_name(ctrl->device)); 4532 nvme_mpath_init_ctrl(ctrl); 4533 4534 return 0; 4535 out_free_name: 4536 nvme_put_ctrl(ctrl); 4537 kfree_const(ctrl->device->kobj.name); 4538 out_release_instance: 4539 ida_simple_remove(&nvme_instance_ida, ctrl->instance); 4540 out: 4541 if (ctrl->discard_page) 4542 __free_page(ctrl->discard_page); 4543 return ret; 4544 } 4545 EXPORT_SYMBOL_GPL(nvme_init_ctrl); 4546 4547 static void nvme_start_ns_queue(struct nvme_ns *ns) 4548 { 4549 if (test_and_clear_bit(NVME_NS_STOPPED, &ns->flags)) 4550 blk_mq_unquiesce_queue(ns->queue); 4551 } 4552 4553 static void nvme_stop_ns_queue(struct nvme_ns *ns) 4554 { 4555 if (!test_and_set_bit(NVME_NS_STOPPED, &ns->flags)) 4556 blk_mq_quiesce_queue(ns->queue); 4557 else 4558 blk_mq_wait_quiesce_done(ns->queue); 4559 } 4560 4561 /* 4562 * Prepare a queue for teardown. 4563 * 4564 * This must forcibly unquiesce queues to avoid blocking dispatch, and only set 4565 * the capacity to 0 after that to avoid blocking dispatchers that may be 4566 * holding bd_butex. This will end buffered writers dirtying pages that can't 4567 * be synced. 4568 */ 4569 static void nvme_set_queue_dying(struct nvme_ns *ns) 4570 { 4571 if (test_and_set_bit(NVME_NS_DEAD, &ns->flags)) 4572 return; 4573 4574 blk_set_queue_dying(ns->queue); 4575 nvme_start_ns_queue(ns); 4576 4577 set_capacity_and_notify(ns->disk, 0); 4578 } 4579 4580 /** 4581 * nvme_kill_queues(): Ends all namespace queues 4582 * @ctrl: the dead controller that needs to end 4583 * 4584 * Call this function when the driver determines it is unable to get the 4585 * controller in a state capable of servicing IO. 4586 */ 4587 void nvme_kill_queues(struct nvme_ctrl *ctrl) 4588 { 4589 struct nvme_ns *ns; 4590 4591 down_read(&ctrl->namespaces_rwsem); 4592 4593 /* Forcibly unquiesce queues to avoid blocking dispatch */ 4594 if (ctrl->admin_q && !blk_queue_dying(ctrl->admin_q)) 4595 nvme_start_admin_queue(ctrl); 4596 4597 list_for_each_entry(ns, &ctrl->namespaces, list) 4598 nvme_set_queue_dying(ns); 4599 4600 up_read(&ctrl->namespaces_rwsem); 4601 } 4602 EXPORT_SYMBOL_GPL(nvme_kill_queues); 4603 4604 void nvme_unfreeze(struct nvme_ctrl *ctrl) 4605 { 4606 struct nvme_ns *ns; 4607 4608 down_read(&ctrl->namespaces_rwsem); 4609 list_for_each_entry(ns, &ctrl->namespaces, list) 4610 blk_mq_unfreeze_queue(ns->queue); 4611 up_read(&ctrl->namespaces_rwsem); 4612 } 4613 EXPORT_SYMBOL_GPL(nvme_unfreeze); 4614 4615 int nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout) 4616 { 4617 struct nvme_ns *ns; 4618 4619 down_read(&ctrl->namespaces_rwsem); 4620 list_for_each_entry(ns, &ctrl->namespaces, list) { 4621 timeout = blk_mq_freeze_queue_wait_timeout(ns->queue, timeout); 4622 if (timeout <= 0) 4623 break; 4624 } 4625 up_read(&ctrl->namespaces_rwsem); 4626 return timeout; 4627 } 4628 EXPORT_SYMBOL_GPL(nvme_wait_freeze_timeout); 4629 4630 void nvme_wait_freeze(struct nvme_ctrl *ctrl) 4631 { 4632 struct nvme_ns *ns; 4633 4634 down_read(&ctrl->namespaces_rwsem); 4635 list_for_each_entry(ns, &ctrl->namespaces, list) 4636 blk_mq_freeze_queue_wait(ns->queue); 4637 up_read(&ctrl->namespaces_rwsem); 4638 } 4639 EXPORT_SYMBOL_GPL(nvme_wait_freeze); 4640 4641 void nvme_start_freeze(struct nvme_ctrl *ctrl) 4642 { 4643 struct nvme_ns *ns; 4644 4645 down_read(&ctrl->namespaces_rwsem); 4646 list_for_each_entry(ns, &ctrl->namespaces, list) 4647 blk_freeze_queue_start(ns->queue); 4648 up_read(&ctrl->namespaces_rwsem); 4649 } 4650 EXPORT_SYMBOL_GPL(nvme_start_freeze); 4651 4652 void nvme_stop_queues(struct nvme_ctrl *ctrl) 4653 { 4654 struct nvme_ns *ns; 4655 4656 down_read(&ctrl->namespaces_rwsem); 4657 list_for_each_entry(ns, &ctrl->namespaces, list) 4658 nvme_stop_ns_queue(ns); 4659 up_read(&ctrl->namespaces_rwsem); 4660 } 4661 EXPORT_SYMBOL_GPL(nvme_stop_queues); 4662 4663 void nvme_start_queues(struct nvme_ctrl *ctrl) 4664 { 4665 struct nvme_ns *ns; 4666 4667 down_read(&ctrl->namespaces_rwsem); 4668 list_for_each_entry(ns, &ctrl->namespaces, list) 4669 nvme_start_ns_queue(ns); 4670 up_read(&ctrl->namespaces_rwsem); 4671 } 4672 EXPORT_SYMBOL_GPL(nvme_start_queues); 4673 4674 void nvme_stop_admin_queue(struct nvme_ctrl *ctrl) 4675 { 4676 if (!test_and_set_bit(NVME_CTRL_ADMIN_Q_STOPPED, &ctrl->flags)) 4677 blk_mq_quiesce_queue(ctrl->admin_q); 4678 else 4679 blk_mq_wait_quiesce_done(ctrl->admin_q); 4680 } 4681 EXPORT_SYMBOL_GPL(nvme_stop_admin_queue); 4682 4683 void nvme_start_admin_queue(struct nvme_ctrl *ctrl) 4684 { 4685 if (test_and_clear_bit(NVME_CTRL_ADMIN_Q_STOPPED, &ctrl->flags)) 4686 blk_mq_unquiesce_queue(ctrl->admin_q); 4687 } 4688 EXPORT_SYMBOL_GPL(nvme_start_admin_queue); 4689 4690 void nvme_sync_io_queues(struct nvme_ctrl *ctrl) 4691 { 4692 struct nvme_ns *ns; 4693 4694 down_read(&ctrl->namespaces_rwsem); 4695 list_for_each_entry(ns, &ctrl->namespaces, list) 4696 blk_sync_queue(ns->queue); 4697 up_read(&ctrl->namespaces_rwsem); 4698 } 4699 EXPORT_SYMBOL_GPL(nvme_sync_io_queues); 4700 4701 void nvme_sync_queues(struct nvme_ctrl *ctrl) 4702 { 4703 nvme_sync_io_queues(ctrl); 4704 if (ctrl->admin_q) 4705 blk_sync_queue(ctrl->admin_q); 4706 } 4707 EXPORT_SYMBOL_GPL(nvme_sync_queues); 4708 4709 struct nvme_ctrl *nvme_ctrl_from_file(struct file *file) 4710 { 4711 if (file->f_op != &nvme_dev_fops) 4712 return NULL; 4713 return file->private_data; 4714 } 4715 EXPORT_SYMBOL_NS_GPL(nvme_ctrl_from_file, NVME_TARGET_PASSTHRU); 4716 4717 /* 4718 * Check we didn't inadvertently grow the command structure sizes: 4719 */ 4720 static inline void _nvme_check_size(void) 4721 { 4722 BUILD_BUG_ON(sizeof(struct nvme_common_command) != 64); 4723 BUILD_BUG_ON(sizeof(struct nvme_rw_command) != 64); 4724 BUILD_BUG_ON(sizeof(struct nvme_identify) != 64); 4725 BUILD_BUG_ON(sizeof(struct nvme_features) != 64); 4726 BUILD_BUG_ON(sizeof(struct nvme_download_firmware) != 64); 4727 BUILD_BUG_ON(sizeof(struct nvme_format_cmd) != 64); 4728 BUILD_BUG_ON(sizeof(struct nvme_dsm_cmd) != 64); 4729 BUILD_BUG_ON(sizeof(struct nvme_write_zeroes_cmd) != 64); 4730 BUILD_BUG_ON(sizeof(struct nvme_abort_cmd) != 64); 4731 BUILD_BUG_ON(sizeof(struct nvme_get_log_page_command) != 64); 4732 BUILD_BUG_ON(sizeof(struct nvme_command) != 64); 4733 BUILD_BUG_ON(sizeof(struct nvme_id_ctrl) != NVME_IDENTIFY_DATA_SIZE); 4734 BUILD_BUG_ON(sizeof(struct nvme_id_ns) != NVME_IDENTIFY_DATA_SIZE); 4735 BUILD_BUG_ON(sizeof(struct nvme_id_ns_zns) != NVME_IDENTIFY_DATA_SIZE); 4736 BUILD_BUG_ON(sizeof(struct nvme_id_ctrl_zns) != NVME_IDENTIFY_DATA_SIZE); 4737 BUILD_BUG_ON(sizeof(struct nvme_id_ctrl_nvm) != NVME_IDENTIFY_DATA_SIZE); 4738 BUILD_BUG_ON(sizeof(struct nvme_lba_range_type) != 64); 4739 BUILD_BUG_ON(sizeof(struct nvme_smart_log) != 512); 4740 BUILD_BUG_ON(sizeof(struct nvme_dbbuf) != 64); 4741 BUILD_BUG_ON(sizeof(struct nvme_directive_cmd) != 64); 4742 } 4743 4744 4745 static int __init nvme_core_init(void) 4746 { 4747 int result = -ENOMEM; 4748 4749 _nvme_check_size(); 4750 4751 nvme_wq = alloc_workqueue("nvme-wq", 4752 WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_SYSFS, 0); 4753 if (!nvme_wq) 4754 goto out; 4755 4756 nvme_reset_wq = alloc_workqueue("nvme-reset-wq", 4757 WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_SYSFS, 0); 4758 if (!nvme_reset_wq) 4759 goto destroy_wq; 4760 4761 nvme_delete_wq = alloc_workqueue("nvme-delete-wq", 4762 WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_SYSFS, 0); 4763 if (!nvme_delete_wq) 4764 goto destroy_reset_wq; 4765 4766 result = alloc_chrdev_region(&nvme_ctrl_base_chr_devt, 0, 4767 NVME_MINORS, "nvme"); 4768 if (result < 0) 4769 goto destroy_delete_wq; 4770 4771 nvme_class = class_create(THIS_MODULE, "nvme"); 4772 if (IS_ERR(nvme_class)) { 4773 result = PTR_ERR(nvme_class); 4774 goto unregister_chrdev; 4775 } 4776 nvme_class->dev_uevent = nvme_class_uevent; 4777 4778 nvme_subsys_class = class_create(THIS_MODULE, "nvme-subsystem"); 4779 if (IS_ERR(nvme_subsys_class)) { 4780 result = PTR_ERR(nvme_subsys_class); 4781 goto destroy_class; 4782 } 4783 4784 result = alloc_chrdev_region(&nvme_ns_chr_devt, 0, NVME_MINORS, 4785 "nvme-generic"); 4786 if (result < 0) 4787 goto destroy_subsys_class; 4788 4789 nvme_ns_chr_class = class_create(THIS_MODULE, "nvme-generic"); 4790 if (IS_ERR(nvme_ns_chr_class)) { 4791 result = PTR_ERR(nvme_ns_chr_class); 4792 goto unregister_generic_ns; 4793 } 4794 4795 return 0; 4796 4797 unregister_generic_ns: 4798 unregister_chrdev_region(nvme_ns_chr_devt, NVME_MINORS); 4799 destroy_subsys_class: 4800 class_destroy(nvme_subsys_class); 4801 destroy_class: 4802 class_destroy(nvme_class); 4803 unregister_chrdev: 4804 unregister_chrdev_region(nvme_ctrl_base_chr_devt, NVME_MINORS); 4805 destroy_delete_wq: 4806 destroy_workqueue(nvme_delete_wq); 4807 destroy_reset_wq: 4808 destroy_workqueue(nvme_reset_wq); 4809 destroy_wq: 4810 destroy_workqueue(nvme_wq); 4811 out: 4812 return result; 4813 } 4814 4815 static void __exit nvme_core_exit(void) 4816 { 4817 class_destroy(nvme_ns_chr_class); 4818 class_destroy(nvme_subsys_class); 4819 class_destroy(nvme_class); 4820 unregister_chrdev_region(nvme_ns_chr_devt, NVME_MINORS); 4821 unregister_chrdev_region(nvme_ctrl_base_chr_devt, NVME_MINORS); 4822 destroy_workqueue(nvme_delete_wq); 4823 destroy_workqueue(nvme_reset_wq); 4824 destroy_workqueue(nvme_wq); 4825 ida_destroy(&nvme_ns_chr_minor_ida); 4826 ida_destroy(&nvme_instance_ida); 4827 } 4828 4829 MODULE_LICENSE("GPL"); 4830 MODULE_VERSION("1.0"); 4831 module_init(nvme_core_init); 4832 module_exit(nvme_core_exit); 4833