xref: /openbmc/linux/drivers/nvme/host/core.c (revision 21225873)
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * NVM Express device driver
4  * Copyright (c) 2011-2014, Intel Corporation.
5  */
6 
7 #include <linux/blkdev.h>
8 #include <linux/blk-mq.h>
9 #include <linux/blk-integrity.h>
10 #include <linux/compat.h>
11 #include <linux/delay.h>
12 #include <linux/errno.h>
13 #include <linux/hdreg.h>
14 #include <linux/kernel.h>
15 #include <linux/module.h>
16 #include <linux/backing-dev.h>
17 #include <linux/slab.h>
18 #include <linux/types.h>
19 #include <linux/pr.h>
20 #include <linux/ptrace.h>
21 #include <linux/nvme_ioctl.h>
22 #include <linux/pm_qos.h>
23 #include <asm/unaligned.h>
24 
25 #include "nvme.h"
26 #include "fabrics.h"
27 #include <linux/nvme-auth.h>
28 
29 #define CREATE_TRACE_POINTS
30 #include "trace.h"
31 
32 #define NVME_MINORS		(1U << MINORBITS)
33 
34 struct nvme_ns_info {
35 	struct nvme_ns_ids ids;
36 	u32 nsid;
37 	__le32 anagrpid;
38 	bool is_shared;
39 	bool is_readonly;
40 	bool is_ready;
41 	bool is_removed;
42 };
43 
44 unsigned int admin_timeout = 60;
45 module_param(admin_timeout, uint, 0644);
46 MODULE_PARM_DESC(admin_timeout, "timeout in seconds for admin commands");
47 EXPORT_SYMBOL_GPL(admin_timeout);
48 
49 unsigned int nvme_io_timeout = 30;
50 module_param_named(io_timeout, nvme_io_timeout, uint, 0644);
51 MODULE_PARM_DESC(io_timeout, "timeout in seconds for I/O");
52 EXPORT_SYMBOL_GPL(nvme_io_timeout);
53 
54 static unsigned char shutdown_timeout = 5;
55 module_param(shutdown_timeout, byte, 0644);
56 MODULE_PARM_DESC(shutdown_timeout, "timeout in seconds for controller shutdown");
57 
58 static u8 nvme_max_retries = 5;
59 module_param_named(max_retries, nvme_max_retries, byte, 0644);
60 MODULE_PARM_DESC(max_retries, "max number of retries a command may have");
61 
62 static unsigned long default_ps_max_latency_us = 100000;
63 module_param(default_ps_max_latency_us, ulong, 0644);
64 MODULE_PARM_DESC(default_ps_max_latency_us,
65 		 "max power saving latency for new devices; use PM QOS to change per device");
66 
67 static bool force_apst;
68 module_param(force_apst, bool, 0644);
69 MODULE_PARM_DESC(force_apst, "allow APST for newly enumerated devices even if quirked off");
70 
71 static unsigned long apst_primary_timeout_ms = 100;
72 module_param(apst_primary_timeout_ms, ulong, 0644);
73 MODULE_PARM_DESC(apst_primary_timeout_ms,
74 	"primary APST timeout in ms");
75 
76 static unsigned long apst_secondary_timeout_ms = 2000;
77 module_param(apst_secondary_timeout_ms, ulong, 0644);
78 MODULE_PARM_DESC(apst_secondary_timeout_ms,
79 	"secondary APST timeout in ms");
80 
81 static unsigned long apst_primary_latency_tol_us = 15000;
82 module_param(apst_primary_latency_tol_us, ulong, 0644);
83 MODULE_PARM_DESC(apst_primary_latency_tol_us,
84 	"primary APST latency tolerance in us");
85 
86 static unsigned long apst_secondary_latency_tol_us = 100000;
87 module_param(apst_secondary_latency_tol_us, ulong, 0644);
88 MODULE_PARM_DESC(apst_secondary_latency_tol_us,
89 	"secondary APST latency tolerance in us");
90 
91 /*
92  * nvme_wq - hosts nvme related works that are not reset or delete
93  * nvme_reset_wq - hosts nvme reset works
94  * nvme_delete_wq - hosts nvme delete works
95  *
96  * nvme_wq will host works such as scan, aen handling, fw activation,
97  * keep-alive, periodic reconnects etc. nvme_reset_wq
98  * runs reset works which also flush works hosted on nvme_wq for
99  * serialization purposes. nvme_delete_wq host controller deletion
100  * works which flush reset works for serialization.
101  */
102 struct workqueue_struct *nvme_wq;
103 EXPORT_SYMBOL_GPL(nvme_wq);
104 
105 struct workqueue_struct *nvme_reset_wq;
106 EXPORT_SYMBOL_GPL(nvme_reset_wq);
107 
108 struct workqueue_struct *nvme_delete_wq;
109 EXPORT_SYMBOL_GPL(nvme_delete_wq);
110 
111 static LIST_HEAD(nvme_subsystems);
112 static DEFINE_MUTEX(nvme_subsystems_lock);
113 
114 static DEFINE_IDA(nvme_instance_ida);
115 static dev_t nvme_ctrl_base_chr_devt;
116 static struct class *nvme_class;
117 static struct class *nvme_subsys_class;
118 
119 static DEFINE_IDA(nvme_ns_chr_minor_ida);
120 static dev_t nvme_ns_chr_devt;
121 static struct class *nvme_ns_chr_class;
122 
123 static void nvme_put_subsystem(struct nvme_subsystem *subsys);
124 static void nvme_remove_invalid_namespaces(struct nvme_ctrl *ctrl,
125 					   unsigned nsid);
126 static void nvme_update_keep_alive(struct nvme_ctrl *ctrl,
127 				   struct nvme_command *cmd);
128 
129 void nvme_queue_scan(struct nvme_ctrl *ctrl)
130 {
131 	/*
132 	 * Only new queue scan work when admin and IO queues are both alive
133 	 */
134 	if (ctrl->state == NVME_CTRL_LIVE && ctrl->tagset)
135 		queue_work(nvme_wq, &ctrl->scan_work);
136 }
137 
138 /*
139  * Use this function to proceed with scheduling reset_work for a controller
140  * that had previously been set to the resetting state. This is intended for
141  * code paths that can't be interrupted by other reset attempts. A hot removal
142  * may prevent this from succeeding.
143  */
144 int nvme_try_sched_reset(struct nvme_ctrl *ctrl)
145 {
146 	if (ctrl->state != NVME_CTRL_RESETTING)
147 		return -EBUSY;
148 	if (!queue_work(nvme_reset_wq, &ctrl->reset_work))
149 		return -EBUSY;
150 	return 0;
151 }
152 EXPORT_SYMBOL_GPL(nvme_try_sched_reset);
153 
154 static void nvme_failfast_work(struct work_struct *work)
155 {
156 	struct nvme_ctrl *ctrl = container_of(to_delayed_work(work),
157 			struct nvme_ctrl, failfast_work);
158 
159 	if (ctrl->state != NVME_CTRL_CONNECTING)
160 		return;
161 
162 	set_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags);
163 	dev_info(ctrl->device, "failfast expired\n");
164 	nvme_kick_requeue_lists(ctrl);
165 }
166 
167 static inline void nvme_start_failfast_work(struct nvme_ctrl *ctrl)
168 {
169 	if (!ctrl->opts || ctrl->opts->fast_io_fail_tmo == -1)
170 		return;
171 
172 	schedule_delayed_work(&ctrl->failfast_work,
173 			      ctrl->opts->fast_io_fail_tmo * HZ);
174 }
175 
176 static inline void nvme_stop_failfast_work(struct nvme_ctrl *ctrl)
177 {
178 	if (!ctrl->opts)
179 		return;
180 
181 	cancel_delayed_work_sync(&ctrl->failfast_work);
182 	clear_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags);
183 }
184 
185 
186 int nvme_reset_ctrl(struct nvme_ctrl *ctrl)
187 {
188 	if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING))
189 		return -EBUSY;
190 	if (!queue_work(nvme_reset_wq, &ctrl->reset_work))
191 		return -EBUSY;
192 	return 0;
193 }
194 EXPORT_SYMBOL_GPL(nvme_reset_ctrl);
195 
196 int nvme_reset_ctrl_sync(struct nvme_ctrl *ctrl)
197 {
198 	int ret;
199 
200 	ret = nvme_reset_ctrl(ctrl);
201 	if (!ret) {
202 		flush_work(&ctrl->reset_work);
203 		if (ctrl->state != NVME_CTRL_LIVE)
204 			ret = -ENETRESET;
205 	}
206 
207 	return ret;
208 }
209 
210 static void nvme_do_delete_ctrl(struct nvme_ctrl *ctrl)
211 {
212 	dev_info(ctrl->device,
213 		 "Removing ctrl: NQN \"%s\"\n", nvmf_ctrl_subsysnqn(ctrl));
214 
215 	flush_work(&ctrl->reset_work);
216 	nvme_stop_ctrl(ctrl);
217 	nvme_remove_namespaces(ctrl);
218 	ctrl->ops->delete_ctrl(ctrl);
219 	nvme_uninit_ctrl(ctrl);
220 }
221 
222 static void nvme_delete_ctrl_work(struct work_struct *work)
223 {
224 	struct nvme_ctrl *ctrl =
225 		container_of(work, struct nvme_ctrl, delete_work);
226 
227 	nvme_do_delete_ctrl(ctrl);
228 }
229 
230 int nvme_delete_ctrl(struct nvme_ctrl *ctrl)
231 {
232 	if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_DELETING))
233 		return -EBUSY;
234 	if (!queue_work(nvme_delete_wq, &ctrl->delete_work))
235 		return -EBUSY;
236 	return 0;
237 }
238 EXPORT_SYMBOL_GPL(nvme_delete_ctrl);
239 
240 static void nvme_delete_ctrl_sync(struct nvme_ctrl *ctrl)
241 {
242 	/*
243 	 * Keep a reference until nvme_do_delete_ctrl() complete,
244 	 * since ->delete_ctrl can free the controller.
245 	 */
246 	nvme_get_ctrl(ctrl);
247 	if (nvme_change_ctrl_state(ctrl, NVME_CTRL_DELETING))
248 		nvme_do_delete_ctrl(ctrl);
249 	nvme_put_ctrl(ctrl);
250 }
251 
252 static blk_status_t nvme_error_status(u16 status)
253 {
254 	switch (status & 0x7ff) {
255 	case NVME_SC_SUCCESS:
256 		return BLK_STS_OK;
257 	case NVME_SC_CAP_EXCEEDED:
258 		return BLK_STS_NOSPC;
259 	case NVME_SC_LBA_RANGE:
260 	case NVME_SC_CMD_INTERRUPTED:
261 	case NVME_SC_NS_NOT_READY:
262 		return BLK_STS_TARGET;
263 	case NVME_SC_BAD_ATTRIBUTES:
264 	case NVME_SC_ONCS_NOT_SUPPORTED:
265 	case NVME_SC_INVALID_OPCODE:
266 	case NVME_SC_INVALID_FIELD:
267 	case NVME_SC_INVALID_NS:
268 		return BLK_STS_NOTSUPP;
269 	case NVME_SC_WRITE_FAULT:
270 	case NVME_SC_READ_ERROR:
271 	case NVME_SC_UNWRITTEN_BLOCK:
272 	case NVME_SC_ACCESS_DENIED:
273 	case NVME_SC_READ_ONLY:
274 	case NVME_SC_COMPARE_FAILED:
275 		return BLK_STS_MEDIUM;
276 	case NVME_SC_GUARD_CHECK:
277 	case NVME_SC_APPTAG_CHECK:
278 	case NVME_SC_REFTAG_CHECK:
279 	case NVME_SC_INVALID_PI:
280 		return BLK_STS_PROTECTION;
281 	case NVME_SC_RESERVATION_CONFLICT:
282 		return BLK_STS_NEXUS;
283 	case NVME_SC_HOST_PATH_ERROR:
284 		return BLK_STS_TRANSPORT;
285 	case NVME_SC_ZONE_TOO_MANY_ACTIVE:
286 		return BLK_STS_ZONE_ACTIVE_RESOURCE;
287 	case NVME_SC_ZONE_TOO_MANY_OPEN:
288 		return BLK_STS_ZONE_OPEN_RESOURCE;
289 	default:
290 		return BLK_STS_IOERR;
291 	}
292 }
293 
294 static void nvme_retry_req(struct request *req)
295 {
296 	unsigned long delay = 0;
297 	u16 crd;
298 
299 	/* The mask and shift result must be <= 3 */
300 	crd = (nvme_req(req)->status & NVME_SC_CRD) >> 11;
301 	if (crd)
302 		delay = nvme_req(req)->ctrl->crdt[crd - 1] * 100;
303 
304 	nvme_req(req)->retries++;
305 	blk_mq_requeue_request(req, false);
306 	blk_mq_delay_kick_requeue_list(req->q, delay);
307 }
308 
309 static void nvme_log_error(struct request *req)
310 {
311 	struct nvme_ns *ns = req->q->queuedata;
312 	struct nvme_request *nr = nvme_req(req);
313 
314 	if (ns) {
315 		pr_err_ratelimited("%s: %s(0x%x) @ LBA %llu, %llu blocks, %s (sct 0x%x / sc 0x%x) %s%s\n",
316 		       ns->disk ? ns->disk->disk_name : "?",
317 		       nvme_get_opcode_str(nr->cmd->common.opcode),
318 		       nr->cmd->common.opcode,
319 		       (unsigned long long)nvme_sect_to_lba(ns, blk_rq_pos(req)),
320 		       (unsigned long long)blk_rq_bytes(req) >> ns->lba_shift,
321 		       nvme_get_error_status_str(nr->status),
322 		       nr->status >> 8 & 7,	/* Status Code Type */
323 		       nr->status & 0xff,	/* Status Code */
324 		       nr->status & NVME_SC_MORE ? "MORE " : "",
325 		       nr->status & NVME_SC_DNR  ? "DNR "  : "");
326 		return;
327 	}
328 
329 	pr_err_ratelimited("%s: %s(0x%x), %s (sct 0x%x / sc 0x%x) %s%s\n",
330 			   dev_name(nr->ctrl->device),
331 			   nvme_get_admin_opcode_str(nr->cmd->common.opcode),
332 			   nr->cmd->common.opcode,
333 			   nvme_get_error_status_str(nr->status),
334 			   nr->status >> 8 & 7,	/* Status Code Type */
335 			   nr->status & 0xff,	/* Status Code */
336 			   nr->status & NVME_SC_MORE ? "MORE " : "",
337 			   nr->status & NVME_SC_DNR  ? "DNR "  : "");
338 }
339 
340 enum nvme_disposition {
341 	COMPLETE,
342 	RETRY,
343 	FAILOVER,
344 	AUTHENTICATE,
345 };
346 
347 static inline enum nvme_disposition nvme_decide_disposition(struct request *req)
348 {
349 	if (likely(nvme_req(req)->status == 0))
350 		return COMPLETE;
351 
352 	if ((nvme_req(req)->status & 0x7ff) == NVME_SC_AUTH_REQUIRED)
353 		return AUTHENTICATE;
354 
355 	if (blk_noretry_request(req) ||
356 	    (nvme_req(req)->status & NVME_SC_DNR) ||
357 	    nvme_req(req)->retries >= nvme_max_retries)
358 		return COMPLETE;
359 
360 	if (req->cmd_flags & REQ_NVME_MPATH) {
361 		if (nvme_is_path_error(nvme_req(req)->status) ||
362 		    blk_queue_dying(req->q))
363 			return FAILOVER;
364 	} else {
365 		if (blk_queue_dying(req->q))
366 			return COMPLETE;
367 	}
368 
369 	return RETRY;
370 }
371 
372 static inline void nvme_end_req_zoned(struct request *req)
373 {
374 	if (IS_ENABLED(CONFIG_BLK_DEV_ZONED) &&
375 	    req_op(req) == REQ_OP_ZONE_APPEND)
376 		req->__sector = nvme_lba_to_sect(req->q->queuedata,
377 			le64_to_cpu(nvme_req(req)->result.u64));
378 }
379 
380 static inline void nvme_end_req(struct request *req)
381 {
382 	blk_status_t status = nvme_error_status(nvme_req(req)->status);
383 
384 	if (unlikely(nvme_req(req)->status && !(req->rq_flags & RQF_QUIET)))
385 		nvme_log_error(req);
386 	nvme_end_req_zoned(req);
387 	nvme_trace_bio_complete(req);
388 	if (req->cmd_flags & REQ_NVME_MPATH)
389 		nvme_mpath_end_request(req);
390 	blk_mq_end_request(req, status);
391 }
392 
393 void nvme_complete_rq(struct request *req)
394 {
395 	struct nvme_ctrl *ctrl = nvme_req(req)->ctrl;
396 
397 	trace_nvme_complete_rq(req);
398 	nvme_cleanup_cmd(req);
399 
400 	/*
401 	 * Completions of long-running commands should not be able to
402 	 * defer sending of periodic keep alives, since the controller
403 	 * may have completed processing such commands a long time ago
404 	 * (arbitrarily close to command submission time).
405 	 * req->deadline - req->timeout is the command submission time
406 	 * in jiffies.
407 	 */
408 	if (ctrl->kas &&
409 	    req->deadline - req->timeout >= ctrl->ka_last_check_time)
410 		ctrl->comp_seen = true;
411 
412 	switch (nvme_decide_disposition(req)) {
413 	case COMPLETE:
414 		nvme_end_req(req);
415 		return;
416 	case RETRY:
417 		nvme_retry_req(req);
418 		return;
419 	case FAILOVER:
420 		nvme_failover_req(req);
421 		return;
422 	case AUTHENTICATE:
423 #ifdef CONFIG_NVME_AUTH
424 		queue_work(nvme_wq, &ctrl->dhchap_auth_work);
425 		nvme_retry_req(req);
426 #else
427 		nvme_end_req(req);
428 #endif
429 		return;
430 	}
431 }
432 EXPORT_SYMBOL_GPL(nvme_complete_rq);
433 
434 void nvme_complete_batch_req(struct request *req)
435 {
436 	trace_nvme_complete_rq(req);
437 	nvme_cleanup_cmd(req);
438 	nvme_end_req_zoned(req);
439 }
440 EXPORT_SYMBOL_GPL(nvme_complete_batch_req);
441 
442 /*
443  * Called to unwind from ->queue_rq on a failed command submission so that the
444  * multipathing code gets called to potentially failover to another path.
445  * The caller needs to unwind all transport specific resource allocations and
446  * must return propagate the return value.
447  */
448 blk_status_t nvme_host_path_error(struct request *req)
449 {
450 	nvme_req(req)->status = NVME_SC_HOST_PATH_ERROR;
451 	blk_mq_set_request_complete(req);
452 	nvme_complete_rq(req);
453 	return BLK_STS_OK;
454 }
455 EXPORT_SYMBOL_GPL(nvme_host_path_error);
456 
457 bool nvme_cancel_request(struct request *req, void *data)
458 {
459 	dev_dbg_ratelimited(((struct nvme_ctrl *) data)->device,
460 				"Cancelling I/O %d", req->tag);
461 
462 	/* don't abort one completed or idle request */
463 	if (blk_mq_rq_state(req) != MQ_RQ_IN_FLIGHT)
464 		return true;
465 
466 	nvme_req(req)->status = NVME_SC_HOST_ABORTED_CMD;
467 	nvme_req(req)->flags |= NVME_REQ_CANCELLED;
468 	blk_mq_complete_request(req);
469 	return true;
470 }
471 EXPORT_SYMBOL_GPL(nvme_cancel_request);
472 
473 void nvme_cancel_tagset(struct nvme_ctrl *ctrl)
474 {
475 	if (ctrl->tagset) {
476 		blk_mq_tagset_busy_iter(ctrl->tagset,
477 				nvme_cancel_request, ctrl);
478 		blk_mq_tagset_wait_completed_request(ctrl->tagset);
479 	}
480 }
481 EXPORT_SYMBOL_GPL(nvme_cancel_tagset);
482 
483 void nvme_cancel_admin_tagset(struct nvme_ctrl *ctrl)
484 {
485 	if (ctrl->admin_tagset) {
486 		blk_mq_tagset_busy_iter(ctrl->admin_tagset,
487 				nvme_cancel_request, ctrl);
488 		blk_mq_tagset_wait_completed_request(ctrl->admin_tagset);
489 	}
490 }
491 EXPORT_SYMBOL_GPL(nvme_cancel_admin_tagset);
492 
493 bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl,
494 		enum nvme_ctrl_state new_state)
495 {
496 	enum nvme_ctrl_state old_state;
497 	unsigned long flags;
498 	bool changed = false;
499 
500 	spin_lock_irqsave(&ctrl->lock, flags);
501 
502 	old_state = ctrl->state;
503 	switch (new_state) {
504 	case NVME_CTRL_LIVE:
505 		switch (old_state) {
506 		case NVME_CTRL_NEW:
507 		case NVME_CTRL_RESETTING:
508 		case NVME_CTRL_CONNECTING:
509 			changed = true;
510 			fallthrough;
511 		default:
512 			break;
513 		}
514 		break;
515 	case NVME_CTRL_RESETTING:
516 		switch (old_state) {
517 		case NVME_CTRL_NEW:
518 		case NVME_CTRL_LIVE:
519 			changed = true;
520 			fallthrough;
521 		default:
522 			break;
523 		}
524 		break;
525 	case NVME_CTRL_CONNECTING:
526 		switch (old_state) {
527 		case NVME_CTRL_NEW:
528 		case NVME_CTRL_RESETTING:
529 			changed = true;
530 			fallthrough;
531 		default:
532 			break;
533 		}
534 		break;
535 	case NVME_CTRL_DELETING:
536 		switch (old_state) {
537 		case NVME_CTRL_LIVE:
538 		case NVME_CTRL_RESETTING:
539 		case NVME_CTRL_CONNECTING:
540 			changed = true;
541 			fallthrough;
542 		default:
543 			break;
544 		}
545 		break;
546 	case NVME_CTRL_DELETING_NOIO:
547 		switch (old_state) {
548 		case NVME_CTRL_DELETING:
549 		case NVME_CTRL_DEAD:
550 			changed = true;
551 			fallthrough;
552 		default:
553 			break;
554 		}
555 		break;
556 	case NVME_CTRL_DEAD:
557 		switch (old_state) {
558 		case NVME_CTRL_DELETING:
559 			changed = true;
560 			fallthrough;
561 		default:
562 			break;
563 		}
564 		break;
565 	default:
566 		break;
567 	}
568 
569 	if (changed) {
570 		ctrl->state = new_state;
571 		wake_up_all(&ctrl->state_wq);
572 	}
573 
574 	spin_unlock_irqrestore(&ctrl->lock, flags);
575 	if (!changed)
576 		return false;
577 
578 	if (ctrl->state == NVME_CTRL_LIVE) {
579 		if (old_state == NVME_CTRL_CONNECTING)
580 			nvme_stop_failfast_work(ctrl);
581 		nvme_kick_requeue_lists(ctrl);
582 	} else if (ctrl->state == NVME_CTRL_CONNECTING &&
583 		old_state == NVME_CTRL_RESETTING) {
584 		nvme_start_failfast_work(ctrl);
585 	}
586 	return changed;
587 }
588 EXPORT_SYMBOL_GPL(nvme_change_ctrl_state);
589 
590 /*
591  * Returns true for sink states that can't ever transition back to live.
592  */
593 static bool nvme_state_terminal(struct nvme_ctrl *ctrl)
594 {
595 	switch (ctrl->state) {
596 	case NVME_CTRL_NEW:
597 	case NVME_CTRL_LIVE:
598 	case NVME_CTRL_RESETTING:
599 	case NVME_CTRL_CONNECTING:
600 		return false;
601 	case NVME_CTRL_DELETING:
602 	case NVME_CTRL_DELETING_NOIO:
603 	case NVME_CTRL_DEAD:
604 		return true;
605 	default:
606 		WARN_ONCE(1, "Unhandled ctrl state:%d", ctrl->state);
607 		return true;
608 	}
609 }
610 
611 /*
612  * Waits for the controller state to be resetting, or returns false if it is
613  * not possible to ever transition to that state.
614  */
615 bool nvme_wait_reset(struct nvme_ctrl *ctrl)
616 {
617 	wait_event(ctrl->state_wq,
618 		   nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING) ||
619 		   nvme_state_terminal(ctrl));
620 	return ctrl->state == NVME_CTRL_RESETTING;
621 }
622 EXPORT_SYMBOL_GPL(nvme_wait_reset);
623 
624 static void nvme_free_ns_head(struct kref *ref)
625 {
626 	struct nvme_ns_head *head =
627 		container_of(ref, struct nvme_ns_head, ref);
628 
629 	nvme_mpath_remove_disk(head);
630 	ida_free(&head->subsys->ns_ida, head->instance);
631 	cleanup_srcu_struct(&head->srcu);
632 	nvme_put_subsystem(head->subsys);
633 	kfree(head);
634 }
635 
636 bool nvme_tryget_ns_head(struct nvme_ns_head *head)
637 {
638 	return kref_get_unless_zero(&head->ref);
639 }
640 
641 void nvme_put_ns_head(struct nvme_ns_head *head)
642 {
643 	kref_put(&head->ref, nvme_free_ns_head);
644 }
645 
646 static void nvme_free_ns(struct kref *kref)
647 {
648 	struct nvme_ns *ns = container_of(kref, struct nvme_ns, kref);
649 
650 	put_disk(ns->disk);
651 	nvme_put_ns_head(ns->head);
652 	nvme_put_ctrl(ns->ctrl);
653 	kfree(ns);
654 }
655 
656 static inline bool nvme_get_ns(struct nvme_ns *ns)
657 {
658 	return kref_get_unless_zero(&ns->kref);
659 }
660 
661 void nvme_put_ns(struct nvme_ns *ns)
662 {
663 	kref_put(&ns->kref, nvme_free_ns);
664 }
665 EXPORT_SYMBOL_NS_GPL(nvme_put_ns, NVME_TARGET_PASSTHRU);
666 
667 static inline void nvme_clear_nvme_request(struct request *req)
668 {
669 	nvme_req(req)->status = 0;
670 	nvme_req(req)->retries = 0;
671 	nvme_req(req)->flags = 0;
672 	req->rq_flags |= RQF_DONTPREP;
673 }
674 
675 /* initialize a passthrough request */
676 void nvme_init_request(struct request *req, struct nvme_command *cmd)
677 {
678 	if (req->q->queuedata)
679 		req->timeout = NVME_IO_TIMEOUT;
680 	else /* no queuedata implies admin queue */
681 		req->timeout = NVME_ADMIN_TIMEOUT;
682 
683 	/* passthru commands should let the driver set the SGL flags */
684 	cmd->common.flags &= ~NVME_CMD_SGL_ALL;
685 
686 	req->cmd_flags |= REQ_FAILFAST_DRIVER;
687 	if (req->mq_hctx->type == HCTX_TYPE_POLL)
688 		req->cmd_flags |= REQ_POLLED;
689 	nvme_clear_nvme_request(req);
690 	req->rq_flags |= RQF_QUIET;
691 	memcpy(nvme_req(req)->cmd, cmd, sizeof(*cmd));
692 }
693 EXPORT_SYMBOL_GPL(nvme_init_request);
694 
695 /*
696  * For something we're not in a state to send to the device the default action
697  * is to busy it and retry it after the controller state is recovered.  However,
698  * if the controller is deleting or if anything is marked for failfast or
699  * nvme multipath it is immediately failed.
700  *
701  * Note: commands used to initialize the controller will be marked for failfast.
702  * Note: nvme cli/ioctl commands are marked for failfast.
703  */
704 blk_status_t nvme_fail_nonready_command(struct nvme_ctrl *ctrl,
705 		struct request *rq)
706 {
707 	if (ctrl->state != NVME_CTRL_DELETING_NOIO &&
708 	    ctrl->state != NVME_CTRL_DELETING &&
709 	    ctrl->state != NVME_CTRL_DEAD &&
710 	    !test_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags) &&
711 	    !blk_noretry_request(rq) && !(rq->cmd_flags & REQ_NVME_MPATH))
712 		return BLK_STS_RESOURCE;
713 	return nvme_host_path_error(rq);
714 }
715 EXPORT_SYMBOL_GPL(nvme_fail_nonready_command);
716 
717 bool __nvme_check_ready(struct nvme_ctrl *ctrl, struct request *rq,
718 		bool queue_live)
719 {
720 	struct nvme_request *req = nvme_req(rq);
721 
722 	/*
723 	 * currently we have a problem sending passthru commands
724 	 * on the admin_q if the controller is not LIVE because we can't
725 	 * make sure that they are going out after the admin connect,
726 	 * controller enable and/or other commands in the initialization
727 	 * sequence. until the controller will be LIVE, fail with
728 	 * BLK_STS_RESOURCE so that they will be rescheduled.
729 	 */
730 	if (rq->q == ctrl->admin_q && (req->flags & NVME_REQ_USERCMD))
731 		return false;
732 
733 	if (ctrl->ops->flags & NVME_F_FABRICS) {
734 		/*
735 		 * Only allow commands on a live queue, except for the connect
736 		 * command, which is require to set the queue live in the
737 		 * appropinquate states.
738 		 */
739 		switch (ctrl->state) {
740 		case NVME_CTRL_CONNECTING:
741 			if (blk_rq_is_passthrough(rq) && nvme_is_fabrics(req->cmd) &&
742 			    (req->cmd->fabrics.fctype == nvme_fabrics_type_connect ||
743 			     req->cmd->fabrics.fctype == nvme_fabrics_type_auth_send ||
744 			     req->cmd->fabrics.fctype == nvme_fabrics_type_auth_receive))
745 				return true;
746 			break;
747 		default:
748 			break;
749 		case NVME_CTRL_DEAD:
750 			return false;
751 		}
752 	}
753 
754 	return queue_live;
755 }
756 EXPORT_SYMBOL_GPL(__nvme_check_ready);
757 
758 static inline void nvme_setup_flush(struct nvme_ns *ns,
759 		struct nvme_command *cmnd)
760 {
761 	memset(cmnd, 0, sizeof(*cmnd));
762 	cmnd->common.opcode = nvme_cmd_flush;
763 	cmnd->common.nsid = cpu_to_le32(ns->head->ns_id);
764 }
765 
766 static blk_status_t nvme_setup_discard(struct nvme_ns *ns, struct request *req,
767 		struct nvme_command *cmnd)
768 {
769 	unsigned short segments = blk_rq_nr_discard_segments(req), n = 0;
770 	struct nvme_dsm_range *range;
771 	struct bio *bio;
772 
773 	/*
774 	 * Some devices do not consider the DSM 'Number of Ranges' field when
775 	 * determining how much data to DMA. Always allocate memory for maximum
776 	 * number of segments to prevent device reading beyond end of buffer.
777 	 */
778 	static const size_t alloc_size = sizeof(*range) * NVME_DSM_MAX_RANGES;
779 
780 	range = kzalloc(alloc_size, GFP_ATOMIC | __GFP_NOWARN);
781 	if (!range) {
782 		/*
783 		 * If we fail allocation our range, fallback to the controller
784 		 * discard page. If that's also busy, it's safe to return
785 		 * busy, as we know we can make progress once that's freed.
786 		 */
787 		if (test_and_set_bit_lock(0, &ns->ctrl->discard_page_busy))
788 			return BLK_STS_RESOURCE;
789 
790 		range = page_address(ns->ctrl->discard_page);
791 	}
792 
793 	if (queue_max_discard_segments(req->q) == 1) {
794 		u64 slba = nvme_sect_to_lba(ns, blk_rq_pos(req));
795 		u32 nlb = blk_rq_sectors(req) >> (ns->lba_shift - 9);
796 
797 		range[0].cattr = cpu_to_le32(0);
798 		range[0].nlb = cpu_to_le32(nlb);
799 		range[0].slba = cpu_to_le64(slba);
800 		n = 1;
801 	} else {
802 		__rq_for_each_bio(bio, req) {
803 			u64 slba = nvme_sect_to_lba(ns, bio->bi_iter.bi_sector);
804 			u32 nlb = bio->bi_iter.bi_size >> ns->lba_shift;
805 
806 			if (n < segments) {
807 				range[n].cattr = cpu_to_le32(0);
808 				range[n].nlb = cpu_to_le32(nlb);
809 				range[n].slba = cpu_to_le64(slba);
810 			}
811 			n++;
812 		}
813 	}
814 
815 	if (WARN_ON_ONCE(n != segments)) {
816 		if (virt_to_page(range) == ns->ctrl->discard_page)
817 			clear_bit_unlock(0, &ns->ctrl->discard_page_busy);
818 		else
819 			kfree(range);
820 		return BLK_STS_IOERR;
821 	}
822 
823 	memset(cmnd, 0, sizeof(*cmnd));
824 	cmnd->dsm.opcode = nvme_cmd_dsm;
825 	cmnd->dsm.nsid = cpu_to_le32(ns->head->ns_id);
826 	cmnd->dsm.nr = cpu_to_le32(segments - 1);
827 	cmnd->dsm.attributes = cpu_to_le32(NVME_DSMGMT_AD);
828 
829 	bvec_set_virt(&req->special_vec, range, alloc_size);
830 	req->rq_flags |= RQF_SPECIAL_PAYLOAD;
831 
832 	return BLK_STS_OK;
833 }
834 
835 static void nvme_set_ref_tag(struct nvme_ns *ns, struct nvme_command *cmnd,
836 			      struct request *req)
837 {
838 	u32 upper, lower;
839 	u64 ref48;
840 
841 	/* both rw and write zeroes share the same reftag format */
842 	switch (ns->guard_type) {
843 	case NVME_NVM_NS_16B_GUARD:
844 		cmnd->rw.reftag = cpu_to_le32(t10_pi_ref_tag(req));
845 		break;
846 	case NVME_NVM_NS_64B_GUARD:
847 		ref48 = ext_pi_ref_tag(req);
848 		lower = lower_32_bits(ref48);
849 		upper = upper_32_bits(ref48);
850 
851 		cmnd->rw.reftag = cpu_to_le32(lower);
852 		cmnd->rw.cdw3 = cpu_to_le32(upper);
853 		break;
854 	default:
855 		break;
856 	}
857 }
858 
859 static inline blk_status_t nvme_setup_write_zeroes(struct nvme_ns *ns,
860 		struct request *req, struct nvme_command *cmnd)
861 {
862 	memset(cmnd, 0, sizeof(*cmnd));
863 
864 	if (ns->ctrl->quirks & NVME_QUIRK_DEALLOCATE_ZEROES)
865 		return nvme_setup_discard(ns, req, cmnd);
866 
867 	cmnd->write_zeroes.opcode = nvme_cmd_write_zeroes;
868 	cmnd->write_zeroes.nsid = cpu_to_le32(ns->head->ns_id);
869 	cmnd->write_zeroes.slba =
870 		cpu_to_le64(nvme_sect_to_lba(ns, blk_rq_pos(req)));
871 	cmnd->write_zeroes.length =
872 		cpu_to_le16((blk_rq_bytes(req) >> ns->lba_shift) - 1);
873 
874 	if (!(req->cmd_flags & REQ_NOUNMAP) && (ns->features & NVME_NS_DEAC))
875 		cmnd->write_zeroes.control |= cpu_to_le16(NVME_WZ_DEAC);
876 
877 	if (nvme_ns_has_pi(ns)) {
878 		cmnd->write_zeroes.control |= cpu_to_le16(NVME_RW_PRINFO_PRACT);
879 
880 		switch (ns->pi_type) {
881 		case NVME_NS_DPS_PI_TYPE1:
882 		case NVME_NS_DPS_PI_TYPE2:
883 			nvme_set_ref_tag(ns, cmnd, req);
884 			break;
885 		}
886 	}
887 
888 	return BLK_STS_OK;
889 }
890 
891 static inline blk_status_t nvme_setup_rw(struct nvme_ns *ns,
892 		struct request *req, struct nvme_command *cmnd,
893 		enum nvme_opcode op)
894 {
895 	u16 control = 0;
896 	u32 dsmgmt = 0;
897 
898 	if (req->cmd_flags & REQ_FUA)
899 		control |= NVME_RW_FUA;
900 	if (req->cmd_flags & (REQ_FAILFAST_DEV | REQ_RAHEAD))
901 		control |= NVME_RW_LR;
902 
903 	if (req->cmd_flags & REQ_RAHEAD)
904 		dsmgmt |= NVME_RW_DSM_FREQ_PREFETCH;
905 
906 	cmnd->rw.opcode = op;
907 	cmnd->rw.flags = 0;
908 	cmnd->rw.nsid = cpu_to_le32(ns->head->ns_id);
909 	cmnd->rw.cdw2 = 0;
910 	cmnd->rw.cdw3 = 0;
911 	cmnd->rw.metadata = 0;
912 	cmnd->rw.slba = cpu_to_le64(nvme_sect_to_lba(ns, blk_rq_pos(req)));
913 	cmnd->rw.length = cpu_to_le16((blk_rq_bytes(req) >> ns->lba_shift) - 1);
914 	cmnd->rw.reftag = 0;
915 	cmnd->rw.apptag = 0;
916 	cmnd->rw.appmask = 0;
917 
918 	if (ns->ms) {
919 		/*
920 		 * If formated with metadata, the block layer always provides a
921 		 * metadata buffer if CONFIG_BLK_DEV_INTEGRITY is enabled.  Else
922 		 * we enable the PRACT bit for protection information or set the
923 		 * namespace capacity to zero to prevent any I/O.
924 		 */
925 		if (!blk_integrity_rq(req)) {
926 			if (WARN_ON_ONCE(!nvme_ns_has_pi(ns)))
927 				return BLK_STS_NOTSUPP;
928 			control |= NVME_RW_PRINFO_PRACT;
929 		}
930 
931 		switch (ns->pi_type) {
932 		case NVME_NS_DPS_PI_TYPE3:
933 			control |= NVME_RW_PRINFO_PRCHK_GUARD;
934 			break;
935 		case NVME_NS_DPS_PI_TYPE1:
936 		case NVME_NS_DPS_PI_TYPE2:
937 			control |= NVME_RW_PRINFO_PRCHK_GUARD |
938 					NVME_RW_PRINFO_PRCHK_REF;
939 			if (op == nvme_cmd_zone_append)
940 				control |= NVME_RW_APPEND_PIREMAP;
941 			nvme_set_ref_tag(ns, cmnd, req);
942 			break;
943 		}
944 	}
945 
946 	cmnd->rw.control = cpu_to_le16(control);
947 	cmnd->rw.dsmgmt = cpu_to_le32(dsmgmt);
948 	return 0;
949 }
950 
951 void nvme_cleanup_cmd(struct request *req)
952 {
953 	if (req->rq_flags & RQF_SPECIAL_PAYLOAD) {
954 		struct nvme_ctrl *ctrl = nvme_req(req)->ctrl;
955 
956 		if (req->special_vec.bv_page == ctrl->discard_page)
957 			clear_bit_unlock(0, &ctrl->discard_page_busy);
958 		else
959 			kfree(bvec_virt(&req->special_vec));
960 	}
961 }
962 EXPORT_SYMBOL_GPL(nvme_cleanup_cmd);
963 
964 blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req)
965 {
966 	struct nvme_command *cmd = nvme_req(req)->cmd;
967 	blk_status_t ret = BLK_STS_OK;
968 
969 	if (!(req->rq_flags & RQF_DONTPREP))
970 		nvme_clear_nvme_request(req);
971 
972 	switch (req_op(req)) {
973 	case REQ_OP_DRV_IN:
974 	case REQ_OP_DRV_OUT:
975 		/* these are setup prior to execution in nvme_init_request() */
976 		break;
977 	case REQ_OP_FLUSH:
978 		nvme_setup_flush(ns, cmd);
979 		break;
980 	case REQ_OP_ZONE_RESET_ALL:
981 	case REQ_OP_ZONE_RESET:
982 		ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_RESET);
983 		break;
984 	case REQ_OP_ZONE_OPEN:
985 		ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_OPEN);
986 		break;
987 	case REQ_OP_ZONE_CLOSE:
988 		ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_CLOSE);
989 		break;
990 	case REQ_OP_ZONE_FINISH:
991 		ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_FINISH);
992 		break;
993 	case REQ_OP_WRITE_ZEROES:
994 		ret = nvme_setup_write_zeroes(ns, req, cmd);
995 		break;
996 	case REQ_OP_DISCARD:
997 		ret = nvme_setup_discard(ns, req, cmd);
998 		break;
999 	case REQ_OP_READ:
1000 		ret = nvme_setup_rw(ns, req, cmd, nvme_cmd_read);
1001 		break;
1002 	case REQ_OP_WRITE:
1003 		ret = nvme_setup_rw(ns, req, cmd, nvme_cmd_write);
1004 		break;
1005 	case REQ_OP_ZONE_APPEND:
1006 		ret = nvme_setup_rw(ns, req, cmd, nvme_cmd_zone_append);
1007 		break;
1008 	default:
1009 		WARN_ON_ONCE(1);
1010 		return BLK_STS_IOERR;
1011 	}
1012 
1013 	cmd->common.command_id = nvme_cid(req);
1014 	trace_nvme_setup_cmd(req, cmd);
1015 	return ret;
1016 }
1017 EXPORT_SYMBOL_GPL(nvme_setup_cmd);
1018 
1019 /*
1020  * Return values:
1021  * 0:  success
1022  * >0: nvme controller's cqe status response
1023  * <0: kernel error in lieu of controller response
1024  */
1025 int nvme_execute_rq(struct request *rq, bool at_head)
1026 {
1027 	blk_status_t status;
1028 
1029 	status = blk_execute_rq(rq, at_head);
1030 	if (nvme_req(rq)->flags & NVME_REQ_CANCELLED)
1031 		return -EINTR;
1032 	if (nvme_req(rq)->status)
1033 		return nvme_req(rq)->status;
1034 	return blk_status_to_errno(status);
1035 }
1036 EXPORT_SYMBOL_NS_GPL(nvme_execute_rq, NVME_TARGET_PASSTHRU);
1037 
1038 /*
1039  * Returns 0 on success.  If the result is negative, it's a Linux error code;
1040  * if the result is positive, it's an NVM Express status code
1041  */
1042 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
1043 		union nvme_result *result, void *buffer, unsigned bufflen,
1044 		int qid, int at_head, blk_mq_req_flags_t flags)
1045 {
1046 	struct request *req;
1047 	int ret;
1048 
1049 	if (qid == NVME_QID_ANY)
1050 		req = blk_mq_alloc_request(q, nvme_req_op(cmd), flags);
1051 	else
1052 		req = blk_mq_alloc_request_hctx(q, nvme_req_op(cmd), flags,
1053 						qid - 1);
1054 
1055 	if (IS_ERR(req))
1056 		return PTR_ERR(req);
1057 	nvme_init_request(req, cmd);
1058 
1059 	if (buffer && bufflen) {
1060 		ret = blk_rq_map_kern(q, req, buffer, bufflen, GFP_KERNEL);
1061 		if (ret)
1062 			goto out;
1063 	}
1064 
1065 	ret = nvme_execute_rq(req, at_head);
1066 	if (result && ret >= 0)
1067 		*result = nvme_req(req)->result;
1068  out:
1069 	blk_mq_free_request(req);
1070 	return ret;
1071 }
1072 EXPORT_SYMBOL_GPL(__nvme_submit_sync_cmd);
1073 
1074 int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
1075 		void *buffer, unsigned bufflen)
1076 {
1077 	return __nvme_submit_sync_cmd(q, cmd, NULL, buffer, bufflen,
1078 			NVME_QID_ANY, 0, 0);
1079 }
1080 EXPORT_SYMBOL_GPL(nvme_submit_sync_cmd);
1081 
1082 u32 nvme_command_effects(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u8 opcode)
1083 {
1084 	u32 effects = 0;
1085 
1086 	if (ns) {
1087 		effects = le32_to_cpu(ns->head->effects->iocs[opcode]);
1088 		if (effects & ~(NVME_CMD_EFFECTS_CSUPP | NVME_CMD_EFFECTS_LBCC))
1089 			dev_warn_once(ctrl->device,
1090 				"IO command:%02x has unusual effects:%08x\n",
1091 				opcode, effects);
1092 
1093 		/*
1094 		 * NVME_CMD_EFFECTS_CSE_MASK causes a freeze all I/O queues,
1095 		 * which would deadlock when done on an I/O command.  Note that
1096 		 * We already warn about an unusual effect above.
1097 		 */
1098 		effects &= ~NVME_CMD_EFFECTS_CSE_MASK;
1099 	} else {
1100 		effects = le32_to_cpu(ctrl->effects->acs[opcode]);
1101 	}
1102 
1103 	return effects;
1104 }
1105 EXPORT_SYMBOL_NS_GPL(nvme_command_effects, NVME_TARGET_PASSTHRU);
1106 
1107 u32 nvme_passthru_start(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u8 opcode)
1108 {
1109 	u32 effects = nvme_command_effects(ctrl, ns, opcode);
1110 
1111 	/*
1112 	 * For simplicity, IO to all namespaces is quiesced even if the command
1113 	 * effects say only one namespace is affected.
1114 	 */
1115 	if (effects & NVME_CMD_EFFECTS_CSE_MASK) {
1116 		mutex_lock(&ctrl->scan_lock);
1117 		mutex_lock(&ctrl->subsys->lock);
1118 		nvme_mpath_start_freeze(ctrl->subsys);
1119 		nvme_mpath_wait_freeze(ctrl->subsys);
1120 		nvme_start_freeze(ctrl);
1121 		nvme_wait_freeze(ctrl);
1122 	}
1123 	return effects;
1124 }
1125 EXPORT_SYMBOL_NS_GPL(nvme_passthru_start, NVME_TARGET_PASSTHRU);
1126 
1127 void nvme_passthru_end(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u32 effects,
1128 		       struct nvme_command *cmd, int status)
1129 {
1130 	if (effects & NVME_CMD_EFFECTS_CSE_MASK) {
1131 		nvme_unfreeze(ctrl);
1132 		nvme_mpath_unfreeze(ctrl->subsys);
1133 		mutex_unlock(&ctrl->subsys->lock);
1134 		mutex_unlock(&ctrl->scan_lock);
1135 	}
1136 	if (effects & NVME_CMD_EFFECTS_CCC) {
1137 		dev_info(ctrl->device,
1138 "controller capabilities changed, reset may be required to take effect.\n");
1139 	}
1140 	if (effects & (NVME_CMD_EFFECTS_NIC | NVME_CMD_EFFECTS_NCC)) {
1141 		nvme_queue_scan(ctrl);
1142 		flush_work(&ctrl->scan_work);
1143 	}
1144 	if (ns)
1145 		return;
1146 
1147 	switch (cmd->common.opcode) {
1148 	case nvme_admin_set_features:
1149 		switch (le32_to_cpu(cmd->common.cdw10) & 0xFF) {
1150 		case NVME_FEAT_KATO:
1151 			/*
1152 			 * Keep alive commands interval on the host should be
1153 			 * updated when KATO is modified by Set Features
1154 			 * commands.
1155 			 */
1156 			if (!status)
1157 				nvme_update_keep_alive(ctrl, cmd);
1158 			break;
1159 		default:
1160 			break;
1161 		}
1162 		break;
1163 	default:
1164 		break;
1165 	}
1166 }
1167 EXPORT_SYMBOL_NS_GPL(nvme_passthru_end, NVME_TARGET_PASSTHRU);
1168 
1169 /*
1170  * Recommended frequency for KATO commands per NVMe 1.4 section 7.12.1:
1171  *
1172  *   The host should send Keep Alive commands at half of the Keep Alive Timeout
1173  *   accounting for transport roundtrip times [..].
1174  */
1175 static unsigned long nvme_keep_alive_work_period(struct nvme_ctrl *ctrl)
1176 {
1177 	unsigned long delay = ctrl->kato * HZ / 2;
1178 
1179 	/*
1180 	 * When using Traffic Based Keep Alive, we need to run
1181 	 * nvme_keep_alive_work at twice the normal frequency, as one
1182 	 * command completion can postpone sending a keep alive command
1183 	 * by up to twice the delay between runs.
1184 	 */
1185 	if (ctrl->ctratt & NVME_CTRL_ATTR_TBKAS)
1186 		delay /= 2;
1187 	return delay;
1188 }
1189 
1190 static void nvme_queue_keep_alive_work(struct nvme_ctrl *ctrl)
1191 {
1192 	queue_delayed_work(nvme_wq, &ctrl->ka_work,
1193 			   nvme_keep_alive_work_period(ctrl));
1194 }
1195 
1196 static enum rq_end_io_ret nvme_keep_alive_end_io(struct request *rq,
1197 						 blk_status_t status)
1198 {
1199 	struct nvme_ctrl *ctrl = rq->end_io_data;
1200 	unsigned long flags;
1201 	bool startka = false;
1202 	unsigned long rtt = jiffies - (rq->deadline - rq->timeout);
1203 	unsigned long delay = nvme_keep_alive_work_period(ctrl);
1204 
1205 	/*
1206 	 * Subtract off the keepalive RTT so nvme_keep_alive_work runs
1207 	 * at the desired frequency.
1208 	 */
1209 	if (rtt <= delay) {
1210 		delay -= rtt;
1211 	} else {
1212 		dev_warn(ctrl->device, "long keepalive RTT (%u ms)\n",
1213 			 jiffies_to_msecs(rtt));
1214 		delay = 0;
1215 	}
1216 
1217 	blk_mq_free_request(rq);
1218 
1219 	if (status) {
1220 		dev_err(ctrl->device,
1221 			"failed nvme_keep_alive_end_io error=%d\n",
1222 				status);
1223 		return RQ_END_IO_NONE;
1224 	}
1225 
1226 	ctrl->ka_last_check_time = jiffies;
1227 	ctrl->comp_seen = false;
1228 	spin_lock_irqsave(&ctrl->lock, flags);
1229 	if (ctrl->state == NVME_CTRL_LIVE ||
1230 	    ctrl->state == NVME_CTRL_CONNECTING)
1231 		startka = true;
1232 	spin_unlock_irqrestore(&ctrl->lock, flags);
1233 	if (startka)
1234 		queue_delayed_work(nvme_wq, &ctrl->ka_work, delay);
1235 	return RQ_END_IO_NONE;
1236 }
1237 
1238 static void nvme_keep_alive_work(struct work_struct *work)
1239 {
1240 	struct nvme_ctrl *ctrl = container_of(to_delayed_work(work),
1241 			struct nvme_ctrl, ka_work);
1242 	bool comp_seen = ctrl->comp_seen;
1243 	struct request *rq;
1244 
1245 	ctrl->ka_last_check_time = jiffies;
1246 
1247 	if ((ctrl->ctratt & NVME_CTRL_ATTR_TBKAS) && comp_seen) {
1248 		dev_dbg(ctrl->device,
1249 			"reschedule traffic based keep-alive timer\n");
1250 		ctrl->comp_seen = false;
1251 		nvme_queue_keep_alive_work(ctrl);
1252 		return;
1253 	}
1254 
1255 	rq = blk_mq_alloc_request(ctrl->admin_q, nvme_req_op(&ctrl->ka_cmd),
1256 				  BLK_MQ_REQ_RESERVED | BLK_MQ_REQ_NOWAIT);
1257 	if (IS_ERR(rq)) {
1258 		/* allocation failure, reset the controller */
1259 		dev_err(ctrl->device, "keep-alive failed: %ld\n", PTR_ERR(rq));
1260 		nvme_reset_ctrl(ctrl);
1261 		return;
1262 	}
1263 	nvme_init_request(rq, &ctrl->ka_cmd);
1264 
1265 	rq->timeout = ctrl->kato * HZ;
1266 	rq->end_io = nvme_keep_alive_end_io;
1267 	rq->end_io_data = ctrl;
1268 	blk_execute_rq_nowait(rq, false);
1269 }
1270 
1271 static void nvme_start_keep_alive(struct nvme_ctrl *ctrl)
1272 {
1273 	if (unlikely(ctrl->kato == 0))
1274 		return;
1275 
1276 	nvme_queue_keep_alive_work(ctrl);
1277 }
1278 
1279 void nvme_stop_keep_alive(struct nvme_ctrl *ctrl)
1280 {
1281 	if (unlikely(ctrl->kato == 0))
1282 		return;
1283 
1284 	cancel_delayed_work_sync(&ctrl->ka_work);
1285 }
1286 EXPORT_SYMBOL_GPL(nvme_stop_keep_alive);
1287 
1288 static void nvme_update_keep_alive(struct nvme_ctrl *ctrl,
1289 				   struct nvme_command *cmd)
1290 {
1291 	unsigned int new_kato =
1292 		DIV_ROUND_UP(le32_to_cpu(cmd->common.cdw11), 1000);
1293 
1294 	dev_info(ctrl->device,
1295 		 "keep alive interval updated from %u ms to %u ms\n",
1296 		 ctrl->kato * 1000 / 2, new_kato * 1000 / 2);
1297 
1298 	nvme_stop_keep_alive(ctrl);
1299 	ctrl->kato = new_kato;
1300 	nvme_start_keep_alive(ctrl);
1301 }
1302 
1303 /*
1304  * In NVMe 1.0 the CNS field was just a binary controller or namespace
1305  * flag, thus sending any new CNS opcodes has a big chance of not working.
1306  * Qemu unfortunately had that bug after reporting a 1.1 version compliance
1307  * (but not for any later version).
1308  */
1309 static bool nvme_ctrl_limited_cns(struct nvme_ctrl *ctrl)
1310 {
1311 	if (ctrl->quirks & NVME_QUIRK_IDENTIFY_CNS)
1312 		return ctrl->vs < NVME_VS(1, 2, 0);
1313 	return ctrl->vs < NVME_VS(1, 1, 0);
1314 }
1315 
1316 static int nvme_identify_ctrl(struct nvme_ctrl *dev, struct nvme_id_ctrl **id)
1317 {
1318 	struct nvme_command c = { };
1319 	int error;
1320 
1321 	/* gcc-4.4.4 (at least) has issues with initializers and anon unions */
1322 	c.identify.opcode = nvme_admin_identify;
1323 	c.identify.cns = NVME_ID_CNS_CTRL;
1324 
1325 	*id = kmalloc(sizeof(struct nvme_id_ctrl), GFP_KERNEL);
1326 	if (!*id)
1327 		return -ENOMEM;
1328 
1329 	error = nvme_submit_sync_cmd(dev->admin_q, &c, *id,
1330 			sizeof(struct nvme_id_ctrl));
1331 	if (error)
1332 		kfree(*id);
1333 	return error;
1334 }
1335 
1336 static int nvme_process_ns_desc(struct nvme_ctrl *ctrl, struct nvme_ns_ids *ids,
1337 		struct nvme_ns_id_desc *cur, bool *csi_seen)
1338 {
1339 	const char *warn_str = "ctrl returned bogus length:";
1340 	void *data = cur;
1341 
1342 	switch (cur->nidt) {
1343 	case NVME_NIDT_EUI64:
1344 		if (cur->nidl != NVME_NIDT_EUI64_LEN) {
1345 			dev_warn(ctrl->device, "%s %d for NVME_NIDT_EUI64\n",
1346 				 warn_str, cur->nidl);
1347 			return -1;
1348 		}
1349 		if (ctrl->quirks & NVME_QUIRK_BOGUS_NID)
1350 			return NVME_NIDT_EUI64_LEN;
1351 		memcpy(ids->eui64, data + sizeof(*cur), NVME_NIDT_EUI64_LEN);
1352 		return NVME_NIDT_EUI64_LEN;
1353 	case NVME_NIDT_NGUID:
1354 		if (cur->nidl != NVME_NIDT_NGUID_LEN) {
1355 			dev_warn(ctrl->device, "%s %d for NVME_NIDT_NGUID\n",
1356 				 warn_str, cur->nidl);
1357 			return -1;
1358 		}
1359 		if (ctrl->quirks & NVME_QUIRK_BOGUS_NID)
1360 			return NVME_NIDT_NGUID_LEN;
1361 		memcpy(ids->nguid, data + sizeof(*cur), NVME_NIDT_NGUID_LEN);
1362 		return NVME_NIDT_NGUID_LEN;
1363 	case NVME_NIDT_UUID:
1364 		if (cur->nidl != NVME_NIDT_UUID_LEN) {
1365 			dev_warn(ctrl->device, "%s %d for NVME_NIDT_UUID\n",
1366 				 warn_str, cur->nidl);
1367 			return -1;
1368 		}
1369 		if (ctrl->quirks & NVME_QUIRK_BOGUS_NID)
1370 			return NVME_NIDT_UUID_LEN;
1371 		uuid_copy(&ids->uuid, data + sizeof(*cur));
1372 		return NVME_NIDT_UUID_LEN;
1373 	case NVME_NIDT_CSI:
1374 		if (cur->nidl != NVME_NIDT_CSI_LEN) {
1375 			dev_warn(ctrl->device, "%s %d for NVME_NIDT_CSI\n",
1376 				 warn_str, cur->nidl);
1377 			return -1;
1378 		}
1379 		memcpy(&ids->csi, data + sizeof(*cur), NVME_NIDT_CSI_LEN);
1380 		*csi_seen = true;
1381 		return NVME_NIDT_CSI_LEN;
1382 	default:
1383 		/* Skip unknown types */
1384 		return cur->nidl;
1385 	}
1386 }
1387 
1388 static int nvme_identify_ns_descs(struct nvme_ctrl *ctrl,
1389 		struct nvme_ns_info *info)
1390 {
1391 	struct nvme_command c = { };
1392 	bool csi_seen = false;
1393 	int status, pos, len;
1394 	void *data;
1395 
1396 	if (ctrl->vs < NVME_VS(1, 3, 0) && !nvme_multi_css(ctrl))
1397 		return 0;
1398 	if (ctrl->quirks & NVME_QUIRK_NO_NS_DESC_LIST)
1399 		return 0;
1400 
1401 	c.identify.opcode = nvme_admin_identify;
1402 	c.identify.nsid = cpu_to_le32(info->nsid);
1403 	c.identify.cns = NVME_ID_CNS_NS_DESC_LIST;
1404 
1405 	data = kzalloc(NVME_IDENTIFY_DATA_SIZE, GFP_KERNEL);
1406 	if (!data)
1407 		return -ENOMEM;
1408 
1409 	status = nvme_submit_sync_cmd(ctrl->admin_q, &c, data,
1410 				      NVME_IDENTIFY_DATA_SIZE);
1411 	if (status) {
1412 		dev_warn(ctrl->device,
1413 			"Identify Descriptors failed (nsid=%u, status=0x%x)\n",
1414 			info->nsid, status);
1415 		goto free_data;
1416 	}
1417 
1418 	for (pos = 0; pos < NVME_IDENTIFY_DATA_SIZE; pos += len) {
1419 		struct nvme_ns_id_desc *cur = data + pos;
1420 
1421 		if (cur->nidl == 0)
1422 			break;
1423 
1424 		len = nvme_process_ns_desc(ctrl, &info->ids, cur, &csi_seen);
1425 		if (len < 0)
1426 			break;
1427 
1428 		len += sizeof(*cur);
1429 	}
1430 
1431 	if (nvme_multi_css(ctrl) && !csi_seen) {
1432 		dev_warn(ctrl->device, "Command set not reported for nsid:%d\n",
1433 			 info->nsid);
1434 		status = -EINVAL;
1435 	}
1436 
1437 free_data:
1438 	kfree(data);
1439 	return status;
1440 }
1441 
1442 static int nvme_identify_ns(struct nvme_ctrl *ctrl, unsigned nsid,
1443 			struct nvme_id_ns **id)
1444 {
1445 	struct nvme_command c = { };
1446 	int error;
1447 
1448 	/* gcc-4.4.4 (at least) has issues with initializers and anon unions */
1449 	c.identify.opcode = nvme_admin_identify;
1450 	c.identify.nsid = cpu_to_le32(nsid);
1451 	c.identify.cns = NVME_ID_CNS_NS;
1452 
1453 	*id = kmalloc(sizeof(**id), GFP_KERNEL);
1454 	if (!*id)
1455 		return -ENOMEM;
1456 
1457 	error = nvme_submit_sync_cmd(ctrl->admin_q, &c, *id, sizeof(**id));
1458 	if (error) {
1459 		dev_warn(ctrl->device, "Identify namespace failed (%d)\n", error);
1460 		kfree(*id);
1461 	}
1462 	return error;
1463 }
1464 
1465 static int nvme_ns_info_from_identify(struct nvme_ctrl *ctrl,
1466 		struct nvme_ns_info *info)
1467 {
1468 	struct nvme_ns_ids *ids = &info->ids;
1469 	struct nvme_id_ns *id;
1470 	int ret;
1471 
1472 	ret = nvme_identify_ns(ctrl, info->nsid, &id);
1473 	if (ret)
1474 		return ret;
1475 
1476 	if (id->ncap == 0) {
1477 		/* namespace not allocated or attached */
1478 		info->is_removed = true;
1479 		return -ENODEV;
1480 	}
1481 
1482 	info->anagrpid = id->anagrpid;
1483 	info->is_shared = id->nmic & NVME_NS_NMIC_SHARED;
1484 	info->is_readonly = id->nsattr & NVME_NS_ATTR_RO;
1485 	info->is_ready = true;
1486 	if (ctrl->quirks & NVME_QUIRK_BOGUS_NID) {
1487 		dev_info(ctrl->device,
1488 			 "Ignoring bogus Namespace Identifiers\n");
1489 	} else {
1490 		if (ctrl->vs >= NVME_VS(1, 1, 0) &&
1491 		    !memchr_inv(ids->eui64, 0, sizeof(ids->eui64)))
1492 			memcpy(ids->eui64, id->eui64, sizeof(ids->eui64));
1493 		if (ctrl->vs >= NVME_VS(1, 2, 0) &&
1494 		    !memchr_inv(ids->nguid, 0, sizeof(ids->nguid)))
1495 			memcpy(ids->nguid, id->nguid, sizeof(ids->nguid));
1496 	}
1497 	kfree(id);
1498 	return 0;
1499 }
1500 
1501 static int nvme_ns_info_from_id_cs_indep(struct nvme_ctrl *ctrl,
1502 		struct nvme_ns_info *info)
1503 {
1504 	struct nvme_id_ns_cs_indep *id;
1505 	struct nvme_command c = {
1506 		.identify.opcode	= nvme_admin_identify,
1507 		.identify.nsid		= cpu_to_le32(info->nsid),
1508 		.identify.cns		= NVME_ID_CNS_NS_CS_INDEP,
1509 	};
1510 	int ret;
1511 
1512 	id = kmalloc(sizeof(*id), GFP_KERNEL);
1513 	if (!id)
1514 		return -ENOMEM;
1515 
1516 	ret = nvme_submit_sync_cmd(ctrl->admin_q, &c, id, sizeof(*id));
1517 	if (!ret) {
1518 		info->anagrpid = id->anagrpid;
1519 		info->is_shared = id->nmic & NVME_NS_NMIC_SHARED;
1520 		info->is_readonly = id->nsattr & NVME_NS_ATTR_RO;
1521 		info->is_ready = id->nstat & NVME_NSTAT_NRDY;
1522 	}
1523 	kfree(id);
1524 	return ret;
1525 }
1526 
1527 static int nvme_features(struct nvme_ctrl *dev, u8 op, unsigned int fid,
1528 		unsigned int dword11, void *buffer, size_t buflen, u32 *result)
1529 {
1530 	union nvme_result res = { 0 };
1531 	struct nvme_command c = { };
1532 	int ret;
1533 
1534 	c.features.opcode = op;
1535 	c.features.fid = cpu_to_le32(fid);
1536 	c.features.dword11 = cpu_to_le32(dword11);
1537 
1538 	ret = __nvme_submit_sync_cmd(dev->admin_q, &c, &res,
1539 			buffer, buflen, NVME_QID_ANY, 0, 0);
1540 	if (ret >= 0 && result)
1541 		*result = le32_to_cpu(res.u32);
1542 	return ret;
1543 }
1544 
1545 int nvme_set_features(struct nvme_ctrl *dev, unsigned int fid,
1546 		      unsigned int dword11, void *buffer, size_t buflen,
1547 		      u32 *result)
1548 {
1549 	return nvme_features(dev, nvme_admin_set_features, fid, dword11, buffer,
1550 			     buflen, result);
1551 }
1552 EXPORT_SYMBOL_GPL(nvme_set_features);
1553 
1554 int nvme_get_features(struct nvme_ctrl *dev, unsigned int fid,
1555 		      unsigned int dword11, void *buffer, size_t buflen,
1556 		      u32 *result)
1557 {
1558 	return nvme_features(dev, nvme_admin_get_features, fid, dword11, buffer,
1559 			     buflen, result);
1560 }
1561 EXPORT_SYMBOL_GPL(nvme_get_features);
1562 
1563 int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count)
1564 {
1565 	u32 q_count = (*count - 1) | ((*count - 1) << 16);
1566 	u32 result;
1567 	int status, nr_io_queues;
1568 
1569 	status = nvme_set_features(ctrl, NVME_FEAT_NUM_QUEUES, q_count, NULL, 0,
1570 			&result);
1571 	if (status < 0)
1572 		return status;
1573 
1574 	/*
1575 	 * Degraded controllers might return an error when setting the queue
1576 	 * count.  We still want to be able to bring them online and offer
1577 	 * access to the admin queue, as that might be only way to fix them up.
1578 	 */
1579 	if (status > 0) {
1580 		dev_err(ctrl->device, "Could not set queue count (%d)\n", status);
1581 		*count = 0;
1582 	} else {
1583 		nr_io_queues = min(result & 0xffff, result >> 16) + 1;
1584 		*count = min(*count, nr_io_queues);
1585 	}
1586 
1587 	return 0;
1588 }
1589 EXPORT_SYMBOL_GPL(nvme_set_queue_count);
1590 
1591 #define NVME_AEN_SUPPORTED \
1592 	(NVME_AEN_CFG_NS_ATTR | NVME_AEN_CFG_FW_ACT | \
1593 	 NVME_AEN_CFG_ANA_CHANGE | NVME_AEN_CFG_DISC_CHANGE)
1594 
1595 static void nvme_enable_aen(struct nvme_ctrl *ctrl)
1596 {
1597 	u32 result, supported_aens = ctrl->oaes & NVME_AEN_SUPPORTED;
1598 	int status;
1599 
1600 	if (!supported_aens)
1601 		return;
1602 
1603 	status = nvme_set_features(ctrl, NVME_FEAT_ASYNC_EVENT, supported_aens,
1604 			NULL, 0, &result);
1605 	if (status)
1606 		dev_warn(ctrl->device, "Failed to configure AEN (cfg %x)\n",
1607 			 supported_aens);
1608 
1609 	queue_work(nvme_wq, &ctrl->async_event_work);
1610 }
1611 
1612 static int nvme_ns_open(struct nvme_ns *ns)
1613 {
1614 
1615 	/* should never be called due to GENHD_FL_HIDDEN */
1616 	if (WARN_ON_ONCE(nvme_ns_head_multipath(ns->head)))
1617 		goto fail;
1618 	if (!nvme_get_ns(ns))
1619 		goto fail;
1620 	if (!try_module_get(ns->ctrl->ops->module))
1621 		goto fail_put_ns;
1622 
1623 	return 0;
1624 
1625 fail_put_ns:
1626 	nvme_put_ns(ns);
1627 fail:
1628 	return -ENXIO;
1629 }
1630 
1631 static void nvme_ns_release(struct nvme_ns *ns)
1632 {
1633 
1634 	module_put(ns->ctrl->ops->module);
1635 	nvme_put_ns(ns);
1636 }
1637 
1638 static int nvme_open(struct block_device *bdev, fmode_t mode)
1639 {
1640 	return nvme_ns_open(bdev->bd_disk->private_data);
1641 }
1642 
1643 static void nvme_release(struct gendisk *disk, fmode_t mode)
1644 {
1645 	nvme_ns_release(disk->private_data);
1646 }
1647 
1648 int nvme_getgeo(struct block_device *bdev, struct hd_geometry *geo)
1649 {
1650 	/* some standard values */
1651 	geo->heads = 1 << 6;
1652 	geo->sectors = 1 << 5;
1653 	geo->cylinders = get_capacity(bdev->bd_disk) >> 11;
1654 	return 0;
1655 }
1656 
1657 #ifdef CONFIG_BLK_DEV_INTEGRITY
1658 static void nvme_init_integrity(struct gendisk *disk, struct nvme_ns *ns,
1659 				u32 max_integrity_segments)
1660 {
1661 	struct blk_integrity integrity = { };
1662 
1663 	switch (ns->pi_type) {
1664 	case NVME_NS_DPS_PI_TYPE3:
1665 		switch (ns->guard_type) {
1666 		case NVME_NVM_NS_16B_GUARD:
1667 			integrity.profile = &t10_pi_type3_crc;
1668 			integrity.tag_size = sizeof(u16) + sizeof(u32);
1669 			integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE;
1670 			break;
1671 		case NVME_NVM_NS_64B_GUARD:
1672 			integrity.profile = &ext_pi_type3_crc64;
1673 			integrity.tag_size = sizeof(u16) + 6;
1674 			integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE;
1675 			break;
1676 		default:
1677 			integrity.profile = NULL;
1678 			break;
1679 		}
1680 		break;
1681 	case NVME_NS_DPS_PI_TYPE1:
1682 	case NVME_NS_DPS_PI_TYPE2:
1683 		switch (ns->guard_type) {
1684 		case NVME_NVM_NS_16B_GUARD:
1685 			integrity.profile = &t10_pi_type1_crc;
1686 			integrity.tag_size = sizeof(u16);
1687 			integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE;
1688 			break;
1689 		case NVME_NVM_NS_64B_GUARD:
1690 			integrity.profile = &ext_pi_type1_crc64;
1691 			integrity.tag_size = sizeof(u16);
1692 			integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE;
1693 			break;
1694 		default:
1695 			integrity.profile = NULL;
1696 			break;
1697 		}
1698 		break;
1699 	default:
1700 		integrity.profile = NULL;
1701 		break;
1702 	}
1703 
1704 	integrity.tuple_size = ns->ms;
1705 	blk_integrity_register(disk, &integrity);
1706 	blk_queue_max_integrity_segments(disk->queue, max_integrity_segments);
1707 }
1708 #else
1709 static void nvme_init_integrity(struct gendisk *disk, struct nvme_ns *ns,
1710 				u32 max_integrity_segments)
1711 {
1712 }
1713 #endif /* CONFIG_BLK_DEV_INTEGRITY */
1714 
1715 static void nvme_config_discard(struct gendisk *disk, struct nvme_ns *ns)
1716 {
1717 	struct nvme_ctrl *ctrl = ns->ctrl;
1718 	struct request_queue *queue = disk->queue;
1719 	u32 size = queue_logical_block_size(queue);
1720 
1721 	if (ctrl->dmrsl && ctrl->dmrsl <= nvme_sect_to_lba(ns, UINT_MAX))
1722 		ctrl->max_discard_sectors = nvme_lba_to_sect(ns, ctrl->dmrsl);
1723 
1724 	if (ctrl->max_discard_sectors == 0) {
1725 		blk_queue_max_discard_sectors(queue, 0);
1726 		return;
1727 	}
1728 
1729 	BUILD_BUG_ON(PAGE_SIZE / sizeof(struct nvme_dsm_range) <
1730 			NVME_DSM_MAX_RANGES);
1731 
1732 	queue->limits.discard_granularity = size;
1733 
1734 	/* If discard is already enabled, don't reset queue limits */
1735 	if (queue->limits.max_discard_sectors)
1736 		return;
1737 
1738 	blk_queue_max_discard_sectors(queue, ctrl->max_discard_sectors);
1739 	blk_queue_max_discard_segments(queue, ctrl->max_discard_segments);
1740 
1741 	if (ctrl->quirks & NVME_QUIRK_DEALLOCATE_ZEROES)
1742 		blk_queue_max_write_zeroes_sectors(queue, UINT_MAX);
1743 }
1744 
1745 static bool nvme_ns_ids_equal(struct nvme_ns_ids *a, struct nvme_ns_ids *b)
1746 {
1747 	return uuid_equal(&a->uuid, &b->uuid) &&
1748 		memcmp(&a->nguid, &b->nguid, sizeof(a->nguid)) == 0 &&
1749 		memcmp(&a->eui64, &b->eui64, sizeof(a->eui64)) == 0 &&
1750 		a->csi == b->csi;
1751 }
1752 
1753 static int nvme_init_ms(struct nvme_ns *ns, struct nvme_id_ns *id)
1754 {
1755 	bool first = id->dps & NVME_NS_DPS_PI_FIRST;
1756 	unsigned lbaf = nvme_lbaf_index(id->flbas);
1757 	struct nvme_ctrl *ctrl = ns->ctrl;
1758 	struct nvme_command c = { };
1759 	struct nvme_id_ns_nvm *nvm;
1760 	int ret = 0;
1761 	u32 elbaf;
1762 
1763 	ns->pi_size = 0;
1764 	ns->ms = le16_to_cpu(id->lbaf[lbaf].ms);
1765 	if (!(ctrl->ctratt & NVME_CTRL_ATTR_ELBAS)) {
1766 		ns->pi_size = sizeof(struct t10_pi_tuple);
1767 		ns->guard_type = NVME_NVM_NS_16B_GUARD;
1768 		goto set_pi;
1769 	}
1770 
1771 	nvm = kzalloc(sizeof(*nvm), GFP_KERNEL);
1772 	if (!nvm)
1773 		return -ENOMEM;
1774 
1775 	c.identify.opcode = nvme_admin_identify;
1776 	c.identify.nsid = cpu_to_le32(ns->head->ns_id);
1777 	c.identify.cns = NVME_ID_CNS_CS_NS;
1778 	c.identify.csi = NVME_CSI_NVM;
1779 
1780 	ret = nvme_submit_sync_cmd(ns->ctrl->admin_q, &c, nvm, sizeof(*nvm));
1781 	if (ret)
1782 		goto free_data;
1783 
1784 	elbaf = le32_to_cpu(nvm->elbaf[lbaf]);
1785 
1786 	/* no support for storage tag formats right now */
1787 	if (nvme_elbaf_sts(elbaf))
1788 		goto free_data;
1789 
1790 	ns->guard_type = nvme_elbaf_guard_type(elbaf);
1791 	switch (ns->guard_type) {
1792 	case NVME_NVM_NS_64B_GUARD:
1793 		ns->pi_size = sizeof(struct crc64_pi_tuple);
1794 		break;
1795 	case NVME_NVM_NS_16B_GUARD:
1796 		ns->pi_size = sizeof(struct t10_pi_tuple);
1797 		break;
1798 	default:
1799 		break;
1800 	}
1801 
1802 free_data:
1803 	kfree(nvm);
1804 set_pi:
1805 	if (ns->pi_size && (first || ns->ms == ns->pi_size))
1806 		ns->pi_type = id->dps & NVME_NS_DPS_PI_MASK;
1807 	else
1808 		ns->pi_type = 0;
1809 
1810 	return ret;
1811 }
1812 
1813 static void nvme_configure_metadata(struct nvme_ns *ns, struct nvme_id_ns *id)
1814 {
1815 	struct nvme_ctrl *ctrl = ns->ctrl;
1816 
1817 	if (nvme_init_ms(ns, id))
1818 		return;
1819 
1820 	ns->features &= ~(NVME_NS_METADATA_SUPPORTED | NVME_NS_EXT_LBAS);
1821 	if (!ns->ms || !(ctrl->ops->flags & NVME_F_METADATA_SUPPORTED))
1822 		return;
1823 
1824 	if (ctrl->ops->flags & NVME_F_FABRICS) {
1825 		/*
1826 		 * The NVMe over Fabrics specification only supports metadata as
1827 		 * part of the extended data LBA.  We rely on HCA/HBA support to
1828 		 * remap the separate metadata buffer from the block layer.
1829 		 */
1830 		if (WARN_ON_ONCE(!(id->flbas & NVME_NS_FLBAS_META_EXT)))
1831 			return;
1832 
1833 		ns->features |= NVME_NS_EXT_LBAS;
1834 
1835 		/*
1836 		 * The current fabrics transport drivers support namespace
1837 		 * metadata formats only if nvme_ns_has_pi() returns true.
1838 		 * Suppress support for all other formats so the namespace will
1839 		 * have a 0 capacity and not be usable through the block stack.
1840 		 *
1841 		 * Note, this check will need to be modified if any drivers
1842 		 * gain the ability to use other metadata formats.
1843 		 */
1844 		if (ctrl->max_integrity_segments && nvme_ns_has_pi(ns))
1845 			ns->features |= NVME_NS_METADATA_SUPPORTED;
1846 	} else {
1847 		/*
1848 		 * For PCIe controllers, we can't easily remap the separate
1849 		 * metadata buffer from the block layer and thus require a
1850 		 * separate metadata buffer for block layer metadata/PI support.
1851 		 * We allow extended LBAs for the passthrough interface, though.
1852 		 */
1853 		if (id->flbas & NVME_NS_FLBAS_META_EXT)
1854 			ns->features |= NVME_NS_EXT_LBAS;
1855 		else
1856 			ns->features |= NVME_NS_METADATA_SUPPORTED;
1857 	}
1858 }
1859 
1860 static void nvme_set_queue_limits(struct nvme_ctrl *ctrl,
1861 		struct request_queue *q)
1862 {
1863 	bool vwc = ctrl->vwc & NVME_CTRL_VWC_PRESENT;
1864 
1865 	if (ctrl->max_hw_sectors) {
1866 		u32 max_segments =
1867 			(ctrl->max_hw_sectors / (NVME_CTRL_PAGE_SIZE >> 9)) + 1;
1868 
1869 		max_segments = min_not_zero(max_segments, ctrl->max_segments);
1870 		blk_queue_max_hw_sectors(q, ctrl->max_hw_sectors);
1871 		blk_queue_max_segments(q, min_t(u32, max_segments, USHRT_MAX));
1872 	}
1873 	blk_queue_virt_boundary(q, NVME_CTRL_PAGE_SIZE - 1);
1874 	blk_queue_dma_alignment(q, 3);
1875 	blk_queue_write_cache(q, vwc, vwc);
1876 }
1877 
1878 static void nvme_update_disk_info(struct gendisk *disk,
1879 		struct nvme_ns *ns, struct nvme_id_ns *id)
1880 {
1881 	sector_t capacity = nvme_lba_to_sect(ns, le64_to_cpu(id->nsze));
1882 	unsigned short bs = 1 << ns->lba_shift;
1883 	u32 atomic_bs, phys_bs, io_opt = 0;
1884 
1885 	/*
1886 	 * The block layer can't support LBA sizes larger than the page size
1887 	 * yet, so catch this early and don't allow block I/O.
1888 	 */
1889 	if (ns->lba_shift > PAGE_SHIFT) {
1890 		capacity = 0;
1891 		bs = (1 << 9);
1892 	}
1893 
1894 	blk_integrity_unregister(disk);
1895 
1896 	atomic_bs = phys_bs = bs;
1897 	if (id->nabo == 0) {
1898 		/*
1899 		 * Bit 1 indicates whether NAWUPF is defined for this namespace
1900 		 * and whether it should be used instead of AWUPF. If NAWUPF ==
1901 		 * 0 then AWUPF must be used instead.
1902 		 */
1903 		if (id->nsfeat & NVME_NS_FEAT_ATOMICS && id->nawupf)
1904 			atomic_bs = (1 + le16_to_cpu(id->nawupf)) * bs;
1905 		else
1906 			atomic_bs = (1 + ns->ctrl->subsys->awupf) * bs;
1907 	}
1908 
1909 	if (id->nsfeat & NVME_NS_FEAT_IO_OPT) {
1910 		/* NPWG = Namespace Preferred Write Granularity */
1911 		phys_bs = bs * (1 + le16_to_cpu(id->npwg));
1912 		/* NOWS = Namespace Optimal Write Size */
1913 		io_opt = bs * (1 + le16_to_cpu(id->nows));
1914 	}
1915 
1916 	blk_queue_logical_block_size(disk->queue, bs);
1917 	/*
1918 	 * Linux filesystems assume writing a single physical block is
1919 	 * an atomic operation. Hence limit the physical block size to the
1920 	 * value of the Atomic Write Unit Power Fail parameter.
1921 	 */
1922 	blk_queue_physical_block_size(disk->queue, min(phys_bs, atomic_bs));
1923 	blk_queue_io_min(disk->queue, phys_bs);
1924 	blk_queue_io_opt(disk->queue, io_opt);
1925 
1926 	/*
1927 	 * Register a metadata profile for PI, or the plain non-integrity NVMe
1928 	 * metadata masquerading as Type 0 if supported, otherwise reject block
1929 	 * I/O to namespaces with metadata except when the namespace supports
1930 	 * PI, as it can strip/insert in that case.
1931 	 */
1932 	if (ns->ms) {
1933 		if (IS_ENABLED(CONFIG_BLK_DEV_INTEGRITY) &&
1934 		    (ns->features & NVME_NS_METADATA_SUPPORTED))
1935 			nvme_init_integrity(disk, ns,
1936 					    ns->ctrl->max_integrity_segments);
1937 		else if (!nvme_ns_has_pi(ns))
1938 			capacity = 0;
1939 	}
1940 
1941 	set_capacity_and_notify(disk, capacity);
1942 
1943 	nvme_config_discard(disk, ns);
1944 	blk_queue_max_write_zeroes_sectors(disk->queue,
1945 					   ns->ctrl->max_zeroes_sectors);
1946 }
1947 
1948 static bool nvme_ns_is_readonly(struct nvme_ns *ns, struct nvme_ns_info *info)
1949 {
1950 	return info->is_readonly || test_bit(NVME_NS_FORCE_RO, &ns->flags);
1951 }
1952 
1953 static inline bool nvme_first_scan(struct gendisk *disk)
1954 {
1955 	/* nvme_alloc_ns() scans the disk prior to adding it */
1956 	return !disk_live(disk);
1957 }
1958 
1959 static void nvme_set_chunk_sectors(struct nvme_ns *ns, struct nvme_id_ns *id)
1960 {
1961 	struct nvme_ctrl *ctrl = ns->ctrl;
1962 	u32 iob;
1963 
1964 	if ((ctrl->quirks & NVME_QUIRK_STRIPE_SIZE) &&
1965 	    is_power_of_2(ctrl->max_hw_sectors))
1966 		iob = ctrl->max_hw_sectors;
1967 	else
1968 		iob = nvme_lba_to_sect(ns, le16_to_cpu(id->noiob));
1969 
1970 	if (!iob)
1971 		return;
1972 
1973 	if (!is_power_of_2(iob)) {
1974 		if (nvme_first_scan(ns->disk))
1975 			pr_warn("%s: ignoring unaligned IO boundary:%u\n",
1976 				ns->disk->disk_name, iob);
1977 		return;
1978 	}
1979 
1980 	if (blk_queue_is_zoned(ns->disk->queue)) {
1981 		if (nvme_first_scan(ns->disk))
1982 			pr_warn("%s: ignoring zoned namespace IO boundary\n",
1983 				ns->disk->disk_name);
1984 		return;
1985 	}
1986 
1987 	blk_queue_chunk_sectors(ns->queue, iob);
1988 }
1989 
1990 static int nvme_update_ns_info_generic(struct nvme_ns *ns,
1991 		struct nvme_ns_info *info)
1992 {
1993 	blk_mq_freeze_queue(ns->disk->queue);
1994 	nvme_set_queue_limits(ns->ctrl, ns->queue);
1995 	set_disk_ro(ns->disk, nvme_ns_is_readonly(ns, info));
1996 	blk_mq_unfreeze_queue(ns->disk->queue);
1997 
1998 	if (nvme_ns_head_multipath(ns->head)) {
1999 		blk_mq_freeze_queue(ns->head->disk->queue);
2000 		set_disk_ro(ns->head->disk, nvme_ns_is_readonly(ns, info));
2001 		nvme_mpath_revalidate_paths(ns);
2002 		blk_stack_limits(&ns->head->disk->queue->limits,
2003 				 &ns->queue->limits, 0);
2004 		ns->head->disk->flags |= GENHD_FL_HIDDEN;
2005 		blk_mq_unfreeze_queue(ns->head->disk->queue);
2006 	}
2007 
2008 	/* Hide the block-interface for these devices */
2009 	ns->disk->flags |= GENHD_FL_HIDDEN;
2010 	set_bit(NVME_NS_READY, &ns->flags);
2011 
2012 	return 0;
2013 }
2014 
2015 static int nvme_update_ns_info_block(struct nvme_ns *ns,
2016 		struct nvme_ns_info *info)
2017 {
2018 	struct nvme_id_ns *id;
2019 	unsigned lbaf;
2020 	int ret;
2021 
2022 	ret = nvme_identify_ns(ns->ctrl, info->nsid, &id);
2023 	if (ret)
2024 		return ret;
2025 
2026 	blk_mq_freeze_queue(ns->disk->queue);
2027 	lbaf = nvme_lbaf_index(id->flbas);
2028 	ns->lba_shift = id->lbaf[lbaf].ds;
2029 	nvme_set_queue_limits(ns->ctrl, ns->queue);
2030 
2031 	nvme_configure_metadata(ns, id);
2032 	nvme_set_chunk_sectors(ns, id);
2033 	nvme_update_disk_info(ns->disk, ns, id);
2034 
2035 	if (ns->head->ids.csi == NVME_CSI_ZNS) {
2036 		ret = nvme_update_zone_info(ns, lbaf);
2037 		if (ret) {
2038 			blk_mq_unfreeze_queue(ns->disk->queue);
2039 			goto out;
2040 		}
2041 	}
2042 
2043 	/*
2044 	 * Only set the DEAC bit if the device guarantees that reads from
2045 	 * deallocated data return zeroes.  While the DEAC bit does not
2046 	 * require that, it must be a no-op if reads from deallocated data
2047 	 * do not return zeroes.
2048 	 */
2049 	if ((id->dlfeat & 0x7) == 0x1 && (id->dlfeat & (1 << 3)))
2050 		ns->features |= NVME_NS_DEAC;
2051 	set_disk_ro(ns->disk, nvme_ns_is_readonly(ns, info));
2052 	set_bit(NVME_NS_READY, &ns->flags);
2053 	blk_mq_unfreeze_queue(ns->disk->queue);
2054 
2055 	if (blk_queue_is_zoned(ns->queue)) {
2056 		ret = nvme_revalidate_zones(ns);
2057 		if (ret && !nvme_first_scan(ns->disk))
2058 			goto out;
2059 	}
2060 
2061 	if (nvme_ns_head_multipath(ns->head)) {
2062 		blk_mq_freeze_queue(ns->head->disk->queue);
2063 		nvme_update_disk_info(ns->head->disk, ns, id);
2064 		set_disk_ro(ns->head->disk, nvme_ns_is_readonly(ns, info));
2065 		nvme_mpath_revalidate_paths(ns);
2066 		blk_stack_limits(&ns->head->disk->queue->limits,
2067 				 &ns->queue->limits, 0);
2068 		disk_update_readahead(ns->head->disk);
2069 		blk_mq_unfreeze_queue(ns->head->disk->queue);
2070 	}
2071 
2072 	ret = 0;
2073 out:
2074 	/*
2075 	 * If probing fails due an unsupported feature, hide the block device,
2076 	 * but still allow other access.
2077 	 */
2078 	if (ret == -ENODEV) {
2079 		ns->disk->flags |= GENHD_FL_HIDDEN;
2080 		set_bit(NVME_NS_READY, &ns->flags);
2081 		ret = 0;
2082 	}
2083 	kfree(id);
2084 	return ret;
2085 }
2086 
2087 static int nvme_update_ns_info(struct nvme_ns *ns, struct nvme_ns_info *info)
2088 {
2089 	switch (info->ids.csi) {
2090 	case NVME_CSI_ZNS:
2091 		if (!IS_ENABLED(CONFIG_BLK_DEV_ZONED)) {
2092 			dev_info(ns->ctrl->device,
2093 	"block device for nsid %u not supported without CONFIG_BLK_DEV_ZONED\n",
2094 				info->nsid);
2095 			return nvme_update_ns_info_generic(ns, info);
2096 		}
2097 		return nvme_update_ns_info_block(ns, info);
2098 	case NVME_CSI_NVM:
2099 		return nvme_update_ns_info_block(ns, info);
2100 	default:
2101 		dev_info(ns->ctrl->device,
2102 			"block device for nsid %u not supported (csi %u)\n",
2103 			info->nsid, info->ids.csi);
2104 		return nvme_update_ns_info_generic(ns, info);
2105 	}
2106 }
2107 
2108 static char nvme_pr_type(enum pr_type type)
2109 {
2110 	switch (type) {
2111 	case PR_WRITE_EXCLUSIVE:
2112 		return 1;
2113 	case PR_EXCLUSIVE_ACCESS:
2114 		return 2;
2115 	case PR_WRITE_EXCLUSIVE_REG_ONLY:
2116 		return 3;
2117 	case PR_EXCLUSIVE_ACCESS_REG_ONLY:
2118 		return 4;
2119 	case PR_WRITE_EXCLUSIVE_ALL_REGS:
2120 		return 5;
2121 	case PR_EXCLUSIVE_ACCESS_ALL_REGS:
2122 		return 6;
2123 	default:
2124 		return 0;
2125 	}
2126 }
2127 
2128 static int nvme_send_ns_head_pr_command(struct block_device *bdev,
2129 		struct nvme_command *c, u8 data[16])
2130 {
2131 	struct nvme_ns_head *head = bdev->bd_disk->private_data;
2132 	int srcu_idx = srcu_read_lock(&head->srcu);
2133 	struct nvme_ns *ns = nvme_find_path(head);
2134 	int ret = -EWOULDBLOCK;
2135 
2136 	if (ns) {
2137 		c->common.nsid = cpu_to_le32(ns->head->ns_id);
2138 		ret = nvme_submit_sync_cmd(ns->queue, c, data, 16);
2139 	}
2140 	srcu_read_unlock(&head->srcu, srcu_idx);
2141 	return ret;
2142 }
2143 
2144 static int nvme_send_ns_pr_command(struct nvme_ns *ns, struct nvme_command *c,
2145 		u8 data[16])
2146 {
2147 	c->common.nsid = cpu_to_le32(ns->head->ns_id);
2148 	return nvme_submit_sync_cmd(ns->queue, c, data, 16);
2149 }
2150 
2151 static int nvme_sc_to_pr_err(int nvme_sc)
2152 {
2153 	if (nvme_is_path_error(nvme_sc))
2154 		return PR_STS_PATH_FAILED;
2155 
2156 	switch (nvme_sc) {
2157 	case NVME_SC_SUCCESS:
2158 		return PR_STS_SUCCESS;
2159 	case NVME_SC_RESERVATION_CONFLICT:
2160 		return PR_STS_RESERVATION_CONFLICT;
2161 	case NVME_SC_ONCS_NOT_SUPPORTED:
2162 		return -EOPNOTSUPP;
2163 	case NVME_SC_BAD_ATTRIBUTES:
2164 	case NVME_SC_INVALID_OPCODE:
2165 	case NVME_SC_INVALID_FIELD:
2166 	case NVME_SC_INVALID_NS:
2167 		return -EINVAL;
2168 	default:
2169 		return PR_STS_IOERR;
2170 	}
2171 }
2172 
2173 static int nvme_pr_command(struct block_device *bdev, u32 cdw10,
2174 				u64 key, u64 sa_key, u8 op)
2175 {
2176 	struct nvme_command c = { };
2177 	u8 data[16] = { 0, };
2178 	int ret;
2179 
2180 	put_unaligned_le64(key, &data[0]);
2181 	put_unaligned_le64(sa_key, &data[8]);
2182 
2183 	c.common.opcode = op;
2184 	c.common.cdw10 = cpu_to_le32(cdw10);
2185 
2186 	if (IS_ENABLED(CONFIG_NVME_MULTIPATH) &&
2187 	    bdev->bd_disk->fops == &nvme_ns_head_ops)
2188 		ret = nvme_send_ns_head_pr_command(bdev, &c, data);
2189 	else
2190 		ret = nvme_send_ns_pr_command(bdev->bd_disk->private_data, &c,
2191 					      data);
2192 	if (ret < 0)
2193 		return ret;
2194 
2195 	return nvme_sc_to_pr_err(ret);
2196 }
2197 
2198 static int nvme_pr_register(struct block_device *bdev, u64 old,
2199 		u64 new, unsigned flags)
2200 {
2201 	u32 cdw10;
2202 
2203 	if (flags & ~PR_FL_IGNORE_KEY)
2204 		return -EOPNOTSUPP;
2205 
2206 	cdw10 = old ? 2 : 0;
2207 	cdw10 |= (flags & PR_FL_IGNORE_KEY) ? 1 << 3 : 0;
2208 	cdw10 |= (1 << 30) | (1 << 31); /* PTPL=1 */
2209 	return nvme_pr_command(bdev, cdw10, old, new, nvme_cmd_resv_register);
2210 }
2211 
2212 static int nvme_pr_reserve(struct block_device *bdev, u64 key,
2213 		enum pr_type type, unsigned flags)
2214 {
2215 	u32 cdw10;
2216 
2217 	if (flags & ~PR_FL_IGNORE_KEY)
2218 		return -EOPNOTSUPP;
2219 
2220 	cdw10 = nvme_pr_type(type) << 8;
2221 	cdw10 |= ((flags & PR_FL_IGNORE_KEY) ? 1 << 3 : 0);
2222 	return nvme_pr_command(bdev, cdw10, key, 0, nvme_cmd_resv_acquire);
2223 }
2224 
2225 static int nvme_pr_preempt(struct block_device *bdev, u64 old, u64 new,
2226 		enum pr_type type, bool abort)
2227 {
2228 	u32 cdw10 = nvme_pr_type(type) << 8 | (abort ? 2 : 1);
2229 
2230 	return nvme_pr_command(bdev, cdw10, old, new, nvme_cmd_resv_acquire);
2231 }
2232 
2233 static int nvme_pr_clear(struct block_device *bdev, u64 key)
2234 {
2235 	u32 cdw10 = 1 | (key ? 0 : 1 << 3);
2236 
2237 	return nvme_pr_command(bdev, cdw10, key, 0, nvme_cmd_resv_release);
2238 }
2239 
2240 static int nvme_pr_release(struct block_device *bdev, u64 key, enum pr_type type)
2241 {
2242 	u32 cdw10 = nvme_pr_type(type) << 8 | (key ? 0 : 1 << 3);
2243 
2244 	return nvme_pr_command(bdev, cdw10, key, 0, nvme_cmd_resv_release);
2245 }
2246 
2247 const struct pr_ops nvme_pr_ops = {
2248 	.pr_register	= nvme_pr_register,
2249 	.pr_reserve	= nvme_pr_reserve,
2250 	.pr_release	= nvme_pr_release,
2251 	.pr_preempt	= nvme_pr_preempt,
2252 	.pr_clear	= nvme_pr_clear,
2253 };
2254 
2255 #ifdef CONFIG_BLK_SED_OPAL
2256 static int nvme_sec_submit(void *data, u16 spsp, u8 secp, void *buffer, size_t len,
2257 		bool send)
2258 {
2259 	struct nvme_ctrl *ctrl = data;
2260 	struct nvme_command cmd = { };
2261 
2262 	if (send)
2263 		cmd.common.opcode = nvme_admin_security_send;
2264 	else
2265 		cmd.common.opcode = nvme_admin_security_recv;
2266 	cmd.common.nsid = 0;
2267 	cmd.common.cdw10 = cpu_to_le32(((u32)secp) << 24 | ((u32)spsp) << 8);
2268 	cmd.common.cdw11 = cpu_to_le32(len);
2269 
2270 	return __nvme_submit_sync_cmd(ctrl->admin_q, &cmd, NULL, buffer, len,
2271 			NVME_QID_ANY, 1, 0);
2272 }
2273 
2274 static void nvme_configure_opal(struct nvme_ctrl *ctrl, bool was_suspended)
2275 {
2276 	if (ctrl->oacs & NVME_CTRL_OACS_SEC_SUPP) {
2277 		if (!ctrl->opal_dev)
2278 			ctrl->opal_dev = init_opal_dev(ctrl, &nvme_sec_submit);
2279 		else if (was_suspended)
2280 			opal_unlock_from_suspend(ctrl->opal_dev);
2281 	} else {
2282 		free_opal_dev(ctrl->opal_dev);
2283 		ctrl->opal_dev = NULL;
2284 	}
2285 }
2286 #else
2287 static void nvme_configure_opal(struct nvme_ctrl *ctrl, bool was_suspended)
2288 {
2289 }
2290 #endif /* CONFIG_BLK_SED_OPAL */
2291 
2292 #ifdef CONFIG_BLK_DEV_ZONED
2293 static int nvme_report_zones(struct gendisk *disk, sector_t sector,
2294 		unsigned int nr_zones, report_zones_cb cb, void *data)
2295 {
2296 	return nvme_ns_report_zones(disk->private_data, sector, nr_zones, cb,
2297 			data);
2298 }
2299 #else
2300 #define nvme_report_zones	NULL
2301 #endif /* CONFIG_BLK_DEV_ZONED */
2302 
2303 static const struct block_device_operations nvme_bdev_ops = {
2304 	.owner		= THIS_MODULE,
2305 	.ioctl		= nvme_ioctl,
2306 	.compat_ioctl	= blkdev_compat_ptr_ioctl,
2307 	.open		= nvme_open,
2308 	.release	= nvme_release,
2309 	.getgeo		= nvme_getgeo,
2310 	.report_zones	= nvme_report_zones,
2311 	.pr_ops		= &nvme_pr_ops,
2312 };
2313 
2314 static int nvme_wait_ready(struct nvme_ctrl *ctrl, u32 mask, u32 val,
2315 		u32 timeout, const char *op)
2316 {
2317 	unsigned long timeout_jiffies = jiffies + timeout * HZ;
2318 	u32 csts;
2319 	int ret;
2320 
2321 	while ((ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts)) == 0) {
2322 		if (csts == ~0)
2323 			return -ENODEV;
2324 		if ((csts & mask) == val)
2325 			break;
2326 
2327 		usleep_range(1000, 2000);
2328 		if (fatal_signal_pending(current))
2329 			return -EINTR;
2330 		if (time_after(jiffies, timeout_jiffies)) {
2331 			dev_err(ctrl->device,
2332 				"Device not ready; aborting %s, CSTS=0x%x\n",
2333 				op, csts);
2334 			return -ENODEV;
2335 		}
2336 	}
2337 
2338 	return ret;
2339 }
2340 
2341 int nvme_disable_ctrl(struct nvme_ctrl *ctrl, bool shutdown)
2342 {
2343 	int ret;
2344 
2345 	ctrl->ctrl_config &= ~NVME_CC_SHN_MASK;
2346 	if (shutdown)
2347 		ctrl->ctrl_config |= NVME_CC_SHN_NORMAL;
2348 	else
2349 		ctrl->ctrl_config &= ~NVME_CC_ENABLE;
2350 
2351 	ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config);
2352 	if (ret)
2353 		return ret;
2354 
2355 	if (shutdown) {
2356 		return nvme_wait_ready(ctrl, NVME_CSTS_SHST_MASK,
2357 				       NVME_CSTS_SHST_CMPLT,
2358 				       ctrl->shutdown_timeout, "shutdown");
2359 	}
2360 	if (ctrl->quirks & NVME_QUIRK_DELAY_BEFORE_CHK_RDY)
2361 		msleep(NVME_QUIRK_DELAY_AMOUNT);
2362 	return nvme_wait_ready(ctrl, NVME_CSTS_RDY, 0,
2363 			       (NVME_CAP_TIMEOUT(ctrl->cap) + 1) / 2, "reset");
2364 }
2365 EXPORT_SYMBOL_GPL(nvme_disable_ctrl);
2366 
2367 int nvme_enable_ctrl(struct nvme_ctrl *ctrl)
2368 {
2369 	unsigned dev_page_min;
2370 	u32 timeout;
2371 	int ret;
2372 
2373 	ret = ctrl->ops->reg_read64(ctrl, NVME_REG_CAP, &ctrl->cap);
2374 	if (ret) {
2375 		dev_err(ctrl->device, "Reading CAP failed (%d)\n", ret);
2376 		return ret;
2377 	}
2378 	dev_page_min = NVME_CAP_MPSMIN(ctrl->cap) + 12;
2379 
2380 	if (NVME_CTRL_PAGE_SHIFT < dev_page_min) {
2381 		dev_err(ctrl->device,
2382 			"Minimum device page size %u too large for host (%u)\n",
2383 			1 << dev_page_min, 1 << NVME_CTRL_PAGE_SHIFT);
2384 		return -ENODEV;
2385 	}
2386 
2387 	if (NVME_CAP_CSS(ctrl->cap) & NVME_CAP_CSS_CSI)
2388 		ctrl->ctrl_config = NVME_CC_CSS_CSI;
2389 	else
2390 		ctrl->ctrl_config = NVME_CC_CSS_NVM;
2391 
2392 	if (ctrl->cap & NVME_CAP_CRMS_CRWMS) {
2393 		u32 crto;
2394 
2395 		ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CRTO, &crto);
2396 		if (ret) {
2397 			dev_err(ctrl->device, "Reading CRTO failed (%d)\n",
2398 				ret);
2399 			return ret;
2400 		}
2401 
2402 		if (ctrl->cap & NVME_CAP_CRMS_CRIMS) {
2403 			ctrl->ctrl_config |= NVME_CC_CRIME;
2404 			timeout = NVME_CRTO_CRIMT(crto);
2405 		} else {
2406 			timeout = NVME_CRTO_CRWMT(crto);
2407 		}
2408 	} else {
2409 		timeout = NVME_CAP_TIMEOUT(ctrl->cap);
2410 	}
2411 
2412 	ctrl->ctrl_config |= (NVME_CTRL_PAGE_SHIFT - 12) << NVME_CC_MPS_SHIFT;
2413 	ctrl->ctrl_config |= NVME_CC_AMS_RR | NVME_CC_SHN_NONE;
2414 	ctrl->ctrl_config |= NVME_CC_IOSQES | NVME_CC_IOCQES;
2415 	ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config);
2416 	if (ret)
2417 		return ret;
2418 
2419 	/* Flush write to device (required if transport is PCI) */
2420 	ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CC, &ctrl->ctrl_config);
2421 	if (ret)
2422 		return ret;
2423 
2424 	ctrl->ctrl_config |= NVME_CC_ENABLE;
2425 	ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config);
2426 	if (ret)
2427 		return ret;
2428 	return nvme_wait_ready(ctrl, NVME_CSTS_RDY, NVME_CSTS_RDY,
2429 			       (timeout + 1) / 2, "initialisation");
2430 }
2431 EXPORT_SYMBOL_GPL(nvme_enable_ctrl);
2432 
2433 static int nvme_configure_timestamp(struct nvme_ctrl *ctrl)
2434 {
2435 	__le64 ts;
2436 	int ret;
2437 
2438 	if (!(ctrl->oncs & NVME_CTRL_ONCS_TIMESTAMP))
2439 		return 0;
2440 
2441 	ts = cpu_to_le64(ktime_to_ms(ktime_get_real()));
2442 	ret = nvme_set_features(ctrl, NVME_FEAT_TIMESTAMP, 0, &ts, sizeof(ts),
2443 			NULL);
2444 	if (ret)
2445 		dev_warn_once(ctrl->device,
2446 			"could not set timestamp (%d)\n", ret);
2447 	return ret;
2448 }
2449 
2450 static int nvme_configure_host_options(struct nvme_ctrl *ctrl)
2451 {
2452 	struct nvme_feat_host_behavior *host;
2453 	u8 acre = 0, lbafee = 0;
2454 	int ret;
2455 
2456 	/* Don't bother enabling the feature if retry delay is not reported */
2457 	if (ctrl->crdt[0])
2458 		acre = NVME_ENABLE_ACRE;
2459 	if (ctrl->ctratt & NVME_CTRL_ATTR_ELBAS)
2460 		lbafee = NVME_ENABLE_LBAFEE;
2461 
2462 	if (!acre && !lbafee)
2463 		return 0;
2464 
2465 	host = kzalloc(sizeof(*host), GFP_KERNEL);
2466 	if (!host)
2467 		return 0;
2468 
2469 	host->acre = acre;
2470 	host->lbafee = lbafee;
2471 	ret = nvme_set_features(ctrl, NVME_FEAT_HOST_BEHAVIOR, 0,
2472 				host, sizeof(*host), NULL);
2473 	kfree(host);
2474 	return ret;
2475 }
2476 
2477 /*
2478  * The function checks whether the given total (exlat + enlat) latency of
2479  * a power state allows the latter to be used as an APST transition target.
2480  * It does so by comparing the latency to the primary and secondary latency
2481  * tolerances defined by module params. If there's a match, the corresponding
2482  * timeout value is returned and the matching tolerance index (1 or 2) is
2483  * reported.
2484  */
2485 static bool nvme_apst_get_transition_time(u64 total_latency,
2486 		u64 *transition_time, unsigned *last_index)
2487 {
2488 	if (total_latency <= apst_primary_latency_tol_us) {
2489 		if (*last_index == 1)
2490 			return false;
2491 		*last_index = 1;
2492 		*transition_time = apst_primary_timeout_ms;
2493 		return true;
2494 	}
2495 	if (apst_secondary_timeout_ms &&
2496 		total_latency <= apst_secondary_latency_tol_us) {
2497 		if (*last_index <= 2)
2498 			return false;
2499 		*last_index = 2;
2500 		*transition_time = apst_secondary_timeout_ms;
2501 		return true;
2502 	}
2503 	return false;
2504 }
2505 
2506 /*
2507  * APST (Autonomous Power State Transition) lets us program a table of power
2508  * state transitions that the controller will perform automatically.
2509  *
2510  * Depending on module params, one of the two supported techniques will be used:
2511  *
2512  * - If the parameters provide explicit timeouts and tolerances, they will be
2513  *   used to build a table with up to 2 non-operational states to transition to.
2514  *   The default parameter values were selected based on the values used by
2515  *   Microsoft's and Intel's NVMe drivers. Yet, since we don't implement dynamic
2516  *   regeneration of the APST table in the event of switching between external
2517  *   and battery power, the timeouts and tolerances reflect a compromise
2518  *   between values used by Microsoft for AC and battery scenarios.
2519  * - If not, we'll configure the table with a simple heuristic: we are willing
2520  *   to spend at most 2% of the time transitioning between power states.
2521  *   Therefore, when running in any given state, we will enter the next
2522  *   lower-power non-operational state after waiting 50 * (enlat + exlat)
2523  *   microseconds, as long as that state's exit latency is under the requested
2524  *   maximum latency.
2525  *
2526  * We will not autonomously enter any non-operational state for which the total
2527  * latency exceeds ps_max_latency_us.
2528  *
2529  * Users can set ps_max_latency_us to zero to turn off APST.
2530  */
2531 static int nvme_configure_apst(struct nvme_ctrl *ctrl)
2532 {
2533 	struct nvme_feat_auto_pst *table;
2534 	unsigned apste = 0;
2535 	u64 max_lat_us = 0;
2536 	__le64 target = 0;
2537 	int max_ps = -1;
2538 	int state;
2539 	int ret;
2540 	unsigned last_lt_index = UINT_MAX;
2541 
2542 	/*
2543 	 * If APST isn't supported or if we haven't been initialized yet,
2544 	 * then don't do anything.
2545 	 */
2546 	if (!ctrl->apsta)
2547 		return 0;
2548 
2549 	if (ctrl->npss > 31) {
2550 		dev_warn(ctrl->device, "NPSS is invalid; not using APST\n");
2551 		return 0;
2552 	}
2553 
2554 	table = kzalloc(sizeof(*table), GFP_KERNEL);
2555 	if (!table)
2556 		return 0;
2557 
2558 	if (!ctrl->apst_enabled || ctrl->ps_max_latency_us == 0) {
2559 		/* Turn off APST. */
2560 		dev_dbg(ctrl->device, "APST disabled\n");
2561 		goto done;
2562 	}
2563 
2564 	/*
2565 	 * Walk through all states from lowest- to highest-power.
2566 	 * According to the spec, lower-numbered states use more power.  NPSS,
2567 	 * despite the name, is the index of the lowest-power state, not the
2568 	 * number of states.
2569 	 */
2570 	for (state = (int)ctrl->npss; state >= 0; state--) {
2571 		u64 total_latency_us, exit_latency_us, transition_ms;
2572 
2573 		if (target)
2574 			table->entries[state] = target;
2575 
2576 		/*
2577 		 * Don't allow transitions to the deepest state if it's quirked
2578 		 * off.
2579 		 */
2580 		if (state == ctrl->npss &&
2581 		    (ctrl->quirks & NVME_QUIRK_NO_DEEPEST_PS))
2582 			continue;
2583 
2584 		/*
2585 		 * Is this state a useful non-operational state for higher-power
2586 		 * states to autonomously transition to?
2587 		 */
2588 		if (!(ctrl->psd[state].flags & NVME_PS_FLAGS_NON_OP_STATE))
2589 			continue;
2590 
2591 		exit_latency_us = (u64)le32_to_cpu(ctrl->psd[state].exit_lat);
2592 		if (exit_latency_us > ctrl->ps_max_latency_us)
2593 			continue;
2594 
2595 		total_latency_us = exit_latency_us +
2596 			le32_to_cpu(ctrl->psd[state].entry_lat);
2597 
2598 		/*
2599 		 * This state is good. It can be used as the APST idle target
2600 		 * for higher power states.
2601 		 */
2602 		if (apst_primary_timeout_ms && apst_primary_latency_tol_us) {
2603 			if (!nvme_apst_get_transition_time(total_latency_us,
2604 					&transition_ms, &last_lt_index))
2605 				continue;
2606 		} else {
2607 			transition_ms = total_latency_us + 19;
2608 			do_div(transition_ms, 20);
2609 			if (transition_ms > (1 << 24) - 1)
2610 				transition_ms = (1 << 24) - 1;
2611 		}
2612 
2613 		target = cpu_to_le64((state << 3) | (transition_ms << 8));
2614 		if (max_ps == -1)
2615 			max_ps = state;
2616 		if (total_latency_us > max_lat_us)
2617 			max_lat_us = total_latency_us;
2618 	}
2619 
2620 	if (max_ps == -1)
2621 		dev_dbg(ctrl->device, "APST enabled but no non-operational states are available\n");
2622 	else
2623 		dev_dbg(ctrl->device, "APST enabled: max PS = %d, max round-trip latency = %lluus, table = %*phN\n",
2624 			max_ps, max_lat_us, (int)sizeof(*table), table);
2625 	apste = 1;
2626 
2627 done:
2628 	ret = nvme_set_features(ctrl, NVME_FEAT_AUTO_PST, apste,
2629 				table, sizeof(*table), NULL);
2630 	if (ret)
2631 		dev_err(ctrl->device, "failed to set APST feature (%d)\n", ret);
2632 	kfree(table);
2633 	return ret;
2634 }
2635 
2636 static void nvme_set_latency_tolerance(struct device *dev, s32 val)
2637 {
2638 	struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
2639 	u64 latency;
2640 
2641 	switch (val) {
2642 	case PM_QOS_LATENCY_TOLERANCE_NO_CONSTRAINT:
2643 	case PM_QOS_LATENCY_ANY:
2644 		latency = U64_MAX;
2645 		break;
2646 
2647 	default:
2648 		latency = val;
2649 	}
2650 
2651 	if (ctrl->ps_max_latency_us != latency) {
2652 		ctrl->ps_max_latency_us = latency;
2653 		if (ctrl->state == NVME_CTRL_LIVE)
2654 			nvme_configure_apst(ctrl);
2655 	}
2656 }
2657 
2658 struct nvme_core_quirk_entry {
2659 	/*
2660 	 * NVMe model and firmware strings are padded with spaces.  For
2661 	 * simplicity, strings in the quirk table are padded with NULLs
2662 	 * instead.
2663 	 */
2664 	u16 vid;
2665 	const char *mn;
2666 	const char *fr;
2667 	unsigned long quirks;
2668 };
2669 
2670 static const struct nvme_core_quirk_entry core_quirks[] = {
2671 	{
2672 		/*
2673 		 * This Toshiba device seems to die using any APST states.  See:
2674 		 * https://bugs.launchpad.net/ubuntu/+source/linux/+bug/1678184/comments/11
2675 		 */
2676 		.vid = 0x1179,
2677 		.mn = "THNSF5256GPUK TOSHIBA",
2678 		.quirks = NVME_QUIRK_NO_APST,
2679 	},
2680 	{
2681 		/*
2682 		 * This LiteON CL1-3D*-Q11 firmware version has a race
2683 		 * condition associated with actions related to suspend to idle
2684 		 * LiteON has resolved the problem in future firmware
2685 		 */
2686 		.vid = 0x14a4,
2687 		.fr = "22301111",
2688 		.quirks = NVME_QUIRK_SIMPLE_SUSPEND,
2689 	},
2690 	{
2691 		/*
2692 		 * This Kioxia CD6-V Series / HPE PE8030 device times out and
2693 		 * aborts I/O during any load, but more easily reproducible
2694 		 * with discards (fstrim).
2695 		 *
2696 		 * The device is left in a state where it is also not possible
2697 		 * to use "nvme set-feature" to disable APST, but booting with
2698 		 * nvme_core.default_ps_max_latency=0 works.
2699 		 */
2700 		.vid = 0x1e0f,
2701 		.mn = "KCD6XVUL6T40",
2702 		.quirks = NVME_QUIRK_NO_APST,
2703 	},
2704 	{
2705 		/*
2706 		 * The external Samsung X5 SSD fails initialization without a
2707 		 * delay before checking if it is ready and has a whole set of
2708 		 * other problems.  To make this even more interesting, it
2709 		 * shares the PCI ID with internal Samsung 970 Evo Plus that
2710 		 * does not need or want these quirks.
2711 		 */
2712 		.vid = 0x144d,
2713 		.mn = "Samsung Portable SSD X5",
2714 		.quirks = NVME_QUIRK_DELAY_BEFORE_CHK_RDY |
2715 			  NVME_QUIRK_NO_DEEPEST_PS |
2716 			  NVME_QUIRK_IGNORE_DEV_SUBNQN,
2717 	}
2718 };
2719 
2720 /* match is null-terminated but idstr is space-padded. */
2721 static bool string_matches(const char *idstr, const char *match, size_t len)
2722 {
2723 	size_t matchlen;
2724 
2725 	if (!match)
2726 		return true;
2727 
2728 	matchlen = strlen(match);
2729 	WARN_ON_ONCE(matchlen > len);
2730 
2731 	if (memcmp(idstr, match, matchlen))
2732 		return false;
2733 
2734 	for (; matchlen < len; matchlen++)
2735 		if (idstr[matchlen] != ' ')
2736 			return false;
2737 
2738 	return true;
2739 }
2740 
2741 static bool quirk_matches(const struct nvme_id_ctrl *id,
2742 			  const struct nvme_core_quirk_entry *q)
2743 {
2744 	return q->vid == le16_to_cpu(id->vid) &&
2745 		string_matches(id->mn, q->mn, sizeof(id->mn)) &&
2746 		string_matches(id->fr, q->fr, sizeof(id->fr));
2747 }
2748 
2749 static void nvme_init_subnqn(struct nvme_subsystem *subsys, struct nvme_ctrl *ctrl,
2750 		struct nvme_id_ctrl *id)
2751 {
2752 	size_t nqnlen;
2753 	int off;
2754 
2755 	if(!(ctrl->quirks & NVME_QUIRK_IGNORE_DEV_SUBNQN)) {
2756 		nqnlen = strnlen(id->subnqn, NVMF_NQN_SIZE);
2757 		if (nqnlen > 0 && nqnlen < NVMF_NQN_SIZE) {
2758 			strscpy(subsys->subnqn, id->subnqn, NVMF_NQN_SIZE);
2759 			return;
2760 		}
2761 
2762 		if (ctrl->vs >= NVME_VS(1, 2, 1))
2763 			dev_warn(ctrl->device, "missing or invalid SUBNQN field.\n");
2764 	}
2765 
2766 	/*
2767 	 * Generate a "fake" NQN similar to the one in Section 4.5 of the NVMe
2768 	 * Base Specification 2.0.  It is slightly different from the format
2769 	 * specified there due to historic reasons, and we can't change it now.
2770 	 */
2771 	off = snprintf(subsys->subnqn, NVMF_NQN_SIZE,
2772 			"nqn.2014.08.org.nvmexpress:%04x%04x",
2773 			le16_to_cpu(id->vid), le16_to_cpu(id->ssvid));
2774 	memcpy(subsys->subnqn + off, id->sn, sizeof(id->sn));
2775 	off += sizeof(id->sn);
2776 	memcpy(subsys->subnqn + off, id->mn, sizeof(id->mn));
2777 	off += sizeof(id->mn);
2778 	memset(subsys->subnqn + off, 0, sizeof(subsys->subnqn) - off);
2779 }
2780 
2781 static void nvme_release_subsystem(struct device *dev)
2782 {
2783 	struct nvme_subsystem *subsys =
2784 		container_of(dev, struct nvme_subsystem, dev);
2785 
2786 	if (subsys->instance >= 0)
2787 		ida_free(&nvme_instance_ida, subsys->instance);
2788 	kfree(subsys);
2789 }
2790 
2791 static void nvme_destroy_subsystem(struct kref *ref)
2792 {
2793 	struct nvme_subsystem *subsys =
2794 			container_of(ref, struct nvme_subsystem, ref);
2795 
2796 	mutex_lock(&nvme_subsystems_lock);
2797 	list_del(&subsys->entry);
2798 	mutex_unlock(&nvme_subsystems_lock);
2799 
2800 	ida_destroy(&subsys->ns_ida);
2801 	device_del(&subsys->dev);
2802 	put_device(&subsys->dev);
2803 }
2804 
2805 static void nvme_put_subsystem(struct nvme_subsystem *subsys)
2806 {
2807 	kref_put(&subsys->ref, nvme_destroy_subsystem);
2808 }
2809 
2810 static struct nvme_subsystem *__nvme_find_get_subsystem(const char *subsysnqn)
2811 {
2812 	struct nvme_subsystem *subsys;
2813 
2814 	lockdep_assert_held(&nvme_subsystems_lock);
2815 
2816 	/*
2817 	 * Fail matches for discovery subsystems. This results
2818 	 * in each discovery controller bound to a unique subsystem.
2819 	 * This avoids issues with validating controller values
2820 	 * that can only be true when there is a single unique subsystem.
2821 	 * There may be multiple and completely independent entities
2822 	 * that provide discovery controllers.
2823 	 */
2824 	if (!strcmp(subsysnqn, NVME_DISC_SUBSYS_NAME))
2825 		return NULL;
2826 
2827 	list_for_each_entry(subsys, &nvme_subsystems, entry) {
2828 		if (strcmp(subsys->subnqn, subsysnqn))
2829 			continue;
2830 		if (!kref_get_unless_zero(&subsys->ref))
2831 			continue;
2832 		return subsys;
2833 	}
2834 
2835 	return NULL;
2836 }
2837 
2838 #define SUBSYS_ATTR_RO(_name, _mode, _show)			\
2839 	struct device_attribute subsys_attr_##_name = \
2840 		__ATTR(_name, _mode, _show, NULL)
2841 
2842 static ssize_t nvme_subsys_show_nqn(struct device *dev,
2843 				    struct device_attribute *attr,
2844 				    char *buf)
2845 {
2846 	struct nvme_subsystem *subsys =
2847 		container_of(dev, struct nvme_subsystem, dev);
2848 
2849 	return sysfs_emit(buf, "%s\n", subsys->subnqn);
2850 }
2851 static SUBSYS_ATTR_RO(subsysnqn, S_IRUGO, nvme_subsys_show_nqn);
2852 
2853 static ssize_t nvme_subsys_show_type(struct device *dev,
2854 				    struct device_attribute *attr,
2855 				    char *buf)
2856 {
2857 	struct nvme_subsystem *subsys =
2858 		container_of(dev, struct nvme_subsystem, dev);
2859 
2860 	switch (subsys->subtype) {
2861 	case NVME_NQN_DISC:
2862 		return sysfs_emit(buf, "discovery\n");
2863 	case NVME_NQN_NVME:
2864 		return sysfs_emit(buf, "nvm\n");
2865 	default:
2866 		return sysfs_emit(buf, "reserved\n");
2867 	}
2868 }
2869 static SUBSYS_ATTR_RO(subsystype, S_IRUGO, nvme_subsys_show_type);
2870 
2871 #define nvme_subsys_show_str_function(field)				\
2872 static ssize_t subsys_##field##_show(struct device *dev,		\
2873 			    struct device_attribute *attr, char *buf)	\
2874 {									\
2875 	struct nvme_subsystem *subsys =					\
2876 		container_of(dev, struct nvme_subsystem, dev);		\
2877 	return sysfs_emit(buf, "%.*s\n",				\
2878 			   (int)sizeof(subsys->field), subsys->field);	\
2879 }									\
2880 static SUBSYS_ATTR_RO(field, S_IRUGO, subsys_##field##_show);
2881 
2882 nvme_subsys_show_str_function(model);
2883 nvme_subsys_show_str_function(serial);
2884 nvme_subsys_show_str_function(firmware_rev);
2885 
2886 static struct attribute *nvme_subsys_attrs[] = {
2887 	&subsys_attr_model.attr,
2888 	&subsys_attr_serial.attr,
2889 	&subsys_attr_firmware_rev.attr,
2890 	&subsys_attr_subsysnqn.attr,
2891 	&subsys_attr_subsystype.attr,
2892 #ifdef CONFIG_NVME_MULTIPATH
2893 	&subsys_attr_iopolicy.attr,
2894 #endif
2895 	NULL,
2896 };
2897 
2898 static const struct attribute_group nvme_subsys_attrs_group = {
2899 	.attrs = nvme_subsys_attrs,
2900 };
2901 
2902 static const struct attribute_group *nvme_subsys_attrs_groups[] = {
2903 	&nvme_subsys_attrs_group,
2904 	NULL,
2905 };
2906 
2907 static inline bool nvme_discovery_ctrl(struct nvme_ctrl *ctrl)
2908 {
2909 	return ctrl->opts && ctrl->opts->discovery_nqn;
2910 }
2911 
2912 static bool nvme_validate_cntlid(struct nvme_subsystem *subsys,
2913 		struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id)
2914 {
2915 	struct nvme_ctrl *tmp;
2916 
2917 	lockdep_assert_held(&nvme_subsystems_lock);
2918 
2919 	list_for_each_entry(tmp, &subsys->ctrls, subsys_entry) {
2920 		if (nvme_state_terminal(tmp))
2921 			continue;
2922 
2923 		if (tmp->cntlid == ctrl->cntlid) {
2924 			dev_err(ctrl->device,
2925 				"Duplicate cntlid %u with %s, subsys %s, rejecting\n",
2926 				ctrl->cntlid, dev_name(tmp->device),
2927 				subsys->subnqn);
2928 			return false;
2929 		}
2930 
2931 		if ((id->cmic & NVME_CTRL_CMIC_MULTI_CTRL) ||
2932 		    nvme_discovery_ctrl(ctrl))
2933 			continue;
2934 
2935 		dev_err(ctrl->device,
2936 			"Subsystem does not support multiple controllers\n");
2937 		return false;
2938 	}
2939 
2940 	return true;
2941 }
2942 
2943 static int nvme_init_subsystem(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id)
2944 {
2945 	struct nvme_subsystem *subsys, *found;
2946 	int ret;
2947 
2948 	subsys = kzalloc(sizeof(*subsys), GFP_KERNEL);
2949 	if (!subsys)
2950 		return -ENOMEM;
2951 
2952 	subsys->instance = -1;
2953 	mutex_init(&subsys->lock);
2954 	kref_init(&subsys->ref);
2955 	INIT_LIST_HEAD(&subsys->ctrls);
2956 	INIT_LIST_HEAD(&subsys->nsheads);
2957 	nvme_init_subnqn(subsys, ctrl, id);
2958 	memcpy(subsys->serial, id->sn, sizeof(subsys->serial));
2959 	memcpy(subsys->model, id->mn, sizeof(subsys->model));
2960 	subsys->vendor_id = le16_to_cpu(id->vid);
2961 	subsys->cmic = id->cmic;
2962 
2963 	/* Versions prior to 1.4 don't necessarily report a valid type */
2964 	if (id->cntrltype == NVME_CTRL_DISC ||
2965 	    !strcmp(subsys->subnqn, NVME_DISC_SUBSYS_NAME))
2966 		subsys->subtype = NVME_NQN_DISC;
2967 	else
2968 		subsys->subtype = NVME_NQN_NVME;
2969 
2970 	if (nvme_discovery_ctrl(ctrl) && subsys->subtype != NVME_NQN_DISC) {
2971 		dev_err(ctrl->device,
2972 			"Subsystem %s is not a discovery controller",
2973 			subsys->subnqn);
2974 		kfree(subsys);
2975 		return -EINVAL;
2976 	}
2977 	subsys->awupf = le16_to_cpu(id->awupf);
2978 	nvme_mpath_default_iopolicy(subsys);
2979 
2980 	subsys->dev.class = nvme_subsys_class;
2981 	subsys->dev.release = nvme_release_subsystem;
2982 	subsys->dev.groups = nvme_subsys_attrs_groups;
2983 	dev_set_name(&subsys->dev, "nvme-subsys%d", ctrl->instance);
2984 	device_initialize(&subsys->dev);
2985 
2986 	mutex_lock(&nvme_subsystems_lock);
2987 	found = __nvme_find_get_subsystem(subsys->subnqn);
2988 	if (found) {
2989 		put_device(&subsys->dev);
2990 		subsys = found;
2991 
2992 		if (!nvme_validate_cntlid(subsys, ctrl, id)) {
2993 			ret = -EINVAL;
2994 			goto out_put_subsystem;
2995 		}
2996 	} else {
2997 		ret = device_add(&subsys->dev);
2998 		if (ret) {
2999 			dev_err(ctrl->device,
3000 				"failed to register subsystem device.\n");
3001 			put_device(&subsys->dev);
3002 			goto out_unlock;
3003 		}
3004 		ida_init(&subsys->ns_ida);
3005 		list_add_tail(&subsys->entry, &nvme_subsystems);
3006 	}
3007 
3008 	ret = sysfs_create_link(&subsys->dev.kobj, &ctrl->device->kobj,
3009 				dev_name(ctrl->device));
3010 	if (ret) {
3011 		dev_err(ctrl->device,
3012 			"failed to create sysfs link from subsystem.\n");
3013 		goto out_put_subsystem;
3014 	}
3015 
3016 	if (!found)
3017 		subsys->instance = ctrl->instance;
3018 	ctrl->subsys = subsys;
3019 	list_add_tail(&ctrl->subsys_entry, &subsys->ctrls);
3020 	mutex_unlock(&nvme_subsystems_lock);
3021 	return 0;
3022 
3023 out_put_subsystem:
3024 	nvme_put_subsystem(subsys);
3025 out_unlock:
3026 	mutex_unlock(&nvme_subsystems_lock);
3027 	return ret;
3028 }
3029 
3030 int nvme_get_log(struct nvme_ctrl *ctrl, u32 nsid, u8 log_page, u8 lsp, u8 csi,
3031 		void *log, size_t size, u64 offset)
3032 {
3033 	struct nvme_command c = { };
3034 	u32 dwlen = nvme_bytes_to_numd(size);
3035 
3036 	c.get_log_page.opcode = nvme_admin_get_log_page;
3037 	c.get_log_page.nsid = cpu_to_le32(nsid);
3038 	c.get_log_page.lid = log_page;
3039 	c.get_log_page.lsp = lsp;
3040 	c.get_log_page.numdl = cpu_to_le16(dwlen & ((1 << 16) - 1));
3041 	c.get_log_page.numdu = cpu_to_le16(dwlen >> 16);
3042 	c.get_log_page.lpol = cpu_to_le32(lower_32_bits(offset));
3043 	c.get_log_page.lpou = cpu_to_le32(upper_32_bits(offset));
3044 	c.get_log_page.csi = csi;
3045 
3046 	return nvme_submit_sync_cmd(ctrl->admin_q, &c, log, size);
3047 }
3048 
3049 static int nvme_get_effects_log(struct nvme_ctrl *ctrl, u8 csi,
3050 				struct nvme_effects_log **log)
3051 {
3052 	struct nvme_effects_log	*cel = xa_load(&ctrl->cels, csi);
3053 	int ret;
3054 
3055 	if (cel)
3056 		goto out;
3057 
3058 	cel = kzalloc(sizeof(*cel), GFP_KERNEL);
3059 	if (!cel)
3060 		return -ENOMEM;
3061 
3062 	ret = nvme_get_log(ctrl, 0x00, NVME_LOG_CMD_EFFECTS, 0, csi,
3063 			cel, sizeof(*cel), 0);
3064 	if (ret) {
3065 		kfree(cel);
3066 		return ret;
3067 	}
3068 
3069 	xa_store(&ctrl->cels, csi, cel, GFP_KERNEL);
3070 out:
3071 	*log = cel;
3072 	return 0;
3073 }
3074 
3075 static inline u32 nvme_mps_to_sectors(struct nvme_ctrl *ctrl, u32 units)
3076 {
3077 	u32 page_shift = NVME_CAP_MPSMIN(ctrl->cap) + 12, val;
3078 
3079 	if (check_shl_overflow(1U, units + page_shift - 9, &val))
3080 		return UINT_MAX;
3081 	return val;
3082 }
3083 
3084 static int nvme_init_non_mdts_limits(struct nvme_ctrl *ctrl)
3085 {
3086 	struct nvme_command c = { };
3087 	struct nvme_id_ctrl_nvm *id;
3088 	int ret;
3089 
3090 	if (ctrl->oncs & NVME_CTRL_ONCS_DSM) {
3091 		ctrl->max_discard_sectors = UINT_MAX;
3092 		ctrl->max_discard_segments = NVME_DSM_MAX_RANGES;
3093 	} else {
3094 		ctrl->max_discard_sectors = 0;
3095 		ctrl->max_discard_segments = 0;
3096 	}
3097 
3098 	/*
3099 	 * Even though NVMe spec explicitly states that MDTS is not applicable
3100 	 * to the write-zeroes, we are cautious and limit the size to the
3101 	 * controllers max_hw_sectors value, which is based on the MDTS field
3102 	 * and possibly other limiting factors.
3103 	 */
3104 	if ((ctrl->oncs & NVME_CTRL_ONCS_WRITE_ZEROES) &&
3105 	    !(ctrl->quirks & NVME_QUIRK_DISABLE_WRITE_ZEROES))
3106 		ctrl->max_zeroes_sectors = ctrl->max_hw_sectors;
3107 	else
3108 		ctrl->max_zeroes_sectors = 0;
3109 
3110 	if (ctrl->subsys->subtype != NVME_NQN_NVME ||
3111 	    nvme_ctrl_limited_cns(ctrl))
3112 		return 0;
3113 
3114 	id = kzalloc(sizeof(*id), GFP_KERNEL);
3115 	if (!id)
3116 		return -ENOMEM;
3117 
3118 	c.identify.opcode = nvme_admin_identify;
3119 	c.identify.cns = NVME_ID_CNS_CS_CTRL;
3120 	c.identify.csi = NVME_CSI_NVM;
3121 
3122 	ret = nvme_submit_sync_cmd(ctrl->admin_q, &c, id, sizeof(*id));
3123 	if (ret)
3124 		goto free_data;
3125 
3126 	if (id->dmrl)
3127 		ctrl->max_discard_segments = id->dmrl;
3128 	ctrl->dmrsl = le32_to_cpu(id->dmrsl);
3129 	if (id->wzsl)
3130 		ctrl->max_zeroes_sectors = nvme_mps_to_sectors(ctrl, id->wzsl);
3131 
3132 free_data:
3133 	kfree(id);
3134 	return ret;
3135 }
3136 
3137 static void nvme_init_known_nvm_effects(struct nvme_ctrl *ctrl)
3138 {
3139 	struct nvme_effects_log	*log = ctrl->effects;
3140 
3141 	log->acs[nvme_admin_format_nvm] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC |
3142 						NVME_CMD_EFFECTS_NCC |
3143 						NVME_CMD_EFFECTS_CSE_MASK);
3144 	log->acs[nvme_admin_sanitize_nvm] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC |
3145 						NVME_CMD_EFFECTS_CSE_MASK);
3146 
3147 	/*
3148 	 * The spec says the result of a security receive command depends on
3149 	 * the previous security send command. As such, many vendors log this
3150 	 * command as one to submitted only when no other commands to the same
3151 	 * namespace are outstanding. The intention is to tell the host to
3152 	 * prevent mixing security send and receive.
3153 	 *
3154 	 * This driver can only enforce such exclusive access against IO
3155 	 * queues, though. We are not readily able to enforce such a rule for
3156 	 * two commands to the admin queue, which is the only queue that
3157 	 * matters for this command.
3158 	 *
3159 	 * Rather than blindly freezing the IO queues for this effect that
3160 	 * doesn't even apply to IO, mask it off.
3161 	 */
3162 	log->acs[nvme_admin_security_recv] &= cpu_to_le32(~NVME_CMD_EFFECTS_CSE_MASK);
3163 
3164 	log->iocs[nvme_cmd_write] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC);
3165 	log->iocs[nvme_cmd_write_zeroes] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC);
3166 	log->iocs[nvme_cmd_write_uncor] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC);
3167 }
3168 
3169 static int nvme_init_effects(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id)
3170 {
3171 	int ret = 0;
3172 
3173 	if (ctrl->effects)
3174 		return 0;
3175 
3176 	if (id->lpa & NVME_CTRL_LPA_CMD_EFFECTS_LOG) {
3177 		ret = nvme_get_effects_log(ctrl, NVME_CSI_NVM, &ctrl->effects);
3178 		if (ret < 0)
3179 			return ret;
3180 	}
3181 
3182 	if (!ctrl->effects) {
3183 		ctrl->effects = kzalloc(sizeof(*ctrl->effects), GFP_KERNEL);
3184 		if (!ctrl->effects)
3185 			return -ENOMEM;
3186 		xa_store(&ctrl->cels, NVME_CSI_NVM, ctrl->effects, GFP_KERNEL);
3187 	}
3188 
3189 	nvme_init_known_nvm_effects(ctrl);
3190 	return 0;
3191 }
3192 
3193 static int nvme_init_identify(struct nvme_ctrl *ctrl)
3194 {
3195 	struct nvme_id_ctrl *id;
3196 	u32 max_hw_sectors;
3197 	bool prev_apst_enabled;
3198 	int ret;
3199 
3200 	ret = nvme_identify_ctrl(ctrl, &id);
3201 	if (ret) {
3202 		dev_err(ctrl->device, "Identify Controller failed (%d)\n", ret);
3203 		return -EIO;
3204 	}
3205 
3206 	if (!(ctrl->ops->flags & NVME_F_FABRICS))
3207 		ctrl->cntlid = le16_to_cpu(id->cntlid);
3208 
3209 	if (!ctrl->identified) {
3210 		unsigned int i;
3211 
3212 		/*
3213 		 * Check for quirks.  Quirk can depend on firmware version,
3214 		 * so, in principle, the set of quirks present can change
3215 		 * across a reset.  As a possible future enhancement, we
3216 		 * could re-scan for quirks every time we reinitialize
3217 		 * the device, but we'd have to make sure that the driver
3218 		 * behaves intelligently if the quirks change.
3219 		 */
3220 		for (i = 0; i < ARRAY_SIZE(core_quirks); i++) {
3221 			if (quirk_matches(id, &core_quirks[i]))
3222 				ctrl->quirks |= core_quirks[i].quirks;
3223 		}
3224 
3225 		ret = nvme_init_subsystem(ctrl, id);
3226 		if (ret)
3227 			goto out_free;
3228 
3229 		ret = nvme_init_effects(ctrl, id);
3230 		if (ret)
3231 			goto out_free;
3232 	}
3233 	memcpy(ctrl->subsys->firmware_rev, id->fr,
3234 	       sizeof(ctrl->subsys->firmware_rev));
3235 
3236 	if (force_apst && (ctrl->quirks & NVME_QUIRK_NO_DEEPEST_PS)) {
3237 		dev_warn(ctrl->device, "forcibly allowing all power states due to nvme_core.force_apst -- use at your own risk\n");
3238 		ctrl->quirks &= ~NVME_QUIRK_NO_DEEPEST_PS;
3239 	}
3240 
3241 	ctrl->crdt[0] = le16_to_cpu(id->crdt1);
3242 	ctrl->crdt[1] = le16_to_cpu(id->crdt2);
3243 	ctrl->crdt[2] = le16_to_cpu(id->crdt3);
3244 
3245 	ctrl->oacs = le16_to_cpu(id->oacs);
3246 	ctrl->oncs = le16_to_cpu(id->oncs);
3247 	ctrl->mtfa = le16_to_cpu(id->mtfa);
3248 	ctrl->oaes = le32_to_cpu(id->oaes);
3249 	ctrl->wctemp = le16_to_cpu(id->wctemp);
3250 	ctrl->cctemp = le16_to_cpu(id->cctemp);
3251 
3252 	atomic_set(&ctrl->abort_limit, id->acl + 1);
3253 	ctrl->vwc = id->vwc;
3254 	if (id->mdts)
3255 		max_hw_sectors = nvme_mps_to_sectors(ctrl, id->mdts);
3256 	else
3257 		max_hw_sectors = UINT_MAX;
3258 	ctrl->max_hw_sectors =
3259 		min_not_zero(ctrl->max_hw_sectors, max_hw_sectors);
3260 
3261 	nvme_set_queue_limits(ctrl, ctrl->admin_q);
3262 	ctrl->sgls = le32_to_cpu(id->sgls);
3263 	ctrl->kas = le16_to_cpu(id->kas);
3264 	ctrl->max_namespaces = le32_to_cpu(id->mnan);
3265 	ctrl->ctratt = le32_to_cpu(id->ctratt);
3266 
3267 	ctrl->cntrltype = id->cntrltype;
3268 	ctrl->dctype = id->dctype;
3269 
3270 	if (id->rtd3e) {
3271 		/* us -> s */
3272 		u32 transition_time = le32_to_cpu(id->rtd3e) / USEC_PER_SEC;
3273 
3274 		ctrl->shutdown_timeout = clamp_t(unsigned int, transition_time,
3275 						 shutdown_timeout, 60);
3276 
3277 		if (ctrl->shutdown_timeout != shutdown_timeout)
3278 			dev_info(ctrl->device,
3279 				 "Shutdown timeout set to %u seconds\n",
3280 				 ctrl->shutdown_timeout);
3281 	} else
3282 		ctrl->shutdown_timeout = shutdown_timeout;
3283 
3284 	ctrl->npss = id->npss;
3285 	ctrl->apsta = id->apsta;
3286 	prev_apst_enabled = ctrl->apst_enabled;
3287 	if (ctrl->quirks & NVME_QUIRK_NO_APST) {
3288 		if (force_apst && id->apsta) {
3289 			dev_warn(ctrl->device, "forcibly allowing APST due to nvme_core.force_apst -- use at your own risk\n");
3290 			ctrl->apst_enabled = true;
3291 		} else {
3292 			ctrl->apst_enabled = false;
3293 		}
3294 	} else {
3295 		ctrl->apst_enabled = id->apsta;
3296 	}
3297 	memcpy(ctrl->psd, id->psd, sizeof(ctrl->psd));
3298 
3299 	if (ctrl->ops->flags & NVME_F_FABRICS) {
3300 		ctrl->icdoff = le16_to_cpu(id->icdoff);
3301 		ctrl->ioccsz = le32_to_cpu(id->ioccsz);
3302 		ctrl->iorcsz = le32_to_cpu(id->iorcsz);
3303 		ctrl->maxcmd = le16_to_cpu(id->maxcmd);
3304 
3305 		/*
3306 		 * In fabrics we need to verify the cntlid matches the
3307 		 * admin connect
3308 		 */
3309 		if (ctrl->cntlid != le16_to_cpu(id->cntlid)) {
3310 			dev_err(ctrl->device,
3311 				"Mismatching cntlid: Connect %u vs Identify "
3312 				"%u, rejecting\n",
3313 				ctrl->cntlid, le16_to_cpu(id->cntlid));
3314 			ret = -EINVAL;
3315 			goto out_free;
3316 		}
3317 
3318 		if (!nvme_discovery_ctrl(ctrl) && !ctrl->kas) {
3319 			dev_err(ctrl->device,
3320 				"keep-alive support is mandatory for fabrics\n");
3321 			ret = -EINVAL;
3322 			goto out_free;
3323 		}
3324 	} else {
3325 		ctrl->hmpre = le32_to_cpu(id->hmpre);
3326 		ctrl->hmmin = le32_to_cpu(id->hmmin);
3327 		ctrl->hmminds = le32_to_cpu(id->hmminds);
3328 		ctrl->hmmaxd = le16_to_cpu(id->hmmaxd);
3329 	}
3330 
3331 	ret = nvme_mpath_init_identify(ctrl, id);
3332 	if (ret < 0)
3333 		goto out_free;
3334 
3335 	if (ctrl->apst_enabled && !prev_apst_enabled)
3336 		dev_pm_qos_expose_latency_tolerance(ctrl->device);
3337 	else if (!ctrl->apst_enabled && prev_apst_enabled)
3338 		dev_pm_qos_hide_latency_tolerance(ctrl->device);
3339 
3340 out_free:
3341 	kfree(id);
3342 	return ret;
3343 }
3344 
3345 /*
3346  * Initialize the cached copies of the Identify data and various controller
3347  * register in our nvme_ctrl structure.  This should be called as soon as
3348  * the admin queue is fully up and running.
3349  */
3350 int nvme_init_ctrl_finish(struct nvme_ctrl *ctrl, bool was_suspended)
3351 {
3352 	int ret;
3353 
3354 	ret = ctrl->ops->reg_read32(ctrl, NVME_REG_VS, &ctrl->vs);
3355 	if (ret) {
3356 		dev_err(ctrl->device, "Reading VS failed (%d)\n", ret);
3357 		return ret;
3358 	}
3359 
3360 	ctrl->sqsize = min_t(u16, NVME_CAP_MQES(ctrl->cap), ctrl->sqsize);
3361 
3362 	if (ctrl->vs >= NVME_VS(1, 1, 0))
3363 		ctrl->subsystem = NVME_CAP_NSSRC(ctrl->cap);
3364 
3365 	ret = nvme_init_identify(ctrl);
3366 	if (ret)
3367 		return ret;
3368 
3369 	ret = nvme_configure_apst(ctrl);
3370 	if (ret < 0)
3371 		return ret;
3372 
3373 	ret = nvme_configure_timestamp(ctrl);
3374 	if (ret < 0)
3375 		return ret;
3376 
3377 	ret = nvme_configure_host_options(ctrl);
3378 	if (ret < 0)
3379 		return ret;
3380 
3381 	nvme_configure_opal(ctrl, was_suspended);
3382 
3383 	if (!ctrl->identified && !nvme_discovery_ctrl(ctrl)) {
3384 		/*
3385 		 * Do not return errors unless we are in a controller reset,
3386 		 * the controller works perfectly fine without hwmon.
3387 		 */
3388 		ret = nvme_hwmon_init(ctrl);
3389 		if (ret == -EINTR)
3390 			return ret;
3391 	}
3392 
3393 	ctrl->identified = true;
3394 
3395 	return 0;
3396 }
3397 EXPORT_SYMBOL_GPL(nvme_init_ctrl_finish);
3398 
3399 static int nvme_dev_open(struct inode *inode, struct file *file)
3400 {
3401 	struct nvme_ctrl *ctrl =
3402 		container_of(inode->i_cdev, struct nvme_ctrl, cdev);
3403 
3404 	switch (ctrl->state) {
3405 	case NVME_CTRL_LIVE:
3406 		break;
3407 	default:
3408 		return -EWOULDBLOCK;
3409 	}
3410 
3411 	nvme_get_ctrl(ctrl);
3412 	if (!try_module_get(ctrl->ops->module)) {
3413 		nvme_put_ctrl(ctrl);
3414 		return -EINVAL;
3415 	}
3416 
3417 	file->private_data = ctrl;
3418 	return 0;
3419 }
3420 
3421 static int nvme_dev_release(struct inode *inode, struct file *file)
3422 {
3423 	struct nvme_ctrl *ctrl =
3424 		container_of(inode->i_cdev, struct nvme_ctrl, cdev);
3425 
3426 	module_put(ctrl->ops->module);
3427 	nvme_put_ctrl(ctrl);
3428 	return 0;
3429 }
3430 
3431 static const struct file_operations nvme_dev_fops = {
3432 	.owner		= THIS_MODULE,
3433 	.open		= nvme_dev_open,
3434 	.release	= nvme_dev_release,
3435 	.unlocked_ioctl	= nvme_dev_ioctl,
3436 	.compat_ioctl	= compat_ptr_ioctl,
3437 	.uring_cmd	= nvme_dev_uring_cmd,
3438 };
3439 
3440 static ssize_t nvme_sysfs_reset(struct device *dev,
3441 				struct device_attribute *attr, const char *buf,
3442 				size_t count)
3443 {
3444 	struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
3445 	int ret;
3446 
3447 	ret = nvme_reset_ctrl_sync(ctrl);
3448 	if (ret < 0)
3449 		return ret;
3450 	return count;
3451 }
3452 static DEVICE_ATTR(reset_controller, S_IWUSR, NULL, nvme_sysfs_reset);
3453 
3454 static ssize_t nvme_sysfs_rescan(struct device *dev,
3455 				struct device_attribute *attr, const char *buf,
3456 				size_t count)
3457 {
3458 	struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
3459 
3460 	nvme_queue_scan(ctrl);
3461 	return count;
3462 }
3463 static DEVICE_ATTR(rescan_controller, S_IWUSR, NULL, nvme_sysfs_rescan);
3464 
3465 static inline struct nvme_ns_head *dev_to_ns_head(struct device *dev)
3466 {
3467 	struct gendisk *disk = dev_to_disk(dev);
3468 
3469 	if (disk->fops == &nvme_bdev_ops)
3470 		return nvme_get_ns_from_dev(dev)->head;
3471 	else
3472 		return disk->private_data;
3473 }
3474 
3475 static ssize_t wwid_show(struct device *dev, struct device_attribute *attr,
3476 		char *buf)
3477 {
3478 	struct nvme_ns_head *head = dev_to_ns_head(dev);
3479 	struct nvme_ns_ids *ids = &head->ids;
3480 	struct nvme_subsystem *subsys = head->subsys;
3481 	int serial_len = sizeof(subsys->serial);
3482 	int model_len = sizeof(subsys->model);
3483 
3484 	if (!uuid_is_null(&ids->uuid))
3485 		return sysfs_emit(buf, "uuid.%pU\n", &ids->uuid);
3486 
3487 	if (memchr_inv(ids->nguid, 0, sizeof(ids->nguid)))
3488 		return sysfs_emit(buf, "eui.%16phN\n", ids->nguid);
3489 
3490 	if (memchr_inv(ids->eui64, 0, sizeof(ids->eui64)))
3491 		return sysfs_emit(buf, "eui.%8phN\n", ids->eui64);
3492 
3493 	while (serial_len > 0 && (subsys->serial[serial_len - 1] == ' ' ||
3494 				  subsys->serial[serial_len - 1] == '\0'))
3495 		serial_len--;
3496 	while (model_len > 0 && (subsys->model[model_len - 1] == ' ' ||
3497 				 subsys->model[model_len - 1] == '\0'))
3498 		model_len--;
3499 
3500 	return sysfs_emit(buf, "nvme.%04x-%*phN-%*phN-%08x\n", subsys->vendor_id,
3501 		serial_len, subsys->serial, model_len, subsys->model,
3502 		head->ns_id);
3503 }
3504 static DEVICE_ATTR_RO(wwid);
3505 
3506 static ssize_t nguid_show(struct device *dev, struct device_attribute *attr,
3507 		char *buf)
3508 {
3509 	return sysfs_emit(buf, "%pU\n", dev_to_ns_head(dev)->ids.nguid);
3510 }
3511 static DEVICE_ATTR_RO(nguid);
3512 
3513 static ssize_t uuid_show(struct device *dev, struct device_attribute *attr,
3514 		char *buf)
3515 {
3516 	struct nvme_ns_ids *ids = &dev_to_ns_head(dev)->ids;
3517 
3518 	/* For backward compatibility expose the NGUID to userspace if
3519 	 * we have no UUID set
3520 	 */
3521 	if (uuid_is_null(&ids->uuid)) {
3522 		dev_warn_ratelimited(dev,
3523 			"No UUID available providing old NGUID\n");
3524 		return sysfs_emit(buf, "%pU\n", ids->nguid);
3525 	}
3526 	return sysfs_emit(buf, "%pU\n", &ids->uuid);
3527 }
3528 static DEVICE_ATTR_RO(uuid);
3529 
3530 static ssize_t eui_show(struct device *dev, struct device_attribute *attr,
3531 		char *buf)
3532 {
3533 	return sysfs_emit(buf, "%8ph\n", dev_to_ns_head(dev)->ids.eui64);
3534 }
3535 static DEVICE_ATTR_RO(eui);
3536 
3537 static ssize_t nsid_show(struct device *dev, struct device_attribute *attr,
3538 		char *buf)
3539 {
3540 	return sysfs_emit(buf, "%d\n", dev_to_ns_head(dev)->ns_id);
3541 }
3542 static DEVICE_ATTR_RO(nsid);
3543 
3544 static struct attribute *nvme_ns_id_attrs[] = {
3545 	&dev_attr_wwid.attr,
3546 	&dev_attr_uuid.attr,
3547 	&dev_attr_nguid.attr,
3548 	&dev_attr_eui.attr,
3549 	&dev_attr_nsid.attr,
3550 #ifdef CONFIG_NVME_MULTIPATH
3551 	&dev_attr_ana_grpid.attr,
3552 	&dev_attr_ana_state.attr,
3553 #endif
3554 	NULL,
3555 };
3556 
3557 static umode_t nvme_ns_id_attrs_are_visible(struct kobject *kobj,
3558 		struct attribute *a, int n)
3559 {
3560 	struct device *dev = container_of(kobj, struct device, kobj);
3561 	struct nvme_ns_ids *ids = &dev_to_ns_head(dev)->ids;
3562 
3563 	if (a == &dev_attr_uuid.attr) {
3564 		if (uuid_is_null(&ids->uuid) &&
3565 		    !memchr_inv(ids->nguid, 0, sizeof(ids->nguid)))
3566 			return 0;
3567 	}
3568 	if (a == &dev_attr_nguid.attr) {
3569 		if (!memchr_inv(ids->nguid, 0, sizeof(ids->nguid)))
3570 			return 0;
3571 	}
3572 	if (a == &dev_attr_eui.attr) {
3573 		if (!memchr_inv(ids->eui64, 0, sizeof(ids->eui64)))
3574 			return 0;
3575 	}
3576 #ifdef CONFIG_NVME_MULTIPATH
3577 	if (a == &dev_attr_ana_grpid.attr || a == &dev_attr_ana_state.attr) {
3578 		if (dev_to_disk(dev)->fops != &nvme_bdev_ops) /* per-path attr */
3579 			return 0;
3580 		if (!nvme_ctrl_use_ana(nvme_get_ns_from_dev(dev)->ctrl))
3581 			return 0;
3582 	}
3583 #endif
3584 	return a->mode;
3585 }
3586 
3587 static const struct attribute_group nvme_ns_id_attr_group = {
3588 	.attrs		= nvme_ns_id_attrs,
3589 	.is_visible	= nvme_ns_id_attrs_are_visible,
3590 };
3591 
3592 const struct attribute_group *nvme_ns_id_attr_groups[] = {
3593 	&nvme_ns_id_attr_group,
3594 	NULL,
3595 };
3596 
3597 #define nvme_show_str_function(field)						\
3598 static ssize_t  field##_show(struct device *dev,				\
3599 			    struct device_attribute *attr, char *buf)		\
3600 {										\
3601         struct nvme_ctrl *ctrl = dev_get_drvdata(dev);				\
3602         return sysfs_emit(buf, "%.*s\n",					\
3603 		(int)sizeof(ctrl->subsys->field), ctrl->subsys->field);		\
3604 }										\
3605 static DEVICE_ATTR(field, S_IRUGO, field##_show, NULL);
3606 
3607 nvme_show_str_function(model);
3608 nvme_show_str_function(serial);
3609 nvme_show_str_function(firmware_rev);
3610 
3611 #define nvme_show_int_function(field)						\
3612 static ssize_t  field##_show(struct device *dev,				\
3613 			    struct device_attribute *attr, char *buf)		\
3614 {										\
3615         struct nvme_ctrl *ctrl = dev_get_drvdata(dev);				\
3616         return sysfs_emit(buf, "%d\n", ctrl->field);				\
3617 }										\
3618 static DEVICE_ATTR(field, S_IRUGO, field##_show, NULL);
3619 
3620 nvme_show_int_function(cntlid);
3621 nvme_show_int_function(numa_node);
3622 nvme_show_int_function(queue_count);
3623 nvme_show_int_function(sqsize);
3624 nvme_show_int_function(kato);
3625 
3626 static ssize_t nvme_sysfs_delete(struct device *dev,
3627 				struct device_attribute *attr, const char *buf,
3628 				size_t count)
3629 {
3630 	struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
3631 
3632 	if (!test_bit(NVME_CTRL_STARTED_ONCE, &ctrl->flags))
3633 		return -EBUSY;
3634 
3635 	if (device_remove_file_self(dev, attr))
3636 		nvme_delete_ctrl_sync(ctrl);
3637 	return count;
3638 }
3639 static DEVICE_ATTR(delete_controller, S_IWUSR, NULL, nvme_sysfs_delete);
3640 
3641 static ssize_t nvme_sysfs_show_transport(struct device *dev,
3642 					 struct device_attribute *attr,
3643 					 char *buf)
3644 {
3645 	struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
3646 
3647 	return sysfs_emit(buf, "%s\n", ctrl->ops->name);
3648 }
3649 static DEVICE_ATTR(transport, S_IRUGO, nvme_sysfs_show_transport, NULL);
3650 
3651 static ssize_t nvme_sysfs_show_state(struct device *dev,
3652 				     struct device_attribute *attr,
3653 				     char *buf)
3654 {
3655 	struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
3656 	static const char *const state_name[] = {
3657 		[NVME_CTRL_NEW]		= "new",
3658 		[NVME_CTRL_LIVE]	= "live",
3659 		[NVME_CTRL_RESETTING]	= "resetting",
3660 		[NVME_CTRL_CONNECTING]	= "connecting",
3661 		[NVME_CTRL_DELETING]	= "deleting",
3662 		[NVME_CTRL_DELETING_NOIO]= "deleting (no IO)",
3663 		[NVME_CTRL_DEAD]	= "dead",
3664 	};
3665 
3666 	if ((unsigned)ctrl->state < ARRAY_SIZE(state_name) &&
3667 	    state_name[ctrl->state])
3668 		return sysfs_emit(buf, "%s\n", state_name[ctrl->state]);
3669 
3670 	return sysfs_emit(buf, "unknown state\n");
3671 }
3672 
3673 static DEVICE_ATTR(state, S_IRUGO, nvme_sysfs_show_state, NULL);
3674 
3675 static ssize_t nvme_sysfs_show_subsysnqn(struct device *dev,
3676 					 struct device_attribute *attr,
3677 					 char *buf)
3678 {
3679 	struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
3680 
3681 	return sysfs_emit(buf, "%s\n", ctrl->subsys->subnqn);
3682 }
3683 static DEVICE_ATTR(subsysnqn, S_IRUGO, nvme_sysfs_show_subsysnqn, NULL);
3684 
3685 static ssize_t nvme_sysfs_show_hostnqn(struct device *dev,
3686 					struct device_attribute *attr,
3687 					char *buf)
3688 {
3689 	struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
3690 
3691 	return sysfs_emit(buf, "%s\n", ctrl->opts->host->nqn);
3692 }
3693 static DEVICE_ATTR(hostnqn, S_IRUGO, nvme_sysfs_show_hostnqn, NULL);
3694 
3695 static ssize_t nvme_sysfs_show_hostid(struct device *dev,
3696 					struct device_attribute *attr,
3697 					char *buf)
3698 {
3699 	struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
3700 
3701 	return sysfs_emit(buf, "%pU\n", &ctrl->opts->host->id);
3702 }
3703 static DEVICE_ATTR(hostid, S_IRUGO, nvme_sysfs_show_hostid, NULL);
3704 
3705 static ssize_t nvme_sysfs_show_address(struct device *dev,
3706 					 struct device_attribute *attr,
3707 					 char *buf)
3708 {
3709 	struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
3710 
3711 	return ctrl->ops->get_address(ctrl, buf, PAGE_SIZE);
3712 }
3713 static DEVICE_ATTR(address, S_IRUGO, nvme_sysfs_show_address, NULL);
3714 
3715 static ssize_t nvme_ctrl_loss_tmo_show(struct device *dev,
3716 		struct device_attribute *attr, char *buf)
3717 {
3718 	struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
3719 	struct nvmf_ctrl_options *opts = ctrl->opts;
3720 
3721 	if (ctrl->opts->max_reconnects == -1)
3722 		return sysfs_emit(buf, "off\n");
3723 	return sysfs_emit(buf, "%d\n",
3724 			  opts->max_reconnects * opts->reconnect_delay);
3725 }
3726 
3727 static ssize_t nvme_ctrl_loss_tmo_store(struct device *dev,
3728 		struct device_attribute *attr, const char *buf, size_t count)
3729 {
3730 	struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
3731 	struct nvmf_ctrl_options *opts = ctrl->opts;
3732 	int ctrl_loss_tmo, err;
3733 
3734 	err = kstrtoint(buf, 10, &ctrl_loss_tmo);
3735 	if (err)
3736 		return -EINVAL;
3737 
3738 	if (ctrl_loss_tmo < 0)
3739 		opts->max_reconnects = -1;
3740 	else
3741 		opts->max_reconnects = DIV_ROUND_UP(ctrl_loss_tmo,
3742 						opts->reconnect_delay);
3743 	return count;
3744 }
3745 static DEVICE_ATTR(ctrl_loss_tmo, S_IRUGO | S_IWUSR,
3746 	nvme_ctrl_loss_tmo_show, nvme_ctrl_loss_tmo_store);
3747 
3748 static ssize_t nvme_ctrl_reconnect_delay_show(struct device *dev,
3749 		struct device_attribute *attr, char *buf)
3750 {
3751 	struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
3752 
3753 	if (ctrl->opts->reconnect_delay == -1)
3754 		return sysfs_emit(buf, "off\n");
3755 	return sysfs_emit(buf, "%d\n", ctrl->opts->reconnect_delay);
3756 }
3757 
3758 static ssize_t nvme_ctrl_reconnect_delay_store(struct device *dev,
3759 		struct device_attribute *attr, const char *buf, size_t count)
3760 {
3761 	struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
3762 	unsigned int v;
3763 	int err;
3764 
3765 	err = kstrtou32(buf, 10, &v);
3766 	if (err)
3767 		return err;
3768 
3769 	ctrl->opts->reconnect_delay = v;
3770 	return count;
3771 }
3772 static DEVICE_ATTR(reconnect_delay, S_IRUGO | S_IWUSR,
3773 	nvme_ctrl_reconnect_delay_show, nvme_ctrl_reconnect_delay_store);
3774 
3775 static ssize_t nvme_ctrl_fast_io_fail_tmo_show(struct device *dev,
3776 		struct device_attribute *attr, char *buf)
3777 {
3778 	struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
3779 
3780 	if (ctrl->opts->fast_io_fail_tmo == -1)
3781 		return sysfs_emit(buf, "off\n");
3782 	return sysfs_emit(buf, "%d\n", ctrl->opts->fast_io_fail_tmo);
3783 }
3784 
3785 static ssize_t nvme_ctrl_fast_io_fail_tmo_store(struct device *dev,
3786 		struct device_attribute *attr, const char *buf, size_t count)
3787 {
3788 	struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
3789 	struct nvmf_ctrl_options *opts = ctrl->opts;
3790 	int fast_io_fail_tmo, err;
3791 
3792 	err = kstrtoint(buf, 10, &fast_io_fail_tmo);
3793 	if (err)
3794 		return -EINVAL;
3795 
3796 	if (fast_io_fail_tmo < 0)
3797 		opts->fast_io_fail_tmo = -1;
3798 	else
3799 		opts->fast_io_fail_tmo = fast_io_fail_tmo;
3800 	return count;
3801 }
3802 static DEVICE_ATTR(fast_io_fail_tmo, S_IRUGO | S_IWUSR,
3803 	nvme_ctrl_fast_io_fail_tmo_show, nvme_ctrl_fast_io_fail_tmo_store);
3804 
3805 static ssize_t cntrltype_show(struct device *dev,
3806 			      struct device_attribute *attr, char *buf)
3807 {
3808 	static const char * const type[] = {
3809 		[NVME_CTRL_IO] = "io\n",
3810 		[NVME_CTRL_DISC] = "discovery\n",
3811 		[NVME_CTRL_ADMIN] = "admin\n",
3812 	};
3813 	struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
3814 
3815 	if (ctrl->cntrltype > NVME_CTRL_ADMIN || !type[ctrl->cntrltype])
3816 		return sysfs_emit(buf, "reserved\n");
3817 
3818 	return sysfs_emit(buf, type[ctrl->cntrltype]);
3819 }
3820 static DEVICE_ATTR_RO(cntrltype);
3821 
3822 static ssize_t dctype_show(struct device *dev,
3823 			   struct device_attribute *attr, char *buf)
3824 {
3825 	static const char * const type[] = {
3826 		[NVME_DCTYPE_NOT_REPORTED] = "none\n",
3827 		[NVME_DCTYPE_DDC] = "ddc\n",
3828 		[NVME_DCTYPE_CDC] = "cdc\n",
3829 	};
3830 	struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
3831 
3832 	if (ctrl->dctype > NVME_DCTYPE_CDC || !type[ctrl->dctype])
3833 		return sysfs_emit(buf, "reserved\n");
3834 
3835 	return sysfs_emit(buf, type[ctrl->dctype]);
3836 }
3837 static DEVICE_ATTR_RO(dctype);
3838 
3839 #ifdef CONFIG_NVME_AUTH
3840 static ssize_t nvme_ctrl_dhchap_secret_show(struct device *dev,
3841 		struct device_attribute *attr, char *buf)
3842 {
3843 	struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
3844 	struct nvmf_ctrl_options *opts = ctrl->opts;
3845 
3846 	if (!opts->dhchap_secret)
3847 		return sysfs_emit(buf, "none\n");
3848 	return sysfs_emit(buf, "%s\n", opts->dhchap_secret);
3849 }
3850 
3851 static ssize_t nvme_ctrl_dhchap_secret_store(struct device *dev,
3852 		struct device_attribute *attr, const char *buf, size_t count)
3853 {
3854 	struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
3855 	struct nvmf_ctrl_options *opts = ctrl->opts;
3856 	char *dhchap_secret;
3857 
3858 	if (!ctrl->opts->dhchap_secret)
3859 		return -EINVAL;
3860 	if (count < 7)
3861 		return -EINVAL;
3862 	if (memcmp(buf, "DHHC-1:", 7))
3863 		return -EINVAL;
3864 
3865 	dhchap_secret = kzalloc(count + 1, GFP_KERNEL);
3866 	if (!dhchap_secret)
3867 		return -ENOMEM;
3868 	memcpy(dhchap_secret, buf, count);
3869 	nvme_auth_stop(ctrl);
3870 	if (strcmp(dhchap_secret, opts->dhchap_secret)) {
3871 		struct nvme_dhchap_key *key, *host_key;
3872 		int ret;
3873 
3874 		ret = nvme_auth_generate_key(dhchap_secret, &key);
3875 		if (ret)
3876 			return ret;
3877 		kfree(opts->dhchap_secret);
3878 		opts->dhchap_secret = dhchap_secret;
3879 		host_key = ctrl->host_key;
3880 		mutex_lock(&ctrl->dhchap_auth_mutex);
3881 		ctrl->host_key = key;
3882 		mutex_unlock(&ctrl->dhchap_auth_mutex);
3883 		nvme_auth_free_key(host_key);
3884 	}
3885 	/* Start re-authentication */
3886 	dev_info(ctrl->device, "re-authenticating controller\n");
3887 	queue_work(nvme_wq, &ctrl->dhchap_auth_work);
3888 
3889 	return count;
3890 }
3891 static DEVICE_ATTR(dhchap_secret, S_IRUGO | S_IWUSR,
3892 	nvme_ctrl_dhchap_secret_show, nvme_ctrl_dhchap_secret_store);
3893 
3894 static ssize_t nvme_ctrl_dhchap_ctrl_secret_show(struct device *dev,
3895 		struct device_attribute *attr, char *buf)
3896 {
3897 	struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
3898 	struct nvmf_ctrl_options *opts = ctrl->opts;
3899 
3900 	if (!opts->dhchap_ctrl_secret)
3901 		return sysfs_emit(buf, "none\n");
3902 	return sysfs_emit(buf, "%s\n", opts->dhchap_ctrl_secret);
3903 }
3904 
3905 static ssize_t nvme_ctrl_dhchap_ctrl_secret_store(struct device *dev,
3906 		struct device_attribute *attr, const char *buf, size_t count)
3907 {
3908 	struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
3909 	struct nvmf_ctrl_options *opts = ctrl->opts;
3910 	char *dhchap_secret;
3911 
3912 	if (!ctrl->opts->dhchap_ctrl_secret)
3913 		return -EINVAL;
3914 	if (count < 7)
3915 		return -EINVAL;
3916 	if (memcmp(buf, "DHHC-1:", 7))
3917 		return -EINVAL;
3918 
3919 	dhchap_secret = kzalloc(count + 1, GFP_KERNEL);
3920 	if (!dhchap_secret)
3921 		return -ENOMEM;
3922 	memcpy(dhchap_secret, buf, count);
3923 	nvme_auth_stop(ctrl);
3924 	if (strcmp(dhchap_secret, opts->dhchap_ctrl_secret)) {
3925 		struct nvme_dhchap_key *key, *ctrl_key;
3926 		int ret;
3927 
3928 		ret = nvme_auth_generate_key(dhchap_secret, &key);
3929 		if (ret)
3930 			return ret;
3931 		kfree(opts->dhchap_ctrl_secret);
3932 		opts->dhchap_ctrl_secret = dhchap_secret;
3933 		ctrl_key = ctrl->ctrl_key;
3934 		mutex_lock(&ctrl->dhchap_auth_mutex);
3935 		ctrl->ctrl_key = key;
3936 		mutex_unlock(&ctrl->dhchap_auth_mutex);
3937 		nvme_auth_free_key(ctrl_key);
3938 	}
3939 	/* Start re-authentication */
3940 	dev_info(ctrl->device, "re-authenticating controller\n");
3941 	queue_work(nvme_wq, &ctrl->dhchap_auth_work);
3942 
3943 	return count;
3944 }
3945 static DEVICE_ATTR(dhchap_ctrl_secret, S_IRUGO | S_IWUSR,
3946 	nvme_ctrl_dhchap_ctrl_secret_show, nvme_ctrl_dhchap_ctrl_secret_store);
3947 #endif
3948 
3949 static struct attribute *nvme_dev_attrs[] = {
3950 	&dev_attr_reset_controller.attr,
3951 	&dev_attr_rescan_controller.attr,
3952 	&dev_attr_model.attr,
3953 	&dev_attr_serial.attr,
3954 	&dev_attr_firmware_rev.attr,
3955 	&dev_attr_cntlid.attr,
3956 	&dev_attr_delete_controller.attr,
3957 	&dev_attr_transport.attr,
3958 	&dev_attr_subsysnqn.attr,
3959 	&dev_attr_address.attr,
3960 	&dev_attr_state.attr,
3961 	&dev_attr_numa_node.attr,
3962 	&dev_attr_queue_count.attr,
3963 	&dev_attr_sqsize.attr,
3964 	&dev_attr_hostnqn.attr,
3965 	&dev_attr_hostid.attr,
3966 	&dev_attr_ctrl_loss_tmo.attr,
3967 	&dev_attr_reconnect_delay.attr,
3968 	&dev_attr_fast_io_fail_tmo.attr,
3969 	&dev_attr_kato.attr,
3970 	&dev_attr_cntrltype.attr,
3971 	&dev_attr_dctype.attr,
3972 #ifdef CONFIG_NVME_AUTH
3973 	&dev_attr_dhchap_secret.attr,
3974 	&dev_attr_dhchap_ctrl_secret.attr,
3975 #endif
3976 	NULL
3977 };
3978 
3979 static umode_t nvme_dev_attrs_are_visible(struct kobject *kobj,
3980 		struct attribute *a, int n)
3981 {
3982 	struct device *dev = container_of(kobj, struct device, kobj);
3983 	struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
3984 
3985 	if (a == &dev_attr_delete_controller.attr && !ctrl->ops->delete_ctrl)
3986 		return 0;
3987 	if (a == &dev_attr_address.attr && !ctrl->ops->get_address)
3988 		return 0;
3989 	if (a == &dev_attr_hostnqn.attr && !ctrl->opts)
3990 		return 0;
3991 	if (a == &dev_attr_hostid.attr && !ctrl->opts)
3992 		return 0;
3993 	if (a == &dev_attr_ctrl_loss_tmo.attr && !ctrl->opts)
3994 		return 0;
3995 	if (a == &dev_attr_reconnect_delay.attr && !ctrl->opts)
3996 		return 0;
3997 	if (a == &dev_attr_fast_io_fail_tmo.attr && !ctrl->opts)
3998 		return 0;
3999 #ifdef CONFIG_NVME_AUTH
4000 	if (a == &dev_attr_dhchap_secret.attr && !ctrl->opts)
4001 		return 0;
4002 	if (a == &dev_attr_dhchap_ctrl_secret.attr && !ctrl->opts)
4003 		return 0;
4004 #endif
4005 
4006 	return a->mode;
4007 }
4008 
4009 const struct attribute_group nvme_dev_attrs_group = {
4010 	.attrs		= nvme_dev_attrs,
4011 	.is_visible	= nvme_dev_attrs_are_visible,
4012 };
4013 EXPORT_SYMBOL_GPL(nvme_dev_attrs_group);
4014 
4015 static const struct attribute_group *nvme_dev_attr_groups[] = {
4016 	&nvme_dev_attrs_group,
4017 	NULL,
4018 };
4019 
4020 static struct nvme_ns_head *nvme_find_ns_head(struct nvme_ctrl *ctrl,
4021 		unsigned nsid)
4022 {
4023 	struct nvme_ns_head *h;
4024 
4025 	lockdep_assert_held(&ctrl->subsys->lock);
4026 
4027 	list_for_each_entry(h, &ctrl->subsys->nsheads, entry) {
4028 		/*
4029 		 * Private namespaces can share NSIDs under some conditions.
4030 		 * In that case we can't use the same ns_head for namespaces
4031 		 * with the same NSID.
4032 		 */
4033 		if (h->ns_id != nsid || !nvme_is_unique_nsid(ctrl, h))
4034 			continue;
4035 		if (!list_empty(&h->list) && nvme_tryget_ns_head(h))
4036 			return h;
4037 	}
4038 
4039 	return NULL;
4040 }
4041 
4042 static int nvme_subsys_check_duplicate_ids(struct nvme_subsystem *subsys,
4043 		struct nvme_ns_ids *ids)
4044 {
4045 	bool has_uuid = !uuid_is_null(&ids->uuid);
4046 	bool has_nguid = memchr_inv(ids->nguid, 0, sizeof(ids->nguid));
4047 	bool has_eui64 = memchr_inv(ids->eui64, 0, sizeof(ids->eui64));
4048 	struct nvme_ns_head *h;
4049 
4050 	lockdep_assert_held(&subsys->lock);
4051 
4052 	list_for_each_entry(h, &subsys->nsheads, entry) {
4053 		if (has_uuid && uuid_equal(&ids->uuid, &h->ids.uuid))
4054 			return -EINVAL;
4055 		if (has_nguid &&
4056 		    memcmp(&ids->nguid, &h->ids.nguid, sizeof(ids->nguid)) == 0)
4057 			return -EINVAL;
4058 		if (has_eui64 &&
4059 		    memcmp(&ids->eui64, &h->ids.eui64, sizeof(ids->eui64)) == 0)
4060 			return -EINVAL;
4061 	}
4062 
4063 	return 0;
4064 }
4065 
4066 static void nvme_cdev_rel(struct device *dev)
4067 {
4068 	ida_free(&nvme_ns_chr_minor_ida, MINOR(dev->devt));
4069 }
4070 
4071 void nvme_cdev_del(struct cdev *cdev, struct device *cdev_device)
4072 {
4073 	cdev_device_del(cdev, cdev_device);
4074 	put_device(cdev_device);
4075 }
4076 
4077 int nvme_cdev_add(struct cdev *cdev, struct device *cdev_device,
4078 		const struct file_operations *fops, struct module *owner)
4079 {
4080 	int minor, ret;
4081 
4082 	minor = ida_alloc(&nvme_ns_chr_minor_ida, GFP_KERNEL);
4083 	if (minor < 0)
4084 		return minor;
4085 	cdev_device->devt = MKDEV(MAJOR(nvme_ns_chr_devt), minor);
4086 	cdev_device->class = nvme_ns_chr_class;
4087 	cdev_device->release = nvme_cdev_rel;
4088 	device_initialize(cdev_device);
4089 	cdev_init(cdev, fops);
4090 	cdev->owner = owner;
4091 	ret = cdev_device_add(cdev, cdev_device);
4092 	if (ret)
4093 		put_device(cdev_device);
4094 
4095 	return ret;
4096 }
4097 
4098 static int nvme_ns_chr_open(struct inode *inode, struct file *file)
4099 {
4100 	return nvme_ns_open(container_of(inode->i_cdev, struct nvme_ns, cdev));
4101 }
4102 
4103 static int nvme_ns_chr_release(struct inode *inode, struct file *file)
4104 {
4105 	nvme_ns_release(container_of(inode->i_cdev, struct nvme_ns, cdev));
4106 	return 0;
4107 }
4108 
4109 static const struct file_operations nvme_ns_chr_fops = {
4110 	.owner		= THIS_MODULE,
4111 	.open		= nvme_ns_chr_open,
4112 	.release	= nvme_ns_chr_release,
4113 	.unlocked_ioctl	= nvme_ns_chr_ioctl,
4114 	.compat_ioctl	= compat_ptr_ioctl,
4115 	.uring_cmd	= nvme_ns_chr_uring_cmd,
4116 	.uring_cmd_iopoll = nvme_ns_chr_uring_cmd_iopoll,
4117 };
4118 
4119 static int nvme_add_ns_cdev(struct nvme_ns *ns)
4120 {
4121 	int ret;
4122 
4123 	ns->cdev_device.parent = ns->ctrl->device;
4124 	ret = dev_set_name(&ns->cdev_device, "ng%dn%d",
4125 			   ns->ctrl->instance, ns->head->instance);
4126 	if (ret)
4127 		return ret;
4128 
4129 	return nvme_cdev_add(&ns->cdev, &ns->cdev_device, &nvme_ns_chr_fops,
4130 			     ns->ctrl->ops->module);
4131 }
4132 
4133 static struct nvme_ns_head *nvme_alloc_ns_head(struct nvme_ctrl *ctrl,
4134 		struct nvme_ns_info *info)
4135 {
4136 	struct nvme_ns_head *head;
4137 	size_t size = sizeof(*head);
4138 	int ret = -ENOMEM;
4139 
4140 #ifdef CONFIG_NVME_MULTIPATH
4141 	size += num_possible_nodes() * sizeof(struct nvme_ns *);
4142 #endif
4143 
4144 	head = kzalloc(size, GFP_KERNEL);
4145 	if (!head)
4146 		goto out;
4147 	ret = ida_alloc_min(&ctrl->subsys->ns_ida, 1, GFP_KERNEL);
4148 	if (ret < 0)
4149 		goto out_free_head;
4150 	head->instance = ret;
4151 	INIT_LIST_HEAD(&head->list);
4152 	ret = init_srcu_struct(&head->srcu);
4153 	if (ret)
4154 		goto out_ida_remove;
4155 	head->subsys = ctrl->subsys;
4156 	head->ns_id = info->nsid;
4157 	head->ids = info->ids;
4158 	head->shared = info->is_shared;
4159 	kref_init(&head->ref);
4160 
4161 	if (head->ids.csi) {
4162 		ret = nvme_get_effects_log(ctrl, head->ids.csi, &head->effects);
4163 		if (ret)
4164 			goto out_cleanup_srcu;
4165 	} else
4166 		head->effects = ctrl->effects;
4167 
4168 	ret = nvme_mpath_alloc_disk(ctrl, head);
4169 	if (ret)
4170 		goto out_cleanup_srcu;
4171 
4172 	list_add_tail(&head->entry, &ctrl->subsys->nsheads);
4173 
4174 	kref_get(&ctrl->subsys->ref);
4175 
4176 	return head;
4177 out_cleanup_srcu:
4178 	cleanup_srcu_struct(&head->srcu);
4179 out_ida_remove:
4180 	ida_free(&ctrl->subsys->ns_ida, head->instance);
4181 out_free_head:
4182 	kfree(head);
4183 out:
4184 	if (ret > 0)
4185 		ret = blk_status_to_errno(nvme_error_status(ret));
4186 	return ERR_PTR(ret);
4187 }
4188 
4189 static int nvme_global_check_duplicate_ids(struct nvme_subsystem *this,
4190 		struct nvme_ns_ids *ids)
4191 {
4192 	struct nvme_subsystem *s;
4193 	int ret = 0;
4194 
4195 	/*
4196 	 * Note that this check is racy as we try to avoid holding the global
4197 	 * lock over the whole ns_head creation.  But it is only intended as
4198 	 * a sanity check anyway.
4199 	 */
4200 	mutex_lock(&nvme_subsystems_lock);
4201 	list_for_each_entry(s, &nvme_subsystems, entry) {
4202 		if (s == this)
4203 			continue;
4204 		mutex_lock(&s->lock);
4205 		ret = nvme_subsys_check_duplicate_ids(s, ids);
4206 		mutex_unlock(&s->lock);
4207 		if (ret)
4208 			break;
4209 	}
4210 	mutex_unlock(&nvme_subsystems_lock);
4211 
4212 	return ret;
4213 }
4214 
4215 static int nvme_init_ns_head(struct nvme_ns *ns, struct nvme_ns_info *info)
4216 {
4217 	struct nvme_ctrl *ctrl = ns->ctrl;
4218 	struct nvme_ns_head *head = NULL;
4219 	int ret;
4220 
4221 	ret = nvme_global_check_duplicate_ids(ctrl->subsys, &info->ids);
4222 	if (ret) {
4223 		dev_err(ctrl->device,
4224 			"globally duplicate IDs for nsid %d\n", info->nsid);
4225 		nvme_print_device_info(ctrl);
4226 		return ret;
4227 	}
4228 
4229 	mutex_lock(&ctrl->subsys->lock);
4230 	head = nvme_find_ns_head(ctrl, info->nsid);
4231 	if (!head) {
4232 		ret = nvme_subsys_check_duplicate_ids(ctrl->subsys, &info->ids);
4233 		if (ret) {
4234 			dev_err(ctrl->device,
4235 				"duplicate IDs in subsystem for nsid %d\n",
4236 				info->nsid);
4237 			goto out_unlock;
4238 		}
4239 		head = nvme_alloc_ns_head(ctrl, info);
4240 		if (IS_ERR(head)) {
4241 			ret = PTR_ERR(head);
4242 			goto out_unlock;
4243 		}
4244 	} else {
4245 		ret = -EINVAL;
4246 		if (!info->is_shared || !head->shared) {
4247 			dev_err(ctrl->device,
4248 				"Duplicate unshared namespace %d\n",
4249 				info->nsid);
4250 			goto out_put_ns_head;
4251 		}
4252 		if (!nvme_ns_ids_equal(&head->ids, &info->ids)) {
4253 			dev_err(ctrl->device,
4254 				"IDs don't match for shared namespace %d\n",
4255 					info->nsid);
4256 			goto out_put_ns_head;
4257 		}
4258 
4259 		if (!multipath && !list_empty(&head->list)) {
4260 			dev_warn(ctrl->device,
4261 				"Found shared namespace %d, but multipathing not supported.\n",
4262 				info->nsid);
4263 			dev_warn_once(ctrl->device,
4264 				"Support for shared namespaces without CONFIG_NVME_MULTIPATH is deprecated and will be removed in Linux 6.0\n.");
4265 		}
4266 	}
4267 
4268 	list_add_tail_rcu(&ns->siblings, &head->list);
4269 	ns->head = head;
4270 	mutex_unlock(&ctrl->subsys->lock);
4271 	return 0;
4272 
4273 out_put_ns_head:
4274 	nvme_put_ns_head(head);
4275 out_unlock:
4276 	mutex_unlock(&ctrl->subsys->lock);
4277 	return ret;
4278 }
4279 
4280 struct nvme_ns *nvme_find_get_ns(struct nvme_ctrl *ctrl, unsigned nsid)
4281 {
4282 	struct nvme_ns *ns, *ret = NULL;
4283 
4284 	down_read(&ctrl->namespaces_rwsem);
4285 	list_for_each_entry(ns, &ctrl->namespaces, list) {
4286 		if (ns->head->ns_id == nsid) {
4287 			if (!nvme_get_ns(ns))
4288 				continue;
4289 			ret = ns;
4290 			break;
4291 		}
4292 		if (ns->head->ns_id > nsid)
4293 			break;
4294 	}
4295 	up_read(&ctrl->namespaces_rwsem);
4296 	return ret;
4297 }
4298 EXPORT_SYMBOL_NS_GPL(nvme_find_get_ns, NVME_TARGET_PASSTHRU);
4299 
4300 /*
4301  * Add the namespace to the controller list while keeping the list ordered.
4302  */
4303 static void nvme_ns_add_to_ctrl_list(struct nvme_ns *ns)
4304 {
4305 	struct nvme_ns *tmp;
4306 
4307 	list_for_each_entry_reverse(tmp, &ns->ctrl->namespaces, list) {
4308 		if (tmp->head->ns_id < ns->head->ns_id) {
4309 			list_add(&ns->list, &tmp->list);
4310 			return;
4311 		}
4312 	}
4313 	list_add(&ns->list, &ns->ctrl->namespaces);
4314 }
4315 
4316 static void nvme_alloc_ns(struct nvme_ctrl *ctrl, struct nvme_ns_info *info)
4317 {
4318 	struct nvme_ns *ns;
4319 	struct gendisk *disk;
4320 	int node = ctrl->numa_node;
4321 
4322 	ns = kzalloc_node(sizeof(*ns), GFP_KERNEL, node);
4323 	if (!ns)
4324 		return;
4325 
4326 	disk = blk_mq_alloc_disk(ctrl->tagset, ns);
4327 	if (IS_ERR(disk))
4328 		goto out_free_ns;
4329 	disk->fops = &nvme_bdev_ops;
4330 	disk->private_data = ns;
4331 
4332 	ns->disk = disk;
4333 	ns->queue = disk->queue;
4334 
4335 	if (ctrl->opts && ctrl->opts->data_digest)
4336 		blk_queue_flag_set(QUEUE_FLAG_STABLE_WRITES, ns->queue);
4337 
4338 	blk_queue_flag_set(QUEUE_FLAG_NONROT, ns->queue);
4339 	if (ctrl->ops->supports_pci_p2pdma &&
4340 	    ctrl->ops->supports_pci_p2pdma(ctrl))
4341 		blk_queue_flag_set(QUEUE_FLAG_PCI_P2PDMA, ns->queue);
4342 
4343 	ns->ctrl = ctrl;
4344 	kref_init(&ns->kref);
4345 
4346 	if (nvme_init_ns_head(ns, info))
4347 		goto out_cleanup_disk;
4348 
4349 	/*
4350 	 * If multipathing is enabled, the device name for all disks and not
4351 	 * just those that represent shared namespaces needs to be based on the
4352 	 * subsystem instance.  Using the controller instance for private
4353 	 * namespaces could lead to naming collisions between shared and private
4354 	 * namespaces if they don't use a common numbering scheme.
4355 	 *
4356 	 * If multipathing is not enabled, disk names must use the controller
4357 	 * instance as shared namespaces will show up as multiple block
4358 	 * devices.
4359 	 */
4360 	if (ns->head->disk) {
4361 		sprintf(disk->disk_name, "nvme%dc%dn%d", ctrl->subsys->instance,
4362 			ctrl->instance, ns->head->instance);
4363 		disk->flags |= GENHD_FL_HIDDEN;
4364 	} else if (multipath) {
4365 		sprintf(disk->disk_name, "nvme%dn%d", ctrl->subsys->instance,
4366 			ns->head->instance);
4367 	} else {
4368 		sprintf(disk->disk_name, "nvme%dn%d", ctrl->instance,
4369 			ns->head->instance);
4370 	}
4371 
4372 	if (nvme_update_ns_info(ns, info))
4373 		goto out_unlink_ns;
4374 
4375 	down_write(&ctrl->namespaces_rwsem);
4376 	nvme_ns_add_to_ctrl_list(ns);
4377 	up_write(&ctrl->namespaces_rwsem);
4378 	nvme_get_ctrl(ctrl);
4379 
4380 	if (device_add_disk(ctrl->device, ns->disk, nvme_ns_id_attr_groups))
4381 		goto out_cleanup_ns_from_list;
4382 
4383 	if (!nvme_ns_head_multipath(ns->head))
4384 		nvme_add_ns_cdev(ns);
4385 
4386 	nvme_mpath_add_disk(ns, info->anagrpid);
4387 	nvme_fault_inject_init(&ns->fault_inject, ns->disk->disk_name);
4388 
4389 	return;
4390 
4391  out_cleanup_ns_from_list:
4392 	nvme_put_ctrl(ctrl);
4393 	down_write(&ctrl->namespaces_rwsem);
4394 	list_del_init(&ns->list);
4395 	up_write(&ctrl->namespaces_rwsem);
4396  out_unlink_ns:
4397 	mutex_lock(&ctrl->subsys->lock);
4398 	list_del_rcu(&ns->siblings);
4399 	if (list_empty(&ns->head->list))
4400 		list_del_init(&ns->head->entry);
4401 	mutex_unlock(&ctrl->subsys->lock);
4402 	nvme_put_ns_head(ns->head);
4403  out_cleanup_disk:
4404 	put_disk(disk);
4405  out_free_ns:
4406 	kfree(ns);
4407 }
4408 
4409 static void nvme_ns_remove(struct nvme_ns *ns)
4410 {
4411 	bool last_path = false;
4412 
4413 	if (test_and_set_bit(NVME_NS_REMOVING, &ns->flags))
4414 		return;
4415 
4416 	clear_bit(NVME_NS_READY, &ns->flags);
4417 	set_capacity(ns->disk, 0);
4418 	nvme_fault_inject_fini(&ns->fault_inject);
4419 
4420 	/*
4421 	 * Ensure that !NVME_NS_READY is seen by other threads to prevent
4422 	 * this ns going back into current_path.
4423 	 */
4424 	synchronize_srcu(&ns->head->srcu);
4425 
4426 	/* wait for concurrent submissions */
4427 	if (nvme_mpath_clear_current_path(ns))
4428 		synchronize_srcu(&ns->head->srcu);
4429 
4430 	mutex_lock(&ns->ctrl->subsys->lock);
4431 	list_del_rcu(&ns->siblings);
4432 	if (list_empty(&ns->head->list)) {
4433 		list_del_init(&ns->head->entry);
4434 		last_path = true;
4435 	}
4436 	mutex_unlock(&ns->ctrl->subsys->lock);
4437 
4438 	/* guarantee not available in head->list */
4439 	synchronize_srcu(&ns->head->srcu);
4440 
4441 	if (!nvme_ns_head_multipath(ns->head))
4442 		nvme_cdev_del(&ns->cdev, &ns->cdev_device);
4443 	del_gendisk(ns->disk);
4444 
4445 	down_write(&ns->ctrl->namespaces_rwsem);
4446 	list_del_init(&ns->list);
4447 	up_write(&ns->ctrl->namespaces_rwsem);
4448 
4449 	if (last_path)
4450 		nvme_mpath_shutdown_disk(ns->head);
4451 	nvme_put_ns(ns);
4452 }
4453 
4454 static void nvme_ns_remove_by_nsid(struct nvme_ctrl *ctrl, u32 nsid)
4455 {
4456 	struct nvme_ns *ns = nvme_find_get_ns(ctrl, nsid);
4457 
4458 	if (ns) {
4459 		nvme_ns_remove(ns);
4460 		nvme_put_ns(ns);
4461 	}
4462 }
4463 
4464 static void nvme_validate_ns(struct nvme_ns *ns, struct nvme_ns_info *info)
4465 {
4466 	int ret = NVME_SC_INVALID_NS | NVME_SC_DNR;
4467 
4468 	if (!nvme_ns_ids_equal(&ns->head->ids, &info->ids)) {
4469 		dev_err(ns->ctrl->device,
4470 			"identifiers changed for nsid %d\n", ns->head->ns_id);
4471 		goto out;
4472 	}
4473 
4474 	ret = nvme_update_ns_info(ns, info);
4475 out:
4476 	/*
4477 	 * Only remove the namespace if we got a fatal error back from the
4478 	 * device, otherwise ignore the error and just move on.
4479 	 *
4480 	 * TODO: we should probably schedule a delayed retry here.
4481 	 */
4482 	if (ret > 0 && (ret & NVME_SC_DNR))
4483 		nvme_ns_remove(ns);
4484 }
4485 
4486 static void nvme_scan_ns(struct nvme_ctrl *ctrl, unsigned nsid)
4487 {
4488 	struct nvme_ns_info info = { .nsid = nsid };
4489 	struct nvme_ns *ns;
4490 	int ret;
4491 
4492 	if (nvme_identify_ns_descs(ctrl, &info))
4493 		return;
4494 
4495 	if (info.ids.csi != NVME_CSI_NVM && !nvme_multi_css(ctrl)) {
4496 		dev_warn(ctrl->device,
4497 			"command set not reported for nsid: %d\n", nsid);
4498 		return;
4499 	}
4500 
4501 	/*
4502 	 * If available try to use the Command Set Idependent Identify Namespace
4503 	 * data structure to find all the generic information that is needed to
4504 	 * set up a namespace.  If not fall back to the legacy version.
4505 	 */
4506 	if ((ctrl->cap & NVME_CAP_CRMS_CRIMS) ||
4507 	    (info.ids.csi != NVME_CSI_NVM && info.ids.csi != NVME_CSI_ZNS))
4508 		ret = nvme_ns_info_from_id_cs_indep(ctrl, &info);
4509 	else
4510 		ret = nvme_ns_info_from_identify(ctrl, &info);
4511 
4512 	if (info.is_removed)
4513 		nvme_ns_remove_by_nsid(ctrl, nsid);
4514 
4515 	/*
4516 	 * Ignore the namespace if it is not ready. We will get an AEN once it
4517 	 * becomes ready and restart the scan.
4518 	 */
4519 	if (ret || !info.is_ready)
4520 		return;
4521 
4522 	ns = nvme_find_get_ns(ctrl, nsid);
4523 	if (ns) {
4524 		nvme_validate_ns(ns, &info);
4525 		nvme_put_ns(ns);
4526 	} else {
4527 		nvme_alloc_ns(ctrl, &info);
4528 	}
4529 }
4530 
4531 static void nvme_remove_invalid_namespaces(struct nvme_ctrl *ctrl,
4532 					unsigned nsid)
4533 {
4534 	struct nvme_ns *ns, *next;
4535 	LIST_HEAD(rm_list);
4536 
4537 	down_write(&ctrl->namespaces_rwsem);
4538 	list_for_each_entry_safe(ns, next, &ctrl->namespaces, list) {
4539 		if (ns->head->ns_id > nsid)
4540 			list_move_tail(&ns->list, &rm_list);
4541 	}
4542 	up_write(&ctrl->namespaces_rwsem);
4543 
4544 	list_for_each_entry_safe(ns, next, &rm_list, list)
4545 		nvme_ns_remove(ns);
4546 
4547 }
4548 
4549 static int nvme_scan_ns_list(struct nvme_ctrl *ctrl)
4550 {
4551 	const int nr_entries = NVME_IDENTIFY_DATA_SIZE / sizeof(__le32);
4552 	__le32 *ns_list;
4553 	u32 prev = 0;
4554 	int ret = 0, i;
4555 
4556 	ns_list = kzalloc(NVME_IDENTIFY_DATA_SIZE, GFP_KERNEL);
4557 	if (!ns_list)
4558 		return -ENOMEM;
4559 
4560 	for (;;) {
4561 		struct nvme_command cmd = {
4562 			.identify.opcode	= nvme_admin_identify,
4563 			.identify.cns		= NVME_ID_CNS_NS_ACTIVE_LIST,
4564 			.identify.nsid		= cpu_to_le32(prev),
4565 		};
4566 
4567 		ret = nvme_submit_sync_cmd(ctrl->admin_q, &cmd, ns_list,
4568 					    NVME_IDENTIFY_DATA_SIZE);
4569 		if (ret) {
4570 			dev_warn(ctrl->device,
4571 				"Identify NS List failed (status=0x%x)\n", ret);
4572 			goto free;
4573 		}
4574 
4575 		for (i = 0; i < nr_entries; i++) {
4576 			u32 nsid = le32_to_cpu(ns_list[i]);
4577 
4578 			if (!nsid)	/* end of the list? */
4579 				goto out;
4580 			nvme_scan_ns(ctrl, nsid);
4581 			while (++prev < nsid)
4582 				nvme_ns_remove_by_nsid(ctrl, prev);
4583 		}
4584 	}
4585  out:
4586 	nvme_remove_invalid_namespaces(ctrl, prev);
4587  free:
4588 	kfree(ns_list);
4589 	return ret;
4590 }
4591 
4592 static void nvme_scan_ns_sequential(struct nvme_ctrl *ctrl)
4593 {
4594 	struct nvme_id_ctrl *id;
4595 	u32 nn, i;
4596 
4597 	if (nvme_identify_ctrl(ctrl, &id))
4598 		return;
4599 	nn = le32_to_cpu(id->nn);
4600 	kfree(id);
4601 
4602 	for (i = 1; i <= nn; i++)
4603 		nvme_scan_ns(ctrl, i);
4604 
4605 	nvme_remove_invalid_namespaces(ctrl, nn);
4606 }
4607 
4608 static void nvme_clear_changed_ns_log(struct nvme_ctrl *ctrl)
4609 {
4610 	size_t log_size = NVME_MAX_CHANGED_NAMESPACES * sizeof(__le32);
4611 	__le32 *log;
4612 	int error;
4613 
4614 	log = kzalloc(log_size, GFP_KERNEL);
4615 	if (!log)
4616 		return;
4617 
4618 	/*
4619 	 * We need to read the log to clear the AEN, but we don't want to rely
4620 	 * on it for the changed namespace information as userspace could have
4621 	 * raced with us in reading the log page, which could cause us to miss
4622 	 * updates.
4623 	 */
4624 	error = nvme_get_log(ctrl, NVME_NSID_ALL, NVME_LOG_CHANGED_NS, 0,
4625 			NVME_CSI_NVM, log, log_size, 0);
4626 	if (error)
4627 		dev_warn(ctrl->device,
4628 			"reading changed ns log failed: %d\n", error);
4629 
4630 	kfree(log);
4631 }
4632 
4633 static void nvme_scan_work(struct work_struct *work)
4634 {
4635 	struct nvme_ctrl *ctrl =
4636 		container_of(work, struct nvme_ctrl, scan_work);
4637 	int ret;
4638 
4639 	/* No tagset on a live ctrl means IO queues could not created */
4640 	if (ctrl->state != NVME_CTRL_LIVE || !ctrl->tagset)
4641 		return;
4642 
4643 	/*
4644 	 * Identify controller limits can change at controller reset due to
4645 	 * new firmware download, even though it is not common we cannot ignore
4646 	 * such scenario. Controller's non-mdts limits are reported in the unit
4647 	 * of logical blocks that is dependent on the format of attached
4648 	 * namespace. Hence re-read the limits at the time of ns allocation.
4649 	 */
4650 	ret = nvme_init_non_mdts_limits(ctrl);
4651 	if (ret < 0) {
4652 		dev_warn(ctrl->device,
4653 			"reading non-mdts-limits failed: %d\n", ret);
4654 		return;
4655 	}
4656 
4657 	if (test_and_clear_bit(NVME_AER_NOTICE_NS_CHANGED, &ctrl->events)) {
4658 		dev_info(ctrl->device, "rescanning namespaces.\n");
4659 		nvme_clear_changed_ns_log(ctrl);
4660 	}
4661 
4662 	mutex_lock(&ctrl->scan_lock);
4663 	if (nvme_ctrl_limited_cns(ctrl)) {
4664 		nvme_scan_ns_sequential(ctrl);
4665 	} else {
4666 		/*
4667 		 * Fall back to sequential scan if DNR is set to handle broken
4668 		 * devices which should support Identify NS List (as per the VS
4669 		 * they report) but don't actually support it.
4670 		 */
4671 		ret = nvme_scan_ns_list(ctrl);
4672 		if (ret > 0 && ret & NVME_SC_DNR)
4673 			nvme_scan_ns_sequential(ctrl);
4674 	}
4675 	mutex_unlock(&ctrl->scan_lock);
4676 }
4677 
4678 /*
4679  * This function iterates the namespace list unlocked to allow recovery from
4680  * controller failure. It is up to the caller to ensure the namespace list is
4681  * not modified by scan work while this function is executing.
4682  */
4683 void nvme_remove_namespaces(struct nvme_ctrl *ctrl)
4684 {
4685 	struct nvme_ns *ns, *next;
4686 	LIST_HEAD(ns_list);
4687 
4688 	/*
4689 	 * make sure to requeue I/O to all namespaces as these
4690 	 * might result from the scan itself and must complete
4691 	 * for the scan_work to make progress
4692 	 */
4693 	nvme_mpath_clear_ctrl_paths(ctrl);
4694 
4695 	/* prevent racing with ns scanning */
4696 	flush_work(&ctrl->scan_work);
4697 
4698 	/*
4699 	 * The dead states indicates the controller was not gracefully
4700 	 * disconnected. In that case, we won't be able to flush any data while
4701 	 * removing the namespaces' disks; fail all the queues now to avoid
4702 	 * potentially having to clean up the failed sync later.
4703 	 */
4704 	if (ctrl->state == NVME_CTRL_DEAD) {
4705 		nvme_mark_namespaces_dead(ctrl);
4706 		nvme_unquiesce_io_queues(ctrl);
4707 	}
4708 
4709 	/* this is a no-op when called from the controller reset handler */
4710 	nvme_change_ctrl_state(ctrl, NVME_CTRL_DELETING_NOIO);
4711 
4712 	down_write(&ctrl->namespaces_rwsem);
4713 	list_splice_init(&ctrl->namespaces, &ns_list);
4714 	up_write(&ctrl->namespaces_rwsem);
4715 
4716 	list_for_each_entry_safe(ns, next, &ns_list, list)
4717 		nvme_ns_remove(ns);
4718 }
4719 EXPORT_SYMBOL_GPL(nvme_remove_namespaces);
4720 
4721 static int nvme_class_uevent(const struct device *dev, struct kobj_uevent_env *env)
4722 {
4723 	const struct nvme_ctrl *ctrl =
4724 		container_of(dev, struct nvme_ctrl, ctrl_device);
4725 	struct nvmf_ctrl_options *opts = ctrl->opts;
4726 	int ret;
4727 
4728 	ret = add_uevent_var(env, "NVME_TRTYPE=%s", ctrl->ops->name);
4729 	if (ret)
4730 		return ret;
4731 
4732 	if (opts) {
4733 		ret = add_uevent_var(env, "NVME_TRADDR=%s", opts->traddr);
4734 		if (ret)
4735 			return ret;
4736 
4737 		ret = add_uevent_var(env, "NVME_TRSVCID=%s",
4738 				opts->trsvcid ?: "none");
4739 		if (ret)
4740 			return ret;
4741 
4742 		ret = add_uevent_var(env, "NVME_HOST_TRADDR=%s",
4743 				opts->host_traddr ?: "none");
4744 		if (ret)
4745 			return ret;
4746 
4747 		ret = add_uevent_var(env, "NVME_HOST_IFACE=%s",
4748 				opts->host_iface ?: "none");
4749 	}
4750 	return ret;
4751 }
4752 
4753 static void nvme_change_uevent(struct nvme_ctrl *ctrl, char *envdata)
4754 {
4755 	char *envp[2] = { envdata, NULL };
4756 
4757 	kobject_uevent_env(&ctrl->device->kobj, KOBJ_CHANGE, envp);
4758 }
4759 
4760 static void nvme_aen_uevent(struct nvme_ctrl *ctrl)
4761 {
4762 	char *envp[2] = { NULL, NULL };
4763 	u32 aen_result = ctrl->aen_result;
4764 
4765 	ctrl->aen_result = 0;
4766 	if (!aen_result)
4767 		return;
4768 
4769 	envp[0] = kasprintf(GFP_KERNEL, "NVME_AEN=%#08x", aen_result);
4770 	if (!envp[0])
4771 		return;
4772 	kobject_uevent_env(&ctrl->device->kobj, KOBJ_CHANGE, envp);
4773 	kfree(envp[0]);
4774 }
4775 
4776 static void nvme_async_event_work(struct work_struct *work)
4777 {
4778 	struct nvme_ctrl *ctrl =
4779 		container_of(work, struct nvme_ctrl, async_event_work);
4780 
4781 	nvme_aen_uevent(ctrl);
4782 
4783 	/*
4784 	 * The transport drivers must guarantee AER submission here is safe by
4785 	 * flushing ctrl async_event_work after changing the controller state
4786 	 * from LIVE and before freeing the admin queue.
4787 	*/
4788 	if (ctrl->state == NVME_CTRL_LIVE)
4789 		ctrl->ops->submit_async_event(ctrl);
4790 }
4791 
4792 static bool nvme_ctrl_pp_status(struct nvme_ctrl *ctrl)
4793 {
4794 
4795 	u32 csts;
4796 
4797 	if (ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts))
4798 		return false;
4799 
4800 	if (csts == ~0)
4801 		return false;
4802 
4803 	return ((ctrl->ctrl_config & NVME_CC_ENABLE) && (csts & NVME_CSTS_PP));
4804 }
4805 
4806 static void nvme_get_fw_slot_info(struct nvme_ctrl *ctrl)
4807 {
4808 	struct nvme_fw_slot_info_log *log;
4809 
4810 	log = kmalloc(sizeof(*log), GFP_KERNEL);
4811 	if (!log)
4812 		return;
4813 
4814 	if (nvme_get_log(ctrl, NVME_NSID_ALL, NVME_LOG_FW_SLOT, 0, NVME_CSI_NVM,
4815 			log, sizeof(*log), 0))
4816 		dev_warn(ctrl->device, "Get FW SLOT INFO log error\n");
4817 	kfree(log);
4818 }
4819 
4820 static void nvme_fw_act_work(struct work_struct *work)
4821 {
4822 	struct nvme_ctrl *ctrl = container_of(work,
4823 				struct nvme_ctrl, fw_act_work);
4824 	unsigned long fw_act_timeout;
4825 
4826 	if (ctrl->mtfa)
4827 		fw_act_timeout = jiffies +
4828 				msecs_to_jiffies(ctrl->mtfa * 100);
4829 	else
4830 		fw_act_timeout = jiffies +
4831 				msecs_to_jiffies(admin_timeout * 1000);
4832 
4833 	nvme_quiesce_io_queues(ctrl);
4834 	while (nvme_ctrl_pp_status(ctrl)) {
4835 		if (time_after(jiffies, fw_act_timeout)) {
4836 			dev_warn(ctrl->device,
4837 				"Fw activation timeout, reset controller\n");
4838 			nvme_try_sched_reset(ctrl);
4839 			return;
4840 		}
4841 		msleep(100);
4842 	}
4843 
4844 	if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_LIVE))
4845 		return;
4846 
4847 	nvme_unquiesce_io_queues(ctrl);
4848 	/* read FW slot information to clear the AER */
4849 	nvme_get_fw_slot_info(ctrl);
4850 
4851 	queue_work(nvme_wq, &ctrl->async_event_work);
4852 }
4853 
4854 static u32 nvme_aer_type(u32 result)
4855 {
4856 	return result & 0x7;
4857 }
4858 
4859 static u32 nvme_aer_subtype(u32 result)
4860 {
4861 	return (result & 0xff00) >> 8;
4862 }
4863 
4864 static bool nvme_handle_aen_notice(struct nvme_ctrl *ctrl, u32 result)
4865 {
4866 	u32 aer_notice_type = nvme_aer_subtype(result);
4867 	bool requeue = true;
4868 
4869 	switch (aer_notice_type) {
4870 	case NVME_AER_NOTICE_NS_CHANGED:
4871 		set_bit(NVME_AER_NOTICE_NS_CHANGED, &ctrl->events);
4872 		nvme_queue_scan(ctrl);
4873 		break;
4874 	case NVME_AER_NOTICE_FW_ACT_STARTING:
4875 		/*
4876 		 * We are (ab)using the RESETTING state to prevent subsequent
4877 		 * recovery actions from interfering with the controller's
4878 		 * firmware activation.
4879 		 */
4880 		if (nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING)) {
4881 			nvme_auth_stop(ctrl);
4882 			requeue = false;
4883 			queue_work(nvme_wq, &ctrl->fw_act_work);
4884 		}
4885 		break;
4886 #ifdef CONFIG_NVME_MULTIPATH
4887 	case NVME_AER_NOTICE_ANA:
4888 		if (!ctrl->ana_log_buf)
4889 			break;
4890 		queue_work(nvme_wq, &ctrl->ana_work);
4891 		break;
4892 #endif
4893 	case NVME_AER_NOTICE_DISC_CHANGED:
4894 		ctrl->aen_result = result;
4895 		break;
4896 	default:
4897 		dev_warn(ctrl->device, "async event result %08x\n", result);
4898 	}
4899 	return requeue;
4900 }
4901 
4902 static void nvme_handle_aer_persistent_error(struct nvme_ctrl *ctrl)
4903 {
4904 	dev_warn(ctrl->device, "resetting controller due to AER\n");
4905 	nvme_reset_ctrl(ctrl);
4906 }
4907 
4908 void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status,
4909 		volatile union nvme_result *res)
4910 {
4911 	u32 result = le32_to_cpu(res->u32);
4912 	u32 aer_type = nvme_aer_type(result);
4913 	u32 aer_subtype = nvme_aer_subtype(result);
4914 	bool requeue = true;
4915 
4916 	if (le16_to_cpu(status) >> 1 != NVME_SC_SUCCESS)
4917 		return;
4918 
4919 	trace_nvme_async_event(ctrl, result);
4920 	switch (aer_type) {
4921 	case NVME_AER_NOTICE:
4922 		requeue = nvme_handle_aen_notice(ctrl, result);
4923 		break;
4924 	case NVME_AER_ERROR:
4925 		/*
4926 		 * For a persistent internal error, don't run async_event_work
4927 		 * to submit a new AER. The controller reset will do it.
4928 		 */
4929 		if (aer_subtype == NVME_AER_ERROR_PERSIST_INT_ERR) {
4930 			nvme_handle_aer_persistent_error(ctrl);
4931 			return;
4932 		}
4933 		fallthrough;
4934 	case NVME_AER_SMART:
4935 	case NVME_AER_CSS:
4936 	case NVME_AER_VS:
4937 		ctrl->aen_result = result;
4938 		break;
4939 	default:
4940 		break;
4941 	}
4942 
4943 	if (requeue)
4944 		queue_work(nvme_wq, &ctrl->async_event_work);
4945 }
4946 EXPORT_SYMBOL_GPL(nvme_complete_async_event);
4947 
4948 int nvme_alloc_admin_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set,
4949 		const struct blk_mq_ops *ops, unsigned int cmd_size)
4950 {
4951 	int ret;
4952 
4953 	memset(set, 0, sizeof(*set));
4954 	set->ops = ops;
4955 	set->queue_depth = NVME_AQ_MQ_TAG_DEPTH;
4956 	if (ctrl->ops->flags & NVME_F_FABRICS)
4957 		set->reserved_tags = NVMF_RESERVED_TAGS;
4958 	set->numa_node = ctrl->numa_node;
4959 	set->flags = BLK_MQ_F_NO_SCHED;
4960 	if (ctrl->ops->flags & NVME_F_BLOCKING)
4961 		set->flags |= BLK_MQ_F_BLOCKING;
4962 	set->cmd_size = cmd_size;
4963 	set->driver_data = ctrl;
4964 	set->nr_hw_queues = 1;
4965 	set->timeout = NVME_ADMIN_TIMEOUT;
4966 	ret = blk_mq_alloc_tag_set(set);
4967 	if (ret)
4968 		return ret;
4969 
4970 	ctrl->admin_q = blk_mq_init_queue(set);
4971 	if (IS_ERR(ctrl->admin_q)) {
4972 		ret = PTR_ERR(ctrl->admin_q);
4973 		goto out_free_tagset;
4974 	}
4975 
4976 	if (ctrl->ops->flags & NVME_F_FABRICS) {
4977 		ctrl->fabrics_q = blk_mq_init_queue(set);
4978 		if (IS_ERR(ctrl->fabrics_q)) {
4979 			ret = PTR_ERR(ctrl->fabrics_q);
4980 			goto out_cleanup_admin_q;
4981 		}
4982 	}
4983 
4984 	ctrl->admin_tagset = set;
4985 	return 0;
4986 
4987 out_cleanup_admin_q:
4988 	blk_mq_destroy_queue(ctrl->admin_q);
4989 	blk_put_queue(ctrl->admin_q);
4990 out_free_tagset:
4991 	blk_mq_free_tag_set(set);
4992 	ctrl->admin_q = NULL;
4993 	ctrl->fabrics_q = NULL;
4994 	return ret;
4995 }
4996 EXPORT_SYMBOL_GPL(nvme_alloc_admin_tag_set);
4997 
4998 void nvme_remove_admin_tag_set(struct nvme_ctrl *ctrl)
4999 {
5000 	blk_mq_destroy_queue(ctrl->admin_q);
5001 	blk_put_queue(ctrl->admin_q);
5002 	if (ctrl->ops->flags & NVME_F_FABRICS) {
5003 		blk_mq_destroy_queue(ctrl->fabrics_q);
5004 		blk_put_queue(ctrl->fabrics_q);
5005 	}
5006 	blk_mq_free_tag_set(ctrl->admin_tagset);
5007 }
5008 EXPORT_SYMBOL_GPL(nvme_remove_admin_tag_set);
5009 
5010 int nvme_alloc_io_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set,
5011 		const struct blk_mq_ops *ops, unsigned int nr_maps,
5012 		unsigned int cmd_size)
5013 {
5014 	int ret;
5015 
5016 	memset(set, 0, sizeof(*set));
5017 	set->ops = ops;
5018 	set->queue_depth = min_t(unsigned, ctrl->sqsize, BLK_MQ_MAX_DEPTH - 1);
5019 	/*
5020 	 * Some Apple controllers requires tags to be unique across admin and
5021 	 * the (only) I/O queue, so reserve the first 32 tags of the I/O queue.
5022 	 */
5023 	if (ctrl->quirks & NVME_QUIRK_SHARED_TAGS)
5024 		set->reserved_tags = NVME_AQ_DEPTH;
5025 	else if (ctrl->ops->flags & NVME_F_FABRICS)
5026 		set->reserved_tags = NVMF_RESERVED_TAGS;
5027 	set->numa_node = ctrl->numa_node;
5028 	set->flags = BLK_MQ_F_SHOULD_MERGE;
5029 	if (ctrl->ops->flags & NVME_F_BLOCKING)
5030 		set->flags |= BLK_MQ_F_BLOCKING;
5031 	set->cmd_size = cmd_size,
5032 	set->driver_data = ctrl;
5033 	set->nr_hw_queues = ctrl->queue_count - 1;
5034 	set->timeout = NVME_IO_TIMEOUT;
5035 	set->nr_maps = nr_maps;
5036 	ret = blk_mq_alloc_tag_set(set);
5037 	if (ret)
5038 		return ret;
5039 
5040 	if (ctrl->ops->flags & NVME_F_FABRICS) {
5041 		ctrl->connect_q = blk_mq_init_queue(set);
5042         	if (IS_ERR(ctrl->connect_q)) {
5043 			ret = PTR_ERR(ctrl->connect_q);
5044 			goto out_free_tag_set;
5045 		}
5046 		blk_queue_flag_set(QUEUE_FLAG_SKIP_TAGSET_QUIESCE,
5047 				   ctrl->connect_q);
5048 	}
5049 
5050 	ctrl->tagset = set;
5051 	return 0;
5052 
5053 out_free_tag_set:
5054 	blk_mq_free_tag_set(set);
5055 	ctrl->connect_q = NULL;
5056 	return ret;
5057 }
5058 EXPORT_SYMBOL_GPL(nvme_alloc_io_tag_set);
5059 
5060 void nvme_remove_io_tag_set(struct nvme_ctrl *ctrl)
5061 {
5062 	if (ctrl->ops->flags & NVME_F_FABRICS) {
5063 		blk_mq_destroy_queue(ctrl->connect_q);
5064 		blk_put_queue(ctrl->connect_q);
5065 	}
5066 	blk_mq_free_tag_set(ctrl->tagset);
5067 }
5068 EXPORT_SYMBOL_GPL(nvme_remove_io_tag_set);
5069 
5070 void nvme_stop_ctrl(struct nvme_ctrl *ctrl)
5071 {
5072 	nvme_mpath_stop(ctrl);
5073 	nvme_auth_stop(ctrl);
5074 	nvme_stop_keep_alive(ctrl);
5075 	nvme_stop_failfast_work(ctrl);
5076 	flush_work(&ctrl->async_event_work);
5077 	cancel_work_sync(&ctrl->fw_act_work);
5078 	if (ctrl->ops->stop_ctrl)
5079 		ctrl->ops->stop_ctrl(ctrl);
5080 }
5081 EXPORT_SYMBOL_GPL(nvme_stop_ctrl);
5082 
5083 void nvme_start_ctrl(struct nvme_ctrl *ctrl)
5084 {
5085 	nvme_start_keep_alive(ctrl);
5086 
5087 	nvme_enable_aen(ctrl);
5088 
5089 	/*
5090 	 * persistent discovery controllers need to send indication to userspace
5091 	 * to re-read the discovery log page to learn about possible changes
5092 	 * that were missed. We identify persistent discovery controllers by
5093 	 * checking that they started once before, hence are reconnecting back.
5094 	 */
5095 	if (test_bit(NVME_CTRL_STARTED_ONCE, &ctrl->flags) &&
5096 	    nvme_discovery_ctrl(ctrl))
5097 		nvme_change_uevent(ctrl, "NVME_EVENT=rediscover");
5098 
5099 	if (ctrl->queue_count > 1) {
5100 		nvme_queue_scan(ctrl);
5101 		nvme_unquiesce_io_queues(ctrl);
5102 		nvme_mpath_update(ctrl);
5103 	}
5104 
5105 	nvme_change_uevent(ctrl, "NVME_EVENT=connected");
5106 	set_bit(NVME_CTRL_STARTED_ONCE, &ctrl->flags);
5107 }
5108 EXPORT_SYMBOL_GPL(nvme_start_ctrl);
5109 
5110 void nvme_uninit_ctrl(struct nvme_ctrl *ctrl)
5111 {
5112 	nvme_hwmon_exit(ctrl);
5113 	nvme_fault_inject_fini(&ctrl->fault_inject);
5114 	dev_pm_qos_hide_latency_tolerance(ctrl->device);
5115 	cdev_device_del(&ctrl->cdev, ctrl->device);
5116 	nvme_put_ctrl(ctrl);
5117 }
5118 EXPORT_SYMBOL_GPL(nvme_uninit_ctrl);
5119 
5120 static void nvme_free_cels(struct nvme_ctrl *ctrl)
5121 {
5122 	struct nvme_effects_log	*cel;
5123 	unsigned long i;
5124 
5125 	xa_for_each(&ctrl->cels, i, cel) {
5126 		xa_erase(&ctrl->cels, i);
5127 		kfree(cel);
5128 	}
5129 
5130 	xa_destroy(&ctrl->cels);
5131 }
5132 
5133 static void nvme_free_ctrl(struct device *dev)
5134 {
5135 	struct nvme_ctrl *ctrl =
5136 		container_of(dev, struct nvme_ctrl, ctrl_device);
5137 	struct nvme_subsystem *subsys = ctrl->subsys;
5138 
5139 	if (!subsys || ctrl->instance != subsys->instance)
5140 		ida_free(&nvme_instance_ida, ctrl->instance);
5141 
5142 	nvme_free_cels(ctrl);
5143 	nvme_mpath_uninit(ctrl);
5144 	nvme_auth_stop(ctrl);
5145 	nvme_auth_free(ctrl);
5146 	__free_page(ctrl->discard_page);
5147 	free_opal_dev(ctrl->opal_dev);
5148 
5149 	if (subsys) {
5150 		mutex_lock(&nvme_subsystems_lock);
5151 		list_del(&ctrl->subsys_entry);
5152 		sysfs_remove_link(&subsys->dev.kobj, dev_name(ctrl->device));
5153 		mutex_unlock(&nvme_subsystems_lock);
5154 	}
5155 
5156 	ctrl->ops->free_ctrl(ctrl);
5157 
5158 	if (subsys)
5159 		nvme_put_subsystem(subsys);
5160 }
5161 
5162 /*
5163  * Initialize a NVMe controller structures.  This needs to be called during
5164  * earliest initialization so that we have the initialized structured around
5165  * during probing.
5166  */
5167 int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev,
5168 		const struct nvme_ctrl_ops *ops, unsigned long quirks)
5169 {
5170 	int ret;
5171 
5172 	ctrl->state = NVME_CTRL_NEW;
5173 	clear_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags);
5174 	spin_lock_init(&ctrl->lock);
5175 	mutex_init(&ctrl->scan_lock);
5176 	INIT_LIST_HEAD(&ctrl->namespaces);
5177 	xa_init(&ctrl->cels);
5178 	init_rwsem(&ctrl->namespaces_rwsem);
5179 	ctrl->dev = dev;
5180 	ctrl->ops = ops;
5181 	ctrl->quirks = quirks;
5182 	ctrl->numa_node = NUMA_NO_NODE;
5183 	INIT_WORK(&ctrl->scan_work, nvme_scan_work);
5184 	INIT_WORK(&ctrl->async_event_work, nvme_async_event_work);
5185 	INIT_WORK(&ctrl->fw_act_work, nvme_fw_act_work);
5186 	INIT_WORK(&ctrl->delete_work, nvme_delete_ctrl_work);
5187 	init_waitqueue_head(&ctrl->state_wq);
5188 
5189 	INIT_DELAYED_WORK(&ctrl->ka_work, nvme_keep_alive_work);
5190 	INIT_DELAYED_WORK(&ctrl->failfast_work, nvme_failfast_work);
5191 	memset(&ctrl->ka_cmd, 0, sizeof(ctrl->ka_cmd));
5192 	ctrl->ka_cmd.common.opcode = nvme_admin_keep_alive;
5193 
5194 	BUILD_BUG_ON(NVME_DSM_MAX_RANGES * sizeof(struct nvme_dsm_range) >
5195 			PAGE_SIZE);
5196 	ctrl->discard_page = alloc_page(GFP_KERNEL);
5197 	if (!ctrl->discard_page) {
5198 		ret = -ENOMEM;
5199 		goto out;
5200 	}
5201 
5202 	ret = ida_alloc(&nvme_instance_ida, GFP_KERNEL);
5203 	if (ret < 0)
5204 		goto out;
5205 	ctrl->instance = ret;
5206 
5207 	device_initialize(&ctrl->ctrl_device);
5208 	ctrl->device = &ctrl->ctrl_device;
5209 	ctrl->device->devt = MKDEV(MAJOR(nvme_ctrl_base_chr_devt),
5210 			ctrl->instance);
5211 	ctrl->device->class = nvme_class;
5212 	ctrl->device->parent = ctrl->dev;
5213 	if (ops->dev_attr_groups)
5214 		ctrl->device->groups = ops->dev_attr_groups;
5215 	else
5216 		ctrl->device->groups = nvme_dev_attr_groups;
5217 	ctrl->device->release = nvme_free_ctrl;
5218 	dev_set_drvdata(ctrl->device, ctrl);
5219 	ret = dev_set_name(ctrl->device, "nvme%d", ctrl->instance);
5220 	if (ret)
5221 		goto out_release_instance;
5222 
5223 	nvme_get_ctrl(ctrl);
5224 	cdev_init(&ctrl->cdev, &nvme_dev_fops);
5225 	ctrl->cdev.owner = ops->module;
5226 	ret = cdev_device_add(&ctrl->cdev, ctrl->device);
5227 	if (ret)
5228 		goto out_free_name;
5229 
5230 	/*
5231 	 * Initialize latency tolerance controls.  The sysfs files won't
5232 	 * be visible to userspace unless the device actually supports APST.
5233 	 */
5234 	ctrl->device->power.set_latency_tolerance = nvme_set_latency_tolerance;
5235 	dev_pm_qos_update_user_latency_tolerance(ctrl->device,
5236 		min(default_ps_max_latency_us, (unsigned long)S32_MAX));
5237 
5238 	nvme_fault_inject_init(&ctrl->fault_inject, dev_name(ctrl->device));
5239 	nvme_mpath_init_ctrl(ctrl);
5240 	ret = nvme_auth_init_ctrl(ctrl);
5241 	if (ret)
5242 		goto out_free_cdev;
5243 
5244 	return 0;
5245 out_free_cdev:
5246 	cdev_device_del(&ctrl->cdev, ctrl->device);
5247 out_free_name:
5248 	nvme_put_ctrl(ctrl);
5249 	kfree_const(ctrl->device->kobj.name);
5250 out_release_instance:
5251 	ida_free(&nvme_instance_ida, ctrl->instance);
5252 out:
5253 	if (ctrl->discard_page)
5254 		__free_page(ctrl->discard_page);
5255 	return ret;
5256 }
5257 EXPORT_SYMBOL_GPL(nvme_init_ctrl);
5258 
5259 /* let I/O to all namespaces fail in preparation for surprise removal */
5260 void nvme_mark_namespaces_dead(struct nvme_ctrl *ctrl)
5261 {
5262 	struct nvme_ns *ns;
5263 
5264 	down_read(&ctrl->namespaces_rwsem);
5265 	list_for_each_entry(ns, &ctrl->namespaces, list)
5266 		blk_mark_disk_dead(ns->disk);
5267 	up_read(&ctrl->namespaces_rwsem);
5268 }
5269 EXPORT_SYMBOL_GPL(nvme_mark_namespaces_dead);
5270 
5271 void nvme_unfreeze(struct nvme_ctrl *ctrl)
5272 {
5273 	struct nvme_ns *ns;
5274 
5275 	down_read(&ctrl->namespaces_rwsem);
5276 	list_for_each_entry(ns, &ctrl->namespaces, list)
5277 		blk_mq_unfreeze_queue(ns->queue);
5278 	up_read(&ctrl->namespaces_rwsem);
5279 }
5280 EXPORT_SYMBOL_GPL(nvme_unfreeze);
5281 
5282 int nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout)
5283 {
5284 	struct nvme_ns *ns;
5285 
5286 	down_read(&ctrl->namespaces_rwsem);
5287 	list_for_each_entry(ns, &ctrl->namespaces, list) {
5288 		timeout = blk_mq_freeze_queue_wait_timeout(ns->queue, timeout);
5289 		if (timeout <= 0)
5290 			break;
5291 	}
5292 	up_read(&ctrl->namespaces_rwsem);
5293 	return timeout;
5294 }
5295 EXPORT_SYMBOL_GPL(nvme_wait_freeze_timeout);
5296 
5297 void nvme_wait_freeze(struct nvme_ctrl *ctrl)
5298 {
5299 	struct nvme_ns *ns;
5300 
5301 	down_read(&ctrl->namespaces_rwsem);
5302 	list_for_each_entry(ns, &ctrl->namespaces, list)
5303 		blk_mq_freeze_queue_wait(ns->queue);
5304 	up_read(&ctrl->namespaces_rwsem);
5305 }
5306 EXPORT_SYMBOL_GPL(nvme_wait_freeze);
5307 
5308 void nvme_start_freeze(struct nvme_ctrl *ctrl)
5309 {
5310 	struct nvme_ns *ns;
5311 
5312 	down_read(&ctrl->namespaces_rwsem);
5313 	list_for_each_entry(ns, &ctrl->namespaces, list)
5314 		blk_freeze_queue_start(ns->queue);
5315 	up_read(&ctrl->namespaces_rwsem);
5316 }
5317 EXPORT_SYMBOL_GPL(nvme_start_freeze);
5318 
5319 void nvme_quiesce_io_queues(struct nvme_ctrl *ctrl)
5320 {
5321 	if (!ctrl->tagset)
5322 		return;
5323 	if (!test_and_set_bit(NVME_CTRL_STOPPED, &ctrl->flags))
5324 		blk_mq_quiesce_tagset(ctrl->tagset);
5325 	else
5326 		blk_mq_wait_quiesce_done(ctrl->tagset);
5327 }
5328 EXPORT_SYMBOL_GPL(nvme_quiesce_io_queues);
5329 
5330 void nvme_unquiesce_io_queues(struct nvme_ctrl *ctrl)
5331 {
5332 	if (!ctrl->tagset)
5333 		return;
5334 	if (test_and_clear_bit(NVME_CTRL_STOPPED, &ctrl->flags))
5335 		blk_mq_unquiesce_tagset(ctrl->tagset);
5336 }
5337 EXPORT_SYMBOL_GPL(nvme_unquiesce_io_queues);
5338 
5339 void nvme_quiesce_admin_queue(struct nvme_ctrl *ctrl)
5340 {
5341 	if (!test_and_set_bit(NVME_CTRL_ADMIN_Q_STOPPED, &ctrl->flags))
5342 		blk_mq_quiesce_queue(ctrl->admin_q);
5343 	else
5344 		blk_mq_wait_quiesce_done(ctrl->admin_q->tag_set);
5345 }
5346 EXPORT_SYMBOL_GPL(nvme_quiesce_admin_queue);
5347 
5348 void nvme_unquiesce_admin_queue(struct nvme_ctrl *ctrl)
5349 {
5350 	if (test_and_clear_bit(NVME_CTRL_ADMIN_Q_STOPPED, &ctrl->flags))
5351 		blk_mq_unquiesce_queue(ctrl->admin_q);
5352 }
5353 EXPORT_SYMBOL_GPL(nvme_unquiesce_admin_queue);
5354 
5355 void nvme_sync_io_queues(struct nvme_ctrl *ctrl)
5356 {
5357 	struct nvme_ns *ns;
5358 
5359 	down_read(&ctrl->namespaces_rwsem);
5360 	list_for_each_entry(ns, &ctrl->namespaces, list)
5361 		blk_sync_queue(ns->queue);
5362 	up_read(&ctrl->namespaces_rwsem);
5363 }
5364 EXPORT_SYMBOL_GPL(nvme_sync_io_queues);
5365 
5366 void nvme_sync_queues(struct nvme_ctrl *ctrl)
5367 {
5368 	nvme_sync_io_queues(ctrl);
5369 	if (ctrl->admin_q)
5370 		blk_sync_queue(ctrl->admin_q);
5371 }
5372 EXPORT_SYMBOL_GPL(nvme_sync_queues);
5373 
5374 struct nvme_ctrl *nvme_ctrl_from_file(struct file *file)
5375 {
5376 	if (file->f_op != &nvme_dev_fops)
5377 		return NULL;
5378 	return file->private_data;
5379 }
5380 EXPORT_SYMBOL_NS_GPL(nvme_ctrl_from_file, NVME_TARGET_PASSTHRU);
5381 
5382 /*
5383  * Check we didn't inadvertently grow the command structure sizes:
5384  */
5385 static inline void _nvme_check_size(void)
5386 {
5387 	BUILD_BUG_ON(sizeof(struct nvme_common_command) != 64);
5388 	BUILD_BUG_ON(sizeof(struct nvme_rw_command) != 64);
5389 	BUILD_BUG_ON(sizeof(struct nvme_identify) != 64);
5390 	BUILD_BUG_ON(sizeof(struct nvme_features) != 64);
5391 	BUILD_BUG_ON(sizeof(struct nvme_download_firmware) != 64);
5392 	BUILD_BUG_ON(sizeof(struct nvme_format_cmd) != 64);
5393 	BUILD_BUG_ON(sizeof(struct nvme_dsm_cmd) != 64);
5394 	BUILD_BUG_ON(sizeof(struct nvme_write_zeroes_cmd) != 64);
5395 	BUILD_BUG_ON(sizeof(struct nvme_abort_cmd) != 64);
5396 	BUILD_BUG_ON(sizeof(struct nvme_get_log_page_command) != 64);
5397 	BUILD_BUG_ON(sizeof(struct nvme_command) != 64);
5398 	BUILD_BUG_ON(sizeof(struct nvme_id_ctrl) != NVME_IDENTIFY_DATA_SIZE);
5399 	BUILD_BUG_ON(sizeof(struct nvme_id_ns) != NVME_IDENTIFY_DATA_SIZE);
5400 	BUILD_BUG_ON(sizeof(struct nvme_id_ns_cs_indep) !=
5401 			NVME_IDENTIFY_DATA_SIZE);
5402 	BUILD_BUG_ON(sizeof(struct nvme_id_ns_zns) != NVME_IDENTIFY_DATA_SIZE);
5403 	BUILD_BUG_ON(sizeof(struct nvme_id_ns_nvm) != NVME_IDENTIFY_DATA_SIZE);
5404 	BUILD_BUG_ON(sizeof(struct nvme_id_ctrl_zns) != NVME_IDENTIFY_DATA_SIZE);
5405 	BUILD_BUG_ON(sizeof(struct nvme_id_ctrl_nvm) != NVME_IDENTIFY_DATA_SIZE);
5406 	BUILD_BUG_ON(sizeof(struct nvme_lba_range_type) != 64);
5407 	BUILD_BUG_ON(sizeof(struct nvme_smart_log) != 512);
5408 	BUILD_BUG_ON(sizeof(struct nvme_dbbuf) != 64);
5409 	BUILD_BUG_ON(sizeof(struct nvme_directive_cmd) != 64);
5410 	BUILD_BUG_ON(sizeof(struct nvme_feat_host_behavior) != 512);
5411 }
5412 
5413 
5414 static int __init nvme_core_init(void)
5415 {
5416 	int result = -ENOMEM;
5417 
5418 	_nvme_check_size();
5419 
5420 	nvme_wq = alloc_workqueue("nvme-wq",
5421 			WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_SYSFS, 0);
5422 	if (!nvme_wq)
5423 		goto out;
5424 
5425 	nvme_reset_wq = alloc_workqueue("nvme-reset-wq",
5426 			WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_SYSFS, 0);
5427 	if (!nvme_reset_wq)
5428 		goto destroy_wq;
5429 
5430 	nvme_delete_wq = alloc_workqueue("nvme-delete-wq",
5431 			WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_SYSFS, 0);
5432 	if (!nvme_delete_wq)
5433 		goto destroy_reset_wq;
5434 
5435 	result = alloc_chrdev_region(&nvme_ctrl_base_chr_devt, 0,
5436 			NVME_MINORS, "nvme");
5437 	if (result < 0)
5438 		goto destroy_delete_wq;
5439 
5440 	nvme_class = class_create("nvme");
5441 	if (IS_ERR(nvme_class)) {
5442 		result = PTR_ERR(nvme_class);
5443 		goto unregister_chrdev;
5444 	}
5445 	nvme_class->dev_uevent = nvme_class_uevent;
5446 
5447 	nvme_subsys_class = class_create("nvme-subsystem");
5448 	if (IS_ERR(nvme_subsys_class)) {
5449 		result = PTR_ERR(nvme_subsys_class);
5450 		goto destroy_class;
5451 	}
5452 
5453 	result = alloc_chrdev_region(&nvme_ns_chr_devt, 0, NVME_MINORS,
5454 				     "nvme-generic");
5455 	if (result < 0)
5456 		goto destroy_subsys_class;
5457 
5458 	nvme_ns_chr_class = class_create("nvme-generic");
5459 	if (IS_ERR(nvme_ns_chr_class)) {
5460 		result = PTR_ERR(nvme_ns_chr_class);
5461 		goto unregister_generic_ns;
5462 	}
5463 
5464 	result = nvme_init_auth();
5465 	if (result)
5466 		goto destroy_ns_chr;
5467 	return 0;
5468 
5469 destroy_ns_chr:
5470 	class_destroy(nvme_ns_chr_class);
5471 unregister_generic_ns:
5472 	unregister_chrdev_region(nvme_ns_chr_devt, NVME_MINORS);
5473 destroy_subsys_class:
5474 	class_destroy(nvme_subsys_class);
5475 destroy_class:
5476 	class_destroy(nvme_class);
5477 unregister_chrdev:
5478 	unregister_chrdev_region(nvme_ctrl_base_chr_devt, NVME_MINORS);
5479 destroy_delete_wq:
5480 	destroy_workqueue(nvme_delete_wq);
5481 destroy_reset_wq:
5482 	destroy_workqueue(nvme_reset_wq);
5483 destroy_wq:
5484 	destroy_workqueue(nvme_wq);
5485 out:
5486 	return result;
5487 }
5488 
5489 static void __exit nvme_core_exit(void)
5490 {
5491 	nvme_exit_auth();
5492 	class_destroy(nvme_ns_chr_class);
5493 	class_destroy(nvme_subsys_class);
5494 	class_destroy(nvme_class);
5495 	unregister_chrdev_region(nvme_ns_chr_devt, NVME_MINORS);
5496 	unregister_chrdev_region(nvme_ctrl_base_chr_devt, NVME_MINORS);
5497 	destroy_workqueue(nvme_delete_wq);
5498 	destroy_workqueue(nvme_reset_wq);
5499 	destroy_workqueue(nvme_wq);
5500 	ida_destroy(&nvme_ns_chr_minor_ida);
5501 	ida_destroy(&nvme_instance_ida);
5502 }
5503 
5504 MODULE_LICENSE("GPL");
5505 MODULE_VERSION("1.0");
5506 module_init(nvme_core_init);
5507 module_exit(nvme_core_exit);
5508