1 /* 2 * NVM Express device driver 3 * Copyright (c) 2011-2014, Intel Corporation. 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms and conditions of the GNU General Public License, 7 * version 2, as published by the Free Software Foundation. 8 * 9 * This program is distributed in the hope it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12 * more details. 13 */ 14 15 #include <linux/blkdev.h> 16 #include <linux/blk-mq.h> 17 #include <linux/delay.h> 18 #include <linux/errno.h> 19 #include <linux/hdreg.h> 20 #include <linux/kernel.h> 21 #include <linux/module.h> 22 #include <linux/list_sort.h> 23 #include <linux/slab.h> 24 #include <linux/types.h> 25 #include <linux/pr.h> 26 #include <linux/ptrace.h> 27 #include <linux/nvme_ioctl.h> 28 #include <linux/t10-pi.h> 29 #include <linux/pm_qos.h> 30 #include <asm/unaligned.h> 31 32 #define CREATE_TRACE_POINTS 33 #include "trace.h" 34 35 #include "nvme.h" 36 #include "fabrics.h" 37 38 #define NVME_MINORS (1U << MINORBITS) 39 40 unsigned int admin_timeout = 60; 41 module_param(admin_timeout, uint, 0644); 42 MODULE_PARM_DESC(admin_timeout, "timeout in seconds for admin commands"); 43 EXPORT_SYMBOL_GPL(admin_timeout); 44 45 unsigned int nvme_io_timeout = 30; 46 module_param_named(io_timeout, nvme_io_timeout, uint, 0644); 47 MODULE_PARM_DESC(io_timeout, "timeout in seconds for I/O"); 48 EXPORT_SYMBOL_GPL(nvme_io_timeout); 49 50 static unsigned char shutdown_timeout = 5; 51 module_param(shutdown_timeout, byte, 0644); 52 MODULE_PARM_DESC(shutdown_timeout, "timeout in seconds for controller shutdown"); 53 54 static u8 nvme_max_retries = 5; 55 module_param_named(max_retries, nvme_max_retries, byte, 0644); 56 MODULE_PARM_DESC(max_retries, "max number of retries a command may have"); 57 58 static unsigned long default_ps_max_latency_us = 100000; 59 module_param(default_ps_max_latency_us, ulong, 0644); 60 MODULE_PARM_DESC(default_ps_max_latency_us, 61 "max power saving latency for new devices; use PM QOS to change per device"); 62 63 static bool force_apst; 64 module_param(force_apst, bool, 0644); 65 MODULE_PARM_DESC(force_apst, "allow APST for newly enumerated devices even if quirked off"); 66 67 static bool streams; 68 module_param(streams, bool, 0644); 69 MODULE_PARM_DESC(streams, "turn on support for Streams write directives"); 70 71 /* 72 * nvme_wq - hosts nvme related works that are not reset or delete 73 * nvme_reset_wq - hosts nvme reset works 74 * nvme_delete_wq - hosts nvme delete works 75 * 76 * nvme_wq will host works such are scan, aen handling, fw activation, 77 * keep-alive error recovery, periodic reconnects etc. nvme_reset_wq 78 * runs reset works which also flush works hosted on nvme_wq for 79 * serialization purposes. nvme_delete_wq host controller deletion 80 * works which flush reset works for serialization. 81 */ 82 struct workqueue_struct *nvme_wq; 83 EXPORT_SYMBOL_GPL(nvme_wq); 84 85 struct workqueue_struct *nvme_reset_wq; 86 EXPORT_SYMBOL_GPL(nvme_reset_wq); 87 88 struct workqueue_struct *nvme_delete_wq; 89 EXPORT_SYMBOL_GPL(nvme_delete_wq); 90 91 static DEFINE_IDA(nvme_subsystems_ida); 92 static LIST_HEAD(nvme_subsystems); 93 static DEFINE_MUTEX(nvme_subsystems_lock); 94 95 static DEFINE_IDA(nvme_instance_ida); 96 static dev_t nvme_chr_devt; 97 static struct class *nvme_class; 98 static struct class *nvme_subsys_class; 99 100 static int nvme_revalidate_disk(struct gendisk *disk); 101 static void nvme_put_subsystem(struct nvme_subsystem *subsys); 102 static void nvme_remove_invalid_namespaces(struct nvme_ctrl *ctrl, 103 unsigned nsid); 104 105 static void nvme_set_queue_dying(struct nvme_ns *ns) 106 { 107 /* 108 * Revalidating a dead namespace sets capacity to 0. This will end 109 * buffered writers dirtying pages that can't be synced. 110 */ 111 if (!ns->disk || test_and_set_bit(NVME_NS_DEAD, &ns->flags)) 112 return; 113 revalidate_disk(ns->disk); 114 blk_set_queue_dying(ns->queue); 115 /* Forcibly unquiesce queues to avoid blocking dispatch */ 116 blk_mq_unquiesce_queue(ns->queue); 117 } 118 119 static void nvme_queue_scan(struct nvme_ctrl *ctrl) 120 { 121 /* 122 * Only new queue scan work when admin and IO queues are both alive 123 */ 124 if (ctrl->state == NVME_CTRL_LIVE) 125 queue_work(nvme_wq, &ctrl->scan_work); 126 } 127 128 int nvme_reset_ctrl(struct nvme_ctrl *ctrl) 129 { 130 if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING)) 131 return -EBUSY; 132 if (!queue_work(nvme_reset_wq, &ctrl->reset_work)) 133 return -EBUSY; 134 return 0; 135 } 136 EXPORT_SYMBOL_GPL(nvme_reset_ctrl); 137 138 int nvme_reset_ctrl_sync(struct nvme_ctrl *ctrl) 139 { 140 int ret; 141 142 ret = nvme_reset_ctrl(ctrl); 143 if (!ret) { 144 flush_work(&ctrl->reset_work); 145 if (ctrl->state != NVME_CTRL_LIVE && 146 ctrl->state != NVME_CTRL_ADMIN_ONLY) 147 ret = -ENETRESET; 148 } 149 150 return ret; 151 } 152 EXPORT_SYMBOL_GPL(nvme_reset_ctrl_sync); 153 154 static void nvme_delete_ctrl_work(struct work_struct *work) 155 { 156 struct nvme_ctrl *ctrl = 157 container_of(work, struct nvme_ctrl, delete_work); 158 159 dev_info(ctrl->device, 160 "Removing ctrl: NQN \"%s\"\n", ctrl->opts->subsysnqn); 161 162 flush_work(&ctrl->reset_work); 163 nvme_stop_ctrl(ctrl); 164 nvme_remove_namespaces(ctrl); 165 ctrl->ops->delete_ctrl(ctrl); 166 nvme_uninit_ctrl(ctrl); 167 nvme_put_ctrl(ctrl); 168 } 169 170 int nvme_delete_ctrl(struct nvme_ctrl *ctrl) 171 { 172 if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_DELETING)) 173 return -EBUSY; 174 if (!queue_work(nvme_delete_wq, &ctrl->delete_work)) 175 return -EBUSY; 176 return 0; 177 } 178 EXPORT_SYMBOL_GPL(nvme_delete_ctrl); 179 180 int nvme_delete_ctrl_sync(struct nvme_ctrl *ctrl) 181 { 182 int ret = 0; 183 184 /* 185 * Keep a reference until the work is flushed since ->delete_ctrl 186 * can free the controller. 187 */ 188 nvme_get_ctrl(ctrl); 189 ret = nvme_delete_ctrl(ctrl); 190 if (!ret) 191 flush_work(&ctrl->delete_work); 192 nvme_put_ctrl(ctrl); 193 return ret; 194 } 195 EXPORT_SYMBOL_GPL(nvme_delete_ctrl_sync); 196 197 static inline bool nvme_ns_has_pi(struct nvme_ns *ns) 198 { 199 return ns->pi_type && ns->ms == sizeof(struct t10_pi_tuple); 200 } 201 202 static blk_status_t nvme_error_status(struct request *req) 203 { 204 switch (nvme_req(req)->status & 0x7ff) { 205 case NVME_SC_SUCCESS: 206 return BLK_STS_OK; 207 case NVME_SC_CAP_EXCEEDED: 208 return BLK_STS_NOSPC; 209 case NVME_SC_LBA_RANGE: 210 return BLK_STS_TARGET; 211 case NVME_SC_BAD_ATTRIBUTES: 212 case NVME_SC_ONCS_NOT_SUPPORTED: 213 case NVME_SC_INVALID_OPCODE: 214 case NVME_SC_INVALID_FIELD: 215 case NVME_SC_INVALID_NS: 216 return BLK_STS_NOTSUPP; 217 case NVME_SC_WRITE_FAULT: 218 case NVME_SC_READ_ERROR: 219 case NVME_SC_UNWRITTEN_BLOCK: 220 case NVME_SC_ACCESS_DENIED: 221 case NVME_SC_READ_ONLY: 222 case NVME_SC_COMPARE_FAILED: 223 return BLK_STS_MEDIUM; 224 case NVME_SC_GUARD_CHECK: 225 case NVME_SC_APPTAG_CHECK: 226 case NVME_SC_REFTAG_CHECK: 227 case NVME_SC_INVALID_PI: 228 return BLK_STS_PROTECTION; 229 case NVME_SC_RESERVATION_CONFLICT: 230 return BLK_STS_NEXUS; 231 default: 232 return BLK_STS_IOERR; 233 } 234 } 235 236 static inline bool nvme_req_needs_retry(struct request *req) 237 { 238 if (blk_noretry_request(req)) 239 return false; 240 if (nvme_req(req)->status & NVME_SC_DNR) 241 return false; 242 if (nvme_req(req)->retries >= nvme_max_retries) 243 return false; 244 return true; 245 } 246 247 static void nvme_retry_req(struct request *req) 248 { 249 struct nvme_ns *ns = req->q->queuedata; 250 unsigned long delay = 0; 251 u16 crd; 252 253 /* The mask and shift result must be <= 3 */ 254 crd = (nvme_req(req)->status & NVME_SC_CRD) >> 11; 255 if (ns && crd) 256 delay = ns->ctrl->crdt[crd - 1] * 100; 257 258 nvme_req(req)->retries++; 259 blk_mq_requeue_request(req, false); 260 blk_mq_delay_kick_requeue_list(req->q, delay); 261 } 262 263 void nvme_complete_rq(struct request *req) 264 { 265 blk_status_t status = nvme_error_status(req); 266 267 trace_nvme_complete_rq(req); 268 269 if (nvme_req(req)->ctrl->kas) 270 nvme_req(req)->ctrl->comp_seen = true; 271 272 if (unlikely(status != BLK_STS_OK && nvme_req_needs_retry(req))) { 273 if ((req->cmd_flags & REQ_NVME_MPATH) && 274 blk_path_error(status)) { 275 nvme_failover_req(req); 276 return; 277 } 278 279 if (!blk_queue_dying(req->q)) { 280 nvme_retry_req(req); 281 return; 282 } 283 } 284 blk_mq_end_request(req, status); 285 } 286 EXPORT_SYMBOL_GPL(nvme_complete_rq); 287 288 bool nvme_cancel_request(struct request *req, void *data, bool reserved) 289 { 290 dev_dbg_ratelimited(((struct nvme_ctrl *) data)->device, 291 "Cancelling I/O %d", req->tag); 292 293 nvme_req(req)->status = NVME_SC_ABORT_REQ; 294 blk_mq_complete_request(req); 295 return true; 296 } 297 EXPORT_SYMBOL_GPL(nvme_cancel_request); 298 299 bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl, 300 enum nvme_ctrl_state new_state) 301 { 302 enum nvme_ctrl_state old_state; 303 unsigned long flags; 304 bool changed = false; 305 306 spin_lock_irqsave(&ctrl->lock, flags); 307 308 old_state = ctrl->state; 309 switch (new_state) { 310 case NVME_CTRL_ADMIN_ONLY: 311 switch (old_state) { 312 case NVME_CTRL_CONNECTING: 313 changed = true; 314 /* FALLTHRU */ 315 default: 316 break; 317 } 318 break; 319 case NVME_CTRL_LIVE: 320 switch (old_state) { 321 case NVME_CTRL_NEW: 322 case NVME_CTRL_RESETTING: 323 case NVME_CTRL_CONNECTING: 324 changed = true; 325 /* FALLTHRU */ 326 default: 327 break; 328 } 329 break; 330 case NVME_CTRL_RESETTING: 331 switch (old_state) { 332 case NVME_CTRL_NEW: 333 case NVME_CTRL_LIVE: 334 case NVME_CTRL_ADMIN_ONLY: 335 changed = true; 336 /* FALLTHRU */ 337 default: 338 break; 339 } 340 break; 341 case NVME_CTRL_CONNECTING: 342 switch (old_state) { 343 case NVME_CTRL_NEW: 344 case NVME_CTRL_RESETTING: 345 changed = true; 346 /* FALLTHRU */ 347 default: 348 break; 349 } 350 break; 351 case NVME_CTRL_DELETING: 352 switch (old_state) { 353 case NVME_CTRL_LIVE: 354 case NVME_CTRL_ADMIN_ONLY: 355 case NVME_CTRL_RESETTING: 356 case NVME_CTRL_CONNECTING: 357 changed = true; 358 /* FALLTHRU */ 359 default: 360 break; 361 } 362 break; 363 case NVME_CTRL_DEAD: 364 switch (old_state) { 365 case NVME_CTRL_DELETING: 366 changed = true; 367 /* FALLTHRU */ 368 default: 369 break; 370 } 371 break; 372 default: 373 break; 374 } 375 376 if (changed) 377 ctrl->state = new_state; 378 379 spin_unlock_irqrestore(&ctrl->lock, flags); 380 if (changed && ctrl->state == NVME_CTRL_LIVE) 381 nvme_kick_requeue_lists(ctrl); 382 return changed; 383 } 384 EXPORT_SYMBOL_GPL(nvme_change_ctrl_state); 385 386 static void nvme_free_ns_head(struct kref *ref) 387 { 388 struct nvme_ns_head *head = 389 container_of(ref, struct nvme_ns_head, ref); 390 391 nvme_mpath_remove_disk(head); 392 ida_simple_remove(&head->subsys->ns_ida, head->instance); 393 list_del_init(&head->entry); 394 cleanup_srcu_struct_quiesced(&head->srcu); 395 nvme_put_subsystem(head->subsys); 396 kfree(head); 397 } 398 399 static void nvme_put_ns_head(struct nvme_ns_head *head) 400 { 401 kref_put(&head->ref, nvme_free_ns_head); 402 } 403 404 static void nvme_free_ns(struct kref *kref) 405 { 406 struct nvme_ns *ns = container_of(kref, struct nvme_ns, kref); 407 408 if (ns->ndev) 409 nvme_nvm_unregister(ns); 410 411 put_disk(ns->disk); 412 nvme_put_ns_head(ns->head); 413 nvme_put_ctrl(ns->ctrl); 414 kfree(ns); 415 } 416 417 static void nvme_put_ns(struct nvme_ns *ns) 418 { 419 kref_put(&ns->kref, nvme_free_ns); 420 } 421 422 static inline void nvme_clear_nvme_request(struct request *req) 423 { 424 if (!(req->rq_flags & RQF_DONTPREP)) { 425 nvme_req(req)->retries = 0; 426 nvme_req(req)->flags = 0; 427 req->rq_flags |= RQF_DONTPREP; 428 } 429 } 430 431 struct request *nvme_alloc_request(struct request_queue *q, 432 struct nvme_command *cmd, blk_mq_req_flags_t flags, int qid) 433 { 434 unsigned op = nvme_is_write(cmd) ? REQ_OP_DRV_OUT : REQ_OP_DRV_IN; 435 struct request *req; 436 437 if (qid == NVME_QID_ANY) { 438 req = blk_mq_alloc_request(q, op, flags); 439 } else { 440 req = blk_mq_alloc_request_hctx(q, op, flags, 441 qid ? qid - 1 : 0); 442 } 443 if (IS_ERR(req)) 444 return req; 445 446 req->cmd_flags |= REQ_FAILFAST_DRIVER; 447 nvme_clear_nvme_request(req); 448 nvme_req(req)->cmd = cmd; 449 450 return req; 451 } 452 EXPORT_SYMBOL_GPL(nvme_alloc_request); 453 454 static int nvme_toggle_streams(struct nvme_ctrl *ctrl, bool enable) 455 { 456 struct nvme_command c; 457 458 memset(&c, 0, sizeof(c)); 459 460 c.directive.opcode = nvme_admin_directive_send; 461 c.directive.nsid = cpu_to_le32(NVME_NSID_ALL); 462 c.directive.doper = NVME_DIR_SND_ID_OP_ENABLE; 463 c.directive.dtype = NVME_DIR_IDENTIFY; 464 c.directive.tdtype = NVME_DIR_STREAMS; 465 c.directive.endir = enable ? NVME_DIR_ENDIR : 0; 466 467 return nvme_submit_sync_cmd(ctrl->admin_q, &c, NULL, 0); 468 } 469 470 static int nvme_disable_streams(struct nvme_ctrl *ctrl) 471 { 472 return nvme_toggle_streams(ctrl, false); 473 } 474 475 static int nvme_enable_streams(struct nvme_ctrl *ctrl) 476 { 477 return nvme_toggle_streams(ctrl, true); 478 } 479 480 static int nvme_get_stream_params(struct nvme_ctrl *ctrl, 481 struct streams_directive_params *s, u32 nsid) 482 { 483 struct nvme_command c; 484 485 memset(&c, 0, sizeof(c)); 486 memset(s, 0, sizeof(*s)); 487 488 c.directive.opcode = nvme_admin_directive_recv; 489 c.directive.nsid = cpu_to_le32(nsid); 490 c.directive.numd = cpu_to_le32((sizeof(*s) >> 2) - 1); 491 c.directive.doper = NVME_DIR_RCV_ST_OP_PARAM; 492 c.directive.dtype = NVME_DIR_STREAMS; 493 494 return nvme_submit_sync_cmd(ctrl->admin_q, &c, s, sizeof(*s)); 495 } 496 497 static int nvme_configure_directives(struct nvme_ctrl *ctrl) 498 { 499 struct streams_directive_params s; 500 int ret; 501 502 if (!(ctrl->oacs & NVME_CTRL_OACS_DIRECTIVES)) 503 return 0; 504 if (!streams) 505 return 0; 506 507 ret = nvme_enable_streams(ctrl); 508 if (ret) 509 return ret; 510 511 ret = nvme_get_stream_params(ctrl, &s, NVME_NSID_ALL); 512 if (ret) 513 return ret; 514 515 ctrl->nssa = le16_to_cpu(s.nssa); 516 if (ctrl->nssa < BLK_MAX_WRITE_HINTS - 1) { 517 dev_info(ctrl->device, "too few streams (%u) available\n", 518 ctrl->nssa); 519 nvme_disable_streams(ctrl); 520 return 0; 521 } 522 523 ctrl->nr_streams = min_t(unsigned, ctrl->nssa, BLK_MAX_WRITE_HINTS - 1); 524 dev_info(ctrl->device, "Using %u streams\n", ctrl->nr_streams); 525 return 0; 526 } 527 528 /* 529 * Check if 'req' has a write hint associated with it. If it does, assign 530 * a valid namespace stream to the write. 531 */ 532 static void nvme_assign_write_stream(struct nvme_ctrl *ctrl, 533 struct request *req, u16 *control, 534 u32 *dsmgmt) 535 { 536 enum rw_hint streamid = req->write_hint; 537 538 if (streamid == WRITE_LIFE_NOT_SET || streamid == WRITE_LIFE_NONE) 539 streamid = 0; 540 else { 541 streamid--; 542 if (WARN_ON_ONCE(streamid > ctrl->nr_streams)) 543 return; 544 545 *control |= NVME_RW_DTYPE_STREAMS; 546 *dsmgmt |= streamid << 16; 547 } 548 549 if (streamid < ARRAY_SIZE(req->q->write_hints)) 550 req->q->write_hints[streamid] += blk_rq_bytes(req) >> 9; 551 } 552 553 static inline void nvme_setup_flush(struct nvme_ns *ns, 554 struct nvme_command *cmnd) 555 { 556 cmnd->common.opcode = nvme_cmd_flush; 557 cmnd->common.nsid = cpu_to_le32(ns->head->ns_id); 558 } 559 560 static blk_status_t nvme_setup_discard(struct nvme_ns *ns, struct request *req, 561 struct nvme_command *cmnd) 562 { 563 unsigned short segments = blk_rq_nr_discard_segments(req), n = 0; 564 struct nvme_dsm_range *range; 565 struct bio *bio; 566 567 range = kmalloc_array(segments, sizeof(*range), 568 GFP_ATOMIC | __GFP_NOWARN); 569 if (!range) { 570 /* 571 * If we fail allocation our range, fallback to the controller 572 * discard page. If that's also busy, it's safe to return 573 * busy, as we know we can make progress once that's freed. 574 */ 575 if (test_and_set_bit_lock(0, &ns->ctrl->discard_page_busy)) 576 return BLK_STS_RESOURCE; 577 578 range = page_address(ns->ctrl->discard_page); 579 } 580 581 __rq_for_each_bio(bio, req) { 582 u64 slba = nvme_block_nr(ns, bio->bi_iter.bi_sector); 583 u32 nlb = bio->bi_iter.bi_size >> ns->lba_shift; 584 585 if (n < segments) { 586 range[n].cattr = cpu_to_le32(0); 587 range[n].nlb = cpu_to_le32(nlb); 588 range[n].slba = cpu_to_le64(slba); 589 } 590 n++; 591 } 592 593 if (WARN_ON_ONCE(n != segments)) { 594 if (virt_to_page(range) == ns->ctrl->discard_page) 595 clear_bit_unlock(0, &ns->ctrl->discard_page_busy); 596 else 597 kfree(range); 598 return BLK_STS_IOERR; 599 } 600 601 cmnd->dsm.opcode = nvme_cmd_dsm; 602 cmnd->dsm.nsid = cpu_to_le32(ns->head->ns_id); 603 cmnd->dsm.nr = cpu_to_le32(segments - 1); 604 cmnd->dsm.attributes = cpu_to_le32(NVME_DSMGMT_AD); 605 606 req->special_vec.bv_page = virt_to_page(range); 607 req->special_vec.bv_offset = offset_in_page(range); 608 req->special_vec.bv_len = sizeof(*range) * segments; 609 req->rq_flags |= RQF_SPECIAL_PAYLOAD; 610 611 return BLK_STS_OK; 612 } 613 614 static inline blk_status_t nvme_setup_rw(struct nvme_ns *ns, 615 struct request *req, struct nvme_command *cmnd) 616 { 617 struct nvme_ctrl *ctrl = ns->ctrl; 618 u16 control = 0; 619 u32 dsmgmt = 0; 620 621 if (req->cmd_flags & REQ_FUA) 622 control |= NVME_RW_FUA; 623 if (req->cmd_flags & (REQ_FAILFAST_DEV | REQ_RAHEAD)) 624 control |= NVME_RW_LR; 625 626 if (req->cmd_flags & REQ_RAHEAD) 627 dsmgmt |= NVME_RW_DSM_FREQ_PREFETCH; 628 629 cmnd->rw.opcode = (rq_data_dir(req) ? nvme_cmd_write : nvme_cmd_read); 630 cmnd->rw.nsid = cpu_to_le32(ns->head->ns_id); 631 cmnd->rw.slba = cpu_to_le64(nvme_block_nr(ns, blk_rq_pos(req))); 632 cmnd->rw.length = cpu_to_le16((blk_rq_bytes(req) >> ns->lba_shift) - 1); 633 634 if (req_op(req) == REQ_OP_WRITE && ctrl->nr_streams) 635 nvme_assign_write_stream(ctrl, req, &control, &dsmgmt); 636 637 if (ns->ms) { 638 /* 639 * If formated with metadata, the block layer always provides a 640 * metadata buffer if CONFIG_BLK_DEV_INTEGRITY is enabled. Else 641 * we enable the PRACT bit for protection information or set the 642 * namespace capacity to zero to prevent any I/O. 643 */ 644 if (!blk_integrity_rq(req)) { 645 if (WARN_ON_ONCE(!nvme_ns_has_pi(ns))) 646 return BLK_STS_NOTSUPP; 647 control |= NVME_RW_PRINFO_PRACT; 648 } else if (req_op(req) == REQ_OP_WRITE) { 649 t10_pi_prepare(req, ns->pi_type); 650 } 651 652 switch (ns->pi_type) { 653 case NVME_NS_DPS_PI_TYPE3: 654 control |= NVME_RW_PRINFO_PRCHK_GUARD; 655 break; 656 case NVME_NS_DPS_PI_TYPE1: 657 case NVME_NS_DPS_PI_TYPE2: 658 control |= NVME_RW_PRINFO_PRCHK_GUARD | 659 NVME_RW_PRINFO_PRCHK_REF; 660 cmnd->rw.reftag = cpu_to_le32(t10_pi_ref_tag(req)); 661 break; 662 } 663 } 664 665 cmnd->rw.control = cpu_to_le16(control); 666 cmnd->rw.dsmgmt = cpu_to_le32(dsmgmt); 667 return 0; 668 } 669 670 void nvme_cleanup_cmd(struct request *req) 671 { 672 if (blk_integrity_rq(req) && req_op(req) == REQ_OP_READ && 673 nvme_req(req)->status == 0) { 674 struct nvme_ns *ns = req->rq_disk->private_data; 675 676 t10_pi_complete(req, ns->pi_type, 677 blk_rq_bytes(req) >> ns->lba_shift); 678 } 679 if (req->rq_flags & RQF_SPECIAL_PAYLOAD) { 680 struct nvme_ns *ns = req->rq_disk->private_data; 681 struct page *page = req->special_vec.bv_page; 682 683 if (page == ns->ctrl->discard_page) 684 clear_bit_unlock(0, &ns->ctrl->discard_page_busy); 685 else 686 kfree(page_address(page) + req->special_vec.bv_offset); 687 } 688 } 689 EXPORT_SYMBOL_GPL(nvme_cleanup_cmd); 690 691 blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req, 692 struct nvme_command *cmd) 693 { 694 blk_status_t ret = BLK_STS_OK; 695 696 nvme_clear_nvme_request(req); 697 698 memset(cmd, 0, sizeof(*cmd)); 699 switch (req_op(req)) { 700 case REQ_OP_DRV_IN: 701 case REQ_OP_DRV_OUT: 702 memcpy(cmd, nvme_req(req)->cmd, sizeof(*cmd)); 703 break; 704 case REQ_OP_FLUSH: 705 nvme_setup_flush(ns, cmd); 706 break; 707 case REQ_OP_WRITE_ZEROES: 708 /* currently only aliased to deallocate for a few ctrls: */ 709 case REQ_OP_DISCARD: 710 ret = nvme_setup_discard(ns, req, cmd); 711 break; 712 case REQ_OP_READ: 713 case REQ_OP_WRITE: 714 ret = nvme_setup_rw(ns, req, cmd); 715 break; 716 default: 717 WARN_ON_ONCE(1); 718 return BLK_STS_IOERR; 719 } 720 721 cmd->common.command_id = req->tag; 722 trace_nvme_setup_cmd(req, cmd); 723 return ret; 724 } 725 EXPORT_SYMBOL_GPL(nvme_setup_cmd); 726 727 static void nvme_end_sync_rq(struct request *rq, blk_status_t error) 728 { 729 struct completion *waiting = rq->end_io_data; 730 731 rq->end_io_data = NULL; 732 complete(waiting); 733 } 734 735 static void nvme_execute_rq_polled(struct request_queue *q, 736 struct gendisk *bd_disk, struct request *rq, int at_head) 737 { 738 DECLARE_COMPLETION_ONSTACK(wait); 739 740 WARN_ON_ONCE(!test_bit(QUEUE_FLAG_POLL, &q->queue_flags)); 741 742 rq->cmd_flags |= REQ_HIPRI; 743 rq->end_io_data = &wait; 744 blk_execute_rq_nowait(q, bd_disk, rq, at_head, nvme_end_sync_rq); 745 746 while (!completion_done(&wait)) { 747 blk_poll(q, request_to_qc_t(rq->mq_hctx, rq), true); 748 cond_resched(); 749 } 750 } 751 752 /* 753 * Returns 0 on success. If the result is negative, it's a Linux error code; 754 * if the result is positive, it's an NVM Express status code 755 */ 756 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 757 union nvme_result *result, void *buffer, unsigned bufflen, 758 unsigned timeout, int qid, int at_head, 759 blk_mq_req_flags_t flags, bool poll) 760 { 761 struct request *req; 762 int ret; 763 764 req = nvme_alloc_request(q, cmd, flags, qid); 765 if (IS_ERR(req)) 766 return PTR_ERR(req); 767 768 req->timeout = timeout ? timeout : ADMIN_TIMEOUT; 769 770 if (buffer && bufflen) { 771 ret = blk_rq_map_kern(q, req, buffer, bufflen, GFP_KERNEL); 772 if (ret) 773 goto out; 774 } 775 776 if (poll) 777 nvme_execute_rq_polled(req->q, NULL, req, at_head); 778 else 779 blk_execute_rq(req->q, NULL, req, at_head); 780 if (result) 781 *result = nvme_req(req)->result; 782 if (nvme_req(req)->flags & NVME_REQ_CANCELLED) 783 ret = -EINTR; 784 else 785 ret = nvme_req(req)->status; 786 out: 787 blk_mq_free_request(req); 788 return ret; 789 } 790 EXPORT_SYMBOL_GPL(__nvme_submit_sync_cmd); 791 792 int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, 793 void *buffer, unsigned bufflen) 794 { 795 return __nvme_submit_sync_cmd(q, cmd, NULL, buffer, bufflen, 0, 796 NVME_QID_ANY, 0, 0, false); 797 } 798 EXPORT_SYMBOL_GPL(nvme_submit_sync_cmd); 799 800 static void *nvme_add_user_metadata(struct bio *bio, void __user *ubuf, 801 unsigned len, u32 seed, bool write) 802 { 803 struct bio_integrity_payload *bip; 804 int ret = -ENOMEM; 805 void *buf; 806 807 buf = kmalloc(len, GFP_KERNEL); 808 if (!buf) 809 goto out; 810 811 ret = -EFAULT; 812 if (write && copy_from_user(buf, ubuf, len)) 813 goto out_free_meta; 814 815 bip = bio_integrity_alloc(bio, GFP_KERNEL, 1); 816 if (IS_ERR(bip)) { 817 ret = PTR_ERR(bip); 818 goto out_free_meta; 819 } 820 821 bip->bip_iter.bi_size = len; 822 bip->bip_iter.bi_sector = seed; 823 ret = bio_integrity_add_page(bio, virt_to_page(buf), len, 824 offset_in_page(buf)); 825 if (ret == len) 826 return buf; 827 ret = -ENOMEM; 828 out_free_meta: 829 kfree(buf); 830 out: 831 return ERR_PTR(ret); 832 } 833 834 static int nvme_submit_user_cmd(struct request_queue *q, 835 struct nvme_command *cmd, void __user *ubuffer, 836 unsigned bufflen, void __user *meta_buffer, unsigned meta_len, 837 u32 meta_seed, u32 *result, unsigned timeout) 838 { 839 bool write = nvme_is_write(cmd); 840 struct nvme_ns *ns = q->queuedata; 841 struct gendisk *disk = ns ? ns->disk : NULL; 842 struct request *req; 843 struct bio *bio = NULL; 844 void *meta = NULL; 845 int ret; 846 847 req = nvme_alloc_request(q, cmd, 0, NVME_QID_ANY); 848 if (IS_ERR(req)) 849 return PTR_ERR(req); 850 851 req->timeout = timeout ? timeout : ADMIN_TIMEOUT; 852 nvme_req(req)->flags |= NVME_REQ_USERCMD; 853 854 if (ubuffer && bufflen) { 855 ret = blk_rq_map_user(q, req, NULL, ubuffer, bufflen, 856 GFP_KERNEL); 857 if (ret) 858 goto out; 859 bio = req->bio; 860 bio->bi_disk = disk; 861 if (disk && meta_buffer && meta_len) { 862 meta = nvme_add_user_metadata(bio, meta_buffer, meta_len, 863 meta_seed, write); 864 if (IS_ERR(meta)) { 865 ret = PTR_ERR(meta); 866 goto out_unmap; 867 } 868 req->cmd_flags |= REQ_INTEGRITY; 869 } 870 } 871 872 blk_execute_rq(req->q, disk, req, 0); 873 if (nvme_req(req)->flags & NVME_REQ_CANCELLED) 874 ret = -EINTR; 875 else 876 ret = nvme_req(req)->status; 877 if (result) 878 *result = le32_to_cpu(nvme_req(req)->result.u32); 879 if (meta && !ret && !write) { 880 if (copy_to_user(meta_buffer, meta, meta_len)) 881 ret = -EFAULT; 882 } 883 kfree(meta); 884 out_unmap: 885 if (bio) 886 blk_rq_unmap_user(bio); 887 out: 888 blk_mq_free_request(req); 889 return ret; 890 } 891 892 static void nvme_keep_alive_end_io(struct request *rq, blk_status_t status) 893 { 894 struct nvme_ctrl *ctrl = rq->end_io_data; 895 unsigned long flags; 896 bool startka = false; 897 898 blk_mq_free_request(rq); 899 900 if (status) { 901 dev_err(ctrl->device, 902 "failed nvme_keep_alive_end_io error=%d\n", 903 status); 904 return; 905 } 906 907 ctrl->comp_seen = false; 908 spin_lock_irqsave(&ctrl->lock, flags); 909 if (ctrl->state == NVME_CTRL_LIVE || 910 ctrl->state == NVME_CTRL_CONNECTING) 911 startka = true; 912 spin_unlock_irqrestore(&ctrl->lock, flags); 913 if (startka) 914 schedule_delayed_work(&ctrl->ka_work, ctrl->kato * HZ); 915 } 916 917 static int nvme_keep_alive(struct nvme_ctrl *ctrl) 918 { 919 struct request *rq; 920 921 rq = nvme_alloc_request(ctrl->admin_q, &ctrl->ka_cmd, BLK_MQ_REQ_RESERVED, 922 NVME_QID_ANY); 923 if (IS_ERR(rq)) 924 return PTR_ERR(rq); 925 926 rq->timeout = ctrl->kato * HZ; 927 rq->end_io_data = ctrl; 928 929 blk_execute_rq_nowait(rq->q, NULL, rq, 0, nvme_keep_alive_end_io); 930 931 return 0; 932 } 933 934 static void nvme_keep_alive_work(struct work_struct *work) 935 { 936 struct nvme_ctrl *ctrl = container_of(to_delayed_work(work), 937 struct nvme_ctrl, ka_work); 938 bool comp_seen = ctrl->comp_seen; 939 940 if ((ctrl->ctratt & NVME_CTRL_ATTR_TBKAS) && comp_seen) { 941 dev_dbg(ctrl->device, 942 "reschedule traffic based keep-alive timer\n"); 943 ctrl->comp_seen = false; 944 schedule_delayed_work(&ctrl->ka_work, ctrl->kato * HZ); 945 return; 946 } 947 948 if (nvme_keep_alive(ctrl)) { 949 /* allocation failure, reset the controller */ 950 dev_err(ctrl->device, "keep-alive failed\n"); 951 nvme_reset_ctrl(ctrl); 952 return; 953 } 954 } 955 956 static void nvme_start_keep_alive(struct nvme_ctrl *ctrl) 957 { 958 if (unlikely(ctrl->kato == 0)) 959 return; 960 961 schedule_delayed_work(&ctrl->ka_work, ctrl->kato * HZ); 962 } 963 964 void nvme_stop_keep_alive(struct nvme_ctrl *ctrl) 965 { 966 if (unlikely(ctrl->kato == 0)) 967 return; 968 969 cancel_delayed_work_sync(&ctrl->ka_work); 970 } 971 EXPORT_SYMBOL_GPL(nvme_stop_keep_alive); 972 973 static int nvme_identify_ctrl(struct nvme_ctrl *dev, struct nvme_id_ctrl **id) 974 { 975 struct nvme_command c = { }; 976 int error; 977 978 /* gcc-4.4.4 (at least) has issues with initializers and anon unions */ 979 c.identify.opcode = nvme_admin_identify; 980 c.identify.cns = NVME_ID_CNS_CTRL; 981 982 *id = kmalloc(sizeof(struct nvme_id_ctrl), GFP_KERNEL); 983 if (!*id) 984 return -ENOMEM; 985 986 error = nvme_submit_sync_cmd(dev->admin_q, &c, *id, 987 sizeof(struct nvme_id_ctrl)); 988 if (error) 989 kfree(*id); 990 return error; 991 } 992 993 static int nvme_identify_ns_descs(struct nvme_ctrl *ctrl, unsigned nsid, 994 struct nvme_ns_ids *ids) 995 { 996 struct nvme_command c = { }; 997 int status; 998 void *data; 999 int pos; 1000 int len; 1001 1002 c.identify.opcode = nvme_admin_identify; 1003 c.identify.nsid = cpu_to_le32(nsid); 1004 c.identify.cns = NVME_ID_CNS_NS_DESC_LIST; 1005 1006 data = kzalloc(NVME_IDENTIFY_DATA_SIZE, GFP_KERNEL); 1007 if (!data) 1008 return -ENOMEM; 1009 1010 status = nvme_submit_sync_cmd(ctrl->admin_q, &c, data, 1011 NVME_IDENTIFY_DATA_SIZE); 1012 if (status) 1013 goto free_data; 1014 1015 for (pos = 0; pos < NVME_IDENTIFY_DATA_SIZE; pos += len) { 1016 struct nvme_ns_id_desc *cur = data + pos; 1017 1018 if (cur->nidl == 0) 1019 break; 1020 1021 switch (cur->nidt) { 1022 case NVME_NIDT_EUI64: 1023 if (cur->nidl != NVME_NIDT_EUI64_LEN) { 1024 dev_warn(ctrl->device, 1025 "ctrl returned bogus length: %d for NVME_NIDT_EUI64\n", 1026 cur->nidl); 1027 goto free_data; 1028 } 1029 len = NVME_NIDT_EUI64_LEN; 1030 memcpy(ids->eui64, data + pos + sizeof(*cur), len); 1031 break; 1032 case NVME_NIDT_NGUID: 1033 if (cur->nidl != NVME_NIDT_NGUID_LEN) { 1034 dev_warn(ctrl->device, 1035 "ctrl returned bogus length: %d for NVME_NIDT_NGUID\n", 1036 cur->nidl); 1037 goto free_data; 1038 } 1039 len = NVME_NIDT_NGUID_LEN; 1040 memcpy(ids->nguid, data + pos + sizeof(*cur), len); 1041 break; 1042 case NVME_NIDT_UUID: 1043 if (cur->nidl != NVME_NIDT_UUID_LEN) { 1044 dev_warn(ctrl->device, 1045 "ctrl returned bogus length: %d for NVME_NIDT_UUID\n", 1046 cur->nidl); 1047 goto free_data; 1048 } 1049 len = NVME_NIDT_UUID_LEN; 1050 uuid_copy(&ids->uuid, data + pos + sizeof(*cur)); 1051 break; 1052 default: 1053 /* Skip unknown types */ 1054 len = cur->nidl; 1055 break; 1056 } 1057 1058 len += sizeof(*cur); 1059 } 1060 free_data: 1061 kfree(data); 1062 return status; 1063 } 1064 1065 static int nvme_identify_ns_list(struct nvme_ctrl *dev, unsigned nsid, __le32 *ns_list) 1066 { 1067 struct nvme_command c = { }; 1068 1069 c.identify.opcode = nvme_admin_identify; 1070 c.identify.cns = NVME_ID_CNS_NS_ACTIVE_LIST; 1071 c.identify.nsid = cpu_to_le32(nsid); 1072 return nvme_submit_sync_cmd(dev->admin_q, &c, ns_list, 1073 NVME_IDENTIFY_DATA_SIZE); 1074 } 1075 1076 static struct nvme_id_ns *nvme_identify_ns(struct nvme_ctrl *ctrl, 1077 unsigned nsid) 1078 { 1079 struct nvme_id_ns *id; 1080 struct nvme_command c = { }; 1081 int error; 1082 1083 /* gcc-4.4.4 (at least) has issues with initializers and anon unions */ 1084 c.identify.opcode = nvme_admin_identify; 1085 c.identify.nsid = cpu_to_le32(nsid); 1086 c.identify.cns = NVME_ID_CNS_NS; 1087 1088 id = kmalloc(sizeof(*id), GFP_KERNEL); 1089 if (!id) 1090 return NULL; 1091 1092 error = nvme_submit_sync_cmd(ctrl->admin_q, &c, id, sizeof(*id)); 1093 if (error) { 1094 dev_warn(ctrl->device, "Identify namespace failed\n"); 1095 kfree(id); 1096 return NULL; 1097 } 1098 1099 return id; 1100 } 1101 1102 static int nvme_set_features(struct nvme_ctrl *dev, unsigned fid, unsigned dword11, 1103 void *buffer, size_t buflen, u32 *result) 1104 { 1105 struct nvme_command c; 1106 union nvme_result res; 1107 int ret; 1108 1109 memset(&c, 0, sizeof(c)); 1110 c.features.opcode = nvme_admin_set_features; 1111 c.features.fid = cpu_to_le32(fid); 1112 c.features.dword11 = cpu_to_le32(dword11); 1113 1114 ret = __nvme_submit_sync_cmd(dev->admin_q, &c, &res, 1115 buffer, buflen, 0, NVME_QID_ANY, 0, 0, false); 1116 if (ret >= 0 && result) 1117 *result = le32_to_cpu(res.u32); 1118 return ret; 1119 } 1120 1121 int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count) 1122 { 1123 u32 q_count = (*count - 1) | ((*count - 1) << 16); 1124 u32 result; 1125 int status, nr_io_queues; 1126 1127 status = nvme_set_features(ctrl, NVME_FEAT_NUM_QUEUES, q_count, NULL, 0, 1128 &result); 1129 if (status < 0) 1130 return status; 1131 1132 /* 1133 * Degraded controllers might return an error when setting the queue 1134 * count. We still want to be able to bring them online and offer 1135 * access to the admin queue, as that might be only way to fix them up. 1136 */ 1137 if (status > 0) { 1138 dev_err(ctrl->device, "Could not set queue count (%d)\n", status); 1139 *count = 0; 1140 } else { 1141 nr_io_queues = min(result & 0xffff, result >> 16) + 1; 1142 *count = min(*count, nr_io_queues); 1143 } 1144 1145 return 0; 1146 } 1147 EXPORT_SYMBOL_GPL(nvme_set_queue_count); 1148 1149 #define NVME_AEN_SUPPORTED \ 1150 (NVME_AEN_CFG_NS_ATTR | NVME_AEN_CFG_FW_ACT | NVME_AEN_CFG_ANA_CHANGE) 1151 1152 static void nvme_enable_aen(struct nvme_ctrl *ctrl) 1153 { 1154 u32 result, supported_aens = ctrl->oaes & NVME_AEN_SUPPORTED; 1155 int status; 1156 1157 if (!supported_aens) 1158 return; 1159 1160 status = nvme_set_features(ctrl, NVME_FEAT_ASYNC_EVENT, supported_aens, 1161 NULL, 0, &result); 1162 if (status) 1163 dev_warn(ctrl->device, "Failed to configure AEN (cfg %x)\n", 1164 supported_aens); 1165 } 1166 1167 static int nvme_submit_io(struct nvme_ns *ns, struct nvme_user_io __user *uio) 1168 { 1169 struct nvme_user_io io; 1170 struct nvme_command c; 1171 unsigned length, meta_len; 1172 void __user *metadata; 1173 1174 if (copy_from_user(&io, uio, sizeof(io))) 1175 return -EFAULT; 1176 if (io.flags) 1177 return -EINVAL; 1178 1179 switch (io.opcode) { 1180 case nvme_cmd_write: 1181 case nvme_cmd_read: 1182 case nvme_cmd_compare: 1183 break; 1184 default: 1185 return -EINVAL; 1186 } 1187 1188 length = (io.nblocks + 1) << ns->lba_shift; 1189 meta_len = (io.nblocks + 1) * ns->ms; 1190 metadata = (void __user *)(uintptr_t)io.metadata; 1191 1192 if (ns->ext) { 1193 length += meta_len; 1194 meta_len = 0; 1195 } else if (meta_len) { 1196 if ((io.metadata & 3) || !io.metadata) 1197 return -EINVAL; 1198 } 1199 1200 memset(&c, 0, sizeof(c)); 1201 c.rw.opcode = io.opcode; 1202 c.rw.flags = io.flags; 1203 c.rw.nsid = cpu_to_le32(ns->head->ns_id); 1204 c.rw.slba = cpu_to_le64(io.slba); 1205 c.rw.length = cpu_to_le16(io.nblocks); 1206 c.rw.control = cpu_to_le16(io.control); 1207 c.rw.dsmgmt = cpu_to_le32(io.dsmgmt); 1208 c.rw.reftag = cpu_to_le32(io.reftag); 1209 c.rw.apptag = cpu_to_le16(io.apptag); 1210 c.rw.appmask = cpu_to_le16(io.appmask); 1211 1212 return nvme_submit_user_cmd(ns->queue, &c, 1213 (void __user *)(uintptr_t)io.addr, length, 1214 metadata, meta_len, lower_32_bits(io.slba), NULL, 0); 1215 } 1216 1217 static u32 nvme_known_admin_effects(u8 opcode) 1218 { 1219 switch (opcode) { 1220 case nvme_admin_format_nvm: 1221 return NVME_CMD_EFFECTS_CSUPP | NVME_CMD_EFFECTS_LBCC | 1222 NVME_CMD_EFFECTS_CSE_MASK; 1223 case nvme_admin_sanitize_nvm: 1224 return NVME_CMD_EFFECTS_CSE_MASK; 1225 default: 1226 break; 1227 } 1228 return 0; 1229 } 1230 1231 static u32 nvme_passthru_start(struct nvme_ctrl *ctrl, struct nvme_ns *ns, 1232 u8 opcode) 1233 { 1234 u32 effects = 0; 1235 1236 if (ns) { 1237 if (ctrl->effects) 1238 effects = le32_to_cpu(ctrl->effects->iocs[opcode]); 1239 if (effects & ~NVME_CMD_EFFECTS_CSUPP) 1240 dev_warn(ctrl->device, 1241 "IO command:%02x has unhandled effects:%08x\n", 1242 opcode, effects); 1243 return 0; 1244 } 1245 1246 if (ctrl->effects) 1247 effects = le32_to_cpu(ctrl->effects->acs[opcode]); 1248 else 1249 effects = nvme_known_admin_effects(opcode); 1250 1251 /* 1252 * For simplicity, IO to all namespaces is quiesced even if the command 1253 * effects say only one namespace is affected. 1254 */ 1255 if (effects & (NVME_CMD_EFFECTS_LBCC | NVME_CMD_EFFECTS_CSE_MASK)) { 1256 mutex_lock(&ctrl->scan_lock); 1257 nvme_start_freeze(ctrl); 1258 nvme_wait_freeze(ctrl); 1259 } 1260 return effects; 1261 } 1262 1263 static void nvme_update_formats(struct nvme_ctrl *ctrl) 1264 { 1265 struct nvme_ns *ns; 1266 1267 down_read(&ctrl->namespaces_rwsem); 1268 list_for_each_entry(ns, &ctrl->namespaces, list) 1269 if (ns->disk && nvme_revalidate_disk(ns->disk)) 1270 nvme_set_queue_dying(ns); 1271 up_read(&ctrl->namespaces_rwsem); 1272 1273 nvme_remove_invalid_namespaces(ctrl, NVME_NSID_ALL); 1274 } 1275 1276 static void nvme_passthru_end(struct nvme_ctrl *ctrl, u32 effects) 1277 { 1278 /* 1279 * Revalidate LBA changes prior to unfreezing. This is necessary to 1280 * prevent memory corruption if a logical block size was changed by 1281 * this command. 1282 */ 1283 if (effects & NVME_CMD_EFFECTS_LBCC) 1284 nvme_update_formats(ctrl); 1285 if (effects & (NVME_CMD_EFFECTS_LBCC | NVME_CMD_EFFECTS_CSE_MASK)) { 1286 nvme_unfreeze(ctrl); 1287 mutex_unlock(&ctrl->scan_lock); 1288 } 1289 if (effects & NVME_CMD_EFFECTS_CCC) 1290 nvme_init_identify(ctrl); 1291 if (effects & (NVME_CMD_EFFECTS_NIC | NVME_CMD_EFFECTS_NCC)) 1292 nvme_queue_scan(ctrl); 1293 } 1294 1295 static int nvme_user_cmd(struct nvme_ctrl *ctrl, struct nvme_ns *ns, 1296 struct nvme_passthru_cmd __user *ucmd) 1297 { 1298 struct nvme_passthru_cmd cmd; 1299 struct nvme_command c; 1300 unsigned timeout = 0; 1301 u32 effects; 1302 int status; 1303 1304 if (!capable(CAP_SYS_ADMIN)) 1305 return -EACCES; 1306 if (copy_from_user(&cmd, ucmd, sizeof(cmd))) 1307 return -EFAULT; 1308 if (cmd.flags) 1309 return -EINVAL; 1310 1311 memset(&c, 0, sizeof(c)); 1312 c.common.opcode = cmd.opcode; 1313 c.common.flags = cmd.flags; 1314 c.common.nsid = cpu_to_le32(cmd.nsid); 1315 c.common.cdw2[0] = cpu_to_le32(cmd.cdw2); 1316 c.common.cdw2[1] = cpu_to_le32(cmd.cdw3); 1317 c.common.cdw10 = cpu_to_le32(cmd.cdw10); 1318 c.common.cdw11 = cpu_to_le32(cmd.cdw11); 1319 c.common.cdw12 = cpu_to_le32(cmd.cdw12); 1320 c.common.cdw13 = cpu_to_le32(cmd.cdw13); 1321 c.common.cdw14 = cpu_to_le32(cmd.cdw14); 1322 c.common.cdw15 = cpu_to_le32(cmd.cdw15); 1323 1324 if (cmd.timeout_ms) 1325 timeout = msecs_to_jiffies(cmd.timeout_ms); 1326 1327 effects = nvme_passthru_start(ctrl, ns, cmd.opcode); 1328 status = nvme_submit_user_cmd(ns ? ns->queue : ctrl->admin_q, &c, 1329 (void __user *)(uintptr_t)cmd.addr, cmd.data_len, 1330 (void __user *)(uintptr_t)cmd.metadata, cmd.metadata_len, 1331 0, &cmd.result, timeout); 1332 nvme_passthru_end(ctrl, effects); 1333 1334 if (status >= 0) { 1335 if (put_user(cmd.result, &ucmd->result)) 1336 return -EFAULT; 1337 } 1338 1339 return status; 1340 } 1341 1342 /* 1343 * Issue ioctl requests on the first available path. Note that unlike normal 1344 * block layer requests we will not retry failed request on another controller. 1345 */ 1346 static struct nvme_ns *nvme_get_ns_from_disk(struct gendisk *disk, 1347 struct nvme_ns_head **head, int *srcu_idx) 1348 { 1349 #ifdef CONFIG_NVME_MULTIPATH 1350 if (disk->fops == &nvme_ns_head_ops) { 1351 *head = disk->private_data; 1352 *srcu_idx = srcu_read_lock(&(*head)->srcu); 1353 return nvme_find_path(*head); 1354 } 1355 #endif 1356 *head = NULL; 1357 *srcu_idx = -1; 1358 return disk->private_data; 1359 } 1360 1361 static void nvme_put_ns_from_disk(struct nvme_ns_head *head, int idx) 1362 { 1363 if (head) 1364 srcu_read_unlock(&head->srcu, idx); 1365 } 1366 1367 static int nvme_ns_ioctl(struct nvme_ns *ns, unsigned cmd, unsigned long arg) 1368 { 1369 switch (cmd) { 1370 case NVME_IOCTL_ID: 1371 force_successful_syscall_return(); 1372 return ns->head->ns_id; 1373 case NVME_IOCTL_ADMIN_CMD: 1374 return nvme_user_cmd(ns->ctrl, NULL, (void __user *)arg); 1375 case NVME_IOCTL_IO_CMD: 1376 return nvme_user_cmd(ns->ctrl, ns, (void __user *)arg); 1377 case NVME_IOCTL_SUBMIT_IO: 1378 return nvme_submit_io(ns, (void __user *)arg); 1379 default: 1380 #ifdef CONFIG_NVM 1381 if (ns->ndev) 1382 return nvme_nvm_ioctl(ns, cmd, arg); 1383 #endif 1384 if (is_sed_ioctl(cmd)) 1385 return sed_ioctl(ns->ctrl->opal_dev, cmd, 1386 (void __user *) arg); 1387 return -ENOTTY; 1388 } 1389 } 1390 1391 static int nvme_ioctl(struct block_device *bdev, fmode_t mode, 1392 unsigned int cmd, unsigned long arg) 1393 { 1394 struct nvme_ns_head *head = NULL; 1395 struct nvme_ns *ns; 1396 int srcu_idx, ret; 1397 1398 ns = nvme_get_ns_from_disk(bdev->bd_disk, &head, &srcu_idx); 1399 if (unlikely(!ns)) 1400 ret = -EWOULDBLOCK; 1401 else 1402 ret = nvme_ns_ioctl(ns, cmd, arg); 1403 nvme_put_ns_from_disk(head, srcu_idx); 1404 return ret; 1405 } 1406 1407 static int nvme_open(struct block_device *bdev, fmode_t mode) 1408 { 1409 struct nvme_ns *ns = bdev->bd_disk->private_data; 1410 1411 #ifdef CONFIG_NVME_MULTIPATH 1412 /* should never be called due to GENHD_FL_HIDDEN */ 1413 if (WARN_ON_ONCE(ns->head->disk)) 1414 goto fail; 1415 #endif 1416 if (!kref_get_unless_zero(&ns->kref)) 1417 goto fail; 1418 if (!try_module_get(ns->ctrl->ops->module)) 1419 goto fail_put_ns; 1420 1421 return 0; 1422 1423 fail_put_ns: 1424 nvme_put_ns(ns); 1425 fail: 1426 return -ENXIO; 1427 } 1428 1429 static void nvme_release(struct gendisk *disk, fmode_t mode) 1430 { 1431 struct nvme_ns *ns = disk->private_data; 1432 1433 module_put(ns->ctrl->ops->module); 1434 nvme_put_ns(ns); 1435 } 1436 1437 static int nvme_getgeo(struct block_device *bdev, struct hd_geometry *geo) 1438 { 1439 /* some standard values */ 1440 geo->heads = 1 << 6; 1441 geo->sectors = 1 << 5; 1442 geo->cylinders = get_capacity(bdev->bd_disk) >> 11; 1443 return 0; 1444 } 1445 1446 #ifdef CONFIG_BLK_DEV_INTEGRITY 1447 static void nvme_init_integrity(struct gendisk *disk, u16 ms, u8 pi_type) 1448 { 1449 struct blk_integrity integrity; 1450 1451 memset(&integrity, 0, sizeof(integrity)); 1452 switch (pi_type) { 1453 case NVME_NS_DPS_PI_TYPE3: 1454 integrity.profile = &t10_pi_type3_crc; 1455 integrity.tag_size = sizeof(u16) + sizeof(u32); 1456 integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE; 1457 break; 1458 case NVME_NS_DPS_PI_TYPE1: 1459 case NVME_NS_DPS_PI_TYPE2: 1460 integrity.profile = &t10_pi_type1_crc; 1461 integrity.tag_size = sizeof(u16); 1462 integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE; 1463 break; 1464 default: 1465 integrity.profile = NULL; 1466 break; 1467 } 1468 integrity.tuple_size = ms; 1469 blk_integrity_register(disk, &integrity); 1470 blk_queue_max_integrity_segments(disk->queue, 1); 1471 } 1472 #else 1473 static void nvme_init_integrity(struct gendisk *disk, u16 ms, u8 pi_type) 1474 { 1475 } 1476 #endif /* CONFIG_BLK_DEV_INTEGRITY */ 1477 1478 static void nvme_set_chunk_size(struct nvme_ns *ns) 1479 { 1480 u32 chunk_size = (((u32)ns->noiob) << (ns->lba_shift - 9)); 1481 blk_queue_chunk_sectors(ns->queue, rounddown_pow_of_two(chunk_size)); 1482 } 1483 1484 static void nvme_config_discard(struct nvme_ns *ns) 1485 { 1486 struct nvme_ctrl *ctrl = ns->ctrl; 1487 struct request_queue *queue = ns->queue; 1488 u32 size = queue_logical_block_size(queue); 1489 1490 if (!(ctrl->oncs & NVME_CTRL_ONCS_DSM)) { 1491 blk_queue_flag_clear(QUEUE_FLAG_DISCARD, queue); 1492 return; 1493 } 1494 1495 if (ctrl->nr_streams && ns->sws && ns->sgs) 1496 size *= ns->sws * ns->sgs; 1497 1498 BUILD_BUG_ON(PAGE_SIZE / sizeof(struct nvme_dsm_range) < 1499 NVME_DSM_MAX_RANGES); 1500 1501 queue->limits.discard_alignment = 0; 1502 queue->limits.discard_granularity = size; 1503 1504 /* If discard is already enabled, don't reset queue limits */ 1505 if (blk_queue_flag_test_and_set(QUEUE_FLAG_DISCARD, queue)) 1506 return; 1507 1508 blk_queue_max_discard_sectors(queue, UINT_MAX); 1509 blk_queue_max_discard_segments(queue, NVME_DSM_MAX_RANGES); 1510 1511 if (ctrl->quirks & NVME_QUIRK_DEALLOCATE_ZEROES) 1512 blk_queue_max_write_zeroes_sectors(queue, UINT_MAX); 1513 } 1514 1515 static void nvme_report_ns_ids(struct nvme_ctrl *ctrl, unsigned int nsid, 1516 struct nvme_id_ns *id, struct nvme_ns_ids *ids) 1517 { 1518 memset(ids, 0, sizeof(*ids)); 1519 1520 if (ctrl->vs >= NVME_VS(1, 1, 0)) 1521 memcpy(ids->eui64, id->eui64, sizeof(id->eui64)); 1522 if (ctrl->vs >= NVME_VS(1, 2, 0)) 1523 memcpy(ids->nguid, id->nguid, sizeof(id->nguid)); 1524 if (ctrl->vs >= NVME_VS(1, 3, 0)) { 1525 /* Don't treat error as fatal we potentially 1526 * already have a NGUID or EUI-64 1527 */ 1528 if (nvme_identify_ns_descs(ctrl, nsid, ids)) 1529 dev_warn(ctrl->device, 1530 "%s: Identify Descriptors failed\n", __func__); 1531 } 1532 } 1533 1534 static bool nvme_ns_ids_valid(struct nvme_ns_ids *ids) 1535 { 1536 return !uuid_is_null(&ids->uuid) || 1537 memchr_inv(ids->nguid, 0, sizeof(ids->nguid)) || 1538 memchr_inv(ids->eui64, 0, sizeof(ids->eui64)); 1539 } 1540 1541 static bool nvme_ns_ids_equal(struct nvme_ns_ids *a, struct nvme_ns_ids *b) 1542 { 1543 return uuid_equal(&a->uuid, &b->uuid) && 1544 memcmp(&a->nguid, &b->nguid, sizeof(a->nguid)) == 0 && 1545 memcmp(&a->eui64, &b->eui64, sizeof(a->eui64)) == 0; 1546 } 1547 1548 static void nvme_update_disk_info(struct gendisk *disk, 1549 struct nvme_ns *ns, struct nvme_id_ns *id) 1550 { 1551 sector_t capacity = le64_to_cpup(&id->nsze) << (ns->lba_shift - 9); 1552 unsigned short bs = 1 << ns->lba_shift; 1553 1554 blk_mq_freeze_queue(disk->queue); 1555 blk_integrity_unregister(disk); 1556 1557 blk_queue_logical_block_size(disk->queue, bs); 1558 blk_queue_physical_block_size(disk->queue, bs); 1559 blk_queue_io_min(disk->queue, bs); 1560 1561 if (ns->ms && !ns->ext && 1562 (ns->ctrl->ops->flags & NVME_F_METADATA_SUPPORTED)) 1563 nvme_init_integrity(disk, ns->ms, ns->pi_type); 1564 if (ns->ms && !nvme_ns_has_pi(ns) && !blk_get_integrity(disk)) 1565 capacity = 0; 1566 1567 set_capacity(disk, capacity); 1568 nvme_config_discard(ns); 1569 1570 if (id->nsattr & (1 << 0)) 1571 set_disk_ro(disk, true); 1572 else 1573 set_disk_ro(disk, false); 1574 1575 blk_mq_unfreeze_queue(disk->queue); 1576 } 1577 1578 static void __nvme_revalidate_disk(struct gendisk *disk, struct nvme_id_ns *id) 1579 { 1580 struct nvme_ns *ns = disk->private_data; 1581 1582 /* 1583 * If identify namespace failed, use default 512 byte block size so 1584 * block layer can use before failing read/write for 0 capacity. 1585 */ 1586 ns->lba_shift = id->lbaf[id->flbas & NVME_NS_FLBAS_LBA_MASK].ds; 1587 if (ns->lba_shift == 0) 1588 ns->lba_shift = 9; 1589 ns->noiob = le16_to_cpu(id->noiob); 1590 ns->ms = le16_to_cpu(id->lbaf[id->flbas & NVME_NS_FLBAS_LBA_MASK].ms); 1591 ns->ext = ns->ms && (id->flbas & NVME_NS_FLBAS_META_EXT); 1592 /* the PI implementation requires metadata equal t10 pi tuple size */ 1593 if (ns->ms == sizeof(struct t10_pi_tuple)) 1594 ns->pi_type = id->dps & NVME_NS_DPS_PI_MASK; 1595 else 1596 ns->pi_type = 0; 1597 1598 if (ns->noiob) 1599 nvme_set_chunk_size(ns); 1600 nvme_update_disk_info(disk, ns, id); 1601 #ifdef CONFIG_NVME_MULTIPATH 1602 if (ns->head->disk) { 1603 nvme_update_disk_info(ns->head->disk, ns, id); 1604 blk_queue_stack_limits(ns->head->disk->queue, ns->queue); 1605 } 1606 #endif 1607 } 1608 1609 static int nvme_revalidate_disk(struct gendisk *disk) 1610 { 1611 struct nvme_ns *ns = disk->private_data; 1612 struct nvme_ctrl *ctrl = ns->ctrl; 1613 struct nvme_id_ns *id; 1614 struct nvme_ns_ids ids; 1615 int ret = 0; 1616 1617 if (test_bit(NVME_NS_DEAD, &ns->flags)) { 1618 set_capacity(disk, 0); 1619 return -ENODEV; 1620 } 1621 1622 id = nvme_identify_ns(ctrl, ns->head->ns_id); 1623 if (!id) 1624 return -ENODEV; 1625 1626 if (id->ncap == 0) { 1627 ret = -ENODEV; 1628 goto out; 1629 } 1630 1631 __nvme_revalidate_disk(disk, id); 1632 nvme_report_ns_ids(ctrl, ns->head->ns_id, id, &ids); 1633 if (!nvme_ns_ids_equal(&ns->head->ids, &ids)) { 1634 dev_err(ctrl->device, 1635 "identifiers changed for nsid %d\n", ns->head->ns_id); 1636 ret = -ENODEV; 1637 } 1638 1639 out: 1640 kfree(id); 1641 return ret; 1642 } 1643 1644 static char nvme_pr_type(enum pr_type type) 1645 { 1646 switch (type) { 1647 case PR_WRITE_EXCLUSIVE: 1648 return 1; 1649 case PR_EXCLUSIVE_ACCESS: 1650 return 2; 1651 case PR_WRITE_EXCLUSIVE_REG_ONLY: 1652 return 3; 1653 case PR_EXCLUSIVE_ACCESS_REG_ONLY: 1654 return 4; 1655 case PR_WRITE_EXCLUSIVE_ALL_REGS: 1656 return 5; 1657 case PR_EXCLUSIVE_ACCESS_ALL_REGS: 1658 return 6; 1659 default: 1660 return 0; 1661 } 1662 }; 1663 1664 static int nvme_pr_command(struct block_device *bdev, u32 cdw10, 1665 u64 key, u64 sa_key, u8 op) 1666 { 1667 struct nvme_ns_head *head = NULL; 1668 struct nvme_ns *ns; 1669 struct nvme_command c; 1670 int srcu_idx, ret; 1671 u8 data[16] = { 0, }; 1672 1673 ns = nvme_get_ns_from_disk(bdev->bd_disk, &head, &srcu_idx); 1674 if (unlikely(!ns)) 1675 return -EWOULDBLOCK; 1676 1677 put_unaligned_le64(key, &data[0]); 1678 put_unaligned_le64(sa_key, &data[8]); 1679 1680 memset(&c, 0, sizeof(c)); 1681 c.common.opcode = op; 1682 c.common.nsid = cpu_to_le32(ns->head->ns_id); 1683 c.common.cdw10 = cpu_to_le32(cdw10); 1684 1685 ret = nvme_submit_sync_cmd(ns->queue, &c, data, 16); 1686 nvme_put_ns_from_disk(head, srcu_idx); 1687 return ret; 1688 } 1689 1690 static int nvme_pr_register(struct block_device *bdev, u64 old, 1691 u64 new, unsigned flags) 1692 { 1693 u32 cdw10; 1694 1695 if (flags & ~PR_FL_IGNORE_KEY) 1696 return -EOPNOTSUPP; 1697 1698 cdw10 = old ? 2 : 0; 1699 cdw10 |= (flags & PR_FL_IGNORE_KEY) ? 1 << 3 : 0; 1700 cdw10 |= (1 << 30) | (1 << 31); /* PTPL=1 */ 1701 return nvme_pr_command(bdev, cdw10, old, new, nvme_cmd_resv_register); 1702 } 1703 1704 static int nvme_pr_reserve(struct block_device *bdev, u64 key, 1705 enum pr_type type, unsigned flags) 1706 { 1707 u32 cdw10; 1708 1709 if (flags & ~PR_FL_IGNORE_KEY) 1710 return -EOPNOTSUPP; 1711 1712 cdw10 = nvme_pr_type(type) << 8; 1713 cdw10 |= ((flags & PR_FL_IGNORE_KEY) ? 1 << 3 : 0); 1714 return nvme_pr_command(bdev, cdw10, key, 0, nvme_cmd_resv_acquire); 1715 } 1716 1717 static int nvme_pr_preempt(struct block_device *bdev, u64 old, u64 new, 1718 enum pr_type type, bool abort) 1719 { 1720 u32 cdw10 = nvme_pr_type(type) << 8 | (abort ? 2 : 1); 1721 return nvme_pr_command(bdev, cdw10, old, new, nvme_cmd_resv_acquire); 1722 } 1723 1724 static int nvme_pr_clear(struct block_device *bdev, u64 key) 1725 { 1726 u32 cdw10 = 1 | (key ? 1 << 3 : 0); 1727 return nvme_pr_command(bdev, cdw10, key, 0, nvme_cmd_resv_register); 1728 } 1729 1730 static int nvme_pr_release(struct block_device *bdev, u64 key, enum pr_type type) 1731 { 1732 u32 cdw10 = nvme_pr_type(type) << 8 | (key ? 1 << 3 : 0); 1733 return nvme_pr_command(bdev, cdw10, key, 0, nvme_cmd_resv_release); 1734 } 1735 1736 static const struct pr_ops nvme_pr_ops = { 1737 .pr_register = nvme_pr_register, 1738 .pr_reserve = nvme_pr_reserve, 1739 .pr_release = nvme_pr_release, 1740 .pr_preempt = nvme_pr_preempt, 1741 .pr_clear = nvme_pr_clear, 1742 }; 1743 1744 #ifdef CONFIG_BLK_SED_OPAL 1745 int nvme_sec_submit(void *data, u16 spsp, u8 secp, void *buffer, size_t len, 1746 bool send) 1747 { 1748 struct nvme_ctrl *ctrl = data; 1749 struct nvme_command cmd; 1750 1751 memset(&cmd, 0, sizeof(cmd)); 1752 if (send) 1753 cmd.common.opcode = nvme_admin_security_send; 1754 else 1755 cmd.common.opcode = nvme_admin_security_recv; 1756 cmd.common.nsid = 0; 1757 cmd.common.cdw10 = cpu_to_le32(((u32)secp) << 24 | ((u32)spsp) << 8); 1758 cmd.common.cdw11 = cpu_to_le32(len); 1759 1760 return __nvme_submit_sync_cmd(ctrl->admin_q, &cmd, NULL, buffer, len, 1761 ADMIN_TIMEOUT, NVME_QID_ANY, 1, 0, false); 1762 } 1763 EXPORT_SYMBOL_GPL(nvme_sec_submit); 1764 #endif /* CONFIG_BLK_SED_OPAL */ 1765 1766 static const struct block_device_operations nvme_fops = { 1767 .owner = THIS_MODULE, 1768 .ioctl = nvme_ioctl, 1769 .compat_ioctl = nvme_ioctl, 1770 .open = nvme_open, 1771 .release = nvme_release, 1772 .getgeo = nvme_getgeo, 1773 .revalidate_disk= nvme_revalidate_disk, 1774 .pr_ops = &nvme_pr_ops, 1775 }; 1776 1777 #ifdef CONFIG_NVME_MULTIPATH 1778 static int nvme_ns_head_open(struct block_device *bdev, fmode_t mode) 1779 { 1780 struct nvme_ns_head *head = bdev->bd_disk->private_data; 1781 1782 if (!kref_get_unless_zero(&head->ref)) 1783 return -ENXIO; 1784 return 0; 1785 } 1786 1787 static void nvme_ns_head_release(struct gendisk *disk, fmode_t mode) 1788 { 1789 nvme_put_ns_head(disk->private_data); 1790 } 1791 1792 const struct block_device_operations nvme_ns_head_ops = { 1793 .owner = THIS_MODULE, 1794 .open = nvme_ns_head_open, 1795 .release = nvme_ns_head_release, 1796 .ioctl = nvme_ioctl, 1797 .compat_ioctl = nvme_ioctl, 1798 .getgeo = nvme_getgeo, 1799 .pr_ops = &nvme_pr_ops, 1800 }; 1801 #endif /* CONFIG_NVME_MULTIPATH */ 1802 1803 static int nvme_wait_ready(struct nvme_ctrl *ctrl, u64 cap, bool enabled) 1804 { 1805 unsigned long timeout = 1806 ((NVME_CAP_TIMEOUT(cap) + 1) * HZ / 2) + jiffies; 1807 u32 csts, bit = enabled ? NVME_CSTS_RDY : 0; 1808 int ret; 1809 1810 while ((ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts)) == 0) { 1811 if (csts == ~0) 1812 return -ENODEV; 1813 if ((csts & NVME_CSTS_RDY) == bit) 1814 break; 1815 1816 msleep(100); 1817 if (fatal_signal_pending(current)) 1818 return -EINTR; 1819 if (time_after(jiffies, timeout)) { 1820 dev_err(ctrl->device, 1821 "Device not ready; aborting %s\n", enabled ? 1822 "initialisation" : "reset"); 1823 return -ENODEV; 1824 } 1825 } 1826 1827 return ret; 1828 } 1829 1830 /* 1831 * If the device has been passed off to us in an enabled state, just clear 1832 * the enabled bit. The spec says we should set the 'shutdown notification 1833 * bits', but doing so may cause the device to complete commands to the 1834 * admin queue ... and we don't know what memory that might be pointing at! 1835 */ 1836 int nvme_disable_ctrl(struct nvme_ctrl *ctrl, u64 cap) 1837 { 1838 int ret; 1839 1840 ctrl->ctrl_config &= ~NVME_CC_SHN_MASK; 1841 ctrl->ctrl_config &= ~NVME_CC_ENABLE; 1842 1843 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config); 1844 if (ret) 1845 return ret; 1846 1847 if (ctrl->quirks & NVME_QUIRK_DELAY_BEFORE_CHK_RDY) 1848 msleep(NVME_QUIRK_DELAY_AMOUNT); 1849 1850 return nvme_wait_ready(ctrl, cap, false); 1851 } 1852 EXPORT_SYMBOL_GPL(nvme_disable_ctrl); 1853 1854 int nvme_enable_ctrl(struct nvme_ctrl *ctrl, u64 cap) 1855 { 1856 /* 1857 * Default to a 4K page size, with the intention to update this 1858 * path in the future to accomodate architectures with differing 1859 * kernel and IO page sizes. 1860 */ 1861 unsigned dev_page_min = NVME_CAP_MPSMIN(cap) + 12, page_shift = 12; 1862 int ret; 1863 1864 if (page_shift < dev_page_min) { 1865 dev_err(ctrl->device, 1866 "Minimum device page size %u too large for host (%u)\n", 1867 1 << dev_page_min, 1 << page_shift); 1868 return -ENODEV; 1869 } 1870 1871 ctrl->page_size = 1 << page_shift; 1872 1873 ctrl->ctrl_config = NVME_CC_CSS_NVM; 1874 ctrl->ctrl_config |= (page_shift - 12) << NVME_CC_MPS_SHIFT; 1875 ctrl->ctrl_config |= NVME_CC_AMS_RR | NVME_CC_SHN_NONE; 1876 ctrl->ctrl_config |= NVME_CC_IOSQES | NVME_CC_IOCQES; 1877 ctrl->ctrl_config |= NVME_CC_ENABLE; 1878 1879 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config); 1880 if (ret) 1881 return ret; 1882 return nvme_wait_ready(ctrl, cap, true); 1883 } 1884 EXPORT_SYMBOL_GPL(nvme_enable_ctrl); 1885 1886 int nvme_shutdown_ctrl(struct nvme_ctrl *ctrl) 1887 { 1888 unsigned long timeout = jiffies + (ctrl->shutdown_timeout * HZ); 1889 u32 csts; 1890 int ret; 1891 1892 ctrl->ctrl_config &= ~NVME_CC_SHN_MASK; 1893 ctrl->ctrl_config |= NVME_CC_SHN_NORMAL; 1894 1895 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config); 1896 if (ret) 1897 return ret; 1898 1899 while ((ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts)) == 0) { 1900 if ((csts & NVME_CSTS_SHST_MASK) == NVME_CSTS_SHST_CMPLT) 1901 break; 1902 1903 msleep(100); 1904 if (fatal_signal_pending(current)) 1905 return -EINTR; 1906 if (time_after(jiffies, timeout)) { 1907 dev_err(ctrl->device, 1908 "Device shutdown incomplete; abort shutdown\n"); 1909 return -ENODEV; 1910 } 1911 } 1912 1913 return ret; 1914 } 1915 EXPORT_SYMBOL_GPL(nvme_shutdown_ctrl); 1916 1917 static void nvme_set_queue_limits(struct nvme_ctrl *ctrl, 1918 struct request_queue *q) 1919 { 1920 bool vwc = false; 1921 1922 if (ctrl->max_hw_sectors) { 1923 u32 max_segments = 1924 (ctrl->max_hw_sectors / (ctrl->page_size >> 9)) + 1; 1925 1926 max_segments = min_not_zero(max_segments, ctrl->max_segments); 1927 blk_queue_max_hw_sectors(q, ctrl->max_hw_sectors); 1928 blk_queue_max_segments(q, min_t(u32, max_segments, USHRT_MAX)); 1929 } 1930 if ((ctrl->quirks & NVME_QUIRK_STRIPE_SIZE) && 1931 is_power_of_2(ctrl->max_hw_sectors)) 1932 blk_queue_chunk_sectors(q, ctrl->max_hw_sectors); 1933 blk_queue_virt_boundary(q, ctrl->page_size - 1); 1934 if (ctrl->vwc & NVME_CTRL_VWC_PRESENT) 1935 vwc = true; 1936 blk_queue_write_cache(q, vwc, vwc); 1937 } 1938 1939 static int nvme_configure_timestamp(struct nvme_ctrl *ctrl) 1940 { 1941 __le64 ts; 1942 int ret; 1943 1944 if (!(ctrl->oncs & NVME_CTRL_ONCS_TIMESTAMP)) 1945 return 0; 1946 1947 ts = cpu_to_le64(ktime_to_ms(ktime_get_real())); 1948 ret = nvme_set_features(ctrl, NVME_FEAT_TIMESTAMP, 0, &ts, sizeof(ts), 1949 NULL); 1950 if (ret) 1951 dev_warn_once(ctrl->device, 1952 "could not set timestamp (%d)\n", ret); 1953 return ret; 1954 } 1955 1956 static int nvme_configure_acre(struct nvme_ctrl *ctrl) 1957 { 1958 struct nvme_feat_host_behavior *host; 1959 int ret; 1960 1961 /* Don't bother enabling the feature if retry delay is not reported */ 1962 if (!ctrl->crdt[0]) 1963 return 0; 1964 1965 host = kzalloc(sizeof(*host), GFP_KERNEL); 1966 if (!host) 1967 return 0; 1968 1969 host->acre = NVME_ENABLE_ACRE; 1970 ret = nvme_set_features(ctrl, NVME_FEAT_HOST_BEHAVIOR, 0, 1971 host, sizeof(*host), NULL); 1972 kfree(host); 1973 return ret; 1974 } 1975 1976 static int nvme_configure_apst(struct nvme_ctrl *ctrl) 1977 { 1978 /* 1979 * APST (Autonomous Power State Transition) lets us program a 1980 * table of power state transitions that the controller will 1981 * perform automatically. We configure it with a simple 1982 * heuristic: we are willing to spend at most 2% of the time 1983 * transitioning between power states. Therefore, when running 1984 * in any given state, we will enter the next lower-power 1985 * non-operational state after waiting 50 * (enlat + exlat) 1986 * microseconds, as long as that state's exit latency is under 1987 * the requested maximum latency. 1988 * 1989 * We will not autonomously enter any non-operational state for 1990 * which the total latency exceeds ps_max_latency_us. Users 1991 * can set ps_max_latency_us to zero to turn off APST. 1992 */ 1993 1994 unsigned apste; 1995 struct nvme_feat_auto_pst *table; 1996 u64 max_lat_us = 0; 1997 int max_ps = -1; 1998 int ret; 1999 2000 /* 2001 * If APST isn't supported or if we haven't been initialized yet, 2002 * then don't do anything. 2003 */ 2004 if (!ctrl->apsta) 2005 return 0; 2006 2007 if (ctrl->npss > 31) { 2008 dev_warn(ctrl->device, "NPSS is invalid; not using APST\n"); 2009 return 0; 2010 } 2011 2012 table = kzalloc(sizeof(*table), GFP_KERNEL); 2013 if (!table) 2014 return 0; 2015 2016 if (!ctrl->apst_enabled || ctrl->ps_max_latency_us == 0) { 2017 /* Turn off APST. */ 2018 apste = 0; 2019 dev_dbg(ctrl->device, "APST disabled\n"); 2020 } else { 2021 __le64 target = cpu_to_le64(0); 2022 int state; 2023 2024 /* 2025 * Walk through all states from lowest- to highest-power. 2026 * According to the spec, lower-numbered states use more 2027 * power. NPSS, despite the name, is the index of the 2028 * lowest-power state, not the number of states. 2029 */ 2030 for (state = (int)ctrl->npss; state >= 0; state--) { 2031 u64 total_latency_us, exit_latency_us, transition_ms; 2032 2033 if (target) 2034 table->entries[state] = target; 2035 2036 /* 2037 * Don't allow transitions to the deepest state 2038 * if it's quirked off. 2039 */ 2040 if (state == ctrl->npss && 2041 (ctrl->quirks & NVME_QUIRK_NO_DEEPEST_PS)) 2042 continue; 2043 2044 /* 2045 * Is this state a useful non-operational state for 2046 * higher-power states to autonomously transition to? 2047 */ 2048 if (!(ctrl->psd[state].flags & 2049 NVME_PS_FLAGS_NON_OP_STATE)) 2050 continue; 2051 2052 exit_latency_us = 2053 (u64)le32_to_cpu(ctrl->psd[state].exit_lat); 2054 if (exit_latency_us > ctrl->ps_max_latency_us) 2055 continue; 2056 2057 total_latency_us = 2058 exit_latency_us + 2059 le32_to_cpu(ctrl->psd[state].entry_lat); 2060 2061 /* 2062 * This state is good. Use it as the APST idle 2063 * target for higher power states. 2064 */ 2065 transition_ms = total_latency_us + 19; 2066 do_div(transition_ms, 20); 2067 if (transition_ms > (1 << 24) - 1) 2068 transition_ms = (1 << 24) - 1; 2069 2070 target = cpu_to_le64((state << 3) | 2071 (transition_ms << 8)); 2072 2073 if (max_ps == -1) 2074 max_ps = state; 2075 2076 if (total_latency_us > max_lat_us) 2077 max_lat_us = total_latency_us; 2078 } 2079 2080 apste = 1; 2081 2082 if (max_ps == -1) { 2083 dev_dbg(ctrl->device, "APST enabled but no non-operational states are available\n"); 2084 } else { 2085 dev_dbg(ctrl->device, "APST enabled: max PS = %d, max round-trip latency = %lluus, table = %*phN\n", 2086 max_ps, max_lat_us, (int)sizeof(*table), table); 2087 } 2088 } 2089 2090 ret = nvme_set_features(ctrl, NVME_FEAT_AUTO_PST, apste, 2091 table, sizeof(*table), NULL); 2092 if (ret) 2093 dev_err(ctrl->device, "failed to set APST feature (%d)\n", ret); 2094 2095 kfree(table); 2096 return ret; 2097 } 2098 2099 static void nvme_set_latency_tolerance(struct device *dev, s32 val) 2100 { 2101 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 2102 u64 latency; 2103 2104 switch (val) { 2105 case PM_QOS_LATENCY_TOLERANCE_NO_CONSTRAINT: 2106 case PM_QOS_LATENCY_ANY: 2107 latency = U64_MAX; 2108 break; 2109 2110 default: 2111 latency = val; 2112 } 2113 2114 if (ctrl->ps_max_latency_us != latency) { 2115 ctrl->ps_max_latency_us = latency; 2116 nvme_configure_apst(ctrl); 2117 } 2118 } 2119 2120 struct nvme_core_quirk_entry { 2121 /* 2122 * NVMe model and firmware strings are padded with spaces. For 2123 * simplicity, strings in the quirk table are padded with NULLs 2124 * instead. 2125 */ 2126 u16 vid; 2127 const char *mn; 2128 const char *fr; 2129 unsigned long quirks; 2130 }; 2131 2132 static const struct nvme_core_quirk_entry core_quirks[] = { 2133 { 2134 /* 2135 * This Toshiba device seems to die using any APST states. See: 2136 * https://bugs.launchpad.net/ubuntu/+source/linux/+bug/1678184/comments/11 2137 */ 2138 .vid = 0x1179, 2139 .mn = "THNSF5256GPUK TOSHIBA", 2140 .quirks = NVME_QUIRK_NO_APST, 2141 } 2142 }; 2143 2144 /* match is null-terminated but idstr is space-padded. */ 2145 static bool string_matches(const char *idstr, const char *match, size_t len) 2146 { 2147 size_t matchlen; 2148 2149 if (!match) 2150 return true; 2151 2152 matchlen = strlen(match); 2153 WARN_ON_ONCE(matchlen > len); 2154 2155 if (memcmp(idstr, match, matchlen)) 2156 return false; 2157 2158 for (; matchlen < len; matchlen++) 2159 if (idstr[matchlen] != ' ') 2160 return false; 2161 2162 return true; 2163 } 2164 2165 static bool quirk_matches(const struct nvme_id_ctrl *id, 2166 const struct nvme_core_quirk_entry *q) 2167 { 2168 return q->vid == le16_to_cpu(id->vid) && 2169 string_matches(id->mn, q->mn, sizeof(id->mn)) && 2170 string_matches(id->fr, q->fr, sizeof(id->fr)); 2171 } 2172 2173 static void nvme_init_subnqn(struct nvme_subsystem *subsys, struct nvme_ctrl *ctrl, 2174 struct nvme_id_ctrl *id) 2175 { 2176 size_t nqnlen; 2177 int off; 2178 2179 if(!(ctrl->quirks & NVME_QUIRK_IGNORE_DEV_SUBNQN)) { 2180 nqnlen = strnlen(id->subnqn, NVMF_NQN_SIZE); 2181 if (nqnlen > 0 && nqnlen < NVMF_NQN_SIZE) { 2182 strlcpy(subsys->subnqn, id->subnqn, NVMF_NQN_SIZE); 2183 return; 2184 } 2185 2186 if (ctrl->vs >= NVME_VS(1, 2, 1)) 2187 dev_warn(ctrl->device, "missing or invalid SUBNQN field.\n"); 2188 } 2189 2190 /* Generate a "fake" NQN per Figure 254 in NVMe 1.3 + ECN 001 */ 2191 off = snprintf(subsys->subnqn, NVMF_NQN_SIZE, 2192 "nqn.2014.08.org.nvmexpress:%04x%04x", 2193 le16_to_cpu(id->vid), le16_to_cpu(id->ssvid)); 2194 memcpy(subsys->subnqn + off, id->sn, sizeof(id->sn)); 2195 off += sizeof(id->sn); 2196 memcpy(subsys->subnqn + off, id->mn, sizeof(id->mn)); 2197 off += sizeof(id->mn); 2198 memset(subsys->subnqn + off, 0, sizeof(subsys->subnqn) - off); 2199 } 2200 2201 static void __nvme_release_subsystem(struct nvme_subsystem *subsys) 2202 { 2203 ida_simple_remove(&nvme_subsystems_ida, subsys->instance); 2204 kfree(subsys); 2205 } 2206 2207 static void nvme_release_subsystem(struct device *dev) 2208 { 2209 __nvme_release_subsystem(container_of(dev, struct nvme_subsystem, dev)); 2210 } 2211 2212 static void nvme_destroy_subsystem(struct kref *ref) 2213 { 2214 struct nvme_subsystem *subsys = 2215 container_of(ref, struct nvme_subsystem, ref); 2216 2217 mutex_lock(&nvme_subsystems_lock); 2218 list_del(&subsys->entry); 2219 mutex_unlock(&nvme_subsystems_lock); 2220 2221 ida_destroy(&subsys->ns_ida); 2222 device_del(&subsys->dev); 2223 put_device(&subsys->dev); 2224 } 2225 2226 static void nvme_put_subsystem(struct nvme_subsystem *subsys) 2227 { 2228 kref_put(&subsys->ref, nvme_destroy_subsystem); 2229 } 2230 2231 static struct nvme_subsystem *__nvme_find_get_subsystem(const char *subsysnqn) 2232 { 2233 struct nvme_subsystem *subsys; 2234 2235 lockdep_assert_held(&nvme_subsystems_lock); 2236 2237 list_for_each_entry(subsys, &nvme_subsystems, entry) { 2238 if (strcmp(subsys->subnqn, subsysnqn)) 2239 continue; 2240 if (!kref_get_unless_zero(&subsys->ref)) 2241 continue; 2242 return subsys; 2243 } 2244 2245 return NULL; 2246 } 2247 2248 #define SUBSYS_ATTR_RO(_name, _mode, _show) \ 2249 struct device_attribute subsys_attr_##_name = \ 2250 __ATTR(_name, _mode, _show, NULL) 2251 2252 static ssize_t nvme_subsys_show_nqn(struct device *dev, 2253 struct device_attribute *attr, 2254 char *buf) 2255 { 2256 struct nvme_subsystem *subsys = 2257 container_of(dev, struct nvme_subsystem, dev); 2258 2259 return snprintf(buf, PAGE_SIZE, "%s\n", subsys->subnqn); 2260 } 2261 static SUBSYS_ATTR_RO(subsysnqn, S_IRUGO, nvme_subsys_show_nqn); 2262 2263 #define nvme_subsys_show_str_function(field) \ 2264 static ssize_t subsys_##field##_show(struct device *dev, \ 2265 struct device_attribute *attr, char *buf) \ 2266 { \ 2267 struct nvme_subsystem *subsys = \ 2268 container_of(dev, struct nvme_subsystem, dev); \ 2269 return sprintf(buf, "%.*s\n", \ 2270 (int)sizeof(subsys->field), subsys->field); \ 2271 } \ 2272 static SUBSYS_ATTR_RO(field, S_IRUGO, subsys_##field##_show); 2273 2274 nvme_subsys_show_str_function(model); 2275 nvme_subsys_show_str_function(serial); 2276 nvme_subsys_show_str_function(firmware_rev); 2277 2278 static struct attribute *nvme_subsys_attrs[] = { 2279 &subsys_attr_model.attr, 2280 &subsys_attr_serial.attr, 2281 &subsys_attr_firmware_rev.attr, 2282 &subsys_attr_subsysnqn.attr, 2283 NULL, 2284 }; 2285 2286 static struct attribute_group nvme_subsys_attrs_group = { 2287 .attrs = nvme_subsys_attrs, 2288 }; 2289 2290 static const struct attribute_group *nvme_subsys_attrs_groups[] = { 2291 &nvme_subsys_attrs_group, 2292 NULL, 2293 }; 2294 2295 static int nvme_active_ctrls(struct nvme_subsystem *subsys) 2296 { 2297 int count = 0; 2298 struct nvme_ctrl *ctrl; 2299 2300 mutex_lock(&subsys->lock); 2301 list_for_each_entry(ctrl, &subsys->ctrls, subsys_entry) { 2302 if (ctrl->state != NVME_CTRL_DELETING && 2303 ctrl->state != NVME_CTRL_DEAD) 2304 count++; 2305 } 2306 mutex_unlock(&subsys->lock); 2307 2308 return count; 2309 } 2310 2311 static int nvme_init_subsystem(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id) 2312 { 2313 struct nvme_subsystem *subsys, *found; 2314 int ret; 2315 2316 subsys = kzalloc(sizeof(*subsys), GFP_KERNEL); 2317 if (!subsys) 2318 return -ENOMEM; 2319 ret = ida_simple_get(&nvme_subsystems_ida, 0, 0, GFP_KERNEL); 2320 if (ret < 0) { 2321 kfree(subsys); 2322 return ret; 2323 } 2324 subsys->instance = ret; 2325 mutex_init(&subsys->lock); 2326 kref_init(&subsys->ref); 2327 INIT_LIST_HEAD(&subsys->ctrls); 2328 INIT_LIST_HEAD(&subsys->nsheads); 2329 nvme_init_subnqn(subsys, ctrl, id); 2330 memcpy(subsys->serial, id->sn, sizeof(subsys->serial)); 2331 memcpy(subsys->model, id->mn, sizeof(subsys->model)); 2332 memcpy(subsys->firmware_rev, id->fr, sizeof(subsys->firmware_rev)); 2333 subsys->vendor_id = le16_to_cpu(id->vid); 2334 subsys->cmic = id->cmic; 2335 2336 subsys->dev.class = nvme_subsys_class; 2337 subsys->dev.release = nvme_release_subsystem; 2338 subsys->dev.groups = nvme_subsys_attrs_groups; 2339 dev_set_name(&subsys->dev, "nvme-subsys%d", subsys->instance); 2340 device_initialize(&subsys->dev); 2341 2342 mutex_lock(&nvme_subsystems_lock); 2343 found = __nvme_find_get_subsystem(subsys->subnqn); 2344 if (found) { 2345 /* 2346 * Verify that the subsystem actually supports multiple 2347 * controllers, else bail out. 2348 */ 2349 if (!(ctrl->opts && ctrl->opts->discovery_nqn) && 2350 nvme_active_ctrls(found) && !(id->cmic & (1 << 1))) { 2351 dev_err(ctrl->device, 2352 "ignoring ctrl due to duplicate subnqn (%s).\n", 2353 found->subnqn); 2354 nvme_put_subsystem(found); 2355 ret = -EINVAL; 2356 goto out_unlock; 2357 } 2358 2359 __nvme_release_subsystem(subsys); 2360 subsys = found; 2361 } else { 2362 ret = device_add(&subsys->dev); 2363 if (ret) { 2364 dev_err(ctrl->device, 2365 "failed to register subsystem device.\n"); 2366 goto out_unlock; 2367 } 2368 ida_init(&subsys->ns_ida); 2369 list_add_tail(&subsys->entry, &nvme_subsystems); 2370 } 2371 2372 ctrl->subsys = subsys; 2373 mutex_unlock(&nvme_subsystems_lock); 2374 2375 if (sysfs_create_link(&subsys->dev.kobj, &ctrl->device->kobj, 2376 dev_name(ctrl->device))) { 2377 dev_err(ctrl->device, 2378 "failed to create sysfs link from subsystem.\n"); 2379 /* the transport driver will eventually put the subsystem */ 2380 return -EINVAL; 2381 } 2382 2383 mutex_lock(&subsys->lock); 2384 list_add_tail(&ctrl->subsys_entry, &subsys->ctrls); 2385 mutex_unlock(&subsys->lock); 2386 2387 return 0; 2388 2389 out_unlock: 2390 mutex_unlock(&nvme_subsystems_lock); 2391 put_device(&subsys->dev); 2392 return ret; 2393 } 2394 2395 int nvme_get_log(struct nvme_ctrl *ctrl, u32 nsid, u8 log_page, u8 lsp, 2396 void *log, size_t size, u64 offset) 2397 { 2398 struct nvme_command c = { }; 2399 unsigned long dwlen = size / 4 - 1; 2400 2401 c.get_log_page.opcode = nvme_admin_get_log_page; 2402 c.get_log_page.nsid = cpu_to_le32(nsid); 2403 c.get_log_page.lid = log_page; 2404 c.get_log_page.lsp = lsp; 2405 c.get_log_page.numdl = cpu_to_le16(dwlen & ((1 << 16) - 1)); 2406 c.get_log_page.numdu = cpu_to_le16(dwlen >> 16); 2407 c.get_log_page.lpol = cpu_to_le32(lower_32_bits(offset)); 2408 c.get_log_page.lpou = cpu_to_le32(upper_32_bits(offset)); 2409 2410 return nvme_submit_sync_cmd(ctrl->admin_q, &c, log, size); 2411 } 2412 2413 static int nvme_get_effects_log(struct nvme_ctrl *ctrl) 2414 { 2415 int ret; 2416 2417 if (!ctrl->effects) 2418 ctrl->effects = kzalloc(sizeof(*ctrl->effects), GFP_KERNEL); 2419 2420 if (!ctrl->effects) 2421 return 0; 2422 2423 ret = nvme_get_log(ctrl, NVME_NSID_ALL, NVME_LOG_CMD_EFFECTS, 0, 2424 ctrl->effects, sizeof(*ctrl->effects), 0); 2425 if (ret) { 2426 kfree(ctrl->effects); 2427 ctrl->effects = NULL; 2428 } 2429 return ret; 2430 } 2431 2432 /* 2433 * Initialize the cached copies of the Identify data and various controller 2434 * register in our nvme_ctrl structure. This should be called as soon as 2435 * the admin queue is fully up and running. 2436 */ 2437 int nvme_init_identify(struct nvme_ctrl *ctrl) 2438 { 2439 struct nvme_id_ctrl *id; 2440 u64 cap; 2441 int ret, page_shift; 2442 u32 max_hw_sectors; 2443 bool prev_apst_enabled; 2444 2445 ret = ctrl->ops->reg_read32(ctrl, NVME_REG_VS, &ctrl->vs); 2446 if (ret) { 2447 dev_err(ctrl->device, "Reading VS failed (%d)\n", ret); 2448 return ret; 2449 } 2450 2451 ret = ctrl->ops->reg_read64(ctrl, NVME_REG_CAP, &cap); 2452 if (ret) { 2453 dev_err(ctrl->device, "Reading CAP failed (%d)\n", ret); 2454 return ret; 2455 } 2456 page_shift = NVME_CAP_MPSMIN(cap) + 12; 2457 2458 if (ctrl->vs >= NVME_VS(1, 1, 0)) 2459 ctrl->subsystem = NVME_CAP_NSSRC(cap); 2460 2461 ret = nvme_identify_ctrl(ctrl, &id); 2462 if (ret) { 2463 dev_err(ctrl->device, "Identify Controller failed (%d)\n", ret); 2464 return -EIO; 2465 } 2466 2467 if (id->lpa & NVME_CTRL_LPA_CMD_EFFECTS_LOG) { 2468 ret = nvme_get_effects_log(ctrl); 2469 if (ret < 0) 2470 goto out_free; 2471 } 2472 2473 if (!ctrl->identified) { 2474 int i; 2475 2476 ret = nvme_init_subsystem(ctrl, id); 2477 if (ret) 2478 goto out_free; 2479 2480 /* 2481 * Check for quirks. Quirk can depend on firmware version, 2482 * so, in principle, the set of quirks present can change 2483 * across a reset. As a possible future enhancement, we 2484 * could re-scan for quirks every time we reinitialize 2485 * the device, but we'd have to make sure that the driver 2486 * behaves intelligently if the quirks change. 2487 */ 2488 for (i = 0; i < ARRAY_SIZE(core_quirks); i++) { 2489 if (quirk_matches(id, &core_quirks[i])) 2490 ctrl->quirks |= core_quirks[i].quirks; 2491 } 2492 } 2493 2494 if (force_apst && (ctrl->quirks & NVME_QUIRK_NO_DEEPEST_PS)) { 2495 dev_warn(ctrl->device, "forcibly allowing all power states due to nvme_core.force_apst -- use at your own risk\n"); 2496 ctrl->quirks &= ~NVME_QUIRK_NO_DEEPEST_PS; 2497 } 2498 2499 ctrl->crdt[0] = le16_to_cpu(id->crdt1); 2500 ctrl->crdt[1] = le16_to_cpu(id->crdt2); 2501 ctrl->crdt[2] = le16_to_cpu(id->crdt3); 2502 2503 ctrl->oacs = le16_to_cpu(id->oacs); 2504 ctrl->oncs = le16_to_cpup(&id->oncs); 2505 ctrl->oaes = le32_to_cpu(id->oaes); 2506 atomic_set(&ctrl->abort_limit, id->acl + 1); 2507 ctrl->vwc = id->vwc; 2508 if (id->mdts) 2509 max_hw_sectors = 1 << (id->mdts + page_shift - 9); 2510 else 2511 max_hw_sectors = UINT_MAX; 2512 ctrl->max_hw_sectors = 2513 min_not_zero(ctrl->max_hw_sectors, max_hw_sectors); 2514 2515 nvme_set_queue_limits(ctrl, ctrl->admin_q); 2516 ctrl->sgls = le32_to_cpu(id->sgls); 2517 ctrl->kas = le16_to_cpu(id->kas); 2518 ctrl->max_namespaces = le32_to_cpu(id->mnan); 2519 ctrl->ctratt = le32_to_cpu(id->ctratt); 2520 2521 if (id->rtd3e) { 2522 /* us -> s */ 2523 u32 transition_time = le32_to_cpu(id->rtd3e) / 1000000; 2524 2525 ctrl->shutdown_timeout = clamp_t(unsigned int, transition_time, 2526 shutdown_timeout, 60); 2527 2528 if (ctrl->shutdown_timeout != shutdown_timeout) 2529 dev_info(ctrl->device, 2530 "Shutdown timeout set to %u seconds\n", 2531 ctrl->shutdown_timeout); 2532 } else 2533 ctrl->shutdown_timeout = shutdown_timeout; 2534 2535 ctrl->npss = id->npss; 2536 ctrl->apsta = id->apsta; 2537 prev_apst_enabled = ctrl->apst_enabled; 2538 if (ctrl->quirks & NVME_QUIRK_NO_APST) { 2539 if (force_apst && id->apsta) { 2540 dev_warn(ctrl->device, "forcibly allowing APST due to nvme_core.force_apst -- use at your own risk\n"); 2541 ctrl->apst_enabled = true; 2542 } else { 2543 ctrl->apst_enabled = false; 2544 } 2545 } else { 2546 ctrl->apst_enabled = id->apsta; 2547 } 2548 memcpy(ctrl->psd, id->psd, sizeof(ctrl->psd)); 2549 2550 if (ctrl->ops->flags & NVME_F_FABRICS) { 2551 ctrl->icdoff = le16_to_cpu(id->icdoff); 2552 ctrl->ioccsz = le32_to_cpu(id->ioccsz); 2553 ctrl->iorcsz = le32_to_cpu(id->iorcsz); 2554 ctrl->maxcmd = le16_to_cpu(id->maxcmd); 2555 2556 /* 2557 * In fabrics we need to verify the cntlid matches the 2558 * admin connect 2559 */ 2560 if (ctrl->cntlid != le16_to_cpu(id->cntlid)) { 2561 ret = -EINVAL; 2562 goto out_free; 2563 } 2564 2565 if (!ctrl->opts->discovery_nqn && !ctrl->kas) { 2566 dev_err(ctrl->device, 2567 "keep-alive support is mandatory for fabrics\n"); 2568 ret = -EINVAL; 2569 goto out_free; 2570 } 2571 } else { 2572 ctrl->cntlid = le16_to_cpu(id->cntlid); 2573 ctrl->hmpre = le32_to_cpu(id->hmpre); 2574 ctrl->hmmin = le32_to_cpu(id->hmmin); 2575 ctrl->hmminds = le32_to_cpu(id->hmminds); 2576 ctrl->hmmaxd = le16_to_cpu(id->hmmaxd); 2577 } 2578 2579 ret = nvme_mpath_init(ctrl, id); 2580 kfree(id); 2581 2582 if (ret < 0) 2583 return ret; 2584 2585 if (ctrl->apst_enabled && !prev_apst_enabled) 2586 dev_pm_qos_expose_latency_tolerance(ctrl->device); 2587 else if (!ctrl->apst_enabled && prev_apst_enabled) 2588 dev_pm_qos_hide_latency_tolerance(ctrl->device); 2589 2590 ret = nvme_configure_apst(ctrl); 2591 if (ret < 0) 2592 return ret; 2593 2594 ret = nvme_configure_timestamp(ctrl); 2595 if (ret < 0) 2596 return ret; 2597 2598 ret = nvme_configure_directives(ctrl); 2599 if (ret < 0) 2600 return ret; 2601 2602 ret = nvme_configure_acre(ctrl); 2603 if (ret < 0) 2604 return ret; 2605 2606 ctrl->identified = true; 2607 2608 return 0; 2609 2610 out_free: 2611 kfree(id); 2612 return ret; 2613 } 2614 EXPORT_SYMBOL_GPL(nvme_init_identify); 2615 2616 static int nvme_dev_open(struct inode *inode, struct file *file) 2617 { 2618 struct nvme_ctrl *ctrl = 2619 container_of(inode->i_cdev, struct nvme_ctrl, cdev); 2620 2621 switch (ctrl->state) { 2622 case NVME_CTRL_LIVE: 2623 case NVME_CTRL_ADMIN_ONLY: 2624 break; 2625 default: 2626 return -EWOULDBLOCK; 2627 } 2628 2629 file->private_data = ctrl; 2630 return 0; 2631 } 2632 2633 static int nvme_dev_user_cmd(struct nvme_ctrl *ctrl, void __user *argp) 2634 { 2635 struct nvme_ns *ns; 2636 int ret; 2637 2638 down_read(&ctrl->namespaces_rwsem); 2639 if (list_empty(&ctrl->namespaces)) { 2640 ret = -ENOTTY; 2641 goto out_unlock; 2642 } 2643 2644 ns = list_first_entry(&ctrl->namespaces, struct nvme_ns, list); 2645 if (ns != list_last_entry(&ctrl->namespaces, struct nvme_ns, list)) { 2646 dev_warn(ctrl->device, 2647 "NVME_IOCTL_IO_CMD not supported when multiple namespaces present!\n"); 2648 ret = -EINVAL; 2649 goto out_unlock; 2650 } 2651 2652 dev_warn(ctrl->device, 2653 "using deprecated NVME_IOCTL_IO_CMD ioctl on the char device!\n"); 2654 kref_get(&ns->kref); 2655 up_read(&ctrl->namespaces_rwsem); 2656 2657 ret = nvme_user_cmd(ctrl, ns, argp); 2658 nvme_put_ns(ns); 2659 return ret; 2660 2661 out_unlock: 2662 up_read(&ctrl->namespaces_rwsem); 2663 return ret; 2664 } 2665 2666 static long nvme_dev_ioctl(struct file *file, unsigned int cmd, 2667 unsigned long arg) 2668 { 2669 struct nvme_ctrl *ctrl = file->private_data; 2670 void __user *argp = (void __user *)arg; 2671 2672 switch (cmd) { 2673 case NVME_IOCTL_ADMIN_CMD: 2674 return nvme_user_cmd(ctrl, NULL, argp); 2675 case NVME_IOCTL_IO_CMD: 2676 return nvme_dev_user_cmd(ctrl, argp); 2677 case NVME_IOCTL_RESET: 2678 dev_warn(ctrl->device, "resetting controller\n"); 2679 return nvme_reset_ctrl_sync(ctrl); 2680 case NVME_IOCTL_SUBSYS_RESET: 2681 return nvme_reset_subsystem(ctrl); 2682 case NVME_IOCTL_RESCAN: 2683 nvme_queue_scan(ctrl); 2684 return 0; 2685 default: 2686 return -ENOTTY; 2687 } 2688 } 2689 2690 static const struct file_operations nvme_dev_fops = { 2691 .owner = THIS_MODULE, 2692 .open = nvme_dev_open, 2693 .unlocked_ioctl = nvme_dev_ioctl, 2694 .compat_ioctl = nvme_dev_ioctl, 2695 }; 2696 2697 static ssize_t nvme_sysfs_reset(struct device *dev, 2698 struct device_attribute *attr, const char *buf, 2699 size_t count) 2700 { 2701 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 2702 int ret; 2703 2704 ret = nvme_reset_ctrl_sync(ctrl); 2705 if (ret < 0) 2706 return ret; 2707 return count; 2708 } 2709 static DEVICE_ATTR(reset_controller, S_IWUSR, NULL, nvme_sysfs_reset); 2710 2711 static ssize_t nvme_sysfs_rescan(struct device *dev, 2712 struct device_attribute *attr, const char *buf, 2713 size_t count) 2714 { 2715 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 2716 2717 nvme_queue_scan(ctrl); 2718 return count; 2719 } 2720 static DEVICE_ATTR(rescan_controller, S_IWUSR, NULL, nvme_sysfs_rescan); 2721 2722 static inline struct nvme_ns_head *dev_to_ns_head(struct device *dev) 2723 { 2724 struct gendisk *disk = dev_to_disk(dev); 2725 2726 if (disk->fops == &nvme_fops) 2727 return nvme_get_ns_from_dev(dev)->head; 2728 else 2729 return disk->private_data; 2730 } 2731 2732 static ssize_t wwid_show(struct device *dev, struct device_attribute *attr, 2733 char *buf) 2734 { 2735 struct nvme_ns_head *head = dev_to_ns_head(dev); 2736 struct nvme_ns_ids *ids = &head->ids; 2737 struct nvme_subsystem *subsys = head->subsys; 2738 int serial_len = sizeof(subsys->serial); 2739 int model_len = sizeof(subsys->model); 2740 2741 if (!uuid_is_null(&ids->uuid)) 2742 return sprintf(buf, "uuid.%pU\n", &ids->uuid); 2743 2744 if (memchr_inv(ids->nguid, 0, sizeof(ids->nguid))) 2745 return sprintf(buf, "eui.%16phN\n", ids->nguid); 2746 2747 if (memchr_inv(ids->eui64, 0, sizeof(ids->eui64))) 2748 return sprintf(buf, "eui.%8phN\n", ids->eui64); 2749 2750 while (serial_len > 0 && (subsys->serial[serial_len - 1] == ' ' || 2751 subsys->serial[serial_len - 1] == '\0')) 2752 serial_len--; 2753 while (model_len > 0 && (subsys->model[model_len - 1] == ' ' || 2754 subsys->model[model_len - 1] == '\0')) 2755 model_len--; 2756 2757 return sprintf(buf, "nvme.%04x-%*phN-%*phN-%08x\n", subsys->vendor_id, 2758 serial_len, subsys->serial, model_len, subsys->model, 2759 head->ns_id); 2760 } 2761 static DEVICE_ATTR_RO(wwid); 2762 2763 static ssize_t nguid_show(struct device *dev, struct device_attribute *attr, 2764 char *buf) 2765 { 2766 return sprintf(buf, "%pU\n", dev_to_ns_head(dev)->ids.nguid); 2767 } 2768 static DEVICE_ATTR_RO(nguid); 2769 2770 static ssize_t uuid_show(struct device *dev, struct device_attribute *attr, 2771 char *buf) 2772 { 2773 struct nvme_ns_ids *ids = &dev_to_ns_head(dev)->ids; 2774 2775 /* For backward compatibility expose the NGUID to userspace if 2776 * we have no UUID set 2777 */ 2778 if (uuid_is_null(&ids->uuid)) { 2779 printk_ratelimited(KERN_WARNING 2780 "No UUID available providing old NGUID\n"); 2781 return sprintf(buf, "%pU\n", ids->nguid); 2782 } 2783 return sprintf(buf, "%pU\n", &ids->uuid); 2784 } 2785 static DEVICE_ATTR_RO(uuid); 2786 2787 static ssize_t eui_show(struct device *dev, struct device_attribute *attr, 2788 char *buf) 2789 { 2790 return sprintf(buf, "%8ph\n", dev_to_ns_head(dev)->ids.eui64); 2791 } 2792 static DEVICE_ATTR_RO(eui); 2793 2794 static ssize_t nsid_show(struct device *dev, struct device_attribute *attr, 2795 char *buf) 2796 { 2797 return sprintf(buf, "%d\n", dev_to_ns_head(dev)->ns_id); 2798 } 2799 static DEVICE_ATTR_RO(nsid); 2800 2801 static struct attribute *nvme_ns_id_attrs[] = { 2802 &dev_attr_wwid.attr, 2803 &dev_attr_uuid.attr, 2804 &dev_attr_nguid.attr, 2805 &dev_attr_eui.attr, 2806 &dev_attr_nsid.attr, 2807 #ifdef CONFIG_NVME_MULTIPATH 2808 &dev_attr_ana_grpid.attr, 2809 &dev_attr_ana_state.attr, 2810 #endif 2811 NULL, 2812 }; 2813 2814 static umode_t nvme_ns_id_attrs_are_visible(struct kobject *kobj, 2815 struct attribute *a, int n) 2816 { 2817 struct device *dev = container_of(kobj, struct device, kobj); 2818 struct nvme_ns_ids *ids = &dev_to_ns_head(dev)->ids; 2819 2820 if (a == &dev_attr_uuid.attr) { 2821 if (uuid_is_null(&ids->uuid) && 2822 !memchr_inv(ids->nguid, 0, sizeof(ids->nguid))) 2823 return 0; 2824 } 2825 if (a == &dev_attr_nguid.attr) { 2826 if (!memchr_inv(ids->nguid, 0, sizeof(ids->nguid))) 2827 return 0; 2828 } 2829 if (a == &dev_attr_eui.attr) { 2830 if (!memchr_inv(ids->eui64, 0, sizeof(ids->eui64))) 2831 return 0; 2832 } 2833 #ifdef CONFIG_NVME_MULTIPATH 2834 if (a == &dev_attr_ana_grpid.attr || a == &dev_attr_ana_state.attr) { 2835 if (dev_to_disk(dev)->fops != &nvme_fops) /* per-path attr */ 2836 return 0; 2837 if (!nvme_ctrl_use_ana(nvme_get_ns_from_dev(dev)->ctrl)) 2838 return 0; 2839 } 2840 #endif 2841 return a->mode; 2842 } 2843 2844 static const struct attribute_group nvme_ns_id_attr_group = { 2845 .attrs = nvme_ns_id_attrs, 2846 .is_visible = nvme_ns_id_attrs_are_visible, 2847 }; 2848 2849 const struct attribute_group *nvme_ns_id_attr_groups[] = { 2850 &nvme_ns_id_attr_group, 2851 #ifdef CONFIG_NVM 2852 &nvme_nvm_attr_group, 2853 #endif 2854 NULL, 2855 }; 2856 2857 #define nvme_show_str_function(field) \ 2858 static ssize_t field##_show(struct device *dev, \ 2859 struct device_attribute *attr, char *buf) \ 2860 { \ 2861 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); \ 2862 return sprintf(buf, "%.*s\n", \ 2863 (int)sizeof(ctrl->subsys->field), ctrl->subsys->field); \ 2864 } \ 2865 static DEVICE_ATTR(field, S_IRUGO, field##_show, NULL); 2866 2867 nvme_show_str_function(model); 2868 nvme_show_str_function(serial); 2869 nvme_show_str_function(firmware_rev); 2870 2871 #define nvme_show_int_function(field) \ 2872 static ssize_t field##_show(struct device *dev, \ 2873 struct device_attribute *attr, char *buf) \ 2874 { \ 2875 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); \ 2876 return sprintf(buf, "%d\n", ctrl->field); \ 2877 } \ 2878 static DEVICE_ATTR(field, S_IRUGO, field##_show, NULL); 2879 2880 nvme_show_int_function(cntlid); 2881 nvme_show_int_function(numa_node); 2882 2883 static ssize_t nvme_sysfs_delete(struct device *dev, 2884 struct device_attribute *attr, const char *buf, 2885 size_t count) 2886 { 2887 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 2888 2889 if (device_remove_file_self(dev, attr)) 2890 nvme_delete_ctrl_sync(ctrl); 2891 return count; 2892 } 2893 static DEVICE_ATTR(delete_controller, S_IWUSR, NULL, nvme_sysfs_delete); 2894 2895 static ssize_t nvme_sysfs_show_transport(struct device *dev, 2896 struct device_attribute *attr, 2897 char *buf) 2898 { 2899 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 2900 2901 return snprintf(buf, PAGE_SIZE, "%s\n", ctrl->ops->name); 2902 } 2903 static DEVICE_ATTR(transport, S_IRUGO, nvme_sysfs_show_transport, NULL); 2904 2905 static ssize_t nvme_sysfs_show_state(struct device *dev, 2906 struct device_attribute *attr, 2907 char *buf) 2908 { 2909 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 2910 static const char *const state_name[] = { 2911 [NVME_CTRL_NEW] = "new", 2912 [NVME_CTRL_LIVE] = "live", 2913 [NVME_CTRL_ADMIN_ONLY] = "only-admin", 2914 [NVME_CTRL_RESETTING] = "resetting", 2915 [NVME_CTRL_CONNECTING] = "connecting", 2916 [NVME_CTRL_DELETING] = "deleting", 2917 [NVME_CTRL_DEAD] = "dead", 2918 }; 2919 2920 if ((unsigned)ctrl->state < ARRAY_SIZE(state_name) && 2921 state_name[ctrl->state]) 2922 return sprintf(buf, "%s\n", state_name[ctrl->state]); 2923 2924 return sprintf(buf, "unknown state\n"); 2925 } 2926 2927 static DEVICE_ATTR(state, S_IRUGO, nvme_sysfs_show_state, NULL); 2928 2929 static ssize_t nvme_sysfs_show_subsysnqn(struct device *dev, 2930 struct device_attribute *attr, 2931 char *buf) 2932 { 2933 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 2934 2935 return snprintf(buf, PAGE_SIZE, "%s\n", ctrl->subsys->subnqn); 2936 } 2937 static DEVICE_ATTR(subsysnqn, S_IRUGO, nvme_sysfs_show_subsysnqn, NULL); 2938 2939 static ssize_t nvme_sysfs_show_address(struct device *dev, 2940 struct device_attribute *attr, 2941 char *buf) 2942 { 2943 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 2944 2945 return ctrl->ops->get_address(ctrl, buf, PAGE_SIZE); 2946 } 2947 static DEVICE_ATTR(address, S_IRUGO, nvme_sysfs_show_address, NULL); 2948 2949 static struct attribute *nvme_dev_attrs[] = { 2950 &dev_attr_reset_controller.attr, 2951 &dev_attr_rescan_controller.attr, 2952 &dev_attr_model.attr, 2953 &dev_attr_serial.attr, 2954 &dev_attr_firmware_rev.attr, 2955 &dev_attr_cntlid.attr, 2956 &dev_attr_delete_controller.attr, 2957 &dev_attr_transport.attr, 2958 &dev_attr_subsysnqn.attr, 2959 &dev_attr_address.attr, 2960 &dev_attr_state.attr, 2961 &dev_attr_numa_node.attr, 2962 NULL 2963 }; 2964 2965 static umode_t nvme_dev_attrs_are_visible(struct kobject *kobj, 2966 struct attribute *a, int n) 2967 { 2968 struct device *dev = container_of(kobj, struct device, kobj); 2969 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); 2970 2971 if (a == &dev_attr_delete_controller.attr && !ctrl->ops->delete_ctrl) 2972 return 0; 2973 if (a == &dev_attr_address.attr && !ctrl->ops->get_address) 2974 return 0; 2975 2976 return a->mode; 2977 } 2978 2979 static struct attribute_group nvme_dev_attrs_group = { 2980 .attrs = nvme_dev_attrs, 2981 .is_visible = nvme_dev_attrs_are_visible, 2982 }; 2983 2984 static const struct attribute_group *nvme_dev_attr_groups[] = { 2985 &nvme_dev_attrs_group, 2986 NULL, 2987 }; 2988 2989 static struct nvme_ns_head *__nvme_find_ns_head(struct nvme_subsystem *subsys, 2990 unsigned nsid) 2991 { 2992 struct nvme_ns_head *h; 2993 2994 lockdep_assert_held(&subsys->lock); 2995 2996 list_for_each_entry(h, &subsys->nsheads, entry) { 2997 if (h->ns_id == nsid && kref_get_unless_zero(&h->ref)) 2998 return h; 2999 } 3000 3001 return NULL; 3002 } 3003 3004 static int __nvme_check_ids(struct nvme_subsystem *subsys, 3005 struct nvme_ns_head *new) 3006 { 3007 struct nvme_ns_head *h; 3008 3009 lockdep_assert_held(&subsys->lock); 3010 3011 list_for_each_entry(h, &subsys->nsheads, entry) { 3012 if (nvme_ns_ids_valid(&new->ids) && 3013 !list_empty(&h->list) && 3014 nvme_ns_ids_equal(&new->ids, &h->ids)) 3015 return -EINVAL; 3016 } 3017 3018 return 0; 3019 } 3020 3021 static struct nvme_ns_head *nvme_alloc_ns_head(struct nvme_ctrl *ctrl, 3022 unsigned nsid, struct nvme_id_ns *id) 3023 { 3024 struct nvme_ns_head *head; 3025 size_t size = sizeof(*head); 3026 int ret = -ENOMEM; 3027 3028 #ifdef CONFIG_NVME_MULTIPATH 3029 size += num_possible_nodes() * sizeof(struct nvme_ns *); 3030 #endif 3031 3032 head = kzalloc(size, GFP_KERNEL); 3033 if (!head) 3034 goto out; 3035 ret = ida_simple_get(&ctrl->subsys->ns_ida, 1, 0, GFP_KERNEL); 3036 if (ret < 0) 3037 goto out_free_head; 3038 head->instance = ret; 3039 INIT_LIST_HEAD(&head->list); 3040 ret = init_srcu_struct(&head->srcu); 3041 if (ret) 3042 goto out_ida_remove; 3043 head->subsys = ctrl->subsys; 3044 head->ns_id = nsid; 3045 kref_init(&head->ref); 3046 3047 nvme_report_ns_ids(ctrl, nsid, id, &head->ids); 3048 3049 ret = __nvme_check_ids(ctrl->subsys, head); 3050 if (ret) { 3051 dev_err(ctrl->device, 3052 "duplicate IDs for nsid %d\n", nsid); 3053 goto out_cleanup_srcu; 3054 } 3055 3056 ret = nvme_mpath_alloc_disk(ctrl, head); 3057 if (ret) 3058 goto out_cleanup_srcu; 3059 3060 list_add_tail(&head->entry, &ctrl->subsys->nsheads); 3061 3062 kref_get(&ctrl->subsys->ref); 3063 3064 return head; 3065 out_cleanup_srcu: 3066 cleanup_srcu_struct(&head->srcu); 3067 out_ida_remove: 3068 ida_simple_remove(&ctrl->subsys->ns_ida, head->instance); 3069 out_free_head: 3070 kfree(head); 3071 out: 3072 return ERR_PTR(ret); 3073 } 3074 3075 static int nvme_init_ns_head(struct nvme_ns *ns, unsigned nsid, 3076 struct nvme_id_ns *id) 3077 { 3078 struct nvme_ctrl *ctrl = ns->ctrl; 3079 bool is_shared = id->nmic & (1 << 0); 3080 struct nvme_ns_head *head = NULL; 3081 int ret = 0; 3082 3083 mutex_lock(&ctrl->subsys->lock); 3084 if (is_shared) 3085 head = __nvme_find_ns_head(ctrl->subsys, nsid); 3086 if (!head) { 3087 head = nvme_alloc_ns_head(ctrl, nsid, id); 3088 if (IS_ERR(head)) { 3089 ret = PTR_ERR(head); 3090 goto out_unlock; 3091 } 3092 } else { 3093 struct nvme_ns_ids ids; 3094 3095 nvme_report_ns_ids(ctrl, nsid, id, &ids); 3096 if (!nvme_ns_ids_equal(&head->ids, &ids)) { 3097 dev_err(ctrl->device, 3098 "IDs don't match for shared namespace %d\n", 3099 nsid); 3100 ret = -EINVAL; 3101 goto out_unlock; 3102 } 3103 } 3104 3105 list_add_tail(&ns->siblings, &head->list); 3106 ns->head = head; 3107 3108 out_unlock: 3109 mutex_unlock(&ctrl->subsys->lock); 3110 return ret; 3111 } 3112 3113 static int ns_cmp(void *priv, struct list_head *a, struct list_head *b) 3114 { 3115 struct nvme_ns *nsa = container_of(a, struct nvme_ns, list); 3116 struct nvme_ns *nsb = container_of(b, struct nvme_ns, list); 3117 3118 return nsa->head->ns_id - nsb->head->ns_id; 3119 } 3120 3121 static struct nvme_ns *nvme_find_get_ns(struct nvme_ctrl *ctrl, unsigned nsid) 3122 { 3123 struct nvme_ns *ns, *ret = NULL; 3124 3125 down_read(&ctrl->namespaces_rwsem); 3126 list_for_each_entry(ns, &ctrl->namespaces, list) { 3127 if (ns->head->ns_id == nsid) { 3128 if (!kref_get_unless_zero(&ns->kref)) 3129 continue; 3130 ret = ns; 3131 break; 3132 } 3133 if (ns->head->ns_id > nsid) 3134 break; 3135 } 3136 up_read(&ctrl->namespaces_rwsem); 3137 return ret; 3138 } 3139 3140 static int nvme_setup_streams_ns(struct nvme_ctrl *ctrl, struct nvme_ns *ns) 3141 { 3142 struct streams_directive_params s; 3143 int ret; 3144 3145 if (!ctrl->nr_streams) 3146 return 0; 3147 3148 ret = nvme_get_stream_params(ctrl, &s, ns->head->ns_id); 3149 if (ret) 3150 return ret; 3151 3152 ns->sws = le32_to_cpu(s.sws); 3153 ns->sgs = le16_to_cpu(s.sgs); 3154 3155 if (ns->sws) { 3156 unsigned int bs = 1 << ns->lba_shift; 3157 3158 blk_queue_io_min(ns->queue, bs * ns->sws); 3159 if (ns->sgs) 3160 blk_queue_io_opt(ns->queue, bs * ns->sws * ns->sgs); 3161 } 3162 3163 return 0; 3164 } 3165 3166 static void nvme_alloc_ns(struct nvme_ctrl *ctrl, unsigned nsid) 3167 { 3168 struct nvme_ns *ns; 3169 struct gendisk *disk; 3170 struct nvme_id_ns *id; 3171 char disk_name[DISK_NAME_LEN]; 3172 int node = ctrl->numa_node, flags = GENHD_FL_EXT_DEVT; 3173 3174 ns = kzalloc_node(sizeof(*ns), GFP_KERNEL, node); 3175 if (!ns) 3176 return; 3177 3178 ns->queue = blk_mq_init_queue(ctrl->tagset); 3179 if (IS_ERR(ns->queue)) 3180 goto out_free_ns; 3181 3182 blk_queue_flag_set(QUEUE_FLAG_NONROT, ns->queue); 3183 if (ctrl->ops->flags & NVME_F_PCI_P2PDMA) 3184 blk_queue_flag_set(QUEUE_FLAG_PCI_P2PDMA, ns->queue); 3185 3186 ns->queue->queuedata = ns; 3187 ns->ctrl = ctrl; 3188 3189 kref_init(&ns->kref); 3190 ns->lba_shift = 9; /* set to a default value for 512 until disk is validated */ 3191 3192 blk_queue_logical_block_size(ns->queue, 1 << ns->lba_shift); 3193 nvme_set_queue_limits(ctrl, ns->queue); 3194 3195 id = nvme_identify_ns(ctrl, nsid); 3196 if (!id) 3197 goto out_free_queue; 3198 3199 if (id->ncap == 0) 3200 goto out_free_id; 3201 3202 if (nvme_init_ns_head(ns, nsid, id)) 3203 goto out_free_id; 3204 nvme_setup_streams_ns(ctrl, ns); 3205 nvme_set_disk_name(disk_name, ns, ctrl, &flags); 3206 3207 disk = alloc_disk_node(0, node); 3208 if (!disk) 3209 goto out_unlink_ns; 3210 3211 disk->fops = &nvme_fops; 3212 disk->private_data = ns; 3213 disk->queue = ns->queue; 3214 disk->flags = flags; 3215 memcpy(disk->disk_name, disk_name, DISK_NAME_LEN); 3216 ns->disk = disk; 3217 3218 __nvme_revalidate_disk(disk, id); 3219 3220 if ((ctrl->quirks & NVME_QUIRK_LIGHTNVM) && id->vs[0] == 0x1) { 3221 if (nvme_nvm_register(ns, disk_name, node)) { 3222 dev_warn(ctrl->device, "LightNVM init failure\n"); 3223 goto out_put_disk; 3224 } 3225 } 3226 3227 down_write(&ctrl->namespaces_rwsem); 3228 list_add_tail(&ns->list, &ctrl->namespaces); 3229 up_write(&ctrl->namespaces_rwsem); 3230 3231 nvme_get_ctrl(ctrl); 3232 3233 device_add_disk(ctrl->device, ns->disk, nvme_ns_id_attr_groups); 3234 3235 nvme_mpath_add_disk(ns, id); 3236 nvme_fault_inject_init(ns); 3237 kfree(id); 3238 3239 return; 3240 out_put_disk: 3241 put_disk(ns->disk); 3242 out_unlink_ns: 3243 mutex_lock(&ctrl->subsys->lock); 3244 list_del_rcu(&ns->siblings); 3245 mutex_unlock(&ctrl->subsys->lock); 3246 out_free_id: 3247 kfree(id); 3248 out_free_queue: 3249 blk_cleanup_queue(ns->queue); 3250 out_free_ns: 3251 kfree(ns); 3252 } 3253 3254 static void nvme_ns_remove(struct nvme_ns *ns) 3255 { 3256 if (test_and_set_bit(NVME_NS_REMOVING, &ns->flags)) 3257 return; 3258 3259 nvme_fault_inject_fini(ns); 3260 if (ns->disk && ns->disk->flags & GENHD_FL_UP) { 3261 del_gendisk(ns->disk); 3262 blk_cleanup_queue(ns->queue); 3263 if (blk_get_integrity(ns->disk)) 3264 blk_integrity_unregister(ns->disk); 3265 } 3266 3267 mutex_lock(&ns->ctrl->subsys->lock); 3268 list_del_rcu(&ns->siblings); 3269 nvme_mpath_clear_current_path(ns); 3270 mutex_unlock(&ns->ctrl->subsys->lock); 3271 3272 down_write(&ns->ctrl->namespaces_rwsem); 3273 list_del_init(&ns->list); 3274 up_write(&ns->ctrl->namespaces_rwsem); 3275 3276 synchronize_srcu(&ns->head->srcu); 3277 nvme_mpath_check_last_path(ns); 3278 nvme_put_ns(ns); 3279 } 3280 3281 static void nvme_validate_ns(struct nvme_ctrl *ctrl, unsigned nsid) 3282 { 3283 struct nvme_ns *ns; 3284 3285 ns = nvme_find_get_ns(ctrl, nsid); 3286 if (ns) { 3287 if (ns->disk && revalidate_disk(ns->disk)) 3288 nvme_ns_remove(ns); 3289 nvme_put_ns(ns); 3290 } else 3291 nvme_alloc_ns(ctrl, nsid); 3292 } 3293 3294 static void nvme_remove_invalid_namespaces(struct nvme_ctrl *ctrl, 3295 unsigned nsid) 3296 { 3297 struct nvme_ns *ns, *next; 3298 LIST_HEAD(rm_list); 3299 3300 down_write(&ctrl->namespaces_rwsem); 3301 list_for_each_entry_safe(ns, next, &ctrl->namespaces, list) { 3302 if (ns->head->ns_id > nsid || test_bit(NVME_NS_DEAD, &ns->flags)) 3303 list_move_tail(&ns->list, &rm_list); 3304 } 3305 up_write(&ctrl->namespaces_rwsem); 3306 3307 list_for_each_entry_safe(ns, next, &rm_list, list) 3308 nvme_ns_remove(ns); 3309 3310 } 3311 3312 static int nvme_scan_ns_list(struct nvme_ctrl *ctrl, unsigned nn) 3313 { 3314 struct nvme_ns *ns; 3315 __le32 *ns_list; 3316 unsigned i, j, nsid, prev = 0, num_lists = DIV_ROUND_UP(nn, 1024); 3317 int ret = 0; 3318 3319 ns_list = kzalloc(NVME_IDENTIFY_DATA_SIZE, GFP_KERNEL); 3320 if (!ns_list) 3321 return -ENOMEM; 3322 3323 for (i = 0; i < num_lists; i++) { 3324 ret = nvme_identify_ns_list(ctrl, prev, ns_list); 3325 if (ret) 3326 goto free; 3327 3328 for (j = 0; j < min(nn, 1024U); j++) { 3329 nsid = le32_to_cpu(ns_list[j]); 3330 if (!nsid) 3331 goto out; 3332 3333 nvme_validate_ns(ctrl, nsid); 3334 3335 while (++prev < nsid) { 3336 ns = nvme_find_get_ns(ctrl, prev); 3337 if (ns) { 3338 nvme_ns_remove(ns); 3339 nvme_put_ns(ns); 3340 } 3341 } 3342 } 3343 nn -= j; 3344 } 3345 out: 3346 nvme_remove_invalid_namespaces(ctrl, prev); 3347 free: 3348 kfree(ns_list); 3349 return ret; 3350 } 3351 3352 static void nvme_scan_ns_sequential(struct nvme_ctrl *ctrl, unsigned nn) 3353 { 3354 unsigned i; 3355 3356 for (i = 1; i <= nn; i++) 3357 nvme_validate_ns(ctrl, i); 3358 3359 nvme_remove_invalid_namespaces(ctrl, nn); 3360 } 3361 3362 static void nvme_clear_changed_ns_log(struct nvme_ctrl *ctrl) 3363 { 3364 size_t log_size = NVME_MAX_CHANGED_NAMESPACES * sizeof(__le32); 3365 __le32 *log; 3366 int error; 3367 3368 log = kzalloc(log_size, GFP_KERNEL); 3369 if (!log) 3370 return; 3371 3372 /* 3373 * We need to read the log to clear the AEN, but we don't want to rely 3374 * on it for the changed namespace information as userspace could have 3375 * raced with us in reading the log page, which could cause us to miss 3376 * updates. 3377 */ 3378 error = nvme_get_log(ctrl, NVME_NSID_ALL, NVME_LOG_CHANGED_NS, 0, log, 3379 log_size, 0); 3380 if (error) 3381 dev_warn(ctrl->device, 3382 "reading changed ns log failed: %d\n", error); 3383 3384 kfree(log); 3385 } 3386 3387 static void nvme_scan_work(struct work_struct *work) 3388 { 3389 struct nvme_ctrl *ctrl = 3390 container_of(work, struct nvme_ctrl, scan_work); 3391 struct nvme_id_ctrl *id; 3392 unsigned nn; 3393 3394 if (ctrl->state != NVME_CTRL_LIVE) 3395 return; 3396 3397 WARN_ON_ONCE(!ctrl->tagset); 3398 3399 if (test_and_clear_bit(NVME_AER_NOTICE_NS_CHANGED, &ctrl->events)) { 3400 dev_info(ctrl->device, "rescanning namespaces.\n"); 3401 nvme_clear_changed_ns_log(ctrl); 3402 } 3403 3404 if (nvme_identify_ctrl(ctrl, &id)) 3405 return; 3406 3407 mutex_lock(&ctrl->scan_lock); 3408 nn = le32_to_cpu(id->nn); 3409 if (ctrl->vs >= NVME_VS(1, 1, 0) && 3410 !(ctrl->quirks & NVME_QUIRK_IDENTIFY_CNS)) { 3411 if (!nvme_scan_ns_list(ctrl, nn)) 3412 goto out_free_id; 3413 } 3414 nvme_scan_ns_sequential(ctrl, nn); 3415 out_free_id: 3416 mutex_unlock(&ctrl->scan_lock); 3417 kfree(id); 3418 down_write(&ctrl->namespaces_rwsem); 3419 list_sort(NULL, &ctrl->namespaces, ns_cmp); 3420 up_write(&ctrl->namespaces_rwsem); 3421 } 3422 3423 /* 3424 * This function iterates the namespace list unlocked to allow recovery from 3425 * controller failure. It is up to the caller to ensure the namespace list is 3426 * not modified by scan work while this function is executing. 3427 */ 3428 void nvme_remove_namespaces(struct nvme_ctrl *ctrl) 3429 { 3430 struct nvme_ns *ns, *next; 3431 LIST_HEAD(ns_list); 3432 3433 /* prevent racing with ns scanning */ 3434 flush_work(&ctrl->scan_work); 3435 3436 /* 3437 * The dead states indicates the controller was not gracefully 3438 * disconnected. In that case, we won't be able to flush any data while 3439 * removing the namespaces' disks; fail all the queues now to avoid 3440 * potentially having to clean up the failed sync later. 3441 */ 3442 if (ctrl->state == NVME_CTRL_DEAD) 3443 nvme_kill_queues(ctrl); 3444 3445 down_write(&ctrl->namespaces_rwsem); 3446 list_splice_init(&ctrl->namespaces, &ns_list); 3447 up_write(&ctrl->namespaces_rwsem); 3448 3449 list_for_each_entry_safe(ns, next, &ns_list, list) 3450 nvme_ns_remove(ns); 3451 } 3452 EXPORT_SYMBOL_GPL(nvme_remove_namespaces); 3453 3454 static void nvme_aen_uevent(struct nvme_ctrl *ctrl) 3455 { 3456 char *envp[2] = { NULL, NULL }; 3457 u32 aen_result = ctrl->aen_result; 3458 3459 ctrl->aen_result = 0; 3460 if (!aen_result) 3461 return; 3462 3463 envp[0] = kasprintf(GFP_KERNEL, "NVME_AEN=%#08x", aen_result); 3464 if (!envp[0]) 3465 return; 3466 kobject_uevent_env(&ctrl->device->kobj, KOBJ_CHANGE, envp); 3467 kfree(envp[0]); 3468 } 3469 3470 static void nvme_async_event_work(struct work_struct *work) 3471 { 3472 struct nvme_ctrl *ctrl = 3473 container_of(work, struct nvme_ctrl, async_event_work); 3474 3475 nvme_aen_uevent(ctrl); 3476 ctrl->ops->submit_async_event(ctrl); 3477 } 3478 3479 static bool nvme_ctrl_pp_status(struct nvme_ctrl *ctrl) 3480 { 3481 3482 u32 csts; 3483 3484 if (ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts)) 3485 return false; 3486 3487 if (csts == ~0) 3488 return false; 3489 3490 return ((ctrl->ctrl_config & NVME_CC_ENABLE) && (csts & NVME_CSTS_PP)); 3491 } 3492 3493 static void nvme_get_fw_slot_info(struct nvme_ctrl *ctrl) 3494 { 3495 struct nvme_fw_slot_info_log *log; 3496 3497 log = kmalloc(sizeof(*log), GFP_KERNEL); 3498 if (!log) 3499 return; 3500 3501 if (nvme_get_log(ctrl, NVME_NSID_ALL, 0, NVME_LOG_FW_SLOT, log, 3502 sizeof(*log), 0)) 3503 dev_warn(ctrl->device, "Get FW SLOT INFO log error\n"); 3504 kfree(log); 3505 } 3506 3507 static void nvme_fw_act_work(struct work_struct *work) 3508 { 3509 struct nvme_ctrl *ctrl = container_of(work, 3510 struct nvme_ctrl, fw_act_work); 3511 unsigned long fw_act_timeout; 3512 3513 if (ctrl->mtfa) 3514 fw_act_timeout = jiffies + 3515 msecs_to_jiffies(ctrl->mtfa * 100); 3516 else 3517 fw_act_timeout = jiffies + 3518 msecs_to_jiffies(admin_timeout * 1000); 3519 3520 nvme_stop_queues(ctrl); 3521 while (nvme_ctrl_pp_status(ctrl)) { 3522 if (time_after(jiffies, fw_act_timeout)) { 3523 dev_warn(ctrl->device, 3524 "Fw activation timeout, reset controller\n"); 3525 nvme_reset_ctrl(ctrl); 3526 break; 3527 } 3528 msleep(100); 3529 } 3530 3531 if (ctrl->state != NVME_CTRL_LIVE) 3532 return; 3533 3534 nvme_start_queues(ctrl); 3535 /* read FW slot information to clear the AER */ 3536 nvme_get_fw_slot_info(ctrl); 3537 } 3538 3539 static void nvme_handle_aen_notice(struct nvme_ctrl *ctrl, u32 result) 3540 { 3541 u32 aer_notice_type = (result & 0xff00) >> 8; 3542 3543 switch (aer_notice_type) { 3544 case NVME_AER_NOTICE_NS_CHANGED: 3545 trace_nvme_async_event(ctrl, aer_notice_type); 3546 set_bit(NVME_AER_NOTICE_NS_CHANGED, &ctrl->events); 3547 nvme_queue_scan(ctrl); 3548 break; 3549 case NVME_AER_NOTICE_FW_ACT_STARTING: 3550 trace_nvme_async_event(ctrl, aer_notice_type); 3551 queue_work(nvme_wq, &ctrl->fw_act_work); 3552 break; 3553 #ifdef CONFIG_NVME_MULTIPATH 3554 case NVME_AER_NOTICE_ANA: 3555 trace_nvme_async_event(ctrl, aer_notice_type); 3556 if (!ctrl->ana_log_buf) 3557 break; 3558 queue_work(nvme_wq, &ctrl->ana_work); 3559 break; 3560 #endif 3561 default: 3562 dev_warn(ctrl->device, "async event result %08x\n", result); 3563 } 3564 } 3565 3566 void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status, 3567 volatile union nvme_result *res) 3568 { 3569 u32 result = le32_to_cpu(res->u32); 3570 u32 aer_type = result & 0x07; 3571 3572 if (le16_to_cpu(status) >> 1 != NVME_SC_SUCCESS) 3573 return; 3574 3575 switch (aer_type) { 3576 case NVME_AER_NOTICE: 3577 nvme_handle_aen_notice(ctrl, result); 3578 break; 3579 case NVME_AER_ERROR: 3580 case NVME_AER_SMART: 3581 case NVME_AER_CSS: 3582 case NVME_AER_VS: 3583 trace_nvme_async_event(ctrl, aer_type); 3584 ctrl->aen_result = result; 3585 break; 3586 default: 3587 break; 3588 } 3589 queue_work(nvme_wq, &ctrl->async_event_work); 3590 } 3591 EXPORT_SYMBOL_GPL(nvme_complete_async_event); 3592 3593 void nvme_stop_ctrl(struct nvme_ctrl *ctrl) 3594 { 3595 nvme_mpath_stop(ctrl); 3596 nvme_stop_keep_alive(ctrl); 3597 flush_work(&ctrl->async_event_work); 3598 cancel_work_sync(&ctrl->fw_act_work); 3599 if (ctrl->ops->stop_ctrl) 3600 ctrl->ops->stop_ctrl(ctrl); 3601 } 3602 EXPORT_SYMBOL_GPL(nvme_stop_ctrl); 3603 3604 void nvme_start_ctrl(struct nvme_ctrl *ctrl) 3605 { 3606 if (ctrl->kato) 3607 nvme_start_keep_alive(ctrl); 3608 3609 if (ctrl->queue_count > 1) { 3610 nvme_queue_scan(ctrl); 3611 nvme_enable_aen(ctrl); 3612 queue_work(nvme_wq, &ctrl->async_event_work); 3613 nvme_start_queues(ctrl); 3614 } 3615 } 3616 EXPORT_SYMBOL_GPL(nvme_start_ctrl); 3617 3618 void nvme_uninit_ctrl(struct nvme_ctrl *ctrl) 3619 { 3620 cdev_device_del(&ctrl->cdev, ctrl->device); 3621 } 3622 EXPORT_SYMBOL_GPL(nvme_uninit_ctrl); 3623 3624 static void nvme_free_ctrl(struct device *dev) 3625 { 3626 struct nvme_ctrl *ctrl = 3627 container_of(dev, struct nvme_ctrl, ctrl_device); 3628 struct nvme_subsystem *subsys = ctrl->subsys; 3629 3630 ida_simple_remove(&nvme_instance_ida, ctrl->instance); 3631 kfree(ctrl->effects); 3632 nvme_mpath_uninit(ctrl); 3633 __free_page(ctrl->discard_page); 3634 3635 if (subsys) { 3636 mutex_lock(&subsys->lock); 3637 list_del(&ctrl->subsys_entry); 3638 mutex_unlock(&subsys->lock); 3639 sysfs_remove_link(&subsys->dev.kobj, dev_name(ctrl->device)); 3640 } 3641 3642 ctrl->ops->free_ctrl(ctrl); 3643 3644 if (subsys) 3645 nvme_put_subsystem(subsys); 3646 } 3647 3648 /* 3649 * Initialize a NVMe controller structures. This needs to be called during 3650 * earliest initialization so that we have the initialized structured around 3651 * during probing. 3652 */ 3653 int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev, 3654 const struct nvme_ctrl_ops *ops, unsigned long quirks) 3655 { 3656 int ret; 3657 3658 ctrl->state = NVME_CTRL_NEW; 3659 spin_lock_init(&ctrl->lock); 3660 mutex_init(&ctrl->scan_lock); 3661 INIT_LIST_HEAD(&ctrl->namespaces); 3662 init_rwsem(&ctrl->namespaces_rwsem); 3663 ctrl->dev = dev; 3664 ctrl->ops = ops; 3665 ctrl->quirks = quirks; 3666 INIT_WORK(&ctrl->scan_work, nvme_scan_work); 3667 INIT_WORK(&ctrl->async_event_work, nvme_async_event_work); 3668 INIT_WORK(&ctrl->fw_act_work, nvme_fw_act_work); 3669 INIT_WORK(&ctrl->delete_work, nvme_delete_ctrl_work); 3670 3671 INIT_DELAYED_WORK(&ctrl->ka_work, nvme_keep_alive_work); 3672 memset(&ctrl->ka_cmd, 0, sizeof(ctrl->ka_cmd)); 3673 ctrl->ka_cmd.common.opcode = nvme_admin_keep_alive; 3674 3675 BUILD_BUG_ON(NVME_DSM_MAX_RANGES * sizeof(struct nvme_dsm_range) > 3676 PAGE_SIZE); 3677 ctrl->discard_page = alloc_page(GFP_KERNEL); 3678 if (!ctrl->discard_page) { 3679 ret = -ENOMEM; 3680 goto out; 3681 } 3682 3683 ret = ida_simple_get(&nvme_instance_ida, 0, 0, GFP_KERNEL); 3684 if (ret < 0) 3685 goto out; 3686 ctrl->instance = ret; 3687 3688 device_initialize(&ctrl->ctrl_device); 3689 ctrl->device = &ctrl->ctrl_device; 3690 ctrl->device->devt = MKDEV(MAJOR(nvme_chr_devt), ctrl->instance); 3691 ctrl->device->class = nvme_class; 3692 ctrl->device->parent = ctrl->dev; 3693 ctrl->device->groups = nvme_dev_attr_groups; 3694 ctrl->device->release = nvme_free_ctrl; 3695 dev_set_drvdata(ctrl->device, ctrl); 3696 ret = dev_set_name(ctrl->device, "nvme%d", ctrl->instance); 3697 if (ret) 3698 goto out_release_instance; 3699 3700 cdev_init(&ctrl->cdev, &nvme_dev_fops); 3701 ctrl->cdev.owner = ops->module; 3702 ret = cdev_device_add(&ctrl->cdev, ctrl->device); 3703 if (ret) 3704 goto out_free_name; 3705 3706 /* 3707 * Initialize latency tolerance controls. The sysfs files won't 3708 * be visible to userspace unless the device actually supports APST. 3709 */ 3710 ctrl->device->power.set_latency_tolerance = nvme_set_latency_tolerance; 3711 dev_pm_qos_update_user_latency_tolerance(ctrl->device, 3712 min(default_ps_max_latency_us, (unsigned long)S32_MAX)); 3713 3714 return 0; 3715 out_free_name: 3716 kfree_const(ctrl->device->kobj.name); 3717 out_release_instance: 3718 ida_simple_remove(&nvme_instance_ida, ctrl->instance); 3719 out: 3720 if (ctrl->discard_page) 3721 __free_page(ctrl->discard_page); 3722 return ret; 3723 } 3724 EXPORT_SYMBOL_GPL(nvme_init_ctrl); 3725 3726 /** 3727 * nvme_kill_queues(): Ends all namespace queues 3728 * @ctrl: the dead controller that needs to end 3729 * 3730 * Call this function when the driver determines it is unable to get the 3731 * controller in a state capable of servicing IO. 3732 */ 3733 void nvme_kill_queues(struct nvme_ctrl *ctrl) 3734 { 3735 struct nvme_ns *ns; 3736 3737 down_read(&ctrl->namespaces_rwsem); 3738 3739 /* Forcibly unquiesce queues to avoid blocking dispatch */ 3740 if (ctrl->admin_q && !blk_queue_dying(ctrl->admin_q)) 3741 blk_mq_unquiesce_queue(ctrl->admin_q); 3742 3743 list_for_each_entry(ns, &ctrl->namespaces, list) 3744 nvme_set_queue_dying(ns); 3745 3746 up_read(&ctrl->namespaces_rwsem); 3747 } 3748 EXPORT_SYMBOL_GPL(nvme_kill_queues); 3749 3750 void nvme_unfreeze(struct nvme_ctrl *ctrl) 3751 { 3752 struct nvme_ns *ns; 3753 3754 down_read(&ctrl->namespaces_rwsem); 3755 list_for_each_entry(ns, &ctrl->namespaces, list) 3756 blk_mq_unfreeze_queue(ns->queue); 3757 up_read(&ctrl->namespaces_rwsem); 3758 } 3759 EXPORT_SYMBOL_GPL(nvme_unfreeze); 3760 3761 void nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout) 3762 { 3763 struct nvme_ns *ns; 3764 3765 down_read(&ctrl->namespaces_rwsem); 3766 list_for_each_entry(ns, &ctrl->namespaces, list) { 3767 timeout = blk_mq_freeze_queue_wait_timeout(ns->queue, timeout); 3768 if (timeout <= 0) 3769 break; 3770 } 3771 up_read(&ctrl->namespaces_rwsem); 3772 } 3773 EXPORT_SYMBOL_GPL(nvme_wait_freeze_timeout); 3774 3775 void nvme_wait_freeze(struct nvme_ctrl *ctrl) 3776 { 3777 struct nvme_ns *ns; 3778 3779 down_read(&ctrl->namespaces_rwsem); 3780 list_for_each_entry(ns, &ctrl->namespaces, list) 3781 blk_mq_freeze_queue_wait(ns->queue); 3782 up_read(&ctrl->namespaces_rwsem); 3783 } 3784 EXPORT_SYMBOL_GPL(nvme_wait_freeze); 3785 3786 void nvme_start_freeze(struct nvme_ctrl *ctrl) 3787 { 3788 struct nvme_ns *ns; 3789 3790 down_read(&ctrl->namespaces_rwsem); 3791 list_for_each_entry(ns, &ctrl->namespaces, list) 3792 blk_freeze_queue_start(ns->queue); 3793 up_read(&ctrl->namespaces_rwsem); 3794 } 3795 EXPORT_SYMBOL_GPL(nvme_start_freeze); 3796 3797 void nvme_stop_queues(struct nvme_ctrl *ctrl) 3798 { 3799 struct nvme_ns *ns; 3800 3801 down_read(&ctrl->namespaces_rwsem); 3802 list_for_each_entry(ns, &ctrl->namespaces, list) 3803 blk_mq_quiesce_queue(ns->queue); 3804 up_read(&ctrl->namespaces_rwsem); 3805 } 3806 EXPORT_SYMBOL_GPL(nvme_stop_queues); 3807 3808 void nvme_start_queues(struct nvme_ctrl *ctrl) 3809 { 3810 struct nvme_ns *ns; 3811 3812 down_read(&ctrl->namespaces_rwsem); 3813 list_for_each_entry(ns, &ctrl->namespaces, list) 3814 blk_mq_unquiesce_queue(ns->queue); 3815 up_read(&ctrl->namespaces_rwsem); 3816 } 3817 EXPORT_SYMBOL_GPL(nvme_start_queues); 3818 3819 int __init nvme_core_init(void) 3820 { 3821 int result = -ENOMEM; 3822 3823 nvme_wq = alloc_workqueue("nvme-wq", 3824 WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_SYSFS, 0); 3825 if (!nvme_wq) 3826 goto out; 3827 3828 nvme_reset_wq = alloc_workqueue("nvme-reset-wq", 3829 WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_SYSFS, 0); 3830 if (!nvme_reset_wq) 3831 goto destroy_wq; 3832 3833 nvme_delete_wq = alloc_workqueue("nvme-delete-wq", 3834 WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_SYSFS, 0); 3835 if (!nvme_delete_wq) 3836 goto destroy_reset_wq; 3837 3838 result = alloc_chrdev_region(&nvme_chr_devt, 0, NVME_MINORS, "nvme"); 3839 if (result < 0) 3840 goto destroy_delete_wq; 3841 3842 nvme_class = class_create(THIS_MODULE, "nvme"); 3843 if (IS_ERR(nvme_class)) { 3844 result = PTR_ERR(nvme_class); 3845 goto unregister_chrdev; 3846 } 3847 3848 nvme_subsys_class = class_create(THIS_MODULE, "nvme-subsystem"); 3849 if (IS_ERR(nvme_subsys_class)) { 3850 result = PTR_ERR(nvme_subsys_class); 3851 goto destroy_class; 3852 } 3853 return 0; 3854 3855 destroy_class: 3856 class_destroy(nvme_class); 3857 unregister_chrdev: 3858 unregister_chrdev_region(nvme_chr_devt, NVME_MINORS); 3859 destroy_delete_wq: 3860 destroy_workqueue(nvme_delete_wq); 3861 destroy_reset_wq: 3862 destroy_workqueue(nvme_reset_wq); 3863 destroy_wq: 3864 destroy_workqueue(nvme_wq); 3865 out: 3866 return result; 3867 } 3868 3869 void __exit nvme_core_exit(void) 3870 { 3871 ida_destroy(&nvme_subsystems_ida); 3872 class_destroy(nvme_subsys_class); 3873 class_destroy(nvme_class); 3874 unregister_chrdev_region(nvme_chr_devt, NVME_MINORS); 3875 destroy_workqueue(nvme_delete_wq); 3876 destroy_workqueue(nvme_reset_wq); 3877 destroy_workqueue(nvme_wq); 3878 } 3879 3880 MODULE_LICENSE("GPL"); 3881 MODULE_VERSION("1.0"); 3882 module_init(nvme_core_init); 3883 module_exit(nvme_core_exit); 3884