1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * I2C Link Layer for Samsung S3FWRN5 NCI based Driver 4 * 5 * Copyright (C) 2015 Samsung Electrnoics 6 * Robert Baldyga <r.baldyga@samsung.com> 7 */ 8 9 #include <linux/clk.h> 10 #include <linux/i2c.h> 11 #include <linux/gpio.h> 12 #include <linux/delay.h> 13 #include <linux/of_gpio.h> 14 #include <linux/of_irq.h> 15 #include <linux/module.h> 16 17 #include <net/nfc/nfc.h> 18 19 #include "phy_common.h" 20 21 #define S3FWRN5_I2C_DRIVER_NAME "s3fwrn5_i2c" 22 23 struct s3fwrn5_i2c_phy { 24 struct phy_common common; 25 struct i2c_client *i2c_dev; 26 struct clk *clk; 27 28 unsigned int irq_skip:1; 29 }; 30 31 static void s3fwrn5_i2c_set_mode(void *phy_id, enum s3fwrn5_mode mode) 32 { 33 struct s3fwrn5_i2c_phy *phy = phy_id; 34 35 mutex_lock(&phy->common.mutex); 36 37 if (s3fwrn5_phy_power_ctrl(&phy->common, mode) == false) 38 goto out; 39 40 phy->irq_skip = true; 41 42 out: 43 mutex_unlock(&phy->common.mutex); 44 } 45 46 static int s3fwrn5_i2c_write(void *phy_id, struct sk_buff *skb) 47 { 48 struct s3fwrn5_i2c_phy *phy = phy_id; 49 int ret; 50 51 mutex_lock(&phy->common.mutex); 52 53 phy->irq_skip = false; 54 55 ret = i2c_master_send(phy->i2c_dev, skb->data, skb->len); 56 if (ret == -EREMOTEIO) { 57 /* Retry, chip was in standby */ 58 usleep_range(110000, 120000); 59 ret = i2c_master_send(phy->i2c_dev, skb->data, skb->len); 60 } 61 62 mutex_unlock(&phy->common.mutex); 63 64 if (ret < 0) 65 return ret; 66 67 if (ret != skb->len) 68 return -EREMOTEIO; 69 70 return 0; 71 } 72 73 static const struct s3fwrn5_phy_ops i2c_phy_ops = { 74 .set_wake = s3fwrn5_phy_set_wake, 75 .set_mode = s3fwrn5_i2c_set_mode, 76 .get_mode = s3fwrn5_phy_get_mode, 77 .write = s3fwrn5_i2c_write, 78 }; 79 80 static int s3fwrn5_i2c_read(struct s3fwrn5_i2c_phy *phy) 81 { 82 struct sk_buff *skb; 83 size_t hdr_size; 84 size_t data_len; 85 char hdr[4]; 86 int ret; 87 88 hdr_size = (phy->common.mode == S3FWRN5_MODE_NCI) ? 89 NCI_CTRL_HDR_SIZE : S3FWRN5_FW_HDR_SIZE; 90 ret = i2c_master_recv(phy->i2c_dev, hdr, hdr_size); 91 if (ret < 0) 92 return ret; 93 94 if (ret < hdr_size) 95 return -EBADMSG; 96 97 data_len = (phy->common.mode == S3FWRN5_MODE_NCI) ? 98 ((struct nci_ctrl_hdr *)hdr)->plen : 99 ((struct s3fwrn5_fw_header *)hdr)->len; 100 101 skb = alloc_skb(hdr_size + data_len, GFP_KERNEL); 102 if (!skb) 103 return -ENOMEM; 104 105 skb_put_data(skb, hdr, hdr_size); 106 107 if (data_len == 0) 108 goto out; 109 110 ret = i2c_master_recv(phy->i2c_dev, skb_put(skb, data_len), data_len); 111 if (ret != data_len) { 112 kfree_skb(skb); 113 return -EBADMSG; 114 } 115 116 out: 117 return s3fwrn5_recv_frame(phy->common.ndev, skb, phy->common.mode); 118 } 119 120 static irqreturn_t s3fwrn5_i2c_irq_thread_fn(int irq, void *phy_id) 121 { 122 struct s3fwrn5_i2c_phy *phy = phy_id; 123 124 if (!phy || !phy->common.ndev) { 125 WARN_ON_ONCE(1); 126 return IRQ_NONE; 127 } 128 129 mutex_lock(&phy->common.mutex); 130 131 if (phy->irq_skip) 132 goto out; 133 134 switch (phy->common.mode) { 135 case S3FWRN5_MODE_NCI: 136 case S3FWRN5_MODE_FW: 137 s3fwrn5_i2c_read(phy); 138 break; 139 case S3FWRN5_MODE_COLD: 140 break; 141 } 142 143 out: 144 mutex_unlock(&phy->common.mutex); 145 146 return IRQ_HANDLED; 147 } 148 149 static int s3fwrn5_i2c_parse_dt(struct i2c_client *client) 150 { 151 struct s3fwrn5_i2c_phy *phy = i2c_get_clientdata(client); 152 struct device_node *np = client->dev.of_node; 153 154 if (!np) 155 return -ENODEV; 156 157 phy->common.gpio_en = of_get_named_gpio(np, "en-gpios", 0); 158 if (!gpio_is_valid(phy->common.gpio_en)) { 159 /* Support also deprecated property */ 160 phy->common.gpio_en = of_get_named_gpio(np, 161 "s3fwrn5,en-gpios", 162 0); 163 if (!gpio_is_valid(phy->common.gpio_en)) 164 return -ENODEV; 165 } 166 167 phy->common.gpio_fw_wake = of_get_named_gpio(np, "wake-gpios", 0); 168 if (!gpio_is_valid(phy->common.gpio_fw_wake)) { 169 /* Support also deprecated property */ 170 phy->common.gpio_fw_wake = of_get_named_gpio(np, 171 "s3fwrn5,fw-gpios", 172 0); 173 if (!gpio_is_valid(phy->common.gpio_fw_wake)) 174 return -ENODEV; 175 } 176 177 return 0; 178 } 179 180 static int s3fwrn5_i2c_probe(struct i2c_client *client) 181 { 182 struct s3fwrn5_i2c_phy *phy; 183 int ret; 184 185 phy = devm_kzalloc(&client->dev, sizeof(*phy), GFP_KERNEL); 186 if (!phy) 187 return -ENOMEM; 188 189 mutex_init(&phy->common.mutex); 190 phy->common.mode = S3FWRN5_MODE_COLD; 191 phy->irq_skip = true; 192 193 phy->i2c_dev = client; 194 i2c_set_clientdata(client, phy); 195 196 ret = s3fwrn5_i2c_parse_dt(client); 197 if (ret < 0) 198 return ret; 199 200 ret = devm_gpio_request_one(&phy->i2c_dev->dev, phy->common.gpio_en, 201 GPIOF_OUT_INIT_HIGH, "s3fwrn5_en"); 202 if (ret < 0) 203 return ret; 204 205 ret = devm_gpio_request_one(&phy->i2c_dev->dev, 206 phy->common.gpio_fw_wake, 207 GPIOF_OUT_INIT_LOW, "s3fwrn5_fw_wake"); 208 if (ret < 0) 209 return ret; 210 211 /* 212 * S3FWRN5 depends on a clock input ("XI" pin) to function properly. 213 * Depending on the hardware configuration this could be an always-on 214 * oscillator or some external clock that must be explicitly enabled. 215 * Make sure the clock is running before starting S3FWRN5. 216 */ 217 phy->clk = devm_clk_get_optional_enabled(&client->dev, NULL); 218 if (IS_ERR(phy->clk)) 219 return dev_err_probe(&client->dev, PTR_ERR(phy->clk), 220 "failed to get clock\n"); 221 222 ret = s3fwrn5_probe(&phy->common.ndev, phy, &phy->i2c_dev->dev, 223 &i2c_phy_ops); 224 if (ret < 0) 225 return ret; 226 227 ret = devm_request_threaded_irq(&client->dev, phy->i2c_dev->irq, NULL, 228 s3fwrn5_i2c_irq_thread_fn, IRQF_ONESHOT, 229 S3FWRN5_I2C_DRIVER_NAME, phy); 230 if (ret) 231 goto s3fwrn5_remove; 232 233 return 0; 234 235 s3fwrn5_remove: 236 s3fwrn5_remove(phy->common.ndev); 237 return ret; 238 } 239 240 static void s3fwrn5_i2c_remove(struct i2c_client *client) 241 { 242 struct s3fwrn5_i2c_phy *phy = i2c_get_clientdata(client); 243 244 s3fwrn5_remove(phy->common.ndev); 245 } 246 247 static const struct i2c_device_id s3fwrn5_i2c_id_table[] = { 248 {S3FWRN5_I2C_DRIVER_NAME, 0}, 249 {} 250 }; 251 MODULE_DEVICE_TABLE(i2c, s3fwrn5_i2c_id_table); 252 253 static const struct of_device_id of_s3fwrn5_i2c_match[] __maybe_unused = { 254 { .compatible = "samsung,s3fwrn5-i2c", }, 255 {} 256 }; 257 MODULE_DEVICE_TABLE(of, of_s3fwrn5_i2c_match); 258 259 static struct i2c_driver s3fwrn5_i2c_driver = { 260 .driver = { 261 .name = S3FWRN5_I2C_DRIVER_NAME, 262 .of_match_table = of_match_ptr(of_s3fwrn5_i2c_match), 263 }, 264 .probe_new = s3fwrn5_i2c_probe, 265 .remove = s3fwrn5_i2c_remove, 266 .id_table = s3fwrn5_i2c_id_table, 267 }; 268 269 module_i2c_driver(s3fwrn5_i2c_driver); 270 271 MODULE_LICENSE("GPL"); 272 MODULE_DESCRIPTION("I2C driver for Samsung S3FWRN5"); 273 MODULE_AUTHOR("Robert Baldyga <r.baldyga@samsung.com>"); 274