1 /* SPDX-License-Identifier: GPL-2.0-only 2 * 3 * Copyright (c) 2021, MediaTek Inc. 4 * Copyright (c) 2021-2022, Intel Corporation. 5 * 6 * Authors: 7 * Haijun Liu <haijun.liu@mediatek.com> 8 * Moises Veleta <moises.veleta@intel.com> 9 * Ricardo Martinez <ricardo.martinez@linux.intel.com> 10 * 11 * Contributors: 12 * Amir Hanania <amir.hanania@intel.com> 13 * Andy Shevchenko <andriy.shevchenko@linux.intel.com> 14 * Chandrashekar Devegowda <chandrashekar.devegowda@intel.com> 15 * Eliot Lee <eliot.lee@intel.com> 16 */ 17 18 #ifndef __T7XX_PORT_H__ 19 #define __T7XX_PORT_H__ 20 21 #include <linux/bits.h> 22 #include <linux/device.h> 23 #include <linux/mutex.h> 24 #include <linux/sched.h> 25 #include <linux/skbuff.h> 26 #include <linux/spinlock.h> 27 #include <linux/types.h> 28 #include <linux/wait.h> 29 #include <linux/wwan.h> 30 31 #include "t7xx_hif_cldma.h" 32 #include "t7xx_pci.h" 33 34 #define PORT_CH_ID_MASK GENMASK(7, 0) 35 36 /* Channel ID and Message ID definitions. 37 * The channel number consists of peer_id(15:12) , channel_id(11:0) 38 * peer_id: 39 * 0:reserved, 1: to sAP, 2: to MD 40 */ 41 enum port_ch { 42 /* to MD */ 43 PORT_CH_CONTROL_RX = 0x2000, 44 PORT_CH_CONTROL_TX = 0x2001, 45 PORT_CH_UART1_RX = 0x2006, /* META */ 46 PORT_CH_UART1_TX = 0x2008, 47 PORT_CH_UART2_RX = 0x200a, /* AT */ 48 PORT_CH_UART2_TX = 0x200c, 49 PORT_CH_MD_LOG_RX = 0x202a, /* MD logging */ 50 PORT_CH_MD_LOG_TX = 0x202b, 51 PORT_CH_LB_IT_RX = 0x203e, /* Loop back test */ 52 PORT_CH_LB_IT_TX = 0x203f, 53 PORT_CH_STATUS_RX = 0x2043, /* Status events */ 54 PORT_CH_MIPC_RX = 0x20ce, /* MIPC */ 55 PORT_CH_MIPC_TX = 0x20cf, 56 PORT_CH_MBIM_RX = 0x20d0, 57 PORT_CH_MBIM_TX = 0x20d1, 58 PORT_CH_DSS0_RX = 0x20d2, 59 PORT_CH_DSS0_TX = 0x20d3, 60 PORT_CH_DSS1_RX = 0x20d4, 61 PORT_CH_DSS1_TX = 0x20d5, 62 PORT_CH_DSS2_RX = 0x20d6, 63 PORT_CH_DSS2_TX = 0x20d7, 64 PORT_CH_DSS3_RX = 0x20d8, 65 PORT_CH_DSS3_TX = 0x20d9, 66 PORT_CH_DSS4_RX = 0x20da, 67 PORT_CH_DSS4_TX = 0x20db, 68 PORT_CH_DSS5_RX = 0x20dc, 69 PORT_CH_DSS5_TX = 0x20dd, 70 PORT_CH_DSS6_RX = 0x20de, 71 PORT_CH_DSS6_TX = 0x20df, 72 PORT_CH_DSS7_RX = 0x20e0, 73 PORT_CH_DSS7_TX = 0x20e1, 74 }; 75 76 struct t7xx_port; 77 struct port_ops { 78 int (*init)(struct t7xx_port *port); 79 int (*recv_skb)(struct t7xx_port *port, struct sk_buff *skb); 80 void (*md_state_notify)(struct t7xx_port *port, unsigned int md_state); 81 void (*uninit)(struct t7xx_port *port); 82 int (*enable_chl)(struct t7xx_port *port); 83 int (*disable_chl)(struct t7xx_port *port); 84 }; 85 86 struct t7xx_port_conf { 87 enum port_ch tx_ch; 88 enum port_ch rx_ch; 89 unsigned char txq_index; 90 unsigned char rxq_index; 91 unsigned char txq_exp_index; 92 unsigned char rxq_exp_index; 93 enum cldma_id path_id; 94 struct port_ops *ops; 95 char *name; 96 enum wwan_port_type port_type; 97 }; 98 99 struct t7xx_port { 100 /* Members not initialized in definition */ 101 const struct t7xx_port_conf *port_conf; 102 struct t7xx_pci_dev *t7xx_dev; 103 struct device *dev; 104 u16 seq_nums[2]; /* TX/RX sequence numbers */ 105 atomic_t usage_cnt; 106 struct list_head entry; 107 struct list_head queue_entry; 108 /* TX and RX flows are asymmetric since ports are multiplexed on 109 * queues. 110 * 111 * TX: data blocks are sent directly to a queue. Each port 112 * does not maintain a TX list; instead, they only provide 113 * a wait_queue_head for blocking writes. 114 * 115 * RX: Each port uses a RX list to hold packets, 116 * allowing the modem to dispatch RX packet as quickly as possible. 117 */ 118 struct sk_buff_head rx_skb_list; 119 spinlock_t port_update_lock; /* Protects port configuration */ 120 wait_queue_head_t rx_wq; 121 int rx_length_th; 122 bool chan_enable; 123 struct task_struct *thread; 124 union { 125 struct { 126 struct wwan_port *wwan_port; 127 } wwan; 128 }; 129 }; 130 131 struct sk_buff *t7xx_port_alloc_skb(int payload); 132 struct sk_buff *t7xx_ctrl_alloc_skb(int payload); 133 int t7xx_port_enqueue_skb(struct t7xx_port *port, struct sk_buff *skb); 134 int t7xx_port_send_skb(struct t7xx_port *port, struct sk_buff *skb, unsigned int pkt_header, 135 unsigned int ex_msg); 136 int t7xx_port_send_ctl_skb(struct t7xx_port *port, struct sk_buff *skb, unsigned int msg, 137 unsigned int ex_msg); 138 139 #endif /* __T7XX_PORT_H__ */ 140