xref: /openbmc/linux/drivers/net/wwan/t7xx/t7xx_pci.h (revision 9a29f5fc)
1 /* SPDX-License-Identifier: GPL-2.0-only
2  *
3  * Copyright (c) 2021, MediaTek Inc.
4  * Copyright (c) 2021-2022, Intel Corporation.
5  *
6  * Authors:
7  *  Haijun Liu <haijun.liu@mediatek.com>
8  *  Ricardo Martinez <ricardo.martinez@linux.intel.com>
9  *  Sreehari Kancharla <sreehari.kancharla@intel.com>
10  *
11  * Contributors:
12  *  Amir Hanania <amir.hanania@intel.com>
13  *  Chiranjeevi Rapolu <chiranjeevi.rapolu@intel.com>
14  *  Moises Veleta <moises.veleta@intel.com>
15  */
16 
17 #ifndef __T7XX_PCI_H__
18 #define __T7XX_PCI_H__
19 
20 #include <linux/completion.h>
21 #include <linux/irqreturn.h>
22 #include <linux/mutex.h>
23 #include <linux/pci.h>
24 #include <linux/spinlock.h>
25 #include <linux/types.h>
26 
27 #include "t7xx_reg.h"
28 
29 /* struct t7xx_addr_base - holds base addresses
30  * @pcie_mac_ireg_base: PCIe MAC register base
31  * @pcie_ext_reg_base: used to calculate base addresses for CLDMA, DPMA and MHCCIF registers
32  * @pcie_dev_reg_trsl_addr: used to calculate the register base address
33  * @infracfg_ao_base: base address used in CLDMA reset operations
34  * @mhccif_rc_base: host view of MHCCIF rc base addr
35  */
36 struct t7xx_addr_base {
37 	void __iomem		*pcie_mac_ireg_base;
38 	void __iomem		*pcie_ext_reg_base;
39 	u32			pcie_dev_reg_trsl_addr;
40 	void __iomem		*infracfg_ao_base;
41 	void __iomem		*mhccif_rc_base;
42 };
43 
44 typedef irqreturn_t (*t7xx_intr_callback)(int irq, void *param);
45 
46 /* struct t7xx_pci_dev - MTK device context structure
47  * @intr_handler: array of handler function for request_threaded_irq
48  * @intr_thread: array of thread_fn for request_threaded_irq
49  * @callback_param: array of cookie passed back to interrupt functions
50  * @pdev: PCI device
51  * @base_addr: memory base addresses of HW components
52  * @md: modem interface
53  * @ccmni_ctlb: context structure used to control the network data path
54  * @rgu_pci_irq_en: RGU callback ISR registered and active
55  * @md_pm_entities: list of pm entities
56  * @md_pm_entity_mtx: protects md_pm_entities list
57  * @pm_sr_ack: ack from the device when went to sleep or woke up
58  * @md_pm_state: state for resume/suspend
59  * @md_pm_lock: protects PCIe sleep lock
60  * @sleep_disable_count: PCIe L1.2 lock counter
61  * @sleep_lock_acquire: indicates that sleep has been disabled
62  */
63 struct t7xx_pci_dev {
64 	t7xx_intr_callback	intr_handler[EXT_INT_NUM];
65 	t7xx_intr_callback	intr_thread[EXT_INT_NUM];
66 	void			*callback_param[EXT_INT_NUM];
67 	struct pci_dev		*pdev;
68 	struct t7xx_addr_base	base_addr;
69 	struct t7xx_modem	*md;
70 	struct t7xx_ccmni_ctrl	*ccmni_ctlb;
71 	bool			rgu_pci_irq_en;
72 
73 	/* Low Power Items */
74 	struct list_head	md_pm_entities;
75 	struct mutex		md_pm_entity_mtx;	/* Protects MD PM entities list */
76 	struct completion	pm_sr_ack;
77 	atomic_t		md_pm_state;
78 	spinlock_t		md_pm_lock;		/* Protects PCI resource lock */
79 	unsigned int		sleep_disable_count;
80 	struct completion	sleep_lock_acquire;
81 };
82 
83 enum t7xx_pm_id {
84 	PM_ENTITY_ID_CTRL1,
85 	PM_ENTITY_ID_CTRL2,
86 	PM_ENTITY_ID_DATA,
87 	PM_ENTITY_ID_INVALID
88 };
89 
90 /* struct md_pm_entity - device power management entity
91  * @entity: list of PM Entities
92  * @suspend: callback invoked before sending D3 request to device
93  * @suspend_late: callback invoked after getting D3 ACK from device
94  * @resume_early: callback invoked before sending the resume request to device
95  * @resume: callback invoked after getting resume ACK from device
96  * @id: unique PM entity identifier
97  * @entity_param: parameter passed to the registered callbacks
98  *
99  *  This structure is used to indicate PM operations required by internal
100  *  HW modules such as CLDMA and DPMA.
101  */
102 struct md_pm_entity {
103 	struct list_head	entity;
104 	int (*suspend)(struct t7xx_pci_dev *t7xx_dev, void *entity_param);
105 	void (*suspend_late)(struct t7xx_pci_dev *t7xx_dev, void *entity_param);
106 	void (*resume_early)(struct t7xx_pci_dev *t7xx_dev, void *entity_param);
107 	int (*resume)(struct t7xx_pci_dev *t7xx_dev, void *entity_param);
108 	enum t7xx_pm_id		id;
109 	void			*entity_param;
110 };
111 
112 void t7xx_pci_disable_sleep(struct t7xx_pci_dev *t7xx_dev);
113 void t7xx_pci_enable_sleep(struct t7xx_pci_dev *t7xx_dev);
114 int t7xx_pci_sleep_disable_complete(struct t7xx_pci_dev *t7xx_dev);
115 int t7xx_pci_pm_entity_register(struct t7xx_pci_dev *t7xx_dev, struct md_pm_entity *pm_entity);
116 int t7xx_pci_pm_entity_unregister(struct t7xx_pci_dev *t7xx_dev, struct md_pm_entity *pm_entity);
117 void t7xx_pci_pm_init_late(struct t7xx_pci_dev *t7xx_dev);
118 void t7xx_pci_pm_exp_detected(struct t7xx_pci_dev *t7xx_dev);
119 
120 #endif /* __T7XX_PCI_H__ */
121