1 /* 2 * This file is part of wlcore 3 * 4 * Copyright (C) 2011 Texas Instruments Inc. 5 * 6 * This program is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU General Public License 8 * version 2 as published by the Free Software Foundation. 9 * 10 * This program is distributed in the hope that it will be useful, but 11 * WITHOUT ANY WARRANTY; without even the implied warranty of 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 13 * General Public License for more details. 14 * 15 * You should have received a copy of the GNU General Public License 16 * along with this program; if not, write to the Free Software 17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 18 * 02110-1301 USA 19 * 20 */ 21 22 #ifndef __WLCORE_H__ 23 #define __WLCORE_H__ 24 25 #include <linux/platform_device.h> 26 27 #include "wlcore_i.h" 28 #include "event.h" 29 #include "boot.h" 30 31 /* The maximum number of Tx descriptors in all chip families */ 32 #define WLCORE_MAX_TX_DESCRIPTORS 32 33 34 /* 35 * We always allocate this number of mac addresses. If we don't 36 * have enough allocated addresses, the LAA bit is used 37 */ 38 #define WLCORE_NUM_MAC_ADDRESSES 3 39 40 /* wl12xx/wl18xx maximum transmission power (in dBm) */ 41 #define WLCORE_MAX_TXPWR 25 42 43 /* Texas Instruments pre assigned OUI */ 44 #define WLCORE_TI_OUI_ADDRESS 0x080028 45 46 /* forward declaration */ 47 struct wl1271_tx_hw_descr; 48 enum wl_rx_buf_align; 49 struct wl1271_rx_descriptor; 50 51 struct wlcore_ops { 52 int (*setup)(struct wl1271 *wl); 53 int (*identify_chip)(struct wl1271 *wl); 54 int (*identify_fw)(struct wl1271 *wl); 55 int (*boot)(struct wl1271 *wl); 56 int (*plt_init)(struct wl1271 *wl); 57 int (*trigger_cmd)(struct wl1271 *wl, int cmd_box_addr, 58 void *buf, size_t len); 59 int (*ack_event)(struct wl1271 *wl); 60 int (*wait_for_event)(struct wl1271 *wl, enum wlcore_wait_event event, 61 bool *timeout); 62 int (*process_mailbox_events)(struct wl1271 *wl); 63 u32 (*calc_tx_blocks)(struct wl1271 *wl, u32 len, u32 spare_blks); 64 void (*set_tx_desc_blocks)(struct wl1271 *wl, 65 struct wl1271_tx_hw_descr *desc, 66 u32 blks, u32 spare_blks); 67 void (*set_tx_desc_data_len)(struct wl1271 *wl, 68 struct wl1271_tx_hw_descr *desc, 69 struct sk_buff *skb); 70 enum wl_rx_buf_align (*get_rx_buf_align)(struct wl1271 *wl, 71 u32 rx_desc); 72 int (*prepare_read)(struct wl1271 *wl, u32 rx_desc, u32 len); 73 u32 (*get_rx_packet_len)(struct wl1271 *wl, void *rx_data, 74 u32 data_len); 75 int (*tx_delayed_compl)(struct wl1271 *wl); 76 void (*tx_immediate_compl)(struct wl1271 *wl); 77 int (*hw_init)(struct wl1271 *wl); 78 int (*init_vif)(struct wl1271 *wl, struct wl12xx_vif *wlvif); 79 void (*convert_fw_status)(struct wl1271 *wl, void *raw_fw_status, 80 struct wl_fw_status *fw_status); 81 u32 (*sta_get_ap_rate_mask)(struct wl1271 *wl, 82 struct wl12xx_vif *wlvif); 83 int (*get_pg_ver)(struct wl1271 *wl, s8 *ver); 84 int (*get_mac)(struct wl1271 *wl); 85 void (*set_tx_desc_csum)(struct wl1271 *wl, 86 struct wl1271_tx_hw_descr *desc, 87 struct sk_buff *skb); 88 void (*set_rx_csum)(struct wl1271 *wl, 89 struct wl1271_rx_descriptor *desc, 90 struct sk_buff *skb); 91 u32 (*ap_get_mimo_wide_rate_mask)(struct wl1271 *wl, 92 struct wl12xx_vif *wlvif); 93 int (*debugfs_init)(struct wl1271 *wl, struct dentry *rootdir); 94 int (*handle_static_data)(struct wl1271 *wl, 95 struct wl1271_static_data *static_data); 96 int (*scan_start)(struct wl1271 *wl, struct wl12xx_vif *wlvif, 97 struct cfg80211_scan_request *req); 98 int (*scan_stop)(struct wl1271 *wl, struct wl12xx_vif *wlvif); 99 int (*sched_scan_start)(struct wl1271 *wl, struct wl12xx_vif *wlvif, 100 struct cfg80211_sched_scan_request *req, 101 struct ieee80211_scan_ies *ies); 102 void (*sched_scan_stop)(struct wl1271 *wl, struct wl12xx_vif *wlvif); 103 int (*get_spare_blocks)(struct wl1271 *wl, bool is_gem); 104 int (*set_key)(struct wl1271 *wl, enum set_key_cmd cmd, 105 struct ieee80211_vif *vif, 106 struct ieee80211_sta *sta, 107 struct ieee80211_key_conf *key_conf); 108 int (*channel_switch)(struct wl1271 *wl, 109 struct wl12xx_vif *wlvif, 110 struct ieee80211_channel_switch *ch_switch); 111 u32 (*pre_pkt_send)(struct wl1271 *wl, u32 buf_offset, u32 last_len); 112 void (*sta_rc_update)(struct wl1271 *wl, struct wl12xx_vif *wlvif); 113 int (*set_peer_cap)(struct wl1271 *wl, 114 struct ieee80211_sta_ht_cap *ht_cap, 115 bool allow_ht_operation, 116 u32 rate_set, u8 hlid); 117 u32 (*convert_hwaddr)(struct wl1271 *wl, u32 hwaddr); 118 bool (*lnk_high_prio)(struct wl1271 *wl, u8 hlid, 119 struct wl1271_link *lnk); 120 bool (*lnk_low_prio)(struct wl1271 *wl, u8 hlid, 121 struct wl1271_link *lnk); 122 int (*interrupt_notify)(struct wl1271 *wl, bool action); 123 int (*rx_ba_filter)(struct wl1271 *wl, bool action); 124 int (*ap_sleep)(struct wl1271 *wl); 125 int (*smart_config_start)(struct wl1271 *wl, u32 group_bitmap); 126 int (*smart_config_stop)(struct wl1271 *wl); 127 int (*smart_config_set_group_key)(struct wl1271 *wl, u16 group_id, 128 u8 key_len, u8 *key); 129 int (*set_cac)(struct wl1271 *wl, struct wl12xx_vif *wlvif, 130 bool start); 131 int (*dfs_master_restart)(struct wl1271 *wl, struct wl12xx_vif *wlvif); 132 }; 133 134 enum wlcore_partitions { 135 PART_DOWN, 136 PART_WORK, 137 PART_BOOT, 138 PART_DRPW, 139 PART_TOP_PRCM_ELP_SOC, 140 PART_PHY_INIT, 141 142 PART_TABLE_LEN, 143 }; 144 145 struct wlcore_partition { 146 u32 size; 147 u32 start; 148 }; 149 150 struct wlcore_partition_set { 151 struct wlcore_partition mem; 152 struct wlcore_partition reg; 153 struct wlcore_partition mem2; 154 struct wlcore_partition mem3; 155 }; 156 157 enum wlcore_registers { 158 /* register addresses, used with partition translation */ 159 REG_ECPU_CONTROL, 160 REG_INTERRUPT_NO_CLEAR, 161 REG_INTERRUPT_ACK, 162 REG_COMMAND_MAILBOX_PTR, 163 REG_EVENT_MAILBOX_PTR, 164 REG_INTERRUPT_TRIG, 165 REG_INTERRUPT_MASK, 166 REG_PC_ON_RECOVERY, 167 REG_CHIP_ID_B, 168 REG_CMD_MBOX_ADDRESS, 169 170 /* data access memory addresses, used with partition translation */ 171 REG_SLV_MEM_DATA, 172 REG_SLV_REG_DATA, 173 174 /* raw data access memory addresses */ 175 REG_RAW_FW_STATUS_ADDR, 176 177 REG_TABLE_LEN, 178 }; 179 180 struct wl1271_stats { 181 void *fw_stats; 182 unsigned long fw_stats_update; 183 size_t fw_stats_len; 184 185 unsigned int retry_count; 186 unsigned int excessive_retries; 187 }; 188 189 struct wl1271 { 190 bool initialized; 191 struct ieee80211_hw *hw; 192 bool mac80211_registered; 193 194 struct device *dev; 195 struct platform_device *pdev; 196 197 void *if_priv; 198 199 struct wl1271_if_operations *if_ops; 200 201 int irq; 202 int wakeirq; 203 204 int irq_flags; 205 int wakeirq_flags; 206 207 spinlock_t wl_lock; 208 209 enum wlcore_state state; 210 enum wl12xx_fw_type fw_type; 211 bool plt; 212 enum plt_mode plt_mode; 213 u8 fem_manuf; 214 u8 last_vif_count; 215 struct mutex mutex; 216 217 unsigned long flags; 218 219 struct wlcore_partition_set curr_part; 220 221 struct wl1271_chip chip; 222 223 int cmd_box_addr; 224 225 u8 *fw; 226 size_t fw_len; 227 void *nvs; 228 size_t nvs_len; 229 230 s8 hw_pg_ver; 231 232 /* address read from the fuse ROM */ 233 u32 fuse_oui_addr; 234 u32 fuse_nic_addr; 235 236 /* we have up to 2 MAC addresses */ 237 struct mac_address addresses[WLCORE_NUM_MAC_ADDRESSES]; 238 int channel; 239 u8 system_hlid; 240 241 unsigned long links_map[BITS_TO_LONGS(WLCORE_MAX_LINKS)]; 242 unsigned long roles_map[BITS_TO_LONGS(WL12XX_MAX_ROLES)]; 243 unsigned long roc_map[BITS_TO_LONGS(WL12XX_MAX_ROLES)]; 244 unsigned long rate_policies_map[ 245 BITS_TO_LONGS(WL12XX_MAX_RATE_POLICIES)]; 246 unsigned long klv_templates_map[ 247 BITS_TO_LONGS(WLCORE_MAX_KLV_TEMPLATES)]; 248 249 u8 session_ids[WLCORE_MAX_LINKS]; 250 251 struct list_head wlvif_list; 252 253 u8 sta_count; 254 u8 ap_count; 255 256 struct wl1271_acx_mem_map *target_mem_map; 257 258 /* Accounting for allocated / available TX blocks on HW */ 259 u32 tx_blocks_freed; 260 u32 tx_blocks_available; 261 u32 tx_allocated_blocks; 262 u32 tx_results_count; 263 264 /* Accounting for allocated / available Tx packets in HW */ 265 u32 tx_pkts_freed[NUM_TX_QUEUES]; 266 u32 tx_allocated_pkts[NUM_TX_QUEUES]; 267 268 /* Transmitted TX packets counter for chipset interface */ 269 u32 tx_packets_count; 270 271 /* Time-offset between host and chipset clocks */ 272 s64 time_offset; 273 274 /* Frames scheduled for transmission, not handled yet */ 275 int tx_queue_count[NUM_TX_QUEUES]; 276 unsigned long queue_stop_reasons[ 277 NUM_TX_QUEUES * WLCORE_NUM_MAC_ADDRESSES]; 278 279 /* Frames received, not handled yet by mac80211 */ 280 struct sk_buff_head deferred_rx_queue; 281 282 /* Frames sent, not returned yet to mac80211 */ 283 struct sk_buff_head deferred_tx_queue; 284 285 struct work_struct tx_work; 286 struct workqueue_struct *freezable_wq; 287 288 /* Pending TX frames */ 289 unsigned long tx_frames_map[BITS_TO_LONGS(WLCORE_MAX_TX_DESCRIPTORS)]; 290 struct sk_buff *tx_frames[WLCORE_MAX_TX_DESCRIPTORS]; 291 int tx_frames_cnt; 292 293 /* FW Rx counter */ 294 u32 rx_counter; 295 296 /* Intermediate buffer, used for packet aggregation */ 297 u8 *aggr_buf; 298 u32 aggr_buf_size; 299 300 /* Reusable dummy packet template */ 301 struct sk_buff *dummy_packet; 302 303 /* Network stack work */ 304 struct work_struct netstack_work; 305 306 /* FW log buffer */ 307 u8 *fwlog; 308 309 /* Number of valid bytes in the FW log buffer */ 310 ssize_t fwlog_size; 311 312 /* FW log end marker */ 313 u32 fwlog_end; 314 315 /* FW memory block size */ 316 u32 fw_mem_block_size; 317 318 /* Hardware recovery work */ 319 struct work_struct recovery_work; 320 bool watchdog_recovery; 321 322 /* Reg domain last configuration */ 323 u32 reg_ch_conf_last[2] __aligned(8); 324 /* Reg domain pending configuration */ 325 u32 reg_ch_conf_pending[2]; 326 327 /* Pointer that holds DMA-friendly block for the mailbox */ 328 void *mbox; 329 330 /* The mbox event mask */ 331 u32 event_mask; 332 /* events to unmask only when ap interface is up */ 333 u32 ap_event_mask; 334 335 /* Mailbox pointers */ 336 u32 mbox_size; 337 u32 mbox_ptr[2]; 338 339 /* Are we currently scanning */ 340 struct wl12xx_vif *scan_wlvif; 341 struct wl1271_scan scan; 342 struct delayed_work scan_complete_work; 343 344 struct ieee80211_vif *roc_vif; 345 struct delayed_work roc_complete_work; 346 347 struct wl12xx_vif *sched_vif; 348 349 /* The current band */ 350 enum nl80211_band band; 351 352 struct completion *elp_compl; 353 354 /* in dBm */ 355 int power_level; 356 357 struct wl1271_stats stats; 358 359 __le32 *buffer_32; 360 u32 buffer_cmd; 361 u32 buffer_busyword[WL1271_BUSY_WORD_CNT]; 362 363 void *raw_fw_status; 364 struct wl_fw_status *fw_status; 365 struct wl1271_tx_hw_res_if *tx_res_if; 366 367 /* Current chipset configuration */ 368 struct wlcore_conf conf; 369 370 bool sg_enabled; 371 372 bool enable_11a; 373 374 int recovery_count; 375 376 /* Most recently reported noise in dBm */ 377 s8 noise; 378 379 /* bands supported by this instance of wl12xx */ 380 struct ieee80211_supported_band bands[WLCORE_NUM_BANDS]; 381 382 /* 383 * wowlan trigger was configured during suspend. 384 * (currently, only "ANY" trigger is supported) 385 */ 386 bool wow_enabled; 387 bool irq_wake_enabled; 388 389 /* 390 * AP-mode - links indexed by HLID. The global and broadcast links 391 * are always active. 392 */ 393 struct wl1271_link links[WLCORE_MAX_LINKS]; 394 395 /* number of currently active links */ 396 int active_link_count; 397 398 /* Fast/slow links bitmap according to FW */ 399 unsigned long fw_fast_lnk_map; 400 401 /* AP-mode - a bitmap of links currently in PS mode according to FW */ 402 unsigned long ap_fw_ps_map; 403 404 /* AP-mode - a bitmap of links currently in PS mode in mac80211 */ 405 unsigned long ap_ps_map; 406 407 /* Quirks of specific hardware revisions */ 408 unsigned int quirks; 409 410 /* number of currently active RX BA sessions */ 411 int ba_rx_session_count; 412 413 /* Maximum number of supported RX BA sessions */ 414 int ba_rx_session_count_max; 415 416 /* AP-mode - number of currently connected stations */ 417 int active_sta_count; 418 419 /* Flag determining whether AP should broadcast OFDM-only rates */ 420 bool ofdm_only_ap; 421 422 /* last wlvif we transmitted from */ 423 struct wl12xx_vif *last_wlvif; 424 425 /* work to fire when Tx is stuck */ 426 struct delayed_work tx_watchdog_work; 427 428 struct wlcore_ops *ops; 429 /* pointer to the lower driver partition table */ 430 const struct wlcore_partition_set *ptable; 431 /* pointer to the lower driver register table */ 432 const int *rtable; 433 /* name of the firmwares to load - for PLT, single role, multi-role */ 434 const char *plt_fw_name; 435 const char *sr_fw_name; 436 const char *mr_fw_name; 437 438 u8 scan_templ_id_2_4; 439 u8 scan_templ_id_5; 440 u8 sched_scan_templ_id_2_4; 441 u8 sched_scan_templ_id_5; 442 u8 max_channels_5; 443 444 /* per-chip-family private structure */ 445 void *priv; 446 447 /* number of TX descriptors the HW supports. */ 448 u32 num_tx_desc; 449 /* number of RX descriptors the HW supports. */ 450 u32 num_rx_desc; 451 /* number of links the HW supports */ 452 u8 num_links; 453 /* max stations a single AP can support */ 454 u8 max_ap_stations; 455 456 /* translate HW Tx rates to standard rate-indices */ 457 const u8 **band_rate_to_idx; 458 459 /* size of table for HW rates that can be received from chip */ 460 u8 hw_tx_rate_tbl_size; 461 462 /* this HW rate and below are considered HT rates for this chip */ 463 u8 hw_min_ht_rate; 464 465 /* HW HT (11n) capabilities */ 466 struct ieee80211_sta_ht_cap ht_cap[WLCORE_NUM_BANDS]; 467 468 /* the current dfs region */ 469 enum nl80211_dfs_regions dfs_region; 470 bool radar_debug_mode; 471 472 /* size of the private FW status data */ 473 size_t fw_status_len; 474 size_t fw_status_priv_len; 475 476 /* RX Data filter rule state - enabled/disabled */ 477 unsigned long rx_filter_enabled[BITS_TO_LONGS(WL1271_MAX_RX_FILTERS)]; 478 479 /* size of the private static data */ 480 size_t static_data_priv_len; 481 482 /* the current channel type */ 483 enum nl80211_channel_type channel_type; 484 485 /* mutex for protecting the tx_flush function */ 486 struct mutex flush_mutex; 487 488 /* sleep auth value currently configured to FW */ 489 int sleep_auth; 490 491 /* the number of allocated MAC addresses in this chip */ 492 int num_mac_addr; 493 494 /* minimum FW version required for the driver to work in single-role */ 495 unsigned int min_sr_fw_ver[NUM_FW_VER]; 496 497 /* minimum FW version required for the driver to work in multi-role */ 498 unsigned int min_mr_fw_ver[NUM_FW_VER]; 499 500 struct completion nvs_loading_complete; 501 502 /* interface combinations supported by the hw */ 503 const struct ieee80211_iface_combination *iface_combinations; 504 u8 n_iface_combinations; 505 506 /* dynamic fw traces */ 507 u32 dynamic_fw_traces; 508 509 /* time sync zone master */ 510 u8 zone_master_mac_addr[ETH_ALEN]; 511 }; 512 513 int wlcore_probe(struct wl1271 *wl, struct platform_device *pdev); 514 int wlcore_remove(struct platform_device *pdev); 515 struct ieee80211_hw *wlcore_alloc_hw(size_t priv_size, u32 aggr_buf_size, 516 u32 mbox_size); 517 int wlcore_free_hw(struct wl1271 *wl); 518 int wlcore_set_key(struct wl1271 *wl, enum set_key_cmd cmd, 519 struct ieee80211_vif *vif, 520 struct ieee80211_sta *sta, 521 struct ieee80211_key_conf *key_conf); 522 void wlcore_regdomain_config(struct wl1271 *wl); 523 void wlcore_update_inconn_sta(struct wl1271 *wl, struct wl12xx_vif *wlvif, 524 struct wl1271_station *wl_sta, bool in_conn); 525 526 static inline void 527 wlcore_set_ht_cap(struct wl1271 *wl, enum nl80211_band band, 528 struct ieee80211_sta_ht_cap *ht_cap) 529 { 530 memcpy(&wl->ht_cap[band], ht_cap, sizeof(*ht_cap)); 531 } 532 533 /* Tell wlcore not to care about this element when checking the version */ 534 #define WLCORE_FW_VER_IGNORE -1 535 536 static inline void 537 wlcore_set_min_fw_ver(struct wl1271 *wl, unsigned int chip, 538 unsigned int iftype_sr, unsigned int major_sr, 539 unsigned int subtype_sr, unsigned int minor_sr, 540 unsigned int iftype_mr, unsigned int major_mr, 541 unsigned int subtype_mr, unsigned int minor_mr) 542 { 543 wl->min_sr_fw_ver[FW_VER_CHIP] = chip; 544 wl->min_sr_fw_ver[FW_VER_IF_TYPE] = iftype_sr; 545 wl->min_sr_fw_ver[FW_VER_MAJOR] = major_sr; 546 wl->min_sr_fw_ver[FW_VER_SUBTYPE] = subtype_sr; 547 wl->min_sr_fw_ver[FW_VER_MINOR] = minor_sr; 548 549 wl->min_mr_fw_ver[FW_VER_CHIP] = chip; 550 wl->min_mr_fw_ver[FW_VER_IF_TYPE] = iftype_mr; 551 wl->min_mr_fw_ver[FW_VER_MAJOR] = major_mr; 552 wl->min_mr_fw_ver[FW_VER_SUBTYPE] = subtype_mr; 553 wl->min_mr_fw_ver[FW_VER_MINOR] = minor_mr; 554 } 555 556 /* Firmware image load chunk size */ 557 #define CHUNK_SIZE 16384 558 559 /* Quirks */ 560 561 /* Each RX/TX transaction requires an end-of-transaction transfer */ 562 #define WLCORE_QUIRK_END_OF_TRANSACTION BIT(0) 563 564 /* the first start_role(sta) sometimes doesn't work on wl12xx */ 565 #define WLCORE_QUIRK_START_STA_FAILS BIT(1) 566 567 /* wl127x and SPI don't support SDIO block size alignment */ 568 #define WLCORE_QUIRK_TX_BLOCKSIZE_ALIGN BIT(2) 569 570 /* means aggregated Rx packets are aligned to a SDIO block */ 571 #define WLCORE_QUIRK_RX_BLOCKSIZE_ALIGN BIT(3) 572 573 /* Older firmwares did not implement the FW logger over bus feature */ 574 #define WLCORE_QUIRK_FWLOG_NOT_IMPLEMENTED BIT(4) 575 576 /* Older firmwares use an old NVS format */ 577 #define WLCORE_QUIRK_LEGACY_NVS BIT(5) 578 579 /* pad only the last frame in the aggregate buffer */ 580 #define WLCORE_QUIRK_TX_PAD_LAST_FRAME BIT(7) 581 582 /* extra header space is required for TKIP */ 583 #define WLCORE_QUIRK_TKIP_HEADER_SPACE BIT(8) 584 585 /* Some firmwares not support sched scans while connected */ 586 #define WLCORE_QUIRK_NO_SCHED_SCAN_WHILE_CONN BIT(9) 587 588 /* separate probe response templates for one-shot and sched scans */ 589 #define WLCORE_QUIRK_DUAL_PROBE_TMPL BIT(10) 590 591 /* Firmware requires reg domain configuration for active calibration */ 592 #define WLCORE_QUIRK_REGDOMAIN_CONF BIT(11) 593 594 /* The FW only support a zero session id for AP */ 595 #define WLCORE_QUIRK_AP_ZERO_SESSION_ID BIT(12) 596 597 /* TODO: move all these common registers and values elsewhere */ 598 #define HW_ACCESS_ELP_CTRL_REG 0x1FFFC 599 600 /* ELP register commands */ 601 #define ELPCTRL_WAKE_UP 0x1 602 #define ELPCTRL_WAKE_UP_WLAN_READY 0x5 603 #define ELPCTRL_SLEEP 0x0 604 /* ELP WLAN_READY bit */ 605 #define ELPCTRL_WLAN_READY 0x2 606 607 /************************************************************************* 608 609 Interrupt Trigger Register (Host -> WiLink) 610 611 **************************************************************************/ 612 613 /* Hardware to Embedded CPU Interrupts - first 32-bit register set */ 614 615 /* 616 * The host sets this bit to inform the Wlan 617 * FW that a TX packet is in the XFER 618 * Buffer #0. 619 */ 620 #define INTR_TRIG_TX_PROC0 BIT(2) 621 622 /* 623 * The host sets this bit to inform the FW 624 * that it read a packet from RX XFER 625 * Buffer #0. 626 */ 627 #define INTR_TRIG_RX_PROC0 BIT(3) 628 629 #define INTR_TRIG_DEBUG_ACK BIT(4) 630 631 #define INTR_TRIG_STATE_CHANGED BIT(5) 632 633 /* Hardware to Embedded CPU Interrupts - second 32-bit register set */ 634 635 /* 636 * The host sets this bit to inform the FW 637 * that it read a packet from RX XFER 638 * Buffer #1. 639 */ 640 #define INTR_TRIG_RX_PROC1 BIT(17) 641 642 /* 643 * The host sets this bit to inform the Wlan 644 * hardware that a TX packet is in the XFER 645 * Buffer #1. 646 */ 647 #define INTR_TRIG_TX_PROC1 BIT(18) 648 649 #define ACX_SLV_SOFT_RESET_BIT BIT(1) 650 #define SOFT_RESET_MAX_TIME 1000000 651 #define SOFT_RESET_STALL_TIME 1000 652 653 #define ECPU_CONTROL_HALT 0x00000101 654 655 #define WELP_ARM_COMMAND_VAL 0x4 656 657 #endif /* __WLCORE_H__ */ 658