1 /**
2  * Copyright (c) 2014 Redpine Signals Inc.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for any
5  * purpose with or without fee is hereby granted, provided that the above
6  * copyright notice and this permission notice appear in all copies.
7  *
8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15  */
16 
17 #ifndef __RSI_MGMT_H__
18 #define __RSI_MGMT_H__
19 
20 #include <linux/sort.h>
21 #include "rsi_boot_params.h"
22 #include "rsi_main.h"
23 
24 #define MAX_MGMT_PKT_SIZE               512
25 #define RSI_NEEDED_HEADROOM             80
26 #define RSI_RCV_BUFFER_LEN              2000
27 
28 #define RSI_11B_MODE                    0
29 #define RSI_11G_MODE                    BIT(7)
30 #define RETRY_COUNT                     8
31 #define RETRY_LONG                      4
32 #define RETRY_SHORT                     7
33 #define WMM_SHORT_SLOT_TIME             9
34 #define SIFS_DURATION                   16
35 
36 #define KEY_TYPE_CLEAR                  0
37 #define RSI_PAIRWISE_KEY                1
38 #define RSI_GROUP_KEY                   2
39 
40 /* EPPROM_READ_ADDRESS */
41 #define WLAN_MAC_EEPROM_ADDR            40
42 #define WLAN_MAC_MAGIC_WORD_LEN         0x01
43 #define WLAN_HOST_MODE_LEN              0x04
44 #define WLAN_FW_VERSION_LEN             0x08
45 #define MAGIC_WORD                      0x5A
46 #define WLAN_EEPROM_RFTYPE_ADDR		424
47 
48 /*WOWLAN RESUME WAKEUP TYPES*/
49 #define RSI_UNICAST_MAGIC_PKT		BIT(0)
50 #define RSI_BROADCAST_MAGICPKT		BIT(1)
51 #define RSI_EAPOL_PKT			BIT(2)
52 #define RSI_DISCONNECT_PKT		BIT(3)
53 #define RSI_HW_BMISS_PKT		BIT(4)
54 #define RSI_INSERT_SEQ_IN_FW		BIT(2)
55 
56 #define WOW_MAX_FILTERS_PER_LIST 16
57 #define WOW_PATTERN_SIZE 256
58 
59 /* Receive Frame Types */
60 #define TA_CONFIRM_TYPE                 0x01
61 #define RX_DOT11_MGMT                   0x02
62 #define TX_STATUS_IND                   0x04
63 #define BEACON_EVENT_IND		0x08
64 #define PROBEREQ_CONFIRM                2
65 #define CARD_READY_IND                  0x00
66 
67 #define RSI_DELETE_PEER                 0x0
68 #define RSI_ADD_PEER                    0x1
69 #define START_AMPDU_AGGR                0x1
70 #define STOP_AMPDU_AGGR                 0x0
71 #define INTERNAL_MGMT_PKT               0x99
72 
73 #define PUT_BBP_RESET                   0
74 #define BBP_REG_WRITE                   0
75 #define RF_RESET_ENABLE                 BIT(3)
76 #define RATE_INFO_ENABLE                BIT(0)
77 #define MORE_DATA_PRESENT		BIT(1)
78 #define RSI_BROADCAST_PKT               BIT(9)
79 #define RSI_DESC_REQUIRE_CFM_TO_HOST	BIT(2)
80 #define RSI_ADD_DELTA_TSF_VAP_ID	BIT(3)
81 #define RSI_FETCH_RETRY_CNT_FRM_HST	BIT(4)
82 #define RSI_QOS_ENABLE			BIT(12)
83 #define RSI_REKEY_PURPOSE		BIT(13)
84 #define RSI_ENCRYPT_PKT			BIT(15)
85 #define RSI_SET_PS_ENABLE		BIT(12)
86 
87 #define RSI_CMDDESC_40MHZ		BIT(4)
88 #define RSI_CMDDESC_UPPER_20_ENABLE	BIT(5)
89 #define RSI_CMDDESC_LOWER_20_ENABLE	BIT(6)
90 #define RSI_CMDDESC_FULL_40_ENABLE	(BIT(5) | BIT(6))
91 #define UPPER_20_ENABLE                 (0x2 << 12)
92 #define LOWER_20_ENABLE                 (0x4 << 12)
93 #define FULL40M_ENABLE                  0x6
94 
95 #define RSI_LMAC_CLOCK_80MHZ            0x1
96 #define RSI_ENABLE_40MHZ                (0x1 << 3)
97 #define ENABLE_SHORTGI_RATE		BIT(9)
98 
99 #define RX_BA_INDICATION                1
100 #define RSI_TBL_SZ                      40
101 #define MAX_RETRIES                     8
102 #define RSI_IFTYPE_STATION		 0
103 
104 #define STD_RATE_MCS7                   0x07
105 #define STD_RATE_MCS6                   0x06
106 #define STD_RATE_MCS5                   0x05
107 #define STD_RATE_MCS4                   0x04
108 #define STD_RATE_MCS3                   0x03
109 #define STD_RATE_MCS2                   0x02
110 #define STD_RATE_MCS1                   0x01
111 #define STD_RATE_MCS0                   0x00
112 #define STD_RATE_54                     0x6c
113 #define STD_RATE_48                     0x60
114 #define STD_RATE_36                     0x48
115 #define STD_RATE_24                     0x30
116 #define STD_RATE_18                     0x24
117 #define STD_RATE_12                     0x18
118 #define STD_RATE_11                     0x16
119 #define STD_RATE_09                     0x12
120 #define STD_RATE_06                     0x0C
121 #define STD_RATE_5_5                    0x0B
122 #define STD_RATE_02                     0x04
123 #define STD_RATE_01                     0x02
124 
125 #define RSI_RF_TYPE                     1
126 #define RSI_RATE_00                     0x00
127 #define RSI_RATE_1                      0x0
128 #define RSI_RATE_2                      0x2
129 #define RSI_RATE_5_5                    0x4
130 #define RSI_RATE_11                     0x6
131 #define RSI_RATE_6                      0x8b
132 #define RSI_RATE_9                      0x8f
133 #define RSI_RATE_12                     0x8a
134 #define RSI_RATE_18                     0x8e
135 #define RSI_RATE_24                     0x89
136 #define RSI_RATE_36                     0x8d
137 #define RSI_RATE_48                     0x88
138 #define RSI_RATE_54                     0x8c
139 #define RSI_RATE_MCS0                   0x100
140 #define RSI_RATE_MCS1                   0x101
141 #define RSI_RATE_MCS2                   0x102
142 #define RSI_RATE_MCS3                   0x103
143 #define RSI_RATE_MCS4                   0x104
144 #define RSI_RATE_MCS5                   0x105
145 #define RSI_RATE_MCS6                   0x106
146 #define RSI_RATE_MCS7                   0x107
147 #define RSI_RATE_MCS7_SG                0x307
148 #define RSI_RATE_AUTO			0xffff
149 
150 #define BW_20MHZ                        0
151 #define BW_40MHZ                        1
152 
153 #define EP_2GHZ_20MHZ			0
154 #define EP_2GHZ_40MHZ			1
155 #define EP_5GHZ_20MHZ			2
156 #define EP_5GHZ_40MHZ			3
157 
158 #define SIFS_TX_11N_VALUE		580
159 #define SIFS_TX_11B_VALUE		346
160 #define SHORT_SLOT_VALUE		360
161 #define LONG_SLOT_VALUE			640
162 #define OFDM_ACK_TOUT_VALUE		2720
163 #define CCK_ACK_TOUT_VALUE		9440
164 #define LONG_PREAMBLE			0x0000
165 #define SHORT_PREAMBLE			0x0001
166 
167 #define RSI_SUPP_FILTERS	(FIF_ALLMULTI | FIF_PROBE_REQ |\
168 				 FIF_BCN_PRBRESP_PROMISC)
169 
170 #define ANTENNA_SEL_INT			0x02 /* RF_OUT_2 / Integerated */
171 #define ANTENNA_SEL_UFL			0x03 /* RF_OUT_1 / U.FL */
172 #define ANTENNA_MASK_VALUE		0x00ff
173 #define ANTENNA_SEL_TYPE		1
174 
175 /* Rx filter word definitions */
176 #define PROMISCOUS_MODE			BIT(0)
177 #define ALLOW_DATA_ASSOC_PEER		BIT(1)
178 #define ALLOW_MGMT_ASSOC_PEER		BIT(2)
179 #define ALLOW_CTRL_ASSOC_PEER		BIT(3)
180 #define DISALLOW_BEACONS		BIT(4)
181 #define ALLOW_CONN_PEER_MGMT_WHILE_BUF_FULL BIT(5)
182 #define DISALLOW_BROADCAST_DATA		BIT(6)
183 
184 #define RSI_MPDU_DENSITY		0x8
185 #define RSI_CHAN_RADAR			BIT(7)
186 #define RSI_BEACON_INTERVAL		200
187 #define RSI_DTIM_COUNT			2
188 
189 #define RSI_PS_DISABLE_IND		BIT(15)
190 #define RSI_PS_ENABLE			1
191 #define RSI_PS_DISABLE			0
192 #define RSI_DEEP_SLEEP			1
193 #define RSI_CONNECTED_SLEEP		2
194 #define RSI_SLEEP_REQUEST		1
195 #define RSI_WAKEUP_REQUEST		2
196 
197 #define RSI_IEEE80211_UAPSD_QUEUES \
198 	(IEEE80211_WMM_IE_STA_QOSINFO_AC_VO | \
199 	 IEEE80211_WMM_IE_STA_QOSINFO_AC_VI | \
200 	 IEEE80211_WMM_IE_STA_QOSINFO_AC_BE | \
201 	 IEEE80211_WMM_IE_STA_QOSINFO_AC_BK)
202 
203 #define RSI_DESC_VAP_ID_MASK		0xC000u
204 #define RSI_DESC_VAP_ID_OFST		14
205 #define RSI_DATA_DESC_MAC_BBP_INFO	BIT(0)
206 #define RSI_DATA_DESC_NO_ACK_IND	BIT(9)
207 #define RSI_DATA_DESC_QOS_EN		BIT(12)
208 #define RSI_DATA_DESC_NORMAL_FRAME	0x00
209 #define RSI_DATA_DESC_DTIM_BEACON_GATED_FRAME	BIT(10)
210 #define RSI_DATA_DESC_BEACON_FRAME	BIT(11)
211 #define RSI_DATA_DESC_DTIM_BEACON	(BIT(10) | BIT(11))
212 #define RSI_DATA_DESC_INSERT_TSF	BIT(15)
213 #define RSI_DATA_DESC_INSERT_SEQ_NO	BIT(2)
214 
215 #ifdef CONFIG_PM
216 #define RSI_WOW_ANY			BIT(1)
217 #define RSI_WOW_GTK_REKEY		BIT(3)
218 #define RSI_WOW_MAGIC_PKT		BIT(4)
219 #define RSI_WOW_DISCONNECT		BIT(5)
220 #endif
221 
222 enum opmode {
223 	RSI_OPMODE_UNSUPPORTED = -1,
224 	RSI_OPMODE_AP = 0,
225 	RSI_OPMODE_STA,
226 	RSI_OPMODE_P2P_GO,
227 	RSI_OPMODE_P2P_CLIENT
228 };
229 
230 enum vap_status {
231 	VAP_ADD = 1,
232 	VAP_DELETE = 2,
233 	VAP_UPDATE = 3
234 };
235 
236 enum peer_type {
237 	PEER_TYPE_AP,
238 	PEER_TYPE_STA,
239 };
240 extern struct ieee80211_rate rsi_rates[12];
241 extern const u16 rsi_mcsrates[8];
242 
243 enum sta_notify_events {
244 	STA_CONNECTED = 0,
245 	STA_DISCONNECTED,
246 	STA_TX_ADDBA_DONE,
247 	STA_TX_DELBA,
248 	STA_RX_ADDBA_DONE,
249 	STA_RX_DELBA
250 };
251 
252 /* Send Frames Types */
253 enum cmd_frame_type {
254 	TX_DOT11_MGMT,
255 	RESET_MAC_REQ,
256 	RADIO_CAPABILITIES,
257 	BB_PROG_VALUES_REQUEST,
258 	RF_PROG_VALUES_REQUEST,
259 	WAKEUP_SLEEP_REQUEST,
260 	SCAN_REQUEST,
261 	TSF_UPDATE,
262 	PEER_NOTIFY,
263 	BLOCK_HW_QUEUE,
264 	SET_KEY_REQ,
265 	AUTO_RATE_IND,
266 	BOOTUP_PARAMS_REQUEST,
267 	VAP_CAPABILITIES,
268 	EEPROM_READ,
269 	EEPROM_WRITE,
270 	GPIO_PIN_CONFIG ,
271 	SET_RX_FILTER,
272 	AMPDU_IND,
273 	STATS_REQUEST_FRAME,
274 	BB_BUF_PROG_VALUES_REQ,
275 	BBP_PROG_IN_TA,
276 	BG_SCAN_PARAMS,
277 	BG_SCAN_PROBE_REQ,
278 	CW_MODE_REQ,
279 	PER_CMD_PKT,
280 	ANT_SEL_FRAME = 0x20,
281 	VAP_DYNAMIC_UPDATE = 0x27,
282 	COMMON_DEV_CONFIG = 0x28,
283 	RADIO_PARAMS_UPDATE = 0x29,
284 	WOWLAN_CONFIG_PARAMS = 0x2B,
285 	WOWLAN_WAKEUP_REASON = 0xc5
286 };
287 
288 struct rsi_mac_frame {
289 	__le16 desc_word[8];
290 } __packed;
291 
292 #define PWR_SAVE_WAKEUP_IND		BIT(0)
293 #define TCP_CHECK_SUM_OFFLOAD		BIT(1)
294 #define CONFIRM_REQUIRED_TO_HOST	BIT(2)
295 #define ADD_DELTA_TSF			BIT(3)
296 #define FETCH_RETRY_CNT_FROM_HOST_DESC	BIT(4)
297 #define EOSP_INDICATION			BIT(5)
298 #define REQUIRE_TSF_SYNC_CONFIRM	BIT(6)
299 #define ENCAP_MGMT_PKT			BIT(7)
300 #define DESC_IMMEDIATE_WAKEUP		BIT(15)
301 
302 struct rsi_cmd_desc_dword0 {
303 	__le16 len_qno;
304 	u8 frame_type;
305 	u8 misc_flags;
306 };
307 
308 struct rsi_cmd_desc_dword1 {
309 	u8 xtend_desc_size;
310 	u8 reserved1;
311 	__le16 reserved2;
312 };
313 
314 struct rsi_cmd_desc_dword2 {
315 	__le32 pkt_info; /* Packet specific data */
316 };
317 
318 struct rsi_cmd_desc_dword3 {
319 	__le16 token;
320 	u8 qid_tid;
321 	u8 sta_id;
322 };
323 
324 struct rsi_cmd_desc {
325 	struct rsi_cmd_desc_dword0 desc_dword0;
326 	struct rsi_cmd_desc_dword1 desc_dword1;
327 	struct rsi_cmd_desc_dword2 desc_dword2;
328 	struct rsi_cmd_desc_dword3 desc_dword3;
329 };
330 
331 struct rsi_boot_params {
332 	__le16 desc_word[8];
333 	struct bootup_params bootup_params;
334 } __packed;
335 
336 struct rsi_peer_notify {
337 	struct rsi_cmd_desc desc;
338 	u8 mac_addr[6];
339 	__le16 command;
340 	__le16 mpdu_density;
341 	__le16 reserved;
342 	__le32 sta_flags;
343 } __packed;
344 
345 /* Aggregation params flags */
346 #define RSI_AGGR_PARAMS_TID_MASK	0xf
347 #define RSI_AGGR_PARAMS_START		BIT(4)
348 #define RSI_AGGR_PARAMS_RX_AGGR		BIT(5)
349 struct rsi_aggr_params {
350 	struct rsi_cmd_desc_dword0 desc_dword0;
351 	struct rsi_cmd_desc_dword0 desc_dword1;
352 	__le16 seq_start;
353 	__le16 baw_size;
354 	__le16 token;
355 	u8 aggr_params;
356 	u8 peer_id;
357 } __packed;
358 
359 struct rsi_bb_rf_prog {
360 	struct rsi_cmd_desc_dword0 desc_dword0;
361 	__le16 reserved1;
362 	u8 rf_power_mode;
363 	u8 reserved2;
364 	u8 endpoint;
365 	u8 reserved3;
366 	__le16 reserved4;
367 	__le16 reserved5;
368 	__le16 flags;
369 } __packed;
370 
371 struct rsi_chan_config {
372 	struct rsi_cmd_desc_dword0 desc_dword0;
373 	struct rsi_cmd_desc_dword1 desc_dword1;
374 	u8 channel_number;
375 	u8 antenna_gain_offset_2g;
376 	u8 antenna_gain_offset_5g;
377 	u8 channel_width;
378 	__le16 tx_power;
379 	u8 region_rftype;
380 	u8 flags;
381 } __packed;
382 
383 struct rsi_vap_caps {
384 	struct rsi_cmd_desc_dword0 desc_dword0;
385 	u8 reserved1;
386 	u8 status;
387 	__le16 reserved2;
388 	u8 vif_type;
389 	u8 channel_bw;
390 	__le16 antenna_info;
391 	__le16 token;
392 	u8 radioid_macid;
393 	u8 vap_id;
394 	u8 mac_addr[6];
395 	__le16 keep_alive_period;
396 	u8 bssid[6];
397 	__le16 reserved4;
398 	__le32 flags;
399 	__le16 frag_threshold;
400 	__le16 rts_threshold;
401 	__le32 default_mgmt_rate;
402 	__le16 default_ctrl_rate;
403 	__le16 ctrl_rate_flags;
404 	__le32 default_data_rate;
405 	__le16 beacon_interval;
406 	__le16 dtim_period;
407 	__le16 beacon_miss_threshold;
408 } __packed;
409 
410 struct rsi_ant_sel_frame {
411 	struct rsi_cmd_desc_dword0 desc_dword0;
412 	u8 reserved;
413 	u8 sub_frame_type;
414 	__le16 ant_value;
415 	__le32 reserved1;
416 	__le32 reserved2;
417 } __packed;
418 
419 struct rsi_dynamic_s {
420 	struct rsi_cmd_desc_dword0 desc_dword0;
421 	struct rsi_cmd_desc_dword1 desc_dword1;
422 	struct rsi_cmd_desc_dword2 desc_dword2;
423 	struct rsi_cmd_desc_dword3 desc_dword3;
424 	struct framebody {
425 		__le16 data_rate;
426 		__le16 mgmt_rate;
427 		__le16 keep_alive_period;
428 	} frame_body;
429 } __packed;
430 
431 /* Key descriptor flags */
432 #define RSI_KEY_TYPE_BROADCAST	BIT(1)
433 #define RSI_WEP_KEY		BIT(2)
434 #define RSI_WEP_KEY_104		BIT(3)
435 #define RSI_CIPHER_WPA		BIT(4)
436 #define RSI_CIPHER_TKIP		BIT(5)
437 #define RSI_KEY_MODE_AP		BIT(7)
438 #define RSI_PROTECT_DATA_FRAMES	BIT(13)
439 #define RSI_KEY_ID_MASK		0xC0
440 #define RSI_KEY_ID_OFFSET	14
441 struct rsi_set_key {
442 	struct rsi_cmd_desc_dword0 desc_dword0;
443 	struct rsi_cmd_desc_dword1 desc_dword1;
444 	__le16 key_desc;
445 	__le32 bpn;
446 	u8 sta_id;
447 	u8 vap_id;
448 	u8 key[4][32];
449 	u8 tx_mic_key[8];
450 	u8 rx_mic_key[8];
451 } __packed;
452 
453 struct rsi_auto_rate {
454 	struct rsi_cmd_desc desc;
455 	__le16 failure_limit;
456 	__le16 initial_boundary;
457 	__le16 max_threshold_limt;
458 	__le16 num_supported_rates;
459 	__le16 aarf_rssi;
460 	__le16 moderate_rate_inx;
461 	__le16 collision_tolerance;
462 	__le16 supported_rates[40];
463 } __packed;
464 
465 #define QUIET_INFO_VALID	BIT(0)
466 #define QUIET_ENABLE		BIT(1)
467 struct rsi_block_unblock_data {
468 	struct rsi_cmd_desc_dword0 desc_dword0;
469 	u8 xtend_desc_size;
470 	u8 host_quiet_info;
471 	__le16 reserved;
472 	__le16 block_q_bitmap;
473 	__le16 unblock_q_bitmap;
474 	__le16 token;
475 	__le16 flush_q_bitmap;
476 } __packed;
477 
478 struct qos_params {
479 	__le16 cont_win_min_q;
480 	__le16 cont_win_max_q;
481 	__le16 aifsn_val_q;
482 	__le16 txop_q;
483 } __packed;
484 
485 struct rsi_radio_caps {
486 	struct rsi_cmd_desc_dword0 desc_dword0;
487 	struct rsi_cmd_desc_dword0 desc_dword1;
488 	u8 channel_num;
489 	u8 rf_model;
490 	__le16 ppe_ack_rate;
491 	__le16 mode_11j;
492 	u8 radio_cfg_info;
493 	u8 radio_info;
494 	struct qos_params qos_params[MAX_HW_QUEUES];
495 	u8 num_11n_rates;
496 	u8 num_11ac_rates;
497 	__le16 gcpd_per_rate[20];
498 	__le16 sifs_tx_11n;
499 	__le16 sifs_tx_11b;
500 	__le16 slot_rx_11n;
501 	__le16 ofdm_ack_tout;
502 	__le16 cck_ack_tout;
503 	__le16 preamble_type;
504 } __packed;
505 
506 /* ULP GPIO flags */
507 #define RSI_GPIO_MOTION_SENSOR_ULP_WAKEUP	BIT(0)
508 #define RSI_GPIO_SLEEP_IND_FROM_DEVICE		BIT(1)
509 #define RSI_GPIO_2_ULP				BIT(2)
510 #define RSI_GPIO_PUSH_BUTTON_ULP_WAKEUP		BIT(3)
511 
512 /* SOC GPIO flags */
513 #define RSI_GPIO_0_PSPI_CSN_0			BIT(0)
514 #define RSI_GPIO_1_PSPI_CSN_1			BIT(1)
515 #define RSI_GPIO_2_HOST_WAKEUP_INTR		BIT(2)
516 #define RSI_GPIO_3_PSPI_DATA_0			BIT(3)
517 #define RSI_GPIO_4_PSPI_DATA_1			BIT(4)
518 #define RSI_GPIO_5_PSPI_DATA_2			BIT(5)
519 #define RSI_GPIO_6_PSPI_DATA_3			BIT(6)
520 #define RSI_GPIO_7_I2C_SCL			BIT(7)
521 #define RSI_GPIO_8_I2C_SDA			BIT(8)
522 #define RSI_GPIO_9_UART1_RX			BIT(9)
523 #define RSI_GPIO_10_UART1_TX			BIT(10)
524 #define RSI_GPIO_11_UART1_RTS_I2S_CLK		BIT(11)
525 #define RSI_GPIO_12_UART1_CTS_I2S_WS		BIT(12)
526 #define RSI_GPIO_13_DBG_UART_RX_I2S_DIN		BIT(13)
527 #define RSI_GPIO_14_DBG_UART_RX_I2S_DOUT	BIT(14)
528 #define RSI_GPIO_15_LP_WAKEUP_BOOT_BYPASS	BIT(15)
529 #define RSI_GPIO_16_LED_0			BIT(16)
530 #define RSI_GPIO_17_BTCOEX_WLAN_ACT_EXT_ANT_SEL	BIT(17)
531 #define RSI_GPIO_18_BTCOEX_BT_PRIO_EXT_ANT_SEL	BIT(18)
532 #define RSI_GPIO_19_BTCOEX_BT_ACT_EXT_ON_OFF	BIT(19)
533 #define RSI_GPIO_20_RF_RESET			BIT(20)
534 #define RSI_GPIO_21_SLEEP_IND_FROM_DEVICE	BIT(21)
535 
536 #define RSI_UNUSED_SOC_GPIO_BITMAP (RSI_GPIO_9_UART1_RX | \
537 				    RSI_GPIO_10_UART1_TX | \
538 				    RSI_GPIO_11_UART1_RTS_I2S_CLK | \
539 				    RSI_GPIO_12_UART1_CTS_I2S_WS | \
540 				    RSI_GPIO_13_DBG_UART_RX_I2S_DIN | \
541 				    RSI_GPIO_14_DBG_UART_RX_I2S_DOUT | \
542 				    RSI_GPIO_15_LP_WAKEUP_BOOT_BYPASS | \
543 				    RSI_GPIO_17_BTCOEX_WLAN_ACT_EXT_ANT_SEL | \
544 				    RSI_GPIO_18_BTCOEX_BT_PRIO_EXT_ANT_SEL | \
545 				    RSI_GPIO_19_BTCOEX_BT_ACT_EXT_ON_OFF | \
546 				    RSI_GPIO_21_SLEEP_IND_FROM_DEVICE)
547 
548 #define RSI_UNUSED_ULP_GPIO_BITMAP (RSI_GPIO_MOTION_SENSOR_ULP_WAKEUP | \
549 				    RSI_GPIO_SLEEP_IND_FROM_DEVICE | \
550 				    RSI_GPIO_2_ULP | \
551 				    RSI_GPIO_PUSH_BUTTON_ULP_WAKEUP);
552 struct rsi_config_vals {
553 	__le16 len_qno;
554 	u8 pkt_type;
555 	u8 misc_flags;
556 	__le16 reserved1[6];
557 	u8 lp_ps_handshake;
558 	u8 ulp_ps_handshake;
559 	u8 sleep_config_params; /* 0 for no handshake,
560 				 * 1 for GPIO based handshake,
561 				 * 2 packet handshake
562 				 */
563 	u8 unused_ulp_gpio;
564 	__le32 unused_soc_gpio_bitmap;
565 	u8 ext_pa_or_bt_coex_en;
566 	u8 opermode;
567 	u8 wlan_rf_pwr_mode;
568 	u8 bt_rf_pwr_mode;
569 	u8 zigbee_rf_pwr_mode;
570 	u8 driver_mode;
571 	u8 region_code;
572 	u8 antenna_sel_val;
573 	u8 reserved2[16];
574 } __packed;
575 
576 /* Packet info flags */
577 #define RSI_EEPROM_HDR_SIZE_OFFSET		8
578 #define RSI_EEPROM_HDR_SIZE_MASK		0x300
579 #define RSI_EEPROM_LEN_OFFSET			20
580 #define RSI_EEPROM_LEN_MASK			0xFFF00000
581 
582 struct rsi_eeprom_read_frame {
583 	__le16 len_qno;
584 	u8 pkt_type;
585 	u8 misc_flags;
586 	__le32 pkt_info;
587 	__le32 eeprom_offset;
588 	__le16 delay_ms;
589 	__le16 reserved3;
590 } __packed;
591 
592 struct rsi_request_ps {
593 	struct rsi_cmd_desc desc;
594 	struct ps_sleep_params ps_sleep;
595 	u8 ps_mimic_support;
596 	u8 ps_uapsd_acs;
597 	u8 ps_uapsd_wakeup_period;
598 	u8 reserved;
599 	__le32 ps_listen_interval;
600 	__le32 ps_dtim_interval_duration;
601 	__le16 ps_num_dtim_intervals;
602 } __packed;
603 
604 struct rsi_wowlan_req {
605 	struct rsi_cmd_desc desc;
606 	u8 sourceid[ETH_ALEN];
607 	u16 wow_flags;
608 	u16 host_sleep_status;
609 } __packed;
610 
611 static inline u32 rsi_get_queueno(u8 *addr, u16 offset)
612 {
613 	return (le16_to_cpu(*(__le16 *)&addr[offset]) & 0x7000) >> 12;
614 }
615 
616 static inline u32 rsi_get_length(u8 *addr, u16 offset)
617 {
618 	return (le16_to_cpu(*(__le16 *)&addr[offset])) & 0x0fff;
619 }
620 
621 static inline u8 rsi_get_extended_desc(u8 *addr, u16 offset)
622 {
623 	return le16_to_cpu(*((__le16 *)&addr[offset + 4])) & 0x00ff;
624 }
625 
626 static inline u8 rsi_get_rssi(u8 *addr)
627 {
628 	return *(u8 *)(addr + FRAME_DESC_SZ);
629 }
630 
631 static inline u8 rsi_get_channel(u8 *addr)
632 {
633 	return *(char *)(addr + 15);
634 }
635 
636 static inline void rsi_set_len_qno(__le16 *addr, u16 len, u8 qno)
637 {
638 	*addr = cpu_to_le16(len | ((qno & 7) << 12));
639 }
640 
641 int rsi_mgmt_pkt_recv(struct rsi_common *common, u8 *msg);
642 int rsi_set_vap_capabilities(struct rsi_common *common, enum opmode mode,
643 			     u8 *mac_addr, u8 vap_id, u8 vap_status);
644 int rsi_send_aggregation_params_frame(struct rsi_common *common, u16 tid,
645 				      u16 ssn, u8 buf_size, u8 event,
646 				      u8 sta_id);
647 int rsi_hal_load_key(struct rsi_common *common, u8 *data, u16 key_len,
648 		     u8 key_type, u8 key_id, u32 cipher, s16 sta_id,
649 		     struct ieee80211_vif *vif);
650 int rsi_set_channel(struct rsi_common *common,
651 		    struct ieee80211_channel *channel);
652 int rsi_send_vap_dynamic_update(struct rsi_common *common);
653 int rsi_send_block_unblock_frame(struct rsi_common *common, bool event);
654 void rsi_inform_bss_status(struct rsi_common *common, enum opmode opmode,
655 			   u8 status, const u8 *addr, u8 qos_enable, u16 aid,
656 			   struct ieee80211_sta *sta, u16 sta_id,
657 			   struct ieee80211_vif *vif);
658 void rsi_indicate_pkt_to_os(struct rsi_common *common, struct sk_buff *skb);
659 int rsi_mac80211_attach(struct rsi_common *common);
660 void rsi_indicate_tx_status(struct rsi_hw *common, struct sk_buff *skb,
661 			    int status);
662 bool rsi_is_cipher_wep(struct rsi_common *common);
663 void rsi_core_qos_processor(struct rsi_common *common);
664 void rsi_core_xmit(struct rsi_common *common, struct sk_buff *skb);
665 int rsi_send_mgmt_pkt(struct rsi_common *common, struct sk_buff *skb);
666 int rsi_send_data_pkt(struct rsi_common *common, struct sk_buff *skb);
667 int rsi_band_check(struct rsi_common *common, struct ieee80211_channel *chan);
668 int rsi_send_rx_filter_frame(struct rsi_common *common, u16 rx_filter_word);
669 int rsi_send_radio_params_update(struct rsi_common *common);
670 int rsi_set_antenna(struct rsi_common *common, u8 antenna);
671 #ifdef CONFIG_PM
672 int rsi_send_wowlan_request(struct rsi_common *common, u16 flags,
673 			    u16 sleep_status);
674 #endif
675 int rsi_send_ps_request(struct rsi_hw *adapter, bool enable,
676 			struct ieee80211_vif *vif);
677 #endif
678