xref: /openbmc/linux/drivers/net/wireless/rsi/rsi_mgmt.h (revision b240b419db5d624ce7a5a397d6f62a1a686009ec)
1 /**
2  * Copyright (c) 2014 Redpine Signals Inc.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for any
5  * purpose with or without fee is hereby granted, provided that the above
6  * copyright notice and this permission notice appear in all copies.
7  *
8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15  */
16 
17 #ifndef __RSI_MGMT_H__
18 #define __RSI_MGMT_H__
19 
20 #include <linux/sort.h>
21 #include "rsi_boot_params.h"
22 #include "rsi_main.h"
23 
24 #define MAX_MGMT_PKT_SIZE               512
25 #define RSI_NEEDED_HEADROOM             80
26 #define RSI_RCV_BUFFER_LEN              2000
27 
28 #define RSI_11B_MODE                    0
29 #define RSI_11G_MODE                    BIT(7)
30 #define RETRY_COUNT                     8
31 #define RETRY_LONG                      4
32 #define RETRY_SHORT                     7
33 #define WMM_SHORT_SLOT_TIME             9
34 #define SIFS_DURATION                   16
35 
36 #define KEY_TYPE_CLEAR                  0
37 #define RSI_PAIRWISE_KEY                1
38 #define RSI_GROUP_KEY                   2
39 
40 /* EPPROM_READ_ADDRESS */
41 #define WLAN_MAC_EEPROM_ADDR            40
42 #define WLAN_MAC_MAGIC_WORD_LEN         0x01
43 #define WLAN_HOST_MODE_LEN              0x04
44 #define WLAN_FW_VERSION_LEN             0x08
45 #define MAGIC_WORD                      0x5A
46 #define WLAN_EEPROM_RFTYPE_ADDR		424
47 
48 /*WOWLAN RESUME WAKEUP TYPES*/
49 #define RSI_UNICAST_MAGIC_PKT		BIT(0)
50 #define RSI_BROADCAST_MAGICPKT		BIT(1)
51 #define RSI_EAPOL_PKT			BIT(2)
52 #define RSI_DISCONNECT_PKT		BIT(3)
53 #define RSI_HW_BMISS_PKT		BIT(4)
54 #define RSI_INSERT_SEQ_IN_FW		BIT(2)
55 
56 #define WOW_MAX_FILTERS_PER_LIST 16
57 #define WOW_PATTERN_SIZE 256
58 
59 /* Receive Frame Types */
60 #define RSI_RX_DESC_MSG_TYPE_OFFSET	2
61 #define TA_CONFIRM_TYPE                 0x01
62 #define RX_DOT11_MGMT                   0x02
63 #define TX_STATUS_IND                   0x04
64 #define BEACON_EVENT_IND		0x08
65 #define PROBEREQ_CONFIRM                2
66 #define CARD_READY_IND                  0x00
67 #define SLEEP_NOTIFY_IND                0x06
68 
69 #define RSI_DELETE_PEER                 0x0
70 #define RSI_ADD_PEER                    0x1
71 #define START_AMPDU_AGGR                0x1
72 #define STOP_AMPDU_AGGR                 0x0
73 #define INTERNAL_MGMT_PKT               0x99
74 
75 #define PUT_BBP_RESET                   0
76 #define BBP_REG_WRITE                   0
77 #define RF_RESET_ENABLE                 BIT(3)
78 #define RATE_INFO_ENABLE                BIT(0)
79 #define MORE_DATA_PRESENT		BIT(1)
80 #define RSI_BROADCAST_PKT               BIT(9)
81 #define RSI_DESC_REQUIRE_CFM_TO_HOST	BIT(2)
82 #define RSI_ADD_DELTA_TSF_VAP_ID	BIT(3)
83 #define RSI_FETCH_RETRY_CNT_FRM_HST	BIT(4)
84 #define RSI_QOS_ENABLE			BIT(12)
85 #define RSI_REKEY_PURPOSE		BIT(13)
86 #define RSI_ENCRYPT_PKT			BIT(15)
87 #define RSI_SET_PS_ENABLE		BIT(12)
88 
89 #define RSI_CMDDESC_40MHZ		BIT(4)
90 #define RSI_CMDDESC_UPPER_20_ENABLE	BIT(5)
91 #define RSI_CMDDESC_LOWER_20_ENABLE	BIT(6)
92 #define RSI_CMDDESC_FULL_40_ENABLE	(BIT(5) | BIT(6))
93 #define UPPER_20_ENABLE                 (0x2 << 12)
94 #define LOWER_20_ENABLE                 (0x4 << 12)
95 #define FULL40M_ENABLE                  0x6
96 
97 #define RSI_LMAC_CLOCK_80MHZ            0x1
98 #define RSI_ENABLE_40MHZ                (0x1 << 3)
99 #define ENABLE_SHORTGI_RATE		BIT(9)
100 
101 #define RX_BA_INDICATION                1
102 #define RSI_TBL_SZ                      40
103 #define MAX_RETRIES                     8
104 #define RSI_IFTYPE_STATION		 0
105 
106 #define STD_RATE_MCS7                   0x07
107 #define STD_RATE_MCS6                   0x06
108 #define STD_RATE_MCS5                   0x05
109 #define STD_RATE_MCS4                   0x04
110 #define STD_RATE_MCS3                   0x03
111 #define STD_RATE_MCS2                   0x02
112 #define STD_RATE_MCS1                   0x01
113 #define STD_RATE_MCS0                   0x00
114 #define STD_RATE_54                     0x6c
115 #define STD_RATE_48                     0x60
116 #define STD_RATE_36                     0x48
117 #define STD_RATE_24                     0x30
118 #define STD_RATE_18                     0x24
119 #define STD_RATE_12                     0x18
120 #define STD_RATE_11                     0x16
121 #define STD_RATE_09                     0x12
122 #define STD_RATE_06                     0x0C
123 #define STD_RATE_5_5                    0x0B
124 #define STD_RATE_02                     0x04
125 #define STD_RATE_01                     0x02
126 
127 #define RSI_RF_TYPE                     1
128 #define RSI_RATE_00                     0x00
129 #define RSI_RATE_1                      0x0
130 #define RSI_RATE_2                      0x2
131 #define RSI_RATE_5_5                    0x4
132 #define RSI_RATE_11                     0x6
133 #define RSI_RATE_6                      0x8b
134 #define RSI_RATE_9                      0x8f
135 #define RSI_RATE_12                     0x8a
136 #define RSI_RATE_18                     0x8e
137 #define RSI_RATE_24                     0x89
138 #define RSI_RATE_36                     0x8d
139 #define RSI_RATE_48                     0x88
140 #define RSI_RATE_54                     0x8c
141 #define RSI_RATE_MCS0                   0x100
142 #define RSI_RATE_MCS1                   0x101
143 #define RSI_RATE_MCS2                   0x102
144 #define RSI_RATE_MCS3                   0x103
145 #define RSI_RATE_MCS4                   0x104
146 #define RSI_RATE_MCS5                   0x105
147 #define RSI_RATE_MCS6                   0x106
148 #define RSI_RATE_MCS7                   0x107
149 #define RSI_RATE_MCS7_SG                0x307
150 #define RSI_RATE_AUTO			0xffff
151 
152 #define BW_20MHZ                        0
153 #define BW_40MHZ                        1
154 
155 #define EP_2GHZ_20MHZ			0
156 #define EP_2GHZ_40MHZ			1
157 #define EP_5GHZ_20MHZ			2
158 #define EP_5GHZ_40MHZ			3
159 
160 #define SIFS_TX_11N_VALUE		580
161 #define SIFS_TX_11B_VALUE		346
162 #define SHORT_SLOT_VALUE		360
163 #define LONG_SLOT_VALUE			640
164 #define OFDM_ACK_TOUT_VALUE		2720
165 #define CCK_ACK_TOUT_VALUE		9440
166 #define LONG_PREAMBLE			0x0000
167 #define SHORT_PREAMBLE			0x0001
168 
169 #define RSI_SUPP_FILTERS	(FIF_ALLMULTI | FIF_PROBE_REQ |\
170 				 FIF_BCN_PRBRESP_PROMISC)
171 
172 #define ANTENNA_SEL_INT			0x02 /* RF_OUT_2 / Integerated */
173 #define ANTENNA_SEL_UFL			0x03 /* RF_OUT_1 / U.FL */
174 #define ANTENNA_MASK_VALUE		0x00ff
175 #define ANTENNA_SEL_TYPE		1
176 
177 /* Rx filter word definitions */
178 #define PROMISCOUS_MODE			BIT(0)
179 #define ALLOW_DATA_ASSOC_PEER		BIT(1)
180 #define ALLOW_MGMT_ASSOC_PEER		BIT(2)
181 #define ALLOW_CTRL_ASSOC_PEER		BIT(3)
182 #define DISALLOW_BEACONS		BIT(4)
183 #define ALLOW_CONN_PEER_MGMT_WHILE_BUF_FULL BIT(5)
184 #define DISALLOW_BROADCAST_DATA		BIT(6)
185 
186 #define RSI_MPDU_DENSITY		0x8
187 #define RSI_CHAN_RADAR			BIT(7)
188 #define RSI_BEACON_INTERVAL		200
189 #define RSI_DTIM_COUNT			2
190 
191 #define RSI_PS_DISABLE_IND		BIT(15)
192 #define RSI_PS_ENABLE			1
193 #define RSI_PS_DISABLE			0
194 #define RSI_DEEP_SLEEP			1
195 #define RSI_CONNECTED_SLEEP		2
196 #define RSI_SLEEP_REQUEST		1
197 #define RSI_WAKEUP_REQUEST		2
198 
199 #define RSI_IEEE80211_UAPSD_QUEUES \
200 	(IEEE80211_WMM_IE_STA_QOSINFO_AC_VO | \
201 	 IEEE80211_WMM_IE_STA_QOSINFO_AC_VI | \
202 	 IEEE80211_WMM_IE_STA_QOSINFO_AC_BE | \
203 	 IEEE80211_WMM_IE_STA_QOSINFO_AC_BK)
204 
205 #define RSI_DESC_VAP_ID_MASK		0xC000u
206 #define RSI_DESC_VAP_ID_OFST		14
207 #define RSI_DATA_DESC_MAC_BBP_INFO	BIT(0)
208 #define RSI_DATA_DESC_NO_ACK_IND	BIT(9)
209 #define RSI_DATA_DESC_QOS_EN		BIT(12)
210 #define RSI_DATA_DESC_NORMAL_FRAME	0x00
211 #define RSI_DATA_DESC_DTIM_BEACON_GATED_FRAME	BIT(10)
212 #define RSI_DATA_DESC_BEACON_FRAME	BIT(11)
213 #define RSI_DATA_DESC_DTIM_BEACON	(BIT(10) | BIT(11))
214 #define RSI_DATA_DESC_INSERT_TSF	BIT(15)
215 #define RSI_DATA_DESC_INSERT_SEQ_NO	BIT(2)
216 
217 #ifdef CONFIG_PM
218 #define RSI_WOW_ANY			BIT(1)
219 #define RSI_WOW_GTK_REKEY		BIT(3)
220 #define RSI_WOW_MAGIC_PKT		BIT(4)
221 #define RSI_WOW_DISCONNECT		BIT(5)
222 #endif
223 
224 enum opmode {
225 	RSI_OPMODE_UNSUPPORTED = -1,
226 	RSI_OPMODE_AP = 0,
227 	RSI_OPMODE_STA,
228 	RSI_OPMODE_P2P_GO,
229 	RSI_OPMODE_P2P_CLIENT
230 };
231 
232 enum vap_status {
233 	VAP_ADD = 1,
234 	VAP_DELETE = 2,
235 	VAP_UPDATE = 3
236 };
237 
238 enum peer_type {
239 	PEER_TYPE_AP,
240 	PEER_TYPE_STA,
241 };
242 extern struct ieee80211_rate rsi_rates[12];
243 extern const u16 rsi_mcsrates[8];
244 
245 enum sta_notify_events {
246 	STA_CONNECTED = 0,
247 	STA_DISCONNECTED,
248 	STA_TX_ADDBA_DONE,
249 	STA_TX_DELBA,
250 	STA_RX_ADDBA_DONE,
251 	STA_RX_DELBA
252 };
253 
254 /* Send Frames Types */
255 enum cmd_frame_type {
256 	TX_DOT11_MGMT,
257 	RESET_MAC_REQ,
258 	RADIO_CAPABILITIES,
259 	BB_PROG_VALUES_REQUEST,
260 	RF_PROG_VALUES_REQUEST,
261 	WAKEUP_SLEEP_REQUEST,
262 	SCAN_REQUEST,
263 	TSF_UPDATE,
264 	PEER_NOTIFY,
265 	BLOCK_HW_QUEUE,
266 	SET_KEY_REQ,
267 	AUTO_RATE_IND,
268 	BOOTUP_PARAMS_REQUEST,
269 	VAP_CAPABILITIES,
270 	EEPROM_READ,
271 	EEPROM_WRITE,
272 	GPIO_PIN_CONFIG ,
273 	SET_RX_FILTER,
274 	AMPDU_IND,
275 	STATS_REQUEST_FRAME,
276 	BB_BUF_PROG_VALUES_REQ,
277 	BBP_PROG_IN_TA,
278 	BG_SCAN_PARAMS,
279 	BG_SCAN_PROBE_REQ,
280 	CW_MODE_REQ,
281 	PER_CMD_PKT,
282 	ANT_SEL_FRAME = 0x20,
283 	VAP_DYNAMIC_UPDATE = 0x27,
284 	COMMON_DEV_CONFIG = 0x28,
285 	RADIO_PARAMS_UPDATE = 0x29,
286 	WOWLAN_CONFIG_PARAMS = 0x2B,
287 	WOWLAN_WAKEUP_REASON = 0xc5
288 };
289 
290 struct rsi_mac_frame {
291 	__le16 desc_word[8];
292 } __packed;
293 
294 #define PWR_SAVE_WAKEUP_IND		BIT(0)
295 #define TCP_CHECK_SUM_OFFLOAD		BIT(1)
296 #define CONFIRM_REQUIRED_TO_HOST	BIT(2)
297 #define ADD_DELTA_TSF			BIT(3)
298 #define FETCH_RETRY_CNT_FROM_HOST_DESC	BIT(4)
299 #define EOSP_INDICATION			BIT(5)
300 #define REQUIRE_TSF_SYNC_CONFIRM	BIT(6)
301 #define ENCAP_MGMT_PKT			BIT(7)
302 #define DESC_IMMEDIATE_WAKEUP		BIT(15)
303 
304 struct rsi_cmd_desc_dword0 {
305 	__le16 len_qno;
306 	u8 frame_type;
307 	u8 misc_flags;
308 };
309 
310 struct rsi_cmd_desc_dword1 {
311 	u8 xtend_desc_size;
312 	u8 reserved1;
313 	__le16 reserved2;
314 };
315 
316 struct rsi_cmd_desc_dword2 {
317 	__le32 pkt_info; /* Packet specific data */
318 };
319 
320 struct rsi_cmd_desc_dword3 {
321 	__le16 token;
322 	u8 qid_tid;
323 	u8 sta_id;
324 };
325 
326 struct rsi_cmd_desc {
327 	struct rsi_cmd_desc_dword0 desc_dword0;
328 	struct rsi_cmd_desc_dword1 desc_dword1;
329 	struct rsi_cmd_desc_dword2 desc_dword2;
330 	struct rsi_cmd_desc_dword3 desc_dword3;
331 };
332 
333 struct rsi_boot_params {
334 	__le16 desc_word[8];
335 	struct bootup_params bootup_params;
336 } __packed;
337 
338 struct rsi_peer_notify {
339 	struct rsi_cmd_desc desc;
340 	u8 mac_addr[6];
341 	__le16 command;
342 	__le16 mpdu_density;
343 	__le16 reserved;
344 	__le32 sta_flags;
345 } __packed;
346 
347 /* Aggregation params flags */
348 #define RSI_AGGR_PARAMS_TID_MASK	0xf
349 #define RSI_AGGR_PARAMS_START		BIT(4)
350 #define RSI_AGGR_PARAMS_RX_AGGR		BIT(5)
351 struct rsi_aggr_params {
352 	struct rsi_cmd_desc_dword0 desc_dword0;
353 	struct rsi_cmd_desc_dword0 desc_dword1;
354 	__le16 seq_start;
355 	__le16 baw_size;
356 	__le16 token;
357 	u8 aggr_params;
358 	u8 peer_id;
359 } __packed;
360 
361 struct rsi_bb_rf_prog {
362 	struct rsi_cmd_desc_dword0 desc_dword0;
363 	__le16 reserved1;
364 	u8 rf_power_mode;
365 	u8 reserved2;
366 	u8 endpoint;
367 	u8 reserved3;
368 	__le16 reserved4;
369 	__le16 reserved5;
370 	__le16 flags;
371 } __packed;
372 
373 struct rsi_chan_config {
374 	struct rsi_cmd_desc_dword0 desc_dword0;
375 	struct rsi_cmd_desc_dword1 desc_dword1;
376 	u8 channel_number;
377 	u8 antenna_gain_offset_2g;
378 	u8 antenna_gain_offset_5g;
379 	u8 channel_width;
380 	__le16 tx_power;
381 	u8 region_rftype;
382 	u8 flags;
383 } __packed;
384 
385 struct rsi_vap_caps {
386 	struct rsi_cmd_desc_dword0 desc_dword0;
387 	u8 reserved1;
388 	u8 status;
389 	__le16 reserved2;
390 	u8 vif_type;
391 	u8 channel_bw;
392 	__le16 antenna_info;
393 	__le16 token;
394 	u8 radioid_macid;
395 	u8 vap_id;
396 	u8 mac_addr[6];
397 	__le16 keep_alive_period;
398 	u8 bssid[6];
399 	__le16 reserved4;
400 	__le32 flags;
401 	__le16 frag_threshold;
402 	__le16 rts_threshold;
403 	__le32 default_mgmt_rate;
404 	__le16 default_ctrl_rate;
405 	__le16 ctrl_rate_flags;
406 	__le32 default_data_rate;
407 	__le16 beacon_interval;
408 	__le16 dtim_period;
409 	__le16 beacon_miss_threshold;
410 } __packed;
411 
412 struct rsi_ant_sel_frame {
413 	struct rsi_cmd_desc_dword0 desc_dword0;
414 	u8 reserved;
415 	u8 sub_frame_type;
416 	__le16 ant_value;
417 	__le32 reserved1;
418 	__le32 reserved2;
419 } __packed;
420 
421 struct rsi_dynamic_s {
422 	struct rsi_cmd_desc_dword0 desc_dword0;
423 	struct rsi_cmd_desc_dword1 desc_dword1;
424 	struct rsi_cmd_desc_dword2 desc_dword2;
425 	struct rsi_cmd_desc_dword3 desc_dword3;
426 	struct framebody {
427 		__le16 data_rate;
428 		__le16 mgmt_rate;
429 		__le16 keep_alive_period;
430 	} frame_body;
431 } __packed;
432 
433 /* Key descriptor flags */
434 #define RSI_KEY_TYPE_BROADCAST	BIT(1)
435 #define RSI_WEP_KEY		BIT(2)
436 #define RSI_WEP_KEY_104		BIT(3)
437 #define RSI_CIPHER_WPA		BIT(4)
438 #define RSI_CIPHER_TKIP		BIT(5)
439 #define RSI_KEY_MODE_AP		BIT(7)
440 #define RSI_PROTECT_DATA_FRAMES	BIT(13)
441 #define RSI_KEY_ID_MASK		0xC0
442 #define RSI_KEY_ID_OFFSET	14
443 struct rsi_set_key {
444 	struct rsi_cmd_desc_dword0 desc_dword0;
445 	struct rsi_cmd_desc_dword1 desc_dword1;
446 	__le16 key_desc;
447 	__le32 bpn;
448 	u8 sta_id;
449 	u8 vap_id;
450 	u8 key[4][32];
451 	u8 tx_mic_key[8];
452 	u8 rx_mic_key[8];
453 } __packed;
454 
455 struct rsi_auto_rate {
456 	struct rsi_cmd_desc desc;
457 	__le16 failure_limit;
458 	__le16 initial_boundary;
459 	__le16 max_threshold_limt;
460 	__le16 num_supported_rates;
461 	__le16 aarf_rssi;
462 	__le16 moderate_rate_inx;
463 	__le16 collision_tolerance;
464 	__le16 supported_rates[40];
465 } __packed;
466 
467 #define QUIET_INFO_VALID	BIT(0)
468 #define QUIET_ENABLE		BIT(1)
469 struct rsi_block_unblock_data {
470 	struct rsi_cmd_desc_dword0 desc_dword0;
471 	u8 xtend_desc_size;
472 	u8 host_quiet_info;
473 	__le16 reserved;
474 	__le16 block_q_bitmap;
475 	__le16 unblock_q_bitmap;
476 	__le16 token;
477 	__le16 flush_q_bitmap;
478 } __packed;
479 
480 struct qos_params {
481 	__le16 cont_win_min_q;
482 	__le16 cont_win_max_q;
483 	__le16 aifsn_val_q;
484 	__le16 txop_q;
485 } __packed;
486 
487 struct rsi_radio_caps {
488 	struct rsi_cmd_desc_dword0 desc_dword0;
489 	struct rsi_cmd_desc_dword0 desc_dword1;
490 	u8 channel_num;
491 	u8 rf_model;
492 	__le16 ppe_ack_rate;
493 	__le16 mode_11j;
494 	u8 radio_cfg_info;
495 	u8 radio_info;
496 	struct qos_params qos_params[MAX_HW_QUEUES];
497 	u8 num_11n_rates;
498 	u8 num_11ac_rates;
499 	__le16 gcpd_per_rate[20];
500 	__le16 sifs_tx_11n;
501 	__le16 sifs_tx_11b;
502 	__le16 slot_rx_11n;
503 	__le16 ofdm_ack_tout;
504 	__le16 cck_ack_tout;
505 	__le16 preamble_type;
506 } __packed;
507 
508 /* ULP GPIO flags */
509 #define RSI_GPIO_MOTION_SENSOR_ULP_WAKEUP	BIT(0)
510 #define RSI_GPIO_SLEEP_IND_FROM_DEVICE		BIT(1)
511 #define RSI_GPIO_2_ULP				BIT(2)
512 #define RSI_GPIO_PUSH_BUTTON_ULP_WAKEUP		BIT(3)
513 
514 /* SOC GPIO flags */
515 #define RSI_GPIO_0_PSPI_CSN_0			BIT(0)
516 #define RSI_GPIO_1_PSPI_CSN_1			BIT(1)
517 #define RSI_GPIO_2_HOST_WAKEUP_INTR		BIT(2)
518 #define RSI_GPIO_3_PSPI_DATA_0			BIT(3)
519 #define RSI_GPIO_4_PSPI_DATA_1			BIT(4)
520 #define RSI_GPIO_5_PSPI_DATA_2			BIT(5)
521 #define RSI_GPIO_6_PSPI_DATA_3			BIT(6)
522 #define RSI_GPIO_7_I2C_SCL			BIT(7)
523 #define RSI_GPIO_8_I2C_SDA			BIT(8)
524 #define RSI_GPIO_9_UART1_RX			BIT(9)
525 #define RSI_GPIO_10_UART1_TX			BIT(10)
526 #define RSI_GPIO_11_UART1_RTS_I2S_CLK		BIT(11)
527 #define RSI_GPIO_12_UART1_CTS_I2S_WS		BIT(12)
528 #define RSI_GPIO_13_DBG_UART_RX_I2S_DIN		BIT(13)
529 #define RSI_GPIO_14_DBG_UART_RX_I2S_DOUT	BIT(14)
530 #define RSI_GPIO_15_LP_WAKEUP_BOOT_BYPASS	BIT(15)
531 #define RSI_GPIO_16_LED_0			BIT(16)
532 #define RSI_GPIO_17_BTCOEX_WLAN_ACT_EXT_ANT_SEL	BIT(17)
533 #define RSI_GPIO_18_BTCOEX_BT_PRIO_EXT_ANT_SEL	BIT(18)
534 #define RSI_GPIO_19_BTCOEX_BT_ACT_EXT_ON_OFF	BIT(19)
535 #define RSI_GPIO_20_RF_RESET			BIT(20)
536 #define RSI_GPIO_21_SLEEP_IND_FROM_DEVICE	BIT(21)
537 
538 #define RSI_UNUSED_SOC_GPIO_BITMAP (RSI_GPIO_9_UART1_RX | \
539 				    RSI_GPIO_10_UART1_TX | \
540 				    RSI_GPIO_11_UART1_RTS_I2S_CLK | \
541 				    RSI_GPIO_12_UART1_CTS_I2S_WS | \
542 				    RSI_GPIO_13_DBG_UART_RX_I2S_DIN | \
543 				    RSI_GPIO_14_DBG_UART_RX_I2S_DOUT | \
544 				    RSI_GPIO_15_LP_WAKEUP_BOOT_BYPASS | \
545 				    RSI_GPIO_17_BTCOEX_WLAN_ACT_EXT_ANT_SEL | \
546 				    RSI_GPIO_18_BTCOEX_BT_PRIO_EXT_ANT_SEL | \
547 				    RSI_GPIO_19_BTCOEX_BT_ACT_EXT_ON_OFF | \
548 				    RSI_GPIO_21_SLEEP_IND_FROM_DEVICE)
549 
550 #define RSI_UNUSED_ULP_GPIO_BITMAP (RSI_GPIO_MOTION_SENSOR_ULP_WAKEUP | \
551 				    RSI_GPIO_SLEEP_IND_FROM_DEVICE | \
552 				    RSI_GPIO_2_ULP | \
553 				    RSI_GPIO_PUSH_BUTTON_ULP_WAKEUP);
554 struct rsi_config_vals {
555 	__le16 len_qno;
556 	u8 pkt_type;
557 	u8 misc_flags;
558 	__le16 reserved1[6];
559 	u8 lp_ps_handshake;
560 	u8 ulp_ps_handshake;
561 	u8 sleep_config_params; /* 0 for no handshake,
562 				 * 1 for GPIO based handshake,
563 				 * 2 packet handshake
564 				 */
565 	u8 unused_ulp_gpio;
566 	__le32 unused_soc_gpio_bitmap;
567 	u8 ext_pa_or_bt_coex_en;
568 	u8 opermode;
569 	u8 wlan_rf_pwr_mode;
570 	u8 bt_rf_pwr_mode;
571 	u8 zigbee_rf_pwr_mode;
572 	u8 driver_mode;
573 	u8 region_code;
574 	u8 antenna_sel_val;
575 	u8 reserved2[16];
576 } __packed;
577 
578 /* Packet info flags */
579 #define RSI_EEPROM_HDR_SIZE_OFFSET		8
580 #define RSI_EEPROM_HDR_SIZE_MASK		0x300
581 #define RSI_EEPROM_LEN_OFFSET			20
582 #define RSI_EEPROM_LEN_MASK			0xFFF00000
583 
584 struct rsi_eeprom_read_frame {
585 	__le16 len_qno;
586 	u8 pkt_type;
587 	u8 misc_flags;
588 	__le32 pkt_info;
589 	__le32 eeprom_offset;
590 	__le16 delay_ms;
591 	__le16 reserved3;
592 } __packed;
593 
594 struct rsi_request_ps {
595 	struct rsi_cmd_desc desc;
596 	struct ps_sleep_params ps_sleep;
597 	u8 ps_mimic_support;
598 	u8 ps_uapsd_acs;
599 	u8 ps_uapsd_wakeup_period;
600 	u8 reserved;
601 	__le32 ps_listen_interval;
602 	__le32 ps_dtim_interval_duration;
603 	__le16 ps_num_dtim_intervals;
604 } __packed;
605 
606 struct rsi_wowlan_req {
607 	struct rsi_cmd_desc desc;
608 	u8 sourceid[ETH_ALEN];
609 	u16 wow_flags;
610 	u16 host_sleep_status;
611 } __packed;
612 
613 static inline u32 rsi_get_queueno(u8 *addr, u16 offset)
614 {
615 	return (le16_to_cpu(*(__le16 *)&addr[offset]) & 0x7000) >> 12;
616 }
617 
618 static inline u32 rsi_get_length(u8 *addr, u16 offset)
619 {
620 	return (le16_to_cpu(*(__le16 *)&addr[offset])) & 0x0fff;
621 }
622 
623 static inline u8 rsi_get_extended_desc(u8 *addr, u16 offset)
624 {
625 	return le16_to_cpu(*((__le16 *)&addr[offset + 4])) & 0x00ff;
626 }
627 
628 static inline u8 rsi_get_rssi(u8 *addr)
629 {
630 	return *(u8 *)(addr + FRAME_DESC_SZ);
631 }
632 
633 static inline u8 rsi_get_channel(u8 *addr)
634 {
635 	return *(char *)(addr + 15);
636 }
637 
638 static inline void rsi_set_len_qno(__le16 *addr, u16 len, u8 qno)
639 {
640 	*addr = cpu_to_le16(len | ((qno & 7) << 12));
641 }
642 
643 int rsi_handle_card_ready(struct rsi_common *common, u8 *msg);
644 int rsi_mgmt_pkt_recv(struct rsi_common *common, u8 *msg);
645 int rsi_set_vap_capabilities(struct rsi_common *common, enum opmode mode,
646 			     u8 *mac_addr, u8 vap_id, u8 vap_status);
647 int rsi_send_aggregation_params_frame(struct rsi_common *common, u16 tid,
648 				      u16 ssn, u8 buf_size, u8 event,
649 				      u8 sta_id);
650 int rsi_hal_load_key(struct rsi_common *common, u8 *data, u16 key_len,
651 		     u8 key_type, u8 key_id, u32 cipher, s16 sta_id,
652 		     struct ieee80211_vif *vif);
653 int rsi_set_channel(struct rsi_common *common,
654 		    struct ieee80211_channel *channel);
655 int rsi_send_vap_dynamic_update(struct rsi_common *common);
656 int rsi_send_block_unblock_frame(struct rsi_common *common, bool event);
657 void rsi_inform_bss_status(struct rsi_common *common, enum opmode opmode,
658 			   u8 status, const u8 *addr, u8 qos_enable, u16 aid,
659 			   struct ieee80211_sta *sta, u16 sta_id,
660 			   struct ieee80211_vif *vif);
661 void rsi_indicate_pkt_to_os(struct rsi_common *common, struct sk_buff *skb);
662 int rsi_mac80211_attach(struct rsi_common *common);
663 void rsi_indicate_tx_status(struct rsi_hw *common, struct sk_buff *skb,
664 			    int status);
665 bool rsi_is_cipher_wep(struct rsi_common *common);
666 void rsi_core_qos_processor(struct rsi_common *common);
667 void rsi_core_xmit(struct rsi_common *common, struct sk_buff *skb);
668 int rsi_send_mgmt_pkt(struct rsi_common *common, struct sk_buff *skb);
669 int rsi_send_data_pkt(struct rsi_common *common, struct sk_buff *skb);
670 int rsi_band_check(struct rsi_common *common, struct ieee80211_channel *chan);
671 int rsi_send_rx_filter_frame(struct rsi_common *common, u16 rx_filter_word);
672 int rsi_send_radio_params_update(struct rsi_common *common);
673 int rsi_set_antenna(struct rsi_common *common, u8 antenna);
674 #ifdef CONFIG_PM
675 int rsi_send_wowlan_request(struct rsi_common *common, u16 flags,
676 			    u16 sleep_status);
677 #endif
678 int rsi_send_ps_request(struct rsi_hw *adapter, bool enable,
679 			struct ieee80211_vif *vif);
680 #endif
681