1 /** 2 * Copyright (c) 2014 Redpine Signals Inc. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17 #ifndef __RSI_MAIN_H__ 18 #define __RSI_MAIN_H__ 19 20 #include <linux/string.h> 21 #include <linux/skbuff.h> 22 #include <net/mac80211.h> 23 24 struct rsi_sta { 25 struct ieee80211_sta *sta; 26 s16 sta_id; 27 u16 seq_start[IEEE80211_NUM_TIDS]; 28 bool start_tx_aggr[IEEE80211_NUM_TIDS]; 29 }; 30 31 struct rsi_hw; 32 33 #include "rsi_ps.h" 34 35 #define ERR_ZONE BIT(0) /* For Error Msgs */ 36 #define INFO_ZONE BIT(1) /* For General Status Msgs */ 37 #define INIT_ZONE BIT(2) /* For Driver Init Seq Msgs */ 38 #define MGMT_TX_ZONE BIT(3) /* For TX Mgmt Path Msgs */ 39 #define MGMT_RX_ZONE BIT(4) /* For RX Mgmt Path Msgs */ 40 #define DATA_TX_ZONE BIT(5) /* For TX Data Path Msgs */ 41 #define DATA_RX_ZONE BIT(6) /* For RX Data Path Msgs */ 42 #define FSM_ZONE BIT(7) /* For State Machine Msgs */ 43 #define ISR_ZONE BIT(8) /* For Interrupt Msgs */ 44 45 enum RSI_FSM_STATES { 46 FSM_FW_NOT_LOADED, 47 FSM_CARD_NOT_READY, 48 FSM_COMMON_DEV_PARAMS_SENT, 49 FSM_BOOT_PARAMS_SENT, 50 FSM_EEPROM_READ_MAC_ADDR, 51 FSM_EEPROM_READ_RF_TYPE, 52 FSM_RESET_MAC_SENT, 53 FSM_RADIO_CAPS_SENT, 54 FSM_BB_RF_PROG_SENT, 55 FSM_MAC_INIT_DONE, 56 57 NUM_FSM_STATES 58 }; 59 60 extern u32 rsi_zone_enabled; 61 extern __printf(2, 3) void rsi_dbg(u32 zone, const char *fmt, ...); 62 63 #define RSI_MAX_VIFS 1 64 #define NUM_EDCA_QUEUES 4 65 #define IEEE80211_ADDR_LEN 6 66 #define FRAME_DESC_SZ 16 67 #define MIN_802_11_HDR_LEN 24 68 #define RSI_DEF_KEEPALIVE 90 69 70 #define DATA_QUEUE_WATER_MARK 400 71 #define MIN_DATA_QUEUE_WATER_MARK 300 72 #define MULTICAST_WATER_MARK 200 73 #define MAC_80211_HDR_FRAME_CONTROL 0 74 #define WME_NUM_AC 4 75 #define NUM_SOFT_QUEUES 6 76 #define MAX_HW_QUEUES 12 77 #define INVALID_QUEUE 0xff 78 #define MAX_CONTINUOUS_VO_PKTS 8 79 #define MAX_CONTINUOUS_VI_PKTS 4 80 81 /* Hardware queue info */ 82 #define BROADCAST_HW_Q 9 83 #define MGMT_HW_Q 10 84 #define BEACON_HW_Q 11 85 86 /* Queue information */ 87 #define RSI_COEX_Q 0x0 88 #define RSI_WIFI_MGMT_Q 0x4 89 #define RSI_WIFI_DATA_Q 0x5 90 #define IEEE80211_MGMT_FRAME 0x00 91 #define IEEE80211_CTL_FRAME 0x04 92 93 #define RSI_MAX_ASSOC_STAS 32 94 #define IEEE80211_QOS_TID 0x0f 95 #define IEEE80211_NONQOS_TID 16 96 97 #define MAX_DEBUGFS_ENTRIES 4 98 99 #define TID_TO_WME_AC(_tid) ( \ 100 ((_tid) == 0 || (_tid) == 3) ? BE_Q : \ 101 ((_tid) < 3) ? BK_Q : \ 102 ((_tid) < 6) ? VI_Q : \ 103 VO_Q) 104 105 #define WME_AC(_q) ( \ 106 ((_q) == BK_Q) ? IEEE80211_AC_BK : \ 107 ((_q) == BE_Q) ? IEEE80211_AC_BE : \ 108 ((_q) == VI_Q) ? IEEE80211_AC_VI : \ 109 IEEE80211_AC_VO) 110 111 #define RSI_DEV_9113 1 112 113 struct version_info { 114 u16 major; 115 u16 minor; 116 u16 release_num; 117 u16 patch_num; 118 } __packed; 119 120 struct skb_info { 121 s8 rssi; 122 u32 flags; 123 u16 channel; 124 s8 tid; 125 s8 sta_id; 126 u8 internal_hdr_size; 127 }; 128 129 enum edca_queue { 130 BK_Q, 131 BE_Q, 132 VI_Q, 133 VO_Q, 134 MGMT_SOFT_Q, 135 MGMT_BEACON_Q 136 }; 137 138 struct security_info { 139 bool security_enable; 140 u32 ptk_cipher; 141 u32 gtk_cipher; 142 }; 143 144 struct wmm_qinfo { 145 s32 weight; 146 s32 wme_params; 147 s32 pkt_contended; 148 s32 txop; 149 }; 150 151 struct transmit_q_stats { 152 u32 total_tx_pkt_send[NUM_EDCA_QUEUES + 2]; 153 u32 total_tx_pkt_freed[NUM_EDCA_QUEUES + 2]; 154 }; 155 156 struct vif_priv { 157 bool is_ht; 158 bool sgi; 159 u16 seq_start; 160 }; 161 162 struct rsi_event { 163 atomic_t event_condition; 164 wait_queue_head_t event_queue; 165 }; 166 167 struct rsi_thread { 168 void (*thread_function)(void *); 169 struct completion completion; 170 struct task_struct *task; 171 struct rsi_event event; 172 atomic_t thread_done; 173 }; 174 175 struct cqm_info { 176 s8 last_cqm_event_rssi; 177 int rssi_thold; 178 u32 rssi_hyst; 179 }; 180 181 struct xtended_desc { 182 u8 confirm_frame_type; 183 u8 retry_cnt; 184 u16 reserved; 185 }; 186 187 enum rsi_dfs_regions { 188 RSI_REGION_FCC = 0, 189 RSI_REGION_ETSI, 190 RSI_REGION_TELEC, 191 RSI_REGION_WORLD 192 }; 193 194 struct rsi_common { 195 struct rsi_hw *priv; 196 struct vif_priv vif_info[RSI_MAX_VIFS]; 197 198 bool mgmt_q_block; 199 struct version_info driver_ver; 200 struct version_info fw_ver; 201 202 struct rsi_thread tx_thread; 203 struct sk_buff_head tx_queue[NUM_EDCA_QUEUES + 2]; 204 /* Mutex declaration */ 205 struct mutex mutex; 206 /* Mutex used for tx thread */ 207 struct mutex tx_lock; 208 /* Mutex used for rx thread */ 209 struct mutex rx_lock; 210 u8 endpoint; 211 212 /* Channel/band related */ 213 u8 band; 214 u8 num_supp_bands; 215 u8 channel_width; 216 217 u16 rts_threshold; 218 u16 bitrate_mask[2]; 219 u32 fixedrate_mask[2]; 220 221 u8 rf_reset; 222 struct transmit_q_stats tx_stats; 223 struct security_info secinfo; 224 struct wmm_qinfo tx_qinfo[NUM_EDCA_QUEUES]; 225 struct ieee80211_tx_queue_params edca_params[NUM_EDCA_QUEUES]; 226 u8 mac_addr[IEEE80211_ADDR_LEN]; 227 228 /* state related */ 229 u32 fsm_state; 230 bool init_done; 231 u8 bb_rf_prog_count; 232 bool iface_down; 233 234 /* Generic */ 235 u8 channel; 236 u8 *rx_data_pkt; 237 u8 mac_id; 238 u8 radio_id; 239 u16 rate_pwr[20]; 240 u16 min_rate; 241 242 /* WMM algo related */ 243 u8 selected_qnum; 244 u32 pkt_cnt; 245 u8 min_weight; 246 247 /* bgscan related */ 248 struct cqm_info cqm_info; 249 250 bool hw_data_qs_blocked; 251 u8 driver_mode; 252 u8 coex_mode; 253 u16 oper_mode; 254 u8 lp_ps_handshake_mode; 255 u8 ulp_ps_handshake_mode; 256 u8 uapsd_bitmap; 257 u8 rf_power_val; 258 u8 wlan_rf_power_mode; 259 u8 obm_ant_sel_val; 260 int tx_power; 261 u8 ant_in_use; 262 263 u16 beacon_interval; 264 u8 dtim_cnt; 265 266 /* AP mode parameters */ 267 u8 beacon_enabled; 268 u16 beacon_cnt; 269 struct rsi_sta stations[RSI_MAX_ASSOC_STAS + 1]; 270 int num_stations; 271 int max_stations; 272 struct ieee80211_key_conf *key; 273 }; 274 275 enum host_intf { 276 RSI_HOST_INTF_SDIO = 0, 277 RSI_HOST_INTF_USB 278 }; 279 280 struct eepromrw_info { 281 u32 offset; 282 u32 length; 283 u8 write; 284 u16 eeprom_erase; 285 u8 data[480]; 286 }; 287 288 struct eeprom_read { 289 u16 length; 290 u16 off_set; 291 }; 292 293 struct rsi_hw { 294 struct rsi_common *priv; 295 u8 device_model; 296 struct ieee80211_hw *hw; 297 struct ieee80211_vif *vifs[RSI_MAX_VIFS]; 298 struct ieee80211_tx_queue_params edca_params[NUM_EDCA_QUEUES]; 299 struct ieee80211_supported_band sbands[NUM_NL80211_BANDS]; 300 301 struct device *device; 302 u8 sc_nvifs; 303 304 enum host_intf rsi_host_intf; 305 u16 block_size; 306 enum ps_state ps_state; 307 struct rsi_ps_info ps_info; 308 spinlock_t ps_lock; /*To protect power save config*/ 309 u32 usb_buffer_status_reg; 310 #ifdef CONFIG_RSI_DEBUGFS 311 struct rsi_debugfs *dfsentry; 312 u8 num_debugfs_entries; 313 #endif 314 char *fw_file_name; 315 struct timer_list bl_cmd_timer; 316 bool blcmd_timer_expired; 317 u32 flash_capacity; 318 struct eepromrw_info eeprom; 319 u32 interrupt_status; 320 u8 dfs_region; 321 char country[2]; 322 void *rsi_dev; 323 struct rsi_host_intf_ops *host_intf_ops; 324 int (*check_hw_queue_status)(struct rsi_hw *adapter, u8 q_num); 325 int (*rx_urb_submit)(struct rsi_hw *adapter); 326 int (*determine_event_timeout)(struct rsi_hw *adapter); 327 }; 328 329 struct rsi_host_intf_ops { 330 int (*read_pkt)(struct rsi_hw *adapter, u8 *pkt, u32 len); 331 int (*write_pkt)(struct rsi_hw *adapter, u8 *pkt, u32 len); 332 int (*master_access_msword)(struct rsi_hw *adapter, u16 ms_word); 333 int (*read_reg_multiple)(struct rsi_hw *adapter, u32 addr, 334 u8 *data, u16 count); 335 int (*write_reg_multiple)(struct rsi_hw *adapter, u32 addr, 336 u8 *data, u16 count); 337 int (*master_reg_read)(struct rsi_hw *adapter, u32 addr, 338 u32 *read_buf, u16 size); 339 int (*master_reg_write)(struct rsi_hw *adapter, 340 unsigned long addr, unsigned long data, 341 u16 size); 342 int (*load_data_master_write)(struct rsi_hw *adapter, u32 addr, 343 u32 instructions_size, u16 block_size, 344 u8 *fw); 345 }; 346 #endif 347