1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause 2 /* Copyright(c) 2019-2022 Realtek Corporation 3 */ 4 #include "cam.h" 5 #include "core.h" 6 #include "debug.h" 7 #include "fw.h" 8 #include "mac.h" 9 #include "phy.h" 10 #include "ps.h" 11 #include "reg.h" 12 #include "util.h" 13 #include "wow.h" 14 15 static void rtw89_wow_leave_deep_ps(struct rtw89_dev *rtwdev) 16 { 17 __rtw89_leave_ps_mode(rtwdev); 18 } 19 20 static void rtw89_wow_enter_deep_ps(struct rtw89_dev *rtwdev) 21 { 22 struct ieee80211_vif *wow_vif = rtwdev->wow.wow_vif; 23 struct rtw89_vif *rtwvif = (struct rtw89_vif *)wow_vif->drv_priv; 24 25 __rtw89_enter_ps_mode(rtwdev, rtwvif); 26 } 27 28 static void rtw89_wow_enter_lps(struct rtw89_dev *rtwdev) 29 { 30 struct ieee80211_vif *wow_vif = rtwdev->wow.wow_vif; 31 struct rtw89_vif *rtwvif = (struct rtw89_vif *)wow_vif->drv_priv; 32 33 rtw89_enter_lps(rtwdev, rtwvif, false); 34 } 35 36 static void rtw89_wow_leave_lps(struct rtw89_dev *rtwdev) 37 { 38 rtw89_leave_lps(rtwdev); 39 } 40 41 static int rtw89_wow_config_mac(struct rtw89_dev *rtwdev, bool enable_wow) 42 { 43 int ret; 44 45 if (enable_wow) { 46 ret = rtw89_mac_resize_ple_rx_quota(rtwdev, true); 47 if (ret) { 48 rtw89_err(rtwdev, "[ERR]patch rx qta %d\n", ret); 49 return ret; 50 } 51 rtw89_write32_set(rtwdev, R_AX_RX_FUNCTION_STOP, B_AX_HDR_RX_STOP); 52 rtw89_write32_clr(rtwdev, R_AX_RX_FLTR_OPT, B_AX_SNIFFER_MODE); 53 rtw89_mac_cfg_ppdu_status(rtwdev, RTW89_MAC_0, false); 54 rtw89_write32(rtwdev, R_AX_ACTION_FWD0, 0); 55 rtw89_write32(rtwdev, R_AX_ACTION_FWD1, 0); 56 rtw89_write32(rtwdev, R_AX_TF_FWD, 0); 57 rtw89_write32(rtwdev, R_AX_HW_RPT_FWD, 0); 58 } else { 59 ret = rtw89_mac_resize_ple_rx_quota(rtwdev, false); 60 if (ret) { 61 rtw89_err(rtwdev, "[ERR]patch rx qta %d\n", ret); 62 return ret; 63 } 64 rtw89_write32_clr(rtwdev, R_AX_RX_FUNCTION_STOP, B_AX_HDR_RX_STOP); 65 rtw89_mac_cfg_ppdu_status(rtwdev, RTW89_MAC_0, true); 66 rtw89_write32(rtwdev, R_AX_ACTION_FWD0, TRXCFG_MPDU_PROC_ACT_FRWD); 67 rtw89_write32(rtwdev, R_AX_TF_FWD, TRXCFG_MPDU_PROC_TF_FRWD); 68 } 69 70 return 0; 71 } 72 73 static void rtw89_wow_set_rx_filter(struct rtw89_dev *rtwdev, bool enable) 74 { 75 enum rtw89_mac_fwd_target fwd_target = enable ? 76 RTW89_FWD_DONT_CARE : 77 RTW89_FWD_TO_HOST; 78 79 rtw89_mac_typ_fltr_opt(rtwdev, RTW89_MGNT, fwd_target, RTW89_MAC_0); 80 rtw89_mac_typ_fltr_opt(rtwdev, RTW89_CTRL, fwd_target, RTW89_MAC_0); 81 rtw89_mac_typ_fltr_opt(rtwdev, RTW89_DATA, fwd_target, RTW89_MAC_0); 82 } 83 84 static void rtw89_wow_show_wakeup_reason(struct rtw89_dev *rtwdev) 85 { 86 enum rtw89_core_chip_id chip_id = rtwdev->chip->chip_id; 87 struct cfg80211_wowlan_nd_info nd_info; 88 struct cfg80211_wowlan_wakeup wakeup = { 89 .pattern_idx = -1, 90 }; 91 u32 wow_reason_reg; 92 u8 reason; 93 94 if (chip_id == RTL8852A || chip_id == RTL8852B) 95 wow_reason_reg = R_AX_C2HREG_DATA3 + 3; 96 else 97 wow_reason_reg = R_AX_C2HREG_DATA3_V1 + 3; 98 99 reason = rtw89_read8(rtwdev, wow_reason_reg); 100 101 switch (reason) { 102 case RTW89_WOW_RSN_RX_DEAUTH: 103 wakeup.disconnect = true; 104 rtw89_debug(rtwdev, RTW89_DBG_WOW, "WOW: Rx deauth\n"); 105 break; 106 case RTW89_WOW_RSN_DISCONNECT: 107 wakeup.disconnect = true; 108 rtw89_debug(rtwdev, RTW89_DBG_WOW, "WOW: AP is off\n"); 109 break; 110 case RTW89_WOW_RSN_RX_MAGIC_PKT: 111 wakeup.magic_pkt = true; 112 rtw89_debug(rtwdev, RTW89_DBG_WOW, "WOW: Rx magic packet\n"); 113 break; 114 case RTW89_WOW_RSN_RX_GTK_REKEY: 115 wakeup.gtk_rekey_failure = true; 116 rtw89_debug(rtwdev, RTW89_DBG_WOW, "WOW: Rx gtk rekey\n"); 117 break; 118 case RTW89_WOW_RSN_RX_PATTERN_MATCH: 119 /* Current firmware and driver don't report pattern index 120 * Use pattern_idx to 0 defaultly. 121 */ 122 wakeup.pattern_idx = 0; 123 rtw89_debug(rtwdev, RTW89_DBG_WOW, "WOW: Rx pattern match packet\n"); 124 break; 125 case RTW89_WOW_RSN_RX_NLO: 126 /* Current firmware and driver don't report ssid index. 127 * Use 0 for n_matches based on its comment. 128 */ 129 nd_info.n_matches = 0; 130 wakeup.net_detect = &nd_info; 131 rtw89_debug(rtwdev, RTW89_DBG_WOW, "Rx NLO\n"); 132 break; 133 default: 134 rtw89_warn(rtwdev, "Unknown wakeup reason %x\n", reason); 135 ieee80211_report_wowlan_wakeup(rtwdev->wow.wow_vif, NULL, 136 GFP_KERNEL); 137 return; 138 } 139 140 ieee80211_report_wowlan_wakeup(rtwdev->wow.wow_vif, &wakeup, 141 GFP_KERNEL); 142 } 143 144 static void rtw89_wow_vif_iter(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif) 145 { 146 struct rtw89_wow_param *rtw_wow = &rtwdev->wow; 147 struct ieee80211_vif *vif = rtwvif_to_vif(rtwvif); 148 149 /* Current wowlan function support setting of only one STATION vif. 150 * So when one suitable vif is found, stop the iteration. 151 */ 152 if (rtw_wow->wow_vif || vif->type != NL80211_IFTYPE_STATION) 153 return; 154 155 switch (rtwvif->net_type) { 156 case RTW89_NET_TYPE_INFRA: 157 rtw_wow->wow_vif = vif; 158 break; 159 case RTW89_NET_TYPE_NO_LINK: 160 default: 161 break; 162 } 163 } 164 165 static u16 __rtw89_cal_crc16(u8 data, u16 crc) 166 { 167 u8 shift_in, data_bit; 168 u8 crc_bit4, crc_bit11, crc_bit15; 169 u16 crc_result; 170 int index; 171 172 for (index = 0; index < 8; index++) { 173 crc_bit15 = crc & BIT(15) ? 1 : 0; 174 data_bit = data & BIT(index) ? 1 : 0; 175 shift_in = crc_bit15 ^ data_bit; 176 177 crc_result = crc << 1; 178 179 if (shift_in == 0) 180 crc_result &= ~BIT(0); 181 else 182 crc_result |= BIT(0); 183 184 crc_bit11 = (crc & BIT(11) ? 1 : 0) ^ shift_in; 185 186 if (crc_bit11 == 0) 187 crc_result &= ~BIT(12); 188 else 189 crc_result |= BIT(12); 190 191 crc_bit4 = (crc & BIT(4) ? 1 : 0) ^ shift_in; 192 193 if (crc_bit4 == 0) 194 crc_result &= ~BIT(5); 195 else 196 crc_result |= BIT(5); 197 198 crc = crc_result; 199 } 200 return crc; 201 } 202 203 static u16 rtw89_calc_crc(u8 *pdata, int length) 204 { 205 u16 crc = 0xffff; 206 int i; 207 208 for (i = 0; i < length; i++) 209 crc = __rtw89_cal_crc16(pdata[i], crc); 210 211 /* get 1' complement */ 212 return ~crc; 213 } 214 215 static int rtw89_wow_pattern_get_type(struct rtw89_vif *rtwvif, 216 struct rtw89_wow_cam_info *rtw_pattern, 217 const u8 *pattern, u8 da_mask) 218 { 219 u8 da[ETH_ALEN]; 220 221 ether_addr_copy_mask(da, pattern, da_mask); 222 223 /* Each pattern is divided into different kinds by DA address 224 * a. DA is broadcast address: set bc = 0; 225 * b. DA is multicast address: set mc = 0 226 * c. DA is unicast address same as dev's mac address: set uc = 0 227 * d. DA is unmasked. Also called wildcard type: set uc = bc = mc = 0 228 * e. Others is invalid type. 229 */ 230 231 if (is_broadcast_ether_addr(da)) 232 rtw_pattern->bc = true; 233 else if (is_multicast_ether_addr(da)) 234 rtw_pattern->mc = true; 235 else if (ether_addr_equal(da, rtwvif->mac_addr) && 236 da_mask == GENMASK(5, 0)) 237 rtw_pattern->uc = true; 238 else if (!da_mask) /*da_mask == 0 mean wildcard*/ 239 return 0; 240 else 241 return -EPERM; 242 243 return 0; 244 } 245 246 static int rtw89_wow_pattern_generate(struct rtw89_dev *rtwdev, 247 struct rtw89_vif *rtwvif, 248 const struct cfg80211_pkt_pattern *pkt_pattern, 249 struct rtw89_wow_cam_info *rtw_pattern) 250 { 251 u8 mask_hw[RTW89_MAX_PATTERN_MASK_SIZE * 4] = {0}; 252 u8 content[RTW89_MAX_PATTERN_SIZE] = {0}; 253 const u8 *mask; 254 const u8 *pattern; 255 u8 mask_len; 256 u16 count; 257 u32 len; 258 int i, ret; 259 260 pattern = pkt_pattern->pattern; 261 len = pkt_pattern->pattern_len; 262 mask = pkt_pattern->mask; 263 mask_len = DIV_ROUND_UP(len, 8); 264 memset(rtw_pattern, 0, sizeof(*rtw_pattern)); 265 266 ret = rtw89_wow_pattern_get_type(rtwvif, rtw_pattern, pattern, 267 mask[0] & GENMASK(5, 0)); 268 if (ret) 269 return ret; 270 271 /* translate mask from os to mask for hw 272 * pattern from OS uses 'ethenet frame', like this: 273 * | 6 | 6 | 2 | 20 | Variable | 4 | 274 * |--------+--------+------+-----------+------------+-----| 275 * | 802.3 Mac Header | IP Header | TCP Packet | FCS | 276 * | DA | SA | Type | 277 * 278 * BUT, packet catched by our HW is in '802.11 frame', begin from LLC 279 * | 24 or 30 | 6 | 2 | 20 | Variable | 4 | 280 * |-------------------+--------+------+-----------+------------+-----| 281 * | 802.11 MAC Header | LLC | IP Header | TCP Packet | FCS | 282 * | Others | Tpye | 283 * 284 * Therefore, we need translate mask_from_OS to mask_to_hw. 285 * We should left-shift mask by 6 bits, then set the new bit[0~5] = 0, 286 * because new mask[0~5] means 'SA', but our HW packet begins from LLC, 287 * bit[0~5] corresponds to first 6 Bytes in LLC, they just don't match. 288 */ 289 290 /* Shift 6 bits */ 291 for (i = 0; i < mask_len - 1; i++) { 292 mask_hw[i] = u8_get_bits(mask[i], GENMASK(7, 6)) | 293 u8_get_bits(mask[i + 1], GENMASK(5, 0)) << 2; 294 } 295 mask_hw[i] = u8_get_bits(mask[i], GENMASK(7, 6)); 296 297 /* Set bit 0-5 to zero */ 298 mask_hw[0] &= ~GENMASK(5, 0); 299 300 memcpy(rtw_pattern->mask, mask_hw, sizeof(rtw_pattern->mask)); 301 302 /* To get the wake up pattern from the mask. 303 * We do not count first 12 bits which means 304 * DA[6] and SA[6] in the pattern to match HW design. 305 */ 306 count = 0; 307 for (i = 12; i < len; i++) { 308 if ((mask[i / 8] >> (i % 8)) & 0x01) { 309 content[count] = pattern[i]; 310 count++; 311 } 312 } 313 314 rtw_pattern->crc = rtw89_calc_crc(content, count); 315 316 return 0; 317 } 318 319 static int rtw89_wow_parse_patterns(struct rtw89_dev *rtwdev, 320 struct rtw89_vif *rtwvif, 321 struct cfg80211_wowlan *wowlan) 322 { 323 struct rtw89_wow_param *rtw_wow = &rtwdev->wow; 324 struct rtw89_wow_cam_info *rtw_pattern = rtw_wow->patterns; 325 int i; 326 int ret; 327 328 if (!wowlan->n_patterns || !wowlan->patterns) 329 return 0; 330 331 for (i = 0; i < wowlan->n_patterns; i++) { 332 rtw_pattern = &rtw_wow->patterns[i]; 333 ret = rtw89_wow_pattern_generate(rtwdev, rtwvif, 334 &wowlan->patterns[i], 335 rtw_pattern); 336 if (ret) { 337 rtw89_err(rtwdev, "failed to generate pattern(%d)\n", i); 338 rtw_wow->pattern_cnt = 0; 339 return ret; 340 } 341 342 rtw_pattern->r_w = true; 343 rtw_pattern->idx = i; 344 rtw_pattern->negative_pattern_match = false; 345 rtw_pattern->skip_mac_hdr = true; 346 rtw_pattern->valid = true; 347 } 348 rtw_wow->pattern_cnt = wowlan->n_patterns; 349 350 return 0; 351 } 352 353 static void rtw89_wow_pattern_clear_cam(struct rtw89_dev *rtwdev) 354 { 355 struct rtw89_wow_param *rtw_wow = &rtwdev->wow; 356 struct rtw89_wow_cam_info *rtw_pattern = rtw_wow->patterns; 357 int i = 0; 358 359 for (i = 0; i < rtw_wow->pattern_cnt; i++) { 360 rtw_pattern = &rtw_wow->patterns[i]; 361 rtw_pattern->valid = false; 362 rtw89_fw_wow_cam_update(rtwdev, rtw_pattern); 363 } 364 } 365 366 static void rtw89_wow_pattern_write(struct rtw89_dev *rtwdev) 367 { 368 struct rtw89_wow_param *rtw_wow = &rtwdev->wow; 369 struct rtw89_wow_cam_info *rtw_pattern = rtw_wow->patterns; 370 int i; 371 372 for (i = 0; i < rtw_wow->pattern_cnt; i++) 373 rtw89_fw_wow_cam_update(rtwdev, rtw_pattern + i); 374 } 375 376 static void rtw89_wow_pattern_clear(struct rtw89_dev *rtwdev) 377 { 378 struct rtw89_wow_param *rtw_wow = &rtwdev->wow; 379 380 rtw89_wow_pattern_clear_cam(rtwdev); 381 382 rtw_wow->pattern_cnt = 0; 383 memset(rtw_wow->patterns, 0, sizeof(rtw_wow->patterns)); 384 } 385 386 static void rtw89_wow_clear_wakeups(struct rtw89_dev *rtwdev) 387 { 388 struct rtw89_wow_param *rtw_wow = &rtwdev->wow; 389 390 rtw_wow->wow_vif = NULL; 391 rtw89_core_release_all_bits_map(rtw_wow->flags, RTW89_WOW_FLAG_NUM); 392 rtw_wow->pattern_cnt = 0; 393 } 394 395 static int rtw89_wow_set_wakeups(struct rtw89_dev *rtwdev, 396 struct cfg80211_wowlan *wowlan) 397 { 398 struct rtw89_wow_param *rtw_wow = &rtwdev->wow; 399 struct rtw89_vif *rtwvif; 400 401 if (wowlan->disconnect) 402 set_bit(RTW89_WOW_FLAG_EN_DISCONNECT, rtw_wow->flags); 403 if (wowlan->magic_pkt) 404 set_bit(RTW89_WOW_FLAG_EN_MAGIC_PKT, rtw_wow->flags); 405 406 rtw89_for_each_rtwvif(rtwdev, rtwvif) 407 rtw89_wow_vif_iter(rtwdev, rtwvif); 408 409 if (!rtw_wow->wow_vif) 410 return -EPERM; 411 412 rtwvif = (struct rtw89_vif *)rtw_wow->wow_vif->drv_priv; 413 return rtw89_wow_parse_patterns(rtwdev, rtwvif, wowlan); 414 } 415 416 static int rtw89_wow_cfg_wake(struct rtw89_dev *rtwdev, bool wow) 417 { 418 struct rtw89_wow_param *rtw_wow = &rtwdev->wow; 419 struct ieee80211_vif *wow_vif = rtw_wow->wow_vif; 420 struct rtw89_vif *rtwvif = (struct rtw89_vif *)wow_vif->drv_priv; 421 struct ieee80211_sta *wow_sta; 422 struct rtw89_sta *rtwsta = NULL; 423 int ret; 424 425 wow_sta = ieee80211_find_sta(wow_vif, rtwvif->bssid); 426 if (wow_sta) 427 rtwsta = (struct rtw89_sta *)wow_sta->drv_priv; 428 429 if (wow) { 430 if (rtw_wow->pattern_cnt) 431 rtwvif->wowlan_pattern = true; 432 if (test_bit(RTW89_WOW_FLAG_EN_MAGIC_PKT, rtw_wow->flags)) 433 rtwvif->wowlan_magic = true; 434 } else { 435 rtwvif->wowlan_pattern = false; 436 rtwvif->wowlan_magic = false; 437 } 438 439 ret = rtw89_fw_h2c_wow_wakeup_ctrl(rtwdev, rtwvif, wow); 440 if (ret) { 441 rtw89_err(rtwdev, "failed to fw wow wakeup ctrl\n"); 442 return ret; 443 } 444 445 if (wow) { 446 ret = rtw89_chip_h2c_dctl_sec_cam(rtwdev, rtwvif, rtwsta); 447 if (ret) { 448 rtw89_err(rtwdev, "failed to update dctl cam sec entry: %d\n", 449 ret); 450 return ret; 451 } 452 } 453 454 ret = rtw89_fw_h2c_cam(rtwdev, rtwvif, rtwsta, NULL); 455 if (ret) { 456 rtw89_warn(rtwdev, "failed to send h2c cam\n"); 457 return ret; 458 } 459 460 ret = rtw89_fw_h2c_wow_global(rtwdev, rtwvif, wow); 461 if (ret) { 462 rtw89_err(rtwdev, "failed to fw wow global\n"); 463 return ret; 464 } 465 466 return 0; 467 } 468 469 static int rtw89_wow_check_fw_status(struct rtw89_dev *rtwdev, bool wow_enable) 470 { 471 u8 polling; 472 int ret; 473 474 ret = read_poll_timeout_atomic(rtw89_read8_mask, polling, 475 wow_enable == !!polling, 476 50, 50000, false, rtwdev, 477 R_AX_WOW_CTRL, B_AX_WOW_WOWEN); 478 if (ret) 479 rtw89_err(rtwdev, "failed to check wow status %s\n", 480 wow_enable ? "enabled" : "disabled"); 481 return ret; 482 } 483 484 static int rtw89_wow_swap_fw(struct rtw89_dev *rtwdev, bool wow) 485 { 486 enum rtw89_fw_type fw_type = wow ? RTW89_FW_WOWLAN : RTW89_FW_NORMAL; 487 struct rtw89_wow_param *rtw_wow = &rtwdev->wow; 488 struct ieee80211_vif *wow_vif = rtw_wow->wow_vif; 489 struct rtw89_vif *rtwvif = (struct rtw89_vif *)wow_vif->drv_priv; 490 struct ieee80211_sta *wow_sta; 491 struct rtw89_sta *rtwsta = NULL; 492 bool is_conn = true; 493 int ret; 494 495 rtw89_hci_disable_intr(rtwdev); 496 497 wow_sta = ieee80211_find_sta(wow_vif, rtwvif->bssid); 498 if (wow_sta) 499 rtwsta = (struct rtw89_sta *)wow_sta->drv_priv; 500 else 501 is_conn = false; 502 503 ret = rtw89_fw_download(rtwdev, fw_type); 504 if (ret) { 505 rtw89_warn(rtwdev, "download fw failed\n"); 506 return ret; 507 } 508 509 rtw89_phy_init_rf_reg(rtwdev, true); 510 511 ret = rtw89_fw_h2c_role_maintain(rtwdev, rtwvif, rtwsta, 512 RTW89_ROLE_FW_RESTORE); 513 if (ret) { 514 rtw89_warn(rtwdev, "failed to send h2c role maintain\n"); 515 return ret; 516 } 517 518 ret = rtw89_fw_h2c_assoc_cmac_tbl(rtwdev, wow_vif, wow_sta); 519 if (ret) { 520 rtw89_warn(rtwdev, "failed to send h2c assoc cmac tbl\n"); 521 return ret; 522 } 523 524 if (!is_conn) 525 rtw89_cam_reset_keys(rtwdev); 526 527 ret = rtw89_fw_h2c_join_info(rtwdev, rtwvif, rtwsta, !is_conn); 528 if (ret) { 529 rtw89_warn(rtwdev, "failed to send h2c join info\n"); 530 return ret; 531 } 532 533 ret = rtw89_fw_h2c_cam(rtwdev, rtwvif, rtwsta, NULL); 534 if (ret) { 535 rtw89_warn(rtwdev, "failed to send h2c cam\n"); 536 return ret; 537 } 538 539 if (is_conn) { 540 ret = rtw89_fw_h2c_general_pkt(rtwdev, rtwvif, rtwsta->mac_id); 541 if (ret) { 542 rtw89_warn(rtwdev, "failed to send h2c general packet\n"); 543 return ret; 544 } 545 rtw89_phy_ra_assoc(rtwdev, wow_sta); 546 rtw89_phy_set_bss_color(rtwdev, wow_vif); 547 rtw89_chip_cfg_txpwr_ul_tb_offset(rtwdev, wow_vif); 548 } 549 550 rtw89_mac_hw_mgnt_sec(rtwdev, wow); 551 rtw89_hci_enable_intr(rtwdev); 552 553 return 0; 554 } 555 556 static int rtw89_wow_enable_trx_pre(struct rtw89_dev *rtwdev) 557 { 558 int ret; 559 560 rtw89_hci_ctrl_txdma_ch(rtwdev, false); 561 rtw89_hci_ctrl_txdma_fw_ch(rtwdev, true); 562 563 rtw89_mac_ptk_drop_by_band_and_wait(rtwdev, RTW89_MAC_0); 564 565 ret = rtw89_hci_poll_txdma_ch(rtwdev); 566 if (ret) { 567 rtw89_err(rtwdev, "txdma ch busy\n"); 568 return ret; 569 } 570 rtw89_wow_set_rx_filter(rtwdev, true); 571 572 ret = rtw89_mac_cfg_ppdu_status(rtwdev, RTW89_MAC_0, false); 573 if (ret) { 574 rtw89_err(rtwdev, "cfg ppdu status\n"); 575 return ret; 576 } 577 578 return 0; 579 } 580 581 static int rtw89_wow_enable_trx_post(struct rtw89_dev *rtwdev) 582 { 583 int ret; 584 585 rtw89_hci_disable_intr(rtwdev); 586 rtw89_hci_ctrl_trxhci(rtwdev, false); 587 588 ret = rtw89_hci_poll_txdma_ch(rtwdev); 589 if (ret) { 590 rtw89_err(rtwdev, "failed to poll txdma ch idle pcie\n"); 591 return ret; 592 } 593 594 ret = rtw89_wow_config_mac(rtwdev, true); 595 if (ret) { 596 rtw89_err(rtwdev, "failed to config mac\n"); 597 return ret; 598 } 599 600 rtw89_wow_set_rx_filter(rtwdev, false); 601 rtw89_hci_reset(rtwdev); 602 603 return 0; 604 } 605 606 static int rtw89_wow_disable_trx_pre(struct rtw89_dev *rtwdev) 607 { 608 int ret; 609 610 rtw89_hci_clr_idx_all(rtwdev); 611 612 ret = rtw89_hci_rst_bdram(rtwdev); 613 if (ret) { 614 rtw89_warn(rtwdev, "reset bdram busy\n"); 615 return ret; 616 } 617 618 rtw89_hci_ctrl_trxhci(rtwdev, true); 619 rtw89_hci_ctrl_txdma_ch(rtwdev, true); 620 621 ret = rtw89_wow_config_mac(rtwdev, false); 622 if (ret) { 623 rtw89_err(rtwdev, "failed to config mac\n"); 624 return ret; 625 } 626 rtw89_hci_enable_intr(rtwdev); 627 628 return 0; 629 } 630 631 static int rtw89_wow_disable_trx_post(struct rtw89_dev *rtwdev) 632 { 633 int ret; 634 635 ret = rtw89_mac_cfg_ppdu_status(rtwdev, RTW89_MAC_0, true); 636 if (ret) 637 rtw89_err(rtwdev, "cfg ppdu status\n"); 638 639 return ret; 640 } 641 642 static int rtw89_wow_fw_start(struct rtw89_dev *rtwdev) 643 { 644 struct rtw89_wow_param *rtw_wow = &rtwdev->wow; 645 struct rtw89_vif *rtwvif = (struct rtw89_vif *)rtw_wow->wow_vif->drv_priv; 646 int ret; 647 648 rtw89_wow_pattern_write(rtwdev); 649 650 ret = rtw89_fw_h2c_keep_alive(rtwdev, rtwvif, true); 651 if (ret) { 652 rtw89_err(rtwdev, "wow: failed to enable keep alive\n"); 653 return ret; 654 } 655 656 ret = rtw89_fw_h2c_disconnect_detect(rtwdev, rtwvif, true); 657 if (ret) { 658 rtw89_err(rtwdev, "wow: failed to enable disconnect detect\n"); 659 goto out; 660 } 661 662 ret = rtw89_wow_cfg_wake(rtwdev, true); 663 if (ret) { 664 rtw89_err(rtwdev, "wow: failed to config wake\n"); 665 goto out; 666 } 667 668 ret = rtw89_wow_check_fw_status(rtwdev, true); 669 if (ret) { 670 rtw89_err(rtwdev, "wow: failed to check enable fw ready\n"); 671 goto out; 672 } 673 674 out: 675 return ret; 676 } 677 678 static int rtw89_wow_fw_stop(struct rtw89_dev *rtwdev) 679 { 680 struct rtw89_wow_param *rtw_wow = &rtwdev->wow; 681 struct rtw89_vif *rtwvif = (struct rtw89_vif *)rtw_wow->wow_vif->drv_priv; 682 int ret; 683 684 rtw89_wow_pattern_clear(rtwdev); 685 686 ret = rtw89_fw_h2c_keep_alive(rtwdev, rtwvif, false); 687 if (ret) { 688 rtw89_err(rtwdev, "wow: failed to disable keep alive\n"); 689 goto out; 690 } 691 692 ret = rtw89_fw_h2c_disconnect_detect(rtwdev, rtwvif, false); 693 if (ret) { 694 rtw89_err(rtwdev, "wow: failed to disable disconnect detect\n"); 695 goto out; 696 } 697 698 ret = rtw89_wow_cfg_wake(rtwdev, false); 699 if (ret) { 700 rtw89_err(rtwdev, "wow: failed to disable config wake\n"); 701 goto out; 702 } 703 704 rtw89_fw_release_general_pkt_list(rtwdev, true); 705 706 ret = rtw89_wow_check_fw_status(rtwdev, false); 707 if (ret) { 708 rtw89_err(rtwdev, "wow: failed to check disable fw ready\n"); 709 goto out; 710 } 711 712 out: 713 return ret; 714 } 715 716 static int rtw89_wow_enable(struct rtw89_dev *rtwdev) 717 { 718 int ret; 719 720 set_bit(RTW89_FLAG_WOWLAN, rtwdev->flags); 721 722 ret = rtw89_wow_enable_trx_pre(rtwdev); 723 if (ret) { 724 rtw89_err(rtwdev, "wow: failed to enable trx_pre\n"); 725 goto out; 726 } 727 728 rtw89_fw_release_general_pkt_list(rtwdev, true); 729 730 ret = rtw89_wow_swap_fw(rtwdev, true); 731 if (ret) { 732 rtw89_err(rtwdev, "wow: failed to swap to wow fw\n"); 733 goto out; 734 } 735 736 ret = rtw89_wow_fw_start(rtwdev); 737 if (ret) { 738 rtw89_err(rtwdev, "wow: failed to let wow fw start\n"); 739 goto out; 740 } 741 742 rtw89_wow_enter_lps(rtwdev); 743 744 ret = rtw89_wow_enable_trx_post(rtwdev); 745 if (ret) { 746 rtw89_err(rtwdev, "wow: failed to enable trx_post\n"); 747 goto out; 748 } 749 750 return 0; 751 752 out: 753 clear_bit(RTW89_FLAG_WOWLAN, rtwdev->flags); 754 return ret; 755 } 756 757 static int rtw89_wow_disable(struct rtw89_dev *rtwdev) 758 { 759 int ret; 760 761 ret = rtw89_wow_disable_trx_pre(rtwdev); 762 if (ret) { 763 rtw89_err(rtwdev, "wow: failed to disable trx_pre\n"); 764 goto out; 765 } 766 767 rtw89_wow_leave_lps(rtwdev); 768 769 ret = rtw89_wow_fw_stop(rtwdev); 770 if (ret) { 771 rtw89_err(rtwdev, "wow: failed to swap to normal fw\n"); 772 goto out; 773 } 774 775 ret = rtw89_wow_swap_fw(rtwdev, false); 776 if (ret) { 777 rtw89_err(rtwdev, "wow: failed to disable trx_post\n"); 778 goto out; 779 } 780 781 ret = rtw89_wow_disable_trx_post(rtwdev); 782 if (ret) { 783 rtw89_err(rtwdev, "wow: failed to disable trx_pre\n"); 784 goto out; 785 } 786 787 out: 788 clear_bit(RTW89_FLAG_WOWLAN, rtwdev->flags); 789 return ret; 790 } 791 792 int rtw89_wow_resume(struct rtw89_dev *rtwdev) 793 { 794 int ret; 795 796 if (!test_bit(RTW89_FLAG_WOWLAN, rtwdev->flags)) { 797 rtw89_err(rtwdev, "wow is not enabled\n"); 798 ret = -EPERM; 799 goto out; 800 } 801 802 if (!rtw89_mac_get_power_state(rtwdev)) { 803 rtw89_err(rtwdev, "chip is no power when resume\n"); 804 ret = -EPERM; 805 goto out; 806 } 807 808 rtw89_wow_leave_deep_ps(rtwdev); 809 810 rtw89_wow_show_wakeup_reason(rtwdev); 811 812 ret = rtw89_wow_disable(rtwdev); 813 if (ret) 814 rtw89_err(rtwdev, "failed to disable wow\n"); 815 816 out: 817 rtw89_wow_clear_wakeups(rtwdev); 818 return ret; 819 } 820 821 int rtw89_wow_suspend(struct rtw89_dev *rtwdev, struct cfg80211_wowlan *wowlan) 822 { 823 int ret; 824 825 ret = rtw89_wow_set_wakeups(rtwdev, wowlan); 826 if (ret) { 827 rtw89_err(rtwdev, "failed to set wakeup event\n"); 828 return ret; 829 } 830 831 rtw89_wow_leave_lps(rtwdev); 832 833 ret = rtw89_wow_enable(rtwdev); 834 if (ret) { 835 rtw89_err(rtwdev, "failed to enable wow\n"); 836 return ret; 837 } 838 839 rtw89_wow_enter_deep_ps(rtwdev); 840 841 return 0; 842 } 843