1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause 2 /* Copyright(c) 2019-2022 Realtek Corporation 3 */ 4 5 #include "core.h" 6 #include "mac.h" 7 #include "reg.h" 8 9 static const struct rtw89_dle_mem rtw8852b_dle_mem_pcie[] = { 10 [RTW89_QTA_SCC] = {RTW89_QTA_SCC, &rtw89_mac_size.wde_size6, 11 &rtw89_mac_size.ple_size6, &rtw89_mac_size.wde_qt6, 12 &rtw89_mac_size.wde_qt6, &rtw89_mac_size.ple_qt18, 13 &rtw89_mac_size.ple_qt58}, 14 [RTW89_QTA_DLFW] = {RTW89_QTA_DLFW, &rtw89_mac_size.wde_size9, 15 &rtw89_mac_size.ple_size8, &rtw89_mac_size.wde_qt4, 16 &rtw89_mac_size.wde_qt4, &rtw89_mac_size.ple_qt13, 17 &rtw89_mac_size.ple_qt13}, 18 [RTW89_QTA_INVALID] = {RTW89_QTA_INVALID, NULL, NULL, NULL, NULL, NULL, 19 NULL}, 20 }; 21 22 static int rtw8852b_mac_enable_bb_rf(struct rtw89_dev *rtwdev) 23 { 24 int ret; 25 26 rtw89_write8_set(rtwdev, R_AX_SYS_FUNC_EN, 27 B_AX_FEN_BBRSTB | B_AX_FEN_BB_GLB_RSTN); 28 rtw89_write32_mask(rtwdev, R_AX_SPS_DIG_ON_CTRL0, B_AX_REG_ZCDC_H_MASK, 0x1); 29 rtw89_write32_set(rtwdev, R_AX_WLRF_CTRL, B_AX_AFC_AFEDIG); 30 rtw89_write32_clr(rtwdev, R_AX_WLRF_CTRL, B_AX_AFC_AFEDIG); 31 rtw89_write32_set(rtwdev, R_AX_WLRF_CTRL, B_AX_AFC_AFEDIG); 32 33 ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_WL_RFC_S0, 0xC7, 34 FULL_BIT_MASK); 35 if (ret) 36 return ret; 37 38 ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_WL_RFC_S1, 0xC7, 39 FULL_BIT_MASK); 40 if (ret) 41 return ret; 42 43 rtw89_write8(rtwdev, R_AX_PHYREG_SET, PHYREG_SET_XYN_CYCLE); 44 45 return 0; 46 } 47 48 static int rtw8852b_mac_disable_bb_rf(struct rtw89_dev *rtwdev) 49 { 50 u8 wl_rfc_s0; 51 u8 wl_rfc_s1; 52 int ret; 53 54 rtw89_write8_clr(rtwdev, R_AX_SYS_FUNC_EN, 55 B_AX_FEN_BBRSTB | B_AX_FEN_BB_GLB_RSTN); 56 57 ret = rtw89_mac_read_xtal_si(rtwdev, XTAL_SI_WL_RFC_S0, &wl_rfc_s0); 58 if (ret) 59 return ret; 60 wl_rfc_s0 &= ~XTAL_SI_RF00S_EN; 61 ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_WL_RFC_S0, wl_rfc_s0, 62 FULL_BIT_MASK); 63 if (ret) 64 return ret; 65 66 ret = rtw89_mac_read_xtal_si(rtwdev, XTAL_SI_WL_RFC_S1, &wl_rfc_s1); 67 if (ret) 68 return ret; 69 wl_rfc_s1 &= ~XTAL_SI_RF10S_EN; 70 ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_WL_RFC_S1, wl_rfc_s1, 71 FULL_BIT_MASK); 72 return ret; 73 } 74 75 static const struct rtw89_chip_ops rtw8852b_chip_ops = { 76 .enable_bb_rf = rtw8852b_mac_enable_bb_rf, 77 .disable_bb_rf = rtw8852b_mac_disable_bb_rf, 78 }; 79 80 const struct rtw89_chip_info rtw8852b_chip_info = { 81 .chip_id = RTL8852B, 82 .fifo_size = 196608, 83 .dle_scc_rsvd_size = 98304, 84 .dle_mem = rtw8852b_dle_mem_pcie, 85 .dma_ch_mask = BIT(RTW89_DMA_ACH4) | BIT(RTW89_DMA_ACH5) | 86 BIT(RTW89_DMA_ACH6) | BIT(RTW89_DMA_ACH7) | 87 BIT(RTW89_DMA_B1MG) | BIT(RTW89_DMA_B1HI), 88 }; 89 EXPORT_SYMBOL(rtw8852b_chip_info); 90 91 MODULE_FIRMWARE("rtw89/rtw8852b_fw.bin"); 92 MODULE_AUTHOR("Realtek Corporation"); 93 MODULE_DESCRIPTION("Realtek 802.11ax wireless 8852B driver"); 94 MODULE_LICENSE("Dual BSD/GPL"); 95