1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause 2 /* Copyright(c) 2019-2020 Realtek Corporation 3 */ 4 5 #include "cam.h" 6 #include "chan.h" 7 #include "coex.h" 8 #include "debug.h" 9 #include "fw.h" 10 #include "mac.h" 11 #include "phy.h" 12 #include "reg.h" 13 14 static struct sk_buff *rtw89_fw_h2c_alloc_skb(struct rtw89_dev *rtwdev, u32 len, 15 bool header) 16 { 17 struct sk_buff *skb; 18 u32 header_len = 0; 19 u32 h2c_desc_size = rtwdev->chip->h2c_desc_size; 20 21 if (header) 22 header_len = H2C_HEADER_LEN; 23 24 skb = dev_alloc_skb(len + header_len + h2c_desc_size); 25 if (!skb) 26 return NULL; 27 skb_reserve(skb, header_len + h2c_desc_size); 28 memset(skb->data, 0, len); 29 30 return skb; 31 } 32 33 struct sk_buff *rtw89_fw_h2c_alloc_skb_with_hdr(struct rtw89_dev *rtwdev, u32 len) 34 { 35 return rtw89_fw_h2c_alloc_skb(rtwdev, len, true); 36 } 37 38 struct sk_buff *rtw89_fw_h2c_alloc_skb_no_hdr(struct rtw89_dev *rtwdev, u32 len) 39 { 40 return rtw89_fw_h2c_alloc_skb(rtwdev, len, false); 41 } 42 43 static u8 _fw_get_rdy(struct rtw89_dev *rtwdev) 44 { 45 u8 val = rtw89_read8(rtwdev, R_AX_WCPU_FW_CTRL); 46 47 return FIELD_GET(B_AX_WCPU_FWDL_STS_MASK, val); 48 } 49 50 #define FWDL_WAIT_CNT 400000 51 int rtw89_fw_check_rdy(struct rtw89_dev *rtwdev) 52 { 53 u8 val; 54 int ret; 55 56 ret = read_poll_timeout_atomic(_fw_get_rdy, val, 57 val == RTW89_FWDL_WCPU_FW_INIT_RDY, 58 1, FWDL_WAIT_CNT, false, rtwdev); 59 if (ret) { 60 switch (val) { 61 case RTW89_FWDL_CHECKSUM_FAIL: 62 rtw89_err(rtwdev, "fw checksum fail\n"); 63 return -EINVAL; 64 65 case RTW89_FWDL_SECURITY_FAIL: 66 rtw89_err(rtwdev, "fw security fail\n"); 67 return -EINVAL; 68 69 case RTW89_FWDL_CV_NOT_MATCH: 70 rtw89_err(rtwdev, "fw cv not match\n"); 71 return -EINVAL; 72 73 default: 74 return -EBUSY; 75 } 76 } 77 78 set_bit(RTW89_FLAG_FW_RDY, rtwdev->flags); 79 80 return 0; 81 } 82 83 static int rtw89_fw_hdr_parser(struct rtw89_dev *rtwdev, const u8 *fw, u32 len, 84 struct rtw89_fw_bin_info *info) 85 { 86 struct rtw89_fw_hdr_section_info *section_info; 87 const u8 *fw_end = fw + len; 88 const u8 *bin; 89 u32 i; 90 91 if (!info) 92 return -EINVAL; 93 94 info->section_num = GET_FW_HDR_SEC_NUM(fw); 95 info->hdr_len = RTW89_FW_HDR_SIZE + 96 info->section_num * RTW89_FW_SECTION_HDR_SIZE; 97 98 bin = fw + info->hdr_len; 99 100 /* jump to section header */ 101 fw += RTW89_FW_HDR_SIZE; 102 section_info = info->section_info; 103 for (i = 0; i < info->section_num; i++) { 104 section_info->len = GET_FWSECTION_HDR_SEC_SIZE(fw); 105 if (GET_FWSECTION_HDR_CHECKSUM(fw)) 106 section_info->len += FWDL_SECTION_CHKSUM_LEN; 107 section_info->redl = GET_FWSECTION_HDR_REDL(fw); 108 section_info->dladdr = 109 GET_FWSECTION_HDR_DL_ADDR(fw) & 0x1fffffff; 110 section_info->addr = bin; 111 bin += section_info->len; 112 fw += RTW89_FW_SECTION_HDR_SIZE; 113 section_info++; 114 } 115 116 if (fw_end != bin) { 117 rtw89_err(rtwdev, "[ERR]fw bin size\n"); 118 return -EINVAL; 119 } 120 121 return 0; 122 } 123 124 static 125 int rtw89_mfw_recognize(struct rtw89_dev *rtwdev, enum rtw89_fw_type type, 126 struct rtw89_fw_suit *fw_suit) 127 { 128 struct rtw89_fw_info *fw_info = &rtwdev->fw; 129 const u8 *mfw = fw_info->firmware->data; 130 u32 mfw_len = fw_info->firmware->size; 131 const struct rtw89_mfw_hdr *mfw_hdr = (const struct rtw89_mfw_hdr *)mfw; 132 const struct rtw89_mfw_info *mfw_info; 133 int i; 134 135 if (mfw_hdr->sig != RTW89_MFW_SIG) { 136 rtw89_debug(rtwdev, RTW89_DBG_FW, "use legacy firmware\n"); 137 /* legacy firmware support normal type only */ 138 if (type != RTW89_FW_NORMAL) 139 return -EINVAL; 140 fw_suit->data = mfw; 141 fw_suit->size = mfw_len; 142 return 0; 143 } 144 145 for (i = 0; i < mfw_hdr->fw_nr; i++) { 146 mfw_info = &mfw_hdr->info[i]; 147 if (mfw_info->cv != rtwdev->hal.cv || 148 mfw_info->type != type || 149 mfw_info->mp) 150 continue; 151 152 fw_suit->data = mfw + le32_to_cpu(mfw_info->shift); 153 fw_suit->size = le32_to_cpu(mfw_info->size); 154 return 0; 155 } 156 157 rtw89_err(rtwdev, "no suitable firmware found\n"); 158 return -ENOENT; 159 } 160 161 static void rtw89_fw_update_ver(struct rtw89_dev *rtwdev, 162 enum rtw89_fw_type type, 163 struct rtw89_fw_suit *fw_suit) 164 { 165 const u8 *hdr = fw_suit->data; 166 167 fw_suit->major_ver = GET_FW_HDR_MAJOR_VERSION(hdr); 168 fw_suit->minor_ver = GET_FW_HDR_MINOR_VERSION(hdr); 169 fw_suit->sub_ver = GET_FW_HDR_SUBVERSION(hdr); 170 fw_suit->sub_idex = GET_FW_HDR_SUBINDEX(hdr); 171 fw_suit->build_year = GET_FW_HDR_YEAR(hdr); 172 fw_suit->build_mon = GET_FW_HDR_MONTH(hdr); 173 fw_suit->build_date = GET_FW_HDR_DATE(hdr); 174 fw_suit->build_hour = GET_FW_HDR_HOUR(hdr); 175 fw_suit->build_min = GET_FW_HDR_MIN(hdr); 176 fw_suit->cmd_ver = GET_FW_HDR_CMD_VERSERION(hdr); 177 178 rtw89_info(rtwdev, 179 "Firmware version %u.%u.%u.%u, cmd version %u, type %u\n", 180 fw_suit->major_ver, fw_suit->minor_ver, fw_suit->sub_ver, 181 fw_suit->sub_idex, fw_suit->cmd_ver, type); 182 } 183 184 static 185 int __rtw89_fw_recognize(struct rtw89_dev *rtwdev, enum rtw89_fw_type type) 186 { 187 struct rtw89_fw_suit *fw_suit = rtw89_fw_suit_get(rtwdev, type); 188 int ret; 189 190 ret = rtw89_mfw_recognize(rtwdev, type, fw_suit); 191 if (ret) 192 return ret; 193 194 rtw89_fw_update_ver(rtwdev, type, fw_suit); 195 196 return 0; 197 } 198 199 #define __DEF_FW_FEAT_COND(__cond, __op) \ 200 static bool __fw_feat_cond_ ## __cond(u32 suit_ver_code, u32 comp_ver_code) \ 201 { \ 202 return suit_ver_code __op comp_ver_code; \ 203 } 204 205 __DEF_FW_FEAT_COND(ge, >=); /* greater or equal */ 206 __DEF_FW_FEAT_COND(le, <=); /* less or equal */ 207 208 struct __fw_feat_cfg { 209 enum rtw89_core_chip_id chip_id; 210 enum rtw89_fw_feature feature; 211 u32 ver_code; 212 bool (*cond)(u32 suit_ver_code, u32 comp_ver_code); 213 }; 214 215 #define __CFG_FW_FEAT(_chip, _cond, _maj, _min, _sub, _idx, _feat) \ 216 { \ 217 .chip_id = _chip, \ 218 .feature = RTW89_FW_FEATURE_ ## _feat, \ 219 .ver_code = RTW89_FW_VER_CODE(_maj, _min, _sub, _idx), \ 220 .cond = __fw_feat_cond_ ## _cond, \ 221 } 222 223 static const struct __fw_feat_cfg fw_feat_tbl[] = { 224 __CFG_FW_FEAT(RTL8852A, le, 0, 13, 29, 0, OLD_HT_RA_FORMAT), 225 __CFG_FW_FEAT(RTL8852A, ge, 0, 13, 35, 0, SCAN_OFFLOAD), 226 __CFG_FW_FEAT(RTL8852A, ge, 0, 13, 35, 0, TX_WAKE), 227 __CFG_FW_FEAT(RTL8852A, ge, 0, 13, 36, 0, CRASH_TRIGGER), 228 }; 229 230 static void rtw89_fw_recognize_features(struct rtw89_dev *rtwdev) 231 { 232 const struct rtw89_chip_info *chip = rtwdev->chip; 233 const struct __fw_feat_cfg *ent; 234 const struct rtw89_fw_suit *fw_suit; 235 u32 suit_ver_code; 236 int i; 237 238 fw_suit = rtw89_fw_suit_get(rtwdev, RTW89_FW_NORMAL); 239 suit_ver_code = RTW89_FW_SUIT_VER_CODE(fw_suit); 240 241 for (i = 0; i < ARRAY_SIZE(fw_feat_tbl); i++) { 242 ent = &fw_feat_tbl[i]; 243 if (chip->chip_id != ent->chip_id) 244 continue; 245 246 if (ent->cond(suit_ver_code, ent->ver_code)) 247 RTW89_SET_FW_FEATURE(ent->feature, &rtwdev->fw); 248 } 249 } 250 251 void rtw89_early_fw_feature_recognize(struct device *device, 252 const struct rtw89_chip_info *chip, 253 u32 *early_feat_map) 254 { 255 union { 256 struct rtw89_mfw_hdr mfw_hdr; 257 u8 fw_hdr[RTW89_FW_HDR_SIZE]; 258 } buf = {}; 259 const struct firmware *firmware; 260 u32 ver_code; 261 int ret; 262 int i; 263 264 ret = request_partial_firmware_into_buf(&firmware, chip->fw_name, 265 device, &buf, sizeof(buf), 0); 266 if (ret) { 267 dev_err(device, "failed to early request firmware: %d\n", ret); 268 goto out; 269 } 270 271 ver_code = buf.mfw_hdr.sig != RTW89_MFW_SIG ? 272 RTW89_FW_HDR_VER_CODE(&buf.fw_hdr) : 273 RTW89_MFW_HDR_VER_CODE(&buf.mfw_hdr); 274 if (!ver_code) 275 goto out; 276 277 for (i = 0; i < ARRAY_SIZE(fw_feat_tbl); i++) { 278 const struct __fw_feat_cfg *ent = &fw_feat_tbl[i]; 279 280 if (chip->chip_id != ent->chip_id) 281 continue; 282 283 if (ent->cond(ver_code, ent->ver_code)) 284 *early_feat_map |= BIT(ent->feature); 285 } 286 287 out: 288 release_firmware(firmware); 289 } 290 291 int rtw89_fw_recognize(struct rtw89_dev *rtwdev) 292 { 293 int ret; 294 295 ret = __rtw89_fw_recognize(rtwdev, RTW89_FW_NORMAL); 296 if (ret) 297 return ret; 298 299 /* It still works if wowlan firmware isn't existing. */ 300 __rtw89_fw_recognize(rtwdev, RTW89_FW_WOWLAN); 301 302 rtw89_fw_recognize_features(rtwdev); 303 304 return 0; 305 } 306 307 void rtw89_h2c_pkt_set_hdr(struct rtw89_dev *rtwdev, struct sk_buff *skb, 308 u8 type, u8 cat, u8 class, u8 func, 309 bool rack, bool dack, u32 len) 310 { 311 struct fwcmd_hdr *hdr; 312 313 hdr = (struct fwcmd_hdr *)skb_push(skb, 8); 314 315 if (!(rtwdev->fw.h2c_seq % 4)) 316 rack = true; 317 hdr->hdr0 = cpu_to_le32(FIELD_PREP(H2C_HDR_DEL_TYPE, type) | 318 FIELD_PREP(H2C_HDR_CAT, cat) | 319 FIELD_PREP(H2C_HDR_CLASS, class) | 320 FIELD_PREP(H2C_HDR_FUNC, func) | 321 FIELD_PREP(H2C_HDR_H2C_SEQ, rtwdev->fw.h2c_seq)); 322 323 hdr->hdr1 = cpu_to_le32(FIELD_PREP(H2C_HDR_TOTAL_LEN, 324 len + H2C_HEADER_LEN) | 325 (rack ? H2C_HDR_REC_ACK : 0) | 326 (dack ? H2C_HDR_DONE_ACK : 0)); 327 328 rtwdev->fw.h2c_seq++; 329 } 330 331 static void rtw89_h2c_pkt_set_hdr_fwdl(struct rtw89_dev *rtwdev, 332 struct sk_buff *skb, 333 u8 type, u8 cat, u8 class, u8 func, 334 u32 len) 335 { 336 struct fwcmd_hdr *hdr; 337 338 hdr = (struct fwcmd_hdr *)skb_push(skb, 8); 339 340 hdr->hdr0 = cpu_to_le32(FIELD_PREP(H2C_HDR_DEL_TYPE, type) | 341 FIELD_PREP(H2C_HDR_CAT, cat) | 342 FIELD_PREP(H2C_HDR_CLASS, class) | 343 FIELD_PREP(H2C_HDR_FUNC, func) | 344 FIELD_PREP(H2C_HDR_H2C_SEQ, rtwdev->fw.h2c_seq)); 345 346 hdr->hdr1 = cpu_to_le32(FIELD_PREP(H2C_HDR_TOTAL_LEN, 347 len + H2C_HEADER_LEN)); 348 } 349 350 static int __rtw89_fw_download_hdr(struct rtw89_dev *rtwdev, const u8 *fw, u32 len) 351 { 352 struct sk_buff *skb; 353 u32 ret = 0; 354 355 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, len); 356 if (!skb) { 357 rtw89_err(rtwdev, "failed to alloc skb for fw hdr dl\n"); 358 return -ENOMEM; 359 } 360 361 skb_put_data(skb, fw, len); 362 SET_FW_HDR_PART_SIZE(skb->data, FWDL_SECTION_PER_PKT_LEN); 363 rtw89_h2c_pkt_set_hdr_fwdl(rtwdev, skb, FWCMD_TYPE_H2C, 364 H2C_CAT_MAC, H2C_CL_MAC_FWDL, 365 H2C_FUNC_MAC_FWHDR_DL, len); 366 367 ret = rtw89_h2c_tx(rtwdev, skb, false); 368 if (ret) { 369 rtw89_err(rtwdev, "failed to send h2c\n"); 370 ret = -1; 371 goto fail; 372 } 373 374 return 0; 375 fail: 376 dev_kfree_skb_any(skb); 377 378 return ret; 379 } 380 381 static int rtw89_fw_download_hdr(struct rtw89_dev *rtwdev, const u8 *fw, u32 len) 382 { 383 u8 val; 384 int ret; 385 386 ret = __rtw89_fw_download_hdr(rtwdev, fw, len); 387 if (ret) { 388 rtw89_err(rtwdev, "[ERR]FW header download\n"); 389 return ret; 390 } 391 392 ret = read_poll_timeout_atomic(rtw89_read8, val, val & B_AX_FWDL_PATH_RDY, 393 1, FWDL_WAIT_CNT, false, 394 rtwdev, R_AX_WCPU_FW_CTRL); 395 if (ret) { 396 rtw89_err(rtwdev, "[ERR]FWDL path ready\n"); 397 return ret; 398 } 399 400 rtw89_write32(rtwdev, R_AX_HALT_H2C_CTRL, 0); 401 rtw89_write32(rtwdev, R_AX_HALT_C2H_CTRL, 0); 402 403 return 0; 404 } 405 406 static int __rtw89_fw_download_main(struct rtw89_dev *rtwdev, 407 struct rtw89_fw_hdr_section_info *info) 408 { 409 struct sk_buff *skb; 410 const u8 *section = info->addr; 411 u32 residue_len = info->len; 412 u32 pkt_len; 413 int ret; 414 415 while (residue_len) { 416 if (residue_len >= FWDL_SECTION_PER_PKT_LEN) 417 pkt_len = FWDL_SECTION_PER_PKT_LEN; 418 else 419 pkt_len = residue_len; 420 421 skb = rtw89_fw_h2c_alloc_skb_no_hdr(rtwdev, pkt_len); 422 if (!skb) { 423 rtw89_err(rtwdev, "failed to alloc skb for fw dl\n"); 424 return -ENOMEM; 425 } 426 skb_put_data(skb, section, pkt_len); 427 428 ret = rtw89_h2c_tx(rtwdev, skb, true); 429 if (ret) { 430 rtw89_err(rtwdev, "failed to send h2c\n"); 431 ret = -1; 432 goto fail; 433 } 434 435 section += pkt_len; 436 residue_len -= pkt_len; 437 } 438 439 return 0; 440 fail: 441 dev_kfree_skb_any(skb); 442 443 return ret; 444 } 445 446 static int rtw89_fw_download_main(struct rtw89_dev *rtwdev, const u8 *fw, 447 struct rtw89_fw_bin_info *info) 448 { 449 struct rtw89_fw_hdr_section_info *section_info = info->section_info; 450 u8 section_num = info->section_num; 451 int ret; 452 453 while (section_num--) { 454 ret = __rtw89_fw_download_main(rtwdev, section_info); 455 if (ret) 456 return ret; 457 section_info++; 458 } 459 460 mdelay(5); 461 462 ret = rtw89_fw_check_rdy(rtwdev); 463 if (ret) { 464 rtw89_warn(rtwdev, "download firmware fail\n"); 465 return ret; 466 } 467 468 return 0; 469 } 470 471 static void rtw89_fw_prog_cnt_dump(struct rtw89_dev *rtwdev) 472 { 473 u32 val32; 474 u16 index; 475 476 rtw89_write32(rtwdev, R_AX_DBG_CTRL, 477 FIELD_PREP(B_AX_DBG_SEL0, FW_PROG_CNTR_DBG_SEL) | 478 FIELD_PREP(B_AX_DBG_SEL1, FW_PROG_CNTR_DBG_SEL)); 479 rtw89_write32_mask(rtwdev, R_AX_SYS_STATUS1, B_AX_SEL_0XC0_MASK, MAC_DBG_SEL); 480 481 for (index = 0; index < 15; index++) { 482 val32 = rtw89_read32(rtwdev, R_AX_DBG_PORT_SEL); 483 rtw89_err(rtwdev, "[ERR]fw PC = 0x%x\n", val32); 484 fsleep(10); 485 } 486 } 487 488 static void rtw89_fw_dl_fail_dump(struct rtw89_dev *rtwdev) 489 { 490 u32 val32; 491 u16 val16; 492 493 val32 = rtw89_read32(rtwdev, R_AX_WCPU_FW_CTRL); 494 rtw89_err(rtwdev, "[ERR]fwdl 0x1E0 = 0x%x\n", val32); 495 496 val16 = rtw89_read16(rtwdev, R_AX_BOOT_DBG + 2); 497 rtw89_err(rtwdev, "[ERR]fwdl 0x83F2 = 0x%x\n", val16); 498 499 rtw89_fw_prog_cnt_dump(rtwdev); 500 } 501 502 int rtw89_fw_download(struct rtw89_dev *rtwdev, enum rtw89_fw_type type) 503 { 504 struct rtw89_fw_info *fw_info = &rtwdev->fw; 505 struct rtw89_fw_suit *fw_suit = rtw89_fw_suit_get(rtwdev, type); 506 struct rtw89_fw_bin_info info; 507 const u8 *fw = fw_suit->data; 508 u32 len = fw_suit->size; 509 u8 val; 510 int ret; 511 512 if (!fw || !len) { 513 rtw89_err(rtwdev, "fw type %d isn't recognized\n", type); 514 return -ENOENT; 515 } 516 517 ret = rtw89_fw_hdr_parser(rtwdev, fw, len, &info); 518 if (ret) { 519 rtw89_err(rtwdev, "parse fw header fail\n"); 520 goto fwdl_err; 521 } 522 523 ret = read_poll_timeout_atomic(rtw89_read8, val, val & B_AX_H2C_PATH_RDY, 524 1, FWDL_WAIT_CNT, false, 525 rtwdev, R_AX_WCPU_FW_CTRL); 526 if (ret) { 527 rtw89_err(rtwdev, "[ERR]H2C path ready\n"); 528 goto fwdl_err; 529 } 530 531 ret = rtw89_fw_download_hdr(rtwdev, fw, info.hdr_len); 532 if (ret) { 533 ret = -EBUSY; 534 goto fwdl_err; 535 } 536 537 ret = rtw89_fw_download_main(rtwdev, fw, &info); 538 if (ret) { 539 ret = -EBUSY; 540 goto fwdl_err; 541 } 542 543 fw_info->h2c_seq = 0; 544 fw_info->rec_seq = 0; 545 rtwdev->mac.rpwm_seq_num = RPWM_SEQ_NUM_MAX; 546 rtwdev->mac.cpwm_seq_num = CPWM_SEQ_NUM_MAX; 547 548 return ret; 549 550 fwdl_err: 551 rtw89_fw_dl_fail_dump(rtwdev); 552 return ret; 553 } 554 555 int rtw89_wait_firmware_completion(struct rtw89_dev *rtwdev) 556 { 557 struct rtw89_fw_info *fw = &rtwdev->fw; 558 559 wait_for_completion(&fw->completion); 560 if (!fw->firmware) 561 return -EINVAL; 562 563 return 0; 564 } 565 566 static void rtw89_load_firmware_cb(const struct firmware *firmware, void *context) 567 { 568 struct rtw89_fw_info *fw = context; 569 struct rtw89_dev *rtwdev = fw->rtwdev; 570 571 if (!firmware || !firmware->data) { 572 rtw89_err(rtwdev, "failed to request firmware\n"); 573 complete_all(&fw->completion); 574 return; 575 } 576 577 fw->firmware = firmware; 578 complete_all(&fw->completion); 579 } 580 581 int rtw89_load_firmware(struct rtw89_dev *rtwdev) 582 { 583 struct rtw89_fw_info *fw = &rtwdev->fw; 584 const char *fw_name = rtwdev->chip->fw_name; 585 int ret; 586 587 fw->rtwdev = rtwdev; 588 init_completion(&fw->completion); 589 590 ret = request_firmware_nowait(THIS_MODULE, true, fw_name, rtwdev->dev, 591 GFP_KERNEL, fw, rtw89_load_firmware_cb); 592 if (ret) { 593 rtw89_err(rtwdev, "failed to async firmware request\n"); 594 return ret; 595 } 596 597 return 0; 598 } 599 600 void rtw89_unload_firmware(struct rtw89_dev *rtwdev) 601 { 602 struct rtw89_fw_info *fw = &rtwdev->fw; 603 604 rtw89_wait_firmware_completion(rtwdev); 605 606 if (fw->firmware) 607 release_firmware(fw->firmware); 608 } 609 610 #define H2C_CAM_LEN 60 611 int rtw89_fw_h2c_cam(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif, 612 struct rtw89_sta *rtwsta, const u8 *scan_mac_addr) 613 { 614 struct sk_buff *skb; 615 616 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_CAM_LEN); 617 if (!skb) { 618 rtw89_err(rtwdev, "failed to alloc skb for fw dl\n"); 619 return -ENOMEM; 620 } 621 skb_put(skb, H2C_CAM_LEN); 622 rtw89_cam_fill_addr_cam_info(rtwdev, rtwvif, rtwsta, scan_mac_addr, skb->data); 623 rtw89_cam_fill_bssid_cam_info(rtwdev, rtwvif, rtwsta, skb->data); 624 625 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, 626 H2C_CAT_MAC, 627 H2C_CL_MAC_ADDR_CAM_UPDATE, 628 H2C_FUNC_MAC_ADDR_CAM_UPD, 0, 1, 629 H2C_CAM_LEN); 630 631 if (rtw89_h2c_tx(rtwdev, skb, false)) { 632 rtw89_err(rtwdev, "failed to send h2c\n"); 633 goto fail; 634 } 635 636 return 0; 637 fail: 638 dev_kfree_skb_any(skb); 639 640 return -EBUSY; 641 } 642 643 #define H2C_DCTL_SEC_CAM_LEN 68 644 int rtw89_fw_h2c_dctl_sec_cam_v1(struct rtw89_dev *rtwdev, 645 struct rtw89_vif *rtwvif, 646 struct rtw89_sta *rtwsta) 647 { 648 struct sk_buff *skb; 649 650 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_DCTL_SEC_CAM_LEN); 651 if (!skb) { 652 rtw89_err(rtwdev, "failed to alloc skb for dctl sec cam\n"); 653 return -ENOMEM; 654 } 655 skb_put(skb, H2C_DCTL_SEC_CAM_LEN); 656 657 rtw89_cam_fill_dctl_sec_cam_info_v1(rtwdev, rtwvif, rtwsta, skb->data); 658 659 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, 660 H2C_CAT_MAC, 661 H2C_CL_MAC_FR_EXCHG, 662 H2C_FUNC_MAC_DCTLINFO_UD_V1, 0, 0, 663 H2C_DCTL_SEC_CAM_LEN); 664 665 if (rtw89_h2c_tx(rtwdev, skb, false)) { 666 rtw89_err(rtwdev, "failed to send h2c\n"); 667 goto fail; 668 } 669 670 return 0; 671 fail: 672 dev_kfree_skb_any(skb); 673 674 return -EBUSY; 675 } 676 EXPORT_SYMBOL(rtw89_fw_h2c_dctl_sec_cam_v1); 677 678 #define H2C_BA_CAM_LEN 8 679 int rtw89_fw_h2c_ba_cam(struct rtw89_dev *rtwdev, struct rtw89_sta *rtwsta, 680 bool valid, struct ieee80211_ampdu_params *params) 681 { 682 const struct rtw89_chip_info *chip = rtwdev->chip; 683 struct rtw89_vif *rtwvif = rtwsta->rtwvif; 684 u8 macid = rtwsta->mac_id; 685 struct sk_buff *skb; 686 u8 entry_idx; 687 int ret; 688 689 ret = valid ? 690 rtw89_core_acquire_sta_ba_entry(rtwdev, rtwsta, params->tid, &entry_idx) : 691 rtw89_core_release_sta_ba_entry(rtwdev, rtwsta, params->tid, &entry_idx); 692 if (ret) { 693 /* it still works even if we don't have static BA CAM, because 694 * hardware can create dynamic BA CAM automatically. 695 */ 696 rtw89_debug(rtwdev, RTW89_DBG_TXRX, 697 "failed to %s entry tid=%d for h2c ba cam\n", 698 valid ? "alloc" : "free", params->tid); 699 return 0; 700 } 701 702 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_BA_CAM_LEN); 703 if (!skb) { 704 rtw89_err(rtwdev, "failed to alloc skb for h2c ba cam\n"); 705 return -ENOMEM; 706 } 707 skb_put(skb, H2C_BA_CAM_LEN); 708 SET_BA_CAM_MACID(skb->data, macid); 709 if (chip->bacam_v1) 710 SET_BA_CAM_ENTRY_IDX_V1(skb->data, entry_idx); 711 else 712 SET_BA_CAM_ENTRY_IDX(skb->data, entry_idx); 713 if (!valid) 714 goto end; 715 SET_BA_CAM_VALID(skb->data, valid); 716 SET_BA_CAM_TID(skb->data, params->tid); 717 if (params->buf_size > 64) 718 SET_BA_CAM_BMAP_SIZE(skb->data, 4); 719 else 720 SET_BA_CAM_BMAP_SIZE(skb->data, 0); 721 /* If init req is set, hw will set the ssn */ 722 SET_BA_CAM_INIT_REQ(skb->data, 1); 723 SET_BA_CAM_SSN(skb->data, params->ssn); 724 725 if (chip->bacam_v1) { 726 SET_BA_CAM_STD_EN(skb->data, 1); 727 SET_BA_CAM_BAND(skb->data, rtwvif->mac_idx); 728 } 729 730 end: 731 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, 732 H2C_CAT_MAC, 733 H2C_CL_BA_CAM, 734 H2C_FUNC_MAC_BA_CAM, 0, 1, 735 H2C_BA_CAM_LEN); 736 737 if (rtw89_h2c_tx(rtwdev, skb, false)) { 738 rtw89_err(rtwdev, "failed to send h2c\n"); 739 goto fail; 740 } 741 742 return 0; 743 fail: 744 dev_kfree_skb_any(skb); 745 746 return -EBUSY; 747 } 748 749 static int rtw89_fw_h2c_init_dynamic_ba_cam_v1(struct rtw89_dev *rtwdev, 750 u8 entry_idx, u8 uid) 751 { 752 struct sk_buff *skb; 753 754 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_BA_CAM_LEN); 755 if (!skb) { 756 rtw89_err(rtwdev, "failed to alloc skb for dynamic h2c ba cam\n"); 757 return -ENOMEM; 758 } 759 skb_put(skb, H2C_BA_CAM_LEN); 760 761 SET_BA_CAM_VALID(skb->data, 1); 762 SET_BA_CAM_ENTRY_IDX_V1(skb->data, entry_idx); 763 SET_BA_CAM_UID(skb->data, uid); 764 SET_BA_CAM_BAND(skb->data, 0); 765 SET_BA_CAM_STD_EN(skb->data, 0); 766 767 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, 768 H2C_CAT_MAC, 769 H2C_CL_BA_CAM, 770 H2C_FUNC_MAC_BA_CAM, 0, 1, 771 H2C_BA_CAM_LEN); 772 773 if (rtw89_h2c_tx(rtwdev, skb, false)) { 774 rtw89_err(rtwdev, "failed to send h2c\n"); 775 goto fail; 776 } 777 778 return 0; 779 fail: 780 dev_kfree_skb_any(skb); 781 782 return -EBUSY; 783 } 784 785 void rtw89_fw_h2c_init_ba_cam_v1(struct rtw89_dev *rtwdev) 786 { 787 const struct rtw89_chip_info *chip = rtwdev->chip; 788 u8 entry_idx = chip->bacam_num; 789 u8 uid = 0; 790 int i; 791 792 for (i = 0; i < chip->bacam_dynamic_num; i++) { 793 rtw89_fw_h2c_init_dynamic_ba_cam_v1(rtwdev, entry_idx, uid); 794 entry_idx++; 795 uid++; 796 } 797 } 798 799 #define H2C_LOG_CFG_LEN 12 800 int rtw89_fw_h2c_fw_log(struct rtw89_dev *rtwdev, bool enable) 801 { 802 struct sk_buff *skb; 803 u32 comp = enable ? BIT(RTW89_FW_LOG_COMP_INIT) | BIT(RTW89_FW_LOG_COMP_TASK) | 804 BIT(RTW89_FW_LOG_COMP_PS) | BIT(RTW89_FW_LOG_COMP_ERROR) : 0; 805 806 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_LOG_CFG_LEN); 807 if (!skb) { 808 rtw89_err(rtwdev, "failed to alloc skb for fw log cfg\n"); 809 return -ENOMEM; 810 } 811 812 skb_put(skb, H2C_LOG_CFG_LEN); 813 SET_LOG_CFG_LEVEL(skb->data, RTW89_FW_LOG_LEVEL_SER); 814 SET_LOG_CFG_PATH(skb->data, BIT(RTW89_FW_LOG_LEVEL_C2H)); 815 SET_LOG_CFG_COMP(skb->data, comp); 816 SET_LOG_CFG_COMP_EXT(skb->data, 0); 817 818 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, 819 H2C_CAT_MAC, 820 H2C_CL_FW_INFO, 821 H2C_FUNC_LOG_CFG, 0, 0, 822 H2C_LOG_CFG_LEN); 823 824 if (rtw89_h2c_tx(rtwdev, skb, false)) { 825 rtw89_err(rtwdev, "failed to send h2c\n"); 826 goto fail; 827 } 828 829 return 0; 830 fail: 831 dev_kfree_skb_any(skb); 832 833 return -EBUSY; 834 } 835 836 #define H2C_GENERAL_PKT_LEN 6 837 #define H2C_GENERAL_PKT_ID_UND 0xff 838 int rtw89_fw_h2c_general_pkt(struct rtw89_dev *rtwdev, u8 macid) 839 { 840 struct sk_buff *skb; 841 842 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_GENERAL_PKT_LEN); 843 if (!skb) { 844 rtw89_err(rtwdev, "failed to alloc skb for fw dl\n"); 845 return -ENOMEM; 846 } 847 skb_put(skb, H2C_GENERAL_PKT_LEN); 848 SET_GENERAL_PKT_MACID(skb->data, macid); 849 SET_GENERAL_PKT_PROBRSP_ID(skb->data, H2C_GENERAL_PKT_ID_UND); 850 SET_GENERAL_PKT_PSPOLL_ID(skb->data, H2C_GENERAL_PKT_ID_UND); 851 SET_GENERAL_PKT_NULL_ID(skb->data, H2C_GENERAL_PKT_ID_UND); 852 SET_GENERAL_PKT_QOS_NULL_ID(skb->data, H2C_GENERAL_PKT_ID_UND); 853 SET_GENERAL_PKT_CTS2SELF_ID(skb->data, H2C_GENERAL_PKT_ID_UND); 854 855 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, 856 H2C_CAT_MAC, 857 H2C_CL_FW_INFO, 858 H2C_FUNC_MAC_GENERAL_PKT, 0, 1, 859 H2C_GENERAL_PKT_LEN); 860 861 if (rtw89_h2c_tx(rtwdev, skb, false)) { 862 rtw89_err(rtwdev, "failed to send h2c\n"); 863 goto fail; 864 } 865 866 return 0; 867 fail: 868 dev_kfree_skb_any(skb); 869 870 return -EBUSY; 871 } 872 873 #define H2C_LPS_PARM_LEN 8 874 int rtw89_fw_h2c_lps_parm(struct rtw89_dev *rtwdev, 875 struct rtw89_lps_parm *lps_param) 876 { 877 struct sk_buff *skb; 878 879 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_LPS_PARM_LEN); 880 if (!skb) { 881 rtw89_err(rtwdev, "failed to alloc skb for fw dl\n"); 882 return -ENOMEM; 883 } 884 skb_put(skb, H2C_LPS_PARM_LEN); 885 886 SET_LPS_PARM_MACID(skb->data, lps_param->macid); 887 SET_LPS_PARM_PSMODE(skb->data, lps_param->psmode); 888 SET_LPS_PARM_LASTRPWM(skb->data, lps_param->lastrpwm); 889 SET_LPS_PARM_RLBM(skb->data, 1); 890 SET_LPS_PARM_SMARTPS(skb->data, 1); 891 SET_LPS_PARM_AWAKEINTERVAL(skb->data, 1); 892 SET_LPS_PARM_VOUAPSD(skb->data, 0); 893 SET_LPS_PARM_VIUAPSD(skb->data, 0); 894 SET_LPS_PARM_BEUAPSD(skb->data, 0); 895 SET_LPS_PARM_BKUAPSD(skb->data, 0); 896 897 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, 898 H2C_CAT_MAC, 899 H2C_CL_MAC_PS, 900 H2C_FUNC_MAC_LPS_PARM, 0, 1, 901 H2C_LPS_PARM_LEN); 902 903 if (rtw89_h2c_tx(rtwdev, skb, false)) { 904 rtw89_err(rtwdev, "failed to send h2c\n"); 905 goto fail; 906 } 907 908 return 0; 909 fail: 910 dev_kfree_skb_any(skb); 911 912 return -EBUSY; 913 } 914 915 #define H2C_CMC_TBL_LEN 68 916 int rtw89_fw_h2c_default_cmac_tbl(struct rtw89_dev *rtwdev, 917 struct rtw89_vif *rtwvif) 918 { 919 const struct rtw89_chip_info *chip = rtwdev->chip; 920 struct rtw89_hal *hal = &rtwdev->hal; 921 struct sk_buff *skb; 922 u8 ntx_path = hal->antenna_tx ? hal->antenna_tx : RF_B; 923 u8 map_b = hal->antenna_tx == RF_AB ? 1 : 0; 924 u8 macid = rtwvif->mac_id; 925 926 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_CMC_TBL_LEN); 927 if (!skb) { 928 rtw89_err(rtwdev, "failed to alloc skb for fw dl\n"); 929 return -ENOMEM; 930 } 931 skb_put(skb, H2C_CMC_TBL_LEN); 932 SET_CTRL_INFO_MACID(skb->data, macid); 933 SET_CTRL_INFO_OPERATION(skb->data, 1); 934 if (chip->h2c_cctl_func_id == H2C_FUNC_MAC_CCTLINFO_UD) { 935 SET_CMC_TBL_TXPWR_MODE(skb->data, 0); 936 SET_CMC_TBL_NTX_PATH_EN(skb->data, ntx_path); 937 SET_CMC_TBL_PATH_MAP_A(skb->data, 0); 938 SET_CMC_TBL_PATH_MAP_B(skb->data, map_b); 939 SET_CMC_TBL_PATH_MAP_C(skb->data, 0); 940 SET_CMC_TBL_PATH_MAP_D(skb->data, 0); 941 SET_CMC_TBL_ANTSEL_A(skb->data, 0); 942 SET_CMC_TBL_ANTSEL_B(skb->data, 0); 943 SET_CMC_TBL_ANTSEL_C(skb->data, 0); 944 SET_CMC_TBL_ANTSEL_D(skb->data, 0); 945 } 946 SET_CMC_TBL_DOPPLER_CTRL(skb->data, 0); 947 SET_CMC_TBL_TXPWR_TOLERENCE(skb->data, 0); 948 if (rtwvif->net_type == RTW89_NET_TYPE_AP_MODE) 949 SET_CMC_TBL_DATA_DCM(skb->data, 0); 950 951 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, 952 H2C_CAT_MAC, H2C_CL_MAC_FR_EXCHG, 953 chip->h2c_cctl_func_id, 0, 1, 954 H2C_CMC_TBL_LEN); 955 956 if (rtw89_h2c_tx(rtwdev, skb, false)) { 957 rtw89_err(rtwdev, "failed to send h2c\n"); 958 goto fail; 959 } 960 961 return 0; 962 fail: 963 dev_kfree_skb_any(skb); 964 965 return -EBUSY; 966 } 967 968 static void __get_sta_he_pkt_padding(struct rtw89_dev *rtwdev, 969 struct ieee80211_sta *sta, u8 *pads) 970 { 971 bool ppe_th; 972 u8 ppe16, ppe8; 973 u8 nss = min(sta->deflink.rx_nss, rtwdev->hal.tx_nss) - 1; 974 u8 ppe_thres_hdr = sta->deflink.he_cap.ppe_thres[0]; 975 u8 ru_bitmap; 976 u8 n, idx, sh; 977 u16 ppe; 978 int i; 979 980 if (!sta->deflink.he_cap.has_he) 981 return; 982 983 ppe_th = FIELD_GET(IEEE80211_HE_PHY_CAP6_PPE_THRESHOLD_PRESENT, 984 sta->deflink.he_cap.he_cap_elem.phy_cap_info[6]); 985 if (!ppe_th) { 986 u8 pad; 987 988 pad = FIELD_GET(IEEE80211_HE_PHY_CAP9_NOMINAL_PKT_PADDING_MASK, 989 sta->deflink.he_cap.he_cap_elem.phy_cap_info[9]); 990 991 for (i = 0; i < RTW89_PPE_BW_NUM; i++) 992 pads[i] = pad; 993 994 return; 995 } 996 997 ru_bitmap = FIELD_GET(IEEE80211_PPE_THRES_RU_INDEX_BITMASK_MASK, ppe_thres_hdr); 998 n = hweight8(ru_bitmap); 999 n = 7 + (n * IEEE80211_PPE_THRES_INFO_PPET_SIZE * 2) * nss; 1000 1001 for (i = 0; i < RTW89_PPE_BW_NUM; i++) { 1002 if (!(ru_bitmap & BIT(i))) { 1003 pads[i] = 1; 1004 continue; 1005 } 1006 1007 idx = n >> 3; 1008 sh = n & 7; 1009 n += IEEE80211_PPE_THRES_INFO_PPET_SIZE * 2; 1010 1011 ppe = le16_to_cpu(*((__le16 *)&sta->deflink.he_cap.ppe_thres[idx])); 1012 ppe16 = (ppe >> sh) & IEEE80211_PPE_THRES_NSS_MASK; 1013 sh += IEEE80211_PPE_THRES_INFO_PPET_SIZE; 1014 ppe8 = (ppe >> sh) & IEEE80211_PPE_THRES_NSS_MASK; 1015 1016 if (ppe16 != 7 && ppe8 == 7) 1017 pads[i] = 2; 1018 else if (ppe8 != 7) 1019 pads[i] = 1; 1020 else 1021 pads[i] = 0; 1022 } 1023 } 1024 1025 int rtw89_fw_h2c_assoc_cmac_tbl(struct rtw89_dev *rtwdev, 1026 struct ieee80211_vif *vif, 1027 struct ieee80211_sta *sta) 1028 { 1029 const struct rtw89_chip_info *chip = rtwdev->chip; 1030 struct rtw89_sta *rtwsta = sta_to_rtwsta_safe(sta); 1031 struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv; 1032 const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0); 1033 struct sk_buff *skb; 1034 u8 pads[RTW89_PPE_BW_NUM]; 1035 u8 mac_id = rtwsta ? rtwsta->mac_id : rtwvif->mac_id; 1036 1037 memset(pads, 0, sizeof(pads)); 1038 if (sta) 1039 __get_sta_he_pkt_padding(rtwdev, sta, pads); 1040 1041 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_CMC_TBL_LEN); 1042 if (!skb) { 1043 rtw89_err(rtwdev, "failed to alloc skb for fw dl\n"); 1044 return -ENOMEM; 1045 } 1046 skb_put(skb, H2C_CMC_TBL_LEN); 1047 SET_CTRL_INFO_MACID(skb->data, mac_id); 1048 SET_CTRL_INFO_OPERATION(skb->data, 1); 1049 SET_CMC_TBL_DISRTSFB(skb->data, 1); 1050 SET_CMC_TBL_DISDATAFB(skb->data, 1); 1051 if (chan->band_type == RTW89_BAND_2G) 1052 SET_CMC_TBL_RTS_RTY_LOWEST_RATE(skb->data, RTW89_HW_RATE_CCK1); 1053 else 1054 SET_CMC_TBL_RTS_RTY_LOWEST_RATE(skb->data, RTW89_HW_RATE_OFDM6); 1055 SET_CMC_TBL_RTS_TXCNT_LMT_SEL(skb->data, 0); 1056 SET_CMC_TBL_DATA_TXCNT_LMT_SEL(skb->data, 0); 1057 if (vif->type == NL80211_IFTYPE_STATION) 1058 SET_CMC_TBL_ULDL(skb->data, 1); 1059 else 1060 SET_CMC_TBL_ULDL(skb->data, 0); 1061 SET_CMC_TBL_MULTI_PORT_ID(skb->data, rtwvif->port); 1062 if (chip->h2c_cctl_func_id == H2C_FUNC_MAC_CCTLINFO_UD_V1) { 1063 SET_CMC_TBL_NOMINAL_PKT_PADDING_V1(skb->data, pads[RTW89_CHANNEL_WIDTH_20]); 1064 SET_CMC_TBL_NOMINAL_PKT_PADDING40_V1(skb->data, pads[RTW89_CHANNEL_WIDTH_40]); 1065 SET_CMC_TBL_NOMINAL_PKT_PADDING80_V1(skb->data, pads[RTW89_CHANNEL_WIDTH_80]); 1066 SET_CMC_TBL_NOMINAL_PKT_PADDING160_V1(skb->data, pads[RTW89_CHANNEL_WIDTH_160]); 1067 } else if (chip->h2c_cctl_func_id == H2C_FUNC_MAC_CCTLINFO_UD) { 1068 SET_CMC_TBL_NOMINAL_PKT_PADDING(skb->data, pads[RTW89_CHANNEL_WIDTH_20]); 1069 SET_CMC_TBL_NOMINAL_PKT_PADDING40(skb->data, pads[RTW89_CHANNEL_WIDTH_40]); 1070 SET_CMC_TBL_NOMINAL_PKT_PADDING80(skb->data, pads[RTW89_CHANNEL_WIDTH_80]); 1071 SET_CMC_TBL_NOMINAL_PKT_PADDING160(skb->data, pads[RTW89_CHANNEL_WIDTH_160]); 1072 } 1073 if (sta) 1074 SET_CMC_TBL_BSR_QUEUE_SIZE_FORMAT(skb->data, 1075 sta->deflink.he_cap.has_he); 1076 if (rtwvif->net_type == RTW89_NET_TYPE_AP_MODE) 1077 SET_CMC_TBL_DATA_DCM(skb->data, 0); 1078 1079 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, 1080 H2C_CAT_MAC, H2C_CL_MAC_FR_EXCHG, 1081 chip->h2c_cctl_func_id, 0, 1, 1082 H2C_CMC_TBL_LEN); 1083 1084 if (rtw89_h2c_tx(rtwdev, skb, false)) { 1085 rtw89_err(rtwdev, "failed to send h2c\n"); 1086 goto fail; 1087 } 1088 1089 return 0; 1090 fail: 1091 dev_kfree_skb_any(skb); 1092 1093 return -EBUSY; 1094 } 1095 1096 int rtw89_fw_h2c_txtime_cmac_tbl(struct rtw89_dev *rtwdev, 1097 struct rtw89_sta *rtwsta) 1098 { 1099 const struct rtw89_chip_info *chip = rtwdev->chip; 1100 struct sk_buff *skb; 1101 1102 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_CMC_TBL_LEN); 1103 if (!skb) { 1104 rtw89_err(rtwdev, "failed to alloc skb for fw dl\n"); 1105 return -ENOMEM; 1106 } 1107 skb_put(skb, H2C_CMC_TBL_LEN); 1108 SET_CTRL_INFO_MACID(skb->data, rtwsta->mac_id); 1109 SET_CTRL_INFO_OPERATION(skb->data, 1); 1110 if (rtwsta->cctl_tx_time) { 1111 SET_CMC_TBL_AMPDU_TIME_SEL(skb->data, 1); 1112 SET_CMC_TBL_AMPDU_MAX_TIME(skb->data, rtwsta->ampdu_max_time); 1113 } 1114 if (rtwsta->cctl_tx_retry_limit) { 1115 SET_CMC_TBL_DATA_TXCNT_LMT_SEL(skb->data, 1); 1116 SET_CMC_TBL_DATA_TX_CNT_LMT(skb->data, rtwsta->data_tx_cnt_lmt); 1117 } 1118 1119 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, 1120 H2C_CAT_MAC, H2C_CL_MAC_FR_EXCHG, 1121 chip->h2c_cctl_func_id, 0, 1, 1122 H2C_CMC_TBL_LEN); 1123 1124 if (rtw89_h2c_tx(rtwdev, skb, false)) { 1125 rtw89_err(rtwdev, "failed to send h2c\n"); 1126 goto fail; 1127 } 1128 1129 return 0; 1130 fail: 1131 dev_kfree_skb_any(skb); 1132 1133 return -EBUSY; 1134 } 1135 1136 #define H2C_BCN_BASE_LEN 12 1137 int rtw89_fw_h2c_update_beacon(struct rtw89_dev *rtwdev, 1138 struct rtw89_vif *rtwvif) 1139 { 1140 struct ieee80211_vif *vif = rtwvif_to_vif(rtwvif); 1141 const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0); 1142 struct sk_buff *skb; 1143 struct sk_buff *skb_beacon; 1144 u16 tim_offset; 1145 int bcn_total_len; 1146 1147 skb_beacon = ieee80211_beacon_get_tim(rtwdev->hw, vif, &tim_offset, 1148 NULL, 0); 1149 if (!skb_beacon) { 1150 rtw89_err(rtwdev, "failed to get beacon skb\n"); 1151 return -ENOMEM; 1152 } 1153 1154 bcn_total_len = H2C_BCN_BASE_LEN + skb_beacon->len; 1155 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, bcn_total_len); 1156 if (!skb) { 1157 rtw89_err(rtwdev, "failed to alloc skb for fw dl\n"); 1158 dev_kfree_skb_any(skb_beacon); 1159 return -ENOMEM; 1160 } 1161 skb_put(skb, H2C_BCN_BASE_LEN); 1162 1163 SET_BCN_UPD_PORT(skb->data, rtwvif->port); 1164 SET_BCN_UPD_MBSSID(skb->data, 0); 1165 SET_BCN_UPD_BAND(skb->data, rtwvif->mac_idx); 1166 SET_BCN_UPD_GRP_IE_OFST(skb->data, tim_offset); 1167 SET_BCN_UPD_MACID(skb->data, rtwvif->mac_id); 1168 SET_BCN_UPD_SSN_SEL(skb->data, RTW89_MGMT_HW_SSN_SEL); 1169 SET_BCN_UPD_SSN_MODE(skb->data, RTW89_MGMT_HW_SEQ_MODE); 1170 SET_BCN_UPD_RATE(skb->data, chan->band_type == RTW89_BAND_2G ? 1171 RTW89_HW_RATE_CCK1 : RTW89_HW_RATE_OFDM6); 1172 1173 skb_put_data(skb, skb_beacon->data, skb_beacon->len); 1174 dev_kfree_skb_any(skb_beacon); 1175 1176 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, 1177 H2C_CAT_MAC, H2C_CL_MAC_FR_EXCHG, 1178 H2C_FUNC_MAC_BCN_UPD, 0, 1, 1179 bcn_total_len); 1180 1181 if (rtw89_h2c_tx(rtwdev, skb, false)) { 1182 rtw89_err(rtwdev, "failed to send h2c\n"); 1183 dev_kfree_skb_any(skb); 1184 return -EBUSY; 1185 } 1186 1187 return 0; 1188 } 1189 1190 #define H2C_ROLE_MAINTAIN_LEN 4 1191 int rtw89_fw_h2c_role_maintain(struct rtw89_dev *rtwdev, 1192 struct rtw89_vif *rtwvif, 1193 struct rtw89_sta *rtwsta, 1194 enum rtw89_upd_mode upd_mode) 1195 { 1196 struct sk_buff *skb; 1197 u8 mac_id = rtwsta ? rtwsta->mac_id : rtwvif->mac_id; 1198 u8 self_role; 1199 1200 if (rtwvif->net_type == RTW89_NET_TYPE_AP_MODE) { 1201 if (rtwsta) 1202 self_role = RTW89_SELF_ROLE_AP_CLIENT; 1203 else 1204 self_role = rtwvif->self_role; 1205 } else { 1206 self_role = rtwvif->self_role; 1207 } 1208 1209 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_ROLE_MAINTAIN_LEN); 1210 if (!skb) { 1211 rtw89_err(rtwdev, "failed to alloc skb for h2c join\n"); 1212 return -ENOMEM; 1213 } 1214 skb_put(skb, H2C_ROLE_MAINTAIN_LEN); 1215 SET_FWROLE_MAINTAIN_MACID(skb->data, mac_id); 1216 SET_FWROLE_MAINTAIN_SELF_ROLE(skb->data, self_role); 1217 SET_FWROLE_MAINTAIN_UPD_MODE(skb->data, upd_mode); 1218 SET_FWROLE_MAINTAIN_WIFI_ROLE(skb->data, rtwvif->wifi_role); 1219 1220 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, 1221 H2C_CAT_MAC, H2C_CL_MAC_MEDIA_RPT, 1222 H2C_FUNC_MAC_FWROLE_MAINTAIN, 0, 1, 1223 H2C_ROLE_MAINTAIN_LEN); 1224 1225 if (rtw89_h2c_tx(rtwdev, skb, false)) { 1226 rtw89_err(rtwdev, "failed to send h2c\n"); 1227 goto fail; 1228 } 1229 1230 return 0; 1231 fail: 1232 dev_kfree_skb_any(skb); 1233 1234 return -EBUSY; 1235 } 1236 1237 #define H2C_JOIN_INFO_LEN 4 1238 int rtw89_fw_h2c_join_info(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif, 1239 struct rtw89_sta *rtwsta, bool dis_conn) 1240 { 1241 struct sk_buff *skb; 1242 u8 mac_id = rtwsta ? rtwsta->mac_id : rtwvif->mac_id; 1243 u8 self_role = rtwvif->self_role; 1244 u8 net_type = rtwvif->net_type; 1245 1246 if (net_type == RTW89_NET_TYPE_AP_MODE && rtwsta) { 1247 self_role = RTW89_SELF_ROLE_AP_CLIENT; 1248 net_type = dis_conn ? RTW89_NET_TYPE_NO_LINK : net_type; 1249 } 1250 1251 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_JOIN_INFO_LEN); 1252 if (!skb) { 1253 rtw89_err(rtwdev, "failed to alloc skb for h2c join\n"); 1254 return -ENOMEM; 1255 } 1256 skb_put(skb, H2C_JOIN_INFO_LEN); 1257 SET_JOININFO_MACID(skb->data, mac_id); 1258 SET_JOININFO_OP(skb->data, dis_conn); 1259 SET_JOININFO_BAND(skb->data, rtwvif->mac_idx); 1260 SET_JOININFO_WMM(skb->data, rtwvif->wmm); 1261 SET_JOININFO_TGR(skb->data, rtwvif->trigger); 1262 SET_JOININFO_ISHESTA(skb->data, 0); 1263 SET_JOININFO_DLBW(skb->data, 0); 1264 SET_JOININFO_TF_MAC_PAD(skb->data, 0); 1265 SET_JOININFO_DL_T_PE(skb->data, 0); 1266 SET_JOININFO_PORT_ID(skb->data, rtwvif->port); 1267 SET_JOININFO_NET_TYPE(skb->data, net_type); 1268 SET_JOININFO_WIFI_ROLE(skb->data, rtwvif->wifi_role); 1269 SET_JOININFO_SELF_ROLE(skb->data, self_role); 1270 1271 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, 1272 H2C_CAT_MAC, H2C_CL_MAC_MEDIA_RPT, 1273 H2C_FUNC_MAC_JOININFO, 0, 1, 1274 H2C_JOIN_INFO_LEN); 1275 1276 if (rtw89_h2c_tx(rtwdev, skb, false)) { 1277 rtw89_err(rtwdev, "failed to send h2c\n"); 1278 goto fail; 1279 } 1280 1281 return 0; 1282 fail: 1283 dev_kfree_skb_any(skb); 1284 1285 return -EBUSY; 1286 } 1287 1288 int rtw89_fw_h2c_macid_pause(struct rtw89_dev *rtwdev, u8 sh, u8 grp, 1289 bool pause) 1290 { 1291 struct rtw89_fw_macid_pause_grp h2c = {{0}}; 1292 u8 len = sizeof(struct rtw89_fw_macid_pause_grp); 1293 struct sk_buff *skb; 1294 1295 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_JOIN_INFO_LEN); 1296 if (!skb) { 1297 rtw89_err(rtwdev, "failed to alloc skb for h2c join\n"); 1298 return -ENOMEM; 1299 } 1300 h2c.mask_grp[grp] = cpu_to_le32(BIT(sh)); 1301 if (pause) 1302 h2c.pause_grp[grp] = cpu_to_le32(BIT(sh)); 1303 skb_put_data(skb, &h2c, len); 1304 1305 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, 1306 H2C_CAT_MAC, H2C_CL_MAC_FW_OFLD, 1307 H2C_FUNC_MAC_MACID_PAUSE, 1, 0, 1308 len); 1309 1310 if (rtw89_h2c_tx(rtwdev, skb, false)) { 1311 rtw89_err(rtwdev, "failed to send h2c\n"); 1312 goto fail; 1313 } 1314 1315 return 0; 1316 fail: 1317 dev_kfree_skb_any(skb); 1318 1319 return -EBUSY; 1320 } 1321 1322 #define H2C_EDCA_LEN 12 1323 int rtw89_fw_h2c_set_edca(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif, 1324 u8 ac, u32 val) 1325 { 1326 struct sk_buff *skb; 1327 1328 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_EDCA_LEN); 1329 if (!skb) { 1330 rtw89_err(rtwdev, "failed to alloc skb for h2c edca\n"); 1331 return -ENOMEM; 1332 } 1333 skb_put(skb, H2C_EDCA_LEN); 1334 RTW89_SET_EDCA_SEL(skb->data, 0); 1335 RTW89_SET_EDCA_BAND(skb->data, rtwvif->mac_idx); 1336 RTW89_SET_EDCA_WMM(skb->data, 0); 1337 RTW89_SET_EDCA_AC(skb->data, ac); 1338 RTW89_SET_EDCA_PARAM(skb->data, val); 1339 1340 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, 1341 H2C_CAT_MAC, H2C_CL_MAC_FW_OFLD, 1342 H2C_FUNC_USR_EDCA, 0, 1, 1343 H2C_EDCA_LEN); 1344 1345 if (rtw89_h2c_tx(rtwdev, skb, false)) { 1346 rtw89_err(rtwdev, "failed to send h2c\n"); 1347 goto fail; 1348 } 1349 1350 return 0; 1351 fail: 1352 dev_kfree_skb_any(skb); 1353 1354 return -EBUSY; 1355 } 1356 1357 #define H2C_OFLD_CFG_LEN 8 1358 int rtw89_fw_h2c_set_ofld_cfg(struct rtw89_dev *rtwdev) 1359 { 1360 static const u8 cfg[] = {0x09, 0x00, 0x00, 0x00, 0x5e, 0x00, 0x00, 0x00}; 1361 struct sk_buff *skb; 1362 1363 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_OFLD_CFG_LEN); 1364 if (!skb) { 1365 rtw89_err(rtwdev, "failed to alloc skb for h2c ofld\n"); 1366 return -ENOMEM; 1367 } 1368 skb_put_data(skb, cfg, H2C_OFLD_CFG_LEN); 1369 1370 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, 1371 H2C_CAT_MAC, H2C_CL_MAC_FW_OFLD, 1372 H2C_FUNC_OFLD_CFG, 0, 1, 1373 H2C_OFLD_CFG_LEN); 1374 1375 if (rtw89_h2c_tx(rtwdev, skb, false)) { 1376 rtw89_err(rtwdev, "failed to send h2c\n"); 1377 goto fail; 1378 } 1379 1380 return 0; 1381 fail: 1382 dev_kfree_skb_any(skb); 1383 1384 return -EBUSY; 1385 } 1386 1387 #define H2C_RA_LEN 16 1388 int rtw89_fw_h2c_ra(struct rtw89_dev *rtwdev, struct rtw89_ra_info *ra, bool csi) 1389 { 1390 struct sk_buff *skb; 1391 u8 *cmd; 1392 1393 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_RA_LEN); 1394 if (!skb) { 1395 rtw89_err(rtwdev, "failed to alloc skb for h2c join\n"); 1396 return -ENOMEM; 1397 } 1398 skb_put(skb, H2C_RA_LEN); 1399 cmd = skb->data; 1400 rtw89_debug(rtwdev, RTW89_DBG_RA, 1401 "ra cmd msk: %llx ", ra->ra_mask); 1402 1403 RTW89_SET_FWCMD_RA_MODE(cmd, ra->mode_ctrl); 1404 RTW89_SET_FWCMD_RA_BW_CAP(cmd, ra->bw_cap); 1405 RTW89_SET_FWCMD_RA_MACID(cmd, ra->macid); 1406 RTW89_SET_FWCMD_RA_DCM(cmd, ra->dcm_cap); 1407 RTW89_SET_FWCMD_RA_ER(cmd, ra->er_cap); 1408 RTW89_SET_FWCMD_RA_INIT_RATE_LV(cmd, ra->init_rate_lv); 1409 RTW89_SET_FWCMD_RA_UPD_ALL(cmd, ra->upd_all); 1410 RTW89_SET_FWCMD_RA_SGI(cmd, ra->en_sgi); 1411 RTW89_SET_FWCMD_RA_LDPC(cmd, ra->ldpc_cap); 1412 RTW89_SET_FWCMD_RA_STBC(cmd, ra->stbc_cap); 1413 RTW89_SET_FWCMD_RA_SS_NUM(cmd, ra->ss_num); 1414 RTW89_SET_FWCMD_RA_GILTF(cmd, ra->giltf); 1415 RTW89_SET_FWCMD_RA_UPD_BW_NSS_MASK(cmd, ra->upd_bw_nss_mask); 1416 RTW89_SET_FWCMD_RA_UPD_MASK(cmd, ra->upd_mask); 1417 RTW89_SET_FWCMD_RA_MASK_0(cmd, FIELD_GET(MASKBYTE0, ra->ra_mask)); 1418 RTW89_SET_FWCMD_RA_MASK_1(cmd, FIELD_GET(MASKBYTE1, ra->ra_mask)); 1419 RTW89_SET_FWCMD_RA_MASK_2(cmd, FIELD_GET(MASKBYTE2, ra->ra_mask)); 1420 RTW89_SET_FWCMD_RA_MASK_3(cmd, FIELD_GET(MASKBYTE3, ra->ra_mask)); 1421 RTW89_SET_FWCMD_RA_MASK_4(cmd, FIELD_GET(MASKBYTE4, ra->ra_mask)); 1422 1423 if (csi) { 1424 RTW89_SET_FWCMD_RA_BFEE_CSI_CTL(cmd, 1); 1425 RTW89_SET_FWCMD_RA_BAND_NUM(cmd, ra->band_num); 1426 RTW89_SET_FWCMD_RA_CR_TBL_SEL(cmd, ra->cr_tbl_sel); 1427 RTW89_SET_FWCMD_RA_FIXED_CSI_RATE_EN(cmd, ra->fixed_csi_rate_en); 1428 RTW89_SET_FWCMD_RA_RA_CSI_RATE_EN(cmd, ra->ra_csi_rate_en); 1429 RTW89_SET_FWCMD_RA_FIXED_CSI_MCS_SS_IDX(cmd, ra->csi_mcs_ss_idx); 1430 RTW89_SET_FWCMD_RA_FIXED_CSI_MODE(cmd, ra->csi_mode); 1431 RTW89_SET_FWCMD_RA_FIXED_CSI_GI_LTF(cmd, ra->csi_gi_ltf); 1432 RTW89_SET_FWCMD_RA_FIXED_CSI_BW(cmd, ra->csi_bw); 1433 } 1434 1435 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, 1436 H2C_CAT_OUTSRC, H2C_CL_OUTSRC_RA, 1437 H2C_FUNC_OUTSRC_RA_MACIDCFG, 0, 0, 1438 H2C_RA_LEN); 1439 1440 if (rtw89_h2c_tx(rtwdev, skb, false)) { 1441 rtw89_err(rtwdev, "failed to send h2c\n"); 1442 goto fail; 1443 } 1444 1445 return 0; 1446 fail: 1447 dev_kfree_skb_any(skb); 1448 1449 return -EBUSY; 1450 } 1451 1452 #define H2C_LEN_CXDRVHDR 2 1453 #define H2C_LEN_CXDRVINFO_INIT (12 + H2C_LEN_CXDRVHDR) 1454 int rtw89_fw_h2c_cxdrv_init(struct rtw89_dev *rtwdev) 1455 { 1456 struct rtw89_btc *btc = &rtwdev->btc; 1457 struct rtw89_btc_dm *dm = &btc->dm; 1458 struct rtw89_btc_init_info *init_info = &dm->init_info; 1459 struct rtw89_btc_module *module = &init_info->module; 1460 struct rtw89_btc_ant_info *ant = &module->ant; 1461 struct sk_buff *skb; 1462 u8 *cmd; 1463 1464 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_LEN_CXDRVINFO_INIT); 1465 if (!skb) { 1466 rtw89_err(rtwdev, "failed to alloc skb for h2c cxdrv_init\n"); 1467 return -ENOMEM; 1468 } 1469 skb_put(skb, H2C_LEN_CXDRVINFO_INIT); 1470 cmd = skb->data; 1471 1472 RTW89_SET_FWCMD_CXHDR_TYPE(cmd, CXDRVINFO_INIT); 1473 RTW89_SET_FWCMD_CXHDR_LEN(cmd, H2C_LEN_CXDRVINFO_INIT - H2C_LEN_CXDRVHDR); 1474 1475 RTW89_SET_FWCMD_CXINIT_ANT_TYPE(cmd, ant->type); 1476 RTW89_SET_FWCMD_CXINIT_ANT_NUM(cmd, ant->num); 1477 RTW89_SET_FWCMD_CXINIT_ANT_ISO(cmd, ant->isolation); 1478 RTW89_SET_FWCMD_CXINIT_ANT_POS(cmd, ant->single_pos); 1479 RTW89_SET_FWCMD_CXINIT_ANT_DIVERSITY(cmd, ant->diversity); 1480 1481 RTW89_SET_FWCMD_CXINIT_MOD_RFE(cmd, module->rfe_type); 1482 RTW89_SET_FWCMD_CXINIT_MOD_CV(cmd, module->cv); 1483 RTW89_SET_FWCMD_CXINIT_MOD_BT_SOLO(cmd, module->bt_solo); 1484 RTW89_SET_FWCMD_CXINIT_MOD_BT_POS(cmd, module->bt_pos); 1485 RTW89_SET_FWCMD_CXINIT_MOD_SW_TYPE(cmd, module->switch_type); 1486 1487 RTW89_SET_FWCMD_CXINIT_WL_GCH(cmd, init_info->wl_guard_ch); 1488 RTW89_SET_FWCMD_CXINIT_WL_ONLY(cmd, init_info->wl_only); 1489 RTW89_SET_FWCMD_CXINIT_WL_INITOK(cmd, init_info->wl_init_ok); 1490 RTW89_SET_FWCMD_CXINIT_DBCC_EN(cmd, init_info->dbcc_en); 1491 RTW89_SET_FWCMD_CXINIT_CX_OTHER(cmd, init_info->cx_other); 1492 RTW89_SET_FWCMD_CXINIT_BT_ONLY(cmd, init_info->bt_only); 1493 1494 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, 1495 H2C_CAT_OUTSRC, BTFC_SET, 1496 SET_DRV_INFO, 0, 0, 1497 H2C_LEN_CXDRVINFO_INIT); 1498 1499 if (rtw89_h2c_tx(rtwdev, skb, false)) { 1500 rtw89_err(rtwdev, "failed to send h2c\n"); 1501 goto fail; 1502 } 1503 1504 return 0; 1505 fail: 1506 dev_kfree_skb_any(skb); 1507 1508 return -EBUSY; 1509 } 1510 1511 #define PORT_DATA_OFFSET 4 1512 #define H2C_LEN_CXDRVINFO_ROLE_DBCC_LEN 12 1513 #define H2C_LEN_CXDRVINFO_ROLE (4 + 12 * RTW89_PORT_NUM + H2C_LEN_CXDRVHDR) 1514 #define H2C_LEN_CXDRVINFO_ROLE_V1 (4 + 16 * RTW89_PORT_NUM + \ 1515 H2C_LEN_CXDRVINFO_ROLE_DBCC_LEN + \ 1516 H2C_LEN_CXDRVHDR) 1517 int rtw89_fw_h2c_cxdrv_role(struct rtw89_dev *rtwdev) 1518 { 1519 struct rtw89_btc *btc = &rtwdev->btc; 1520 struct rtw89_btc_wl_info *wl = &btc->cx.wl; 1521 struct rtw89_btc_wl_role_info *role_info = &wl->role_info; 1522 struct rtw89_btc_wl_role_info_bpos *bpos = &role_info->role_map.role; 1523 struct rtw89_btc_wl_active_role *active = role_info->active_role; 1524 struct sk_buff *skb; 1525 u8 offset = 0; 1526 u8 *cmd; 1527 int i; 1528 1529 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_LEN_CXDRVINFO_ROLE); 1530 if (!skb) { 1531 rtw89_err(rtwdev, "failed to alloc skb for h2c cxdrv_role\n"); 1532 return -ENOMEM; 1533 } 1534 skb_put(skb, H2C_LEN_CXDRVINFO_ROLE); 1535 cmd = skb->data; 1536 1537 RTW89_SET_FWCMD_CXHDR_TYPE(cmd, CXDRVINFO_ROLE); 1538 RTW89_SET_FWCMD_CXHDR_LEN(cmd, H2C_LEN_CXDRVINFO_ROLE - H2C_LEN_CXDRVHDR); 1539 1540 RTW89_SET_FWCMD_CXROLE_CONNECT_CNT(cmd, role_info->connect_cnt); 1541 RTW89_SET_FWCMD_CXROLE_LINK_MODE(cmd, role_info->link_mode); 1542 1543 RTW89_SET_FWCMD_CXROLE_ROLE_NONE(cmd, bpos->none); 1544 RTW89_SET_FWCMD_CXROLE_ROLE_STA(cmd, bpos->station); 1545 RTW89_SET_FWCMD_CXROLE_ROLE_AP(cmd, bpos->ap); 1546 RTW89_SET_FWCMD_CXROLE_ROLE_VAP(cmd, bpos->vap); 1547 RTW89_SET_FWCMD_CXROLE_ROLE_ADHOC(cmd, bpos->adhoc); 1548 RTW89_SET_FWCMD_CXROLE_ROLE_ADHOC_MASTER(cmd, bpos->adhoc_master); 1549 RTW89_SET_FWCMD_CXROLE_ROLE_MESH(cmd, bpos->mesh); 1550 RTW89_SET_FWCMD_CXROLE_ROLE_MONITOR(cmd, bpos->moniter); 1551 RTW89_SET_FWCMD_CXROLE_ROLE_P2P_DEV(cmd, bpos->p2p_device); 1552 RTW89_SET_FWCMD_CXROLE_ROLE_P2P_GC(cmd, bpos->p2p_gc); 1553 RTW89_SET_FWCMD_CXROLE_ROLE_P2P_GO(cmd, bpos->p2p_go); 1554 RTW89_SET_FWCMD_CXROLE_ROLE_NAN(cmd, bpos->nan); 1555 1556 for (i = 0; i < RTW89_PORT_NUM; i++, active++) { 1557 RTW89_SET_FWCMD_CXROLE_ACT_CONNECTED(cmd, active->connected, i, offset); 1558 RTW89_SET_FWCMD_CXROLE_ACT_PID(cmd, active->pid, i, offset); 1559 RTW89_SET_FWCMD_CXROLE_ACT_PHY(cmd, active->phy, i, offset); 1560 RTW89_SET_FWCMD_CXROLE_ACT_NOA(cmd, active->noa, i, offset); 1561 RTW89_SET_FWCMD_CXROLE_ACT_BAND(cmd, active->band, i, offset); 1562 RTW89_SET_FWCMD_CXROLE_ACT_CLIENT_PS(cmd, active->client_ps, i, offset); 1563 RTW89_SET_FWCMD_CXROLE_ACT_BW(cmd, active->bw, i, offset); 1564 RTW89_SET_FWCMD_CXROLE_ACT_ROLE(cmd, active->role, i, offset); 1565 RTW89_SET_FWCMD_CXROLE_ACT_CH(cmd, active->ch, i, offset); 1566 RTW89_SET_FWCMD_CXROLE_ACT_TX_LVL(cmd, active->tx_lvl, i, offset); 1567 RTW89_SET_FWCMD_CXROLE_ACT_RX_LVL(cmd, active->rx_lvl, i, offset); 1568 RTW89_SET_FWCMD_CXROLE_ACT_TX_RATE(cmd, active->tx_rate, i, offset); 1569 RTW89_SET_FWCMD_CXROLE_ACT_RX_RATE(cmd, active->rx_rate, i, offset); 1570 } 1571 1572 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, 1573 H2C_CAT_OUTSRC, BTFC_SET, 1574 SET_DRV_INFO, 0, 0, 1575 H2C_LEN_CXDRVINFO_ROLE); 1576 1577 if (rtw89_h2c_tx(rtwdev, skb, false)) { 1578 rtw89_err(rtwdev, "failed to send h2c\n"); 1579 goto fail; 1580 } 1581 1582 return 0; 1583 fail: 1584 dev_kfree_skb_any(skb); 1585 1586 return -EBUSY; 1587 } 1588 1589 int rtw89_fw_h2c_cxdrv_role_v1(struct rtw89_dev *rtwdev) 1590 { 1591 struct rtw89_btc *btc = &rtwdev->btc; 1592 struct rtw89_btc_wl_info *wl = &btc->cx.wl; 1593 struct rtw89_btc_wl_role_info_v1 *role_info = &wl->role_info_v1; 1594 struct rtw89_btc_wl_role_info_bpos *bpos = &role_info->role_map.role; 1595 struct rtw89_btc_wl_active_role_v1 *active = role_info->active_role_v1; 1596 struct sk_buff *skb; 1597 u8 *cmd, offset; 1598 int i; 1599 1600 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_LEN_CXDRVINFO_ROLE_V1); 1601 if (!skb) { 1602 rtw89_err(rtwdev, "failed to alloc skb for h2c cxdrv_role\n"); 1603 return -ENOMEM; 1604 } 1605 skb_put(skb, H2C_LEN_CXDRVINFO_ROLE_V1); 1606 cmd = skb->data; 1607 1608 RTW89_SET_FWCMD_CXHDR_TYPE(cmd, CXDRVINFO_ROLE); 1609 RTW89_SET_FWCMD_CXHDR_LEN(cmd, H2C_LEN_CXDRVINFO_ROLE_V1 - H2C_LEN_CXDRVHDR); 1610 1611 RTW89_SET_FWCMD_CXROLE_CONNECT_CNT(cmd, role_info->connect_cnt); 1612 RTW89_SET_FWCMD_CXROLE_LINK_MODE(cmd, role_info->link_mode); 1613 1614 RTW89_SET_FWCMD_CXROLE_ROLE_NONE(cmd, bpos->none); 1615 RTW89_SET_FWCMD_CXROLE_ROLE_STA(cmd, bpos->station); 1616 RTW89_SET_FWCMD_CXROLE_ROLE_AP(cmd, bpos->ap); 1617 RTW89_SET_FWCMD_CXROLE_ROLE_VAP(cmd, bpos->vap); 1618 RTW89_SET_FWCMD_CXROLE_ROLE_ADHOC(cmd, bpos->adhoc); 1619 RTW89_SET_FWCMD_CXROLE_ROLE_ADHOC_MASTER(cmd, bpos->adhoc_master); 1620 RTW89_SET_FWCMD_CXROLE_ROLE_MESH(cmd, bpos->mesh); 1621 RTW89_SET_FWCMD_CXROLE_ROLE_MONITOR(cmd, bpos->moniter); 1622 RTW89_SET_FWCMD_CXROLE_ROLE_P2P_DEV(cmd, bpos->p2p_device); 1623 RTW89_SET_FWCMD_CXROLE_ROLE_P2P_GC(cmd, bpos->p2p_gc); 1624 RTW89_SET_FWCMD_CXROLE_ROLE_P2P_GO(cmd, bpos->p2p_go); 1625 RTW89_SET_FWCMD_CXROLE_ROLE_NAN(cmd, bpos->nan); 1626 1627 offset = PORT_DATA_OFFSET; 1628 for (i = 0; i < RTW89_PORT_NUM; i++, active++) { 1629 RTW89_SET_FWCMD_CXROLE_ACT_CONNECTED(cmd, active->connected, i, offset); 1630 RTW89_SET_FWCMD_CXROLE_ACT_PID(cmd, active->pid, i, offset); 1631 RTW89_SET_FWCMD_CXROLE_ACT_PHY(cmd, active->phy, i, offset); 1632 RTW89_SET_FWCMD_CXROLE_ACT_NOA(cmd, active->noa, i, offset); 1633 RTW89_SET_FWCMD_CXROLE_ACT_BAND(cmd, active->band, i, offset); 1634 RTW89_SET_FWCMD_CXROLE_ACT_CLIENT_PS(cmd, active->client_ps, i, offset); 1635 RTW89_SET_FWCMD_CXROLE_ACT_BW(cmd, active->bw, i, offset); 1636 RTW89_SET_FWCMD_CXROLE_ACT_ROLE(cmd, active->role, i, offset); 1637 RTW89_SET_FWCMD_CXROLE_ACT_CH(cmd, active->ch, i, offset); 1638 RTW89_SET_FWCMD_CXROLE_ACT_TX_LVL(cmd, active->tx_lvl, i, offset); 1639 RTW89_SET_FWCMD_CXROLE_ACT_RX_LVL(cmd, active->rx_lvl, i, offset); 1640 RTW89_SET_FWCMD_CXROLE_ACT_TX_RATE(cmd, active->tx_rate, i, offset); 1641 RTW89_SET_FWCMD_CXROLE_ACT_RX_RATE(cmd, active->rx_rate, i, offset); 1642 RTW89_SET_FWCMD_CXROLE_ACT_NOA_DUR(cmd, active->noa_duration, i, offset); 1643 } 1644 1645 offset = H2C_LEN_CXDRVINFO_ROLE_V1 - H2C_LEN_CXDRVINFO_ROLE_DBCC_LEN; 1646 RTW89_SET_FWCMD_CXROLE_MROLE_TYPE(cmd, role_info->mrole_type, offset); 1647 RTW89_SET_FWCMD_CXROLE_MROLE_NOA(cmd, role_info->mrole_noa_duration, offset); 1648 RTW89_SET_FWCMD_CXROLE_DBCC_EN(cmd, role_info->dbcc_en, offset); 1649 RTW89_SET_FWCMD_CXROLE_DBCC_CHG(cmd, role_info->dbcc_chg, offset); 1650 RTW89_SET_FWCMD_CXROLE_DBCC_2G_PHY(cmd, role_info->dbcc_2g_phy, offset); 1651 RTW89_SET_FWCMD_CXROLE_LINK_MODE_CHG(cmd, role_info->link_mode_chg, offset); 1652 1653 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, 1654 H2C_CAT_OUTSRC, BTFC_SET, 1655 SET_DRV_INFO, 0, 0, 1656 H2C_LEN_CXDRVINFO_ROLE_V1); 1657 1658 if (rtw89_h2c_tx(rtwdev, skb, false)) { 1659 rtw89_err(rtwdev, "failed to send h2c\n"); 1660 goto fail; 1661 } 1662 1663 return 0; 1664 fail: 1665 dev_kfree_skb_any(skb); 1666 1667 return -EBUSY; 1668 } 1669 1670 #define H2C_LEN_CXDRVINFO_CTRL (4 + H2C_LEN_CXDRVHDR) 1671 int rtw89_fw_h2c_cxdrv_ctrl(struct rtw89_dev *rtwdev) 1672 { 1673 struct rtw89_btc *btc = &rtwdev->btc; 1674 struct rtw89_btc_ctrl *ctrl = &btc->ctrl; 1675 struct sk_buff *skb; 1676 u8 *cmd; 1677 1678 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_LEN_CXDRVINFO_CTRL); 1679 if (!skb) { 1680 rtw89_err(rtwdev, "failed to alloc skb for h2c cxdrv_ctrl\n"); 1681 return -ENOMEM; 1682 } 1683 skb_put(skb, H2C_LEN_CXDRVINFO_CTRL); 1684 cmd = skb->data; 1685 1686 RTW89_SET_FWCMD_CXHDR_TYPE(cmd, CXDRVINFO_CTRL); 1687 RTW89_SET_FWCMD_CXHDR_LEN(cmd, H2C_LEN_CXDRVINFO_CTRL - H2C_LEN_CXDRVHDR); 1688 1689 RTW89_SET_FWCMD_CXCTRL_MANUAL(cmd, ctrl->manual); 1690 RTW89_SET_FWCMD_CXCTRL_IGNORE_BT(cmd, ctrl->igno_bt); 1691 RTW89_SET_FWCMD_CXCTRL_ALWAYS_FREERUN(cmd, ctrl->always_freerun); 1692 RTW89_SET_FWCMD_CXCTRL_TRACE_STEP(cmd, ctrl->trace_step); 1693 1694 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, 1695 H2C_CAT_OUTSRC, BTFC_SET, 1696 SET_DRV_INFO, 0, 0, 1697 H2C_LEN_CXDRVINFO_CTRL); 1698 1699 if (rtw89_h2c_tx(rtwdev, skb, false)) { 1700 rtw89_err(rtwdev, "failed to send h2c\n"); 1701 goto fail; 1702 } 1703 1704 return 0; 1705 fail: 1706 dev_kfree_skb_any(skb); 1707 1708 return -EBUSY; 1709 } 1710 1711 #define H2C_LEN_CXDRVINFO_RFK (4 + H2C_LEN_CXDRVHDR) 1712 int rtw89_fw_h2c_cxdrv_rfk(struct rtw89_dev *rtwdev) 1713 { 1714 struct rtw89_btc *btc = &rtwdev->btc; 1715 struct rtw89_btc_wl_info *wl = &btc->cx.wl; 1716 struct rtw89_btc_wl_rfk_info *rfk_info = &wl->rfk_info; 1717 struct sk_buff *skb; 1718 u8 *cmd; 1719 1720 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_LEN_CXDRVINFO_RFK); 1721 if (!skb) { 1722 rtw89_err(rtwdev, "failed to alloc skb for h2c cxdrv_ctrl\n"); 1723 return -ENOMEM; 1724 } 1725 skb_put(skb, H2C_LEN_CXDRVINFO_RFK); 1726 cmd = skb->data; 1727 1728 RTW89_SET_FWCMD_CXHDR_TYPE(cmd, CXDRVINFO_RFK); 1729 RTW89_SET_FWCMD_CXHDR_LEN(cmd, H2C_LEN_CXDRVINFO_RFK - H2C_LEN_CXDRVHDR); 1730 1731 RTW89_SET_FWCMD_CXRFK_STATE(cmd, rfk_info->state); 1732 RTW89_SET_FWCMD_CXRFK_PATH_MAP(cmd, rfk_info->path_map); 1733 RTW89_SET_FWCMD_CXRFK_PHY_MAP(cmd, rfk_info->phy_map); 1734 RTW89_SET_FWCMD_CXRFK_BAND(cmd, rfk_info->band); 1735 RTW89_SET_FWCMD_CXRFK_TYPE(cmd, rfk_info->type); 1736 1737 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, 1738 H2C_CAT_OUTSRC, BTFC_SET, 1739 SET_DRV_INFO, 0, 0, 1740 H2C_LEN_CXDRVINFO_RFK); 1741 1742 if (rtw89_h2c_tx(rtwdev, skb, false)) { 1743 rtw89_err(rtwdev, "failed to send h2c\n"); 1744 goto fail; 1745 } 1746 1747 return 0; 1748 fail: 1749 dev_kfree_skb_any(skb); 1750 1751 return -EBUSY; 1752 } 1753 1754 #define H2C_LEN_PKT_OFLD 4 1755 int rtw89_fw_h2c_del_pkt_offload(struct rtw89_dev *rtwdev, u8 id) 1756 { 1757 struct sk_buff *skb; 1758 u8 *cmd; 1759 1760 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_LEN_PKT_OFLD); 1761 if (!skb) { 1762 rtw89_err(rtwdev, "failed to alloc skb for h2c pkt offload\n"); 1763 return -ENOMEM; 1764 } 1765 skb_put(skb, H2C_LEN_PKT_OFLD); 1766 cmd = skb->data; 1767 1768 RTW89_SET_FWCMD_PACKET_OFLD_PKT_IDX(cmd, id); 1769 RTW89_SET_FWCMD_PACKET_OFLD_PKT_OP(cmd, RTW89_PKT_OFLD_OP_DEL); 1770 1771 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, 1772 H2C_CAT_MAC, H2C_CL_MAC_FW_OFLD, 1773 H2C_FUNC_PACKET_OFLD, 1, 1, 1774 H2C_LEN_PKT_OFLD); 1775 1776 if (rtw89_h2c_tx(rtwdev, skb, false)) { 1777 rtw89_err(rtwdev, "failed to send h2c\n"); 1778 goto fail; 1779 } 1780 1781 return 0; 1782 fail: 1783 dev_kfree_skb_any(skb); 1784 1785 return -EBUSY; 1786 } 1787 1788 int rtw89_fw_h2c_add_pkt_offload(struct rtw89_dev *rtwdev, u8 *id, 1789 struct sk_buff *skb_ofld) 1790 { 1791 struct sk_buff *skb; 1792 u8 *cmd; 1793 u8 alloc_id; 1794 1795 alloc_id = rtw89_core_acquire_bit_map(rtwdev->pkt_offload, 1796 RTW89_MAX_PKT_OFLD_NUM); 1797 if (alloc_id == RTW89_MAX_PKT_OFLD_NUM) 1798 return -ENOSPC; 1799 1800 *id = alloc_id; 1801 1802 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_LEN_PKT_OFLD + skb_ofld->len); 1803 if (!skb) { 1804 rtw89_err(rtwdev, "failed to alloc skb for h2c pkt offload\n"); 1805 return -ENOMEM; 1806 } 1807 skb_put(skb, H2C_LEN_PKT_OFLD); 1808 cmd = skb->data; 1809 1810 RTW89_SET_FWCMD_PACKET_OFLD_PKT_IDX(cmd, alloc_id); 1811 RTW89_SET_FWCMD_PACKET_OFLD_PKT_OP(cmd, RTW89_PKT_OFLD_OP_ADD); 1812 RTW89_SET_FWCMD_PACKET_OFLD_PKT_LENGTH(cmd, skb_ofld->len); 1813 skb_put_data(skb, skb_ofld->data, skb_ofld->len); 1814 1815 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, 1816 H2C_CAT_MAC, H2C_CL_MAC_FW_OFLD, 1817 H2C_FUNC_PACKET_OFLD, 1, 1, 1818 H2C_LEN_PKT_OFLD + skb_ofld->len); 1819 1820 if (rtw89_h2c_tx(rtwdev, skb, false)) { 1821 rtw89_err(rtwdev, "failed to send h2c\n"); 1822 goto fail; 1823 } 1824 1825 return 0; 1826 fail: 1827 dev_kfree_skb_any(skb); 1828 1829 return -EBUSY; 1830 } 1831 1832 #define H2C_LEN_SCAN_LIST_OFFLOAD 4 1833 int rtw89_fw_h2c_scan_list_offload(struct rtw89_dev *rtwdev, int len, 1834 struct list_head *chan_list) 1835 { 1836 struct rtw89_mac_chinfo *ch_info; 1837 struct sk_buff *skb; 1838 int skb_len = H2C_LEN_SCAN_LIST_OFFLOAD + len * RTW89_MAC_CHINFO_SIZE; 1839 u8 *cmd; 1840 1841 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, skb_len); 1842 if (!skb) { 1843 rtw89_err(rtwdev, "failed to alloc skb for h2c scan list\n"); 1844 return -ENOMEM; 1845 } 1846 skb_put(skb, H2C_LEN_SCAN_LIST_OFFLOAD); 1847 cmd = skb->data; 1848 1849 RTW89_SET_FWCMD_SCANOFLD_CH_NUM(cmd, len); 1850 /* in unit of 4 bytes */ 1851 RTW89_SET_FWCMD_SCANOFLD_CH_SIZE(cmd, RTW89_MAC_CHINFO_SIZE / 4); 1852 1853 list_for_each_entry(ch_info, chan_list, list) { 1854 cmd = skb_put(skb, RTW89_MAC_CHINFO_SIZE); 1855 1856 RTW89_SET_FWCMD_CHINFO_PERIOD(cmd, ch_info->period); 1857 RTW89_SET_FWCMD_CHINFO_DWELL(cmd, ch_info->dwell_time); 1858 RTW89_SET_FWCMD_CHINFO_CENTER_CH(cmd, ch_info->central_ch); 1859 RTW89_SET_FWCMD_CHINFO_PRI_CH(cmd, ch_info->pri_ch); 1860 RTW89_SET_FWCMD_CHINFO_BW(cmd, ch_info->bw); 1861 RTW89_SET_FWCMD_CHINFO_ACTION(cmd, ch_info->notify_action); 1862 RTW89_SET_FWCMD_CHINFO_NUM_PKT(cmd, ch_info->num_pkt); 1863 RTW89_SET_FWCMD_CHINFO_TX(cmd, ch_info->tx_pkt); 1864 RTW89_SET_FWCMD_CHINFO_PAUSE_DATA(cmd, ch_info->pause_data); 1865 RTW89_SET_FWCMD_CHINFO_BAND(cmd, ch_info->ch_band); 1866 RTW89_SET_FWCMD_CHINFO_PKT_ID(cmd, ch_info->probe_id); 1867 RTW89_SET_FWCMD_CHINFO_DFS(cmd, ch_info->dfs_ch); 1868 RTW89_SET_FWCMD_CHINFO_TX_NULL(cmd, ch_info->tx_null); 1869 RTW89_SET_FWCMD_CHINFO_RANDOM(cmd, ch_info->rand_seq_num); 1870 RTW89_SET_FWCMD_CHINFO_PKT0(cmd, ch_info->pkt_id[0]); 1871 RTW89_SET_FWCMD_CHINFO_PKT1(cmd, ch_info->pkt_id[1]); 1872 RTW89_SET_FWCMD_CHINFO_PKT2(cmd, ch_info->pkt_id[2]); 1873 RTW89_SET_FWCMD_CHINFO_PKT3(cmd, ch_info->pkt_id[3]); 1874 RTW89_SET_FWCMD_CHINFO_PKT4(cmd, ch_info->pkt_id[4]); 1875 RTW89_SET_FWCMD_CHINFO_PKT5(cmd, ch_info->pkt_id[5]); 1876 RTW89_SET_FWCMD_CHINFO_PKT6(cmd, ch_info->pkt_id[6]); 1877 RTW89_SET_FWCMD_CHINFO_PKT7(cmd, ch_info->pkt_id[7]); 1878 } 1879 1880 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, 1881 H2C_CAT_MAC, H2C_CL_MAC_FW_OFLD, 1882 H2C_FUNC_ADD_SCANOFLD_CH, 1, 1, skb_len); 1883 1884 if (rtw89_h2c_tx(rtwdev, skb, false)) { 1885 rtw89_err(rtwdev, "failed to send h2c\n"); 1886 goto fail; 1887 } 1888 1889 return 0; 1890 fail: 1891 dev_kfree_skb_any(skb); 1892 1893 return -EBUSY; 1894 } 1895 1896 #define H2C_LEN_SCAN_OFFLOAD 20 1897 int rtw89_fw_h2c_scan_offload(struct rtw89_dev *rtwdev, 1898 struct rtw89_scan_option *option, 1899 struct rtw89_vif *rtwvif) 1900 { 1901 struct rtw89_hw_scan_info *scan_info = &rtwdev->scan_info; 1902 struct sk_buff *skb; 1903 u8 *cmd; 1904 1905 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_LEN_SCAN_OFFLOAD); 1906 if (!skb) { 1907 rtw89_err(rtwdev, "failed to alloc skb for h2c scan offload\n"); 1908 return -ENOMEM; 1909 } 1910 skb_put(skb, H2C_LEN_SCAN_OFFLOAD); 1911 cmd = skb->data; 1912 1913 RTW89_SET_FWCMD_SCANOFLD_MACID(cmd, rtwvif->mac_id); 1914 RTW89_SET_FWCMD_SCANOFLD_PORT_ID(cmd, rtwvif->port); 1915 RTW89_SET_FWCMD_SCANOFLD_BAND(cmd, RTW89_PHY_0); 1916 RTW89_SET_FWCMD_SCANOFLD_OPERATION(cmd, option->enable); 1917 RTW89_SET_FWCMD_SCANOFLD_NOTIFY_END(cmd, true); 1918 RTW89_SET_FWCMD_SCANOFLD_TARGET_CH_MODE(cmd, option->target_ch_mode); 1919 RTW89_SET_FWCMD_SCANOFLD_START_MODE(cmd, RTW89_SCAN_IMMEDIATE); 1920 RTW89_SET_FWCMD_SCANOFLD_SCAN_TYPE(cmd, RTW89_SCAN_ONCE); 1921 if (option->target_ch_mode) { 1922 RTW89_SET_FWCMD_SCANOFLD_TARGET_CH_BW(cmd, scan_info->op_bw); 1923 RTW89_SET_FWCMD_SCANOFLD_TARGET_PRI_CH(cmd, 1924 scan_info->op_pri_ch); 1925 RTW89_SET_FWCMD_SCANOFLD_TARGET_CENTRAL_CH(cmd, 1926 scan_info->op_chan); 1927 } 1928 1929 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, 1930 H2C_CAT_MAC, H2C_CL_MAC_FW_OFLD, 1931 H2C_FUNC_SCANOFLD, 1, 1, 1932 H2C_LEN_SCAN_OFFLOAD); 1933 1934 if (rtw89_h2c_tx(rtwdev, skb, false)) { 1935 rtw89_err(rtwdev, "failed to send h2c\n"); 1936 goto fail; 1937 } 1938 1939 return 0; 1940 fail: 1941 dev_kfree_skb_any(skb); 1942 1943 return -EBUSY; 1944 } 1945 1946 int rtw89_fw_h2c_rf_reg(struct rtw89_dev *rtwdev, 1947 struct rtw89_fw_h2c_rf_reg_info *info, 1948 u16 len, u8 page) 1949 { 1950 struct sk_buff *skb; 1951 u8 class = info->rf_path == RF_PATH_A ? 1952 H2C_CL_OUTSRC_RF_REG_A : H2C_CL_OUTSRC_RF_REG_B; 1953 1954 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, len); 1955 if (!skb) { 1956 rtw89_err(rtwdev, "failed to alloc skb for h2c rf reg\n"); 1957 return -ENOMEM; 1958 } 1959 skb_put_data(skb, info->rtw89_phy_config_rf_h2c[page], len); 1960 1961 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, 1962 H2C_CAT_OUTSRC, class, page, 0, 0, 1963 len); 1964 1965 if (rtw89_h2c_tx(rtwdev, skb, false)) { 1966 rtw89_err(rtwdev, "failed to send h2c\n"); 1967 goto fail; 1968 } 1969 1970 return 0; 1971 fail: 1972 dev_kfree_skb_any(skb); 1973 1974 return -EBUSY; 1975 } 1976 1977 int rtw89_fw_h2c_rf_ntfy_mcc(struct rtw89_dev *rtwdev) 1978 { 1979 const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0); 1980 struct rtw89_mcc_info *mcc_info = &rtwdev->mcc; 1981 struct rtw89_fw_h2c_rf_get_mccch *mccch; 1982 struct sk_buff *skb; 1983 1984 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, sizeof(*mccch)); 1985 if (!skb) { 1986 rtw89_err(rtwdev, "failed to alloc skb for h2c cxdrv_ctrl\n"); 1987 return -ENOMEM; 1988 } 1989 skb_put(skb, sizeof(*mccch)); 1990 mccch = (struct rtw89_fw_h2c_rf_get_mccch *)skb->data; 1991 1992 mccch->ch_0 = cpu_to_le32(mcc_info->ch[0]); 1993 mccch->ch_1 = cpu_to_le32(mcc_info->ch[1]); 1994 mccch->band_0 = cpu_to_le32(mcc_info->band[0]); 1995 mccch->band_1 = cpu_to_le32(mcc_info->band[1]); 1996 mccch->current_channel = cpu_to_le32(chan->channel); 1997 mccch->current_band_type = cpu_to_le32(chan->band_type); 1998 1999 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, 2000 H2C_CAT_OUTSRC, H2C_CL_OUTSRC_RF_FW_NOTIFY, 2001 H2C_FUNC_OUTSRC_RF_GET_MCCCH, 0, 0, 2002 sizeof(*mccch)); 2003 2004 if (rtw89_h2c_tx(rtwdev, skb, false)) { 2005 rtw89_err(rtwdev, "failed to send h2c\n"); 2006 goto fail; 2007 } 2008 2009 return 0; 2010 fail: 2011 dev_kfree_skb_any(skb); 2012 2013 return -EBUSY; 2014 } 2015 EXPORT_SYMBOL(rtw89_fw_h2c_rf_ntfy_mcc); 2016 2017 int rtw89_fw_h2c_raw_with_hdr(struct rtw89_dev *rtwdev, 2018 u8 h2c_class, u8 h2c_func, u8 *buf, u16 len, 2019 bool rack, bool dack) 2020 { 2021 struct sk_buff *skb; 2022 2023 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, len); 2024 if (!skb) { 2025 rtw89_err(rtwdev, "failed to alloc skb for raw with hdr\n"); 2026 return -ENOMEM; 2027 } 2028 skb_put_data(skb, buf, len); 2029 2030 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, 2031 H2C_CAT_OUTSRC, h2c_class, h2c_func, rack, dack, 2032 len); 2033 2034 if (rtw89_h2c_tx(rtwdev, skb, false)) { 2035 rtw89_err(rtwdev, "failed to send h2c\n"); 2036 goto fail; 2037 } 2038 2039 return 0; 2040 fail: 2041 dev_kfree_skb_any(skb); 2042 2043 return -EBUSY; 2044 } 2045 2046 int rtw89_fw_h2c_raw(struct rtw89_dev *rtwdev, const u8 *buf, u16 len) 2047 { 2048 struct sk_buff *skb; 2049 2050 skb = rtw89_fw_h2c_alloc_skb_no_hdr(rtwdev, len); 2051 if (!skb) { 2052 rtw89_err(rtwdev, "failed to alloc skb for h2c raw\n"); 2053 return -ENOMEM; 2054 } 2055 skb_put_data(skb, buf, len); 2056 2057 if (rtw89_h2c_tx(rtwdev, skb, false)) { 2058 rtw89_err(rtwdev, "failed to send h2c\n"); 2059 goto fail; 2060 } 2061 2062 return 0; 2063 fail: 2064 dev_kfree_skb_any(skb); 2065 2066 return -EBUSY; 2067 } 2068 2069 void rtw89_fw_send_all_early_h2c(struct rtw89_dev *rtwdev) 2070 { 2071 struct rtw89_early_h2c *early_h2c; 2072 2073 lockdep_assert_held(&rtwdev->mutex); 2074 2075 list_for_each_entry(early_h2c, &rtwdev->early_h2c_list, list) { 2076 rtw89_fw_h2c_raw(rtwdev, early_h2c->h2c, early_h2c->h2c_len); 2077 } 2078 } 2079 2080 void rtw89_fw_free_all_early_h2c(struct rtw89_dev *rtwdev) 2081 { 2082 struct rtw89_early_h2c *early_h2c, *tmp; 2083 2084 mutex_lock(&rtwdev->mutex); 2085 list_for_each_entry_safe(early_h2c, tmp, &rtwdev->early_h2c_list, list) { 2086 list_del(&early_h2c->list); 2087 kfree(early_h2c->h2c); 2088 kfree(early_h2c); 2089 } 2090 mutex_unlock(&rtwdev->mutex); 2091 } 2092 2093 void rtw89_fw_c2h_irqsafe(struct rtw89_dev *rtwdev, struct sk_buff *c2h) 2094 { 2095 skb_queue_tail(&rtwdev->c2h_queue, c2h); 2096 ieee80211_queue_work(rtwdev->hw, &rtwdev->c2h_work); 2097 } 2098 2099 static void rtw89_fw_c2h_cmd_handle(struct rtw89_dev *rtwdev, 2100 struct sk_buff *skb) 2101 { 2102 u8 category = RTW89_GET_C2H_CATEGORY(skb->data); 2103 u8 class = RTW89_GET_C2H_CLASS(skb->data); 2104 u8 func = RTW89_GET_C2H_FUNC(skb->data); 2105 u16 len = RTW89_GET_C2H_LEN(skb->data); 2106 bool dump = true; 2107 2108 if (!test_bit(RTW89_FLAG_RUNNING, rtwdev->flags)) 2109 return; 2110 2111 switch (category) { 2112 case RTW89_C2H_CAT_TEST: 2113 break; 2114 case RTW89_C2H_CAT_MAC: 2115 rtw89_mac_c2h_handle(rtwdev, skb, len, class, func); 2116 if (class == RTW89_MAC_C2H_CLASS_INFO && 2117 func == RTW89_MAC_C2H_FUNC_C2H_LOG) 2118 dump = false; 2119 break; 2120 case RTW89_C2H_CAT_OUTSRC: 2121 if (class >= RTW89_PHY_C2H_CLASS_BTC_MIN && 2122 class <= RTW89_PHY_C2H_CLASS_BTC_MAX) 2123 rtw89_btc_c2h_handle(rtwdev, skb, len, class, func); 2124 else 2125 rtw89_phy_c2h_handle(rtwdev, skb, len, class, func); 2126 break; 2127 } 2128 2129 if (dump) 2130 rtw89_hex_dump(rtwdev, RTW89_DBG_FW, "C2H: ", skb->data, skb->len); 2131 } 2132 2133 void rtw89_fw_c2h_work(struct work_struct *work) 2134 { 2135 struct rtw89_dev *rtwdev = container_of(work, struct rtw89_dev, 2136 c2h_work); 2137 struct sk_buff *skb, *tmp; 2138 2139 skb_queue_walk_safe(&rtwdev->c2h_queue, skb, tmp) { 2140 skb_unlink(skb, &rtwdev->c2h_queue); 2141 mutex_lock(&rtwdev->mutex); 2142 rtw89_fw_c2h_cmd_handle(rtwdev, skb); 2143 mutex_unlock(&rtwdev->mutex); 2144 dev_kfree_skb_any(skb); 2145 } 2146 } 2147 2148 static int rtw89_fw_write_h2c_reg(struct rtw89_dev *rtwdev, 2149 struct rtw89_mac_h2c_info *info) 2150 { 2151 const struct rtw89_chip_info *chip = rtwdev->chip; 2152 const u32 *h2c_reg = chip->h2c_regs; 2153 u8 i, val, len; 2154 int ret; 2155 2156 ret = read_poll_timeout(rtw89_read8, val, val == 0, 1000, 5000, false, 2157 rtwdev, chip->h2c_ctrl_reg); 2158 if (ret) { 2159 rtw89_warn(rtwdev, "FW does not process h2c registers\n"); 2160 return ret; 2161 } 2162 2163 len = DIV_ROUND_UP(info->content_len + RTW89_H2CREG_HDR_LEN, 2164 sizeof(info->h2creg[0])); 2165 2166 RTW89_SET_H2CREG_HDR_FUNC(&info->h2creg[0], info->id); 2167 RTW89_SET_H2CREG_HDR_LEN(&info->h2creg[0], len); 2168 for (i = 0; i < RTW89_H2CREG_MAX; i++) 2169 rtw89_write32(rtwdev, h2c_reg[i], info->h2creg[i]); 2170 2171 rtw89_write8(rtwdev, chip->h2c_ctrl_reg, B_AX_H2CREG_TRIGGER); 2172 2173 return 0; 2174 } 2175 2176 static int rtw89_fw_read_c2h_reg(struct rtw89_dev *rtwdev, 2177 struct rtw89_mac_c2h_info *info) 2178 { 2179 const struct rtw89_chip_info *chip = rtwdev->chip; 2180 const u32 *c2h_reg = chip->c2h_regs; 2181 u32 ret; 2182 u8 i, val; 2183 2184 info->id = RTW89_FWCMD_C2HREG_FUNC_NULL; 2185 2186 ret = read_poll_timeout_atomic(rtw89_read8, val, val, 1, 2187 RTW89_C2H_TIMEOUT, false, rtwdev, 2188 chip->c2h_ctrl_reg); 2189 if (ret) { 2190 rtw89_warn(rtwdev, "c2h reg timeout\n"); 2191 return ret; 2192 } 2193 2194 for (i = 0; i < RTW89_C2HREG_MAX; i++) 2195 info->c2hreg[i] = rtw89_read32(rtwdev, c2h_reg[i]); 2196 2197 rtw89_write8(rtwdev, chip->c2h_ctrl_reg, 0); 2198 2199 info->id = RTW89_GET_C2H_HDR_FUNC(*info->c2hreg); 2200 info->content_len = (RTW89_GET_C2H_HDR_LEN(*info->c2hreg) << 2) - 2201 RTW89_C2HREG_HDR_LEN; 2202 2203 return 0; 2204 } 2205 2206 int rtw89_fw_msg_reg(struct rtw89_dev *rtwdev, 2207 struct rtw89_mac_h2c_info *h2c_info, 2208 struct rtw89_mac_c2h_info *c2h_info) 2209 { 2210 u32 ret; 2211 2212 if (h2c_info && h2c_info->id != RTW89_FWCMD_H2CREG_FUNC_GET_FEATURE) 2213 lockdep_assert_held(&rtwdev->mutex); 2214 2215 if (!h2c_info && !c2h_info) 2216 return -EINVAL; 2217 2218 if (!h2c_info) 2219 goto recv_c2h; 2220 2221 ret = rtw89_fw_write_h2c_reg(rtwdev, h2c_info); 2222 if (ret) 2223 return ret; 2224 2225 recv_c2h: 2226 if (!c2h_info) 2227 return 0; 2228 2229 ret = rtw89_fw_read_c2h_reg(rtwdev, c2h_info); 2230 if (ret) 2231 return ret; 2232 2233 return 0; 2234 } 2235 2236 void rtw89_fw_st_dbg_dump(struct rtw89_dev *rtwdev) 2237 { 2238 if (!test_bit(RTW89_FLAG_POWERON, rtwdev->flags)) { 2239 rtw89_err(rtwdev, "[ERR]pwr is off\n"); 2240 return; 2241 } 2242 2243 rtw89_info(rtwdev, "FW status = 0x%x\n", rtw89_read32(rtwdev, R_AX_UDM0)); 2244 rtw89_info(rtwdev, "FW BADADDR = 0x%x\n", rtw89_read32(rtwdev, R_AX_UDM1)); 2245 rtw89_info(rtwdev, "FW EPC/RA = 0x%x\n", rtw89_read32(rtwdev, R_AX_UDM2)); 2246 rtw89_info(rtwdev, "FW MISC = 0x%x\n", rtw89_read32(rtwdev, R_AX_UDM3)); 2247 rtw89_info(rtwdev, "R_AX_HALT_C2H = 0x%x\n", 2248 rtw89_read32(rtwdev, R_AX_HALT_C2H)); 2249 rtw89_info(rtwdev, "R_AX_SER_DBG_INFO = 0x%x\n", 2250 rtw89_read32(rtwdev, R_AX_SER_DBG_INFO)); 2251 2252 rtw89_fw_prog_cnt_dump(rtwdev); 2253 } 2254 2255 static void rtw89_release_pkt_list(struct rtw89_dev *rtwdev) 2256 { 2257 struct list_head *pkt_list = rtwdev->scan_info.pkt_list; 2258 struct rtw89_pktofld_info *info, *tmp; 2259 u8 idx; 2260 2261 for (idx = NL80211_BAND_2GHZ; idx < NUM_NL80211_BANDS; idx++) { 2262 if (!(rtwdev->chip->support_bands & BIT(idx))) 2263 continue; 2264 2265 list_for_each_entry_safe(info, tmp, &pkt_list[idx], list) { 2266 rtw89_fw_h2c_del_pkt_offload(rtwdev, info->id); 2267 rtw89_core_release_bit_map(rtwdev->pkt_offload, 2268 info->id); 2269 list_del(&info->list); 2270 kfree(info); 2271 } 2272 } 2273 } 2274 2275 static int rtw89_append_probe_req_ie(struct rtw89_dev *rtwdev, 2276 struct rtw89_vif *rtwvif, 2277 struct sk_buff *skb) 2278 { 2279 struct rtw89_hw_scan_info *scan_info = &rtwdev->scan_info; 2280 struct ieee80211_scan_ies *ies = rtwvif->scan_ies; 2281 struct rtw89_pktofld_info *info; 2282 struct sk_buff *new; 2283 int ret = 0; 2284 u8 band; 2285 2286 for (band = NL80211_BAND_2GHZ; band < NUM_NL80211_BANDS; band++) { 2287 if (!(rtwdev->chip->support_bands & BIT(band))) 2288 continue; 2289 2290 new = skb_copy(skb, GFP_KERNEL); 2291 if (!new) { 2292 ret = -ENOMEM; 2293 goto out; 2294 } 2295 skb_put_data(new, ies->ies[band], ies->len[band]); 2296 skb_put_data(new, ies->common_ies, ies->common_ie_len); 2297 2298 info = kzalloc(sizeof(*info), GFP_KERNEL); 2299 if (!info) { 2300 ret = -ENOMEM; 2301 kfree_skb(new); 2302 goto out; 2303 } 2304 2305 list_add_tail(&info->list, &scan_info->pkt_list[band]); 2306 ret = rtw89_fw_h2c_add_pkt_offload(rtwdev, &info->id, new); 2307 if (ret) 2308 goto out; 2309 2310 kfree_skb(new); 2311 } 2312 out: 2313 return ret; 2314 } 2315 2316 static int rtw89_hw_scan_update_probe_req(struct rtw89_dev *rtwdev, 2317 struct rtw89_vif *rtwvif) 2318 { 2319 struct cfg80211_scan_request *req = rtwvif->scan_req; 2320 struct sk_buff *skb; 2321 u8 num = req->n_ssids, i; 2322 int ret; 2323 2324 for (i = 0; i < num; i++) { 2325 skb = ieee80211_probereq_get(rtwdev->hw, rtwvif->mac_addr, 2326 req->ssids[i].ssid, 2327 req->ssids[i].ssid_len, 2328 req->ie_len); 2329 if (!skb) 2330 return -ENOMEM; 2331 2332 ret = rtw89_append_probe_req_ie(rtwdev, rtwvif, skb); 2333 kfree_skb(skb); 2334 2335 if (ret) 2336 return ret; 2337 } 2338 2339 return 0; 2340 } 2341 2342 static void rtw89_hw_scan_add_chan(struct rtw89_dev *rtwdev, int chan_type, 2343 int ssid_num, 2344 struct rtw89_mac_chinfo *ch_info) 2345 { 2346 struct rtw89_hw_scan_info *scan_info = &rtwdev->scan_info; 2347 struct rtw89_pktofld_info *info; 2348 u8 band, probe_count = 0; 2349 2350 ch_info->notify_action = RTW89_SCANOFLD_DEBUG_MASK; 2351 ch_info->dfs_ch = chan_type == RTW89_CHAN_DFS; 2352 ch_info->bw = RTW89_SCAN_WIDTH; 2353 ch_info->tx_pkt = true; 2354 ch_info->cfg_tx_pwr = false; 2355 ch_info->tx_pwr_idx = 0; 2356 ch_info->tx_null = false; 2357 ch_info->pause_data = false; 2358 2359 if (ssid_num) { 2360 ch_info->num_pkt = ssid_num; 2361 band = ch_info->ch_band; 2362 2363 list_for_each_entry(info, &scan_info->pkt_list[band], list) { 2364 ch_info->probe_id = info->id; 2365 ch_info->pkt_id[probe_count] = info->id; 2366 if (++probe_count >= ssid_num) 2367 break; 2368 } 2369 if (probe_count != ssid_num) 2370 rtw89_err(rtwdev, "SSID num differs from list len\n"); 2371 } 2372 2373 switch (chan_type) { 2374 case RTW89_CHAN_OPERATE: 2375 ch_info->probe_id = RTW89_SCANOFLD_PKT_NONE; 2376 ch_info->central_ch = scan_info->op_chan; 2377 ch_info->pri_ch = scan_info->op_pri_ch; 2378 ch_info->ch_band = scan_info->op_band; 2379 ch_info->bw = scan_info->op_bw; 2380 ch_info->tx_null = true; 2381 ch_info->num_pkt = 0; 2382 break; 2383 case RTW89_CHAN_DFS: 2384 ch_info->period = max_t(u8, ch_info->period, 2385 RTW89_DFS_CHAN_TIME); 2386 ch_info->dwell_time = RTW89_DWELL_TIME; 2387 break; 2388 case RTW89_CHAN_ACTIVE: 2389 break; 2390 default: 2391 rtw89_err(rtwdev, "Channel type out of bound\n"); 2392 } 2393 } 2394 2395 static int rtw89_hw_scan_add_chan_list(struct rtw89_dev *rtwdev, 2396 struct rtw89_vif *rtwvif) 2397 { 2398 struct cfg80211_scan_request *req = rtwvif->scan_req; 2399 struct rtw89_mac_chinfo *ch_info, *tmp; 2400 struct ieee80211_channel *channel; 2401 struct list_head chan_list; 2402 bool random_seq = req->flags & NL80211_SCAN_FLAG_RANDOM_SN; 2403 int list_len = req->n_channels, off_chan_time = 0; 2404 enum rtw89_chan_type type; 2405 int ret = 0, i; 2406 2407 INIT_LIST_HEAD(&chan_list); 2408 for (i = 0; i < req->n_channels; i++) { 2409 channel = req->channels[i]; 2410 ch_info = kzalloc(sizeof(*ch_info), GFP_KERNEL); 2411 if (!ch_info) { 2412 ret = -ENOMEM; 2413 goto out; 2414 } 2415 2416 ch_info->period = req->duration_mandatory ? 2417 req->duration : RTW89_CHANNEL_TIME; 2418 ch_info->ch_band = channel->band; 2419 ch_info->central_ch = channel->hw_value; 2420 ch_info->pri_ch = channel->hw_value; 2421 ch_info->rand_seq_num = random_seq; 2422 2423 if (channel->flags & 2424 (IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IR)) 2425 type = RTW89_CHAN_DFS; 2426 else 2427 type = RTW89_CHAN_ACTIVE; 2428 rtw89_hw_scan_add_chan(rtwdev, type, req->n_ssids, ch_info); 2429 2430 if (rtwvif->net_type != RTW89_NET_TYPE_NO_LINK && 2431 off_chan_time + ch_info->period > RTW89_OFF_CHAN_TIME) { 2432 tmp = kzalloc(sizeof(*tmp), GFP_KERNEL); 2433 if (!tmp) { 2434 ret = -ENOMEM; 2435 kfree(ch_info); 2436 goto out; 2437 } 2438 2439 type = RTW89_CHAN_OPERATE; 2440 tmp->period = req->duration_mandatory ? 2441 req->duration : RTW89_CHANNEL_TIME; 2442 rtw89_hw_scan_add_chan(rtwdev, type, 0, tmp); 2443 list_add_tail(&tmp->list, &chan_list); 2444 off_chan_time = 0; 2445 list_len++; 2446 } 2447 list_add_tail(&ch_info->list, &chan_list); 2448 off_chan_time += ch_info->period; 2449 } 2450 ret = rtw89_fw_h2c_scan_list_offload(rtwdev, list_len, &chan_list); 2451 2452 out: 2453 list_for_each_entry_safe(ch_info, tmp, &chan_list, list) { 2454 list_del(&ch_info->list); 2455 kfree(ch_info); 2456 } 2457 2458 return ret; 2459 } 2460 2461 static int rtw89_hw_scan_prehandle(struct rtw89_dev *rtwdev, 2462 struct rtw89_vif *rtwvif) 2463 { 2464 int ret; 2465 2466 ret = rtw89_hw_scan_update_probe_req(rtwdev, rtwvif); 2467 if (ret) { 2468 rtw89_err(rtwdev, "Update probe request failed\n"); 2469 goto out; 2470 } 2471 ret = rtw89_hw_scan_add_chan_list(rtwdev, rtwvif); 2472 out: 2473 return ret; 2474 } 2475 2476 void rtw89_hw_scan_start(struct rtw89_dev *rtwdev, struct ieee80211_vif *vif, 2477 struct ieee80211_scan_request *scan_req) 2478 { 2479 struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv; 2480 struct cfg80211_scan_request *req = &scan_req->req; 2481 u8 mac_addr[ETH_ALEN]; 2482 2483 rtwdev->scan_info.scanning_vif = vif; 2484 rtwvif->scan_ies = &scan_req->ies; 2485 rtwvif->scan_req = req; 2486 ieee80211_stop_queues(rtwdev->hw); 2487 2488 if (req->flags & NL80211_SCAN_FLAG_RANDOM_ADDR) 2489 get_random_mask_addr(mac_addr, req->mac_addr, 2490 req->mac_addr_mask); 2491 else 2492 ether_addr_copy(mac_addr, vif->addr); 2493 rtw89_core_scan_start(rtwdev, rtwvif, mac_addr, true); 2494 2495 rtwdev->hal.rx_fltr &= ~B_AX_A_BCN_CHK_EN; 2496 rtwdev->hal.rx_fltr &= ~B_AX_A_BC; 2497 rtwdev->hal.rx_fltr &= ~B_AX_A_A1_MATCH; 2498 rtw89_write32_mask(rtwdev, 2499 rtw89_mac_reg_by_idx(R_AX_RX_FLTR_OPT, RTW89_MAC_0), 2500 B_AX_RX_FLTR_CFG_MASK, 2501 rtwdev->hal.rx_fltr); 2502 } 2503 2504 void rtw89_hw_scan_complete(struct rtw89_dev *rtwdev, struct ieee80211_vif *vif, 2505 bool aborted) 2506 { 2507 struct cfg80211_scan_info info = { 2508 .aborted = aborted, 2509 }; 2510 struct rtw89_vif *rtwvif; 2511 2512 if (!vif) 2513 return; 2514 2515 rtwdev->hal.rx_fltr |= B_AX_A_BCN_CHK_EN; 2516 rtwdev->hal.rx_fltr |= B_AX_A_BC; 2517 rtwdev->hal.rx_fltr |= B_AX_A_A1_MATCH; 2518 rtw89_write32_mask(rtwdev, 2519 rtw89_mac_reg_by_idx(R_AX_RX_FLTR_OPT, RTW89_MAC_0), 2520 B_AX_RX_FLTR_CFG_MASK, 2521 rtwdev->hal.rx_fltr); 2522 2523 rtw89_core_scan_complete(rtwdev, vif, true); 2524 ieee80211_scan_completed(rtwdev->hw, &info); 2525 ieee80211_wake_queues(rtwdev->hw); 2526 2527 rtw89_release_pkt_list(rtwdev); 2528 rtwvif = (struct rtw89_vif *)vif->drv_priv; 2529 rtwvif->scan_req = NULL; 2530 rtwvif->scan_ies = NULL; 2531 rtwdev->scan_info.scanning_vif = NULL; 2532 2533 if (rtwvif->net_type != RTW89_NET_TYPE_NO_LINK) 2534 rtw89_store_op_chan(rtwdev, false); 2535 } 2536 2537 void rtw89_hw_scan_abort(struct rtw89_dev *rtwdev, struct ieee80211_vif *vif) 2538 { 2539 rtw89_hw_scan_offload(rtwdev, vif, false); 2540 rtw89_hw_scan_complete(rtwdev, vif, true); 2541 } 2542 2543 int rtw89_hw_scan_offload(struct rtw89_dev *rtwdev, struct ieee80211_vif *vif, 2544 bool enable) 2545 { 2546 struct rtw89_scan_option opt = {0}; 2547 struct rtw89_vif *rtwvif; 2548 int ret = 0; 2549 2550 rtwvif = vif ? (struct rtw89_vif *)vif->drv_priv : NULL; 2551 if (!rtwvif) 2552 return -EINVAL; 2553 2554 opt.enable = enable; 2555 opt.target_ch_mode = rtwvif->net_type != RTW89_NET_TYPE_NO_LINK; 2556 if (enable) { 2557 ret = rtw89_hw_scan_prehandle(rtwdev, rtwvif); 2558 if (ret) 2559 goto out; 2560 } 2561 ret = rtw89_fw_h2c_scan_offload(rtwdev, &opt, rtwvif); 2562 out: 2563 return ret; 2564 } 2565 2566 void rtw89_store_op_chan(struct rtw89_dev *rtwdev, bool backup) 2567 { 2568 struct rtw89_hw_scan_info *scan_info = &rtwdev->scan_info; 2569 const struct rtw89_chan *cur = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0); 2570 struct rtw89_chan new; 2571 2572 if (backup) { 2573 scan_info->op_pri_ch = cur->primary_channel; 2574 scan_info->op_chan = cur->channel; 2575 scan_info->op_bw = cur->band_width; 2576 scan_info->op_band = cur->band_type; 2577 } else { 2578 rtw89_chan_create(&new, scan_info->op_chan, scan_info->op_pri_ch, 2579 scan_info->op_band, scan_info->op_bw); 2580 rtw89_assign_entity_chan(rtwdev, RTW89_SUB_ENTITY_0, &new); 2581 } 2582 } 2583 2584 #define H2C_FW_CPU_EXCEPTION_LEN 4 2585 #define H2C_FW_CPU_EXCEPTION_TYPE_DEF 0x5566 2586 int rtw89_fw_h2c_trigger_cpu_exception(struct rtw89_dev *rtwdev) 2587 { 2588 struct sk_buff *skb; 2589 2590 skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_FW_CPU_EXCEPTION_LEN); 2591 if (!skb) { 2592 rtw89_err(rtwdev, 2593 "failed to alloc skb for fw cpu exception\n"); 2594 return -ENOMEM; 2595 } 2596 2597 skb_put(skb, H2C_FW_CPU_EXCEPTION_LEN); 2598 RTW89_SET_FWCMD_CPU_EXCEPTION_TYPE(skb->data, 2599 H2C_FW_CPU_EXCEPTION_TYPE_DEF); 2600 2601 rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, 2602 H2C_CAT_TEST, 2603 H2C_CL_FW_STATUS_TEST, 2604 H2C_FUNC_CPU_EXCEPTION, 0, 0, 2605 H2C_FW_CPU_EXCEPTION_LEN); 2606 2607 if (rtw89_h2c_tx(rtwdev, skb, false)) { 2608 rtw89_err(rtwdev, "failed to send h2c\n"); 2609 goto fail; 2610 } 2611 2612 return 0; 2613 2614 fail: 2615 dev_kfree_skb_any(skb); 2616 return -EBUSY; 2617 } 2618