1e3ec7017SPing-Ke Shih /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ 2e3ec7017SPing-Ke Shih /* Copyright(c) 2019-2020 Realtek Corporation 3e3ec7017SPing-Ke Shih */ 4e3ec7017SPing-Ke Shih 5e3ec7017SPing-Ke Shih #ifndef __RTW89_CORE_H__ 6e3ec7017SPing-Ke Shih #define __RTW89_CORE_H__ 7e3ec7017SPing-Ke Shih 8e3ec7017SPing-Ke Shih #include <linux/average.h> 9e3ec7017SPing-Ke Shih #include <linux/bitfield.h> 10e3ec7017SPing-Ke Shih #include <linux/firmware.h> 11e3ec7017SPing-Ke Shih #include <linux/iopoll.h> 12e3ec7017SPing-Ke Shih #include <linux/workqueue.h> 13e3ec7017SPing-Ke Shih #include <net/mac80211.h> 14e3ec7017SPing-Ke Shih 15e3ec7017SPing-Ke Shih struct rtw89_dev; 164a9e48acSPing-Ke Shih struct rtw89_pci_info; 17e3ec7017SPing-Ke Shih 18e3ec7017SPing-Ke Shih extern const struct ieee80211_ops rtw89_ops; 19e3ec7017SPing-Ke Shih 20e3ec7017SPing-Ke Shih #define MASKBYTE0 0xff 21e3ec7017SPing-Ke Shih #define MASKBYTE1 0xff00 22e3ec7017SPing-Ke Shih #define MASKBYTE2 0xff0000 23e3ec7017SPing-Ke Shih #define MASKBYTE3 0xff000000 24e3ec7017SPing-Ke Shih #define MASKBYTE4 0xff00000000ULL 25e3ec7017SPing-Ke Shih #define MASKHWORD 0xffff0000 26e3ec7017SPing-Ke Shih #define MASKLWORD 0x0000ffff 27e3ec7017SPing-Ke Shih #define MASKDWORD 0xffffffff 28e3ec7017SPing-Ke Shih #define RFREG_MASK 0xfffff 29e3ec7017SPing-Ke Shih #define INV_RF_DATA 0xffffffff 30e3ec7017SPing-Ke Shih 31e3ec7017SPing-Ke Shih #define RTW89_TRACK_WORK_PERIOD round_jiffies_relative(HZ * 2) 32e3ec7017SPing-Ke Shih #define CFO_TRACK_MAX_USER 64 33e3ec7017SPing-Ke Shih #define MAX_RSSI 110 34e3ec7017SPing-Ke Shih #define RSSI_FACTOR 1 35e3ec7017SPing-Ke Shih #define RTW89_RSSI_RAW_TO_DBM(rssi) ((s8)((rssi) >> RSSI_FACTOR) - MAX_RSSI) 36e3ec7017SPing-Ke Shih 37e3ec7017SPing-Ke Shih #define RTW89_HTC_MASK_VARIANT GENMASK(1, 0) 38e3ec7017SPing-Ke Shih #define RTW89_HTC_VARIANT_HE 3 39e3ec7017SPing-Ke Shih #define RTW89_HTC_MASK_CTL_ID GENMASK(5, 2) 40e3ec7017SPing-Ke Shih #define RTW89_HTC_VARIANT_HE_CID_OM 1 41e3ec7017SPing-Ke Shih #define RTW89_HTC_VARIANT_HE_CID_CAS 6 42e3ec7017SPing-Ke Shih #define RTW89_HTC_MASK_CTL_INFO GENMASK(31, 6) 43e3ec7017SPing-Ke Shih 44e3ec7017SPing-Ke Shih #define RTW89_HTC_MASK_HTC_OM_RX_NSS GENMASK(8, 6) 45e3ec7017SPing-Ke Shih enum htc_om_channel_width { 46e3ec7017SPing-Ke Shih HTC_OM_CHANNEL_WIDTH_20 = 0, 47e3ec7017SPing-Ke Shih HTC_OM_CHANNEL_WIDTH_40 = 1, 48e3ec7017SPing-Ke Shih HTC_OM_CHANNEL_WIDTH_80 = 2, 49e3ec7017SPing-Ke Shih HTC_OM_CHANNEL_WIDTH_160_OR_80_80 = 3, 50e3ec7017SPing-Ke Shih }; 51e3ec7017SPing-Ke Shih #define RTW89_HTC_MASK_HTC_OM_CH_WIDTH GENMASK(10, 9) 52e3ec7017SPing-Ke Shih #define RTW89_HTC_MASK_HTC_OM_UL_MU_DIS BIT(11) 53e3ec7017SPing-Ke Shih #define RTW89_HTC_MASK_HTC_OM_TX_NSTS GENMASK(14, 12) 54e3ec7017SPing-Ke Shih #define RTW89_HTC_MASK_HTC_OM_ER_SU_DIS BIT(15) 55e3ec7017SPing-Ke Shih #define RTW89_HTC_MASK_HTC_OM_DL_MU_MIMO_RR BIT(16) 56e3ec7017SPing-Ke Shih #define RTW89_HTC_MASK_HTC_OM_UL_MU_DATA_DIS BIT(17) 57e3ec7017SPing-Ke Shih 58e3ec7017SPing-Ke Shih enum rtw89_subband { 59e3ec7017SPing-Ke Shih RTW89_CH_2G = 0, 60e3ec7017SPing-Ke Shih RTW89_CH_5G_BAND_1 = 1, 61e3ec7017SPing-Ke Shih /* RTW89_CH_5G_BAND_2 = 2, unused */ 62e3ec7017SPing-Ke Shih RTW89_CH_5G_BAND_3 = 3, 63e3ec7017SPing-Ke Shih RTW89_CH_5G_BAND_4 = 4, 64e3ec7017SPing-Ke Shih 658e438ad4SZong-Zhe Yang RTW89_CH_6G_BAND_IDX0, /* Low */ 668e438ad4SZong-Zhe Yang RTW89_CH_6G_BAND_IDX1, /* Low */ 678e438ad4SZong-Zhe Yang RTW89_CH_6G_BAND_IDX2, /* Mid */ 688e438ad4SZong-Zhe Yang RTW89_CH_6G_BAND_IDX3, /* Mid */ 698e438ad4SZong-Zhe Yang RTW89_CH_6G_BAND_IDX4, /* High */ 708e438ad4SZong-Zhe Yang RTW89_CH_6G_BAND_IDX5, /* High */ 718e438ad4SZong-Zhe Yang RTW89_CH_6G_BAND_IDX6, /* Ultra-high */ 728e438ad4SZong-Zhe Yang RTW89_CH_6G_BAND_IDX7, /* Ultra-high */ 738e438ad4SZong-Zhe Yang 74e3ec7017SPing-Ke Shih RTW89_SUBBAND_NR, 75e3ec7017SPing-Ke Shih }; 76e3ec7017SPing-Ke Shih 77e3ec7017SPing-Ke Shih enum rtw89_hci_type { 78e3ec7017SPing-Ke Shih RTW89_HCI_TYPE_PCIE, 79e3ec7017SPing-Ke Shih RTW89_HCI_TYPE_USB, 80e3ec7017SPing-Ke Shih RTW89_HCI_TYPE_SDIO, 81e3ec7017SPing-Ke Shih }; 82e3ec7017SPing-Ke Shih 83e3ec7017SPing-Ke Shih enum rtw89_core_chip_id { 84e3ec7017SPing-Ke Shih RTL8852A, 85e3ec7017SPing-Ke Shih RTL8852B, 86e3ec7017SPing-Ke Shih RTL8852C, 87e3ec7017SPing-Ke Shih }; 88e3ec7017SPing-Ke Shih 89e3ec7017SPing-Ke Shih enum rtw89_cv { 90e3ec7017SPing-Ke Shih CHIP_CAV, 91e3ec7017SPing-Ke Shih CHIP_CBV, 92e3ec7017SPing-Ke Shih CHIP_CCV, 93e3ec7017SPing-Ke Shih CHIP_CDV, 94e3ec7017SPing-Ke Shih CHIP_CEV, 95e3ec7017SPing-Ke Shih CHIP_CFV, 96e3ec7017SPing-Ke Shih CHIP_CV_MAX, 97e3ec7017SPing-Ke Shih CHIP_CV_INVALID = CHIP_CV_MAX, 98e3ec7017SPing-Ke Shih }; 99e3ec7017SPing-Ke Shih 100e3ec7017SPing-Ke Shih enum rtw89_core_tx_type { 101e3ec7017SPing-Ke Shih RTW89_CORE_TX_TYPE_DATA, 102e3ec7017SPing-Ke Shih RTW89_CORE_TX_TYPE_MGMT, 103e3ec7017SPing-Ke Shih RTW89_CORE_TX_TYPE_FWCMD, 104e3ec7017SPing-Ke Shih }; 105e3ec7017SPing-Ke Shih 106e3ec7017SPing-Ke Shih enum rtw89_core_rx_type { 107e3ec7017SPing-Ke Shih RTW89_CORE_RX_TYPE_WIFI = 0, 108e3ec7017SPing-Ke Shih RTW89_CORE_RX_TYPE_PPDU_STAT = 1, 109e3ec7017SPing-Ke Shih RTW89_CORE_RX_TYPE_CHAN_INFO = 2, 110e3ec7017SPing-Ke Shih RTW89_CORE_RX_TYPE_BB_SCOPE = 3, 111e3ec7017SPing-Ke Shih RTW89_CORE_RX_TYPE_F2P_TXCMD = 4, 112e3ec7017SPing-Ke Shih RTW89_CORE_RX_TYPE_SS2FW = 5, 113e3ec7017SPing-Ke Shih RTW89_CORE_RX_TYPE_TX_REPORT = 6, 114e3ec7017SPing-Ke Shih RTW89_CORE_RX_TYPE_TX_REL_HOST = 7, 115e3ec7017SPing-Ke Shih RTW89_CORE_RX_TYPE_DFS_REPORT = 8, 116e3ec7017SPing-Ke Shih RTW89_CORE_RX_TYPE_TX_REL_CPU = 9, 117e3ec7017SPing-Ke Shih RTW89_CORE_RX_TYPE_C2H = 10, 118e3ec7017SPing-Ke Shih RTW89_CORE_RX_TYPE_CSI = 11, 119e3ec7017SPing-Ke Shih RTW89_CORE_RX_TYPE_CQI = 12, 120e3ec7017SPing-Ke Shih }; 121e3ec7017SPing-Ke Shih 122e3ec7017SPing-Ke Shih enum rtw89_txq_flags { 123e3ec7017SPing-Ke Shih RTW89_TXQ_F_AMPDU = 0, 124e3ec7017SPing-Ke Shih RTW89_TXQ_F_BLOCK_BA = 1, 125e3ec7017SPing-Ke Shih }; 126e3ec7017SPing-Ke Shih 127e3ec7017SPing-Ke Shih enum rtw89_net_type { 128e3ec7017SPing-Ke Shih RTW89_NET_TYPE_NO_LINK = 0, 129e3ec7017SPing-Ke Shih RTW89_NET_TYPE_AD_HOC = 1, 130e3ec7017SPing-Ke Shih RTW89_NET_TYPE_INFRA = 2, 131e3ec7017SPing-Ke Shih RTW89_NET_TYPE_AP_MODE = 3, 132e3ec7017SPing-Ke Shih }; 133e3ec7017SPing-Ke Shih 134e3ec7017SPing-Ke Shih enum rtw89_wifi_role { 135e3ec7017SPing-Ke Shih RTW89_WIFI_ROLE_NONE, 136e3ec7017SPing-Ke Shih RTW89_WIFI_ROLE_STATION, 137e3ec7017SPing-Ke Shih RTW89_WIFI_ROLE_AP, 138e3ec7017SPing-Ke Shih RTW89_WIFI_ROLE_AP_VLAN, 139e3ec7017SPing-Ke Shih RTW89_WIFI_ROLE_ADHOC, 140e3ec7017SPing-Ke Shih RTW89_WIFI_ROLE_ADHOC_MASTER, 141e3ec7017SPing-Ke Shih RTW89_WIFI_ROLE_MESH_POINT, 142e3ec7017SPing-Ke Shih RTW89_WIFI_ROLE_MONITOR, 143e3ec7017SPing-Ke Shih RTW89_WIFI_ROLE_P2P_DEVICE, 144e3ec7017SPing-Ke Shih RTW89_WIFI_ROLE_P2P_CLIENT, 145e3ec7017SPing-Ke Shih RTW89_WIFI_ROLE_P2P_GO, 146e3ec7017SPing-Ke Shih RTW89_WIFI_ROLE_NAN, 147e3ec7017SPing-Ke Shih RTW89_WIFI_ROLE_MLME_MAX 148e3ec7017SPing-Ke Shih }; 149e3ec7017SPing-Ke Shih 150e3ec7017SPing-Ke Shih enum rtw89_upd_mode { 1518b252070SPing-Ke Shih RTW89_ROLE_CREATE, 1528b252070SPing-Ke Shih RTW89_ROLE_REMOVE, 1538b252070SPing-Ke Shih RTW89_ROLE_TYPE_CHANGE, 1548b252070SPing-Ke Shih RTW89_ROLE_INFO_CHANGE, 1558b252070SPing-Ke Shih RTW89_ROLE_CON_DISCONN 156e3ec7017SPing-Ke Shih }; 157e3ec7017SPing-Ke Shih 158e3ec7017SPing-Ke Shih enum rtw89_self_role { 159e3ec7017SPing-Ke Shih RTW89_SELF_ROLE_CLIENT, 160e3ec7017SPing-Ke Shih RTW89_SELF_ROLE_AP, 161e3ec7017SPing-Ke Shih RTW89_SELF_ROLE_AP_CLIENT 162e3ec7017SPing-Ke Shih }; 163e3ec7017SPing-Ke Shih 164e3ec7017SPing-Ke Shih enum rtw89_msk_sO_el { 165e3ec7017SPing-Ke Shih RTW89_NO_MSK, 166e3ec7017SPing-Ke Shih RTW89_SMA, 167e3ec7017SPing-Ke Shih RTW89_TMA, 168e3ec7017SPing-Ke Shih RTW89_BSSID 169e3ec7017SPing-Ke Shih }; 170e3ec7017SPing-Ke Shih 171e3ec7017SPing-Ke Shih enum rtw89_sch_tx_sel { 172e3ec7017SPing-Ke Shih RTW89_SCH_TX_SEL_ALL, 173e3ec7017SPing-Ke Shih RTW89_SCH_TX_SEL_HIQ, 174e3ec7017SPing-Ke Shih RTW89_SCH_TX_SEL_MG0, 175e3ec7017SPing-Ke Shih RTW89_SCH_TX_SEL_MACID, 176e3ec7017SPing-Ke Shih }; 177e3ec7017SPing-Ke Shih 178e3ec7017SPing-Ke Shih /* RTW89_ADDR_CAM_SEC_NONE : not enabled 179e3ec7017SPing-Ke Shih * RTW89_ADDR_CAM_SEC_ALL_UNI : 0 - 6 unicast 180e3ec7017SPing-Ke Shih * RTW89_ADDR_CAM_SEC_NORMAL : 0 - 1 unicast, 2 - 4 group, 5 - 6 BIP 181e3ec7017SPing-Ke Shih * RTW89_ADDR_CAM_SEC_4GROUP : 0 - 1 unicast, 2 - 5 group, 6 BIP 182e3ec7017SPing-Ke Shih */ 183e3ec7017SPing-Ke Shih enum rtw89_add_cam_sec_mode { 184e3ec7017SPing-Ke Shih RTW89_ADDR_CAM_SEC_NONE = 0, 185e3ec7017SPing-Ke Shih RTW89_ADDR_CAM_SEC_ALL_UNI = 1, 186e3ec7017SPing-Ke Shih RTW89_ADDR_CAM_SEC_NORMAL = 2, 187e3ec7017SPing-Ke Shih RTW89_ADDR_CAM_SEC_4GROUP = 3, 188e3ec7017SPing-Ke Shih }; 189e3ec7017SPing-Ke Shih 190e3ec7017SPing-Ke Shih enum rtw89_sec_key_type { 191e3ec7017SPing-Ke Shih RTW89_SEC_KEY_TYPE_NONE = 0, 192e3ec7017SPing-Ke Shih RTW89_SEC_KEY_TYPE_WEP40 = 1, 193e3ec7017SPing-Ke Shih RTW89_SEC_KEY_TYPE_WEP104 = 2, 194e3ec7017SPing-Ke Shih RTW89_SEC_KEY_TYPE_TKIP = 3, 195e3ec7017SPing-Ke Shih RTW89_SEC_KEY_TYPE_WAPI = 4, 196e3ec7017SPing-Ke Shih RTW89_SEC_KEY_TYPE_GCMSMS4 = 5, 197e3ec7017SPing-Ke Shih RTW89_SEC_KEY_TYPE_CCMP128 = 6, 198e3ec7017SPing-Ke Shih RTW89_SEC_KEY_TYPE_CCMP256 = 7, 199e3ec7017SPing-Ke Shih RTW89_SEC_KEY_TYPE_GCMP128 = 8, 200e3ec7017SPing-Ke Shih RTW89_SEC_KEY_TYPE_GCMP256 = 9, 201e3ec7017SPing-Ke Shih RTW89_SEC_KEY_TYPE_BIP_CCMP128 = 10, 202e3ec7017SPing-Ke Shih }; 203e3ec7017SPing-Ke Shih 204e3ec7017SPing-Ke Shih enum rtw89_port { 205e3ec7017SPing-Ke Shih RTW89_PORT_0 = 0, 206e3ec7017SPing-Ke Shih RTW89_PORT_1 = 1, 207e3ec7017SPing-Ke Shih RTW89_PORT_2 = 2, 208e3ec7017SPing-Ke Shih RTW89_PORT_3 = 3, 209e3ec7017SPing-Ke Shih RTW89_PORT_4 = 4, 210e3ec7017SPing-Ke Shih RTW89_PORT_NUM 211e3ec7017SPing-Ke Shih }; 212e3ec7017SPing-Ke Shih 213e3ec7017SPing-Ke Shih enum rtw89_band { 214e3ec7017SPing-Ke Shih RTW89_BAND_2G = 0, 215e3ec7017SPing-Ke Shih RTW89_BAND_5G = 1, 2160237f65aSZong-Zhe Yang RTW89_BAND_6G = 2, 217e3ec7017SPing-Ke Shih RTW89_BAND_MAX, 218e3ec7017SPing-Ke Shih }; 219e3ec7017SPing-Ke Shih 220e3ec7017SPing-Ke Shih enum rtw89_hw_rate { 221e3ec7017SPing-Ke Shih RTW89_HW_RATE_CCK1 = 0x0, 222e3ec7017SPing-Ke Shih RTW89_HW_RATE_CCK2 = 0x1, 223e3ec7017SPing-Ke Shih RTW89_HW_RATE_CCK5_5 = 0x2, 224e3ec7017SPing-Ke Shih RTW89_HW_RATE_CCK11 = 0x3, 225e3ec7017SPing-Ke Shih RTW89_HW_RATE_OFDM6 = 0x4, 226e3ec7017SPing-Ke Shih RTW89_HW_RATE_OFDM9 = 0x5, 227e3ec7017SPing-Ke Shih RTW89_HW_RATE_OFDM12 = 0x6, 228e3ec7017SPing-Ke Shih RTW89_HW_RATE_OFDM18 = 0x7, 229e3ec7017SPing-Ke Shih RTW89_HW_RATE_OFDM24 = 0x8, 230e3ec7017SPing-Ke Shih RTW89_HW_RATE_OFDM36 = 0x9, 231e3ec7017SPing-Ke Shih RTW89_HW_RATE_OFDM48 = 0xA, 232e3ec7017SPing-Ke Shih RTW89_HW_RATE_OFDM54 = 0xB, 233e3ec7017SPing-Ke Shih RTW89_HW_RATE_MCS0 = 0x80, 234e3ec7017SPing-Ke Shih RTW89_HW_RATE_MCS1 = 0x81, 235e3ec7017SPing-Ke Shih RTW89_HW_RATE_MCS2 = 0x82, 236e3ec7017SPing-Ke Shih RTW89_HW_RATE_MCS3 = 0x83, 237e3ec7017SPing-Ke Shih RTW89_HW_RATE_MCS4 = 0x84, 238e3ec7017SPing-Ke Shih RTW89_HW_RATE_MCS5 = 0x85, 239e3ec7017SPing-Ke Shih RTW89_HW_RATE_MCS6 = 0x86, 240e3ec7017SPing-Ke Shih RTW89_HW_RATE_MCS7 = 0x87, 241e3ec7017SPing-Ke Shih RTW89_HW_RATE_MCS8 = 0x88, 242e3ec7017SPing-Ke Shih RTW89_HW_RATE_MCS9 = 0x89, 243e3ec7017SPing-Ke Shih RTW89_HW_RATE_MCS10 = 0x8A, 244e3ec7017SPing-Ke Shih RTW89_HW_RATE_MCS11 = 0x8B, 245e3ec7017SPing-Ke Shih RTW89_HW_RATE_MCS12 = 0x8C, 246e3ec7017SPing-Ke Shih RTW89_HW_RATE_MCS13 = 0x8D, 247e3ec7017SPing-Ke Shih RTW89_HW_RATE_MCS14 = 0x8E, 248e3ec7017SPing-Ke Shih RTW89_HW_RATE_MCS15 = 0x8F, 249e3ec7017SPing-Ke Shih RTW89_HW_RATE_MCS16 = 0x90, 250e3ec7017SPing-Ke Shih RTW89_HW_RATE_MCS17 = 0x91, 251e3ec7017SPing-Ke Shih RTW89_HW_RATE_MCS18 = 0x92, 252e3ec7017SPing-Ke Shih RTW89_HW_RATE_MCS19 = 0x93, 253e3ec7017SPing-Ke Shih RTW89_HW_RATE_MCS20 = 0x94, 254e3ec7017SPing-Ke Shih RTW89_HW_RATE_MCS21 = 0x95, 255e3ec7017SPing-Ke Shih RTW89_HW_RATE_MCS22 = 0x96, 256e3ec7017SPing-Ke Shih RTW89_HW_RATE_MCS23 = 0x97, 257e3ec7017SPing-Ke Shih RTW89_HW_RATE_MCS24 = 0x98, 258e3ec7017SPing-Ke Shih RTW89_HW_RATE_MCS25 = 0x99, 259e3ec7017SPing-Ke Shih RTW89_HW_RATE_MCS26 = 0x9A, 260e3ec7017SPing-Ke Shih RTW89_HW_RATE_MCS27 = 0x9B, 261e3ec7017SPing-Ke Shih RTW89_HW_RATE_MCS28 = 0x9C, 262e3ec7017SPing-Ke Shih RTW89_HW_RATE_MCS29 = 0x9D, 263e3ec7017SPing-Ke Shih RTW89_HW_RATE_MCS30 = 0x9E, 264e3ec7017SPing-Ke Shih RTW89_HW_RATE_MCS31 = 0x9F, 265e3ec7017SPing-Ke Shih RTW89_HW_RATE_VHT_NSS1_MCS0 = 0x100, 266e3ec7017SPing-Ke Shih RTW89_HW_RATE_VHT_NSS1_MCS1 = 0x101, 267e3ec7017SPing-Ke Shih RTW89_HW_RATE_VHT_NSS1_MCS2 = 0x102, 268e3ec7017SPing-Ke Shih RTW89_HW_RATE_VHT_NSS1_MCS3 = 0x103, 269e3ec7017SPing-Ke Shih RTW89_HW_RATE_VHT_NSS1_MCS4 = 0x104, 270e3ec7017SPing-Ke Shih RTW89_HW_RATE_VHT_NSS1_MCS5 = 0x105, 271e3ec7017SPing-Ke Shih RTW89_HW_RATE_VHT_NSS1_MCS6 = 0x106, 272e3ec7017SPing-Ke Shih RTW89_HW_RATE_VHT_NSS1_MCS7 = 0x107, 273e3ec7017SPing-Ke Shih RTW89_HW_RATE_VHT_NSS1_MCS8 = 0x108, 274e3ec7017SPing-Ke Shih RTW89_HW_RATE_VHT_NSS1_MCS9 = 0x109, 275e3ec7017SPing-Ke Shih RTW89_HW_RATE_VHT_NSS2_MCS0 = 0x110, 276e3ec7017SPing-Ke Shih RTW89_HW_RATE_VHT_NSS2_MCS1 = 0x111, 277e3ec7017SPing-Ke Shih RTW89_HW_RATE_VHT_NSS2_MCS2 = 0x112, 278e3ec7017SPing-Ke Shih RTW89_HW_RATE_VHT_NSS2_MCS3 = 0x113, 279e3ec7017SPing-Ke Shih RTW89_HW_RATE_VHT_NSS2_MCS4 = 0x114, 280e3ec7017SPing-Ke Shih RTW89_HW_RATE_VHT_NSS2_MCS5 = 0x115, 281e3ec7017SPing-Ke Shih RTW89_HW_RATE_VHT_NSS2_MCS6 = 0x116, 282e3ec7017SPing-Ke Shih RTW89_HW_RATE_VHT_NSS2_MCS7 = 0x117, 283e3ec7017SPing-Ke Shih RTW89_HW_RATE_VHT_NSS2_MCS8 = 0x118, 284e3ec7017SPing-Ke Shih RTW89_HW_RATE_VHT_NSS2_MCS9 = 0x119, 285e3ec7017SPing-Ke Shih RTW89_HW_RATE_VHT_NSS3_MCS0 = 0x120, 286e3ec7017SPing-Ke Shih RTW89_HW_RATE_VHT_NSS3_MCS1 = 0x121, 287e3ec7017SPing-Ke Shih RTW89_HW_RATE_VHT_NSS3_MCS2 = 0x122, 288e3ec7017SPing-Ke Shih RTW89_HW_RATE_VHT_NSS3_MCS3 = 0x123, 289e3ec7017SPing-Ke Shih RTW89_HW_RATE_VHT_NSS3_MCS4 = 0x124, 290e3ec7017SPing-Ke Shih RTW89_HW_RATE_VHT_NSS3_MCS5 = 0x125, 291e3ec7017SPing-Ke Shih RTW89_HW_RATE_VHT_NSS3_MCS6 = 0x126, 292e3ec7017SPing-Ke Shih RTW89_HW_RATE_VHT_NSS3_MCS7 = 0x127, 293e3ec7017SPing-Ke Shih RTW89_HW_RATE_VHT_NSS3_MCS8 = 0x128, 294e3ec7017SPing-Ke Shih RTW89_HW_RATE_VHT_NSS3_MCS9 = 0x129, 295e3ec7017SPing-Ke Shih RTW89_HW_RATE_VHT_NSS4_MCS0 = 0x130, 296e3ec7017SPing-Ke Shih RTW89_HW_RATE_VHT_NSS4_MCS1 = 0x131, 297e3ec7017SPing-Ke Shih RTW89_HW_RATE_VHT_NSS4_MCS2 = 0x132, 298e3ec7017SPing-Ke Shih RTW89_HW_RATE_VHT_NSS4_MCS3 = 0x133, 299e3ec7017SPing-Ke Shih RTW89_HW_RATE_VHT_NSS4_MCS4 = 0x134, 300e3ec7017SPing-Ke Shih RTW89_HW_RATE_VHT_NSS4_MCS5 = 0x135, 301e3ec7017SPing-Ke Shih RTW89_HW_RATE_VHT_NSS4_MCS6 = 0x136, 302e3ec7017SPing-Ke Shih RTW89_HW_RATE_VHT_NSS4_MCS7 = 0x137, 303e3ec7017SPing-Ke Shih RTW89_HW_RATE_VHT_NSS4_MCS8 = 0x138, 304e3ec7017SPing-Ke Shih RTW89_HW_RATE_VHT_NSS4_MCS9 = 0x139, 305e3ec7017SPing-Ke Shih RTW89_HW_RATE_HE_NSS1_MCS0 = 0x180, 306e3ec7017SPing-Ke Shih RTW89_HW_RATE_HE_NSS1_MCS1 = 0x181, 307e3ec7017SPing-Ke Shih RTW89_HW_RATE_HE_NSS1_MCS2 = 0x182, 308e3ec7017SPing-Ke Shih RTW89_HW_RATE_HE_NSS1_MCS3 = 0x183, 309e3ec7017SPing-Ke Shih RTW89_HW_RATE_HE_NSS1_MCS4 = 0x184, 310e3ec7017SPing-Ke Shih RTW89_HW_RATE_HE_NSS1_MCS5 = 0x185, 311e3ec7017SPing-Ke Shih RTW89_HW_RATE_HE_NSS1_MCS6 = 0x186, 312e3ec7017SPing-Ke Shih RTW89_HW_RATE_HE_NSS1_MCS7 = 0x187, 313e3ec7017SPing-Ke Shih RTW89_HW_RATE_HE_NSS1_MCS8 = 0x188, 314e3ec7017SPing-Ke Shih RTW89_HW_RATE_HE_NSS1_MCS9 = 0x189, 315e3ec7017SPing-Ke Shih RTW89_HW_RATE_HE_NSS1_MCS10 = 0x18A, 316e3ec7017SPing-Ke Shih RTW89_HW_RATE_HE_NSS1_MCS11 = 0x18B, 317e3ec7017SPing-Ke Shih RTW89_HW_RATE_HE_NSS2_MCS0 = 0x190, 318e3ec7017SPing-Ke Shih RTW89_HW_RATE_HE_NSS2_MCS1 = 0x191, 319e3ec7017SPing-Ke Shih RTW89_HW_RATE_HE_NSS2_MCS2 = 0x192, 320e3ec7017SPing-Ke Shih RTW89_HW_RATE_HE_NSS2_MCS3 = 0x193, 321e3ec7017SPing-Ke Shih RTW89_HW_RATE_HE_NSS2_MCS4 = 0x194, 322e3ec7017SPing-Ke Shih RTW89_HW_RATE_HE_NSS2_MCS5 = 0x195, 323e3ec7017SPing-Ke Shih RTW89_HW_RATE_HE_NSS2_MCS6 = 0x196, 324e3ec7017SPing-Ke Shih RTW89_HW_RATE_HE_NSS2_MCS7 = 0x197, 325e3ec7017SPing-Ke Shih RTW89_HW_RATE_HE_NSS2_MCS8 = 0x198, 326e3ec7017SPing-Ke Shih RTW89_HW_RATE_HE_NSS2_MCS9 = 0x199, 327e3ec7017SPing-Ke Shih RTW89_HW_RATE_HE_NSS2_MCS10 = 0x19A, 328e3ec7017SPing-Ke Shih RTW89_HW_RATE_HE_NSS2_MCS11 = 0x19B, 329e3ec7017SPing-Ke Shih RTW89_HW_RATE_HE_NSS3_MCS0 = 0x1A0, 330e3ec7017SPing-Ke Shih RTW89_HW_RATE_HE_NSS3_MCS1 = 0x1A1, 331e3ec7017SPing-Ke Shih RTW89_HW_RATE_HE_NSS3_MCS2 = 0x1A2, 332e3ec7017SPing-Ke Shih RTW89_HW_RATE_HE_NSS3_MCS3 = 0x1A3, 333e3ec7017SPing-Ke Shih RTW89_HW_RATE_HE_NSS3_MCS4 = 0x1A4, 334e3ec7017SPing-Ke Shih RTW89_HW_RATE_HE_NSS3_MCS5 = 0x1A5, 335e3ec7017SPing-Ke Shih RTW89_HW_RATE_HE_NSS3_MCS6 = 0x1A6, 336e3ec7017SPing-Ke Shih RTW89_HW_RATE_HE_NSS3_MCS7 = 0x1A7, 337e3ec7017SPing-Ke Shih RTW89_HW_RATE_HE_NSS3_MCS8 = 0x1A8, 338e3ec7017SPing-Ke Shih RTW89_HW_RATE_HE_NSS3_MCS9 = 0x1A9, 339e3ec7017SPing-Ke Shih RTW89_HW_RATE_HE_NSS3_MCS10 = 0x1AA, 340e3ec7017SPing-Ke Shih RTW89_HW_RATE_HE_NSS3_MCS11 = 0x1AB, 341e3ec7017SPing-Ke Shih RTW89_HW_RATE_HE_NSS4_MCS0 = 0x1B0, 342e3ec7017SPing-Ke Shih RTW89_HW_RATE_HE_NSS4_MCS1 = 0x1B1, 343e3ec7017SPing-Ke Shih RTW89_HW_RATE_HE_NSS4_MCS2 = 0x1B2, 344e3ec7017SPing-Ke Shih RTW89_HW_RATE_HE_NSS4_MCS3 = 0x1B3, 345e3ec7017SPing-Ke Shih RTW89_HW_RATE_HE_NSS4_MCS4 = 0x1B4, 346e3ec7017SPing-Ke Shih RTW89_HW_RATE_HE_NSS4_MCS5 = 0x1B5, 347e3ec7017SPing-Ke Shih RTW89_HW_RATE_HE_NSS4_MCS6 = 0x1B6, 348e3ec7017SPing-Ke Shih RTW89_HW_RATE_HE_NSS4_MCS7 = 0x1B7, 349e3ec7017SPing-Ke Shih RTW89_HW_RATE_HE_NSS4_MCS8 = 0x1B8, 350e3ec7017SPing-Ke Shih RTW89_HW_RATE_HE_NSS4_MCS9 = 0x1B9, 351e3ec7017SPing-Ke Shih RTW89_HW_RATE_HE_NSS4_MCS10 = 0x1BA, 352e3ec7017SPing-Ke Shih RTW89_HW_RATE_HE_NSS4_MCS11 = 0x1BB, 353e3ec7017SPing-Ke Shih RTW89_HW_RATE_NR, 354e3ec7017SPing-Ke Shih 355e3ec7017SPing-Ke Shih RTW89_HW_RATE_MASK_MOD = GENMASK(8, 7), 356e3ec7017SPing-Ke Shih RTW89_HW_RATE_MASK_VAL = GENMASK(6, 0), 357e3ec7017SPing-Ke Shih }; 358e3ec7017SPing-Ke Shih 359e3ec7017SPing-Ke Shih /* 2G channels, 360e3ec7017SPing-Ke Shih * 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14 361e3ec7017SPing-Ke Shih */ 362e3ec7017SPing-Ke Shih #define RTW89_2G_CH_NUM 14 363e3ec7017SPing-Ke Shih 364e3ec7017SPing-Ke Shih /* 5G channels, 365e3ec7017SPing-Ke Shih * 36, 38, 40, 42, 44, 46, 48, 50, 366e3ec7017SPing-Ke Shih * 52, 54, 56, 58, 60, 62, 64, 367e3ec7017SPing-Ke Shih * 100, 102, 104, 106, 108, 110, 112, 114, 368e3ec7017SPing-Ke Shih * 116, 118, 120, 122, 124, 126, 128, 130, 369e3ec7017SPing-Ke Shih * 132, 134, 136, 138, 140, 142, 144, 370e3ec7017SPing-Ke Shih * 149, 151, 153, 155, 157, 159, 161, 163, 371e3ec7017SPing-Ke Shih * 165, 167, 169, 171, 173, 175, 177 372e3ec7017SPing-Ke Shih */ 373e3ec7017SPing-Ke Shih #define RTW89_5G_CH_NUM 53 374e3ec7017SPing-Ke Shih 375ac74f016SZong-Zhe Yang /* 6G channels, 376ac74f016SZong-Zhe Yang * 1, 3, 5, 7, 9, 11, 13, 15, 377ac74f016SZong-Zhe Yang * 17, 19, 21, 23, 25, 27, 29, 33, 378ac74f016SZong-Zhe Yang * 35, 37, 39, 41, 43, 45, 47, 49, 379ac74f016SZong-Zhe Yang * 51, 53, 55, 57, 59, 61, 65, 67, 380ac74f016SZong-Zhe Yang * 69, 71, 73, 75, 77, 79, 81, 83, 381ac74f016SZong-Zhe Yang * 85, 87, 89, 91, 93, 97, 99, 101, 382ac74f016SZong-Zhe Yang * 103, 105, 107, 109, 111, 113, 115, 117, 383ac74f016SZong-Zhe Yang * 119, 121, 123, 125, 129, 131, 133, 135, 384ac74f016SZong-Zhe Yang * 137, 139, 141, 143, 145, 147, 149, 151, 385ac74f016SZong-Zhe Yang * 153, 155, 157, 161, 163, 165, 167, 169, 386ac74f016SZong-Zhe Yang * 171, 173, 175, 177, 179, 181, 183, 185, 387ac74f016SZong-Zhe Yang * 187, 189, 193, 195, 197, 199, 201, 203, 388ac74f016SZong-Zhe Yang * 205, 207, 209, 211, 213, 215, 217, 219, 389ac74f016SZong-Zhe Yang * 221, 225, 227, 229, 231, 233, 235, 237, 390ac74f016SZong-Zhe Yang * 239, 241, 243, 245, 247, 249, 251, 253, 391ac74f016SZong-Zhe Yang */ 392ac74f016SZong-Zhe Yang #define RTW89_6G_CH_NUM 120 393ac74f016SZong-Zhe Yang 394e3ec7017SPing-Ke Shih enum rtw89_rate_section { 395e3ec7017SPing-Ke Shih RTW89_RS_CCK, 396e3ec7017SPing-Ke Shih RTW89_RS_OFDM, 397e3ec7017SPing-Ke Shih RTW89_RS_MCS, /* for HT/VHT/HE */ 398e3ec7017SPing-Ke Shih RTW89_RS_HEDCM, 399e3ec7017SPing-Ke Shih RTW89_RS_OFFSET, 400e3ec7017SPing-Ke Shih RTW89_RS_MAX, 401e3ec7017SPing-Ke Shih RTW89_RS_LMT_NUM = RTW89_RS_MCS + 1, 402e3ec7017SPing-Ke Shih }; 403e3ec7017SPing-Ke Shih 404e3ec7017SPing-Ke Shih enum rtw89_rate_max { 405e3ec7017SPing-Ke Shih RTW89_RATE_CCK_MAX = 4, 406e3ec7017SPing-Ke Shih RTW89_RATE_OFDM_MAX = 8, 407e3ec7017SPing-Ke Shih RTW89_RATE_MCS_MAX = 12, 408e3ec7017SPing-Ke Shih RTW89_RATE_HEDCM_MAX = 4, /* for HEDCM MCS0/1/3/4 */ 409e3ec7017SPing-Ke Shih RTW89_RATE_OFFSET_MAX = 5, /* for HE(HEDCM)/VHT/HT/OFDM/CCK offset */ 410e3ec7017SPing-Ke Shih }; 411e3ec7017SPing-Ke Shih 412e3ec7017SPing-Ke Shih enum rtw89_nss { 413e3ec7017SPing-Ke Shih RTW89_NSS_1 = 0, 414e3ec7017SPing-Ke Shih RTW89_NSS_2 = 1, 415e3ec7017SPing-Ke Shih /* HE DCM only support 1ss and 2ss */ 416e3ec7017SPing-Ke Shih RTW89_NSS_HEDCM_MAX = RTW89_NSS_2 + 1, 417e3ec7017SPing-Ke Shih RTW89_NSS_3 = 2, 418e3ec7017SPing-Ke Shih RTW89_NSS_4 = 3, 419e3ec7017SPing-Ke Shih RTW89_NSS_MAX, 420e3ec7017SPing-Ke Shih }; 421e3ec7017SPing-Ke Shih 422e3ec7017SPing-Ke Shih enum rtw89_ntx { 423e3ec7017SPing-Ke Shih RTW89_1TX = 0, 424e3ec7017SPing-Ke Shih RTW89_2TX = 1, 425e3ec7017SPing-Ke Shih RTW89_NTX_NUM, 426e3ec7017SPing-Ke Shih }; 427e3ec7017SPing-Ke Shih 428e3ec7017SPing-Ke Shih enum rtw89_beamforming_type { 429e3ec7017SPing-Ke Shih RTW89_NONBF = 0, 430e3ec7017SPing-Ke Shih RTW89_BF = 1, 431e3ec7017SPing-Ke Shih RTW89_BF_NUM, 432e3ec7017SPing-Ke Shih }; 433e3ec7017SPing-Ke Shih 434e3ec7017SPing-Ke Shih enum rtw89_regulation_type { 435e3ec7017SPing-Ke Shih RTW89_WW = 0, 436e3ec7017SPing-Ke Shih RTW89_ETSI = 1, 437e3ec7017SPing-Ke Shih RTW89_FCC = 2, 438e3ec7017SPing-Ke Shih RTW89_MKK = 3, 439e3ec7017SPing-Ke Shih RTW89_NA = 4, 440e3ec7017SPing-Ke Shih RTW89_IC = 5, 441e3ec7017SPing-Ke Shih RTW89_KCC = 6, 44254257714SZong-Zhe Yang RTW89_ACMA = 7, 44354257714SZong-Zhe Yang RTW89_NCC = 8, 44454257714SZong-Zhe Yang RTW89_MEXICO = 9, 44554257714SZong-Zhe Yang RTW89_CHILE = 10, 446e3ec7017SPing-Ke Shih RTW89_UKRAINE = 11, 447e3ec7017SPing-Ke Shih RTW89_CN = 12, 44854257714SZong-Zhe Yang RTW89_QATAR = 13, 449e3ec7017SPing-Ke Shih RTW89_REGD_NUM, 450e3ec7017SPing-Ke Shih }; 451e3ec7017SPing-Ke Shih 452e3ec7017SPing-Ke Shih struct rtw89_txpwr_byrate { 453e3ec7017SPing-Ke Shih s8 cck[RTW89_RATE_CCK_MAX]; 454e3ec7017SPing-Ke Shih s8 ofdm[RTW89_RATE_OFDM_MAX]; 455e3ec7017SPing-Ke Shih s8 mcs[RTW89_NSS_MAX][RTW89_RATE_MCS_MAX]; 456e3ec7017SPing-Ke Shih s8 hedcm[RTW89_NSS_HEDCM_MAX][RTW89_RATE_HEDCM_MAX]; 457e3ec7017SPing-Ke Shih s8 offset[RTW89_RATE_OFFSET_MAX]; 458e3ec7017SPing-Ke Shih }; 459e3ec7017SPing-Ke Shih 460e3ec7017SPing-Ke Shih enum rtw89_bandwidth_section_num { 461e3ec7017SPing-Ke Shih RTW89_BW20_SEC_NUM = 8, 462e3ec7017SPing-Ke Shih RTW89_BW40_SEC_NUM = 4, 463e3ec7017SPing-Ke Shih RTW89_BW80_SEC_NUM = 2, 464e3ec7017SPing-Ke Shih }; 465e3ec7017SPing-Ke Shih 466e3ec7017SPing-Ke Shih struct rtw89_txpwr_limit { 467e3ec7017SPing-Ke Shih s8 cck_20m[RTW89_BF_NUM]; 468e3ec7017SPing-Ke Shih s8 cck_40m[RTW89_BF_NUM]; 469e3ec7017SPing-Ke Shih s8 ofdm[RTW89_BF_NUM]; 470e3ec7017SPing-Ke Shih s8 mcs_20m[RTW89_BW20_SEC_NUM][RTW89_BF_NUM]; 471e3ec7017SPing-Ke Shih s8 mcs_40m[RTW89_BW40_SEC_NUM][RTW89_BF_NUM]; 472e3ec7017SPing-Ke Shih s8 mcs_80m[RTW89_BW80_SEC_NUM][RTW89_BF_NUM]; 473e3ec7017SPing-Ke Shih s8 mcs_160m[RTW89_BF_NUM]; 474e3ec7017SPing-Ke Shih s8 mcs_40m_0p5[RTW89_BF_NUM]; 475e3ec7017SPing-Ke Shih s8 mcs_40m_2p5[RTW89_BF_NUM]; 476e3ec7017SPing-Ke Shih }; 477e3ec7017SPing-Ke Shih 478e3ec7017SPing-Ke Shih #define RTW89_RU_SEC_NUM 8 479e3ec7017SPing-Ke Shih 480e3ec7017SPing-Ke Shih struct rtw89_txpwr_limit_ru { 481e3ec7017SPing-Ke Shih s8 ru26[RTW89_RU_SEC_NUM]; 482e3ec7017SPing-Ke Shih s8 ru52[RTW89_RU_SEC_NUM]; 483e3ec7017SPing-Ke Shih s8 ru106[RTW89_RU_SEC_NUM]; 484e3ec7017SPing-Ke Shih }; 485e3ec7017SPing-Ke Shih 486e3ec7017SPing-Ke Shih struct rtw89_rate_desc { 487e3ec7017SPing-Ke Shih enum rtw89_nss nss; 488e3ec7017SPing-Ke Shih enum rtw89_rate_section rs; 489e3ec7017SPing-Ke Shih u8 idx; 490e3ec7017SPing-Ke Shih }; 491e3ec7017SPing-Ke Shih 492e3ec7017SPing-Ke Shih #define PHY_STS_HDR_LEN 8 493e3ec7017SPing-Ke Shih #define RF_PATH_MAX 4 494e3ec7017SPing-Ke Shih #define RTW89_MAX_PPDU_CNT 8 495e3ec7017SPing-Ke Shih struct rtw89_rx_phy_ppdu { 496e3ec7017SPing-Ke Shih u8 *buf; 497e3ec7017SPing-Ke Shih u32 len; 498e3ec7017SPing-Ke Shih u8 rssi_avg; 499e3ec7017SPing-Ke Shih s8 rssi[RF_PATH_MAX]; 500e3ec7017SPing-Ke Shih u8 mac_id; 501eb4e52b3SPo Hao Huang u8 chan_idx; 502eb4e52b3SPo Hao Huang u8 ie; 503eb4e52b3SPo Hao Huang u16 rate; 504e3ec7017SPing-Ke Shih bool to_self; 505e3ec7017SPing-Ke Shih bool valid; 506e3ec7017SPing-Ke Shih }; 507e3ec7017SPing-Ke Shih 508e3ec7017SPing-Ke Shih enum rtw89_mac_idx { 509e3ec7017SPing-Ke Shih RTW89_MAC_0 = 0, 510e3ec7017SPing-Ke Shih RTW89_MAC_1 = 1, 511e3ec7017SPing-Ke Shih }; 512e3ec7017SPing-Ke Shih 513e3ec7017SPing-Ke Shih enum rtw89_phy_idx { 514e3ec7017SPing-Ke Shih RTW89_PHY_0 = 0, 515e3ec7017SPing-Ke Shih RTW89_PHY_1 = 1, 516e3ec7017SPing-Ke Shih RTW89_PHY_MAX 517e3ec7017SPing-Ke Shih }; 518e3ec7017SPing-Ke Shih 519e3ec7017SPing-Ke Shih enum rtw89_rf_path { 520e3ec7017SPing-Ke Shih RF_PATH_A = 0, 521e3ec7017SPing-Ke Shih RF_PATH_B = 1, 522e3ec7017SPing-Ke Shih RF_PATH_C = 2, 523e3ec7017SPing-Ke Shih RF_PATH_D = 3, 524e3ec7017SPing-Ke Shih RF_PATH_AB, 525e3ec7017SPing-Ke Shih RF_PATH_AC, 526e3ec7017SPing-Ke Shih RF_PATH_AD, 527e3ec7017SPing-Ke Shih RF_PATH_BC, 528e3ec7017SPing-Ke Shih RF_PATH_BD, 529e3ec7017SPing-Ke Shih RF_PATH_CD, 530e3ec7017SPing-Ke Shih RF_PATH_ABC, 531e3ec7017SPing-Ke Shih RF_PATH_ABD, 532e3ec7017SPing-Ke Shih RF_PATH_ACD, 533e3ec7017SPing-Ke Shih RF_PATH_BCD, 534e3ec7017SPing-Ke Shih RF_PATH_ABCD, 535e3ec7017SPing-Ke Shih }; 536e3ec7017SPing-Ke Shih 537e3ec7017SPing-Ke Shih enum rtw89_rf_path_bit { 538e3ec7017SPing-Ke Shih RF_A = BIT(0), 539e3ec7017SPing-Ke Shih RF_B = BIT(1), 540e3ec7017SPing-Ke Shih RF_C = BIT(2), 541e3ec7017SPing-Ke Shih RF_D = BIT(3), 542e3ec7017SPing-Ke Shih 543e3ec7017SPing-Ke Shih RF_AB = (RF_A | RF_B), 544e3ec7017SPing-Ke Shih RF_AC = (RF_A | RF_C), 545e3ec7017SPing-Ke Shih RF_AD = (RF_A | RF_D), 546e3ec7017SPing-Ke Shih RF_BC = (RF_B | RF_C), 547e3ec7017SPing-Ke Shih RF_BD = (RF_B | RF_D), 548e3ec7017SPing-Ke Shih RF_CD = (RF_C | RF_D), 549e3ec7017SPing-Ke Shih 550e3ec7017SPing-Ke Shih RF_ABC = (RF_A | RF_B | RF_C), 551e3ec7017SPing-Ke Shih RF_ABD = (RF_A | RF_B | RF_D), 552e3ec7017SPing-Ke Shih RF_ACD = (RF_A | RF_C | RF_D), 553e3ec7017SPing-Ke Shih RF_BCD = (RF_B | RF_C | RF_D), 554e3ec7017SPing-Ke Shih 555e3ec7017SPing-Ke Shih RF_ABCD = (RF_A | RF_B | RF_C | RF_D), 556e3ec7017SPing-Ke Shih }; 557e3ec7017SPing-Ke Shih 558e3ec7017SPing-Ke Shih enum rtw89_bandwidth { 559e3ec7017SPing-Ke Shih RTW89_CHANNEL_WIDTH_20 = 0, 560e3ec7017SPing-Ke Shih RTW89_CHANNEL_WIDTH_40 = 1, 561e3ec7017SPing-Ke Shih RTW89_CHANNEL_WIDTH_80 = 2, 562e3ec7017SPing-Ke Shih RTW89_CHANNEL_WIDTH_160 = 3, 563e3ec7017SPing-Ke Shih RTW89_CHANNEL_WIDTH_80_80 = 4, 564e3ec7017SPing-Ke Shih RTW89_CHANNEL_WIDTH_5 = 5, 565e3ec7017SPing-Ke Shih RTW89_CHANNEL_WIDTH_10 = 6, 566e3ec7017SPing-Ke Shih }; 567e3ec7017SPing-Ke Shih 568e3ec7017SPing-Ke Shih enum rtw89_ps_mode { 569e3ec7017SPing-Ke Shih RTW89_PS_MODE_NONE = 0, 570e3ec7017SPing-Ke Shih RTW89_PS_MODE_RFOFF = 1, 571e3ec7017SPing-Ke Shih RTW89_PS_MODE_CLK_GATED = 2, 572e3ec7017SPing-Ke Shih RTW89_PS_MODE_PWR_GATED = 3, 573e3ec7017SPing-Ke Shih }; 574e3ec7017SPing-Ke Shih 575e3ec7017SPing-Ke Shih #define RTW89_2G_BW_NUM (RTW89_CHANNEL_WIDTH_40 + 1) 57694b70cafSZong-Zhe Yang #define RTW89_5G_BW_NUM (RTW89_CHANNEL_WIDTH_160 + 1) 577ac74f016SZong-Zhe Yang #define RTW89_6G_BW_NUM (RTW89_CHANNEL_WIDTH_160 + 1) 578e3ec7017SPing-Ke Shih #define RTW89_PPE_BW_NUM (RTW89_CHANNEL_WIDTH_80 + 1) 579e3ec7017SPing-Ke Shih 580e3ec7017SPing-Ke Shih enum rtw89_ru_bandwidth { 581e3ec7017SPing-Ke Shih RTW89_RU26 = 0, 582e3ec7017SPing-Ke Shih RTW89_RU52 = 1, 583e3ec7017SPing-Ke Shih RTW89_RU106 = 2, 584e3ec7017SPing-Ke Shih RTW89_RU_NUM, 585e3ec7017SPing-Ke Shih }; 586e3ec7017SPing-Ke Shih 587e3ec7017SPing-Ke Shih enum rtw89_sc_offset { 588e3ec7017SPing-Ke Shih RTW89_SC_DONT_CARE = 0, 589e3ec7017SPing-Ke Shih RTW89_SC_20_UPPER = 1, 590e3ec7017SPing-Ke Shih RTW89_SC_20_LOWER = 2, 591e3ec7017SPing-Ke Shih RTW89_SC_20_UPMOST = 3, 592e3ec7017SPing-Ke Shih RTW89_SC_20_LOWEST = 4, 593e715f10fSPing-Ke Shih RTW89_SC_20_UP2X = 5, 594e715f10fSPing-Ke Shih RTW89_SC_20_LOW2X = 6, 595e715f10fSPing-Ke Shih RTW89_SC_20_UP3X = 7, 596e715f10fSPing-Ke Shih RTW89_SC_20_LOW3X = 8, 597e3ec7017SPing-Ke Shih RTW89_SC_40_UPPER = 9, 598e3ec7017SPing-Ke Shih RTW89_SC_40_LOWER = 10, 599e3ec7017SPing-Ke Shih }; 600e3ec7017SPing-Ke Shih 601e3ec7017SPing-Ke Shih struct rtw89_channel_params { 602e3ec7017SPing-Ke Shih u8 center_chan; 603e715f10fSPing-Ke Shih u32 center_freq; 604e3ec7017SPing-Ke Shih u8 primary_chan; 605e3ec7017SPing-Ke Shih u8 bandwidth; 606e3ec7017SPing-Ke Shih u8 pri_ch_idx; 6070237f65aSZong-Zhe Yang u8 band_type; 608e0925375SZong-Zhe Yang u8 subband_type; 609e3ec7017SPing-Ke Shih }; 610e3ec7017SPing-Ke Shih 611e3ec7017SPing-Ke Shih struct rtw89_channel_help_params { 612e3ec7017SPing-Ke Shih u16 tx_en; 613e3ec7017SPing-Ke Shih }; 614e3ec7017SPing-Ke Shih 615e3ec7017SPing-Ke Shih struct rtw89_port_reg { 616e3ec7017SPing-Ke Shih u32 port_cfg; 617e3ec7017SPing-Ke Shih u32 tbtt_prohib; 618e3ec7017SPing-Ke Shih u32 bcn_area; 619e3ec7017SPing-Ke Shih u32 bcn_early; 620e3ec7017SPing-Ke Shih u32 tbtt_early; 621e3ec7017SPing-Ke Shih u32 tbtt_agg; 622e3ec7017SPing-Ke Shih u32 bcn_space; 623e3ec7017SPing-Ke Shih u32 bcn_forcetx; 624e3ec7017SPing-Ke Shih u32 bcn_err_cnt; 625e3ec7017SPing-Ke Shih u32 bcn_err_flag; 626e3ec7017SPing-Ke Shih u32 dtim_ctrl; 627e3ec7017SPing-Ke Shih u32 tbtt_shift; 628e3ec7017SPing-Ke Shih u32 bcn_cnt_tmr; 629e3ec7017SPing-Ke Shih u32 tsftr_l; 630e3ec7017SPing-Ke Shih u32 tsftr_h; 631e3ec7017SPing-Ke Shih }; 632e3ec7017SPing-Ke Shih 633e3ec7017SPing-Ke Shih struct rtw89_txwd_body { 634e3ec7017SPing-Ke Shih __le32 dword0; 635e3ec7017SPing-Ke Shih __le32 dword1; 636e3ec7017SPing-Ke Shih __le32 dword2; 637e3ec7017SPing-Ke Shih __le32 dword3; 638e3ec7017SPing-Ke Shih __le32 dword4; 639e3ec7017SPing-Ke Shih __le32 dword5; 640e3ec7017SPing-Ke Shih } __packed; 641e3ec7017SPing-Ke Shih 642e3ec7017SPing-Ke Shih struct rtw89_txwd_info { 643e3ec7017SPing-Ke Shih __le32 dword0; 644e3ec7017SPing-Ke Shih __le32 dword1; 645e3ec7017SPing-Ke Shih __le32 dword2; 646e3ec7017SPing-Ke Shih __le32 dword3; 647e3ec7017SPing-Ke Shih __le32 dword4; 648e3ec7017SPing-Ke Shih __le32 dword5; 649e3ec7017SPing-Ke Shih } __packed; 650e3ec7017SPing-Ke Shih 651e3ec7017SPing-Ke Shih struct rtw89_rx_desc_info { 652e3ec7017SPing-Ke Shih u16 pkt_size; 653e3ec7017SPing-Ke Shih u8 pkt_type; 654e3ec7017SPing-Ke Shih u8 drv_info_size; 655e3ec7017SPing-Ke Shih u8 shift; 656e3ec7017SPing-Ke Shih u8 wl_hd_iv_len; 657e3ec7017SPing-Ke Shih bool long_rxdesc; 658e3ec7017SPing-Ke Shih bool bb_sel; 659e3ec7017SPing-Ke Shih bool mac_info_valid; 660e3ec7017SPing-Ke Shih u16 data_rate; 661e3ec7017SPing-Ke Shih u8 gi_ltf; 662e3ec7017SPing-Ke Shih u8 bw; 663e3ec7017SPing-Ke Shih u32 free_run_cnt; 664e3ec7017SPing-Ke Shih u8 user_id; 665e3ec7017SPing-Ke Shih bool sr_en; 666e3ec7017SPing-Ke Shih u8 ppdu_cnt; 667e3ec7017SPing-Ke Shih u8 ppdu_type; 668e3ec7017SPing-Ke Shih bool icv_err; 669e3ec7017SPing-Ke Shih bool crc32_err; 670e3ec7017SPing-Ke Shih bool hw_dec; 671e3ec7017SPing-Ke Shih bool sw_dec; 672e3ec7017SPing-Ke Shih bool addr1_match; 673e3ec7017SPing-Ke Shih u8 frag; 674e3ec7017SPing-Ke Shih u16 seq; 675e3ec7017SPing-Ke Shih u8 frame_type; 676e3ec7017SPing-Ke Shih u8 rx_pl_id; 677e3ec7017SPing-Ke Shih bool addr_cam_valid; 678e3ec7017SPing-Ke Shih u8 addr_cam_id; 679e3ec7017SPing-Ke Shih u8 sec_cam_id; 680e3ec7017SPing-Ke Shih u8 mac_id; 681e3ec7017SPing-Ke Shih u16 offset; 682e3ec7017SPing-Ke Shih bool ready; 683e3ec7017SPing-Ke Shih }; 684e3ec7017SPing-Ke Shih 685e3ec7017SPing-Ke Shih struct rtw89_rxdesc_short { 686e3ec7017SPing-Ke Shih __le32 dword0; 687e3ec7017SPing-Ke Shih __le32 dword1; 688e3ec7017SPing-Ke Shih __le32 dword2; 689e3ec7017SPing-Ke Shih __le32 dword3; 690e3ec7017SPing-Ke Shih } __packed; 691e3ec7017SPing-Ke Shih 692e3ec7017SPing-Ke Shih struct rtw89_rxdesc_long { 693e3ec7017SPing-Ke Shih __le32 dword0; 694e3ec7017SPing-Ke Shih __le32 dword1; 695e3ec7017SPing-Ke Shih __le32 dword2; 696e3ec7017SPing-Ke Shih __le32 dword3; 697e3ec7017SPing-Ke Shih __le32 dword4; 698e3ec7017SPing-Ke Shih __le32 dword5; 699e3ec7017SPing-Ke Shih __le32 dword6; 700e3ec7017SPing-Ke Shih __le32 dword7; 701e3ec7017SPing-Ke Shih } __packed; 702e3ec7017SPing-Ke Shih 703e3ec7017SPing-Ke Shih struct rtw89_tx_desc_info { 704e3ec7017SPing-Ke Shih u16 pkt_size; 705e3ec7017SPing-Ke Shih u8 wp_offset; 7069eecaec2SPing-Ke Shih u8 mac_id; 707e3ec7017SPing-Ke Shih u8 qsel; 708e3ec7017SPing-Ke Shih u8 ch_dma; 709e3ec7017SPing-Ke Shih u8 hdr_llc_len; 710e3ec7017SPing-Ke Shih bool is_bmc; 711e3ec7017SPing-Ke Shih bool en_wd_info; 712e3ec7017SPing-Ke Shih bool wd_page; 713e3ec7017SPing-Ke Shih bool use_rate; 714e3ec7017SPing-Ke Shih bool dis_data_fb; 715e3ec7017SPing-Ke Shih bool tid_indicate; 716e3ec7017SPing-Ke Shih bool agg_en; 717e3ec7017SPing-Ke Shih bool bk; 718e3ec7017SPing-Ke Shih u8 ampdu_density; 719e3ec7017SPing-Ke Shih u8 ampdu_num; 720e3ec7017SPing-Ke Shih bool sec_en; 721e3ec7017SPing-Ke Shih u8 sec_type; 722e3ec7017SPing-Ke Shih u8 sec_cam_idx; 723e3ec7017SPing-Ke Shih u16 data_rate; 724e3ec7017SPing-Ke Shih u16 data_retry_lowest_rate; 725e3ec7017SPing-Ke Shih bool fw_dl; 726e3ec7017SPing-Ke Shih u16 seq; 727e3ec7017SPing-Ke Shih bool a_ctrl_bsr; 72891644020SPing-Ke Shih u8 hw_ssn_sel; 72991644020SPing-Ke Shih #define RTW89_MGMT_HW_SSN_SEL 1 73091644020SPing-Ke Shih u8 hw_seq_mode; 73191644020SPing-Ke Shih #define RTW89_MGMT_HW_SEQ_MODE 1 73211d261f2SPing-Ke Shih bool hiq; 7339eecaec2SPing-Ke Shih u8 port; 734e3ec7017SPing-Ke Shih }; 735e3ec7017SPing-Ke Shih 736e3ec7017SPing-Ke Shih struct rtw89_core_tx_request { 737e3ec7017SPing-Ke Shih enum rtw89_core_tx_type tx_type; 738e3ec7017SPing-Ke Shih 739e3ec7017SPing-Ke Shih struct sk_buff *skb; 740e3ec7017SPing-Ke Shih struct ieee80211_vif *vif; 741e3ec7017SPing-Ke Shih struct ieee80211_sta *sta; 742e3ec7017SPing-Ke Shih struct rtw89_tx_desc_info desc_info; 743e3ec7017SPing-Ke Shih }; 744e3ec7017SPing-Ke Shih 745e3ec7017SPing-Ke Shih struct rtw89_txq { 746e3ec7017SPing-Ke Shih struct list_head list; 747e3ec7017SPing-Ke Shih unsigned long flags; 748e3ec7017SPing-Ke Shih int wait_cnt; 749e3ec7017SPing-Ke Shih }; 750e3ec7017SPing-Ke Shih 751e3ec7017SPing-Ke Shih struct rtw89_mac_ax_gnt { 752e3ec7017SPing-Ke Shih u8 gnt_bt_sw_en; 753e3ec7017SPing-Ke Shih u8 gnt_bt; 754e3ec7017SPing-Ke Shih u8 gnt_wl_sw_en; 755e3ec7017SPing-Ke Shih u8 gnt_wl; 756e3ec7017SPing-Ke Shih }; 757e3ec7017SPing-Ke Shih 758e3ec7017SPing-Ke Shih #define RTW89_MAC_AX_COEX_GNT_NR 2 759e3ec7017SPing-Ke Shih struct rtw89_mac_ax_coex_gnt { 760e3ec7017SPing-Ke Shih struct rtw89_mac_ax_gnt band[RTW89_MAC_AX_COEX_GNT_NR]; 761e3ec7017SPing-Ke Shih }; 762e3ec7017SPing-Ke Shih 763e3ec7017SPing-Ke Shih enum rtw89_btc_ncnt { 764e3ec7017SPing-Ke Shih BTC_NCNT_POWER_ON = 0x0, 765e3ec7017SPing-Ke Shih BTC_NCNT_POWER_OFF, 766e3ec7017SPing-Ke Shih BTC_NCNT_INIT_COEX, 767e3ec7017SPing-Ke Shih BTC_NCNT_SCAN_START, 768e3ec7017SPing-Ke Shih BTC_NCNT_SCAN_FINISH, 769e3ec7017SPing-Ke Shih BTC_NCNT_SPECIAL_PACKET, 770e3ec7017SPing-Ke Shih BTC_NCNT_SWITCH_BAND, 771e3ec7017SPing-Ke Shih BTC_NCNT_RFK_TIMEOUT, 772e3ec7017SPing-Ke Shih BTC_NCNT_SHOW_COEX_INFO, 773e3ec7017SPing-Ke Shih BTC_NCNT_ROLE_INFO, 774e3ec7017SPing-Ke Shih BTC_NCNT_CONTROL, 775e3ec7017SPing-Ke Shih BTC_NCNT_RADIO_STATE, 776e3ec7017SPing-Ke Shih BTC_NCNT_CUSTOMERIZE, 777e3ec7017SPing-Ke Shih BTC_NCNT_WL_RFK, 778e3ec7017SPing-Ke Shih BTC_NCNT_WL_STA, 779e3ec7017SPing-Ke Shih BTC_NCNT_FWINFO, 780e3ec7017SPing-Ke Shih BTC_NCNT_TIMER, 781e3ec7017SPing-Ke Shih BTC_NCNT_NUM 782e3ec7017SPing-Ke Shih }; 783e3ec7017SPing-Ke Shih 784e3ec7017SPing-Ke Shih enum rtw89_btc_btinfo { 785e3ec7017SPing-Ke Shih BTC_BTINFO_L0 = 0, 786e3ec7017SPing-Ke Shih BTC_BTINFO_L1, 787e3ec7017SPing-Ke Shih BTC_BTINFO_L2, 788e3ec7017SPing-Ke Shih BTC_BTINFO_L3, 789e3ec7017SPing-Ke Shih BTC_BTINFO_H0, 790e3ec7017SPing-Ke Shih BTC_BTINFO_H1, 791e3ec7017SPing-Ke Shih BTC_BTINFO_H2, 792e3ec7017SPing-Ke Shih BTC_BTINFO_H3, 793e3ec7017SPing-Ke Shih BTC_BTINFO_MAX 794e3ec7017SPing-Ke Shih }; 795e3ec7017SPing-Ke Shih 796e3ec7017SPing-Ke Shih enum rtw89_btc_dcnt { 797e3ec7017SPing-Ke Shih BTC_DCNT_RUN = 0x0, 798e3ec7017SPing-Ke Shih BTC_DCNT_CX_RUNINFO, 799e3ec7017SPing-Ke Shih BTC_DCNT_RPT, 800e3ec7017SPing-Ke Shih BTC_DCNT_RPT_FREEZE, 801e3ec7017SPing-Ke Shih BTC_DCNT_CYCLE, 802e3ec7017SPing-Ke Shih BTC_DCNT_CYCLE_FREEZE, 803e3ec7017SPing-Ke Shih BTC_DCNT_W1, 804e3ec7017SPing-Ke Shih BTC_DCNT_W1_FREEZE, 805e3ec7017SPing-Ke Shih BTC_DCNT_B1, 806e3ec7017SPing-Ke Shih BTC_DCNT_B1_FREEZE, 807e3ec7017SPing-Ke Shih BTC_DCNT_TDMA_NONSYNC, 808e3ec7017SPing-Ke Shih BTC_DCNT_SLOT_NONSYNC, 809e3ec7017SPing-Ke Shih BTC_DCNT_BTCNT_FREEZE, 810e3ec7017SPing-Ke Shih BTC_DCNT_WL_SLOT_DRIFT, 811e3ec7017SPing-Ke Shih BTC_DCNT_WL_STA_LAST, 812e3ec7017SPing-Ke Shih BTC_DCNT_NUM, 813e3ec7017SPing-Ke Shih }; 814e3ec7017SPing-Ke Shih 815e3ec7017SPing-Ke Shih enum rtw89_btc_wl_state_cnt { 816e3ec7017SPing-Ke Shih BTC_WCNT_SCANAP = 0x0, 817e3ec7017SPing-Ke Shih BTC_WCNT_DHCP, 818e3ec7017SPing-Ke Shih BTC_WCNT_EAPOL, 819e3ec7017SPing-Ke Shih BTC_WCNT_ARP, 820e3ec7017SPing-Ke Shih BTC_WCNT_SCBDUPDATE, 821e3ec7017SPing-Ke Shih BTC_WCNT_RFK_REQ, 822e3ec7017SPing-Ke Shih BTC_WCNT_RFK_GO, 823e3ec7017SPing-Ke Shih BTC_WCNT_RFK_REJECT, 824e3ec7017SPing-Ke Shih BTC_WCNT_RFK_TIMEOUT, 825e3ec7017SPing-Ke Shih BTC_WCNT_CH_UPDATE, 826e3ec7017SPing-Ke Shih BTC_WCNT_NUM 827e3ec7017SPing-Ke Shih }; 828e3ec7017SPing-Ke Shih 829e3ec7017SPing-Ke Shih enum rtw89_btc_bt_state_cnt { 830e3ec7017SPing-Ke Shih BTC_BCNT_RETRY = 0x0, 831e3ec7017SPing-Ke Shih BTC_BCNT_REINIT, 832e3ec7017SPing-Ke Shih BTC_BCNT_REENABLE, 833e3ec7017SPing-Ke Shih BTC_BCNT_SCBDREAD, 834e3ec7017SPing-Ke Shih BTC_BCNT_RELINK, 835e3ec7017SPing-Ke Shih BTC_BCNT_IGNOWL, 836e3ec7017SPing-Ke Shih BTC_BCNT_INQPAG, 837e3ec7017SPing-Ke Shih BTC_BCNT_INQ, 838e3ec7017SPing-Ke Shih BTC_BCNT_PAGE, 839e3ec7017SPing-Ke Shih BTC_BCNT_ROLESW, 840e3ec7017SPing-Ke Shih BTC_BCNT_AFH, 841e3ec7017SPing-Ke Shih BTC_BCNT_INFOUPDATE, 842e3ec7017SPing-Ke Shih BTC_BCNT_INFOSAME, 843e3ec7017SPing-Ke Shih BTC_BCNT_SCBDUPDATE, 844e3ec7017SPing-Ke Shih BTC_BCNT_HIPRI_TX, 845e3ec7017SPing-Ke Shih BTC_BCNT_HIPRI_RX, 846e3ec7017SPing-Ke Shih BTC_BCNT_LOPRI_TX, 847e3ec7017SPing-Ke Shih BTC_BCNT_LOPRI_RX, 8488c7e9cebSChing-Te Ku BTC_BCNT_POLUT, 849e3ec7017SPing-Ke Shih BTC_BCNT_RATECHG, 850e3ec7017SPing-Ke Shih BTC_BCNT_NUM 851e3ec7017SPing-Ke Shih }; 852e3ec7017SPing-Ke Shih 853e3ec7017SPing-Ke Shih enum rtw89_btc_bt_profile { 854e3ec7017SPing-Ke Shih BTC_BT_NOPROFILE = 0, 855e3ec7017SPing-Ke Shih BTC_BT_HFP = BIT(0), 856e3ec7017SPing-Ke Shih BTC_BT_HID = BIT(1), 857e3ec7017SPing-Ke Shih BTC_BT_A2DP = BIT(2), 858e3ec7017SPing-Ke Shih BTC_BT_PAN = BIT(3), 859e3ec7017SPing-Ke Shih BTC_PROFILE_MAX = 4, 860e3ec7017SPing-Ke Shih }; 861e3ec7017SPing-Ke Shih 862e3ec7017SPing-Ke Shih struct rtw89_btc_ant_info { 863e3ec7017SPing-Ke Shih u8 type; /* shared, dedicated */ 864e3ec7017SPing-Ke Shih u8 num; 865e3ec7017SPing-Ke Shih u8 isolation; 866e3ec7017SPing-Ke Shih 867e3ec7017SPing-Ke Shih u8 single_pos: 1;/* Single antenna at S0 or S1 */ 868e3ec7017SPing-Ke Shih u8 diversity: 1; 869e3ec7017SPing-Ke Shih }; 870e3ec7017SPing-Ke Shih 871e3ec7017SPing-Ke Shih enum rtw89_tfc_dir { 872e3ec7017SPing-Ke Shih RTW89_TFC_UL, 873e3ec7017SPing-Ke Shih RTW89_TFC_DL, 874e3ec7017SPing-Ke Shih }; 875e3ec7017SPing-Ke Shih 876e3ec7017SPing-Ke Shih struct rtw89_btc_wl_smap { 877e3ec7017SPing-Ke Shih u32 busy: 1; 878e3ec7017SPing-Ke Shih u32 scan: 1; 879e3ec7017SPing-Ke Shih u32 connecting: 1; 880e3ec7017SPing-Ke Shih u32 roaming: 1; 881e3ec7017SPing-Ke Shih u32 _4way: 1; 882e3ec7017SPing-Ke Shih u32 rf_off: 1; 883e3ec7017SPing-Ke Shih u32 lps: 1; 884e3ec7017SPing-Ke Shih u32 ips: 1; 885e3ec7017SPing-Ke Shih u32 init_ok: 1; 886e3ec7017SPing-Ke Shih u32 traffic_dir : 2; 887e3ec7017SPing-Ke Shih u32 rf_off_pre: 1; 888e3ec7017SPing-Ke Shih u32 lps_pre: 1; 889e3ec7017SPing-Ke Shih }; 890e3ec7017SPing-Ke Shih 891e3ec7017SPing-Ke Shih enum rtw89_tfc_lv { 892e3ec7017SPing-Ke Shih RTW89_TFC_IDLE, 893e3ec7017SPing-Ke Shih RTW89_TFC_ULTRA_LOW, 894e3ec7017SPing-Ke Shih RTW89_TFC_LOW, 895e3ec7017SPing-Ke Shih RTW89_TFC_MID, 896e3ec7017SPing-Ke Shih RTW89_TFC_HIGH, 897e3ec7017SPing-Ke Shih }; 898e3ec7017SPing-Ke Shih 899e3ec7017SPing-Ke Shih #define RTW89_TP_SHIFT 18 /* bytes/2s --> Mbps */ 900e3ec7017SPing-Ke Shih DECLARE_EWMA(tp, 10, 2); 901e3ec7017SPing-Ke Shih 902e3ec7017SPing-Ke Shih struct rtw89_traffic_stats { 903e3ec7017SPing-Ke Shih /* units in bytes */ 904e3ec7017SPing-Ke Shih u64 tx_unicast; 905e3ec7017SPing-Ke Shih u64 rx_unicast; 906e3ec7017SPing-Ke Shih u32 tx_avg_len; 907e3ec7017SPing-Ke Shih u32 rx_avg_len; 908e3ec7017SPing-Ke Shih 909e3ec7017SPing-Ke Shih /* count for packets */ 910e3ec7017SPing-Ke Shih u64 tx_cnt; 911e3ec7017SPing-Ke Shih u64 rx_cnt; 912e3ec7017SPing-Ke Shih 913e3ec7017SPing-Ke Shih /* units in Mbps */ 914e3ec7017SPing-Ke Shih u32 tx_throughput; 915e3ec7017SPing-Ke Shih u32 rx_throughput; 916e3ec7017SPing-Ke Shih u32 tx_throughput_raw; 917e3ec7017SPing-Ke Shih u32 rx_throughput_raw; 918e3ec7017SPing-Ke Shih enum rtw89_tfc_lv tx_tfc_lv; 919e3ec7017SPing-Ke Shih enum rtw89_tfc_lv rx_tfc_lv; 920e3ec7017SPing-Ke Shih struct ewma_tp tx_ewma_tp; 921e3ec7017SPing-Ke Shih struct ewma_tp rx_ewma_tp; 922e3ec7017SPing-Ke Shih 923e3ec7017SPing-Ke Shih u16 tx_rate; 924e3ec7017SPing-Ke Shih u16 rx_rate; 925e3ec7017SPing-Ke Shih }; 926e3ec7017SPing-Ke Shih 927e3ec7017SPing-Ke Shih struct rtw89_btc_statistic { 928e3ec7017SPing-Ke Shih u8 rssi; /* 0%~110% (dBm = rssi -110) */ 929e3ec7017SPing-Ke Shih struct rtw89_traffic_stats traffic; 930e3ec7017SPing-Ke Shih }; 931e3ec7017SPing-Ke Shih 932e3ec7017SPing-Ke Shih #define BTC_WL_RSSI_THMAX 4 933e3ec7017SPing-Ke Shih 934e3ec7017SPing-Ke Shih struct rtw89_btc_wl_link_info { 935e3ec7017SPing-Ke Shih struct rtw89_btc_statistic stat; 936e3ec7017SPing-Ke Shih enum rtw89_tfc_dir dir; 937e3ec7017SPing-Ke Shih u8 rssi_state[BTC_WL_RSSI_THMAX]; 938e3ec7017SPing-Ke Shih u8 mac_addr[ETH_ALEN]; 939e3ec7017SPing-Ke Shih u8 busy; 940e3ec7017SPing-Ke Shih u8 ch; 941e3ec7017SPing-Ke Shih u8 bw; 942e3ec7017SPing-Ke Shih u8 band; 943e3ec7017SPing-Ke Shih u8 role; 944e3ec7017SPing-Ke Shih u8 pid; 945e3ec7017SPing-Ke Shih u8 phy; 946e3ec7017SPing-Ke Shih u8 dtim_period; 947e3ec7017SPing-Ke Shih u8 mode; 948e3ec7017SPing-Ke Shih 949e3ec7017SPing-Ke Shih u8 mac_id; 950e3ec7017SPing-Ke Shih u8 tx_retry; 951e3ec7017SPing-Ke Shih 952e3ec7017SPing-Ke Shih u32 bcn_period; 953e3ec7017SPing-Ke Shih u32 busy_t; 954e3ec7017SPing-Ke Shih u32 tx_time; 955e3ec7017SPing-Ke Shih u32 client_cnt; 956e3ec7017SPing-Ke Shih u32 rx_rate_drop_cnt; 957e3ec7017SPing-Ke Shih 958e3ec7017SPing-Ke Shih u32 active: 1; 959e3ec7017SPing-Ke Shih u32 noa: 1; 960e3ec7017SPing-Ke Shih u32 client_ps: 1; 961e3ec7017SPing-Ke Shih u32 connected: 2; 962e3ec7017SPing-Ke Shih }; 963e3ec7017SPing-Ke Shih 964e3ec7017SPing-Ke Shih union rtw89_btc_wl_state_map { 965e3ec7017SPing-Ke Shih u32 val; 966e3ec7017SPing-Ke Shih struct rtw89_btc_wl_smap map; 967e3ec7017SPing-Ke Shih }; 968e3ec7017SPing-Ke Shih 969e3ec7017SPing-Ke Shih struct rtw89_btc_bt_hfp_desc { 970e3ec7017SPing-Ke Shih u32 exist: 1; 971e3ec7017SPing-Ke Shih u32 type: 2; 972e3ec7017SPing-Ke Shih u32 rsvd: 29; 973e3ec7017SPing-Ke Shih }; 974e3ec7017SPing-Ke Shih 975e3ec7017SPing-Ke Shih struct rtw89_btc_bt_hid_desc { 976e3ec7017SPing-Ke Shih u32 exist: 1; 977e3ec7017SPing-Ke Shih u32 slot_info: 2; 978e3ec7017SPing-Ke Shih u32 pair_cnt: 2; 979e3ec7017SPing-Ke Shih u32 type: 8; 980e3ec7017SPing-Ke Shih u32 rsvd: 19; 981e3ec7017SPing-Ke Shih }; 982e3ec7017SPing-Ke Shih 983e3ec7017SPing-Ke Shih struct rtw89_btc_bt_a2dp_desc { 984e3ec7017SPing-Ke Shih u8 exist: 1; 985e3ec7017SPing-Ke Shih u8 exist_last: 1; 986e3ec7017SPing-Ke Shih u8 play_latency: 1; 987e3ec7017SPing-Ke Shih u8 type: 3; 988e3ec7017SPing-Ke Shih u8 active: 1; 989e3ec7017SPing-Ke Shih u8 sink: 1; 990e3ec7017SPing-Ke Shih 991e3ec7017SPing-Ke Shih u8 bitpool; 992e3ec7017SPing-Ke Shih u16 vendor_id; 993e3ec7017SPing-Ke Shih u32 device_name; 994e3ec7017SPing-Ke Shih u32 flush_time; 995e3ec7017SPing-Ke Shih }; 996e3ec7017SPing-Ke Shih 997e3ec7017SPing-Ke Shih struct rtw89_btc_bt_pan_desc { 998e3ec7017SPing-Ke Shih u32 exist: 1; 999e3ec7017SPing-Ke Shih u32 type: 1; 1000e3ec7017SPing-Ke Shih u32 active: 1; 1001e3ec7017SPing-Ke Shih u32 rsvd: 29; 1002e3ec7017SPing-Ke Shih }; 1003e3ec7017SPing-Ke Shih 1004e3ec7017SPing-Ke Shih struct rtw89_btc_bt_rfk_info { 1005e3ec7017SPing-Ke Shih u32 run: 1; 1006e3ec7017SPing-Ke Shih u32 req: 1; 1007e3ec7017SPing-Ke Shih u32 timeout: 1; 1008e3ec7017SPing-Ke Shih u32 rsvd: 29; 1009e3ec7017SPing-Ke Shih }; 1010e3ec7017SPing-Ke Shih 1011e3ec7017SPing-Ke Shih union rtw89_btc_bt_rfk_info_map { 1012e3ec7017SPing-Ke Shih u32 val; 1013e3ec7017SPing-Ke Shih struct rtw89_btc_bt_rfk_info map; 1014e3ec7017SPing-Ke Shih }; 1015e3ec7017SPing-Ke Shih 1016e3ec7017SPing-Ke Shih struct rtw89_btc_bt_ver_info { 1017e3ec7017SPing-Ke Shih u32 fw_coex; /* match with which coex_ver */ 1018e3ec7017SPing-Ke Shih u32 fw; 1019e3ec7017SPing-Ke Shih }; 1020e3ec7017SPing-Ke Shih 1021e3ec7017SPing-Ke Shih struct rtw89_btc_bool_sta_chg { 1022e3ec7017SPing-Ke Shih u32 now: 1; 1023e3ec7017SPing-Ke Shih u32 last: 1; 1024e3ec7017SPing-Ke Shih u32 remain: 1; 1025e3ec7017SPing-Ke Shih u32 srvd: 29; 1026e3ec7017SPing-Ke Shih }; 1027e3ec7017SPing-Ke Shih 1028e3ec7017SPing-Ke Shih struct rtw89_btc_u8_sta_chg { 1029e3ec7017SPing-Ke Shih u8 now; 1030e3ec7017SPing-Ke Shih u8 last; 1031e3ec7017SPing-Ke Shih u8 remain; 1032e3ec7017SPing-Ke Shih u8 rsvd; 1033e3ec7017SPing-Ke Shih }; 1034e3ec7017SPing-Ke Shih 1035e3ec7017SPing-Ke Shih struct rtw89_btc_wl_scan_info { 1036e3ec7017SPing-Ke Shih u8 band[RTW89_PHY_MAX]; 1037e3ec7017SPing-Ke Shih u8 phy_map; 1038e3ec7017SPing-Ke Shih u8 rsvd; 1039e3ec7017SPing-Ke Shih }; 1040e3ec7017SPing-Ke Shih 1041e3ec7017SPing-Ke Shih struct rtw89_btc_wl_dbcc_info { 1042e3ec7017SPing-Ke Shih u8 op_band[RTW89_PHY_MAX]; /* op band in each phy */ 1043e3ec7017SPing-Ke Shih u8 scan_band[RTW89_PHY_MAX]; /* scan band in each phy */ 1044e3ec7017SPing-Ke Shih u8 real_band[RTW89_PHY_MAX]; 1045e3ec7017SPing-Ke Shih u8 role[RTW89_PHY_MAX]; /* role in each phy */ 1046e3ec7017SPing-Ke Shih }; 1047e3ec7017SPing-Ke Shih 1048e3ec7017SPing-Ke Shih struct rtw89_btc_wl_active_role { 1049e3ec7017SPing-Ke Shih u8 connected: 1; 1050e3ec7017SPing-Ke Shih u8 pid: 3; 1051e3ec7017SPing-Ke Shih u8 phy: 1; 1052e3ec7017SPing-Ke Shih u8 noa: 1; 1053e3ec7017SPing-Ke Shih u8 band: 2; 1054e3ec7017SPing-Ke Shih 1055e3ec7017SPing-Ke Shih u8 client_ps: 1; 1056e3ec7017SPing-Ke Shih u8 bw: 7; 1057e3ec7017SPing-Ke Shih 1058e3ec7017SPing-Ke Shih u8 role; 1059e3ec7017SPing-Ke Shih u8 ch; 1060e3ec7017SPing-Ke Shih 1061e3ec7017SPing-Ke Shih u16 tx_lvl; 1062e3ec7017SPing-Ke Shih u16 rx_lvl; 1063e3ec7017SPing-Ke Shih u16 tx_rate; 1064e3ec7017SPing-Ke Shih u16 rx_rate; 1065e3ec7017SPing-Ke Shih }; 1066e3ec7017SPing-Ke Shih 1067e3ec7017SPing-Ke Shih struct rtw89_btc_wl_role_info_bpos { 1068e3ec7017SPing-Ke Shih u16 none: 1; 1069e3ec7017SPing-Ke Shih u16 station: 1; 1070e3ec7017SPing-Ke Shih u16 ap: 1; 1071e3ec7017SPing-Ke Shih u16 vap: 1; 1072e3ec7017SPing-Ke Shih u16 adhoc: 1; 1073e3ec7017SPing-Ke Shih u16 adhoc_master: 1; 1074e3ec7017SPing-Ke Shih u16 mesh: 1; 1075e3ec7017SPing-Ke Shih u16 moniter: 1; 1076e3ec7017SPing-Ke Shih u16 p2p_device: 1; 1077e3ec7017SPing-Ke Shih u16 p2p_gc: 1; 1078e3ec7017SPing-Ke Shih u16 p2p_go: 1; 1079e3ec7017SPing-Ke Shih u16 nan: 1; 1080e3ec7017SPing-Ke Shih }; 1081e3ec7017SPing-Ke Shih 1082e3ec7017SPing-Ke Shih union rtw89_btc_wl_role_info_map { 1083e3ec7017SPing-Ke Shih u16 val; 1084e3ec7017SPing-Ke Shih struct rtw89_btc_wl_role_info_bpos role; 1085e3ec7017SPing-Ke Shih }; 1086e3ec7017SPing-Ke Shih 1087e3ec7017SPing-Ke Shih struct rtw89_btc_wl_role_info { /* struct size must be n*4 bytes */ 1088e3ec7017SPing-Ke Shih u8 connect_cnt; 1089e3ec7017SPing-Ke Shih u8 link_mode; 1090e3ec7017SPing-Ke Shih union rtw89_btc_wl_role_info_map role_map; 109120d9fc88SPing-Ke Shih struct rtw89_btc_wl_active_role active_role[RTW89_PORT_NUM]; 1092e3ec7017SPing-Ke Shih }; 1093e3ec7017SPing-Ke Shih 1094e3ec7017SPing-Ke Shih struct rtw89_btc_wl_ver_info { 1095e3ec7017SPing-Ke Shih u32 fw_coex; /* match with which coex_ver */ 1096e3ec7017SPing-Ke Shih u32 fw; 1097e3ec7017SPing-Ke Shih u32 mac; 1098e3ec7017SPing-Ke Shih u32 bb; 1099e3ec7017SPing-Ke Shih u32 rf; 1100e3ec7017SPing-Ke Shih }; 1101e3ec7017SPing-Ke Shih 1102e3ec7017SPing-Ke Shih struct rtw89_btc_wl_afh_info { 1103e3ec7017SPing-Ke Shih u8 en; 1104e3ec7017SPing-Ke Shih u8 ch; 1105e3ec7017SPing-Ke Shih u8 bw; 1106e3ec7017SPing-Ke Shih u8 rsvd; 1107e3ec7017SPing-Ke Shih } __packed; 1108e3ec7017SPing-Ke Shih 1109e3ec7017SPing-Ke Shih struct rtw89_btc_wl_rfk_info { 1110e3ec7017SPing-Ke Shih u32 state: 2; 1111e3ec7017SPing-Ke Shih u32 path_map: 4; 1112e3ec7017SPing-Ke Shih u32 phy_map: 2; 1113e3ec7017SPing-Ke Shih u32 band: 2; 1114e3ec7017SPing-Ke Shih u32 type: 8; 1115e3ec7017SPing-Ke Shih u32 rsvd: 14; 1116e3ec7017SPing-Ke Shih }; 1117e3ec7017SPing-Ke Shih 1118e3ec7017SPing-Ke Shih struct rtw89_btc_bt_smap { 1119e3ec7017SPing-Ke Shih u32 connect: 1; 1120e3ec7017SPing-Ke Shih u32 ble_connect: 1; 1121e3ec7017SPing-Ke Shih u32 acl_busy: 1; 1122e3ec7017SPing-Ke Shih u32 sco_busy: 1; 1123e3ec7017SPing-Ke Shih u32 mesh_busy: 1; 1124e3ec7017SPing-Ke Shih u32 inq_pag: 1; 1125e3ec7017SPing-Ke Shih }; 1126e3ec7017SPing-Ke Shih 1127e3ec7017SPing-Ke Shih union rtw89_btc_bt_state_map { 1128e3ec7017SPing-Ke Shih u32 val; 1129e3ec7017SPing-Ke Shih struct rtw89_btc_bt_smap map; 1130e3ec7017SPing-Ke Shih }; 1131e3ec7017SPing-Ke Shih 1132e3ec7017SPing-Ke Shih #define BTC_BT_RSSI_THMAX 4 1133e3ec7017SPing-Ke Shih #define BTC_BT_AFH_GROUP 12 1134e3ec7017SPing-Ke Shih 1135e3ec7017SPing-Ke Shih struct rtw89_btc_bt_link_info { 1136e3ec7017SPing-Ke Shih struct rtw89_btc_u8_sta_chg profile_cnt; 1137e3ec7017SPing-Ke Shih struct rtw89_btc_bool_sta_chg multi_link; 1138e3ec7017SPing-Ke Shih struct rtw89_btc_bool_sta_chg relink; 1139e3ec7017SPing-Ke Shih struct rtw89_btc_bt_hfp_desc hfp_desc; 1140e3ec7017SPing-Ke Shih struct rtw89_btc_bt_hid_desc hid_desc; 1141e3ec7017SPing-Ke Shih struct rtw89_btc_bt_a2dp_desc a2dp_desc; 1142e3ec7017SPing-Ke Shih struct rtw89_btc_bt_pan_desc pan_desc; 1143e3ec7017SPing-Ke Shih union rtw89_btc_bt_state_map status; 1144e3ec7017SPing-Ke Shih 1145e3ec7017SPing-Ke Shih u8 sut_pwr_level[BTC_PROFILE_MAX]; 1146e3ec7017SPing-Ke Shih u8 golden_rx_shift[BTC_PROFILE_MAX]; 1147e3ec7017SPing-Ke Shih u8 rssi_state[BTC_BT_RSSI_THMAX]; 1148e3ec7017SPing-Ke Shih u8 afh_map[BTC_BT_AFH_GROUP]; 1149e3ec7017SPing-Ke Shih 1150e3ec7017SPing-Ke Shih u32 role_sw: 1; 1151e3ec7017SPing-Ke Shih u32 slave_role: 1; 1152e3ec7017SPing-Ke Shih u32 afh_update: 1; 1153e3ec7017SPing-Ke Shih u32 cqddr: 1; 1154e3ec7017SPing-Ke Shih u32 rssi: 8; 1155e3ec7017SPing-Ke Shih u32 tx_3m: 1; 1156e3ec7017SPing-Ke Shih u32 rsvd: 19; 1157e3ec7017SPing-Ke Shih }; 1158e3ec7017SPing-Ke Shih 1159e3ec7017SPing-Ke Shih struct rtw89_btc_3rdcx_info { 1160e3ec7017SPing-Ke Shih u8 type; /* 0: none, 1:zigbee, 2:LTE */ 1161e3ec7017SPing-Ke Shih u8 hw_coex; 1162e3ec7017SPing-Ke Shih u16 rsvd; 1163e3ec7017SPing-Ke Shih }; 1164e3ec7017SPing-Ke Shih 1165e3ec7017SPing-Ke Shih struct rtw89_btc_dm_emap { 1166e3ec7017SPing-Ke Shih u32 init: 1; 1167e3ec7017SPing-Ke Shih u32 pta_owner: 1; 1168e3ec7017SPing-Ke Shih u32 wl_rfk_timeout: 1; 1169e3ec7017SPing-Ke Shih u32 bt_rfk_timeout: 1; 1170e3ec7017SPing-Ke Shih 1171e3ec7017SPing-Ke Shih u32 wl_fw_hang: 1; 1172e3ec7017SPing-Ke Shih u32 offload_mismatch: 1; 1173e3ec7017SPing-Ke Shih u32 cycle_hang: 1; 1174e3ec7017SPing-Ke Shih u32 w1_hang: 1; 1175e3ec7017SPing-Ke Shih 1176e3ec7017SPing-Ke Shih u32 b1_hang: 1; 1177e3ec7017SPing-Ke Shih u32 tdma_no_sync: 1; 1178e3ec7017SPing-Ke Shih u32 wl_slot_drift: 1; 1179e3ec7017SPing-Ke Shih }; 1180e3ec7017SPing-Ke Shih 1181e3ec7017SPing-Ke Shih union rtw89_btc_dm_error_map { 1182e3ec7017SPing-Ke Shih u32 val; 1183e3ec7017SPing-Ke Shih struct rtw89_btc_dm_emap map; 1184e3ec7017SPing-Ke Shih }; 1185e3ec7017SPing-Ke Shih 1186e3ec7017SPing-Ke Shih struct rtw89_btc_rf_para { 1187e3ec7017SPing-Ke Shih u32 tx_pwr_freerun; 1188e3ec7017SPing-Ke Shih u32 rx_gain_freerun; 1189e3ec7017SPing-Ke Shih u32 tx_pwr_perpkt; 1190e3ec7017SPing-Ke Shih u32 rx_gain_perpkt; 1191e3ec7017SPing-Ke Shih }; 1192e3ec7017SPing-Ke Shih 1193e3ec7017SPing-Ke Shih struct rtw89_btc_wl_info { 119420d9fc88SPing-Ke Shih struct rtw89_btc_wl_link_info link_info[RTW89_PORT_NUM]; 1195e3ec7017SPing-Ke Shih struct rtw89_btc_wl_rfk_info rfk_info; 1196e3ec7017SPing-Ke Shih struct rtw89_btc_wl_ver_info ver_info; 1197e3ec7017SPing-Ke Shih struct rtw89_btc_wl_afh_info afh_info; 1198e3ec7017SPing-Ke Shih struct rtw89_btc_wl_role_info role_info; 1199e3ec7017SPing-Ke Shih struct rtw89_btc_wl_scan_info scan_info; 1200e3ec7017SPing-Ke Shih struct rtw89_btc_wl_dbcc_info dbcc_info; 1201e3ec7017SPing-Ke Shih struct rtw89_btc_rf_para rf_para; 1202e3ec7017SPing-Ke Shih union rtw89_btc_wl_state_map status; 1203e3ec7017SPing-Ke Shih 1204e3ec7017SPing-Ke Shih u8 port_id[RTW89_WIFI_ROLE_MLME_MAX]; 1205e3ec7017SPing-Ke Shih u8 rssi_level; 1206e3ec7017SPing-Ke Shih 1207e3ec7017SPing-Ke Shih u32 scbd; 1208e3ec7017SPing-Ke Shih }; 1209e3ec7017SPing-Ke Shih 1210e3ec7017SPing-Ke Shih struct rtw89_btc_module { 1211e3ec7017SPing-Ke Shih struct rtw89_btc_ant_info ant; 1212e3ec7017SPing-Ke Shih u8 rfe_type; 1213e3ec7017SPing-Ke Shih u8 cv; 1214e3ec7017SPing-Ke Shih 1215e3ec7017SPing-Ke Shih u8 bt_solo: 1; 1216e3ec7017SPing-Ke Shih u8 bt_pos: 1; 1217e3ec7017SPing-Ke Shih u8 switch_type: 1; 1218e3ec7017SPing-Ke Shih 1219e3ec7017SPing-Ke Shih u8 rsvd; 1220e3ec7017SPing-Ke Shih }; 1221e3ec7017SPing-Ke Shih 1222e3ec7017SPing-Ke Shih #define RTW89_BTC_DM_MAXSTEP 30 1223e3ec7017SPing-Ke Shih #define RTW89_BTC_DM_CNT_MAX (RTW89_BTC_DM_MAXSTEP * 8) 1224e3ec7017SPing-Ke Shih 1225e3ec7017SPing-Ke Shih struct rtw89_btc_dm_step { 1226e3ec7017SPing-Ke Shih u16 step[RTW89_BTC_DM_MAXSTEP]; 1227e3ec7017SPing-Ke Shih u8 step_pos; 1228e3ec7017SPing-Ke Shih bool step_ov; 1229e3ec7017SPing-Ke Shih }; 1230e3ec7017SPing-Ke Shih 1231e3ec7017SPing-Ke Shih struct rtw89_btc_init_info { 1232e3ec7017SPing-Ke Shih struct rtw89_btc_module module; 1233e3ec7017SPing-Ke Shih u8 wl_guard_ch; 1234e3ec7017SPing-Ke Shih 1235e3ec7017SPing-Ke Shih u8 wl_only: 1; 1236e3ec7017SPing-Ke Shih u8 wl_init_ok: 1; 1237e3ec7017SPing-Ke Shih u8 dbcc_en: 1; 1238e3ec7017SPing-Ke Shih u8 cx_other: 1; 1239e3ec7017SPing-Ke Shih u8 bt_only: 1; 1240e3ec7017SPing-Ke Shih 1241e3ec7017SPing-Ke Shih u16 rsvd; 1242e3ec7017SPing-Ke Shih }; 1243e3ec7017SPing-Ke Shih 1244e3ec7017SPing-Ke Shih struct rtw89_btc_wl_tx_limit_para { 1245e3ec7017SPing-Ke Shih u16 enable; 1246e3ec7017SPing-Ke Shih u32 tx_time; /* unit: us */ 1247e3ec7017SPing-Ke Shih u16 tx_retry; 1248e3ec7017SPing-Ke Shih }; 1249e3ec7017SPing-Ke Shih 1250e3ec7017SPing-Ke Shih struct rtw89_btc_bt_scan_info { 1251e3ec7017SPing-Ke Shih u16 win; 1252e3ec7017SPing-Ke Shih u16 intvl; 1253e3ec7017SPing-Ke Shih u32 enable: 1; 1254e3ec7017SPing-Ke Shih u32 interlace: 1; 1255e3ec7017SPing-Ke Shih u32 rsvd: 30; 1256e3ec7017SPing-Ke Shih }; 1257e3ec7017SPing-Ke Shih 1258e3ec7017SPing-Ke Shih enum rtw89_btc_bt_scan_type { 1259e3ec7017SPing-Ke Shih BTC_SCAN_INQ = 0, 1260e3ec7017SPing-Ke Shih BTC_SCAN_PAGE, 1261e3ec7017SPing-Ke Shih BTC_SCAN_BLE, 1262e3ec7017SPing-Ke Shih BTC_SCAN_INIT, 1263e3ec7017SPing-Ke Shih BTC_SCAN_TV, 1264e3ec7017SPing-Ke Shih BTC_SCAN_ADV, 1265e3ec7017SPing-Ke Shih BTC_SCAN_MAX1, 1266e3ec7017SPing-Ke Shih }; 1267e3ec7017SPing-Ke Shih 1268e3ec7017SPing-Ke Shih struct rtw89_btc_bt_info { 1269e3ec7017SPing-Ke Shih struct rtw89_btc_bt_link_info link_info; 1270e3ec7017SPing-Ke Shih struct rtw89_btc_bt_scan_info scan_info[BTC_SCAN_MAX1]; 1271e3ec7017SPing-Ke Shih struct rtw89_btc_bt_ver_info ver_info; 1272e3ec7017SPing-Ke Shih struct rtw89_btc_bool_sta_chg enable; 1273e3ec7017SPing-Ke Shih struct rtw89_btc_bool_sta_chg inq_pag; 1274e3ec7017SPing-Ke Shih struct rtw89_btc_rf_para rf_para; 1275e3ec7017SPing-Ke Shih union rtw89_btc_bt_rfk_info_map rfk_info; 1276e3ec7017SPing-Ke Shih 1277e3ec7017SPing-Ke Shih u8 raw_info[BTC_BTINFO_MAX]; /* raw bt info from mailbox */ 1278e3ec7017SPing-Ke Shih 1279e3ec7017SPing-Ke Shih u32 scbd; 1280e3ec7017SPing-Ke Shih u32 feature; 1281e3ec7017SPing-Ke Shih 1282e3ec7017SPing-Ke Shih u32 mbx_avl: 1; 1283e3ec7017SPing-Ke Shih u32 whql_test: 1; 1284e3ec7017SPing-Ke Shih u32 igno_wl: 1; 1285e3ec7017SPing-Ke Shih u32 reinit: 1; 1286e3ec7017SPing-Ke Shih u32 ble_scan_en: 1; 1287e3ec7017SPing-Ke Shih u32 btg_type: 1; 1288e3ec7017SPing-Ke Shih u32 inq: 1; 1289e3ec7017SPing-Ke Shih u32 pag: 1; 1290e3ec7017SPing-Ke Shih u32 run_patch_code: 1; 1291e3ec7017SPing-Ke Shih u32 hi_lna_rx: 1; 1292e3ec7017SPing-Ke Shih u32 rsvd: 22; 1293e3ec7017SPing-Ke Shih }; 1294e3ec7017SPing-Ke Shih 1295e3ec7017SPing-Ke Shih struct rtw89_btc_cx { 1296e3ec7017SPing-Ke Shih struct rtw89_btc_wl_info wl; 1297e3ec7017SPing-Ke Shih struct rtw89_btc_bt_info bt; 1298e3ec7017SPing-Ke Shih struct rtw89_btc_3rdcx_info other; 1299e3ec7017SPing-Ke Shih u32 state_map; 1300e3ec7017SPing-Ke Shih u32 cnt_bt[BTC_BCNT_NUM]; 1301e3ec7017SPing-Ke Shih u32 cnt_wl[BTC_WCNT_NUM]; 1302e3ec7017SPing-Ke Shih }; 1303e3ec7017SPing-Ke Shih 1304e3ec7017SPing-Ke Shih struct rtw89_btc_fbtc_tdma { 1305e3ec7017SPing-Ke Shih u8 type; 1306e3ec7017SPing-Ke Shih u8 rxflctrl; 1307e3ec7017SPing-Ke Shih u8 txpause; 1308e3ec7017SPing-Ke Shih u8 wtgle_n; 1309e3ec7017SPing-Ke Shih u8 leak_n; 1310e3ec7017SPing-Ke Shih u8 ext_ctrl; 1311e3ec7017SPing-Ke Shih u8 rsvd0; 1312e3ec7017SPing-Ke Shih u8 rsvd1; 1313e3ec7017SPing-Ke Shih } __packed; 1314e3ec7017SPing-Ke Shih 1315e3ec7017SPing-Ke Shih #define CXMREG_MAX 30 1316e3ec7017SPing-Ke Shih #define FCXMAX_STEP 255 /*STEP trace record cnt, Max:65535, default:255*/ 1317e3ec7017SPing-Ke Shih #define BTCRPT_VER 1 1318e3ec7017SPing-Ke Shih #define BTC_CYCLE_SLOT_MAX 48 /* must be even number, non-zero */ 1319e3ec7017SPing-Ke Shih 1320e3ec7017SPing-Ke Shih enum rtw89_btc_bt_rfk_counter { 1321e3ec7017SPing-Ke Shih BTC_BCNT_RFK_REQ = 0, 1322e3ec7017SPing-Ke Shih BTC_BCNT_RFK_GO = 1, 1323e3ec7017SPing-Ke Shih BTC_BCNT_RFK_REJECT = 2, 1324e3ec7017SPing-Ke Shih BTC_BCNT_RFK_FAIL = 3, 1325e3ec7017SPing-Ke Shih BTC_BCNT_RFK_TIMEOUT = 4, 1326e3ec7017SPing-Ke Shih BTC_BCNT_RFK_MAX 1327e3ec7017SPing-Ke Shih }; 1328e3ec7017SPing-Ke Shih 1329e3ec7017SPing-Ke Shih struct rtw89_btc_fbtc_rpt_ctrl { 1330e3ec7017SPing-Ke Shih u16 fver; 1331e3ec7017SPing-Ke Shih u16 rpt_cnt; /* tmr counters */ 1332e3ec7017SPing-Ke Shih u32 wl_fw_coex_ver; /* match which driver's coex version */ 1333e3ec7017SPing-Ke Shih u32 wl_fw_cx_offload; 1334e3ec7017SPing-Ke Shih u32 wl_fw_ver; 1335e3ec7017SPing-Ke Shih u32 rpt_enable; 1336e3ec7017SPing-Ke Shih u32 rpt_para; /* ms */ 1337e3ec7017SPing-Ke Shih u32 mb_send_fail_cnt; /* fw send mailbox fail counter */ 1338e3ec7017SPing-Ke Shih u32 mb_send_ok_cnt; /* fw send mailbox ok counter */ 1339e3ec7017SPing-Ke Shih u32 mb_recv_cnt; /* fw recv mailbox counter */ 1340e3ec7017SPing-Ke Shih u32 mb_a2dp_empty_cnt; /* a2dp empty count */ 1341e3ec7017SPing-Ke Shih u32 mb_a2dp_flct_cnt; /* a2dp empty flow control counter */ 1342e3ec7017SPing-Ke Shih u32 mb_a2dp_full_cnt; /* a2dp empty full counter */ 1343e3ec7017SPing-Ke Shih u32 bt_rfk_cnt[BTC_BCNT_RFK_MAX]; 1344e3ec7017SPing-Ke Shih u32 c2h_cnt; /* fw send c2h counter */ 1345e3ec7017SPing-Ke Shih u32 h2c_cnt; /* fw recv h2c counter */ 1346e3ec7017SPing-Ke Shih } __packed; 1347e3ec7017SPing-Ke Shih 1348e3ec7017SPing-Ke Shih enum rtw89_fbtc_ext_ctrl_type { 1349e3ec7017SPing-Ke Shih CXECTL_OFF = 0x0, /* tdma off */ 1350e3ec7017SPing-Ke Shih CXECTL_B2 = 0x1, /* allow B2 (beacon-early) */ 1351e3ec7017SPing-Ke Shih CXECTL_EXT = 0x2, 1352e3ec7017SPing-Ke Shih CXECTL_MAX 1353e3ec7017SPing-Ke Shih }; 1354e3ec7017SPing-Ke Shih 1355e3ec7017SPing-Ke Shih union rtw89_btc_fbtc_rxflct { 1356e3ec7017SPing-Ke Shih u8 val; 1357e3ec7017SPing-Ke Shih u8 type: 3; 1358e3ec7017SPing-Ke Shih u8 tgln_n: 5; 1359e3ec7017SPing-Ke Shih }; 1360e3ec7017SPing-Ke Shih 1361e3ec7017SPing-Ke Shih enum rtw89_btc_cxst_state { 1362e3ec7017SPing-Ke Shih CXST_OFF = 0x0, 1363e3ec7017SPing-Ke Shih CXST_B2W = 0x1, 1364e3ec7017SPing-Ke Shih CXST_W1 = 0x2, 1365e3ec7017SPing-Ke Shih CXST_W2 = 0x3, 1366e3ec7017SPing-Ke Shih CXST_W2B = 0x4, 1367e3ec7017SPing-Ke Shih CXST_B1 = 0x5, 1368e3ec7017SPing-Ke Shih CXST_B2 = 0x6, 1369e3ec7017SPing-Ke Shih CXST_B3 = 0x7, 1370e3ec7017SPing-Ke Shih CXST_B4 = 0x8, 1371e3ec7017SPing-Ke Shih CXST_LK = 0x9, 1372e3ec7017SPing-Ke Shih CXST_BLK = 0xa, 1373e3ec7017SPing-Ke Shih CXST_E2G = 0xb, 1374e3ec7017SPing-Ke Shih CXST_E5G = 0xc, 1375e3ec7017SPing-Ke Shih CXST_EBT = 0xd, 1376e3ec7017SPing-Ke Shih CXST_ENULL = 0xe, 1377e3ec7017SPing-Ke Shih CXST_WLK = 0xf, 1378e3ec7017SPing-Ke Shih CXST_W1FDD = 0x10, 1379e3ec7017SPing-Ke Shih CXST_B1FDD = 0x11, 1380e3ec7017SPing-Ke Shih CXST_MAX = 0x12, 1381e3ec7017SPing-Ke Shih }; 1382e3ec7017SPing-Ke Shih 1383e3ec7017SPing-Ke Shih enum { 1384e3ec7017SPing-Ke Shih CXBCN_ALL = 0x0, 1385e3ec7017SPing-Ke Shih CXBCN_ALL_OK, 1386e3ec7017SPing-Ke Shih CXBCN_BT_SLOT, 1387e3ec7017SPing-Ke Shih CXBCN_BT_OK, 1388e3ec7017SPing-Ke Shih CXBCN_MAX 1389e3ec7017SPing-Ke Shih }; 1390e3ec7017SPing-Ke Shih 1391e3ec7017SPing-Ke Shih enum btc_slot_type { 1392e3ec7017SPing-Ke Shih SLOT_MIX = 0x0, /* accept BT Lower-Pri Tx/Rx request 0x778 = 1 */ 1393e3ec7017SPing-Ke Shih SLOT_ISO = 0x1, /* no accept BT Lower-Pri Tx/Rx request 0x778 = d*/ 1394e3ec7017SPing-Ke Shih CXSTYPE_NUM, 1395e3ec7017SPing-Ke Shih }; 1396e3ec7017SPing-Ke Shih 1397e3ec7017SPing-Ke Shih enum { /* TIME */ 1398e3ec7017SPing-Ke Shih CXT_BT = 0x0, 1399e3ec7017SPing-Ke Shih CXT_WL = 0x1, 1400e3ec7017SPing-Ke Shih CXT_MAX 1401e3ec7017SPing-Ke Shih }; 1402e3ec7017SPing-Ke Shih 1403e3ec7017SPing-Ke Shih enum { /* TIME-A2DP */ 1404e3ec7017SPing-Ke Shih CXT_FLCTRL_OFF = 0x0, 1405e3ec7017SPing-Ke Shih CXT_FLCTRL_ON = 0x1, 1406e3ec7017SPing-Ke Shih CXT_FLCTRL_MAX 1407e3ec7017SPing-Ke Shih }; 1408e3ec7017SPing-Ke Shih 1409e3ec7017SPing-Ke Shih enum { /* STEP TYPE */ 1410e3ec7017SPing-Ke Shih CXSTEP_NONE = 0x0, 1411e3ec7017SPing-Ke Shih CXSTEP_EVNT = 0x1, 1412e3ec7017SPing-Ke Shih CXSTEP_SLOT = 0x2, 1413e3ec7017SPing-Ke Shih CXSTEP_MAX, 1414e3ec7017SPing-Ke Shih }; 1415e3ec7017SPing-Ke Shih 1416e3ec7017SPing-Ke Shih #define FCXGPIODBG_VER 1 1417e3ec7017SPing-Ke Shih #define BTC_DBG_MAX1 32 1418e3ec7017SPing-Ke Shih struct rtw89_btc_fbtc_gpio_dbg { 1419e3ec7017SPing-Ke Shih u8 fver; 1420e3ec7017SPing-Ke Shih u8 rsvd; 1421e3ec7017SPing-Ke Shih u16 rsvd2; 1422e3ec7017SPing-Ke Shih u32 en_map; /* which debug signal (see btc_wl_gpio_debug) is enable */ 1423e3ec7017SPing-Ke Shih u32 pre_state; /* the debug signal is 1 or 0 */ 1424e3ec7017SPing-Ke Shih u8 gpio_map[BTC_DBG_MAX1]; /*the debug signals to GPIO-Position */ 1425e3ec7017SPing-Ke Shih } __packed; 1426e3ec7017SPing-Ke Shih 1427e3ec7017SPing-Ke Shih #define FCXMREG_VER 1 1428e3ec7017SPing-Ke Shih struct rtw89_btc_fbtc_mreg_val { 1429e3ec7017SPing-Ke Shih u8 fver; 1430e3ec7017SPing-Ke Shih u8 reg_num; 1431e3ec7017SPing-Ke Shih __le16 rsvd; 1432e3ec7017SPing-Ke Shih __le32 mreg_val[CXMREG_MAX]; 1433e3ec7017SPing-Ke Shih } __packed; 1434e3ec7017SPing-Ke Shih 1435e3ec7017SPing-Ke Shih #define RTW89_DEF_FBTC_MREG(__type, __bytes, __offset) \ 1436e3ec7017SPing-Ke Shih { .type = cpu_to_le16(__type), .bytes = cpu_to_le16(__bytes), \ 1437e3ec7017SPing-Ke Shih .offset = cpu_to_le32(__offset), } 1438e3ec7017SPing-Ke Shih 1439e3ec7017SPing-Ke Shih struct rtw89_btc_fbtc_mreg { 1440e3ec7017SPing-Ke Shih __le16 type; 1441e3ec7017SPing-Ke Shih __le16 bytes; 1442e3ec7017SPing-Ke Shih __le32 offset; 1443e3ec7017SPing-Ke Shih } __packed; 1444e3ec7017SPing-Ke Shih 1445e3ec7017SPing-Ke Shih struct rtw89_btc_fbtc_slot { 1446e3ec7017SPing-Ke Shih __le16 dur; 1447e3ec7017SPing-Ke Shih __le32 cxtbl; 1448e3ec7017SPing-Ke Shih __le16 cxtype; 1449e3ec7017SPing-Ke Shih } __packed; 1450e3ec7017SPing-Ke Shih 1451e3ec7017SPing-Ke Shih #define FCXSLOTS_VER 1 1452e3ec7017SPing-Ke Shih struct rtw89_btc_fbtc_slots { 1453e3ec7017SPing-Ke Shih u8 fver; 1454e3ec7017SPing-Ke Shih u8 tbl_num; 1455e3ec7017SPing-Ke Shih __le16 rsvd; 1456e3ec7017SPing-Ke Shih __le32 update_map; 1457e3ec7017SPing-Ke Shih struct rtw89_btc_fbtc_slot slot[CXST_MAX]; 1458e3ec7017SPing-Ke Shih } __packed; 1459e3ec7017SPing-Ke Shih 1460e3ec7017SPing-Ke Shih #define FCXSTEP_VER 2 1461e3ec7017SPing-Ke Shih struct rtw89_btc_fbtc_step { 1462e3ec7017SPing-Ke Shih u8 type; 1463e3ec7017SPing-Ke Shih u8 val; 1464e3ec7017SPing-Ke Shih __le16 difft; 1465e3ec7017SPing-Ke Shih } __packed; 1466e3ec7017SPing-Ke Shih 1467e3ec7017SPing-Ke Shih struct rtw89_btc_fbtc_steps { 1468e3ec7017SPing-Ke Shih u8 fver; 1469e3ec7017SPing-Ke Shih u8 rsvd; 1470e3ec7017SPing-Ke Shih __le16 cnt; 1471e3ec7017SPing-Ke Shih __le16 pos_old; 1472e3ec7017SPing-Ke Shih __le16 pos_new; 1473e3ec7017SPing-Ke Shih struct rtw89_btc_fbtc_step step[FCXMAX_STEP]; 1474e3ec7017SPing-Ke Shih } __packed; 1475e3ec7017SPing-Ke Shih 1476e3ec7017SPing-Ke Shih #define FCXCYSTA_VER 2 1477e3ec7017SPing-Ke Shih struct rtw89_btc_fbtc_cysta { /* statistics for cycles */ 1478e3ec7017SPing-Ke Shih u8 fver; 1479e3ec7017SPing-Ke Shih u8 rsvd; 1480e3ec7017SPing-Ke Shih __le16 cycles; /* total cycle number */ 1481e3ec7017SPing-Ke Shih __le16 cycles_a2dp[CXT_FLCTRL_MAX]; 1482e3ec7017SPing-Ke Shih __le16 a2dpept; /* a2dp empty cnt */ 1483e3ec7017SPing-Ke Shih __le16 a2dpeptto; /* a2dp empty timeout cnt*/ 1484e3ec7017SPing-Ke Shih __le16 tavg_cycle[CXT_MAX]; /* avg wl/bt cycle time */ 1485e3ec7017SPing-Ke Shih __le16 tmax_cycle[CXT_MAX]; /* max wl/bt cycle time */ 1486e3ec7017SPing-Ke Shih __le16 tmaxdiff_cycle[CXT_MAX]; /* max wl-wl bt-bt cycle diff time */ 1487e3ec7017SPing-Ke Shih __le16 tavg_a2dp[CXT_FLCTRL_MAX]; /* avg a2dp PSTDMA/TDMA time */ 1488e3ec7017SPing-Ke Shih __le16 tmax_a2dp[CXT_FLCTRL_MAX]; /* max a2dp PSTDMA/TDMA time */ 1489e3ec7017SPing-Ke Shih __le16 tavg_a2dpept; /* avg a2dp empty time */ 1490e3ec7017SPing-Ke Shih __le16 tmax_a2dpept; /* max a2dp empty time */ 1491e3ec7017SPing-Ke Shih __le16 tavg_lk; /* avg leak-slot time */ 1492e3ec7017SPing-Ke Shih __le16 tmax_lk; /* max leak-slot time */ 1493e3ec7017SPing-Ke Shih __le32 slot_cnt[CXST_MAX]; /* slot count */ 1494e3ec7017SPing-Ke Shih __le32 bcn_cnt[CXBCN_MAX]; 1495e3ec7017SPing-Ke Shih __le32 leakrx_cnt; /* the rximr occur at leak slot */ 1496e3ec7017SPing-Ke Shih __le32 collision_cnt; /* counter for event/timer occur at same time */ 1497e3ec7017SPing-Ke Shih __le32 skip_cnt; 1498e3ec7017SPing-Ke Shih __le32 exception; 1499e3ec7017SPing-Ke Shih __le32 except_cnt; 1500e3ec7017SPing-Ke Shih __le16 tslot_cycle[BTC_CYCLE_SLOT_MAX]; 1501e3ec7017SPing-Ke Shih } __packed; 1502e3ec7017SPing-Ke Shih 1503e3ec7017SPing-Ke Shih #define FCXNULLSTA_VER 1 1504e3ec7017SPing-Ke Shih struct rtw89_btc_fbtc_cynullsta { /* cycle null statistics */ 1505e3ec7017SPing-Ke Shih u8 fver; 1506e3ec7017SPing-Ke Shih u8 rsvd; 1507e3ec7017SPing-Ke Shih __le16 rsvd2; 1508e3ec7017SPing-Ke Shih __le32 max_t[2]; /* max_t for 0:null0/1:null1 */ 1509e3ec7017SPing-Ke Shih __le32 avg_t[2]; /* avg_t for 0:null0/1:null1 */ 1510e3ec7017SPing-Ke Shih __le32 result[2][4]; /* 0:fail, 1:ok, 2:on_time, 3:retry */ 1511e3ec7017SPing-Ke Shih } __packed; 1512e3ec7017SPing-Ke Shih 1513e3ec7017SPing-Ke Shih #define FCX_BTVER_VER 1 1514e3ec7017SPing-Ke Shih struct rtw89_btc_fbtc_btver { 1515e3ec7017SPing-Ke Shih u8 fver; 1516e3ec7017SPing-Ke Shih u8 rsvd; 1517e3ec7017SPing-Ke Shih __le16 rsvd2; 1518e3ec7017SPing-Ke Shih __le32 coex_ver; /*bit[15:8]->shared, bit[7:0]->non-shared */ 1519e3ec7017SPing-Ke Shih __le32 fw_ver; 1520e3ec7017SPing-Ke Shih __le32 feature; 1521e3ec7017SPing-Ke Shih } __packed; 1522e3ec7017SPing-Ke Shih 1523e3ec7017SPing-Ke Shih #define FCX_BTSCAN_VER 1 1524e3ec7017SPing-Ke Shih struct rtw89_btc_fbtc_btscan { 1525e3ec7017SPing-Ke Shih u8 fver; 1526e3ec7017SPing-Ke Shih u8 rsvd; 1527e3ec7017SPing-Ke Shih __le16 rsvd2; 1528e3ec7017SPing-Ke Shih u8 scan[6]; 1529e3ec7017SPing-Ke Shih } __packed; 1530e3ec7017SPing-Ke Shih 1531e3ec7017SPing-Ke Shih #define FCX_BTAFH_VER 1 1532e3ec7017SPing-Ke Shih struct rtw89_btc_fbtc_btafh { 1533e3ec7017SPing-Ke Shih u8 fver; 1534e3ec7017SPing-Ke Shih u8 rsvd; 1535e3ec7017SPing-Ke Shih __le16 rsvd2; 1536e3ec7017SPing-Ke Shih u8 afh_l[4]; /*bit0:2402, bit1: 2403.... bit31:2433 */ 1537e3ec7017SPing-Ke Shih u8 afh_m[4]; /*bit0:2434, bit1: 2435.... bit31:2465 */ 1538e3ec7017SPing-Ke Shih u8 afh_h[4]; /*bit0:2466, bit1:2467......bit14:2480 */ 1539e3ec7017SPing-Ke Shih } __packed; 1540e3ec7017SPing-Ke Shih 1541e3ec7017SPing-Ke Shih #define FCX_BTDEVINFO_VER 1 1542e3ec7017SPing-Ke Shih struct rtw89_btc_fbtc_btdevinfo { 1543e3ec7017SPing-Ke Shih u8 fver; 1544e3ec7017SPing-Ke Shih u8 rsvd; 1545e3ec7017SPing-Ke Shih __le16 vendor_id; 1546e3ec7017SPing-Ke Shih __le32 dev_name; /* only 24 bits valid */ 1547e3ec7017SPing-Ke Shih __le32 flush_time; 1548e3ec7017SPing-Ke Shih } __packed; 1549e3ec7017SPing-Ke Shih 1550e3ec7017SPing-Ke Shih #define RTW89_BTC_WL_DEF_TX_PWR GENMASK(7, 0) 1551e3ec7017SPing-Ke Shih struct rtw89_btc_rf_trx_para { 1552e3ec7017SPing-Ke Shih u32 wl_tx_power; /* absolute Tx power (dBm), 0xff-> no BTC control */ 1553e3ec7017SPing-Ke Shih u32 wl_rx_gain; /* rx gain table index (TBD.) */ 1554e3ec7017SPing-Ke Shih u8 bt_tx_power; /* decrease Tx power (dB) */ 1555e3ec7017SPing-Ke Shih u8 bt_rx_gain; /* LNA constrain level */ 1556e3ec7017SPing-Ke Shih }; 1557e3ec7017SPing-Ke Shih 1558e3ec7017SPing-Ke Shih struct rtw89_btc_dm { 1559e3ec7017SPing-Ke Shih struct rtw89_btc_fbtc_slot slot[CXST_MAX]; 1560e3ec7017SPing-Ke Shih struct rtw89_btc_fbtc_slot slot_now[CXST_MAX]; 1561e3ec7017SPing-Ke Shih struct rtw89_btc_fbtc_tdma tdma; 1562e3ec7017SPing-Ke Shih struct rtw89_btc_fbtc_tdma tdma_now; 1563e3ec7017SPing-Ke Shih struct rtw89_mac_ax_coex_gnt gnt; 1564e3ec7017SPing-Ke Shih struct rtw89_btc_init_info init_info; /* pass to wl_fw if offload */ 1565e3ec7017SPing-Ke Shih struct rtw89_btc_rf_trx_para rf_trx_para; 1566e3ec7017SPing-Ke Shih struct rtw89_btc_wl_tx_limit_para wl_tx_limit; 1567e3ec7017SPing-Ke Shih struct rtw89_btc_dm_step dm_step; 1568e3ec7017SPing-Ke Shih union rtw89_btc_dm_error_map error; 1569e3ec7017SPing-Ke Shih u32 cnt_dm[BTC_DCNT_NUM]; 1570e3ec7017SPing-Ke Shih u32 cnt_notify[BTC_NCNT_NUM]; 1571e3ec7017SPing-Ke Shih 1572e3ec7017SPing-Ke Shih u32 update_slot_map; 1573e3ec7017SPing-Ke Shih u32 set_ant_path; 1574e3ec7017SPing-Ke Shih 1575e3ec7017SPing-Ke Shih u32 wl_only: 1; 1576e3ec7017SPing-Ke Shih u32 wl_fw_cx_offload: 1; 1577e3ec7017SPing-Ke Shih u32 freerun: 1; 1578e3ec7017SPing-Ke Shih u32 wl_ps_ctrl: 2; 1579e3ec7017SPing-Ke Shih u32 wl_mimo_ps: 1; 1580e3ec7017SPing-Ke Shih u32 leak_ap: 1; 1581e3ec7017SPing-Ke Shih u32 noisy_level: 3; 1582e3ec7017SPing-Ke Shih u32 coex_info_map: 8; 1583e3ec7017SPing-Ke Shih u32 bt_only: 1; 1584e3ec7017SPing-Ke Shih u32 wl_btg_rx: 1; 1585e3ec7017SPing-Ke Shih u32 trx_para_level: 8; 1586e3ec7017SPing-Ke Shih u32 wl_stb_chg: 1; 1587e3ec7017SPing-Ke Shih u32 rsvd: 3; 1588e3ec7017SPing-Ke Shih 1589e3ec7017SPing-Ke Shih u16 slot_dur[CXST_MAX]; 1590e3ec7017SPing-Ke Shih 1591e3ec7017SPing-Ke Shih u8 run_reason; 1592e3ec7017SPing-Ke Shih u8 run_action; 1593e3ec7017SPing-Ke Shih }; 1594e3ec7017SPing-Ke Shih 1595e3ec7017SPing-Ke Shih struct rtw89_btc_ctrl { 1596e3ec7017SPing-Ke Shih u32 manual: 1; 1597e3ec7017SPing-Ke Shih u32 igno_bt: 1; 1598e3ec7017SPing-Ke Shih u32 always_freerun: 1; 1599e3ec7017SPing-Ke Shih u32 trace_step: 16; 1600e3ec7017SPing-Ke Shih u32 rsvd: 12; 1601e3ec7017SPing-Ke Shih }; 1602e3ec7017SPing-Ke Shih 1603e3ec7017SPing-Ke Shih struct rtw89_btc_dbg { 1604e3ec7017SPing-Ke Shih /* cmd "rb" */ 1605e3ec7017SPing-Ke Shih bool rb_done; 1606e3ec7017SPing-Ke Shih u32 rb_val; 1607e3ec7017SPing-Ke Shih }; 1608e3ec7017SPing-Ke Shih 1609e3ec7017SPing-Ke Shih #define FCXTDMA_VER 1 1610e3ec7017SPing-Ke Shih 1611e3ec7017SPing-Ke Shih enum rtw89_btc_btf_fw_event { 1612e3ec7017SPing-Ke Shih BTF_EVNT_RPT = 0, 1613e3ec7017SPing-Ke Shih BTF_EVNT_BT_INFO = 1, 1614e3ec7017SPing-Ke Shih BTF_EVNT_BT_SCBD = 2, 1615e3ec7017SPing-Ke Shih BTF_EVNT_BT_REG = 3, 1616e3ec7017SPing-Ke Shih BTF_EVNT_CX_RUNINFO = 4, 1617e3ec7017SPing-Ke Shih BTF_EVNT_BT_PSD = 5, 1618e3ec7017SPing-Ke Shih BTF_EVNT_BUF_OVERFLOW, 1619e3ec7017SPing-Ke Shih BTF_EVNT_C2H_LOOPBACK, 1620e3ec7017SPing-Ke Shih BTF_EVNT_MAX, 1621e3ec7017SPing-Ke Shih }; 1622e3ec7017SPing-Ke Shih 1623e3ec7017SPing-Ke Shih enum btf_fw_event_report { 1624e3ec7017SPing-Ke Shih BTC_RPT_TYPE_CTRL = 0x0, 1625e3ec7017SPing-Ke Shih BTC_RPT_TYPE_TDMA, 1626e3ec7017SPing-Ke Shih BTC_RPT_TYPE_SLOT, 1627e3ec7017SPing-Ke Shih BTC_RPT_TYPE_CYSTA, 1628e3ec7017SPing-Ke Shih BTC_RPT_TYPE_STEP, 1629e3ec7017SPing-Ke Shih BTC_RPT_TYPE_NULLSTA, 1630e3ec7017SPing-Ke Shih BTC_RPT_TYPE_MREG, 1631e3ec7017SPing-Ke Shih BTC_RPT_TYPE_GPIO_DBG, 1632e3ec7017SPing-Ke Shih BTC_RPT_TYPE_BT_VER, 1633e3ec7017SPing-Ke Shih BTC_RPT_TYPE_BT_SCAN, 1634e3ec7017SPing-Ke Shih BTC_RPT_TYPE_BT_AFH, 1635e3ec7017SPing-Ke Shih BTC_RPT_TYPE_BT_DEVICE, 1636e3ec7017SPing-Ke Shih BTC_RPT_TYPE_TEST, 1637e3ec7017SPing-Ke Shih BTC_RPT_TYPE_MAX = 31 1638e3ec7017SPing-Ke Shih }; 1639e3ec7017SPing-Ke Shih 1640e3ec7017SPing-Ke Shih enum rtw_btc_btf_reg_type { 1641e3ec7017SPing-Ke Shih REG_MAC = 0x0, 1642e3ec7017SPing-Ke Shih REG_BB = 0x1, 1643e3ec7017SPing-Ke Shih REG_RF = 0x2, 1644e3ec7017SPing-Ke Shih REG_BT_RF = 0x3, 1645e3ec7017SPing-Ke Shih REG_BT_MODEM = 0x4, 1646e3ec7017SPing-Ke Shih REG_BT_BLUEWIZE = 0x5, 1647e3ec7017SPing-Ke Shih REG_BT_VENDOR = 0x6, 1648e3ec7017SPing-Ke Shih REG_BT_LE = 0x7, 1649e3ec7017SPing-Ke Shih REG_MAX_TYPE, 1650e3ec7017SPing-Ke Shih }; 1651e3ec7017SPing-Ke Shih 1652e3ec7017SPing-Ke Shih struct rtw89_btc_rpt_cmn_info { 1653e3ec7017SPing-Ke Shih u32 rx_cnt; 1654e3ec7017SPing-Ke Shih u32 rx_len; 1655e3ec7017SPing-Ke Shih u32 req_len; /* expected rsp len */ 1656e3ec7017SPing-Ke Shih u8 req_fver; /* expected rsp fver */ 1657e3ec7017SPing-Ke Shih u8 rsp_fver; /* fver from fw */ 1658e3ec7017SPing-Ke Shih u8 valid; 1659e3ec7017SPing-Ke Shih } __packed; 1660e3ec7017SPing-Ke Shih 1661e3ec7017SPing-Ke Shih struct rtw89_btc_report_ctrl_state { 1662e3ec7017SPing-Ke Shih struct rtw89_btc_rpt_cmn_info cinfo; /* common info, by driver */ 1663e3ec7017SPing-Ke Shih struct rtw89_btc_fbtc_rpt_ctrl finfo; /* info from fw */ 1664e3ec7017SPing-Ke Shih }; 1665e3ec7017SPing-Ke Shih 1666e3ec7017SPing-Ke Shih struct rtw89_btc_rpt_fbtc_tdma { 1667e3ec7017SPing-Ke Shih struct rtw89_btc_rpt_cmn_info cinfo; /* common info, by driver */ 1668e3ec7017SPing-Ke Shih struct rtw89_btc_fbtc_tdma finfo; /* info from fw */ 1669e3ec7017SPing-Ke Shih }; 1670e3ec7017SPing-Ke Shih 1671e3ec7017SPing-Ke Shih struct rtw89_btc_rpt_fbtc_slots { 1672e3ec7017SPing-Ke Shih struct rtw89_btc_rpt_cmn_info cinfo; /* common info, by driver */ 1673e3ec7017SPing-Ke Shih struct rtw89_btc_fbtc_slots finfo; /* info from fw */ 1674e3ec7017SPing-Ke Shih }; 1675e3ec7017SPing-Ke Shih 1676e3ec7017SPing-Ke Shih struct rtw89_btc_rpt_fbtc_cysta { 1677e3ec7017SPing-Ke Shih struct rtw89_btc_rpt_cmn_info cinfo; /* common info, by driver */ 1678e3ec7017SPing-Ke Shih struct rtw89_btc_fbtc_cysta finfo; /* info from fw */ 1679e3ec7017SPing-Ke Shih }; 1680e3ec7017SPing-Ke Shih 1681e3ec7017SPing-Ke Shih struct rtw89_btc_rpt_fbtc_step { 1682e3ec7017SPing-Ke Shih struct rtw89_btc_rpt_cmn_info cinfo; /* common info, by driver */ 1683e3ec7017SPing-Ke Shih struct rtw89_btc_fbtc_steps finfo; /* info from fw */ 1684e3ec7017SPing-Ke Shih }; 1685e3ec7017SPing-Ke Shih 1686e3ec7017SPing-Ke Shih struct rtw89_btc_rpt_fbtc_nullsta { 1687e3ec7017SPing-Ke Shih struct rtw89_btc_rpt_cmn_info cinfo; /* common info, by driver */ 1688e3ec7017SPing-Ke Shih struct rtw89_btc_fbtc_cynullsta finfo; /* info from fw */ 1689e3ec7017SPing-Ke Shih }; 1690e3ec7017SPing-Ke Shih 1691e3ec7017SPing-Ke Shih struct rtw89_btc_rpt_fbtc_mreg { 1692e3ec7017SPing-Ke Shih struct rtw89_btc_rpt_cmn_info cinfo; /* common info, by driver */ 1693e3ec7017SPing-Ke Shih struct rtw89_btc_fbtc_mreg_val finfo; /* info from fw */ 1694e3ec7017SPing-Ke Shih }; 1695e3ec7017SPing-Ke Shih 1696e3ec7017SPing-Ke Shih struct rtw89_btc_rpt_fbtc_gpio_dbg { 1697e3ec7017SPing-Ke Shih struct rtw89_btc_rpt_cmn_info cinfo; /* common info, by driver */ 1698e3ec7017SPing-Ke Shih struct rtw89_btc_fbtc_gpio_dbg finfo; /* info from fw */ 1699e3ec7017SPing-Ke Shih }; 1700e3ec7017SPing-Ke Shih 1701e3ec7017SPing-Ke Shih struct rtw89_btc_rpt_fbtc_btver { 1702e3ec7017SPing-Ke Shih struct rtw89_btc_rpt_cmn_info cinfo; /* common info, by driver */ 1703e3ec7017SPing-Ke Shih struct rtw89_btc_fbtc_btver finfo; /* info from fw */ 1704e3ec7017SPing-Ke Shih }; 1705e3ec7017SPing-Ke Shih 1706e3ec7017SPing-Ke Shih struct rtw89_btc_rpt_fbtc_btscan { 1707e3ec7017SPing-Ke Shih struct rtw89_btc_rpt_cmn_info cinfo; /* common info, by driver */ 1708e3ec7017SPing-Ke Shih struct rtw89_btc_fbtc_btscan finfo; /* info from fw */ 1709e3ec7017SPing-Ke Shih }; 1710e3ec7017SPing-Ke Shih 1711e3ec7017SPing-Ke Shih struct rtw89_btc_rpt_fbtc_btafh { 1712e3ec7017SPing-Ke Shih struct rtw89_btc_rpt_cmn_info cinfo; /* common info, by driver */ 1713e3ec7017SPing-Ke Shih struct rtw89_btc_fbtc_btafh finfo; /* info from fw */ 1714e3ec7017SPing-Ke Shih }; 1715e3ec7017SPing-Ke Shih 1716e3ec7017SPing-Ke Shih struct rtw89_btc_rpt_fbtc_btdev { 1717e3ec7017SPing-Ke Shih struct rtw89_btc_rpt_cmn_info cinfo; /* common info, by driver */ 1718e3ec7017SPing-Ke Shih struct rtw89_btc_fbtc_btdevinfo finfo; /* info from fw */ 1719e3ec7017SPing-Ke Shih }; 1720e3ec7017SPing-Ke Shih 1721e3ec7017SPing-Ke Shih enum rtw89_btc_btfre_type { 1722e3ec7017SPing-Ke Shih BTFRE_INVALID_INPUT = 0x0, /* invalid input parameters */ 1723e3ec7017SPing-Ke Shih BTFRE_UNDEF_TYPE, 1724e3ec7017SPing-Ke Shih BTFRE_EXCEPTION, 1725e3ec7017SPing-Ke Shih BTFRE_MAX, 1726e3ec7017SPing-Ke Shih }; 1727e3ec7017SPing-Ke Shih 1728e3ec7017SPing-Ke Shih struct rtw89_btc_btf_fwinfo { 1729e3ec7017SPing-Ke Shih u32 cnt_c2h; 1730e3ec7017SPing-Ke Shih u32 cnt_h2c; 1731e3ec7017SPing-Ke Shih u32 cnt_h2c_fail; 1732e3ec7017SPing-Ke Shih u32 event[BTF_EVNT_MAX]; 1733e3ec7017SPing-Ke Shih 1734e3ec7017SPing-Ke Shih u32 err[BTFRE_MAX]; 1735e3ec7017SPing-Ke Shih u32 len_mismch; 1736e3ec7017SPing-Ke Shih u32 fver_mismch; 1737e3ec7017SPing-Ke Shih u32 rpt_en_map; 1738e3ec7017SPing-Ke Shih 1739e3ec7017SPing-Ke Shih struct rtw89_btc_report_ctrl_state rpt_ctrl; 1740e3ec7017SPing-Ke Shih struct rtw89_btc_rpt_fbtc_tdma rpt_fbtc_tdma; 1741e3ec7017SPing-Ke Shih struct rtw89_btc_rpt_fbtc_slots rpt_fbtc_slots; 1742e3ec7017SPing-Ke Shih struct rtw89_btc_rpt_fbtc_cysta rpt_fbtc_cysta; 1743e3ec7017SPing-Ke Shih struct rtw89_btc_rpt_fbtc_step rpt_fbtc_step; 1744e3ec7017SPing-Ke Shih struct rtw89_btc_rpt_fbtc_nullsta rpt_fbtc_nullsta; 1745e3ec7017SPing-Ke Shih struct rtw89_btc_rpt_fbtc_mreg rpt_fbtc_mregval; 1746e3ec7017SPing-Ke Shih struct rtw89_btc_rpt_fbtc_gpio_dbg rpt_fbtc_gpio_dbg; 1747e3ec7017SPing-Ke Shih struct rtw89_btc_rpt_fbtc_btver rpt_fbtc_btver; 1748e3ec7017SPing-Ke Shih struct rtw89_btc_rpt_fbtc_btscan rpt_fbtc_btscan; 1749e3ec7017SPing-Ke Shih struct rtw89_btc_rpt_fbtc_btafh rpt_fbtc_btafh; 1750e3ec7017SPing-Ke Shih struct rtw89_btc_rpt_fbtc_btdev rpt_fbtc_btdev; 1751e3ec7017SPing-Ke Shih }; 1752e3ec7017SPing-Ke Shih 1753e3ec7017SPing-Ke Shih #define RTW89_BTC_POLICY_MAXLEN 512 1754e3ec7017SPing-Ke Shih 1755e3ec7017SPing-Ke Shih struct rtw89_btc { 1756e3ec7017SPing-Ke Shih struct rtw89_btc_cx cx; 1757e3ec7017SPing-Ke Shih struct rtw89_btc_dm dm; 1758e3ec7017SPing-Ke Shih struct rtw89_btc_ctrl ctrl; 1759e3ec7017SPing-Ke Shih struct rtw89_btc_module mdinfo; 1760e3ec7017SPing-Ke Shih struct rtw89_btc_btf_fwinfo fwinfo; 1761e3ec7017SPing-Ke Shih struct rtw89_btc_dbg dbg; 1762e3ec7017SPing-Ke Shih 1763e3ec7017SPing-Ke Shih struct work_struct eapol_notify_work; 1764e3ec7017SPing-Ke Shih struct work_struct arp_notify_work; 1765e3ec7017SPing-Ke Shih struct work_struct dhcp_notify_work; 1766e3ec7017SPing-Ke Shih struct work_struct icmp_notify_work; 1767e3ec7017SPing-Ke Shih 1768e3ec7017SPing-Ke Shih u32 bt_req_len; 1769e3ec7017SPing-Ke Shih 1770e3ec7017SPing-Ke Shih u8 policy[RTW89_BTC_POLICY_MAXLEN]; 1771e3ec7017SPing-Ke Shih u16 policy_len; 1772e3ec7017SPing-Ke Shih u16 policy_type; 1773e3ec7017SPing-Ke Shih bool bt_req_en; 1774e3ec7017SPing-Ke Shih bool update_policy_force; 1775e3ec7017SPing-Ke Shih bool lps; 1776e3ec7017SPing-Ke Shih }; 1777e3ec7017SPing-Ke Shih 1778e3ec7017SPing-Ke Shih enum rtw89_ra_mode { 1779e3ec7017SPing-Ke Shih RTW89_RA_MODE_CCK = BIT(0), 1780e3ec7017SPing-Ke Shih RTW89_RA_MODE_OFDM = BIT(1), 1781e3ec7017SPing-Ke Shih RTW89_RA_MODE_HT = BIT(2), 1782e3ec7017SPing-Ke Shih RTW89_RA_MODE_VHT = BIT(3), 1783e3ec7017SPing-Ke Shih RTW89_RA_MODE_HE = BIT(4), 1784e3ec7017SPing-Ke Shih }; 1785e3ec7017SPing-Ke Shih 1786e3ec7017SPing-Ke Shih enum rtw89_ra_report_mode { 1787e3ec7017SPing-Ke Shih RTW89_RA_RPT_MODE_LEGACY, 1788e3ec7017SPing-Ke Shih RTW89_RA_RPT_MODE_HT, 1789e3ec7017SPing-Ke Shih RTW89_RA_RPT_MODE_VHT, 1790e3ec7017SPing-Ke Shih RTW89_RA_RPT_MODE_HE, 1791e3ec7017SPing-Ke Shih }; 1792e3ec7017SPing-Ke Shih 1793e3ec7017SPing-Ke Shih enum rtw89_dig_noisy_level { 1794e3ec7017SPing-Ke Shih RTW89_DIG_NOISY_LEVEL0 = -1, 1795e3ec7017SPing-Ke Shih RTW89_DIG_NOISY_LEVEL1 = 0, 1796e3ec7017SPing-Ke Shih RTW89_DIG_NOISY_LEVEL2 = 1, 1797e3ec7017SPing-Ke Shih RTW89_DIG_NOISY_LEVEL3 = 2, 1798e3ec7017SPing-Ke Shih RTW89_DIG_NOISY_LEVEL_MAX = 3, 1799e3ec7017SPing-Ke Shih }; 1800e3ec7017SPing-Ke Shih 1801e3ec7017SPing-Ke Shih enum rtw89_gi_ltf { 1802e3ec7017SPing-Ke Shih RTW89_GILTF_LGI_4XHE32 = 0, 1803e3ec7017SPing-Ke Shih RTW89_GILTF_SGI_4XHE08 = 1, 1804e3ec7017SPing-Ke Shih RTW89_GILTF_2XHE16 = 2, 1805e3ec7017SPing-Ke Shih RTW89_GILTF_2XHE08 = 3, 1806e3ec7017SPing-Ke Shih RTW89_GILTF_1XHE16 = 4, 1807e3ec7017SPing-Ke Shih RTW89_GILTF_1XHE08 = 5, 1808e3ec7017SPing-Ke Shih RTW89_GILTF_MAX 1809e3ec7017SPing-Ke Shih }; 1810e3ec7017SPing-Ke Shih 1811e3ec7017SPing-Ke Shih enum rtw89_rx_frame_type { 1812e3ec7017SPing-Ke Shih RTW89_RX_TYPE_MGNT = 0, 1813e3ec7017SPing-Ke Shih RTW89_RX_TYPE_CTRL = 1, 1814e3ec7017SPing-Ke Shih RTW89_RX_TYPE_DATA = 2, 1815e3ec7017SPing-Ke Shih RTW89_RX_TYPE_RSVD = 3, 1816e3ec7017SPing-Ke Shih }; 1817e3ec7017SPing-Ke Shih 1818e3ec7017SPing-Ke Shih struct rtw89_ra_info { 1819e3ec7017SPing-Ke Shih u8 is_dis_ra:1; 1820e3ec7017SPing-Ke Shih /* Bit0 : CCK 1821e3ec7017SPing-Ke Shih * Bit1 : OFDM 1822e3ec7017SPing-Ke Shih * Bit2 : HT 1823e3ec7017SPing-Ke Shih * Bit3 : VHT 1824e3ec7017SPing-Ke Shih * Bit4 : HE 1825e3ec7017SPing-Ke Shih */ 1826e3ec7017SPing-Ke Shih u8 mode_ctrl:5; 1827e3ec7017SPing-Ke Shih u8 bw_cap:2; 1828e3ec7017SPing-Ke Shih u8 macid; 1829e3ec7017SPing-Ke Shih u8 dcm_cap:1; 1830e3ec7017SPing-Ke Shih u8 er_cap:1; 1831e3ec7017SPing-Ke Shih u8 init_rate_lv:2; 1832e3ec7017SPing-Ke Shih u8 upd_all:1; 1833e3ec7017SPing-Ke Shih u8 en_sgi:1; 1834e3ec7017SPing-Ke Shih u8 ldpc_cap:1; 1835e3ec7017SPing-Ke Shih u8 stbc_cap:1; 1836e3ec7017SPing-Ke Shih u8 ss_num:3; 1837e3ec7017SPing-Ke Shih u8 giltf:3; 1838e3ec7017SPing-Ke Shih u8 upd_bw_nss_mask:1; 1839e3ec7017SPing-Ke Shih u8 upd_mask:1; 1840e3ec7017SPing-Ke Shih u64 ra_mask; /* 63 bits ra_mask + 1 bit CSI ctrl */ 1841e3ec7017SPing-Ke Shih /* BFee CSI */ 1842e3ec7017SPing-Ke Shih u8 band_num; 1843e3ec7017SPing-Ke Shih u8 ra_csi_rate_en:1; 1844e3ec7017SPing-Ke Shih u8 fixed_csi_rate_en:1; 1845e3ec7017SPing-Ke Shih u8 cr_tbl_sel:1; 1846e3ec7017SPing-Ke Shih u8 rsvd2:5; 1847e3ec7017SPing-Ke Shih u8 csi_mcs_ss_idx; 1848e3ec7017SPing-Ke Shih u8 csi_mode:2; 1849e3ec7017SPing-Ke Shih u8 csi_gi_ltf:3; 1850e3ec7017SPing-Ke Shih u8 csi_bw:3; 1851e3ec7017SPing-Ke Shih }; 1852e3ec7017SPing-Ke Shih 1853e3ec7017SPing-Ke Shih #define RTW89_PPDU_MAX_USR 4 1854e3ec7017SPing-Ke Shih #define RTW89_PPDU_MAC_INFO_USR_SIZE 4 1855e3ec7017SPing-Ke Shih #define RTW89_PPDU_MAC_INFO_SIZE 8 1856e3ec7017SPing-Ke Shih #define RTW89_PPDU_MAC_RX_CNT_SIZE 96 1857e3ec7017SPing-Ke Shih 1858e3ec7017SPing-Ke Shih #define RTW89_MAX_RX_AGG_NUM 64 1859e3ec7017SPing-Ke Shih #define RTW89_MAX_TX_AGG_NUM 128 1860e3ec7017SPing-Ke Shih 1861e3ec7017SPing-Ke Shih struct rtw89_ampdu_params { 1862e3ec7017SPing-Ke Shih u16 agg_num; 1863e3ec7017SPing-Ke Shih bool amsdu; 1864e3ec7017SPing-Ke Shih }; 1865e3ec7017SPing-Ke Shih 1866e3ec7017SPing-Ke Shih struct rtw89_ra_report { 1867e3ec7017SPing-Ke Shih struct rate_info txrate; 1868e3ec7017SPing-Ke Shih u32 bit_rate; 1869e3ec7017SPing-Ke Shih u16 hw_rate; 1870e3ec7017SPing-Ke Shih }; 1871e3ec7017SPing-Ke Shih 1872e3ec7017SPing-Ke Shih DECLARE_EWMA(rssi, 10, 16); 1873e3ec7017SPing-Ke Shih 18743ffbb5a8SPing-Ke Shih #define RTW89_BA_CAM_NUM 2 18753ffbb5a8SPing-Ke Shih 18763ffbb5a8SPing-Ke Shih struct rtw89_ba_cam_entry { 18773ffbb5a8SPing-Ke Shih u8 tid; 18783ffbb5a8SPing-Ke Shih }; 18793ffbb5a8SPing-Ke Shih 1880e3ec7017SPing-Ke Shih #define RTW89_MAX_ADDR_CAM_NUM 128 1881e3ec7017SPing-Ke Shih #define RTW89_MAX_BSSID_CAM_NUM 20 1882e3ec7017SPing-Ke Shih #define RTW89_MAX_SEC_CAM_NUM 128 1883e3ec7017SPing-Ke Shih #define RTW89_SEC_CAM_IN_ADDR_CAM 7 1884e3ec7017SPing-Ke Shih 1885e3ec7017SPing-Ke Shih struct rtw89_addr_cam_entry { 1886e3ec7017SPing-Ke Shih u8 addr_cam_idx; 1887e3ec7017SPing-Ke Shih u8 offset; 1888e3ec7017SPing-Ke Shih u8 len; 1889e3ec7017SPing-Ke Shih u8 valid : 1; 1890e3ec7017SPing-Ke Shih u8 addr_mask : 6; 1891e3ec7017SPing-Ke Shih u8 wapi : 1; 1892e3ec7017SPing-Ke Shih u8 mask_sel : 2; 1893e3ec7017SPing-Ke Shih u8 bssid_cam_idx: 6; 1894e3ec7017SPing-Ke Shih 1895e3ec7017SPing-Ke Shih u8 sec_ent_mode; 1896e3ec7017SPing-Ke Shih DECLARE_BITMAP(sec_cam_map, RTW89_SEC_CAM_IN_ADDR_CAM); 1897e3ec7017SPing-Ke Shih u8 sec_ent_keyid[RTW89_SEC_CAM_IN_ADDR_CAM]; 1898e3ec7017SPing-Ke Shih u8 sec_ent[RTW89_SEC_CAM_IN_ADDR_CAM]; 1899e3ec7017SPing-Ke Shih struct rtw89_sec_cam_entry *sec_entries[RTW89_SEC_CAM_IN_ADDR_CAM]; 1900e3ec7017SPing-Ke Shih }; 1901e3ec7017SPing-Ke Shih 1902e3ec7017SPing-Ke Shih struct rtw89_bssid_cam_entry { 1903e3ec7017SPing-Ke Shih u8 bssid[ETH_ALEN]; 1904e3ec7017SPing-Ke Shih u8 phy_idx; 1905e3ec7017SPing-Ke Shih u8 bssid_cam_idx; 1906e3ec7017SPing-Ke Shih u8 offset; 1907e3ec7017SPing-Ke Shih u8 len; 1908e3ec7017SPing-Ke Shih u8 valid : 1; 1909e3ec7017SPing-Ke Shih u8 num; 1910e3ec7017SPing-Ke Shih }; 1911e3ec7017SPing-Ke Shih 1912e3ec7017SPing-Ke Shih struct rtw89_sec_cam_entry { 1913e3ec7017SPing-Ke Shih u8 sec_cam_idx; 1914e3ec7017SPing-Ke Shih u8 offset; 1915e3ec7017SPing-Ke Shih u8 len; 1916e3ec7017SPing-Ke Shih u8 type : 4; 1917e3ec7017SPing-Ke Shih u8 ext_key : 1; 1918e3ec7017SPing-Ke Shih u8 spp_mode : 1; 1919e3ec7017SPing-Ke Shih /* 256 bits */ 1920e3ec7017SPing-Ke Shih u8 key[32]; 1921e3ec7017SPing-Ke Shih }; 1922e3ec7017SPing-Ke Shih 19232ab856ccSPing-Ke Shih struct rtw89_sta { 19242ab856ccSPing-Ke Shih u8 mac_id; 19252ab856ccSPing-Ke Shih bool disassoc; 19262ab856ccSPing-Ke Shih struct rtw89_vif *rtwvif; 19272ab856ccSPing-Ke Shih struct rtw89_ra_info ra; 19282ab856ccSPing-Ke Shih struct rtw89_ra_report ra_report; 19292ab856ccSPing-Ke Shih int max_agg_wait; 19302ab856ccSPing-Ke Shih u8 prev_rssi; 19312ab856ccSPing-Ke Shih struct ewma_rssi avg_rssi; 19322ab856ccSPing-Ke Shih struct rtw89_ampdu_params ampdu_params[IEEE80211_NUM_TIDS]; 19332ab856ccSPing-Ke Shih struct ieee80211_rx_status rx_status; 19342ab856ccSPing-Ke Shih u16 rx_hw_rate; 19352ab856ccSPing-Ke Shih __le32 htc_template; 19362ab856ccSPing-Ke Shih struct rtw89_addr_cam_entry addr_cam; /* AP mode only */ 19372ab856ccSPing-Ke Shih 19382ab856ccSPing-Ke Shih bool use_cfg_mask; 19392ab856ccSPing-Ke Shih struct cfg80211_bitrate_mask mask; 19402ab856ccSPing-Ke Shih 19412ab856ccSPing-Ke Shih bool cctl_tx_time; 19422ab856ccSPing-Ke Shih u32 ampdu_max_time:4; 19432ab856ccSPing-Ke Shih bool cctl_tx_retry_limit; 19442ab856ccSPing-Ke Shih u32 data_tx_cnt_lmt:6; 19452ab856ccSPing-Ke Shih 19462ab856ccSPing-Ke Shih DECLARE_BITMAP(ba_cam_map, RTW89_BA_CAM_NUM); 19472ab856ccSPing-Ke Shih struct rtw89_ba_cam_entry ba_cam_entry[RTW89_BA_CAM_NUM]; 19482ab856ccSPing-Ke Shih }; 19492ab856ccSPing-Ke Shih 1950e3ec7017SPing-Ke Shih struct rtw89_efuse { 1951e3ec7017SPing-Ke Shih bool valid; 1952e3ec7017SPing-Ke Shih u8 xtal_cap; 1953e3ec7017SPing-Ke Shih u8 addr[ETH_ALEN]; 1954e3ec7017SPing-Ke Shih u8 rfe_type; 1955e3ec7017SPing-Ke Shih char country_code[2]; 1956e3ec7017SPing-Ke Shih }; 1957e3ec7017SPing-Ke Shih 1958e3ec7017SPing-Ke Shih struct rtw89_phy_rate_pattern { 1959e3ec7017SPing-Ke Shih u64 ra_mask; 1960e3ec7017SPing-Ke Shih u16 rate; 1961e3ec7017SPing-Ke Shih u8 ra_mode; 1962e3ec7017SPing-Ke Shih bool enable; 1963e3ec7017SPing-Ke Shih }; 1964e3ec7017SPing-Ke Shih 1965e3ec7017SPing-Ke Shih struct rtw89_vif { 1966e3ec7017SPing-Ke Shih struct list_head list; 1967d62816b4SPing-Ke Shih struct rtw89_dev *rtwdev; 1968e3ec7017SPing-Ke Shih u8 mac_id; 1969e3ec7017SPing-Ke Shih u8 port; 1970e3ec7017SPing-Ke Shih u8 mac_addr[ETH_ALEN]; 1971e3ec7017SPing-Ke Shih u8 bssid[ETH_ALEN]; 1972e3ec7017SPing-Ke Shih u8 phy_idx; 1973e3ec7017SPing-Ke Shih u8 mac_idx; 1974e3ec7017SPing-Ke Shih u8 net_type; 1975e3ec7017SPing-Ke Shih u8 wifi_role; 1976e3ec7017SPing-Ke Shih u8 self_role; 1977e3ec7017SPing-Ke Shih u8 wmm; 1978e3ec7017SPing-Ke Shih u8 bcn_hit_cond; 1979e3ec7017SPing-Ke Shih u8 hit_rule; 1980e3ec7017SPing-Ke Shih bool trigger; 1981e3ec7017SPing-Ke Shih bool lsig_txop; 1982e3ec7017SPing-Ke Shih u8 tgt_ind; 1983e3ec7017SPing-Ke Shih u8 frm_tgt_ind; 1984e3ec7017SPing-Ke Shih bool wowlan_pattern; 1985e3ec7017SPing-Ke Shih bool wowlan_uc; 1986e3ec7017SPing-Ke Shih bool wowlan_magic; 1987e3ec7017SPing-Ke Shih bool is_hesta; 1988e3ec7017SPing-Ke Shih bool last_a_ctrl; 1989d62816b4SPing-Ke Shih struct work_struct update_beacon_work; 1990e3ec7017SPing-Ke Shih struct rtw89_addr_cam_entry addr_cam; 1991e3ec7017SPing-Ke Shih struct rtw89_bssid_cam_entry bssid_cam; 1992e3ec7017SPing-Ke Shih struct ieee80211_tx_queue_params tx_params[IEEE80211_NUM_ACS]; 1993e3ec7017SPing-Ke Shih struct rtw89_traffic_stats stats; 1994e3ec7017SPing-Ke Shih struct rtw89_phy_rate_pattern rate_pattern; 199589590777SPo Hao Huang struct cfg80211_scan_request *scan_req; 199689590777SPo Hao Huang struct ieee80211_scan_ies *scan_ies; 1997e3ec7017SPing-Ke Shih }; 1998e3ec7017SPing-Ke Shih 1999e3ec7017SPing-Ke Shih enum rtw89_lv1_rcvy_step { 2000e3ec7017SPing-Ke Shih RTW89_LV1_RCVY_STEP_1, 2001e3ec7017SPing-Ke Shih RTW89_LV1_RCVY_STEP_2, 2002e3ec7017SPing-Ke Shih }; 2003e3ec7017SPing-Ke Shih 2004e3ec7017SPing-Ke Shih struct rtw89_hci_ops { 2005e3ec7017SPing-Ke Shih int (*tx_write)(struct rtw89_dev *rtwdev, struct rtw89_core_tx_request *tx_req); 2006e3ec7017SPing-Ke Shih void (*tx_kick_off)(struct rtw89_dev *rtwdev, u8 txch); 2007e3ec7017SPing-Ke Shih void (*flush_queues)(struct rtw89_dev *rtwdev, u32 queues, bool drop); 2008e3ec7017SPing-Ke Shih void (*reset)(struct rtw89_dev *rtwdev); 2009e3ec7017SPing-Ke Shih int (*start)(struct rtw89_dev *rtwdev); 2010e3ec7017SPing-Ke Shih void (*stop)(struct rtw89_dev *rtwdev); 2011e3ec7017SPing-Ke Shih void (*recalc_int_mit)(struct rtw89_dev *rtwdev); 2012e3ec7017SPing-Ke Shih 2013e3ec7017SPing-Ke Shih u8 (*read8)(struct rtw89_dev *rtwdev, u32 addr); 2014e3ec7017SPing-Ke Shih u16 (*read16)(struct rtw89_dev *rtwdev, u32 addr); 2015e3ec7017SPing-Ke Shih u32 (*read32)(struct rtw89_dev *rtwdev, u32 addr); 2016e3ec7017SPing-Ke Shih void (*write8)(struct rtw89_dev *rtwdev, u32 addr, u8 data); 2017e3ec7017SPing-Ke Shih void (*write16)(struct rtw89_dev *rtwdev, u32 addr, u16 data); 2018e3ec7017SPing-Ke Shih void (*write32)(struct rtw89_dev *rtwdev, u32 addr, u32 data); 2019e3ec7017SPing-Ke Shih 2020e3ec7017SPing-Ke Shih int (*mac_pre_init)(struct rtw89_dev *rtwdev); 2021e3ec7017SPing-Ke Shih int (*mac_post_init)(struct rtw89_dev *rtwdev); 2022e3ec7017SPing-Ke Shih int (*deinit)(struct rtw89_dev *rtwdev); 2023e3ec7017SPing-Ke Shih 2024e3ec7017SPing-Ke Shih u32 (*check_and_reclaim_tx_resource)(struct rtw89_dev *rtwdev, u8 txch); 2025e3ec7017SPing-Ke Shih int (*mac_lv1_rcvy)(struct rtw89_dev *rtwdev, enum rtw89_lv1_rcvy_step step); 2026e3ec7017SPing-Ke Shih void (*dump_err_status)(struct rtw89_dev *rtwdev); 2027e3ec7017SPing-Ke Shih int (*napi_poll)(struct napi_struct *napi, int budget); 2028e3ec7017SPing-Ke Shih }; 2029e3ec7017SPing-Ke Shih 2030e3ec7017SPing-Ke Shih struct rtw89_hci_info { 2031e3ec7017SPing-Ke Shih const struct rtw89_hci_ops *ops; 2032e3ec7017SPing-Ke Shih enum rtw89_hci_type type; 2033e3ec7017SPing-Ke Shih u32 rpwm_addr; 2034e3ec7017SPing-Ke Shih u32 cpwm_addr; 2035e3ec7017SPing-Ke Shih }; 2036e3ec7017SPing-Ke Shih 2037e3ec7017SPing-Ke Shih struct rtw89_chip_ops { 2038e3ec7017SPing-Ke Shih void (*bb_reset)(struct rtw89_dev *rtwdev, 2039e3ec7017SPing-Ke Shih enum rtw89_phy_idx phy_idx); 2040e3ec7017SPing-Ke Shih void (*bb_sethw)(struct rtw89_dev *rtwdev); 2041e3ec7017SPing-Ke Shih u32 (*read_rf)(struct rtw89_dev *rtwdev, enum rtw89_rf_path rf_path, 2042e3ec7017SPing-Ke Shih u32 addr, u32 mask); 2043e3ec7017SPing-Ke Shih bool (*write_rf)(struct rtw89_dev *rtwdev, enum rtw89_rf_path rf_path, 2044e3ec7017SPing-Ke Shih u32 addr, u32 mask, u32 data); 2045e3ec7017SPing-Ke Shih void (*set_channel)(struct rtw89_dev *rtwdev, 2046e3ec7017SPing-Ke Shih struct rtw89_channel_params *param); 2047e3ec7017SPing-Ke Shih void (*set_channel_help)(struct rtw89_dev *rtwdev, bool enter, 2048e3ec7017SPing-Ke Shih struct rtw89_channel_help_params *p); 2049e3ec7017SPing-Ke Shih int (*read_efuse)(struct rtw89_dev *rtwdev, u8 *log_map); 2050e3ec7017SPing-Ke Shih int (*read_phycap)(struct rtw89_dev *rtwdev, u8 *phycap_map); 2051e3ec7017SPing-Ke Shih void (*fem_setup)(struct rtw89_dev *rtwdev); 2052e3ec7017SPing-Ke Shih void (*rfk_init)(struct rtw89_dev *rtwdev); 2053e3ec7017SPing-Ke Shih void (*rfk_channel)(struct rtw89_dev *rtwdev); 2054e3ec7017SPing-Ke Shih void (*rfk_band_changed)(struct rtw89_dev *rtwdev); 2055e3ec7017SPing-Ke Shih void (*rfk_scan)(struct rtw89_dev *rtwdev, bool start); 2056e3ec7017SPing-Ke Shih void (*rfk_track)(struct rtw89_dev *rtwdev); 2057e3ec7017SPing-Ke Shih void (*power_trim)(struct rtw89_dev *rtwdev); 2058e3ec7017SPing-Ke Shih void (*set_txpwr)(struct rtw89_dev *rtwdev); 2059e3ec7017SPing-Ke Shih void (*set_txpwr_ctrl)(struct rtw89_dev *rtwdev); 2060e3ec7017SPing-Ke Shih int (*init_txpwr_unit)(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx); 2061e3ec7017SPing-Ke Shih u8 (*get_thermal)(struct rtw89_dev *rtwdev, enum rtw89_rf_path rf_path); 2062e3ec7017SPing-Ke Shih void (*ctrl_btg)(struct rtw89_dev *rtwdev, bool btg); 2063e3ec7017SPing-Ke Shih void (*query_ppdu)(struct rtw89_dev *rtwdev, 2064e3ec7017SPing-Ke Shih struct rtw89_rx_phy_ppdu *phy_ppdu, 2065e3ec7017SPing-Ke Shih struct ieee80211_rx_status *status); 2066e3ec7017SPing-Ke Shih void (*bb_ctrl_btc_preagc)(struct rtw89_dev *rtwdev, bool bt_en); 2067e3ec7017SPing-Ke Shih void (*set_txpwr_ul_tb_offset)(struct rtw89_dev *rtwdev, 2068e3ec7017SPing-Ke Shih s16 pw_ofst, enum rtw89_mac_idx mac_idx); 20692a7e54dbSPing-Ke Shih int (*pwr_on_func)(struct rtw89_dev *rtwdev); 20702a7e54dbSPing-Ke Shih int (*pwr_off_func)(struct rtw89_dev *rtwdev); 2071e3ec7017SPing-Ke Shih 2072e3ec7017SPing-Ke Shih void (*btc_set_rfe)(struct rtw89_dev *rtwdev); 2073e3ec7017SPing-Ke Shih void (*btc_init_cfg)(struct rtw89_dev *rtwdev); 2074e3ec7017SPing-Ke Shih void (*btc_set_wl_pri)(struct rtw89_dev *rtwdev, u8 map, bool state); 2075e3ec7017SPing-Ke Shih void (*btc_set_wl_txpwr_ctrl)(struct rtw89_dev *rtwdev, u32 txpwr_val); 2076e3ec7017SPing-Ke Shih s8 (*btc_get_bt_rssi)(struct rtw89_dev *rtwdev, s8 val); 2077e3ec7017SPing-Ke Shih void (*btc_bt_aci_imp)(struct rtw89_dev *rtwdev); 2078e3ec7017SPing-Ke Shih void (*btc_update_bt_cnt)(struct rtw89_dev *rtwdev); 2079e3ec7017SPing-Ke Shih void (*btc_wl_s1_standby)(struct rtw89_dev *rtwdev, bool state); 2080e3ec7017SPing-Ke Shih }; 2081e3ec7017SPing-Ke Shih 2082e3ec7017SPing-Ke Shih enum rtw89_dma_ch { 2083e3ec7017SPing-Ke Shih RTW89_DMA_ACH0 = 0, 2084e3ec7017SPing-Ke Shih RTW89_DMA_ACH1 = 1, 2085e3ec7017SPing-Ke Shih RTW89_DMA_ACH2 = 2, 2086e3ec7017SPing-Ke Shih RTW89_DMA_ACH3 = 3, 2087e3ec7017SPing-Ke Shih RTW89_DMA_ACH4 = 4, 2088e3ec7017SPing-Ke Shih RTW89_DMA_ACH5 = 5, 2089e3ec7017SPing-Ke Shih RTW89_DMA_ACH6 = 6, 2090e3ec7017SPing-Ke Shih RTW89_DMA_ACH7 = 7, 2091e3ec7017SPing-Ke Shih RTW89_DMA_B0MG = 8, 2092e3ec7017SPing-Ke Shih RTW89_DMA_B0HI = 9, 2093e3ec7017SPing-Ke Shih RTW89_DMA_B1MG = 10, 2094e3ec7017SPing-Ke Shih RTW89_DMA_B1HI = 11, 2095e3ec7017SPing-Ke Shih RTW89_DMA_H2C = 12, 2096e3ec7017SPing-Ke Shih RTW89_DMA_CH_NUM = 13 2097e3ec7017SPing-Ke Shih }; 2098e3ec7017SPing-Ke Shih 2099e3ec7017SPing-Ke Shih enum rtw89_qta_mode { 2100e3ec7017SPing-Ke Shih RTW89_QTA_SCC, 2101e3ec7017SPing-Ke Shih RTW89_QTA_DLFW, 2102e3ec7017SPing-Ke Shih 2103e3ec7017SPing-Ke Shih /* keep last */ 2104e3ec7017SPing-Ke Shih RTW89_QTA_INVALID, 2105e3ec7017SPing-Ke Shih }; 2106e3ec7017SPing-Ke Shih 2107e3ec7017SPing-Ke Shih struct rtw89_hfc_ch_cfg { 2108e3ec7017SPing-Ke Shih u16 min; 2109e3ec7017SPing-Ke Shih u16 max; 2110e3ec7017SPing-Ke Shih #define grp_0 0 2111e3ec7017SPing-Ke Shih #define grp_1 1 2112e3ec7017SPing-Ke Shih #define grp_num 2 2113e3ec7017SPing-Ke Shih u8 grp; 2114e3ec7017SPing-Ke Shih }; 2115e3ec7017SPing-Ke Shih 2116e3ec7017SPing-Ke Shih struct rtw89_hfc_ch_info { 2117e3ec7017SPing-Ke Shih u16 aval; 2118e3ec7017SPing-Ke Shih u16 used; 2119e3ec7017SPing-Ke Shih }; 2120e3ec7017SPing-Ke Shih 2121e3ec7017SPing-Ke Shih struct rtw89_hfc_pub_cfg { 2122e3ec7017SPing-Ke Shih u16 grp0; 2123e3ec7017SPing-Ke Shih u16 grp1; 2124e3ec7017SPing-Ke Shih u16 pub_max; 2125e3ec7017SPing-Ke Shih u16 wp_thrd; 2126e3ec7017SPing-Ke Shih }; 2127e3ec7017SPing-Ke Shih 2128e3ec7017SPing-Ke Shih struct rtw89_hfc_pub_info { 2129e3ec7017SPing-Ke Shih u16 g0_used; 2130e3ec7017SPing-Ke Shih u16 g1_used; 2131e3ec7017SPing-Ke Shih u16 g0_aval; 2132e3ec7017SPing-Ke Shih u16 g1_aval; 2133e3ec7017SPing-Ke Shih u16 pub_aval; 2134e3ec7017SPing-Ke Shih u16 wp_aval; 2135e3ec7017SPing-Ke Shih }; 2136e3ec7017SPing-Ke Shih 2137e3ec7017SPing-Ke Shih struct rtw89_hfc_prec_cfg { 2138e3ec7017SPing-Ke Shih u16 ch011_prec; 2139e3ec7017SPing-Ke Shih u16 h2c_prec; 2140e3ec7017SPing-Ke Shih u16 wp_ch07_prec; 2141e3ec7017SPing-Ke Shih u16 wp_ch811_prec; 2142e3ec7017SPing-Ke Shih u8 ch011_full_cond; 2143e3ec7017SPing-Ke Shih u8 h2c_full_cond; 2144e3ec7017SPing-Ke Shih u8 wp_ch07_full_cond; 2145e3ec7017SPing-Ke Shih u8 wp_ch811_full_cond; 2146e3ec7017SPing-Ke Shih }; 2147e3ec7017SPing-Ke Shih 2148e3ec7017SPing-Ke Shih struct rtw89_hfc_param { 2149e3ec7017SPing-Ke Shih bool en; 2150e3ec7017SPing-Ke Shih bool h2c_en; 2151e3ec7017SPing-Ke Shih u8 mode; 2152e3ec7017SPing-Ke Shih const struct rtw89_hfc_ch_cfg *ch_cfg; 2153e3ec7017SPing-Ke Shih struct rtw89_hfc_ch_info ch_info[RTW89_DMA_CH_NUM]; 2154e3ec7017SPing-Ke Shih struct rtw89_hfc_pub_cfg pub_cfg; 2155e3ec7017SPing-Ke Shih struct rtw89_hfc_pub_info pub_info; 2156e3ec7017SPing-Ke Shih struct rtw89_hfc_prec_cfg prec_cfg; 2157e3ec7017SPing-Ke Shih }; 2158e3ec7017SPing-Ke Shih 2159e3ec7017SPing-Ke Shih struct rtw89_hfc_param_ini { 2160e3ec7017SPing-Ke Shih const struct rtw89_hfc_ch_cfg *ch_cfg; 2161e3ec7017SPing-Ke Shih const struct rtw89_hfc_pub_cfg *pub_cfg; 2162e3ec7017SPing-Ke Shih const struct rtw89_hfc_prec_cfg *prec_cfg; 2163e3ec7017SPing-Ke Shih u8 mode; 2164e3ec7017SPing-Ke Shih }; 2165e3ec7017SPing-Ke Shih 2166e3ec7017SPing-Ke Shih struct rtw89_dle_size { 2167e3ec7017SPing-Ke Shih u16 pge_size; 2168e3ec7017SPing-Ke Shih u16 lnk_pge_num; 2169e3ec7017SPing-Ke Shih u16 unlnk_pge_num; 2170e3ec7017SPing-Ke Shih }; 2171e3ec7017SPing-Ke Shih 2172e3ec7017SPing-Ke Shih struct rtw89_wde_quota { 2173e3ec7017SPing-Ke Shih u16 hif; 2174e3ec7017SPing-Ke Shih u16 wcpu; 2175e3ec7017SPing-Ke Shih u16 pkt_in; 2176e3ec7017SPing-Ke Shih u16 cpu_io; 2177e3ec7017SPing-Ke Shih }; 2178e3ec7017SPing-Ke Shih 2179e3ec7017SPing-Ke Shih struct rtw89_ple_quota { 2180e3ec7017SPing-Ke Shih u16 cma0_tx; 2181e3ec7017SPing-Ke Shih u16 cma1_tx; 2182e3ec7017SPing-Ke Shih u16 c2h; 2183e3ec7017SPing-Ke Shih u16 h2c; 2184e3ec7017SPing-Ke Shih u16 wcpu; 2185e3ec7017SPing-Ke Shih u16 mpdu_proc; 2186e3ec7017SPing-Ke Shih u16 cma0_dma; 2187e3ec7017SPing-Ke Shih u16 cma1_dma; 2188e3ec7017SPing-Ke Shih u16 bb_rpt; 2189e3ec7017SPing-Ke Shih u16 wd_rel; 2190e3ec7017SPing-Ke Shih u16 cpu_io; 219179d099e0SPing-Ke Shih u16 tx_rpt; 2192e3ec7017SPing-Ke Shih }; 2193e3ec7017SPing-Ke Shih 2194e3ec7017SPing-Ke Shih struct rtw89_dle_mem { 2195e3ec7017SPing-Ke Shih enum rtw89_qta_mode mode; 2196e3ec7017SPing-Ke Shih const struct rtw89_dle_size *wde_size; 2197e3ec7017SPing-Ke Shih const struct rtw89_dle_size *ple_size; 2198e3ec7017SPing-Ke Shih const struct rtw89_wde_quota *wde_min_qt; 2199e3ec7017SPing-Ke Shih const struct rtw89_wde_quota *wde_max_qt; 2200e3ec7017SPing-Ke Shih const struct rtw89_ple_quota *ple_min_qt; 2201e3ec7017SPing-Ke Shih const struct rtw89_ple_quota *ple_max_qt; 2202e3ec7017SPing-Ke Shih }; 2203e3ec7017SPing-Ke Shih 2204e3ec7017SPing-Ke Shih struct rtw89_reg_def { 2205e3ec7017SPing-Ke Shih u32 addr; 2206e3ec7017SPing-Ke Shih u32 mask; 2207e3ec7017SPing-Ke Shih }; 2208e3ec7017SPing-Ke Shih 2209e3ec7017SPing-Ke Shih struct rtw89_reg2_def { 2210e3ec7017SPing-Ke Shih u32 addr; 2211e3ec7017SPing-Ke Shih u32 data; 2212e3ec7017SPing-Ke Shih }; 2213e3ec7017SPing-Ke Shih 2214e3ec7017SPing-Ke Shih struct rtw89_reg3_def { 2215e3ec7017SPing-Ke Shih u32 addr; 2216e3ec7017SPing-Ke Shih u32 mask; 2217e3ec7017SPing-Ke Shih u32 data; 2218e3ec7017SPing-Ke Shih }; 2219e3ec7017SPing-Ke Shih 2220e3ec7017SPing-Ke Shih struct rtw89_reg5_def { 2221e3ec7017SPing-Ke Shih u8 flag; /* recognized by parsers */ 2222e3ec7017SPing-Ke Shih u8 path; 2223e3ec7017SPing-Ke Shih u32 addr; 2224e3ec7017SPing-Ke Shih u32 mask; 2225e3ec7017SPing-Ke Shih u32 data; 2226e3ec7017SPing-Ke Shih }; 2227e3ec7017SPing-Ke Shih 2228e3ec7017SPing-Ke Shih struct rtw89_phy_table { 2229e3ec7017SPing-Ke Shih const struct rtw89_reg2_def *regs; 2230e3ec7017SPing-Ke Shih u32 n_regs; 2231e3ec7017SPing-Ke Shih enum rtw89_rf_path rf_path; 2232e3ec7017SPing-Ke Shih }; 2233e3ec7017SPing-Ke Shih 2234e3ec7017SPing-Ke Shih struct rtw89_txpwr_table { 2235e3ec7017SPing-Ke Shih const void *data; 2236e3ec7017SPing-Ke Shih u32 size; 2237e3ec7017SPing-Ke Shih void (*load)(struct rtw89_dev *rtwdev, 2238e3ec7017SPing-Ke Shih const struct rtw89_txpwr_table *tbl); 2239e3ec7017SPing-Ke Shih }; 2240e3ec7017SPing-Ke Shih 2241ab8a5671SPing-Ke Shih struct rtw89_page_regs { 2242ab8a5671SPing-Ke Shih u32 hci_fc_ctrl; 2243ab8a5671SPing-Ke Shih u32 ch_page_ctrl; 2244ab8a5671SPing-Ke Shih u32 ach_page_ctrl; 2245ab8a5671SPing-Ke Shih u32 ach_page_info; 2246ab8a5671SPing-Ke Shih u32 pub_page_info3; 2247ab8a5671SPing-Ke Shih u32 pub_page_ctrl1; 2248ab8a5671SPing-Ke Shih u32 pub_page_ctrl2; 2249ab8a5671SPing-Ke Shih u32 pub_page_info1; 2250ab8a5671SPing-Ke Shih u32 pub_page_info2; 2251ab8a5671SPing-Ke Shih u32 wp_page_ctrl1; 2252ab8a5671SPing-Ke Shih u32 wp_page_ctrl2; 2253ab8a5671SPing-Ke Shih u32 wp_page_info1; 2254ab8a5671SPing-Ke Shih }; 2255ab8a5671SPing-Ke Shih 2256e3ec7017SPing-Ke Shih struct rtw89_chip_info { 2257e3ec7017SPing-Ke Shih enum rtw89_core_chip_id chip_id; 2258e3ec7017SPing-Ke Shih const struct rtw89_chip_ops *ops; 2259e3ec7017SPing-Ke Shih const char *fw_name; 2260e3ec7017SPing-Ke Shih u32 fifo_size; 2261e3ec7017SPing-Ke Shih u16 max_amsdu_limit; 2262e3ec7017SPing-Ke Shih bool dis_2g_40m_ul_ofdma; 2263e3ec7017SPing-Ke Shih const struct rtw89_hfc_param_ini *hfc_param_ini; 2264e3ec7017SPing-Ke Shih const struct rtw89_dle_mem *dle_mem; 2265e3ec7017SPing-Ke Shih u32 rf_base_addr[2]; 22660237f65aSZong-Zhe Yang u8 support_bands; 2267d221270aSPing-Ke Shih bool support_bw160; 2268e3ec7017SPing-Ke Shih u8 rf_path_num; 2269e3ec7017SPing-Ke Shih u8 tx_nss; 2270e3ec7017SPing-Ke Shih u8 rx_nss; 2271e3ec7017SPing-Ke Shih u8 acam_num; 2272e3ec7017SPing-Ke Shih u8 bcam_num; 2273e3ec7017SPing-Ke Shih u8 scam_num; 2274e3ec7017SPing-Ke Shih 2275e3ec7017SPing-Ke Shih u8 sec_ctrl_efuse_size; 2276e3ec7017SPing-Ke Shih u32 physical_efuse_size; 2277e3ec7017SPing-Ke Shih u32 logical_efuse_size; 2278e3ec7017SPing-Ke Shih u32 limit_efuse_size; 2279bdfbf06cSPing-Ke Shih u32 dav_phy_efuse_size; 2280bdfbf06cSPing-Ke Shih u32 dav_log_efuse_size; 2281e3ec7017SPing-Ke Shih u32 phycap_addr; 2282e3ec7017SPing-Ke Shih u32 phycap_size; 2283e3ec7017SPing-Ke Shih 2284e3ec7017SPing-Ke Shih const struct rtw89_pwr_cfg * const *pwr_on_seq; 2285e3ec7017SPing-Ke Shih const struct rtw89_pwr_cfg * const *pwr_off_seq; 2286e3ec7017SPing-Ke Shih const struct rtw89_phy_table *bb_table; 2287e3ec7017SPing-Ke Shih const struct rtw89_phy_table *rf_table[RF_PATH_MAX]; 2288e3ec7017SPing-Ke Shih const struct rtw89_phy_table *nctl_table; 2289e3ec7017SPing-Ke Shih const struct rtw89_txpwr_table *byr_table; 2290e3ec7017SPing-Ke Shih const struct rtw89_phy_dig_gain_table *dig_table; 2291e3ec7017SPing-Ke Shih const s8 (*txpwr_lmt_2g)[RTW89_2G_BW_NUM][RTW89_NTX_NUM] 2292e3ec7017SPing-Ke Shih [RTW89_RS_LMT_NUM][RTW89_BF_NUM] 2293e3ec7017SPing-Ke Shih [RTW89_REGD_NUM][RTW89_2G_CH_NUM]; 2294e3ec7017SPing-Ke Shih const s8 (*txpwr_lmt_5g)[RTW89_5G_BW_NUM][RTW89_NTX_NUM] 2295e3ec7017SPing-Ke Shih [RTW89_RS_LMT_NUM][RTW89_BF_NUM] 2296e3ec7017SPing-Ke Shih [RTW89_REGD_NUM][RTW89_5G_CH_NUM]; 2297ac74f016SZong-Zhe Yang const s8 (*txpwr_lmt_6g)[RTW89_6G_BW_NUM][RTW89_NTX_NUM] 2298ac74f016SZong-Zhe Yang [RTW89_RS_LMT_NUM][RTW89_BF_NUM] 2299ac74f016SZong-Zhe Yang [RTW89_REGD_NUM][RTW89_6G_CH_NUM]; 2300e3ec7017SPing-Ke Shih const s8 (*txpwr_lmt_ru_2g)[RTW89_RU_NUM][RTW89_NTX_NUM] 2301e3ec7017SPing-Ke Shih [RTW89_REGD_NUM][RTW89_2G_CH_NUM]; 2302e3ec7017SPing-Ke Shih const s8 (*txpwr_lmt_ru_5g)[RTW89_RU_NUM][RTW89_NTX_NUM] 2303e3ec7017SPing-Ke Shih [RTW89_REGD_NUM][RTW89_5G_CH_NUM]; 2304ac74f016SZong-Zhe Yang const s8 (*txpwr_lmt_ru_6g)[RTW89_RU_NUM][RTW89_NTX_NUM] 2305ac74f016SZong-Zhe Yang [RTW89_REGD_NUM][RTW89_6G_CH_NUM]; 2306e3ec7017SPing-Ke Shih 2307e3ec7017SPing-Ke Shih u8 txpwr_factor_rf; 2308e3ec7017SPing-Ke Shih u8 txpwr_factor_mac; 2309e3ec7017SPing-Ke Shih 2310e3ec7017SPing-Ke Shih u32 para_ver; 2311e3ec7017SPing-Ke Shih u32 wlcx_desired; 2312e3ec7017SPing-Ke Shih u8 btcx_desired; 2313e3ec7017SPing-Ke Shih u8 scbd; 2314e3ec7017SPing-Ke Shih u8 mailbox; 2315e3ec7017SPing-Ke Shih 2316e3ec7017SPing-Ke Shih u8 afh_guard_ch; 2317e3ec7017SPing-Ke Shih const u8 *wl_rssi_thres; 2318e3ec7017SPing-Ke Shih const u8 *bt_rssi_thres; 2319e3ec7017SPing-Ke Shih u8 rssi_tol; 2320e3ec7017SPing-Ke Shih 2321e3ec7017SPing-Ke Shih u8 mon_reg_num; 2322e3ec7017SPing-Ke Shih const struct rtw89_btc_fbtc_mreg *mon_reg; 2323e3ec7017SPing-Ke Shih u8 rf_para_ulink_num; 2324e3ec7017SPing-Ke Shih const struct rtw89_btc_rf_trx_para *rf_para_ulink; 2325e3ec7017SPing-Ke Shih u8 rf_para_dlink_num; 2326e3ec7017SPing-Ke Shih const struct rtw89_btc_rf_trx_para *rf_para_dlink; 2327e3ec7017SPing-Ke Shih u8 ps_mode_supported; 23282af64b4aSPing-Ke Shih 23292af64b4aSPing-Ke Shih u32 hci_func_en_addr; 2330e8955811SPing-Ke Shih u32 h2c_ctrl_reg; 2331e8955811SPing-Ke Shih const u32 *h2c_regs; 2332e8955811SPing-Ke Shih u32 c2h_ctrl_reg; 2333e8955811SPing-Ke Shih const u32 *c2h_regs; 2334ab8a5671SPing-Ke Shih const struct rtw89_page_regs *page_regs; 2335*b7379148SYuan-Han Zhang const struct rtw89_reg_def *dcfo_comp; 2336*b7379148SYuan-Han Zhang u8 dcfo_comp_sft; 2337e3ec7017SPing-Ke Shih }; 2338e3ec7017SPing-Ke Shih 23394a9e48acSPing-Ke Shih union rtw89_bus_info { 23404a9e48acSPing-Ke Shih const struct rtw89_pci_info *pci; 23414a9e48acSPing-Ke Shih }; 23424a9e48acSPing-Ke Shih 2343861e58c8SZong-Zhe Yang struct rtw89_driver_info { 2344861e58c8SZong-Zhe Yang const struct rtw89_chip_info *chip; 23454a9e48acSPing-Ke Shih union rtw89_bus_info bus; 2346861e58c8SZong-Zhe Yang }; 2347861e58c8SZong-Zhe Yang 2348e3ec7017SPing-Ke Shih enum rtw89_hcifc_mode { 2349e3ec7017SPing-Ke Shih RTW89_HCIFC_POH = 0, 2350e3ec7017SPing-Ke Shih RTW89_HCIFC_STF = 1, 2351e3ec7017SPing-Ke Shih RTW89_HCIFC_SDIO = 2, 2352e3ec7017SPing-Ke Shih 2353e3ec7017SPing-Ke Shih /* keep last */ 2354e3ec7017SPing-Ke Shih RTW89_HCIFC_MODE_INVALID, 2355e3ec7017SPing-Ke Shih }; 2356e3ec7017SPing-Ke Shih 2357e3ec7017SPing-Ke Shih struct rtw89_dle_info { 2358e3ec7017SPing-Ke Shih enum rtw89_qta_mode qta_mode; 2359e3ec7017SPing-Ke Shih u16 wde_pg_size; 2360e3ec7017SPing-Ke Shih u16 ple_pg_size; 2361e3ec7017SPing-Ke Shih u16 c0_rx_qta; 2362e3ec7017SPing-Ke Shih u16 c1_rx_qta; 2363e3ec7017SPing-Ke Shih }; 2364e3ec7017SPing-Ke Shih 2365e3ec7017SPing-Ke Shih enum rtw89_host_rpr_mode { 2366e3ec7017SPing-Ke Shih RTW89_RPR_MODE_POH = 0, 2367e3ec7017SPing-Ke Shih RTW89_RPR_MODE_STF 2368e3ec7017SPing-Ke Shih }; 2369e3ec7017SPing-Ke Shih 2370e3ec7017SPing-Ke Shih struct rtw89_mac_info { 2371e3ec7017SPing-Ke Shih struct rtw89_dle_info dle_info; 2372e3ec7017SPing-Ke Shih struct rtw89_hfc_param hfc_param; 2373e3ec7017SPing-Ke Shih enum rtw89_qta_mode qta_mode; 2374e3ec7017SPing-Ke Shih u8 rpwm_seq_num; 2375e3ec7017SPing-Ke Shih u8 cpwm_seq_num; 2376e3ec7017SPing-Ke Shih }; 2377e3ec7017SPing-Ke Shih 2378e3ec7017SPing-Ke Shih enum rtw89_fw_type { 2379e3ec7017SPing-Ke Shih RTW89_FW_NORMAL = 1, 2380e3ec7017SPing-Ke Shih RTW89_FW_WOWLAN = 3, 2381e3ec7017SPing-Ke Shih }; 2382e3ec7017SPing-Ke Shih 2383e3ec7017SPing-Ke Shih struct rtw89_fw_suit { 2384e3ec7017SPing-Ke Shih const u8 *data; 2385e3ec7017SPing-Ke Shih u32 size; 2386e3ec7017SPing-Ke Shih u8 major_ver; 2387e3ec7017SPing-Ke Shih u8 minor_ver; 2388e3ec7017SPing-Ke Shih u8 sub_ver; 2389e3ec7017SPing-Ke Shih u8 sub_idex; 2390e3ec7017SPing-Ke Shih u16 build_year; 2391e3ec7017SPing-Ke Shih u16 build_mon; 2392e3ec7017SPing-Ke Shih u16 build_date; 2393e3ec7017SPing-Ke Shih u16 build_hour; 2394e3ec7017SPing-Ke Shih u16 build_min; 2395e3ec7017SPing-Ke Shih u8 cmd_ver; 2396e3ec7017SPing-Ke Shih }; 2397e3ec7017SPing-Ke Shih 2398e3ec7017SPing-Ke Shih #define RTW89_FW_VER_CODE(major, minor, sub, idx) \ 2399e3ec7017SPing-Ke Shih (((major) << 24) | ((minor) << 16) | ((sub) << 8) | (idx)) 2400e3ec7017SPing-Ke Shih #define RTW89_FW_SUIT_VER_CODE(s) \ 2401e3ec7017SPing-Ke Shih RTW89_FW_VER_CODE((s)->major_ver, (s)->minor_ver, (s)->sub_ver, (s)->sub_idex) 2402e3ec7017SPing-Ke Shih 2403e3ec7017SPing-Ke Shih struct rtw89_fw_info { 2404e3ec7017SPing-Ke Shih const struct firmware *firmware; 2405e3ec7017SPing-Ke Shih struct rtw89_dev *rtwdev; 2406e3ec7017SPing-Ke Shih struct completion completion; 2407e3ec7017SPing-Ke Shih u8 h2c_seq; 2408e3ec7017SPing-Ke Shih u8 rec_seq; 2409e3ec7017SPing-Ke Shih struct rtw89_fw_suit normal; 2410e3ec7017SPing-Ke Shih struct rtw89_fw_suit wowlan; 2411e3ec7017SPing-Ke Shih bool fw_log_enable; 2412e3ec7017SPing-Ke Shih bool old_ht_ra_format; 241389590777SPo Hao Huang bool scan_offload; 24147bfd05ffSChin-Yen Lee bool tx_wake; 2415e3ec7017SPing-Ke Shih }; 2416e3ec7017SPing-Ke Shih 2417e3ec7017SPing-Ke Shih struct rtw89_cam_info { 2418e3ec7017SPing-Ke Shih DECLARE_BITMAP(addr_cam_map, RTW89_MAX_ADDR_CAM_NUM); 2419e3ec7017SPing-Ke Shih DECLARE_BITMAP(bssid_cam_map, RTW89_MAX_BSSID_CAM_NUM); 2420e3ec7017SPing-Ke Shih DECLARE_BITMAP(sec_cam_map, RTW89_MAX_SEC_CAM_NUM); 2421e3ec7017SPing-Ke Shih }; 2422e3ec7017SPing-Ke Shih 2423e3ec7017SPing-Ke Shih enum rtw89_sar_sources { 2424e3ec7017SPing-Ke Shih RTW89_SAR_SOURCE_NONE, 2425e3ec7017SPing-Ke Shih RTW89_SAR_SOURCE_COMMON, 2426e3ec7017SPing-Ke Shih 2427e3ec7017SPing-Ke Shih RTW89_SAR_SOURCE_NR, 2428e3ec7017SPing-Ke Shih }; 2429e3ec7017SPing-Ke Shih 2430e3ec7017SPing-Ke Shih struct rtw89_sar_cfg_common { 2431e3ec7017SPing-Ke Shih bool set[RTW89_SUBBAND_NR]; 2432e3ec7017SPing-Ke Shih s32 cfg[RTW89_SUBBAND_NR]; 2433e3ec7017SPing-Ke Shih }; 2434e3ec7017SPing-Ke Shih 2435e3ec7017SPing-Ke Shih struct rtw89_sar_info { 2436e3ec7017SPing-Ke Shih /* used to decide how to acces SAR cfg union */ 2437e3ec7017SPing-Ke Shih enum rtw89_sar_sources src; 2438e3ec7017SPing-Ke Shih 2439e3ec7017SPing-Ke Shih /* reserved for different knids of SAR cfg struct. 2440e3ec7017SPing-Ke Shih * supposed that a single cfg struct cannot handle various SAR sources. 2441e3ec7017SPing-Ke Shih */ 2442e3ec7017SPing-Ke Shih union { 2443e3ec7017SPing-Ke Shih struct rtw89_sar_cfg_common cfg_common; 2444e3ec7017SPing-Ke Shih }; 2445e3ec7017SPing-Ke Shih }; 2446e3ec7017SPing-Ke Shih 2447e3ec7017SPing-Ke Shih struct rtw89_hal { 2448e3ec7017SPing-Ke Shih u32 rx_fltr; 2449e3ec7017SPing-Ke Shih u8 cv; 2450e3ec7017SPing-Ke Shih u8 current_channel; 2451e715f10fSPing-Ke Shih u32 current_freq; 2452eb4e52b3SPo Hao Huang u8 prev_primary_channel; 2453e3ec7017SPing-Ke Shih u8 current_primary_channel; 2454e3ec7017SPing-Ke Shih enum rtw89_subband current_subband; 2455e3ec7017SPing-Ke Shih u8 current_band_width; 245689590777SPo Hao Huang u8 prev_band_type; 2457e3ec7017SPing-Ke Shih u8 current_band_type; 2458e3ec7017SPing-Ke Shih u32 sw_amsdu_max_size; 2459e3ec7017SPing-Ke Shih u32 antenna_tx; 2460e3ec7017SPing-Ke Shih u32 antenna_rx; 2461e3ec7017SPing-Ke Shih u8 tx_nss; 2462e3ec7017SPing-Ke Shih u8 rx_nss; 24631c2423deSJohnson Lin bool support_cckpd; 2464e3ec7017SPing-Ke Shih }; 2465e3ec7017SPing-Ke Shih 2466e3ec7017SPing-Ke Shih #define RTW89_MAX_MAC_ID_NUM 128 246789590777SPo Hao Huang #define RTW89_MAX_PKT_OFLD_NUM 255 2468e3ec7017SPing-Ke Shih 2469e3ec7017SPing-Ke Shih enum rtw89_flags { 2470e3ec7017SPing-Ke Shih RTW89_FLAG_POWERON, 2471e3ec7017SPing-Ke Shih RTW89_FLAG_FW_RDY, 2472e3ec7017SPing-Ke Shih RTW89_FLAG_RUNNING, 2473e3ec7017SPing-Ke Shih RTW89_FLAG_BFEE_MON, 2474e3ec7017SPing-Ke Shih RTW89_FLAG_BFEE_EN, 2475e3ec7017SPing-Ke Shih RTW89_FLAG_NAPI_RUNNING, 2476e3ec7017SPing-Ke Shih RTW89_FLAG_LEISURE_PS, 2477e3ec7017SPing-Ke Shih RTW89_FLAG_LOW_POWER_MODE, 2478e3ec7017SPing-Ke Shih RTW89_FLAG_INACTIVE_PS, 2479e3ec7017SPing-Ke Shih 2480e3ec7017SPing-Ke Shih NUM_OF_RTW89_FLAGS, 2481e3ec7017SPing-Ke Shih }; 2482e3ec7017SPing-Ke Shih 2483e3ec7017SPing-Ke Shih struct rtw89_pkt_stat { 2484e3ec7017SPing-Ke Shih u16 beacon_nr; 2485e3ec7017SPing-Ke Shih u32 rx_rate_cnt[RTW89_HW_RATE_NR]; 2486e3ec7017SPing-Ke Shih }; 2487e3ec7017SPing-Ke Shih 2488e3ec7017SPing-Ke Shih DECLARE_EWMA(thermal, 4, 4); 2489e3ec7017SPing-Ke Shih 2490e3ec7017SPing-Ke Shih struct rtw89_phy_stat { 2491e3ec7017SPing-Ke Shih struct ewma_thermal avg_thermal[RF_PATH_MAX]; 2492e3ec7017SPing-Ke Shih struct rtw89_pkt_stat cur_pkt_stat; 2493e3ec7017SPing-Ke Shih struct rtw89_pkt_stat last_pkt_stat; 2494e3ec7017SPing-Ke Shih }; 2495e3ec7017SPing-Ke Shih 2496e3ec7017SPing-Ke Shih #define RTW89_DACK_PATH_NR 2 2497e3ec7017SPing-Ke Shih #define RTW89_DACK_IDX_NR 2 2498e3ec7017SPing-Ke Shih #define RTW89_DACK_MSBK_NR 16 2499e3ec7017SPing-Ke Shih struct rtw89_dack_info { 2500e3ec7017SPing-Ke Shih bool dack_done; 2501e3ec7017SPing-Ke Shih u8 msbk_d[RTW89_DACK_PATH_NR][RTW89_DACK_IDX_NR][RTW89_DACK_MSBK_NR]; 2502e3ec7017SPing-Ke Shih u8 dadck_d[RTW89_DACK_PATH_NR][RTW89_DACK_IDX_NR]; 2503e3ec7017SPing-Ke Shih u16 addck_d[RTW89_DACK_PATH_NR][RTW89_DACK_IDX_NR]; 2504e3ec7017SPing-Ke Shih u16 biask_d[RTW89_DACK_PATH_NR][RTW89_DACK_IDX_NR]; 2505e3ec7017SPing-Ke Shih u32 dack_cnt; 2506e3ec7017SPing-Ke Shih bool addck_timeout[RTW89_DACK_PATH_NR]; 2507e3ec7017SPing-Ke Shih bool dadck_timeout[RTW89_DACK_PATH_NR]; 2508e3ec7017SPing-Ke Shih bool msbk_timeout[RTW89_DACK_PATH_NR]; 2509e3ec7017SPing-Ke Shih }; 2510e3ec7017SPing-Ke Shih 2511e3ec7017SPing-Ke Shih #define RTW89_IQK_CHS_NR 2 2512e3ec7017SPing-Ke Shih #define RTW89_IQK_PATH_NR 4 2513e3ec7017SPing-Ke Shih struct rtw89_iqk_info { 2514e3ec7017SPing-Ke Shih bool lok_cor_fail[RTW89_IQK_CHS_NR][RTW89_IQK_PATH_NR]; 2515e3ec7017SPing-Ke Shih bool lok_fin_fail[RTW89_IQK_CHS_NR][RTW89_IQK_PATH_NR]; 2516e3ec7017SPing-Ke Shih bool iqk_tx_fail[RTW89_IQK_CHS_NR][RTW89_IQK_PATH_NR]; 2517e3ec7017SPing-Ke Shih bool iqk_rx_fail[RTW89_IQK_CHS_NR][RTW89_IQK_PATH_NR]; 2518e3ec7017SPing-Ke Shih u32 iqk_fail_cnt; 2519e3ec7017SPing-Ke Shih bool is_iqk_init; 2520e3ec7017SPing-Ke Shih u32 iqk_channel[RTW89_IQK_CHS_NR]; 2521e3ec7017SPing-Ke Shih u8 iqk_band[RTW89_IQK_PATH_NR]; 2522e3ec7017SPing-Ke Shih u8 iqk_ch[RTW89_IQK_PATH_NR]; 2523e3ec7017SPing-Ke Shih u8 iqk_bw[RTW89_IQK_PATH_NR]; 2524e3ec7017SPing-Ke Shih u8 kcount; 2525e3ec7017SPing-Ke Shih u8 iqk_times; 2526e3ec7017SPing-Ke Shih u8 version; 2527e3ec7017SPing-Ke Shih u32 nb_txcfir[RTW89_IQK_PATH_NR]; 2528e3ec7017SPing-Ke Shih u32 nb_rxcfir[RTW89_IQK_PATH_NR]; 2529e3ec7017SPing-Ke Shih u32 bp_txkresult[RTW89_IQK_PATH_NR]; 2530e3ec7017SPing-Ke Shih u32 bp_rxkresult[RTW89_IQK_PATH_NR]; 2531e3ec7017SPing-Ke Shih u32 bp_iqkenable[RTW89_IQK_PATH_NR]; 2532e3ec7017SPing-Ke Shih bool is_wb_txiqk[RTW89_IQK_PATH_NR]; 2533e3ec7017SPing-Ke Shih bool is_wb_rxiqk[RTW89_IQK_PATH_NR]; 2534e3ec7017SPing-Ke Shih bool is_nbiqk; 2535e3ec7017SPing-Ke Shih bool iqk_fft_en; 2536e3ec7017SPing-Ke Shih bool iqk_xym_en; 2537e3ec7017SPing-Ke Shih bool iqk_sram_en; 2538e3ec7017SPing-Ke Shih bool iqk_cfir_en; 2539e3ec7017SPing-Ke Shih u8 thermal[RTW89_IQK_PATH_NR]; 2540e3ec7017SPing-Ke Shih bool thermal_rek_en; 2541e3ec7017SPing-Ke Shih u32 syn1to2; 2542e3ec7017SPing-Ke Shih u8 iqk_mcc_ch[RTW89_IQK_CHS_NR][RTW89_IQK_PATH_NR]; 2543e3ec7017SPing-Ke Shih u8 iqk_table_idx[RTW89_IQK_PATH_NR]; 2544e3ec7017SPing-Ke Shih }; 2545e3ec7017SPing-Ke Shih 2546e3ec7017SPing-Ke Shih #define RTW89_DPK_RF_PATH 2 2547e3ec7017SPing-Ke Shih #define RTW89_DPK_AVG_THERMAL_NUM 8 2548e3ec7017SPing-Ke Shih #define RTW89_DPK_BKUP_NUM 2 2549e3ec7017SPing-Ke Shih struct rtw89_dpk_bkup_para { 2550e3ec7017SPing-Ke Shih enum rtw89_band band; 2551e3ec7017SPing-Ke Shih enum rtw89_bandwidth bw; 2552e3ec7017SPing-Ke Shih u8 ch; 2553e3ec7017SPing-Ke Shih bool path_ok; 2554e3ec7017SPing-Ke Shih u8 txagc_dpk; 2555e3ec7017SPing-Ke Shih u8 ther_dpk; 2556e3ec7017SPing-Ke Shih u8 gs; 2557e3ec7017SPing-Ke Shih u16 pwsf; 2558e3ec7017SPing-Ke Shih }; 2559e3ec7017SPing-Ke Shih 2560e3ec7017SPing-Ke Shih struct rtw89_dpk_info { 2561e3ec7017SPing-Ke Shih bool is_dpk_enable; 2562e3ec7017SPing-Ke Shih bool is_dpk_reload_en; 2563e3ec7017SPing-Ke Shih u16 dc_i[RTW89_DPK_RF_PATH]; 2564e3ec7017SPing-Ke Shih u16 dc_q[RTW89_DPK_RF_PATH]; 2565e3ec7017SPing-Ke Shih u8 corr_val[RTW89_DPK_RF_PATH]; 2566e3ec7017SPing-Ke Shih u8 corr_idx[RTW89_DPK_RF_PATH]; 2567e3ec7017SPing-Ke Shih u8 cur_idx[RTW89_DPK_RF_PATH]; 2568e3ec7017SPing-Ke Shih struct rtw89_dpk_bkup_para bp[RTW89_DPK_RF_PATH][RTW89_DPK_BKUP_NUM]; 2569e3ec7017SPing-Ke Shih }; 2570e3ec7017SPing-Ke Shih 2571e3ec7017SPing-Ke Shih struct rtw89_fem_info { 2572e3ec7017SPing-Ke Shih bool elna_2g; 2573e3ec7017SPing-Ke Shih bool elna_5g; 2574e3ec7017SPing-Ke Shih bool epa_2g; 2575e3ec7017SPing-Ke Shih bool epa_5g; 2576e3ec7017SPing-Ke Shih }; 2577e3ec7017SPing-Ke Shih 2578e3ec7017SPing-Ke Shih struct rtw89_phy_ch_info { 2579e3ec7017SPing-Ke Shih u8 rssi_min; 2580e3ec7017SPing-Ke Shih u16 rssi_min_macid; 2581e3ec7017SPing-Ke Shih u8 pre_rssi_min; 2582e3ec7017SPing-Ke Shih u8 rssi_max; 2583e3ec7017SPing-Ke Shih u16 rssi_max_macid; 2584e3ec7017SPing-Ke Shih u8 rxsc_160; 2585e3ec7017SPing-Ke Shih u8 rxsc_80; 2586e3ec7017SPing-Ke Shih u8 rxsc_40; 2587e3ec7017SPing-Ke Shih u8 rxsc_20; 2588e3ec7017SPing-Ke Shih u8 rxsc_l; 2589e3ec7017SPing-Ke Shih u8 is_noisy; 2590e3ec7017SPing-Ke Shih }; 2591e3ec7017SPing-Ke Shih 2592e3ec7017SPing-Ke Shih struct rtw89_agc_gaincode_set { 2593e3ec7017SPing-Ke Shih u8 lna_idx; 2594e3ec7017SPing-Ke Shih u8 tia_idx; 2595e3ec7017SPing-Ke Shih u8 rxb_idx; 2596e3ec7017SPing-Ke Shih }; 2597e3ec7017SPing-Ke Shih 2598e3ec7017SPing-Ke Shih #define IGI_RSSI_TH_NUM 5 2599e3ec7017SPing-Ke Shih #define FA_TH_NUM 4 2600e3ec7017SPing-Ke Shih #define LNA_GAIN_NUM 7 2601e3ec7017SPing-Ke Shih #define TIA_GAIN_NUM 2 2602e3ec7017SPing-Ke Shih struct rtw89_dig_info { 2603e3ec7017SPing-Ke Shih struct rtw89_agc_gaincode_set cur_gaincode; 2604e3ec7017SPing-Ke Shih bool force_gaincode_idx_en; 2605e3ec7017SPing-Ke Shih struct rtw89_agc_gaincode_set force_gaincode; 2606e3ec7017SPing-Ke Shih u8 igi_rssi_th[IGI_RSSI_TH_NUM]; 2607e3ec7017SPing-Ke Shih u16 fa_th[FA_TH_NUM]; 2608e3ec7017SPing-Ke Shih u8 igi_rssi; 2609e3ec7017SPing-Ke Shih u8 igi_fa_rssi; 2610e3ec7017SPing-Ke Shih u8 fa_rssi_ofst; 2611e3ec7017SPing-Ke Shih u8 dyn_igi_max; 2612e3ec7017SPing-Ke Shih u8 dyn_igi_min; 2613e3ec7017SPing-Ke Shih bool dyn_pd_th_en; 2614e3ec7017SPing-Ke Shih u8 dyn_pd_th_max; 2615e3ec7017SPing-Ke Shih u8 pd_low_th_ofst; 2616e3ec7017SPing-Ke Shih u8 ib_pbk; 2617e3ec7017SPing-Ke Shih s8 ib_pkpwr; 2618e3ec7017SPing-Ke Shih s8 lna_gain_a[LNA_GAIN_NUM]; 2619e3ec7017SPing-Ke Shih s8 lna_gain_g[LNA_GAIN_NUM]; 2620e3ec7017SPing-Ke Shih s8 *lna_gain; 2621e3ec7017SPing-Ke Shih s8 tia_gain_a[TIA_GAIN_NUM]; 2622e3ec7017SPing-Ke Shih s8 tia_gain_g[TIA_GAIN_NUM]; 2623e3ec7017SPing-Ke Shih s8 *tia_gain; 2624e3ec7017SPing-Ke Shih bool is_linked_pre; 2625e3ec7017SPing-Ke Shih bool bypass_dig; 2626e3ec7017SPing-Ke Shih }; 2627e3ec7017SPing-Ke Shih 2628e3ec7017SPing-Ke Shih enum rtw89_multi_cfo_mode { 2629e3ec7017SPing-Ke Shih RTW89_PKT_BASED_AVG_MODE = 0, 2630e3ec7017SPing-Ke Shih RTW89_ENTRY_BASED_AVG_MODE = 1, 2631e3ec7017SPing-Ke Shih RTW89_TP_BASED_AVG_MODE = 2, 2632e3ec7017SPing-Ke Shih }; 2633e3ec7017SPing-Ke Shih 2634e3ec7017SPing-Ke Shih enum rtw89_phy_cfo_status { 2635e3ec7017SPing-Ke Shih RTW89_PHY_DCFO_STATE_NORMAL = 0, 2636e3ec7017SPing-Ke Shih RTW89_PHY_DCFO_STATE_ENHANCE = 1, 2637e3ec7017SPing-Ke Shih RTW89_PHY_DCFO_STATE_MAX 2638e3ec7017SPing-Ke Shih }; 2639e3ec7017SPing-Ke Shih 2640e3ec7017SPing-Ke Shih struct rtw89_cfo_tracking_info { 2641e3ec7017SPing-Ke Shih u16 cfo_timer_ms; 2642e3ec7017SPing-Ke Shih bool cfo_trig_by_timer_en; 2643e3ec7017SPing-Ke Shih enum rtw89_phy_cfo_status phy_cfo_status; 2644e3ec7017SPing-Ke Shih u8 phy_cfo_trk_cnt; 2645e3ec7017SPing-Ke Shih bool is_adjust; 2646e3ec7017SPing-Ke Shih enum rtw89_multi_cfo_mode rtw89_multi_cfo_mode; 2647e3ec7017SPing-Ke Shih bool apply_compensation; 2648e3ec7017SPing-Ke Shih u8 crystal_cap; 2649e3ec7017SPing-Ke Shih u8 crystal_cap_default; 2650e3ec7017SPing-Ke Shih u8 def_x_cap; 2651e3ec7017SPing-Ke Shih s8 x_cap_ofst; 2652e3ec7017SPing-Ke Shih u32 sta_cfo_tolerance; 2653e3ec7017SPing-Ke Shih s32 cfo_tail[CFO_TRACK_MAX_USER]; 2654e3ec7017SPing-Ke Shih u16 cfo_cnt[CFO_TRACK_MAX_USER]; 2655e3ec7017SPing-Ke Shih s32 cfo_avg_pre; 2656e3ec7017SPing-Ke Shih s32 cfo_avg[CFO_TRACK_MAX_USER]; 2657e3ec7017SPing-Ke Shih s32 pre_cfo_avg[CFO_TRACK_MAX_USER]; 2658e3ec7017SPing-Ke Shih u32 packet_count; 2659e3ec7017SPing-Ke Shih u32 packet_count_pre; 2660e3ec7017SPing-Ke Shih s32 residual_cfo_acc; 2661e3ec7017SPing-Ke Shih u8 phy_cfotrk_state; 2662e3ec7017SPing-Ke Shih u8 phy_cfotrk_cnt; 2663a9e06f2eSYi-Tang Chiu bool divergence_lock_en; 2664a9e06f2eSYi-Tang Chiu u8 x_cap_lb; 2665a9e06f2eSYi-Tang Chiu u8 x_cap_ub; 2666a9e06f2eSYi-Tang Chiu u8 lock_cnt; 2667e3ec7017SPing-Ke Shih }; 2668e3ec7017SPing-Ke Shih 2669e3ec7017SPing-Ke Shih /* 2GL, 2GH, 5GL1, 5GH1, 5GM1, 5GM2, 5GH1, 5GH2 */ 2670e3ec7017SPing-Ke Shih #define TSSI_TRIM_CH_GROUP_NUM 8 2671a82174c6SPing-Ke Shih #define TSSI_TRIM_CH_GROUP_NUM_6G 16 2672e3ec7017SPing-Ke Shih 2673e3ec7017SPing-Ke Shih #define TSSI_CCK_CH_GROUP_NUM 6 2674e3ec7017SPing-Ke Shih #define TSSI_MCS_2G_CH_GROUP_NUM 5 2675e3ec7017SPing-Ke Shih #define TSSI_MCS_5G_CH_GROUP_NUM 14 2676a82174c6SPing-Ke Shih #define TSSI_MCS_6G_CH_GROUP_NUM 32 2677e3ec7017SPing-Ke Shih #define TSSI_MCS_CH_GROUP_NUM \ 2678e3ec7017SPing-Ke Shih (TSSI_MCS_2G_CH_GROUP_NUM + TSSI_MCS_5G_CH_GROUP_NUM) 2679e3ec7017SPing-Ke Shih 2680e3ec7017SPing-Ke Shih struct rtw89_tssi_info { 2681e3ec7017SPing-Ke Shih u8 thermal[RF_PATH_MAX]; 2682e3ec7017SPing-Ke Shih s8 tssi_trim[RF_PATH_MAX][TSSI_TRIM_CH_GROUP_NUM]; 2683a82174c6SPing-Ke Shih s8 tssi_trim_6g[RF_PATH_MAX][TSSI_TRIM_CH_GROUP_NUM_6G]; 2684e3ec7017SPing-Ke Shih s8 tssi_cck[RF_PATH_MAX][TSSI_CCK_CH_GROUP_NUM]; 2685e3ec7017SPing-Ke Shih s8 tssi_mcs[RF_PATH_MAX][TSSI_MCS_CH_GROUP_NUM]; 2686a82174c6SPing-Ke Shih s8 tssi_6g_mcs[RF_PATH_MAX][TSSI_MCS_6G_CH_GROUP_NUM]; 2687e3ec7017SPing-Ke Shih s8 extra_ofst[RF_PATH_MAX]; 2688e3ec7017SPing-Ke Shih bool tssi_tracking_check[RF_PATH_MAX]; 2689e3ec7017SPing-Ke Shih u8 default_txagc_offset[RF_PATH_MAX]; 2690e3ec7017SPing-Ke Shih u32 base_thermal[RF_PATH_MAX]; 2691e3ec7017SPing-Ke Shih }; 2692e3ec7017SPing-Ke Shih 2693e3ec7017SPing-Ke Shih struct rtw89_power_trim_info { 2694e3ec7017SPing-Ke Shih bool pg_thermal_trim; 2695e3ec7017SPing-Ke Shih bool pg_pa_bias_trim; 2696e3ec7017SPing-Ke Shih u8 thermal_trim[RF_PATH_MAX]; 2697e3ec7017SPing-Ke Shih u8 pa_bias_trim[RF_PATH_MAX]; 2698e3ec7017SPing-Ke Shih }; 2699e3ec7017SPing-Ke Shih 2700e3ec7017SPing-Ke Shih struct rtw89_regulatory { 2701e3ec7017SPing-Ke Shih char alpha2[3]; 2702e3ec7017SPing-Ke Shih u8 txpwr_regd[RTW89_BAND_MAX]; 2703e3ec7017SPing-Ke Shih }; 2704e3ec7017SPing-Ke Shih 2705e3ec7017SPing-Ke Shih enum rtw89_ifs_clm_application { 2706e3ec7017SPing-Ke Shih RTW89_IFS_CLM_INIT = 0, 2707e3ec7017SPing-Ke Shih RTW89_IFS_CLM_BACKGROUND = 1, 2708e3ec7017SPing-Ke Shih RTW89_IFS_CLM_ACS = 2, 2709e3ec7017SPing-Ke Shih RTW89_IFS_CLM_DIG = 3, 2710e3ec7017SPing-Ke Shih RTW89_IFS_CLM_TDMA_DIG = 4, 2711e3ec7017SPing-Ke Shih RTW89_IFS_CLM_DBG = 5, 2712e3ec7017SPing-Ke Shih RTW89_IFS_CLM_DBG_MANUAL = 6 2713e3ec7017SPing-Ke Shih }; 2714e3ec7017SPing-Ke Shih 2715e3ec7017SPing-Ke Shih enum rtw89_env_racing_lv { 2716e3ec7017SPing-Ke Shih RTW89_RAC_RELEASE = 0, 2717e3ec7017SPing-Ke Shih RTW89_RAC_LV_1 = 1, 2718e3ec7017SPing-Ke Shih RTW89_RAC_LV_2 = 2, 2719e3ec7017SPing-Ke Shih RTW89_RAC_LV_3 = 3, 2720e3ec7017SPing-Ke Shih RTW89_RAC_LV_4 = 4, 2721e3ec7017SPing-Ke Shih RTW89_RAC_MAX_NUM = 5 2722e3ec7017SPing-Ke Shih }; 2723e3ec7017SPing-Ke Shih 2724e3ec7017SPing-Ke Shih struct rtw89_ccx_para_info { 2725e3ec7017SPing-Ke Shih enum rtw89_env_racing_lv rac_lv; 2726e3ec7017SPing-Ke Shih u16 mntr_time; 2727e3ec7017SPing-Ke Shih u8 nhm_manual_th_ofst; 2728e3ec7017SPing-Ke Shih u8 nhm_manual_th0; 2729e3ec7017SPing-Ke Shih enum rtw89_ifs_clm_application ifs_clm_app; 2730e3ec7017SPing-Ke Shih u32 ifs_clm_manual_th_times; 2731e3ec7017SPing-Ke Shih u32 ifs_clm_manual_th0; 2732e3ec7017SPing-Ke Shih u8 fahm_manual_th_ofst; 2733e3ec7017SPing-Ke Shih u8 fahm_manual_th0; 2734e3ec7017SPing-Ke Shih u8 fahm_numer_opt; 2735e3ec7017SPing-Ke Shih u8 fahm_denom_opt; 2736e3ec7017SPing-Ke Shih }; 2737e3ec7017SPing-Ke Shih 2738e3ec7017SPing-Ke Shih enum rtw89_ccx_edcca_opt_sc_idx { 2739e3ec7017SPing-Ke Shih RTW89_CCX_EDCCA_SEG0_P0 = 0, 2740e3ec7017SPing-Ke Shih RTW89_CCX_EDCCA_SEG0_S1 = 1, 2741e3ec7017SPing-Ke Shih RTW89_CCX_EDCCA_SEG0_S2 = 2, 2742e3ec7017SPing-Ke Shih RTW89_CCX_EDCCA_SEG0_S3 = 3, 2743e3ec7017SPing-Ke Shih RTW89_CCX_EDCCA_SEG1_P0 = 4, 2744e3ec7017SPing-Ke Shih RTW89_CCX_EDCCA_SEG1_S1 = 5, 2745e3ec7017SPing-Ke Shih RTW89_CCX_EDCCA_SEG1_S2 = 6, 2746e3ec7017SPing-Ke Shih RTW89_CCX_EDCCA_SEG1_S3 = 7 2747e3ec7017SPing-Ke Shih }; 2748e3ec7017SPing-Ke Shih 2749e3ec7017SPing-Ke Shih enum rtw89_ccx_edcca_opt_bw_idx { 2750e3ec7017SPing-Ke Shih RTW89_CCX_EDCCA_BW20_0 = 0, 2751e3ec7017SPing-Ke Shih RTW89_CCX_EDCCA_BW20_1 = 1, 2752e3ec7017SPing-Ke Shih RTW89_CCX_EDCCA_BW20_2 = 2, 2753e3ec7017SPing-Ke Shih RTW89_CCX_EDCCA_BW20_3 = 3, 2754e3ec7017SPing-Ke Shih RTW89_CCX_EDCCA_BW20_4 = 4, 2755e3ec7017SPing-Ke Shih RTW89_CCX_EDCCA_BW20_5 = 5, 2756e3ec7017SPing-Ke Shih RTW89_CCX_EDCCA_BW20_6 = 6, 2757e3ec7017SPing-Ke Shih RTW89_CCX_EDCCA_BW20_7 = 7 2758e3ec7017SPing-Ke Shih }; 2759e3ec7017SPing-Ke Shih 2760e3ec7017SPing-Ke Shih #define RTW89_NHM_TH_NUM 11 2761e3ec7017SPing-Ke Shih #define RTW89_FAHM_TH_NUM 11 2762e3ec7017SPing-Ke Shih #define RTW89_NHM_RPT_NUM 12 2763e3ec7017SPing-Ke Shih #define RTW89_FAHM_RPT_NUM 12 2764e3ec7017SPing-Ke Shih #define RTW89_IFS_CLM_NUM 4 2765e3ec7017SPing-Ke Shih struct rtw89_env_monitor_info { 2766e3ec7017SPing-Ke Shih u32 ccx_trigger_time; 2767e3ec7017SPing-Ke Shih u64 start_time; 2768e3ec7017SPing-Ke Shih u8 ccx_rpt_stamp; 2769e3ec7017SPing-Ke Shih u8 ccx_watchdog_result; 2770e3ec7017SPing-Ke Shih bool ccx_ongoing; 2771e3ec7017SPing-Ke Shih u8 ccx_rac_lv; 2772e3ec7017SPing-Ke Shih bool ccx_manual_ctrl; 2773e3ec7017SPing-Ke Shih u8 ccx_pre_rssi; 2774e3ec7017SPing-Ke Shih u16 clm_mntr_time; 2775e3ec7017SPing-Ke Shih u16 nhm_mntr_time; 2776e3ec7017SPing-Ke Shih u16 ifs_clm_mntr_time; 2777e3ec7017SPing-Ke Shih enum rtw89_ifs_clm_application ifs_clm_app; 2778e3ec7017SPing-Ke Shih u16 fahm_mntr_time; 2779e3ec7017SPing-Ke Shih u16 edcca_clm_mntr_time; 2780e3ec7017SPing-Ke Shih u16 ccx_period; 2781e3ec7017SPing-Ke Shih u8 ccx_unit_idx; 2782e3ec7017SPing-Ke Shih enum rtw89_ccx_edcca_opt_bw_idx ccx_edcca_opt_bw_idx; 2783e3ec7017SPing-Ke Shih u8 nhm_th[RTW89_NHM_TH_NUM]; 2784e3ec7017SPing-Ke Shih u16 ifs_clm_th_l[RTW89_IFS_CLM_NUM]; 2785e3ec7017SPing-Ke Shih u16 ifs_clm_th_h[RTW89_IFS_CLM_NUM]; 2786e3ec7017SPing-Ke Shih u8 fahm_numer_opt; 2787e3ec7017SPing-Ke Shih u8 fahm_denom_opt; 2788e3ec7017SPing-Ke Shih u8 fahm_th[RTW89_FAHM_TH_NUM]; 2789e3ec7017SPing-Ke Shih u16 clm_result; 2790e3ec7017SPing-Ke Shih u16 nhm_result[RTW89_NHM_RPT_NUM]; 2791e3ec7017SPing-Ke Shih u8 nhm_wgt[RTW89_NHM_RPT_NUM]; 2792e3ec7017SPing-Ke Shih u16 nhm_tx_cnt; 2793e3ec7017SPing-Ke Shih u16 nhm_cca_cnt; 2794e3ec7017SPing-Ke Shih u16 nhm_idle_cnt; 2795e3ec7017SPing-Ke Shih u16 ifs_clm_tx; 2796e3ec7017SPing-Ke Shih u16 ifs_clm_edcca_excl_cca; 2797e3ec7017SPing-Ke Shih u16 ifs_clm_ofdmfa; 2798e3ec7017SPing-Ke Shih u16 ifs_clm_ofdmcca_excl_fa; 2799e3ec7017SPing-Ke Shih u16 ifs_clm_cckfa; 2800e3ec7017SPing-Ke Shih u16 ifs_clm_cckcca_excl_fa; 2801e3ec7017SPing-Ke Shih u16 ifs_clm_total_ifs; 2802e3ec7017SPing-Ke Shih u8 ifs_clm_his[RTW89_IFS_CLM_NUM]; 2803e3ec7017SPing-Ke Shih u16 ifs_clm_avg[RTW89_IFS_CLM_NUM]; 2804e3ec7017SPing-Ke Shih u16 ifs_clm_cca[RTW89_IFS_CLM_NUM]; 2805e3ec7017SPing-Ke Shih u16 fahm_result[RTW89_FAHM_RPT_NUM]; 2806e3ec7017SPing-Ke Shih u16 fahm_denom_result; 2807e3ec7017SPing-Ke Shih u16 edcca_clm_result; 2808e3ec7017SPing-Ke Shih u8 clm_ratio; 2809e3ec7017SPing-Ke Shih u8 nhm_rpt[RTW89_NHM_RPT_NUM]; 2810e3ec7017SPing-Ke Shih u8 nhm_tx_ratio; 2811e3ec7017SPing-Ke Shih u8 nhm_cca_ratio; 2812e3ec7017SPing-Ke Shih u8 nhm_idle_ratio; 2813e3ec7017SPing-Ke Shih u8 nhm_ratio; 2814e3ec7017SPing-Ke Shih u16 nhm_result_sum; 2815e3ec7017SPing-Ke Shih u8 nhm_pwr; 2816e3ec7017SPing-Ke Shih u8 ifs_clm_tx_ratio; 2817e3ec7017SPing-Ke Shih u8 ifs_clm_edcca_excl_cca_ratio; 2818e3ec7017SPing-Ke Shih u8 ifs_clm_cck_fa_ratio; 2819e3ec7017SPing-Ke Shih u8 ifs_clm_ofdm_fa_ratio; 2820e3ec7017SPing-Ke Shih u8 ifs_clm_cck_cca_excl_fa_ratio; 2821e3ec7017SPing-Ke Shih u8 ifs_clm_ofdm_cca_excl_fa_ratio; 2822e3ec7017SPing-Ke Shih u16 ifs_clm_cck_fa_permil; 2823e3ec7017SPing-Ke Shih u16 ifs_clm_ofdm_fa_permil; 2824e3ec7017SPing-Ke Shih u32 ifs_clm_ifs_avg[RTW89_IFS_CLM_NUM]; 2825e3ec7017SPing-Ke Shih u32 ifs_clm_cca_avg[RTW89_IFS_CLM_NUM]; 2826e3ec7017SPing-Ke Shih u8 fahm_rpt[RTW89_FAHM_RPT_NUM]; 2827e3ec7017SPing-Ke Shih u16 fahm_result_sum; 2828e3ec7017SPing-Ke Shih u8 fahm_ratio; 2829e3ec7017SPing-Ke Shih u8 fahm_denom_ratio; 2830e3ec7017SPing-Ke Shih u8 fahm_pwr; 2831e3ec7017SPing-Ke Shih u8 edcca_clm_ratio; 2832e3ec7017SPing-Ke Shih }; 2833e3ec7017SPing-Ke Shih 2834e3ec7017SPing-Ke Shih enum rtw89_ser_rcvy_step { 2835e3ec7017SPing-Ke Shih RTW89_SER_DRV_STOP_TX, 2836e3ec7017SPing-Ke Shih RTW89_SER_DRV_STOP_RX, 2837e3ec7017SPing-Ke Shih RTW89_SER_DRV_STOP_RUN, 2838e3ec7017SPing-Ke Shih RTW89_SER_HAL_STOP_DMA, 2839e3ec7017SPing-Ke Shih RTW89_NUM_OF_SER_FLAGS 2840e3ec7017SPing-Ke Shih }; 2841e3ec7017SPing-Ke Shih 2842e3ec7017SPing-Ke Shih struct rtw89_ser { 2843e3ec7017SPing-Ke Shih u8 state; 2844e3ec7017SPing-Ke Shih u8 alarm_event; 2845e3ec7017SPing-Ke Shih 2846e3ec7017SPing-Ke Shih struct work_struct ser_hdl_work; 2847e3ec7017SPing-Ke Shih struct delayed_work ser_alarm_work; 2848e3ec7017SPing-Ke Shih struct state_ent *st_tbl; 2849e3ec7017SPing-Ke Shih struct event_ent *ev_tbl; 2850e3ec7017SPing-Ke Shih struct list_head msg_q; 2851e3ec7017SPing-Ke Shih spinlock_t msg_q_lock; /* lock when read/write ser msg */ 2852e3ec7017SPing-Ke Shih DECLARE_BITMAP(flags, RTW89_NUM_OF_SER_FLAGS); 2853e3ec7017SPing-Ke Shih }; 2854e3ec7017SPing-Ke Shih 2855e3ec7017SPing-Ke Shih enum rtw89_mac_ax_ps_mode { 2856e3ec7017SPing-Ke Shih RTW89_MAC_AX_PS_MODE_ACTIVE = 0, 2857e3ec7017SPing-Ke Shih RTW89_MAC_AX_PS_MODE_LEGACY = 1, 2858e3ec7017SPing-Ke Shih RTW89_MAC_AX_PS_MODE_WMMPS = 2, 2859e3ec7017SPing-Ke Shih RTW89_MAC_AX_PS_MODE_MAX = 3, 2860e3ec7017SPing-Ke Shih }; 2861e3ec7017SPing-Ke Shih 2862e3ec7017SPing-Ke Shih enum rtw89_last_rpwm_mode { 2863e3ec7017SPing-Ke Shih RTW89_LAST_RPWM_PS = 0x0, 2864e3ec7017SPing-Ke Shih RTW89_LAST_RPWM_ACTIVE = 0x6, 2865e3ec7017SPing-Ke Shih }; 2866e3ec7017SPing-Ke Shih 2867e3ec7017SPing-Ke Shih struct rtw89_lps_parm { 2868e3ec7017SPing-Ke Shih u8 macid; 2869e3ec7017SPing-Ke Shih u8 psmode; /* enum rtw89_mac_ax_ps_mode */ 2870e3ec7017SPing-Ke Shih u8 lastrpwm; /* enum rtw89_last_rpwm_mode */ 2871e3ec7017SPing-Ke Shih }; 2872e3ec7017SPing-Ke Shih 2873e3ec7017SPing-Ke Shih struct rtw89_ppdu_sts_info { 2874e3ec7017SPing-Ke Shih struct sk_buff_head rx_queue[RTW89_PHY_MAX]; 2875e3ec7017SPing-Ke Shih u8 curr_rx_ppdu_cnt[RTW89_PHY_MAX]; 2876e3ec7017SPing-Ke Shih }; 2877e3ec7017SPing-Ke Shih 2878e3ec7017SPing-Ke Shih struct rtw89_early_h2c { 2879e3ec7017SPing-Ke Shih struct list_head list; 2880e3ec7017SPing-Ke Shih u8 *h2c; 2881e3ec7017SPing-Ke Shih u16 h2c_len; 2882e3ec7017SPing-Ke Shih }; 2883e3ec7017SPing-Ke Shih 288489590777SPo Hao Huang struct rtw89_hw_scan_info { 288589590777SPo Hao Huang struct ieee80211_vif *scanning_vif; 288689590777SPo Hao Huang struct list_head pkt_list[NUM_NL80211_BANDS]; 288789590777SPo Hao Huang u8 op_pri_ch; 288889590777SPo Hao Huang u8 op_chan; 288989590777SPo Hao Huang u8 op_bw; 289089590777SPo Hao Huang u8 op_band; 289189590777SPo Hao Huang }; 289289590777SPo Hao Huang 2893e3ec7017SPing-Ke Shih struct rtw89_dev { 2894e3ec7017SPing-Ke Shih struct ieee80211_hw *hw; 2895e3ec7017SPing-Ke Shih struct device *dev; 2896e3ec7017SPing-Ke Shih 2897e3ec7017SPing-Ke Shih bool dbcc_en; 289889590777SPo Hao Huang struct rtw89_hw_scan_info scan_info; 2899e3ec7017SPing-Ke Shih const struct rtw89_chip_info *chip; 29004a9e48acSPing-Ke Shih const struct rtw89_pci_info *pci_info; 2901e3ec7017SPing-Ke Shih struct rtw89_hal hal; 2902e3ec7017SPing-Ke Shih struct rtw89_mac_info mac; 2903e3ec7017SPing-Ke Shih struct rtw89_fw_info fw; 2904e3ec7017SPing-Ke Shih struct rtw89_hci_info hci; 2905e3ec7017SPing-Ke Shih struct rtw89_efuse efuse; 2906e3ec7017SPing-Ke Shih struct rtw89_traffic_stats stats; 2907e3ec7017SPing-Ke Shih 2908e3ec7017SPing-Ke Shih /* ensures exclusive access from mac80211 callbacks */ 2909e3ec7017SPing-Ke Shih struct mutex mutex; 2910e3ec7017SPing-Ke Shih struct list_head rtwvifs_list; 2911e3ec7017SPing-Ke Shih /* used to protect rf read write */ 2912e3ec7017SPing-Ke Shih struct mutex rf_mutex; 2913e3ec7017SPing-Ke Shih struct workqueue_struct *txq_wq; 2914e3ec7017SPing-Ke Shih struct work_struct txq_work; 2915e3ec7017SPing-Ke Shih struct delayed_work txq_reinvoke_work; 2916e3ec7017SPing-Ke Shih /* used to protect ba_list */ 2917e3ec7017SPing-Ke Shih spinlock_t ba_lock; 2918e3ec7017SPing-Ke Shih /* txqs to setup ba session */ 2919e3ec7017SPing-Ke Shih struct list_head ba_list; 2920e3ec7017SPing-Ke Shih struct work_struct ba_work; 29217bfd05ffSChin-Yen Lee /* used to protect rpwm */ 29227bfd05ffSChin-Yen Lee spinlock_t rpwm_lock; 2923e3ec7017SPing-Ke Shih 2924e3ec7017SPing-Ke Shih struct rtw89_cam_info cam_info; 2925e3ec7017SPing-Ke Shih 2926e3ec7017SPing-Ke Shih struct sk_buff_head c2h_queue; 2927e3ec7017SPing-Ke Shih struct work_struct c2h_work; 292889590777SPo Hao Huang struct work_struct ips_work; 2929e3ec7017SPing-Ke Shih 2930e3ec7017SPing-Ke Shih struct list_head early_h2c_list; 2931e3ec7017SPing-Ke Shih 2932e3ec7017SPing-Ke Shih struct rtw89_ser ser; 2933e3ec7017SPing-Ke Shih 293420d9fc88SPing-Ke Shih DECLARE_BITMAP(hw_port, RTW89_PORT_NUM); 2935e3ec7017SPing-Ke Shih DECLARE_BITMAP(mac_id_map, RTW89_MAX_MAC_ID_NUM); 2936e3ec7017SPing-Ke Shih DECLARE_BITMAP(flags, NUM_OF_RTW89_FLAGS); 293789590777SPo Hao Huang DECLARE_BITMAP(pkt_offload, RTW89_MAX_PKT_OFLD_NUM); 2938e3ec7017SPing-Ke Shih 2939e3ec7017SPing-Ke Shih struct rtw89_phy_stat phystat; 2940e3ec7017SPing-Ke Shih struct rtw89_dack_info dack; 2941e3ec7017SPing-Ke Shih struct rtw89_iqk_info iqk; 2942e3ec7017SPing-Ke Shih struct rtw89_dpk_info dpk; 2943e3ec7017SPing-Ke Shih bool is_tssi_mode[RF_PATH_MAX]; 2944e3ec7017SPing-Ke Shih bool is_bt_iqk_timeout; 2945e3ec7017SPing-Ke Shih 2946e3ec7017SPing-Ke Shih struct rtw89_fem_info fem; 2947e3ec7017SPing-Ke Shih struct rtw89_txpwr_byrate byr[RTW89_BAND_MAX]; 2948e3ec7017SPing-Ke Shih struct rtw89_tssi_info tssi; 2949e3ec7017SPing-Ke Shih struct rtw89_power_trim_info pwr_trim; 2950e3ec7017SPing-Ke Shih 2951e3ec7017SPing-Ke Shih struct rtw89_cfo_tracking_info cfo_tracking; 2952e3ec7017SPing-Ke Shih struct rtw89_env_monitor_info env_monitor; 2953e3ec7017SPing-Ke Shih struct rtw89_dig_info dig; 2954e3ec7017SPing-Ke Shih struct rtw89_phy_ch_info ch_info; 2955e3ec7017SPing-Ke Shih struct delayed_work track_work; 2956e3ec7017SPing-Ke Shih struct delayed_work coex_act1_work; 2957e3ec7017SPing-Ke Shih struct delayed_work coex_bt_devinfo_work; 2958e3ec7017SPing-Ke Shih struct delayed_work coex_rfk_chk_work; 2959e3ec7017SPing-Ke Shih struct delayed_work cfo_track_work; 2960e3ec7017SPing-Ke Shih struct rtw89_ppdu_sts_info ppdu_sts; 2961e3ec7017SPing-Ke Shih u8 total_sta_assoc; 2962e3ec7017SPing-Ke Shih bool scanning; 2963e3ec7017SPing-Ke Shih 2964e3ec7017SPing-Ke Shih const struct rtw89_regulatory *regd; 2965e3ec7017SPing-Ke Shih struct rtw89_sar_info sar; 2966e3ec7017SPing-Ke Shih 2967e3ec7017SPing-Ke Shih struct rtw89_btc btc; 2968e3ec7017SPing-Ke Shih enum rtw89_ps_mode ps_mode; 2969e3ec7017SPing-Ke Shih bool lps_enabled; 2970e3ec7017SPing-Ke Shih 2971e3ec7017SPing-Ke Shih /* napi structure */ 2972e3ec7017SPing-Ke Shih struct net_device netdev; 2973e3ec7017SPing-Ke Shih struct napi_struct napi; 2974e3ec7017SPing-Ke Shih int napi_budget_countdown; 2975e3ec7017SPing-Ke Shih 2976e3ec7017SPing-Ke Shih /* HCI related data, keep last */ 29772e2f63a1SGustavo A. R. Silva u8 priv[] __aligned(sizeof(void *)); 2978e3ec7017SPing-Ke Shih }; 2979e3ec7017SPing-Ke Shih 2980e3ec7017SPing-Ke Shih static inline int rtw89_hci_tx_write(struct rtw89_dev *rtwdev, 2981e3ec7017SPing-Ke Shih struct rtw89_core_tx_request *tx_req) 2982e3ec7017SPing-Ke Shih { 2983e3ec7017SPing-Ke Shih return rtwdev->hci.ops->tx_write(rtwdev, tx_req); 2984e3ec7017SPing-Ke Shih } 2985e3ec7017SPing-Ke Shih 2986e3ec7017SPing-Ke Shih static inline void rtw89_hci_reset(struct rtw89_dev *rtwdev) 2987e3ec7017SPing-Ke Shih { 2988e3ec7017SPing-Ke Shih rtwdev->hci.ops->reset(rtwdev); 2989e3ec7017SPing-Ke Shih } 2990e3ec7017SPing-Ke Shih 2991e3ec7017SPing-Ke Shih static inline int rtw89_hci_start(struct rtw89_dev *rtwdev) 2992e3ec7017SPing-Ke Shih { 2993e3ec7017SPing-Ke Shih return rtwdev->hci.ops->start(rtwdev); 2994e3ec7017SPing-Ke Shih } 2995e3ec7017SPing-Ke Shih 2996e3ec7017SPing-Ke Shih static inline void rtw89_hci_stop(struct rtw89_dev *rtwdev) 2997e3ec7017SPing-Ke Shih { 2998e3ec7017SPing-Ke Shih rtwdev->hci.ops->stop(rtwdev); 2999e3ec7017SPing-Ke Shih } 3000e3ec7017SPing-Ke Shih 3001e3ec7017SPing-Ke Shih static inline int rtw89_hci_deinit(struct rtw89_dev *rtwdev) 3002e3ec7017SPing-Ke Shih { 3003e3ec7017SPing-Ke Shih return rtwdev->hci.ops->deinit(rtwdev); 3004e3ec7017SPing-Ke Shih } 3005e3ec7017SPing-Ke Shih 3006e3ec7017SPing-Ke Shih static inline void rtw89_hci_recalc_int_mit(struct rtw89_dev *rtwdev) 3007e3ec7017SPing-Ke Shih { 3008e3ec7017SPing-Ke Shih rtwdev->hci.ops->recalc_int_mit(rtwdev); 3009e3ec7017SPing-Ke Shih } 3010e3ec7017SPing-Ke Shih 3011e3ec7017SPing-Ke Shih static inline u32 rtw89_hci_check_and_reclaim_tx_resource(struct rtw89_dev *rtwdev, u8 txch) 3012e3ec7017SPing-Ke Shih { 3013e3ec7017SPing-Ke Shih return rtwdev->hci.ops->check_and_reclaim_tx_resource(rtwdev, txch); 3014e3ec7017SPing-Ke Shih } 3015e3ec7017SPing-Ke Shih 3016e3ec7017SPing-Ke Shih static inline void rtw89_hci_tx_kick_off(struct rtw89_dev *rtwdev, u8 txch) 3017e3ec7017SPing-Ke Shih { 3018e3ec7017SPing-Ke Shih return rtwdev->hci.ops->tx_kick_off(rtwdev, txch); 3019e3ec7017SPing-Ke Shih } 3020e3ec7017SPing-Ke Shih 3021e3ec7017SPing-Ke Shih static inline void rtw89_hci_flush_queues(struct rtw89_dev *rtwdev, u32 queues, 3022e3ec7017SPing-Ke Shih bool drop) 3023e3ec7017SPing-Ke Shih { 3024e3ec7017SPing-Ke Shih if (rtwdev->hci.ops->flush_queues) 3025e3ec7017SPing-Ke Shih return rtwdev->hci.ops->flush_queues(rtwdev, queues, drop); 3026e3ec7017SPing-Ke Shih } 3027e3ec7017SPing-Ke Shih 3028e3ec7017SPing-Ke Shih static inline u8 rtw89_read8(struct rtw89_dev *rtwdev, u32 addr) 3029e3ec7017SPing-Ke Shih { 3030e3ec7017SPing-Ke Shih return rtwdev->hci.ops->read8(rtwdev, addr); 3031e3ec7017SPing-Ke Shih } 3032e3ec7017SPing-Ke Shih 3033e3ec7017SPing-Ke Shih static inline u16 rtw89_read16(struct rtw89_dev *rtwdev, u32 addr) 3034e3ec7017SPing-Ke Shih { 3035e3ec7017SPing-Ke Shih return rtwdev->hci.ops->read16(rtwdev, addr); 3036e3ec7017SPing-Ke Shih } 3037e3ec7017SPing-Ke Shih 3038e3ec7017SPing-Ke Shih static inline u32 rtw89_read32(struct rtw89_dev *rtwdev, u32 addr) 3039e3ec7017SPing-Ke Shih { 3040e3ec7017SPing-Ke Shih return rtwdev->hci.ops->read32(rtwdev, addr); 3041e3ec7017SPing-Ke Shih } 3042e3ec7017SPing-Ke Shih 3043e3ec7017SPing-Ke Shih static inline void rtw89_write8(struct rtw89_dev *rtwdev, u32 addr, u8 data) 3044e3ec7017SPing-Ke Shih { 3045e3ec7017SPing-Ke Shih rtwdev->hci.ops->write8(rtwdev, addr, data); 3046e3ec7017SPing-Ke Shih } 3047e3ec7017SPing-Ke Shih 3048e3ec7017SPing-Ke Shih static inline void rtw89_write16(struct rtw89_dev *rtwdev, u32 addr, u16 data) 3049e3ec7017SPing-Ke Shih { 3050e3ec7017SPing-Ke Shih rtwdev->hci.ops->write16(rtwdev, addr, data); 3051e3ec7017SPing-Ke Shih } 3052e3ec7017SPing-Ke Shih 3053e3ec7017SPing-Ke Shih static inline void rtw89_write32(struct rtw89_dev *rtwdev, u32 addr, u32 data) 3054e3ec7017SPing-Ke Shih { 3055e3ec7017SPing-Ke Shih rtwdev->hci.ops->write32(rtwdev, addr, data); 3056e3ec7017SPing-Ke Shih } 3057e3ec7017SPing-Ke Shih 3058e3ec7017SPing-Ke Shih static inline void 3059e3ec7017SPing-Ke Shih rtw89_write8_set(struct rtw89_dev *rtwdev, u32 addr, u8 bit) 3060e3ec7017SPing-Ke Shih { 3061e3ec7017SPing-Ke Shih u8 val; 3062e3ec7017SPing-Ke Shih 3063e3ec7017SPing-Ke Shih val = rtw89_read8(rtwdev, addr); 3064e3ec7017SPing-Ke Shih rtw89_write8(rtwdev, addr, val | bit); 3065e3ec7017SPing-Ke Shih } 3066e3ec7017SPing-Ke Shih 3067e3ec7017SPing-Ke Shih static inline void 3068e3ec7017SPing-Ke Shih rtw89_write16_set(struct rtw89_dev *rtwdev, u32 addr, u16 bit) 3069e3ec7017SPing-Ke Shih { 3070e3ec7017SPing-Ke Shih u16 val; 3071e3ec7017SPing-Ke Shih 3072e3ec7017SPing-Ke Shih val = rtw89_read16(rtwdev, addr); 3073e3ec7017SPing-Ke Shih rtw89_write16(rtwdev, addr, val | bit); 3074e3ec7017SPing-Ke Shih } 3075e3ec7017SPing-Ke Shih 3076e3ec7017SPing-Ke Shih static inline void 3077e3ec7017SPing-Ke Shih rtw89_write32_set(struct rtw89_dev *rtwdev, u32 addr, u32 bit) 3078e3ec7017SPing-Ke Shih { 3079e3ec7017SPing-Ke Shih u32 val; 3080e3ec7017SPing-Ke Shih 3081e3ec7017SPing-Ke Shih val = rtw89_read32(rtwdev, addr); 3082e3ec7017SPing-Ke Shih rtw89_write32(rtwdev, addr, val | bit); 3083e3ec7017SPing-Ke Shih } 3084e3ec7017SPing-Ke Shih 3085e3ec7017SPing-Ke Shih static inline void 3086e3ec7017SPing-Ke Shih rtw89_write8_clr(struct rtw89_dev *rtwdev, u32 addr, u8 bit) 3087e3ec7017SPing-Ke Shih { 3088e3ec7017SPing-Ke Shih u8 val; 3089e3ec7017SPing-Ke Shih 3090e3ec7017SPing-Ke Shih val = rtw89_read8(rtwdev, addr); 3091e3ec7017SPing-Ke Shih rtw89_write8(rtwdev, addr, val & ~bit); 3092e3ec7017SPing-Ke Shih } 3093e3ec7017SPing-Ke Shih 3094e3ec7017SPing-Ke Shih static inline void 3095e3ec7017SPing-Ke Shih rtw89_write16_clr(struct rtw89_dev *rtwdev, u32 addr, u16 bit) 3096e3ec7017SPing-Ke Shih { 3097e3ec7017SPing-Ke Shih u16 val; 3098e3ec7017SPing-Ke Shih 3099e3ec7017SPing-Ke Shih val = rtw89_read16(rtwdev, addr); 3100e3ec7017SPing-Ke Shih rtw89_write16(rtwdev, addr, val & ~bit); 3101e3ec7017SPing-Ke Shih } 3102e3ec7017SPing-Ke Shih 3103e3ec7017SPing-Ke Shih static inline void 3104e3ec7017SPing-Ke Shih rtw89_write32_clr(struct rtw89_dev *rtwdev, u32 addr, u32 bit) 3105e3ec7017SPing-Ke Shih { 3106e3ec7017SPing-Ke Shih u32 val; 3107e3ec7017SPing-Ke Shih 3108e3ec7017SPing-Ke Shih val = rtw89_read32(rtwdev, addr); 3109e3ec7017SPing-Ke Shih rtw89_write32(rtwdev, addr, val & ~bit); 3110e3ec7017SPing-Ke Shih } 3111e3ec7017SPing-Ke Shih 3112e3ec7017SPing-Ke Shih static inline u32 3113e3ec7017SPing-Ke Shih rtw89_read32_mask(struct rtw89_dev *rtwdev, u32 addr, u32 mask) 3114e3ec7017SPing-Ke Shih { 3115e3ec7017SPing-Ke Shih u32 shift = __ffs(mask); 3116e3ec7017SPing-Ke Shih u32 orig; 3117e3ec7017SPing-Ke Shih u32 ret; 3118e3ec7017SPing-Ke Shih 3119e3ec7017SPing-Ke Shih orig = rtw89_read32(rtwdev, addr); 3120e3ec7017SPing-Ke Shih ret = (orig & mask) >> shift; 3121e3ec7017SPing-Ke Shih 3122e3ec7017SPing-Ke Shih return ret; 3123e3ec7017SPing-Ke Shih } 3124e3ec7017SPing-Ke Shih 3125e3ec7017SPing-Ke Shih static inline u16 3126e3ec7017SPing-Ke Shih rtw89_read16_mask(struct rtw89_dev *rtwdev, u32 addr, u32 mask) 3127e3ec7017SPing-Ke Shih { 3128e3ec7017SPing-Ke Shih u32 shift = __ffs(mask); 3129e3ec7017SPing-Ke Shih u32 orig; 3130e3ec7017SPing-Ke Shih u32 ret; 3131e3ec7017SPing-Ke Shih 3132e3ec7017SPing-Ke Shih orig = rtw89_read16(rtwdev, addr); 3133e3ec7017SPing-Ke Shih ret = (orig & mask) >> shift; 3134e3ec7017SPing-Ke Shih 3135e3ec7017SPing-Ke Shih return ret; 3136e3ec7017SPing-Ke Shih } 3137e3ec7017SPing-Ke Shih 3138e3ec7017SPing-Ke Shih static inline u8 3139e3ec7017SPing-Ke Shih rtw89_read8_mask(struct rtw89_dev *rtwdev, u32 addr, u32 mask) 3140e3ec7017SPing-Ke Shih { 3141e3ec7017SPing-Ke Shih u32 shift = __ffs(mask); 3142e3ec7017SPing-Ke Shih u32 orig; 3143e3ec7017SPing-Ke Shih u32 ret; 3144e3ec7017SPing-Ke Shih 3145e3ec7017SPing-Ke Shih orig = rtw89_read8(rtwdev, addr); 3146e3ec7017SPing-Ke Shih ret = (orig & mask) >> shift; 3147e3ec7017SPing-Ke Shih 3148e3ec7017SPing-Ke Shih return ret; 3149e3ec7017SPing-Ke Shih } 3150e3ec7017SPing-Ke Shih 3151e3ec7017SPing-Ke Shih static inline void 3152e3ec7017SPing-Ke Shih rtw89_write32_mask(struct rtw89_dev *rtwdev, u32 addr, u32 mask, u32 data) 3153e3ec7017SPing-Ke Shih { 3154e3ec7017SPing-Ke Shih u32 shift = __ffs(mask); 3155e3ec7017SPing-Ke Shih u32 orig; 3156e3ec7017SPing-Ke Shih u32 set; 3157e3ec7017SPing-Ke Shih 3158e3ec7017SPing-Ke Shih WARN(addr & 0x3, "should be 4-byte aligned, addr = 0x%08x\n", addr); 3159e3ec7017SPing-Ke Shih 3160e3ec7017SPing-Ke Shih orig = rtw89_read32(rtwdev, addr); 3161e3ec7017SPing-Ke Shih set = (orig & ~mask) | ((data << shift) & mask); 3162e3ec7017SPing-Ke Shih rtw89_write32(rtwdev, addr, set); 3163e3ec7017SPing-Ke Shih } 3164e3ec7017SPing-Ke Shih 3165e3ec7017SPing-Ke Shih static inline void 3166e3ec7017SPing-Ke Shih rtw89_write16_mask(struct rtw89_dev *rtwdev, u32 addr, u32 mask, u16 data) 3167e3ec7017SPing-Ke Shih { 3168e3ec7017SPing-Ke Shih u32 shift; 3169e3ec7017SPing-Ke Shih u16 orig, set; 3170e3ec7017SPing-Ke Shih 3171e3ec7017SPing-Ke Shih mask &= 0xffff; 3172e3ec7017SPing-Ke Shih shift = __ffs(mask); 3173e3ec7017SPing-Ke Shih 3174e3ec7017SPing-Ke Shih orig = rtw89_read16(rtwdev, addr); 3175e3ec7017SPing-Ke Shih set = (orig & ~mask) | ((data << shift) & mask); 3176e3ec7017SPing-Ke Shih rtw89_write16(rtwdev, addr, set); 3177e3ec7017SPing-Ke Shih } 3178e3ec7017SPing-Ke Shih 3179e3ec7017SPing-Ke Shih static inline void 3180e3ec7017SPing-Ke Shih rtw89_write8_mask(struct rtw89_dev *rtwdev, u32 addr, u32 mask, u8 data) 3181e3ec7017SPing-Ke Shih { 3182e3ec7017SPing-Ke Shih u32 shift; 3183e3ec7017SPing-Ke Shih u8 orig, set; 3184e3ec7017SPing-Ke Shih 3185e3ec7017SPing-Ke Shih mask &= 0xff; 3186e3ec7017SPing-Ke Shih shift = __ffs(mask); 3187e3ec7017SPing-Ke Shih 3188e3ec7017SPing-Ke Shih orig = rtw89_read8(rtwdev, addr); 3189e3ec7017SPing-Ke Shih set = (orig & ~mask) | ((data << shift) & mask); 3190e3ec7017SPing-Ke Shih rtw89_write8(rtwdev, addr, set); 3191e3ec7017SPing-Ke Shih } 3192e3ec7017SPing-Ke Shih 3193e3ec7017SPing-Ke Shih static inline u32 3194e3ec7017SPing-Ke Shih rtw89_read_rf(struct rtw89_dev *rtwdev, enum rtw89_rf_path rf_path, 3195e3ec7017SPing-Ke Shih u32 addr, u32 mask) 3196e3ec7017SPing-Ke Shih { 3197e3ec7017SPing-Ke Shih u32 val; 3198e3ec7017SPing-Ke Shih 3199e3ec7017SPing-Ke Shih mutex_lock(&rtwdev->rf_mutex); 3200e3ec7017SPing-Ke Shih val = rtwdev->chip->ops->read_rf(rtwdev, rf_path, addr, mask); 3201e3ec7017SPing-Ke Shih mutex_unlock(&rtwdev->rf_mutex); 3202e3ec7017SPing-Ke Shih 3203e3ec7017SPing-Ke Shih return val; 3204e3ec7017SPing-Ke Shih } 3205e3ec7017SPing-Ke Shih 3206e3ec7017SPing-Ke Shih static inline void 3207e3ec7017SPing-Ke Shih rtw89_write_rf(struct rtw89_dev *rtwdev, enum rtw89_rf_path rf_path, 3208e3ec7017SPing-Ke Shih u32 addr, u32 mask, u32 data) 3209e3ec7017SPing-Ke Shih { 3210e3ec7017SPing-Ke Shih mutex_lock(&rtwdev->rf_mutex); 3211e3ec7017SPing-Ke Shih rtwdev->chip->ops->write_rf(rtwdev, rf_path, addr, mask, data); 3212e3ec7017SPing-Ke Shih mutex_unlock(&rtwdev->rf_mutex); 3213e3ec7017SPing-Ke Shih } 3214e3ec7017SPing-Ke Shih 3215e3ec7017SPing-Ke Shih static inline struct ieee80211_txq *rtw89_txq_to_txq(struct rtw89_txq *rtwtxq) 3216e3ec7017SPing-Ke Shih { 3217e3ec7017SPing-Ke Shih void *p = rtwtxq; 3218e3ec7017SPing-Ke Shih 3219e3ec7017SPing-Ke Shih return container_of(p, struct ieee80211_txq, drv_priv); 3220e3ec7017SPing-Ke Shih } 3221e3ec7017SPing-Ke Shih 3222e3ec7017SPing-Ke Shih static inline void rtw89_core_txq_init(struct rtw89_dev *rtwdev, 3223e3ec7017SPing-Ke Shih struct ieee80211_txq *txq) 3224e3ec7017SPing-Ke Shih { 3225e3ec7017SPing-Ke Shih struct rtw89_txq *rtwtxq; 3226e3ec7017SPing-Ke Shih 3227e3ec7017SPing-Ke Shih if (!txq) 3228e3ec7017SPing-Ke Shih return; 3229e3ec7017SPing-Ke Shih 3230e3ec7017SPing-Ke Shih rtwtxq = (struct rtw89_txq *)txq->drv_priv; 3231e3ec7017SPing-Ke Shih INIT_LIST_HEAD(&rtwtxq->list); 3232e3ec7017SPing-Ke Shih } 3233e3ec7017SPing-Ke Shih 3234e3ec7017SPing-Ke Shih static inline struct ieee80211_vif *rtwvif_to_vif(struct rtw89_vif *rtwvif) 3235e3ec7017SPing-Ke Shih { 3236e3ec7017SPing-Ke Shih void *p = rtwvif; 3237e3ec7017SPing-Ke Shih 3238e3ec7017SPing-Ke Shih return container_of(p, struct ieee80211_vif, drv_priv); 3239e3ec7017SPing-Ke Shih } 3240e3ec7017SPing-Ke Shih 3241e3ec7017SPing-Ke Shih static inline struct ieee80211_sta *rtwsta_to_sta(struct rtw89_sta *rtwsta) 3242e3ec7017SPing-Ke Shih { 3243e3ec7017SPing-Ke Shih void *p = rtwsta; 3244e3ec7017SPing-Ke Shih 3245e3ec7017SPing-Ke Shih return container_of(p, struct ieee80211_sta, drv_priv); 3246e3ec7017SPing-Ke Shih } 3247e3ec7017SPing-Ke Shih 324840822e07SPing-Ke Shih static inline struct ieee80211_sta *rtwsta_to_sta_safe(struct rtw89_sta *rtwsta) 324940822e07SPing-Ke Shih { 325040822e07SPing-Ke Shih return rtwsta ? rtwsta_to_sta(rtwsta) : NULL; 325140822e07SPing-Ke Shih } 325240822e07SPing-Ke Shih 325340822e07SPing-Ke Shih static inline struct rtw89_sta *sta_to_rtwsta_safe(struct ieee80211_sta *sta) 325440822e07SPing-Ke Shih { 325540822e07SPing-Ke Shih return sta ? (struct rtw89_sta *)sta->drv_priv : NULL; 325640822e07SPing-Ke Shih } 325740822e07SPing-Ke Shih 3258167044afSPing-Ke Shih static inline u8 rtw89_hw_to_rate_info_bw(enum rtw89_bandwidth hw_bw) 3259167044afSPing-Ke Shih { 3260167044afSPing-Ke Shih if (hw_bw == RTW89_CHANNEL_WIDTH_160) 3261167044afSPing-Ke Shih return RATE_INFO_BW_160; 3262167044afSPing-Ke Shih else if (hw_bw == RTW89_CHANNEL_WIDTH_80) 3263167044afSPing-Ke Shih return RATE_INFO_BW_80; 3264167044afSPing-Ke Shih else if (hw_bw == RTW89_CHANNEL_WIDTH_40) 3265167044afSPing-Ke Shih return RATE_INFO_BW_40; 3266167044afSPing-Ke Shih else 3267167044afSPing-Ke Shih return RATE_INFO_BW_20; 3268167044afSPing-Ke Shih } 3269167044afSPing-Ke Shih 3270e3ec7017SPing-Ke Shih static inline 3271e715f10fSPing-Ke Shih enum rtw89_bandwidth nl_to_rtw89_bandwidth(enum nl80211_chan_width width) 3272e715f10fSPing-Ke Shih { 3273e715f10fSPing-Ke Shih switch (width) { 3274e715f10fSPing-Ke Shih default: 3275e715f10fSPing-Ke Shih WARN(1, "Not support bandwidth %d\n", width); 3276e715f10fSPing-Ke Shih fallthrough; 3277e715f10fSPing-Ke Shih case NL80211_CHAN_WIDTH_20_NOHT: 3278e715f10fSPing-Ke Shih case NL80211_CHAN_WIDTH_20: 3279e715f10fSPing-Ke Shih return RTW89_CHANNEL_WIDTH_20; 3280e715f10fSPing-Ke Shih case NL80211_CHAN_WIDTH_40: 3281e715f10fSPing-Ke Shih return RTW89_CHANNEL_WIDTH_40; 3282e715f10fSPing-Ke Shih case NL80211_CHAN_WIDTH_80: 3283e715f10fSPing-Ke Shih return RTW89_CHANNEL_WIDTH_80; 3284e715f10fSPing-Ke Shih case NL80211_CHAN_WIDTH_160: 3285e715f10fSPing-Ke Shih return RTW89_CHANNEL_WIDTH_160; 3286e715f10fSPing-Ke Shih } 3287e715f10fSPing-Ke Shih } 3288e715f10fSPing-Ke Shih 3289e715f10fSPing-Ke Shih static inline 32902ab856ccSPing-Ke Shih struct rtw89_addr_cam_entry *rtw89_get_addr_cam_of(struct rtw89_vif *rtwvif, 32912ab856ccSPing-Ke Shih struct rtw89_sta *rtwsta) 32922ab856ccSPing-Ke Shih { 32932ab856ccSPing-Ke Shih if (rtwvif->net_type == RTW89_NET_TYPE_AP_MODE && rtwsta) 32942ab856ccSPing-Ke Shih return &rtwsta->addr_cam; 32952ab856ccSPing-Ke Shih return &rtwvif->addr_cam; 32962ab856ccSPing-Ke Shih } 32972ab856ccSPing-Ke Shih 32982ab856ccSPing-Ke Shih static inline 3299e3ec7017SPing-Ke Shih void rtw89_chip_set_channel_prepare(struct rtw89_dev *rtwdev, 3300e3ec7017SPing-Ke Shih struct rtw89_channel_help_params *p) 3301e3ec7017SPing-Ke Shih { 3302e3ec7017SPing-Ke Shih rtwdev->chip->ops->set_channel_help(rtwdev, true, p); 3303e3ec7017SPing-Ke Shih } 3304e3ec7017SPing-Ke Shih 3305e3ec7017SPing-Ke Shih static inline 3306e3ec7017SPing-Ke Shih void rtw89_chip_set_channel_done(struct rtw89_dev *rtwdev, 3307e3ec7017SPing-Ke Shih struct rtw89_channel_help_params *p) 3308e3ec7017SPing-Ke Shih { 3309e3ec7017SPing-Ke Shih rtwdev->chip->ops->set_channel_help(rtwdev, false, p); 3310e3ec7017SPing-Ke Shih } 3311e3ec7017SPing-Ke Shih 3312e3ec7017SPing-Ke Shih static inline void rtw89_chip_fem_setup(struct rtw89_dev *rtwdev) 3313e3ec7017SPing-Ke Shih { 3314e3ec7017SPing-Ke Shih const struct rtw89_chip_info *chip = rtwdev->chip; 3315e3ec7017SPing-Ke Shih 3316e3ec7017SPing-Ke Shih if (chip->ops->fem_setup) 3317e3ec7017SPing-Ke Shih chip->ops->fem_setup(rtwdev); 3318e3ec7017SPing-Ke Shih } 3319e3ec7017SPing-Ke Shih 3320e3ec7017SPing-Ke Shih static inline void rtw89_chip_bb_sethw(struct rtw89_dev *rtwdev) 3321e3ec7017SPing-Ke Shih { 3322e3ec7017SPing-Ke Shih const struct rtw89_chip_info *chip = rtwdev->chip; 3323e3ec7017SPing-Ke Shih 3324e3ec7017SPing-Ke Shih if (chip->ops->bb_sethw) 3325e3ec7017SPing-Ke Shih chip->ops->bb_sethw(rtwdev); 3326e3ec7017SPing-Ke Shih } 3327e3ec7017SPing-Ke Shih 3328e3ec7017SPing-Ke Shih static inline void rtw89_chip_rfk_init(struct rtw89_dev *rtwdev) 3329e3ec7017SPing-Ke Shih { 3330e3ec7017SPing-Ke Shih const struct rtw89_chip_info *chip = rtwdev->chip; 3331e3ec7017SPing-Ke Shih 3332e3ec7017SPing-Ke Shih if (chip->ops->rfk_init) 3333e3ec7017SPing-Ke Shih chip->ops->rfk_init(rtwdev); 3334e3ec7017SPing-Ke Shih } 3335e3ec7017SPing-Ke Shih 3336e3ec7017SPing-Ke Shih static inline void rtw89_chip_rfk_channel(struct rtw89_dev *rtwdev) 3337e3ec7017SPing-Ke Shih { 3338e3ec7017SPing-Ke Shih const struct rtw89_chip_info *chip = rtwdev->chip; 3339e3ec7017SPing-Ke Shih 3340e3ec7017SPing-Ke Shih if (chip->ops->rfk_channel) 3341e3ec7017SPing-Ke Shih chip->ops->rfk_channel(rtwdev); 3342e3ec7017SPing-Ke Shih } 3343e3ec7017SPing-Ke Shih 3344e3ec7017SPing-Ke Shih static inline void rtw89_chip_rfk_band_changed(struct rtw89_dev *rtwdev) 3345e3ec7017SPing-Ke Shih { 3346e3ec7017SPing-Ke Shih const struct rtw89_chip_info *chip = rtwdev->chip; 3347e3ec7017SPing-Ke Shih 3348e3ec7017SPing-Ke Shih if (chip->ops->rfk_band_changed) 3349e3ec7017SPing-Ke Shih chip->ops->rfk_band_changed(rtwdev); 3350e3ec7017SPing-Ke Shih } 3351e3ec7017SPing-Ke Shih 3352e3ec7017SPing-Ke Shih static inline void rtw89_chip_rfk_scan(struct rtw89_dev *rtwdev, bool start) 3353e3ec7017SPing-Ke Shih { 3354e3ec7017SPing-Ke Shih const struct rtw89_chip_info *chip = rtwdev->chip; 3355e3ec7017SPing-Ke Shih 3356e3ec7017SPing-Ke Shih if (chip->ops->rfk_scan) 3357e3ec7017SPing-Ke Shih chip->ops->rfk_scan(rtwdev, start); 3358e3ec7017SPing-Ke Shih } 3359e3ec7017SPing-Ke Shih 3360e3ec7017SPing-Ke Shih static inline void rtw89_chip_rfk_track(struct rtw89_dev *rtwdev) 3361e3ec7017SPing-Ke Shih { 3362e3ec7017SPing-Ke Shih const struct rtw89_chip_info *chip = rtwdev->chip; 3363e3ec7017SPing-Ke Shih 3364e3ec7017SPing-Ke Shih if (chip->ops->rfk_track) 3365e3ec7017SPing-Ke Shih chip->ops->rfk_track(rtwdev); 3366e3ec7017SPing-Ke Shih } 3367e3ec7017SPing-Ke Shih 3368e3ec7017SPing-Ke Shih static inline void rtw89_chip_set_txpwr_ctrl(struct rtw89_dev *rtwdev) 3369e3ec7017SPing-Ke Shih { 3370e3ec7017SPing-Ke Shih const struct rtw89_chip_info *chip = rtwdev->chip; 3371e3ec7017SPing-Ke Shih 3372e3ec7017SPing-Ke Shih if (chip->ops->set_txpwr_ctrl) 3373e3ec7017SPing-Ke Shih chip->ops->set_txpwr_ctrl(rtwdev); 3374e3ec7017SPing-Ke Shih } 3375e3ec7017SPing-Ke Shih 3376e3ec7017SPing-Ke Shih static inline void rtw89_chip_set_txpwr(struct rtw89_dev *rtwdev) 3377e3ec7017SPing-Ke Shih { 3378e3ec7017SPing-Ke Shih const struct rtw89_chip_info *chip = rtwdev->chip; 3379e3ec7017SPing-Ke Shih u8 ch = rtwdev->hal.current_channel; 3380e3ec7017SPing-Ke Shih 3381e3ec7017SPing-Ke Shih if (!ch) 3382e3ec7017SPing-Ke Shih return; 3383e3ec7017SPing-Ke Shih 3384e3ec7017SPing-Ke Shih if (chip->ops->set_txpwr) 3385e3ec7017SPing-Ke Shih chip->ops->set_txpwr(rtwdev); 3386e3ec7017SPing-Ke Shih } 3387e3ec7017SPing-Ke Shih 3388e3ec7017SPing-Ke Shih static inline void rtw89_chip_power_trim(struct rtw89_dev *rtwdev) 3389e3ec7017SPing-Ke Shih { 3390e3ec7017SPing-Ke Shih const struct rtw89_chip_info *chip = rtwdev->chip; 3391e3ec7017SPing-Ke Shih 3392e3ec7017SPing-Ke Shih if (chip->ops->power_trim) 3393e3ec7017SPing-Ke Shih chip->ops->power_trim(rtwdev); 3394e3ec7017SPing-Ke Shih } 3395e3ec7017SPing-Ke Shih 3396e3ec7017SPing-Ke Shih static inline void rtw89_chip_init_txpwr_unit(struct rtw89_dev *rtwdev, 3397e3ec7017SPing-Ke Shih enum rtw89_phy_idx phy_idx) 3398e3ec7017SPing-Ke Shih { 3399e3ec7017SPing-Ke Shih const struct rtw89_chip_info *chip = rtwdev->chip; 3400e3ec7017SPing-Ke Shih 3401e3ec7017SPing-Ke Shih if (chip->ops->init_txpwr_unit) 3402e3ec7017SPing-Ke Shih chip->ops->init_txpwr_unit(rtwdev, phy_idx); 3403e3ec7017SPing-Ke Shih } 3404e3ec7017SPing-Ke Shih 3405e3ec7017SPing-Ke Shih static inline u8 rtw89_chip_get_thermal(struct rtw89_dev *rtwdev, 3406e3ec7017SPing-Ke Shih enum rtw89_rf_path rf_path) 3407e3ec7017SPing-Ke Shih { 3408e3ec7017SPing-Ke Shih const struct rtw89_chip_info *chip = rtwdev->chip; 3409e3ec7017SPing-Ke Shih 3410e3ec7017SPing-Ke Shih if (!chip->ops->get_thermal) 3411e3ec7017SPing-Ke Shih return 0x10; 3412e3ec7017SPing-Ke Shih 3413e3ec7017SPing-Ke Shih return chip->ops->get_thermal(rtwdev, rf_path); 3414e3ec7017SPing-Ke Shih } 3415e3ec7017SPing-Ke Shih 3416e3ec7017SPing-Ke Shih static inline void rtw89_chip_query_ppdu(struct rtw89_dev *rtwdev, 3417e3ec7017SPing-Ke Shih struct rtw89_rx_phy_ppdu *phy_ppdu, 3418e3ec7017SPing-Ke Shih struct ieee80211_rx_status *status) 3419e3ec7017SPing-Ke Shih { 3420e3ec7017SPing-Ke Shih const struct rtw89_chip_info *chip = rtwdev->chip; 3421e3ec7017SPing-Ke Shih 3422e3ec7017SPing-Ke Shih if (chip->ops->query_ppdu) 3423e3ec7017SPing-Ke Shih chip->ops->query_ppdu(rtwdev, phy_ppdu, status); 3424e3ec7017SPing-Ke Shih } 3425e3ec7017SPing-Ke Shih 3426e3ec7017SPing-Ke Shih static inline void rtw89_chip_bb_ctrl_btc_preagc(struct rtw89_dev *rtwdev, 3427e3ec7017SPing-Ke Shih bool bt_en) 3428e3ec7017SPing-Ke Shih { 3429e3ec7017SPing-Ke Shih const struct rtw89_chip_info *chip = rtwdev->chip; 3430e3ec7017SPing-Ke Shih 3431e3ec7017SPing-Ke Shih if (chip->ops->bb_ctrl_btc_preagc) 3432e3ec7017SPing-Ke Shih chip->ops->bb_ctrl_btc_preagc(rtwdev, bt_en); 3433e3ec7017SPing-Ke Shih } 3434e3ec7017SPing-Ke Shih 3435e3ec7017SPing-Ke Shih static inline 3436e3ec7017SPing-Ke Shih void rtw89_chip_cfg_txpwr_ul_tb_offset(struct rtw89_dev *rtwdev, 3437e3ec7017SPing-Ke Shih struct ieee80211_vif *vif) 3438e3ec7017SPing-Ke Shih { 3439e3ec7017SPing-Ke Shih struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv; 3440e3ec7017SPing-Ke Shih const struct rtw89_chip_info *chip = rtwdev->chip; 3441e3ec7017SPing-Ke Shih 3442e3ec7017SPing-Ke Shih if (!vif->bss_conf.he_support || !vif->bss_conf.assoc) 3443e3ec7017SPing-Ke Shih return; 3444e3ec7017SPing-Ke Shih 3445e3ec7017SPing-Ke Shih if (chip->ops->set_txpwr_ul_tb_offset) 3446e3ec7017SPing-Ke Shih chip->ops->set_txpwr_ul_tb_offset(rtwdev, 0, rtwvif->mac_idx); 3447e3ec7017SPing-Ke Shih } 3448e3ec7017SPing-Ke Shih 3449e3ec7017SPing-Ke Shih static inline void rtw89_load_txpwr_table(struct rtw89_dev *rtwdev, 3450e3ec7017SPing-Ke Shih const struct rtw89_txpwr_table *tbl) 3451e3ec7017SPing-Ke Shih { 3452e3ec7017SPing-Ke Shih tbl->load(rtwdev, tbl); 3453e3ec7017SPing-Ke Shih } 3454e3ec7017SPing-Ke Shih 3455e3ec7017SPing-Ke Shih static inline u8 rtw89_regd_get(struct rtw89_dev *rtwdev, u8 band) 3456e3ec7017SPing-Ke Shih { 3457e3ec7017SPing-Ke Shih return rtwdev->regd->txpwr_regd[band]; 3458e3ec7017SPing-Ke Shih } 3459e3ec7017SPing-Ke Shih 3460e3ec7017SPing-Ke Shih static inline void rtw89_ctrl_btg(struct rtw89_dev *rtwdev, bool btg) 3461e3ec7017SPing-Ke Shih { 3462e3ec7017SPing-Ke Shih const struct rtw89_chip_info *chip = rtwdev->chip; 3463e3ec7017SPing-Ke Shih 3464e3ec7017SPing-Ke Shih if (chip->ops->ctrl_btg) 3465e3ec7017SPing-Ke Shih chip->ops->ctrl_btg(rtwdev, btg); 3466e3ec7017SPing-Ke Shih } 3467e3ec7017SPing-Ke Shih 3468e3ec7017SPing-Ke Shih static inline u8 *get_hdr_bssid(struct ieee80211_hdr *hdr) 3469e3ec7017SPing-Ke Shih { 3470e3ec7017SPing-Ke Shih __le16 fc = hdr->frame_control; 3471e3ec7017SPing-Ke Shih 3472e3ec7017SPing-Ke Shih if (ieee80211_has_tods(fc)) 3473e3ec7017SPing-Ke Shih return hdr->addr1; 3474e3ec7017SPing-Ke Shih else if (ieee80211_has_fromds(fc)) 3475e3ec7017SPing-Ke Shih return hdr->addr2; 3476e3ec7017SPing-Ke Shih else 3477e3ec7017SPing-Ke Shih return hdr->addr3; 3478e3ec7017SPing-Ke Shih } 3479e3ec7017SPing-Ke Shih 3480e3ec7017SPing-Ke Shih static inline bool rtw89_sta_has_beamformer_cap(struct ieee80211_sta *sta) 3481e3ec7017SPing-Ke Shih { 3482e3ec7017SPing-Ke Shih if ((sta->vht_cap.cap & IEEE80211_VHT_CAP_MU_BEAMFORMER_CAPABLE) || 3483e3ec7017SPing-Ke Shih (sta->vht_cap.cap & IEEE80211_VHT_CAP_SU_BEAMFORMER_CAPABLE) || 3484e3ec7017SPing-Ke Shih (sta->he_cap.he_cap_elem.phy_cap_info[3] & IEEE80211_HE_PHY_CAP3_SU_BEAMFORMER) || 3485e3ec7017SPing-Ke Shih (sta->he_cap.he_cap_elem.phy_cap_info[4] & IEEE80211_HE_PHY_CAP4_MU_BEAMFORMER)) 3486e3ec7017SPing-Ke Shih return true; 3487e3ec7017SPing-Ke Shih return false; 3488e3ec7017SPing-Ke Shih } 3489e3ec7017SPing-Ke Shih 3490e3ec7017SPing-Ke Shih static inline struct rtw89_fw_suit *rtw89_fw_suit_get(struct rtw89_dev *rtwdev, 3491e3ec7017SPing-Ke Shih enum rtw89_fw_type type) 3492e3ec7017SPing-Ke Shih { 3493e3ec7017SPing-Ke Shih struct rtw89_fw_info *fw_info = &rtwdev->fw; 3494e3ec7017SPing-Ke Shih 3495e3ec7017SPing-Ke Shih if (type == RTW89_FW_WOWLAN) 3496e3ec7017SPing-Ke Shih return &fw_info->wowlan; 3497e3ec7017SPing-Ke Shih return &fw_info->normal; 3498e3ec7017SPing-Ke Shih } 3499e3ec7017SPing-Ke Shih 3500e3ec7017SPing-Ke Shih int rtw89_core_tx_write(struct rtw89_dev *rtwdev, struct ieee80211_vif *vif, 3501e3ec7017SPing-Ke Shih struct ieee80211_sta *sta, struct sk_buff *skb, int *qsel); 3502e3ec7017SPing-Ke Shih int rtw89_h2c_tx(struct rtw89_dev *rtwdev, 3503e3ec7017SPing-Ke Shih struct sk_buff *skb, bool fwdl); 3504e3ec7017SPing-Ke Shih void rtw89_core_tx_kick_off(struct rtw89_dev *rtwdev, u8 qsel); 3505e3ec7017SPing-Ke Shih void rtw89_core_fill_txdesc(struct rtw89_dev *rtwdev, 3506e3ec7017SPing-Ke Shih struct rtw89_tx_desc_info *desc_info, 3507e3ec7017SPing-Ke Shih void *txdesc); 3508e3ec7017SPing-Ke Shih void rtw89_core_rx(struct rtw89_dev *rtwdev, 3509e3ec7017SPing-Ke Shih struct rtw89_rx_desc_info *desc_info, 3510e3ec7017SPing-Ke Shih struct sk_buff *skb); 3511e3ec7017SPing-Ke Shih void rtw89_core_query_rxdesc(struct rtw89_dev *rtwdev, 3512e3ec7017SPing-Ke Shih struct rtw89_rx_desc_info *desc_info, 3513e3ec7017SPing-Ke Shih u8 *data, u32 data_offset); 3514e3ec7017SPing-Ke Shih void rtw89_core_napi_start(struct rtw89_dev *rtwdev); 3515e3ec7017SPing-Ke Shih void rtw89_core_napi_stop(struct rtw89_dev *rtwdev); 3516e3ec7017SPing-Ke Shih void rtw89_core_napi_init(struct rtw89_dev *rtwdev); 3517e3ec7017SPing-Ke Shih void rtw89_core_napi_deinit(struct rtw89_dev *rtwdev); 3518e3ec7017SPing-Ke Shih int rtw89_core_sta_add(struct rtw89_dev *rtwdev, 3519e3ec7017SPing-Ke Shih struct ieee80211_vif *vif, 3520e3ec7017SPing-Ke Shih struct ieee80211_sta *sta); 3521e3ec7017SPing-Ke Shih int rtw89_core_sta_assoc(struct rtw89_dev *rtwdev, 3522e3ec7017SPing-Ke Shih struct ieee80211_vif *vif, 3523e3ec7017SPing-Ke Shih struct ieee80211_sta *sta); 3524e3ec7017SPing-Ke Shih int rtw89_core_sta_disassoc(struct rtw89_dev *rtwdev, 3525e3ec7017SPing-Ke Shih struct ieee80211_vif *vif, 3526e3ec7017SPing-Ke Shih struct ieee80211_sta *sta); 3527e3ec7017SPing-Ke Shih int rtw89_core_sta_disconnect(struct rtw89_dev *rtwdev, 3528e3ec7017SPing-Ke Shih struct ieee80211_vif *vif, 3529e3ec7017SPing-Ke Shih struct ieee80211_sta *sta); 3530e3ec7017SPing-Ke Shih int rtw89_core_sta_remove(struct rtw89_dev *rtwdev, 3531e3ec7017SPing-Ke Shih struct ieee80211_vif *vif, 3532e3ec7017SPing-Ke Shih struct ieee80211_sta *sta); 3533e3ec7017SPing-Ke Shih int rtw89_core_init(struct rtw89_dev *rtwdev); 3534e3ec7017SPing-Ke Shih void rtw89_core_deinit(struct rtw89_dev *rtwdev); 3535e3ec7017SPing-Ke Shih int rtw89_core_register(struct rtw89_dev *rtwdev); 3536e3ec7017SPing-Ke Shih void rtw89_core_unregister(struct rtw89_dev *rtwdev); 3537e3ec7017SPing-Ke Shih void rtw89_set_channel(struct rtw89_dev *rtwdev); 3538e3ec7017SPing-Ke Shih u8 rtw89_core_acquire_bit_map(unsigned long *addr, unsigned long size); 3539e3ec7017SPing-Ke Shih void rtw89_core_release_bit_map(unsigned long *addr, u8 bit); 3540e3ec7017SPing-Ke Shih void rtw89_core_release_all_bits_map(unsigned long *addr, unsigned int nbits); 35413ffbb5a8SPing-Ke Shih int rtw89_core_acquire_sta_ba_entry(struct rtw89_sta *rtwsta, u8 tid, u8 *cam_idx); 35423ffbb5a8SPing-Ke Shih int rtw89_core_release_sta_ba_entry(struct rtw89_sta *rtwsta, u8 tid, u8 *cam_idx); 3543e3ec7017SPing-Ke Shih void rtw89_vif_type_mapping(struct ieee80211_vif *vif, bool assoc); 3544e3ec7017SPing-Ke Shih int rtw89_chip_info_setup(struct rtw89_dev *rtwdev); 3545e3ec7017SPing-Ke Shih u16 rtw89_ra_report_to_bitrate(struct rtw89_dev *rtwdev, u8 rpt_rate); 3546e3ec7017SPing-Ke Shih int rtw89_regd_init(struct rtw89_dev *rtwdev, 3547e3ec7017SPing-Ke Shih void (*reg_notifier)(struct wiphy *wiphy, struct regulatory_request *request)); 3548e3ec7017SPing-Ke Shih void rtw89_regd_notifier(struct wiphy *wiphy, struct regulatory_request *request); 3549e3ec7017SPing-Ke Shih void rtw89_traffic_stats_init(struct rtw89_dev *rtwdev, 3550e3ec7017SPing-Ke Shih struct rtw89_traffic_stats *stats); 3551e3ec7017SPing-Ke Shih int rtw89_core_start(struct rtw89_dev *rtwdev); 3552e3ec7017SPing-Ke Shih void rtw89_core_stop(struct rtw89_dev *rtwdev); 3553d62816b4SPing-Ke Shih void rtw89_core_update_beacon_work(struct work_struct *work); 355489590777SPo Hao Huang void rtw89_core_scan_start(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif, 355589590777SPo Hao Huang const u8 *mac_addr, bool hw_scan); 355689590777SPo Hao Huang void rtw89_core_scan_complete(struct rtw89_dev *rtwdev, 355789590777SPo Hao Huang struct ieee80211_vif *vif, bool hw_scan); 3558e3ec7017SPing-Ke Shih 3559e3ec7017SPing-Ke Shih #endif 3560