1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause 2 /* Copyright (C) 2021 Martin Blumenstingl <martin.blumenstingl@googlemail.com> 3 * Copyright (C) 2021 Jernej Skrabec <jernej.skrabec@gmail.com> 4 * 5 * Based on rtw88/pci.c: 6 * Copyright(c) 2018-2019 Realtek Corporation 7 */ 8 9 #include <linux/module.h> 10 #include <linux/mmc/host.h> 11 #include <linux/mmc/sdio_func.h> 12 #include "main.h" 13 #include "debug.h" 14 #include "fw.h" 15 #include "ps.h" 16 #include "reg.h" 17 #include "rx.h" 18 #include "sdio.h" 19 #include "tx.h" 20 21 #define RTW_SDIO_INDIRECT_RW_RETRIES 50 22 23 static bool rtw_sdio_is_bus_addr(u32 addr) 24 { 25 return !!(addr & RTW_SDIO_BUS_MSK); 26 } 27 28 static bool rtw_sdio_bus_claim_needed(struct rtw_sdio *rtwsdio) 29 { 30 return !rtwsdio->irq_thread || 31 rtwsdio->irq_thread != current; 32 } 33 34 static u32 rtw_sdio_to_bus_offset(struct rtw_dev *rtwdev, u32 addr) 35 { 36 switch (addr & RTW_SDIO_BUS_MSK) { 37 case WLAN_IOREG_OFFSET: 38 addr &= WLAN_IOREG_REG_MSK; 39 addr |= FIELD_PREP(REG_SDIO_CMD_ADDR_MSK, 40 REG_SDIO_CMD_ADDR_MAC_REG); 41 break; 42 case SDIO_LOCAL_OFFSET: 43 addr &= SDIO_LOCAL_REG_MSK; 44 addr |= FIELD_PREP(REG_SDIO_CMD_ADDR_MSK, 45 REG_SDIO_CMD_ADDR_SDIO_REG); 46 break; 47 default: 48 rtw_warn(rtwdev, "Cannot convert addr 0x%08x to bus offset", 49 addr); 50 } 51 52 return addr; 53 } 54 55 static bool rtw_sdio_use_memcpy_io(struct rtw_dev *rtwdev, u32 addr, 56 u8 alignment) 57 { 58 return IS_ALIGNED(addr, alignment) && 59 test_bit(RTW_FLAG_POWERON, rtwdev->flags); 60 } 61 62 static void rtw_sdio_writel(struct rtw_dev *rtwdev, u32 val, u32 addr, 63 int *err_ret) 64 { 65 struct rtw_sdio *rtwsdio = (struct rtw_sdio *)rtwdev->priv; 66 u8 buf[4]; 67 int i; 68 69 if (rtw_sdio_use_memcpy_io(rtwdev, addr, 4)) { 70 sdio_writel(rtwsdio->sdio_func, val, addr, err_ret); 71 return; 72 } 73 74 *(__le32 *)buf = cpu_to_le32(val); 75 76 for (i = 0; i < 4; i++) { 77 sdio_writeb(rtwsdio->sdio_func, buf[i], addr + i, err_ret); 78 if (*err_ret) 79 return; 80 } 81 } 82 83 static void rtw_sdio_writew(struct rtw_dev *rtwdev, u16 val, u32 addr, 84 int *err_ret) 85 { 86 struct rtw_sdio *rtwsdio = (struct rtw_sdio *)rtwdev->priv; 87 u8 buf[2]; 88 int i; 89 90 if (rtw_sdio_use_memcpy_io(rtwdev, addr, 2)) { 91 sdio_writew(rtwsdio->sdio_func, val, addr, err_ret); 92 return; 93 } 94 95 *(__le16 *)buf = cpu_to_le16(val); 96 97 for (i = 0; i < 2; i++) { 98 sdio_writeb(rtwsdio->sdio_func, buf[i], addr + i, err_ret); 99 if (*err_ret) 100 return; 101 } 102 } 103 104 static u32 rtw_sdio_readl(struct rtw_dev *rtwdev, u32 addr, int *err_ret) 105 { 106 struct rtw_sdio *rtwsdio = (struct rtw_sdio *)rtwdev->priv; 107 u8 buf[4]; 108 int i; 109 110 if (rtw_sdio_use_memcpy_io(rtwdev, addr, 4)) 111 return sdio_readl(rtwsdio->sdio_func, addr, err_ret); 112 113 for (i = 0; i < 4; i++) { 114 buf[i] = sdio_readb(rtwsdio->sdio_func, addr + i, err_ret); 115 if (*err_ret) 116 return 0; 117 } 118 119 return le32_to_cpu(*(__le32 *)buf); 120 } 121 122 static u16 rtw_sdio_readw(struct rtw_dev *rtwdev, u32 addr, int *err_ret) 123 { 124 struct rtw_sdio *rtwsdio = (struct rtw_sdio *)rtwdev->priv; 125 u8 buf[2]; 126 int i; 127 128 if (rtw_sdio_use_memcpy_io(rtwdev, addr, 2)) 129 return sdio_readw(rtwsdio->sdio_func, addr, err_ret); 130 131 for (i = 0; i < 2; i++) { 132 buf[i] = sdio_readb(rtwsdio->sdio_func, addr + i, err_ret); 133 if (*err_ret) 134 return 0; 135 } 136 137 return le16_to_cpu(*(__le16 *)buf); 138 } 139 140 static u32 rtw_sdio_to_io_address(struct rtw_dev *rtwdev, u32 addr, 141 bool direct) 142 { 143 if (!direct) 144 return addr; 145 146 if (!rtw_sdio_is_bus_addr(addr)) 147 addr |= WLAN_IOREG_OFFSET; 148 149 return rtw_sdio_to_bus_offset(rtwdev, addr); 150 } 151 152 static bool rtw_sdio_use_direct_io(struct rtw_dev *rtwdev, u32 addr) 153 { 154 return !rtw_sdio_is_sdio30_supported(rtwdev) || 155 rtw_sdio_is_bus_addr(addr); 156 } 157 158 static int rtw_sdio_indirect_reg_cfg(struct rtw_dev *rtwdev, u32 addr, u32 cfg) 159 { 160 struct rtw_sdio *rtwsdio = (struct rtw_sdio *)rtwdev->priv; 161 unsigned int retry; 162 u32 reg_cfg; 163 int ret; 164 u8 tmp; 165 166 reg_cfg = rtw_sdio_to_bus_offset(rtwdev, REG_SDIO_INDIRECT_REG_CFG); 167 168 rtw_sdio_writel(rtwdev, addr | cfg | BIT_SDIO_INDIRECT_REG_CFG_UNK20, 169 reg_cfg, &ret); 170 if (ret) 171 return ret; 172 173 for (retry = 0; retry < RTW_SDIO_INDIRECT_RW_RETRIES; retry++) { 174 tmp = sdio_readb(rtwsdio->sdio_func, reg_cfg + 2, &ret); 175 if (!ret && (tmp & BIT(4))) 176 return 0; 177 } 178 179 return -ETIMEDOUT; 180 } 181 182 static u8 rtw_sdio_indirect_read8(struct rtw_dev *rtwdev, u32 addr, 183 int *err_ret) 184 { 185 struct rtw_sdio *rtwsdio = (struct rtw_sdio *)rtwdev->priv; 186 u32 reg_data; 187 188 *err_ret = rtw_sdio_indirect_reg_cfg(rtwdev, addr, 189 BIT_SDIO_INDIRECT_REG_CFG_READ); 190 if (*err_ret) 191 return 0; 192 193 reg_data = rtw_sdio_to_bus_offset(rtwdev, REG_SDIO_INDIRECT_REG_DATA); 194 return sdio_readb(rtwsdio->sdio_func, reg_data, err_ret); 195 } 196 197 static int rtw_sdio_indirect_read_bytes(struct rtw_dev *rtwdev, u32 addr, 198 u8 *buf, int count) 199 { 200 int i, ret = 0; 201 202 for (i = 0; i < count; i++) { 203 buf[i] = rtw_sdio_indirect_read8(rtwdev, addr + i, &ret); 204 if (ret) 205 break; 206 } 207 208 return ret; 209 } 210 211 static u16 rtw_sdio_indirect_read16(struct rtw_dev *rtwdev, u32 addr, 212 int *err_ret) 213 { 214 u32 reg_data; 215 u8 buf[2]; 216 217 if (!IS_ALIGNED(addr, 2)) { 218 *err_ret = rtw_sdio_indirect_read_bytes(rtwdev, addr, buf, 2); 219 if (*err_ret) 220 return 0; 221 222 return le16_to_cpu(*(__le16 *)buf); 223 } 224 225 *err_ret = rtw_sdio_indirect_reg_cfg(rtwdev, addr, 226 BIT_SDIO_INDIRECT_REG_CFG_READ); 227 if (*err_ret) 228 return 0; 229 230 reg_data = rtw_sdio_to_bus_offset(rtwdev, REG_SDIO_INDIRECT_REG_DATA); 231 return rtw_sdio_readw(rtwdev, reg_data, err_ret); 232 } 233 234 static u32 rtw_sdio_indirect_read32(struct rtw_dev *rtwdev, u32 addr, 235 int *err_ret) 236 { 237 u32 reg_data; 238 u8 buf[4]; 239 240 if (!IS_ALIGNED(addr, 4)) { 241 *err_ret = rtw_sdio_indirect_read_bytes(rtwdev, addr, buf, 4); 242 if (*err_ret) 243 return 0; 244 245 return le32_to_cpu(*(__le32 *)buf); 246 } 247 248 *err_ret = rtw_sdio_indirect_reg_cfg(rtwdev, addr, 249 BIT_SDIO_INDIRECT_REG_CFG_READ); 250 if (*err_ret) 251 return 0; 252 253 reg_data = rtw_sdio_to_bus_offset(rtwdev, REG_SDIO_INDIRECT_REG_DATA); 254 return rtw_sdio_readl(rtwdev, reg_data, err_ret); 255 } 256 257 static u8 rtw_sdio_read8(struct rtw_dev *rtwdev, u32 addr) 258 { 259 struct rtw_sdio *rtwsdio = (struct rtw_sdio *)rtwdev->priv; 260 bool direct, bus_claim; 261 int ret; 262 u8 val; 263 264 direct = rtw_sdio_use_direct_io(rtwdev, addr); 265 addr = rtw_sdio_to_io_address(rtwdev, addr, direct); 266 bus_claim = rtw_sdio_bus_claim_needed(rtwsdio); 267 268 if (bus_claim) 269 sdio_claim_host(rtwsdio->sdio_func); 270 271 if (direct) 272 val = sdio_readb(rtwsdio->sdio_func, addr, &ret); 273 else 274 val = rtw_sdio_indirect_read8(rtwdev, addr, &ret); 275 276 if (bus_claim) 277 sdio_release_host(rtwsdio->sdio_func); 278 279 if (ret) 280 rtw_warn(rtwdev, "sdio read8 failed (0x%x): %d", addr, ret); 281 282 return val; 283 } 284 285 static u16 rtw_sdio_read16(struct rtw_dev *rtwdev, u32 addr) 286 { 287 struct rtw_sdio *rtwsdio = (struct rtw_sdio *)rtwdev->priv; 288 bool direct, bus_claim; 289 int ret; 290 u16 val; 291 292 direct = rtw_sdio_use_direct_io(rtwdev, addr); 293 addr = rtw_sdio_to_io_address(rtwdev, addr, direct); 294 bus_claim = rtw_sdio_bus_claim_needed(rtwsdio); 295 296 if (bus_claim) 297 sdio_claim_host(rtwsdio->sdio_func); 298 299 if (direct) 300 val = rtw_sdio_readw(rtwdev, addr, &ret); 301 else 302 val = rtw_sdio_indirect_read16(rtwdev, addr, &ret); 303 304 if (bus_claim) 305 sdio_release_host(rtwsdio->sdio_func); 306 307 if (ret) 308 rtw_warn(rtwdev, "sdio read16 failed (0x%x): %d", addr, ret); 309 310 return val; 311 } 312 313 static u32 rtw_sdio_read32(struct rtw_dev *rtwdev, u32 addr) 314 { 315 struct rtw_sdio *rtwsdio = (struct rtw_sdio *)rtwdev->priv; 316 bool direct, bus_claim; 317 u32 val; 318 int ret; 319 320 direct = rtw_sdio_use_direct_io(rtwdev, addr); 321 addr = rtw_sdio_to_io_address(rtwdev, addr, direct); 322 bus_claim = rtw_sdio_bus_claim_needed(rtwsdio); 323 324 if (bus_claim) 325 sdio_claim_host(rtwsdio->sdio_func); 326 327 if (direct) 328 val = rtw_sdio_readl(rtwdev, addr, &ret); 329 else 330 val = rtw_sdio_indirect_read32(rtwdev, addr, &ret); 331 332 if (bus_claim) 333 sdio_release_host(rtwsdio->sdio_func); 334 335 if (ret) 336 rtw_warn(rtwdev, "sdio read32 failed (0x%x): %d", addr, ret); 337 338 return val; 339 } 340 341 static void rtw_sdio_indirect_write8(struct rtw_dev *rtwdev, u8 val, u32 addr, 342 int *err_ret) 343 { 344 struct rtw_sdio *rtwsdio = (struct rtw_sdio *)rtwdev->priv; 345 u32 reg_data; 346 347 reg_data = rtw_sdio_to_bus_offset(rtwdev, REG_SDIO_INDIRECT_REG_DATA); 348 sdio_writeb(rtwsdio->sdio_func, val, reg_data, err_ret); 349 if (*err_ret) 350 return; 351 352 *err_ret = rtw_sdio_indirect_reg_cfg(rtwdev, addr, 353 BIT_SDIO_INDIRECT_REG_CFG_WRITE); 354 } 355 356 static void rtw_sdio_indirect_write16(struct rtw_dev *rtwdev, u16 val, u32 addr, 357 int *err_ret) 358 { 359 u32 reg_data; 360 361 if (!IS_ALIGNED(addr, 2)) { 362 addr = rtw_sdio_to_io_address(rtwdev, addr, true); 363 rtw_sdio_writew(rtwdev, val, addr, err_ret); 364 return; 365 } 366 367 reg_data = rtw_sdio_to_bus_offset(rtwdev, REG_SDIO_INDIRECT_REG_DATA); 368 rtw_sdio_writew(rtwdev, val, reg_data, err_ret); 369 if (*err_ret) 370 return; 371 372 *err_ret = rtw_sdio_indirect_reg_cfg(rtwdev, addr, 373 BIT_SDIO_INDIRECT_REG_CFG_WRITE | 374 BIT_SDIO_INDIRECT_REG_CFG_WORD); 375 } 376 377 static void rtw_sdio_indirect_write32(struct rtw_dev *rtwdev, u32 val, 378 u32 addr, int *err_ret) 379 { 380 u32 reg_data; 381 382 if (!IS_ALIGNED(addr, 4)) { 383 addr = rtw_sdio_to_io_address(rtwdev, addr, true); 384 rtw_sdio_writel(rtwdev, val, addr, err_ret); 385 return; 386 } 387 388 reg_data = rtw_sdio_to_bus_offset(rtwdev, REG_SDIO_INDIRECT_REG_DATA); 389 rtw_sdio_writel(rtwdev, val, reg_data, err_ret); 390 391 *err_ret = rtw_sdio_indirect_reg_cfg(rtwdev, addr, 392 BIT_SDIO_INDIRECT_REG_CFG_WRITE | 393 BIT_SDIO_INDIRECT_REG_CFG_DWORD); 394 } 395 396 static void rtw_sdio_write8(struct rtw_dev *rtwdev, u32 addr, u8 val) 397 { 398 struct rtw_sdio *rtwsdio = (struct rtw_sdio *)rtwdev->priv; 399 bool direct, bus_claim; 400 int ret; 401 402 direct = rtw_sdio_use_direct_io(rtwdev, addr); 403 addr = rtw_sdio_to_io_address(rtwdev, addr, direct); 404 bus_claim = rtw_sdio_bus_claim_needed(rtwsdio); 405 406 if (bus_claim) 407 sdio_claim_host(rtwsdio->sdio_func); 408 409 if (direct) 410 sdio_writeb(rtwsdio->sdio_func, val, addr, &ret); 411 else 412 rtw_sdio_indirect_write8(rtwdev, val, addr, &ret); 413 414 if (bus_claim) 415 sdio_release_host(rtwsdio->sdio_func); 416 417 if (ret) 418 rtw_warn(rtwdev, "sdio write8 failed (0x%x): %d", addr, ret); 419 } 420 421 static void rtw_sdio_write16(struct rtw_dev *rtwdev, u32 addr, u16 val) 422 { 423 struct rtw_sdio *rtwsdio = (struct rtw_sdio *)rtwdev->priv; 424 bool direct, bus_claim; 425 int ret; 426 427 direct = rtw_sdio_use_direct_io(rtwdev, addr); 428 addr = rtw_sdio_to_io_address(rtwdev, addr, direct); 429 bus_claim = rtw_sdio_bus_claim_needed(rtwsdio); 430 431 if (bus_claim) 432 sdio_claim_host(rtwsdio->sdio_func); 433 434 if (direct) 435 rtw_sdio_writew(rtwdev, val, addr, &ret); 436 else 437 rtw_sdio_indirect_write16(rtwdev, val, addr, &ret); 438 439 if (bus_claim) 440 sdio_release_host(rtwsdio->sdio_func); 441 442 if (ret) 443 rtw_warn(rtwdev, "sdio write16 failed (0x%x): %d", addr, ret); 444 } 445 446 static void rtw_sdio_write32(struct rtw_dev *rtwdev, u32 addr, u32 val) 447 { 448 struct rtw_sdio *rtwsdio = (struct rtw_sdio *)rtwdev->priv; 449 bool direct, bus_claim; 450 int ret; 451 452 direct = rtw_sdio_use_direct_io(rtwdev, addr); 453 addr = rtw_sdio_to_io_address(rtwdev, addr, direct); 454 bus_claim = rtw_sdio_bus_claim_needed(rtwsdio); 455 456 if (bus_claim) 457 sdio_claim_host(rtwsdio->sdio_func); 458 459 if (direct) 460 rtw_sdio_writel(rtwdev, val, addr, &ret); 461 else 462 rtw_sdio_indirect_write32(rtwdev, val, addr, &ret); 463 464 if (bus_claim) 465 sdio_release_host(rtwsdio->sdio_func); 466 467 if (ret) 468 rtw_warn(rtwdev, "sdio write32 failed (0x%x): %d", addr, ret); 469 } 470 471 static u32 rtw_sdio_get_tx_addr(struct rtw_dev *rtwdev, size_t size, 472 enum rtw_tx_queue_type queue) 473 { 474 u32 txaddr; 475 476 switch (queue) { 477 case RTW_TX_QUEUE_BCN: 478 case RTW_TX_QUEUE_H2C: 479 case RTW_TX_QUEUE_HI0: 480 txaddr = FIELD_PREP(REG_SDIO_CMD_ADDR_MSK, 481 REG_SDIO_CMD_ADDR_TXFF_HIGH); 482 break; 483 case RTW_TX_QUEUE_VI: 484 case RTW_TX_QUEUE_VO: 485 txaddr = FIELD_PREP(REG_SDIO_CMD_ADDR_MSK, 486 REG_SDIO_CMD_ADDR_TXFF_NORMAL); 487 break; 488 case RTW_TX_QUEUE_BE: 489 case RTW_TX_QUEUE_BK: 490 txaddr = FIELD_PREP(REG_SDIO_CMD_ADDR_MSK, 491 REG_SDIO_CMD_ADDR_TXFF_LOW); 492 break; 493 case RTW_TX_QUEUE_MGMT: 494 txaddr = FIELD_PREP(REG_SDIO_CMD_ADDR_MSK, 495 REG_SDIO_CMD_ADDR_TXFF_EXTRA); 496 break; 497 default: 498 rtw_warn(rtwdev, "Unsupported queue for TX addr: 0x%02x\n", 499 queue); 500 return 0; 501 } 502 503 txaddr += DIV_ROUND_UP(size, 4); 504 505 return txaddr; 506 }; 507 508 static int rtw_sdio_read_port(struct rtw_dev *rtwdev, u8 *buf, size_t count) 509 { 510 struct rtw_sdio *rtwsdio = (struct rtw_sdio *)rtwdev->priv; 511 bool bus_claim = rtw_sdio_bus_claim_needed(rtwsdio); 512 u32 rxaddr = rtwsdio->rx_addr++; 513 int ret; 514 515 if (bus_claim) 516 sdio_claim_host(rtwsdio->sdio_func); 517 518 ret = sdio_memcpy_fromio(rtwsdio->sdio_func, buf, 519 RTW_SDIO_ADDR_RX_RX0FF_GEN(rxaddr), count); 520 if (ret) 521 rtw_warn(rtwdev, 522 "Failed to read %zu byte(s) from SDIO port 0x%08x", 523 count, rxaddr); 524 525 if (bus_claim) 526 sdio_release_host(rtwsdio->sdio_func); 527 528 return ret; 529 } 530 531 static int rtw_sdio_check_free_txpg(struct rtw_dev *rtwdev, u8 queue, 532 size_t count) 533 { 534 unsigned int pages_free, pages_needed; 535 536 if (rtw_chip_wcpu_11n(rtwdev)) { 537 u32 free_txpg; 538 539 free_txpg = rtw_sdio_read32(rtwdev, REG_SDIO_FREE_TXPG); 540 541 switch (queue) { 542 case RTW_TX_QUEUE_BCN: 543 case RTW_TX_QUEUE_H2C: 544 case RTW_TX_QUEUE_HI0: 545 case RTW_TX_QUEUE_MGMT: 546 /* high */ 547 pages_free = free_txpg & 0xff; 548 break; 549 case RTW_TX_QUEUE_VI: 550 case RTW_TX_QUEUE_VO: 551 /* normal */ 552 pages_free = (free_txpg >> 8) & 0xff; 553 break; 554 case RTW_TX_QUEUE_BE: 555 case RTW_TX_QUEUE_BK: 556 /* low */ 557 pages_free = (free_txpg >> 16) & 0xff; 558 break; 559 default: 560 rtw_warn(rtwdev, "Unknown mapping for queue %u\n", queue); 561 return -EINVAL; 562 } 563 564 /* add the pages from the public queue */ 565 pages_free += (free_txpg >> 24) & 0xff; 566 } else { 567 u32 free_txpg[3]; 568 569 free_txpg[0] = rtw_sdio_read32(rtwdev, REG_SDIO_FREE_TXPG); 570 free_txpg[1] = rtw_sdio_read32(rtwdev, REG_SDIO_FREE_TXPG + 4); 571 free_txpg[2] = rtw_sdio_read32(rtwdev, REG_SDIO_FREE_TXPG + 8); 572 573 switch (queue) { 574 case RTW_TX_QUEUE_BCN: 575 case RTW_TX_QUEUE_H2C: 576 case RTW_TX_QUEUE_HI0: 577 /* high */ 578 pages_free = free_txpg[0] & 0xfff; 579 break; 580 case RTW_TX_QUEUE_VI: 581 case RTW_TX_QUEUE_VO: 582 /* normal */ 583 pages_free = (free_txpg[0] >> 16) & 0xfff; 584 break; 585 case RTW_TX_QUEUE_BE: 586 case RTW_TX_QUEUE_BK: 587 /* low */ 588 pages_free = free_txpg[1] & 0xfff; 589 break; 590 case RTW_TX_QUEUE_MGMT: 591 /* extra */ 592 pages_free = free_txpg[2] & 0xfff; 593 break; 594 default: 595 rtw_warn(rtwdev, "Unknown mapping for queue %u\n", queue); 596 return -EINVAL; 597 } 598 599 /* add the pages from the public queue */ 600 pages_free += (free_txpg[1] >> 16) & 0xfff; 601 } 602 603 pages_needed = DIV_ROUND_UP(count, rtwdev->chip->page_size); 604 605 if (pages_needed > pages_free) { 606 rtw_dbg(rtwdev, RTW_DBG_SDIO, 607 "Not enough free pages (%u needed, %u free) in queue %u for %zu bytes\n", 608 pages_needed, pages_free, queue, count); 609 return -EBUSY; 610 } 611 612 return 0; 613 } 614 615 static int rtw_sdio_write_port(struct rtw_dev *rtwdev, struct sk_buff *skb, 616 enum rtw_tx_queue_type queue) 617 { 618 struct rtw_sdio *rtwsdio = (struct rtw_sdio *)rtwdev->priv; 619 bool bus_claim; 620 size_t txsize; 621 u32 txaddr; 622 int ret; 623 624 txaddr = rtw_sdio_get_tx_addr(rtwdev, skb->len, queue); 625 if (!txaddr) 626 return -EINVAL; 627 628 txsize = sdio_align_size(rtwsdio->sdio_func, skb->len); 629 630 ret = rtw_sdio_check_free_txpg(rtwdev, queue, txsize); 631 if (ret) 632 return ret; 633 634 if (!IS_ALIGNED((unsigned long)skb->data, RTW_SDIO_DATA_PTR_ALIGN)) 635 rtw_warn(rtwdev, "Got unaligned SKB in %s() for queue %u\n", 636 __func__, queue); 637 638 bus_claim = rtw_sdio_bus_claim_needed(rtwsdio); 639 640 if (bus_claim) 641 sdio_claim_host(rtwsdio->sdio_func); 642 643 ret = sdio_memcpy_toio(rtwsdio->sdio_func, txaddr, skb->data, txsize); 644 645 if (bus_claim) 646 sdio_release_host(rtwsdio->sdio_func); 647 648 if (ret) 649 rtw_warn(rtwdev, 650 "Failed to write %zu byte(s) to SDIO port 0x%08x", 651 txsize, txaddr); 652 653 return ret; 654 } 655 656 static void rtw_sdio_init(struct rtw_dev *rtwdev) 657 { 658 struct rtw_sdio *rtwsdio = (struct rtw_sdio *)rtwdev->priv; 659 660 rtwsdio->irq_mask = REG_SDIO_HIMR_RX_REQUEST | REG_SDIO_HIMR_CPWM1; 661 } 662 663 static void rtw_sdio_enable_rx_aggregation(struct rtw_dev *rtwdev) 664 { 665 u8 size, timeout; 666 667 if (rtw_chip_wcpu_11n(rtwdev)) { 668 size = 0x6; 669 timeout = 0x6; 670 } else { 671 size = 0xff; 672 timeout = 0x1; 673 } 674 675 /* Make the firmware honor the size limit configured below */ 676 rtw_write32_set(rtwdev, REG_RXDMA_AGG_PG_TH, BIT_EN_PRE_CALC); 677 678 rtw_write8_set(rtwdev, REG_TXDMA_PQ_MAP, BIT_RXDMA_AGG_EN); 679 680 rtw_write16(rtwdev, REG_RXDMA_AGG_PG_TH, 681 FIELD_PREP(BIT_RXDMA_AGG_PG_TH, size) | 682 FIELD_PREP(BIT_DMA_AGG_TO_V1, timeout)); 683 684 rtw_write8_set(rtwdev, REG_RXDMA_MODE, BIT_DMA_MODE); 685 } 686 687 static void rtw_sdio_enable_interrupt(struct rtw_dev *rtwdev) 688 { 689 struct rtw_sdio *rtwsdio = (struct rtw_sdio *)rtwdev->priv; 690 691 rtw_write32(rtwdev, REG_SDIO_HIMR, rtwsdio->irq_mask); 692 } 693 694 static void rtw_sdio_disable_interrupt(struct rtw_dev *rtwdev) 695 { 696 rtw_write32(rtwdev, REG_SDIO_HIMR, 0x0); 697 } 698 699 static u8 rtw_sdio_get_tx_qsel(struct rtw_dev *rtwdev, struct sk_buff *skb, 700 u8 queue) 701 { 702 switch (queue) { 703 case RTW_TX_QUEUE_BCN: 704 return TX_DESC_QSEL_BEACON; 705 case RTW_TX_QUEUE_H2C: 706 return TX_DESC_QSEL_H2C; 707 case RTW_TX_QUEUE_MGMT: 708 if (rtw_chip_wcpu_11n(rtwdev)) 709 return TX_DESC_QSEL_HIGH; 710 else 711 return TX_DESC_QSEL_MGMT; 712 case RTW_TX_QUEUE_HI0: 713 return TX_DESC_QSEL_HIGH; 714 default: 715 return skb->priority; 716 } 717 } 718 719 static int rtw_sdio_setup(struct rtw_dev *rtwdev) 720 { 721 /* nothing to do */ 722 return 0; 723 } 724 725 static int rtw_sdio_start(struct rtw_dev *rtwdev) 726 { 727 rtw_sdio_enable_rx_aggregation(rtwdev); 728 rtw_sdio_enable_interrupt(rtwdev); 729 730 return 0; 731 } 732 733 static void rtw_sdio_stop(struct rtw_dev *rtwdev) 734 { 735 rtw_sdio_disable_interrupt(rtwdev); 736 } 737 738 static void rtw_sdio_deep_ps_enter(struct rtw_dev *rtwdev) 739 { 740 struct rtw_sdio *rtwsdio = (struct rtw_sdio *)rtwdev->priv; 741 bool tx_empty = true; 742 u8 queue; 743 744 if (!rtw_fw_feature_check(&rtwdev->fw, FW_FEATURE_TX_WAKE)) { 745 /* Deep PS state is not allowed to TX-DMA */ 746 for (queue = 0; queue < RTK_MAX_TX_QUEUE_NUM; queue++) { 747 /* BCN queue is rsvd page, does not have DMA interrupt 748 * H2C queue is managed by firmware 749 */ 750 if (queue == RTW_TX_QUEUE_BCN || 751 queue == RTW_TX_QUEUE_H2C) 752 continue; 753 754 /* check if there is any skb DMAing */ 755 if (skb_queue_len(&rtwsdio->tx_queue[queue])) { 756 tx_empty = false; 757 break; 758 } 759 } 760 } 761 762 if (!tx_empty) { 763 rtw_dbg(rtwdev, RTW_DBG_PS, 764 "TX path not empty, cannot enter deep power save state\n"); 765 return; 766 } 767 768 set_bit(RTW_FLAG_LEISURE_PS_DEEP, rtwdev->flags); 769 rtw_power_mode_change(rtwdev, true); 770 } 771 772 static void rtw_sdio_deep_ps_leave(struct rtw_dev *rtwdev) 773 { 774 if (test_and_clear_bit(RTW_FLAG_LEISURE_PS_DEEP, rtwdev->flags)) 775 rtw_power_mode_change(rtwdev, false); 776 } 777 778 static void rtw_sdio_deep_ps(struct rtw_dev *rtwdev, bool enter) 779 { 780 if (enter && !test_bit(RTW_FLAG_LEISURE_PS_DEEP, rtwdev->flags)) 781 rtw_sdio_deep_ps_enter(rtwdev); 782 783 if (!enter && test_bit(RTW_FLAG_LEISURE_PS_DEEP, rtwdev->flags)) 784 rtw_sdio_deep_ps_leave(rtwdev); 785 } 786 787 static void rtw_sdio_tx_kick_off(struct rtw_dev *rtwdev) 788 { 789 struct rtw_sdio *rtwsdio = (struct rtw_sdio *)rtwdev->priv; 790 791 queue_work(rtwsdio->txwq, &rtwsdio->tx_handler_data->work); 792 } 793 794 static void rtw_sdio_link_ps(struct rtw_dev *rtwdev, bool enter) 795 { 796 /* nothing to do */ 797 } 798 799 static void rtw_sdio_interface_cfg(struct rtw_dev *rtwdev) 800 { 801 u32 val; 802 803 rtw_read32(rtwdev, REG_SDIO_FREE_TXPG); 804 805 val = rtw_read32(rtwdev, REG_SDIO_TX_CTRL); 806 val &= 0xfff8; 807 rtw_write32(rtwdev, REG_SDIO_TX_CTRL, val); 808 } 809 810 static struct rtw_sdio_tx_data *rtw_sdio_get_tx_data(struct sk_buff *skb) 811 { 812 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); 813 814 BUILD_BUG_ON(sizeof(struct rtw_sdio_tx_data) > 815 sizeof(info->status.status_driver_data)); 816 817 return (struct rtw_sdio_tx_data *)info->status.status_driver_data; 818 } 819 820 static void rtw_sdio_tx_skb_prepare(struct rtw_dev *rtwdev, 821 struct rtw_tx_pkt_info *pkt_info, 822 struct sk_buff *skb, 823 enum rtw_tx_queue_type queue) 824 { 825 const struct rtw_chip_info *chip = rtwdev->chip; 826 unsigned long data_addr, aligned_addr; 827 size_t offset; 828 u8 *pkt_desc; 829 830 pkt_desc = skb_push(skb, chip->tx_pkt_desc_sz); 831 832 data_addr = (unsigned long)pkt_desc; 833 aligned_addr = ALIGN(data_addr, RTW_SDIO_DATA_PTR_ALIGN); 834 835 if (data_addr != aligned_addr) { 836 /* Ensure that the start of the pkt_desc is always aligned at 837 * RTW_SDIO_DATA_PTR_ALIGN. 838 */ 839 offset = RTW_SDIO_DATA_PTR_ALIGN - (aligned_addr - data_addr); 840 841 pkt_desc = skb_push(skb, offset); 842 843 /* By inserting padding to align the start of the pkt_desc we 844 * need to inform the firmware that the actual data starts at 845 * a different offset than normal. 846 */ 847 pkt_info->offset += offset; 848 } 849 850 memset(pkt_desc, 0, chip->tx_pkt_desc_sz); 851 852 pkt_info->qsel = rtw_sdio_get_tx_qsel(rtwdev, skb, queue); 853 854 rtw_tx_fill_tx_desc(pkt_info, skb); 855 rtw_tx_fill_txdesc_checksum(rtwdev, pkt_info, pkt_desc); 856 } 857 858 static int rtw_sdio_write_data(struct rtw_dev *rtwdev, 859 struct rtw_tx_pkt_info *pkt_info, 860 struct sk_buff *skb, 861 enum rtw_tx_queue_type queue) 862 { 863 int ret; 864 865 rtw_sdio_tx_skb_prepare(rtwdev, pkt_info, skb, queue); 866 867 ret = rtw_sdio_write_port(rtwdev, skb, queue); 868 dev_kfree_skb_any(skb); 869 870 return ret; 871 } 872 873 static int rtw_sdio_write_data_rsvd_page(struct rtw_dev *rtwdev, u8 *buf, 874 u32 size) 875 { 876 struct rtw_tx_pkt_info pkt_info = {}; 877 struct sk_buff *skb; 878 879 skb = rtw_tx_write_data_rsvd_page_get(rtwdev, &pkt_info, buf, size); 880 if (!skb) 881 return -ENOMEM; 882 883 return rtw_sdio_write_data(rtwdev, &pkt_info, skb, RTW_TX_QUEUE_BCN); 884 } 885 886 static int rtw_sdio_write_data_h2c(struct rtw_dev *rtwdev, u8 *buf, u32 size) 887 { 888 struct rtw_tx_pkt_info pkt_info = {}; 889 struct sk_buff *skb; 890 891 skb = rtw_tx_write_data_h2c_get(rtwdev, &pkt_info, buf, size); 892 if (!skb) 893 return -ENOMEM; 894 895 return rtw_sdio_write_data(rtwdev, &pkt_info, skb, RTW_TX_QUEUE_H2C); 896 } 897 898 static int rtw_sdio_tx_write(struct rtw_dev *rtwdev, 899 struct rtw_tx_pkt_info *pkt_info, 900 struct sk_buff *skb) 901 { 902 struct rtw_sdio *rtwsdio = (struct rtw_sdio *)rtwdev->priv; 903 enum rtw_tx_queue_type queue = rtw_tx_queue_mapping(skb); 904 struct rtw_sdio_tx_data *tx_data; 905 906 rtw_sdio_tx_skb_prepare(rtwdev, pkt_info, skb, queue); 907 908 tx_data = rtw_sdio_get_tx_data(skb); 909 tx_data->sn = pkt_info->sn; 910 911 skb_queue_tail(&rtwsdio->tx_queue[queue], skb); 912 913 return 0; 914 } 915 916 static void rtw_sdio_tx_err_isr(struct rtw_dev *rtwdev) 917 { 918 u32 val = rtw_read32(rtwdev, REG_TXDMA_STATUS); 919 920 rtw_write32(rtwdev, REG_TXDMA_STATUS, val); 921 } 922 923 static void rtw_sdio_rx_skb(struct rtw_dev *rtwdev, struct sk_buff *skb, 924 u32 pkt_offset, struct rtw_rx_pkt_stat *pkt_stat, 925 struct ieee80211_rx_status *rx_status) 926 { 927 *IEEE80211_SKB_RXCB(skb) = *rx_status; 928 929 if (pkt_stat->is_c2h) { 930 skb_put(skb, pkt_stat->pkt_len + pkt_offset); 931 rtw_fw_c2h_cmd_rx_irqsafe(rtwdev, pkt_offset, skb); 932 return; 933 } 934 935 skb_put(skb, pkt_stat->pkt_len); 936 skb_reserve(skb, pkt_offset); 937 938 rtw_rx_stats(rtwdev, pkt_stat->vif, skb); 939 940 ieee80211_rx_irqsafe(rtwdev->hw, skb); 941 } 942 943 static void rtw_sdio_rxfifo_recv(struct rtw_dev *rtwdev, u32 rx_len) 944 { 945 struct rtw_sdio *rtwsdio = (struct rtw_sdio *)rtwdev->priv; 946 const struct rtw_chip_info *chip = rtwdev->chip; 947 u32 pkt_desc_sz = chip->rx_pkt_desc_sz; 948 struct ieee80211_rx_status rx_status; 949 struct rtw_rx_pkt_stat pkt_stat; 950 struct sk_buff *skb, *split_skb; 951 u32 pkt_offset, curr_pkt_len; 952 size_t bufsz; 953 u8 *rx_desc; 954 int ret; 955 956 bufsz = sdio_align_size(rtwsdio->sdio_func, rx_len); 957 958 skb = dev_alloc_skb(bufsz); 959 if (!skb) 960 return; 961 962 ret = rtw_sdio_read_port(rtwdev, skb->data, bufsz); 963 if (ret) { 964 dev_kfree_skb_any(skb); 965 return; 966 } 967 968 while (true) { 969 rx_desc = skb->data; 970 chip->ops->query_rx_desc(rtwdev, rx_desc, &pkt_stat, 971 &rx_status); 972 pkt_offset = pkt_desc_sz + pkt_stat.drv_info_sz + 973 pkt_stat.shift; 974 975 curr_pkt_len = ALIGN(pkt_offset + pkt_stat.pkt_len, 976 RTW_SDIO_DATA_PTR_ALIGN); 977 978 if ((curr_pkt_len + pkt_desc_sz) >= rx_len) { 979 /* Use the original skb (with it's adjusted offset) 980 * when processing the last (or even the only) entry to 981 * have it's memory freed automatically. 982 */ 983 rtw_sdio_rx_skb(rtwdev, skb, pkt_offset, &pkt_stat, 984 &rx_status); 985 break; 986 } 987 988 split_skb = dev_alloc_skb(curr_pkt_len); 989 if (!split_skb) { 990 rtw_sdio_rx_skb(rtwdev, skb, pkt_offset, &pkt_stat, 991 &rx_status); 992 break; 993 } 994 995 skb_copy_header(split_skb, skb); 996 memcpy(split_skb->data, skb->data, curr_pkt_len); 997 998 rtw_sdio_rx_skb(rtwdev, split_skb, pkt_offset, &pkt_stat, 999 &rx_status); 1000 1001 /* Move to the start of the next RX descriptor */ 1002 skb_reserve(skb, curr_pkt_len); 1003 rx_len -= curr_pkt_len; 1004 } 1005 } 1006 1007 static void rtw_sdio_rx_isr(struct rtw_dev *rtwdev) 1008 { 1009 u32 rx_len, total_rx_bytes = 0; 1010 1011 while (total_rx_bytes < SZ_64K) { 1012 if (rtw_chip_wcpu_11n(rtwdev)) 1013 rx_len = rtw_read16(rtwdev, REG_SDIO_RX0_REQ_LEN); 1014 else 1015 rx_len = rtw_read32(rtwdev, REG_SDIO_RX0_REQ_LEN); 1016 1017 if (!rx_len) 1018 break; 1019 1020 rtw_sdio_rxfifo_recv(rtwdev, rx_len); 1021 1022 total_rx_bytes += rx_len; 1023 } 1024 } 1025 1026 static void rtw_sdio_handle_interrupt(struct sdio_func *sdio_func) 1027 { 1028 struct ieee80211_hw *hw = sdio_get_drvdata(sdio_func); 1029 struct rtw_sdio *rtwsdio; 1030 struct rtw_dev *rtwdev; 1031 u32 hisr; 1032 1033 rtwdev = hw->priv; 1034 rtwsdio = (struct rtw_sdio *)rtwdev->priv; 1035 1036 rtwsdio->irq_thread = current; 1037 1038 hisr = rtw_read32(rtwdev, REG_SDIO_HISR); 1039 1040 if (hisr & REG_SDIO_HISR_TXERR) 1041 rtw_sdio_tx_err_isr(rtwdev); 1042 if (hisr & REG_SDIO_HISR_RX_REQUEST) { 1043 hisr &= ~REG_SDIO_HISR_RX_REQUEST; 1044 rtw_sdio_rx_isr(rtwdev); 1045 } 1046 1047 rtw_write32(rtwdev, REG_SDIO_HISR, hisr); 1048 1049 rtwsdio->irq_thread = NULL; 1050 } 1051 1052 static int __maybe_unused rtw_sdio_suspend(struct device *dev) 1053 { 1054 struct sdio_func *func = dev_to_sdio_func(dev); 1055 struct ieee80211_hw *hw = dev_get_drvdata(dev); 1056 struct rtw_dev *rtwdev = hw->priv; 1057 int ret; 1058 1059 ret = sdio_set_host_pm_flags(func, MMC_PM_KEEP_POWER); 1060 if (ret) 1061 rtw_err(rtwdev, "Failed to host PM flag MMC_PM_KEEP_POWER"); 1062 1063 return ret; 1064 } 1065 1066 static int __maybe_unused rtw_sdio_resume(struct device *dev) 1067 { 1068 return 0; 1069 } 1070 1071 SIMPLE_DEV_PM_OPS(rtw_sdio_pm_ops, rtw_sdio_suspend, rtw_sdio_resume); 1072 EXPORT_SYMBOL(rtw_sdio_pm_ops); 1073 1074 static int rtw_sdio_claim(struct rtw_dev *rtwdev, struct sdio_func *sdio_func) 1075 { 1076 struct rtw_sdio *rtwsdio = (struct rtw_sdio *)rtwdev->priv; 1077 int ret; 1078 1079 sdio_claim_host(sdio_func); 1080 1081 ret = sdio_enable_func(sdio_func); 1082 if (ret) { 1083 rtw_err(rtwdev, "Failed to enable SDIO func"); 1084 goto err_release_host; 1085 } 1086 1087 ret = sdio_set_block_size(sdio_func, RTW_SDIO_BLOCK_SIZE); 1088 if (ret) { 1089 rtw_err(rtwdev, "Failed to set SDIO block size to 512"); 1090 goto err_disable_func; 1091 } 1092 1093 rtwsdio->sdio_func = sdio_func; 1094 1095 rtwsdio->sdio3_bus_mode = mmc_card_uhs(sdio_func->card); 1096 1097 sdio_set_drvdata(sdio_func, rtwdev->hw); 1098 SET_IEEE80211_DEV(rtwdev->hw, &sdio_func->dev); 1099 1100 sdio_release_host(sdio_func); 1101 1102 return 0; 1103 1104 err_disable_func: 1105 sdio_disable_func(sdio_func); 1106 err_release_host: 1107 sdio_release_host(sdio_func); 1108 return ret; 1109 } 1110 1111 static void rtw_sdio_declaim(struct rtw_dev *rtwdev, 1112 struct sdio_func *sdio_func) 1113 { 1114 sdio_claim_host(sdio_func); 1115 sdio_disable_func(sdio_func); 1116 sdio_release_host(sdio_func); 1117 } 1118 1119 static struct rtw_hci_ops rtw_sdio_ops = { 1120 .tx_write = rtw_sdio_tx_write, 1121 .tx_kick_off = rtw_sdio_tx_kick_off, 1122 .setup = rtw_sdio_setup, 1123 .start = rtw_sdio_start, 1124 .stop = rtw_sdio_stop, 1125 .deep_ps = rtw_sdio_deep_ps, 1126 .link_ps = rtw_sdio_link_ps, 1127 .interface_cfg = rtw_sdio_interface_cfg, 1128 1129 .read8 = rtw_sdio_read8, 1130 .read16 = rtw_sdio_read16, 1131 .read32 = rtw_sdio_read32, 1132 .write8 = rtw_sdio_write8, 1133 .write16 = rtw_sdio_write16, 1134 .write32 = rtw_sdio_write32, 1135 .write_data_rsvd_page = rtw_sdio_write_data_rsvd_page, 1136 .write_data_h2c = rtw_sdio_write_data_h2c, 1137 }; 1138 1139 static int rtw_sdio_request_irq(struct rtw_dev *rtwdev, 1140 struct sdio_func *sdio_func) 1141 { 1142 int ret; 1143 1144 sdio_claim_host(sdio_func); 1145 ret = sdio_claim_irq(sdio_func, &rtw_sdio_handle_interrupt); 1146 sdio_release_host(sdio_func); 1147 1148 if (ret) { 1149 rtw_err(rtwdev, "failed to claim SDIO IRQ"); 1150 return ret; 1151 } 1152 1153 return 0; 1154 } 1155 1156 static void rtw_sdio_indicate_tx_status(struct rtw_dev *rtwdev, 1157 struct sk_buff *skb) 1158 { 1159 struct rtw_sdio_tx_data *tx_data = rtw_sdio_get_tx_data(skb); 1160 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); 1161 struct ieee80211_hw *hw = rtwdev->hw; 1162 1163 /* enqueue to wait for tx report */ 1164 if (info->flags & IEEE80211_TX_CTL_REQ_TX_STATUS) { 1165 rtw_tx_report_enqueue(rtwdev, skb, tx_data->sn); 1166 return; 1167 } 1168 1169 /* always ACK for others, then they won't be marked as drop */ 1170 ieee80211_tx_info_clear_status(info); 1171 if (info->flags & IEEE80211_TX_CTL_NO_ACK) 1172 info->flags |= IEEE80211_TX_STAT_NOACK_TRANSMITTED; 1173 else 1174 info->flags |= IEEE80211_TX_STAT_ACK; 1175 1176 ieee80211_tx_status_irqsafe(hw, skb); 1177 } 1178 1179 static void rtw_sdio_process_tx_queue(struct rtw_dev *rtwdev, 1180 enum rtw_tx_queue_type queue) 1181 { 1182 struct rtw_sdio *rtwsdio = (struct rtw_sdio *)rtwdev->priv; 1183 struct sk_buff *skb; 1184 int ret; 1185 1186 skb = skb_dequeue(&rtwsdio->tx_queue[queue]); 1187 if (!skb) 1188 return; 1189 1190 ret = rtw_sdio_write_port(rtwdev, skb, queue); 1191 if (ret) { 1192 skb_queue_head(&rtwsdio->tx_queue[queue], skb); 1193 return; 1194 } 1195 1196 if (queue <= RTW_TX_QUEUE_VO) 1197 rtw_sdio_indicate_tx_status(rtwdev, skb); 1198 else 1199 dev_kfree_skb_any(skb); 1200 } 1201 1202 static void rtw_sdio_tx_handler(struct work_struct *work) 1203 { 1204 struct rtw_sdio_work_data *work_data = 1205 container_of(work, struct rtw_sdio_work_data, work); 1206 struct rtw_sdio *rtwsdio; 1207 struct rtw_dev *rtwdev; 1208 int limit, queue; 1209 1210 rtwdev = work_data->rtwdev; 1211 rtwsdio = (struct rtw_sdio *)rtwdev->priv; 1212 1213 if (!rtw_fw_feature_check(&rtwdev->fw, FW_FEATURE_TX_WAKE)) 1214 rtw_sdio_deep_ps_leave(rtwdev); 1215 1216 for (queue = RTK_MAX_TX_QUEUE_NUM - 1; queue >= 0; queue--) { 1217 for (limit = 0; limit < 1000; limit++) { 1218 rtw_sdio_process_tx_queue(rtwdev, queue); 1219 1220 if (skb_queue_empty(&rtwsdio->tx_queue[queue])) 1221 break; 1222 } 1223 } 1224 } 1225 1226 static void rtw_sdio_free_irq(struct rtw_dev *rtwdev, 1227 struct sdio_func *sdio_func) 1228 { 1229 sdio_claim_host(sdio_func); 1230 sdio_release_irq(sdio_func); 1231 sdio_release_host(sdio_func); 1232 } 1233 1234 static int rtw_sdio_init_tx(struct rtw_dev *rtwdev) 1235 { 1236 struct rtw_sdio *rtwsdio = (struct rtw_sdio *)rtwdev->priv; 1237 int i; 1238 1239 rtwsdio->txwq = create_singlethread_workqueue("rtw88_sdio: tx wq"); 1240 if (!rtwsdio->txwq) { 1241 rtw_err(rtwdev, "failed to create TX work queue\n"); 1242 return -ENOMEM; 1243 } 1244 1245 for (i = 0; i < RTK_MAX_TX_QUEUE_NUM; i++) 1246 skb_queue_head_init(&rtwsdio->tx_queue[i]); 1247 rtwsdio->tx_handler_data = kmalloc(sizeof(*rtwsdio->tx_handler_data), 1248 GFP_KERNEL); 1249 if (!rtwsdio->tx_handler_data) 1250 goto err_destroy_wq; 1251 1252 rtwsdio->tx_handler_data->rtwdev = rtwdev; 1253 INIT_WORK(&rtwsdio->tx_handler_data->work, rtw_sdio_tx_handler); 1254 1255 return 0; 1256 1257 err_destroy_wq: 1258 destroy_workqueue(rtwsdio->txwq); 1259 return -ENOMEM; 1260 } 1261 1262 static void rtw_sdio_deinit_tx(struct rtw_dev *rtwdev) 1263 { 1264 struct rtw_sdio *rtwsdio = (struct rtw_sdio *)rtwdev->priv; 1265 int i; 1266 1267 for (i = 0; i < RTK_MAX_TX_QUEUE_NUM; i++) 1268 skb_queue_purge(&rtwsdio->tx_queue[i]); 1269 1270 flush_workqueue(rtwsdio->txwq); 1271 destroy_workqueue(rtwsdio->txwq); 1272 kfree(rtwsdio->tx_handler_data); 1273 } 1274 1275 int rtw_sdio_probe(struct sdio_func *sdio_func, 1276 const struct sdio_device_id *id) 1277 { 1278 struct ieee80211_hw *hw; 1279 struct rtw_dev *rtwdev; 1280 int drv_data_size; 1281 int ret; 1282 1283 drv_data_size = sizeof(struct rtw_dev) + sizeof(struct rtw_sdio); 1284 hw = ieee80211_alloc_hw(drv_data_size, &rtw_ops); 1285 if (!hw) { 1286 dev_err(&sdio_func->dev, "failed to allocate hw"); 1287 return -ENOMEM; 1288 } 1289 1290 rtwdev = hw->priv; 1291 rtwdev->hw = hw; 1292 rtwdev->dev = &sdio_func->dev; 1293 rtwdev->chip = (struct rtw_chip_info *)id->driver_data; 1294 rtwdev->hci.ops = &rtw_sdio_ops; 1295 rtwdev->hci.type = RTW_HCI_TYPE_SDIO; 1296 1297 ret = rtw_core_init(rtwdev); 1298 if (ret) 1299 goto err_release_hw; 1300 1301 rtw_dbg(rtwdev, RTW_DBG_SDIO, 1302 "rtw88 SDIO probe: vendor=0x%04x device=%04x class=%02x", 1303 id->vendor, id->device, id->class); 1304 1305 ret = rtw_sdio_claim(rtwdev, sdio_func); 1306 if (ret) { 1307 rtw_err(rtwdev, "failed to claim SDIO device"); 1308 goto err_deinit_core; 1309 } 1310 1311 rtw_sdio_init(rtwdev); 1312 1313 ret = rtw_sdio_init_tx(rtwdev); 1314 if (ret) { 1315 rtw_err(rtwdev, "failed to init SDIO TX queue\n"); 1316 goto err_sdio_declaim; 1317 } 1318 1319 ret = rtw_chip_info_setup(rtwdev); 1320 if (ret) { 1321 rtw_err(rtwdev, "failed to setup chip information"); 1322 goto err_destroy_txwq; 1323 } 1324 1325 ret = rtw_sdio_request_irq(rtwdev, sdio_func); 1326 if (ret) 1327 goto err_destroy_txwq; 1328 1329 ret = rtw_register_hw(rtwdev, hw); 1330 if (ret) { 1331 rtw_err(rtwdev, "failed to register hw"); 1332 goto err_free_irq; 1333 } 1334 1335 return 0; 1336 1337 err_free_irq: 1338 rtw_sdio_free_irq(rtwdev, sdio_func); 1339 err_destroy_txwq: 1340 rtw_sdio_deinit_tx(rtwdev); 1341 err_sdio_declaim: 1342 rtw_sdio_declaim(rtwdev, sdio_func); 1343 err_deinit_core: 1344 rtw_core_deinit(rtwdev); 1345 err_release_hw: 1346 ieee80211_free_hw(hw); 1347 1348 return ret; 1349 } 1350 EXPORT_SYMBOL(rtw_sdio_probe); 1351 1352 void rtw_sdio_remove(struct sdio_func *sdio_func) 1353 { 1354 struct ieee80211_hw *hw = sdio_get_drvdata(sdio_func); 1355 struct rtw_dev *rtwdev; 1356 1357 if (!hw) 1358 return; 1359 1360 rtwdev = hw->priv; 1361 1362 rtw_unregister_hw(rtwdev, hw); 1363 rtw_sdio_disable_interrupt(rtwdev); 1364 rtw_sdio_free_irq(rtwdev, sdio_func); 1365 rtw_sdio_declaim(rtwdev, sdio_func); 1366 rtw_sdio_deinit_tx(rtwdev); 1367 rtw_core_deinit(rtwdev); 1368 ieee80211_free_hw(hw); 1369 } 1370 EXPORT_SYMBOL(rtw_sdio_remove); 1371 1372 void rtw_sdio_shutdown(struct device *dev) 1373 { 1374 struct sdio_func *sdio_func = dev_to_sdio_func(dev); 1375 const struct rtw_chip_info *chip; 1376 struct ieee80211_hw *hw; 1377 struct rtw_dev *rtwdev; 1378 1379 hw = sdio_get_drvdata(sdio_func); 1380 if (!hw) 1381 return; 1382 1383 rtwdev = hw->priv; 1384 chip = rtwdev->chip; 1385 1386 if (chip->ops->shutdown) 1387 chip->ops->shutdown(rtwdev); 1388 } 1389 EXPORT_SYMBOL(rtw_sdio_shutdown); 1390 1391 MODULE_AUTHOR("Martin Blumenstingl"); 1392 MODULE_AUTHOR("Jernej Skrabec"); 1393 MODULE_DESCRIPTION("Realtek 802.11ac wireless SDIO driver"); 1394 MODULE_LICENSE("Dual BSD/GPL"); 1395