1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
2 /* Copyright(c) 2018-2019  Realtek Corporation
3  */
4 
5 #include <linux/devcoredump.h>
6 
7 #include "main.h"
8 #include "regd.h"
9 #include "fw.h"
10 #include "ps.h"
11 #include "sec.h"
12 #include "mac.h"
13 #include "coex.h"
14 #include "phy.h"
15 #include "reg.h"
16 #include "efuse.h"
17 #include "tx.h"
18 #include "debug.h"
19 #include "bf.h"
20 #include "sar.h"
21 #include "sdio.h"
22 
23 bool rtw_disable_lps_deep_mode;
24 EXPORT_SYMBOL(rtw_disable_lps_deep_mode);
25 bool rtw_bf_support = true;
26 unsigned int rtw_debug_mask;
27 EXPORT_SYMBOL(rtw_debug_mask);
28 /* EDCCA is enabled during normal behavior. For debugging purpose in
29  * a noisy environment, it can be disabled via edcca debugfs. Because
30  * all rtw88 devices will probably be affected if environment is noisy,
31  * rtw_edcca_enabled is just declared by driver instead of by device.
32  * So, turning it off will take effect for all rtw88 devices before
33  * there is a tough reason to maintain rtw_edcca_enabled by device.
34  */
35 bool rtw_edcca_enabled = true;
36 
37 module_param_named(disable_lps_deep, rtw_disable_lps_deep_mode, bool, 0644);
38 module_param_named(support_bf, rtw_bf_support, bool, 0644);
39 module_param_named(debug_mask, rtw_debug_mask, uint, 0644);
40 
41 MODULE_PARM_DESC(disable_lps_deep, "Set Y to disable Deep PS");
42 MODULE_PARM_DESC(support_bf, "Set Y to enable beamformee support");
43 MODULE_PARM_DESC(debug_mask, "Debugging mask");
44 
45 static struct ieee80211_channel rtw_channeltable_2g[] = {
46 	{.center_freq = 2412, .hw_value = 1,},
47 	{.center_freq = 2417, .hw_value = 2,},
48 	{.center_freq = 2422, .hw_value = 3,},
49 	{.center_freq = 2427, .hw_value = 4,},
50 	{.center_freq = 2432, .hw_value = 5,},
51 	{.center_freq = 2437, .hw_value = 6,},
52 	{.center_freq = 2442, .hw_value = 7,},
53 	{.center_freq = 2447, .hw_value = 8,},
54 	{.center_freq = 2452, .hw_value = 9,},
55 	{.center_freq = 2457, .hw_value = 10,},
56 	{.center_freq = 2462, .hw_value = 11,},
57 	{.center_freq = 2467, .hw_value = 12,},
58 	{.center_freq = 2472, .hw_value = 13,},
59 	{.center_freq = 2484, .hw_value = 14,},
60 };
61 
62 static struct ieee80211_channel rtw_channeltable_5g[] = {
63 	{.center_freq = 5180, .hw_value = 36,},
64 	{.center_freq = 5200, .hw_value = 40,},
65 	{.center_freq = 5220, .hw_value = 44,},
66 	{.center_freq = 5240, .hw_value = 48,},
67 	{.center_freq = 5260, .hw_value = 52,},
68 	{.center_freq = 5280, .hw_value = 56,},
69 	{.center_freq = 5300, .hw_value = 60,},
70 	{.center_freq = 5320, .hw_value = 64,},
71 	{.center_freq = 5500, .hw_value = 100,},
72 	{.center_freq = 5520, .hw_value = 104,},
73 	{.center_freq = 5540, .hw_value = 108,},
74 	{.center_freq = 5560, .hw_value = 112,},
75 	{.center_freq = 5580, .hw_value = 116,},
76 	{.center_freq = 5600, .hw_value = 120,},
77 	{.center_freq = 5620, .hw_value = 124,},
78 	{.center_freq = 5640, .hw_value = 128,},
79 	{.center_freq = 5660, .hw_value = 132,},
80 	{.center_freq = 5680, .hw_value = 136,},
81 	{.center_freq = 5700, .hw_value = 140,},
82 	{.center_freq = 5720, .hw_value = 144,},
83 	{.center_freq = 5745, .hw_value = 149,},
84 	{.center_freq = 5765, .hw_value = 153,},
85 	{.center_freq = 5785, .hw_value = 157,},
86 	{.center_freq = 5805, .hw_value = 161,},
87 	{.center_freq = 5825, .hw_value = 165,
88 	 .flags = IEEE80211_CHAN_NO_HT40MINUS},
89 };
90 
91 static struct ieee80211_rate rtw_ratetable[] = {
92 	{.bitrate = 10, .hw_value = 0x00,},
93 	{.bitrate = 20, .hw_value = 0x01,},
94 	{.bitrate = 55, .hw_value = 0x02,},
95 	{.bitrate = 110, .hw_value = 0x03,},
96 	{.bitrate = 60, .hw_value = 0x04,},
97 	{.bitrate = 90, .hw_value = 0x05,},
98 	{.bitrate = 120, .hw_value = 0x06,},
99 	{.bitrate = 180, .hw_value = 0x07,},
100 	{.bitrate = 240, .hw_value = 0x08,},
101 	{.bitrate = 360, .hw_value = 0x09,},
102 	{.bitrate = 480, .hw_value = 0x0a,},
103 	{.bitrate = 540, .hw_value = 0x0b,},
104 };
105 
106 static const struct ieee80211_iface_limit rtw_iface_limits[] = {
107 	{
108 		.max = 1,
109 		.types = BIT(NL80211_IFTYPE_STATION),
110 	},
111 	{
112 		.max = 1,
113 		.types = BIT(NL80211_IFTYPE_AP),
114 	}
115 };
116 
117 static const struct ieee80211_iface_combination rtw_iface_combs[] = {
118 	{
119 		.limits = rtw_iface_limits,
120 		.n_limits = ARRAY_SIZE(rtw_iface_limits),
121 		.max_interfaces = 2,
122 		.num_different_channels = 1,
123 	}
124 };
125 
126 u16 rtw_desc_to_bitrate(u8 desc_rate)
127 {
128 	struct ieee80211_rate rate;
129 
130 	if (WARN(desc_rate >= ARRAY_SIZE(rtw_ratetable), "invalid desc rate\n"))
131 		return 0;
132 
133 	rate = rtw_ratetable[desc_rate];
134 
135 	return rate.bitrate;
136 }
137 
138 static struct ieee80211_supported_band rtw_band_2ghz = {
139 	.band = NL80211_BAND_2GHZ,
140 
141 	.channels = rtw_channeltable_2g,
142 	.n_channels = ARRAY_SIZE(rtw_channeltable_2g),
143 
144 	.bitrates = rtw_ratetable,
145 	.n_bitrates = ARRAY_SIZE(rtw_ratetable),
146 
147 	.ht_cap = {0},
148 	.vht_cap = {0},
149 };
150 
151 static struct ieee80211_supported_band rtw_band_5ghz = {
152 	.band = NL80211_BAND_5GHZ,
153 
154 	.channels = rtw_channeltable_5g,
155 	.n_channels = ARRAY_SIZE(rtw_channeltable_5g),
156 
157 	/* 5G has no CCK rates */
158 	.bitrates = rtw_ratetable + 4,
159 	.n_bitrates = ARRAY_SIZE(rtw_ratetable) - 4,
160 
161 	.ht_cap = {0},
162 	.vht_cap = {0},
163 };
164 
165 struct rtw_watch_dog_iter_data {
166 	struct rtw_dev *rtwdev;
167 	struct rtw_vif *rtwvif;
168 };
169 
170 static void rtw_dynamic_csi_rate(struct rtw_dev *rtwdev, struct rtw_vif *rtwvif)
171 {
172 	struct rtw_bf_info *bf_info = &rtwdev->bf_info;
173 	u8 fix_rate_enable = 0;
174 	u8 new_csi_rate_idx;
175 
176 	if (rtwvif->bfee.role != RTW_BFEE_SU &&
177 	    rtwvif->bfee.role != RTW_BFEE_MU)
178 		return;
179 
180 	rtw_chip_cfg_csi_rate(rtwdev, rtwdev->dm_info.min_rssi,
181 			      bf_info->cur_csi_rpt_rate,
182 			      fix_rate_enable, &new_csi_rate_idx);
183 
184 	if (new_csi_rate_idx != bf_info->cur_csi_rpt_rate)
185 		bf_info->cur_csi_rpt_rate = new_csi_rate_idx;
186 }
187 
188 static void rtw_vif_watch_dog_iter(void *data, u8 *mac,
189 				   struct ieee80211_vif *vif)
190 {
191 	struct rtw_watch_dog_iter_data *iter_data = data;
192 	struct rtw_vif *rtwvif = (struct rtw_vif *)vif->drv_priv;
193 
194 	if (vif->type == NL80211_IFTYPE_STATION)
195 		if (vif->cfg.assoc)
196 			iter_data->rtwvif = rtwvif;
197 
198 	rtw_dynamic_csi_rate(iter_data->rtwdev, rtwvif);
199 
200 	rtwvif->stats.tx_unicast = 0;
201 	rtwvif->stats.rx_unicast = 0;
202 	rtwvif->stats.tx_cnt = 0;
203 	rtwvif->stats.rx_cnt = 0;
204 }
205 
206 /* process TX/RX statistics periodically for hardware,
207  * the information helps hardware to enhance performance
208  */
209 static void rtw_watch_dog_work(struct work_struct *work)
210 {
211 	struct rtw_dev *rtwdev = container_of(work, struct rtw_dev,
212 					      watch_dog_work.work);
213 	struct rtw_traffic_stats *stats = &rtwdev->stats;
214 	struct rtw_watch_dog_iter_data data = {};
215 	bool busy_traffic = test_bit(RTW_FLAG_BUSY_TRAFFIC, rtwdev->flags);
216 	bool ps_active;
217 
218 	mutex_lock(&rtwdev->mutex);
219 
220 	if (!test_bit(RTW_FLAG_RUNNING, rtwdev->flags))
221 		goto unlock;
222 
223 	ieee80211_queue_delayed_work(rtwdev->hw, &rtwdev->watch_dog_work,
224 				     RTW_WATCH_DOG_DELAY_TIME);
225 
226 	if (rtwdev->stats.tx_cnt > 100 || rtwdev->stats.rx_cnt > 100)
227 		set_bit(RTW_FLAG_BUSY_TRAFFIC, rtwdev->flags);
228 	else
229 		clear_bit(RTW_FLAG_BUSY_TRAFFIC, rtwdev->flags);
230 
231 	rtw_coex_wl_status_check(rtwdev);
232 	rtw_coex_query_bt_hid_list(rtwdev);
233 
234 	if (busy_traffic != test_bit(RTW_FLAG_BUSY_TRAFFIC, rtwdev->flags))
235 		rtw_coex_wl_status_change_notify(rtwdev, 0);
236 
237 	if (stats->tx_cnt > RTW_LPS_THRESHOLD ||
238 	    stats->rx_cnt > RTW_LPS_THRESHOLD)
239 		ps_active = true;
240 	else
241 		ps_active = false;
242 
243 	ewma_tp_add(&stats->tx_ewma_tp,
244 		    (u32)(stats->tx_unicast >> RTW_TP_SHIFT));
245 	ewma_tp_add(&stats->rx_ewma_tp,
246 		    (u32)(stats->rx_unicast >> RTW_TP_SHIFT));
247 	stats->tx_throughput = ewma_tp_read(&stats->tx_ewma_tp);
248 	stats->rx_throughput = ewma_tp_read(&stats->rx_ewma_tp);
249 
250 	/* reset tx/rx statictics */
251 	stats->tx_unicast = 0;
252 	stats->rx_unicast = 0;
253 	stats->tx_cnt = 0;
254 	stats->rx_cnt = 0;
255 
256 	if (test_bit(RTW_FLAG_SCANNING, rtwdev->flags))
257 		goto unlock;
258 
259 	/* make sure BB/RF is working for dynamic mech */
260 	rtw_leave_lps(rtwdev);
261 
262 	rtw_phy_dynamic_mechanism(rtwdev);
263 
264 	data.rtwdev = rtwdev;
265 	/* rtw_iterate_vifs internally uses an atomic iterator which is needed
266 	 * to avoid taking local->iflist_mtx mutex
267 	 */
268 	rtw_iterate_vifs(rtwdev, rtw_vif_watch_dog_iter, &data);
269 
270 	/* fw supports only one station associated to enter lps, if there are
271 	 * more than two stations associated to the AP, then we can not enter
272 	 * lps, because fw does not handle the overlapped beacon interval
273 	 *
274 	 * mac80211 should iterate vifs and determine if driver can enter
275 	 * ps by passing IEEE80211_CONF_PS to us, all we need to do is to
276 	 * get that vif and check if device is having traffic more than the
277 	 * threshold.
278 	 */
279 	if (rtwdev->ps_enabled && data.rtwvif && !ps_active &&
280 	    !rtwdev->beacon_loss && !rtwdev->ap_active)
281 		rtw_enter_lps(rtwdev, data.rtwvif->port);
282 
283 	rtwdev->watch_dog_cnt++;
284 
285 unlock:
286 	mutex_unlock(&rtwdev->mutex);
287 }
288 
289 static void rtw_c2h_work(struct work_struct *work)
290 {
291 	struct rtw_dev *rtwdev = container_of(work, struct rtw_dev, c2h_work);
292 	struct sk_buff *skb, *tmp;
293 
294 	skb_queue_walk_safe(&rtwdev->c2h_queue, skb, tmp) {
295 		skb_unlink(skb, &rtwdev->c2h_queue);
296 		rtw_fw_c2h_cmd_handle(rtwdev, skb);
297 		dev_kfree_skb_any(skb);
298 	}
299 }
300 
301 static void rtw_ips_work(struct work_struct *work)
302 {
303 	struct rtw_dev *rtwdev = container_of(work, struct rtw_dev, ips_work);
304 
305 	mutex_lock(&rtwdev->mutex);
306 	if (rtwdev->hw->conf.flags & IEEE80211_CONF_IDLE)
307 		rtw_enter_ips(rtwdev);
308 	mutex_unlock(&rtwdev->mutex);
309 }
310 
311 static u8 rtw_acquire_macid(struct rtw_dev *rtwdev)
312 {
313 	unsigned long mac_id;
314 
315 	mac_id = find_first_zero_bit(rtwdev->mac_id_map, RTW_MAX_MAC_ID_NUM);
316 	if (mac_id < RTW_MAX_MAC_ID_NUM)
317 		set_bit(mac_id, rtwdev->mac_id_map);
318 
319 	return mac_id;
320 }
321 
322 static void rtw_sta_rc_work(struct work_struct *work)
323 {
324 	struct rtw_sta_info *si = container_of(work, struct rtw_sta_info,
325 					       rc_work);
326 	struct rtw_dev *rtwdev = si->rtwdev;
327 
328 	mutex_lock(&rtwdev->mutex);
329 	rtw_update_sta_info(rtwdev, si, true);
330 	mutex_unlock(&rtwdev->mutex);
331 }
332 
333 int rtw_sta_add(struct rtw_dev *rtwdev, struct ieee80211_sta *sta,
334 		struct ieee80211_vif *vif)
335 {
336 	struct rtw_sta_info *si = (struct rtw_sta_info *)sta->drv_priv;
337 	int i;
338 
339 	si->mac_id = rtw_acquire_macid(rtwdev);
340 	if (si->mac_id >= RTW_MAX_MAC_ID_NUM)
341 		return -ENOSPC;
342 
343 	si->rtwdev = rtwdev;
344 	si->sta = sta;
345 	si->vif = vif;
346 	si->init_ra_lv = 1;
347 	ewma_rssi_init(&si->avg_rssi);
348 	for (i = 0; i < ARRAY_SIZE(sta->txq); i++)
349 		rtw_txq_init(rtwdev, sta->txq[i]);
350 	INIT_WORK(&si->rc_work, rtw_sta_rc_work);
351 
352 	rtw_update_sta_info(rtwdev, si, true);
353 	rtw_fw_media_status_report(rtwdev, si->mac_id, true);
354 
355 	rtwdev->sta_cnt++;
356 	rtwdev->beacon_loss = false;
357 	rtw_dbg(rtwdev, RTW_DBG_STATE, "sta %pM joined with macid %d\n",
358 		sta->addr, si->mac_id);
359 
360 	return 0;
361 }
362 
363 void rtw_sta_remove(struct rtw_dev *rtwdev, struct ieee80211_sta *sta,
364 		    bool fw_exist)
365 {
366 	struct rtw_sta_info *si = (struct rtw_sta_info *)sta->drv_priv;
367 	int i;
368 
369 	cancel_work_sync(&si->rc_work);
370 
371 	rtw_release_macid(rtwdev, si->mac_id);
372 	if (fw_exist)
373 		rtw_fw_media_status_report(rtwdev, si->mac_id, false);
374 
375 	for (i = 0; i < ARRAY_SIZE(sta->txq); i++)
376 		rtw_txq_cleanup(rtwdev, sta->txq[i]);
377 
378 	kfree(si->mask);
379 
380 	rtwdev->sta_cnt--;
381 	rtw_dbg(rtwdev, RTW_DBG_STATE, "sta %pM with macid %d left\n",
382 		sta->addr, si->mac_id);
383 }
384 
385 struct rtw_fwcd_hdr {
386 	u32 item;
387 	u32 size;
388 	u32 padding1;
389 	u32 padding2;
390 } __packed;
391 
392 static int rtw_fwcd_prep(struct rtw_dev *rtwdev)
393 {
394 	const struct rtw_chip_info *chip = rtwdev->chip;
395 	struct rtw_fwcd_desc *desc = &rtwdev->fw.fwcd_desc;
396 	const struct rtw_fwcd_segs *segs = chip->fwcd_segs;
397 	u32 prep_size = chip->fw_rxff_size + sizeof(struct rtw_fwcd_hdr);
398 	u8 i;
399 
400 	if (segs) {
401 		prep_size += segs->num * sizeof(struct rtw_fwcd_hdr);
402 
403 		for (i = 0; i < segs->num; i++)
404 			prep_size += segs->segs[i];
405 	}
406 
407 	desc->data = vmalloc(prep_size);
408 	if (!desc->data)
409 		return -ENOMEM;
410 
411 	desc->size = prep_size;
412 	desc->next = desc->data;
413 
414 	return 0;
415 }
416 
417 static u8 *rtw_fwcd_next(struct rtw_dev *rtwdev, u32 item, u32 size)
418 {
419 	struct rtw_fwcd_desc *desc = &rtwdev->fw.fwcd_desc;
420 	struct rtw_fwcd_hdr *hdr;
421 	u8 *next;
422 
423 	if (!desc->data) {
424 		rtw_dbg(rtwdev, RTW_DBG_FW, "fwcd isn't prepared successfully\n");
425 		return NULL;
426 	}
427 
428 	next = desc->next + sizeof(struct rtw_fwcd_hdr);
429 	if (next - desc->data + size > desc->size) {
430 		rtw_dbg(rtwdev, RTW_DBG_FW, "fwcd isn't prepared enough\n");
431 		return NULL;
432 	}
433 
434 	hdr = (struct rtw_fwcd_hdr *)(desc->next);
435 	hdr->item = item;
436 	hdr->size = size;
437 	hdr->padding1 = 0x01234567;
438 	hdr->padding2 = 0x89abcdef;
439 	desc->next = next + size;
440 
441 	return next;
442 }
443 
444 static void rtw_fwcd_dump(struct rtw_dev *rtwdev)
445 {
446 	struct rtw_fwcd_desc *desc = &rtwdev->fw.fwcd_desc;
447 
448 	rtw_dbg(rtwdev, RTW_DBG_FW, "dump fwcd\n");
449 
450 	/* Data will be freed after lifetime of device coredump. After calling
451 	 * dev_coredump, data is supposed to be handled by the device coredump
452 	 * framework. Note that a new dump will be discarded if a previous one
453 	 * hasn't been released yet.
454 	 */
455 	dev_coredumpv(rtwdev->dev, desc->data, desc->size, GFP_KERNEL);
456 }
457 
458 static void rtw_fwcd_free(struct rtw_dev *rtwdev, bool free_self)
459 {
460 	struct rtw_fwcd_desc *desc = &rtwdev->fw.fwcd_desc;
461 
462 	if (free_self) {
463 		rtw_dbg(rtwdev, RTW_DBG_FW, "free fwcd by self\n");
464 		vfree(desc->data);
465 	}
466 
467 	desc->data = NULL;
468 	desc->next = NULL;
469 }
470 
471 static int rtw_fw_dump_crash_log(struct rtw_dev *rtwdev)
472 {
473 	u32 size = rtwdev->chip->fw_rxff_size;
474 	u32 *buf;
475 	u8 seq;
476 
477 	buf = (u32 *)rtw_fwcd_next(rtwdev, RTW_FWCD_TLV, size);
478 	if (!buf)
479 		return -ENOMEM;
480 
481 	if (rtw_fw_dump_fifo(rtwdev, RTW_FW_FIFO_SEL_RXBUF_FW, 0, size, buf)) {
482 		rtw_dbg(rtwdev, RTW_DBG_FW, "dump fw fifo fail\n");
483 		return -EINVAL;
484 	}
485 
486 	if (GET_FW_DUMP_LEN(buf) == 0) {
487 		rtw_dbg(rtwdev, RTW_DBG_FW, "fw crash dump's length is 0\n");
488 		return -EINVAL;
489 	}
490 
491 	seq = GET_FW_DUMP_SEQ(buf);
492 	if (seq > 0) {
493 		rtw_dbg(rtwdev, RTW_DBG_FW,
494 			"fw crash dump's seq is wrong: %d\n", seq);
495 		return -EINVAL;
496 	}
497 
498 	return 0;
499 }
500 
501 int rtw_dump_fw(struct rtw_dev *rtwdev, const u32 ocp_src, u32 size,
502 		u32 fwcd_item)
503 {
504 	u32 rxff = rtwdev->chip->fw_rxff_size;
505 	u32 dump_size, done_size = 0;
506 	u8 *buf;
507 	int ret;
508 
509 	buf = rtw_fwcd_next(rtwdev, fwcd_item, size);
510 	if (!buf)
511 		return -ENOMEM;
512 
513 	while (size) {
514 		dump_size = size > rxff ? rxff : size;
515 
516 		ret = rtw_ddma_to_fw_fifo(rtwdev, ocp_src + done_size,
517 					  dump_size);
518 		if (ret) {
519 			rtw_err(rtwdev,
520 				"ddma fw 0x%x [+0x%x] to fw fifo fail\n",
521 				ocp_src, done_size);
522 			return ret;
523 		}
524 
525 		ret = rtw_fw_dump_fifo(rtwdev, RTW_FW_FIFO_SEL_RXBUF_FW, 0,
526 				       dump_size, (u32 *)(buf + done_size));
527 		if (ret) {
528 			rtw_err(rtwdev,
529 				"dump fw 0x%x [+0x%x] from fw fifo fail\n",
530 				ocp_src, done_size);
531 			return ret;
532 		}
533 
534 		size -= dump_size;
535 		done_size += dump_size;
536 	}
537 
538 	return 0;
539 }
540 EXPORT_SYMBOL(rtw_dump_fw);
541 
542 int rtw_dump_reg(struct rtw_dev *rtwdev, const u32 addr, const u32 size)
543 {
544 	u8 *buf;
545 	u32 i;
546 
547 	if (addr & 0x3) {
548 		WARN(1, "should be 4-byte aligned, addr = 0x%08x\n", addr);
549 		return -EINVAL;
550 	}
551 
552 	buf = rtw_fwcd_next(rtwdev, RTW_FWCD_REG, size);
553 	if (!buf)
554 		return -ENOMEM;
555 
556 	for (i = 0; i < size; i += 4)
557 		*(u32 *)(buf + i) = rtw_read32(rtwdev, addr + i);
558 
559 	return 0;
560 }
561 EXPORT_SYMBOL(rtw_dump_reg);
562 
563 void rtw_vif_assoc_changed(struct rtw_vif *rtwvif,
564 			   struct ieee80211_bss_conf *conf)
565 {
566 	struct ieee80211_vif *vif = NULL;
567 
568 	if (conf)
569 		vif = container_of(conf, struct ieee80211_vif, bss_conf);
570 
571 	if (conf && vif->cfg.assoc) {
572 		rtwvif->aid = vif->cfg.aid;
573 		rtwvif->net_type = RTW_NET_MGD_LINKED;
574 	} else {
575 		rtwvif->aid = 0;
576 		rtwvif->net_type = RTW_NET_NO_LINK;
577 	}
578 }
579 
580 static void rtw_reset_key_iter(struct ieee80211_hw *hw,
581 			       struct ieee80211_vif *vif,
582 			       struct ieee80211_sta *sta,
583 			       struct ieee80211_key_conf *key,
584 			       void *data)
585 {
586 	struct rtw_dev *rtwdev = (struct rtw_dev *)data;
587 	struct rtw_sec_desc *sec = &rtwdev->sec;
588 
589 	rtw_sec_clear_cam(rtwdev, sec, key->hw_key_idx);
590 }
591 
592 static void rtw_reset_sta_iter(void *data, struct ieee80211_sta *sta)
593 {
594 	struct rtw_dev *rtwdev = (struct rtw_dev *)data;
595 
596 	if (rtwdev->sta_cnt == 0) {
597 		rtw_warn(rtwdev, "sta count before reset should not be 0\n");
598 		return;
599 	}
600 	rtw_sta_remove(rtwdev, sta, false);
601 }
602 
603 static void rtw_reset_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
604 {
605 	struct rtw_dev *rtwdev = (struct rtw_dev *)data;
606 	struct rtw_vif *rtwvif = (struct rtw_vif *)vif->drv_priv;
607 
608 	rtw_bf_disassoc(rtwdev, vif, NULL);
609 	rtw_vif_assoc_changed(rtwvif, NULL);
610 	rtw_txq_cleanup(rtwdev, vif->txq);
611 }
612 
613 void rtw_fw_recovery(struct rtw_dev *rtwdev)
614 {
615 	if (!test_bit(RTW_FLAG_RESTARTING, rtwdev->flags))
616 		ieee80211_queue_work(rtwdev->hw, &rtwdev->fw_recovery_work);
617 }
618 
619 static void __fw_recovery_work(struct rtw_dev *rtwdev)
620 {
621 	int ret = 0;
622 
623 	set_bit(RTW_FLAG_RESTARTING, rtwdev->flags);
624 	clear_bit(RTW_FLAG_RESTART_TRIGGERING, rtwdev->flags);
625 
626 	ret = rtw_fwcd_prep(rtwdev);
627 	if (ret)
628 		goto free;
629 	ret = rtw_fw_dump_crash_log(rtwdev);
630 	if (ret)
631 		goto free;
632 	ret = rtw_chip_dump_fw_crash(rtwdev);
633 	if (ret)
634 		goto free;
635 
636 	rtw_fwcd_dump(rtwdev);
637 free:
638 	rtw_fwcd_free(rtwdev, !!ret);
639 	rtw_write8(rtwdev, REG_MCU_TST_CFG, 0);
640 
641 	WARN(1, "firmware crash, start reset and recover\n");
642 
643 	rcu_read_lock();
644 	rtw_iterate_keys_rcu(rtwdev, NULL, rtw_reset_key_iter, rtwdev);
645 	rcu_read_unlock();
646 	rtw_iterate_stas_atomic(rtwdev, rtw_reset_sta_iter, rtwdev);
647 	rtw_iterate_vifs_atomic(rtwdev, rtw_reset_vif_iter, rtwdev);
648 	bitmap_zero(rtwdev->hw_port, RTW_PORT_NUM);
649 	rtw_enter_ips(rtwdev);
650 }
651 
652 static void rtw_fw_recovery_work(struct work_struct *work)
653 {
654 	struct rtw_dev *rtwdev = container_of(work, struct rtw_dev,
655 					      fw_recovery_work);
656 
657 	mutex_lock(&rtwdev->mutex);
658 	__fw_recovery_work(rtwdev);
659 	mutex_unlock(&rtwdev->mutex);
660 
661 	ieee80211_restart_hw(rtwdev->hw);
662 }
663 
664 struct rtw_txq_ba_iter_data {
665 };
666 
667 static void rtw_txq_ba_iter(void *data, struct ieee80211_sta *sta)
668 {
669 	struct rtw_sta_info *si = (struct rtw_sta_info *)sta->drv_priv;
670 	int ret;
671 	u8 tid;
672 
673 	tid = find_first_bit(si->tid_ba, IEEE80211_NUM_TIDS);
674 	while (tid != IEEE80211_NUM_TIDS) {
675 		clear_bit(tid, si->tid_ba);
676 		ret = ieee80211_start_tx_ba_session(sta, tid, 0);
677 		if (ret == -EINVAL) {
678 			struct ieee80211_txq *txq;
679 			struct rtw_txq *rtwtxq;
680 
681 			txq = sta->txq[tid];
682 			rtwtxq = (struct rtw_txq *)txq->drv_priv;
683 			set_bit(RTW_TXQ_BLOCK_BA, &rtwtxq->flags);
684 		}
685 
686 		tid = find_first_bit(si->tid_ba, IEEE80211_NUM_TIDS);
687 	}
688 }
689 
690 static void rtw_txq_ba_work(struct work_struct *work)
691 {
692 	struct rtw_dev *rtwdev = container_of(work, struct rtw_dev, ba_work);
693 	struct rtw_txq_ba_iter_data data;
694 
695 	rtw_iterate_stas_atomic(rtwdev, rtw_txq_ba_iter, &data);
696 }
697 
698 void rtw_set_rx_freq_band(struct rtw_rx_pkt_stat *pkt_stat, u8 channel)
699 {
700 	if (IS_CH_2G_BAND(channel))
701 		pkt_stat->band = NL80211_BAND_2GHZ;
702 	else if (IS_CH_5G_BAND(channel))
703 		pkt_stat->band = NL80211_BAND_5GHZ;
704 	else
705 		return;
706 
707 	pkt_stat->freq = ieee80211_channel_to_frequency(channel, pkt_stat->band);
708 }
709 EXPORT_SYMBOL(rtw_set_rx_freq_band);
710 
711 void rtw_set_dtim_period(struct rtw_dev *rtwdev, int dtim_period)
712 {
713 	rtw_write32_set(rtwdev, REG_TCR, BIT_TCR_UPDATE_TIMIE);
714 	rtw_write8(rtwdev, REG_DTIM_COUNTER_ROOT, dtim_period - 1);
715 }
716 
717 void rtw_update_channel(struct rtw_dev *rtwdev, u8 center_channel,
718 			u8 primary_channel, enum rtw_supported_band band,
719 			enum rtw_bandwidth bandwidth)
720 {
721 	enum nl80211_band nl_band = rtw_hw_to_nl80211_band(band);
722 	struct rtw_hal *hal = &rtwdev->hal;
723 	u8 *cch_by_bw = hal->cch_by_bw;
724 	u32 center_freq, primary_freq;
725 	enum rtw_sar_bands sar_band;
726 	u8 primary_channel_idx;
727 
728 	center_freq = ieee80211_channel_to_frequency(center_channel, nl_band);
729 	primary_freq = ieee80211_channel_to_frequency(primary_channel, nl_band);
730 
731 	/* assign the center channel used while 20M bw is selected */
732 	cch_by_bw[RTW_CHANNEL_WIDTH_20] = primary_channel;
733 
734 	/* assign the center channel used while current bw is selected */
735 	cch_by_bw[bandwidth] = center_channel;
736 
737 	switch (bandwidth) {
738 	case RTW_CHANNEL_WIDTH_20:
739 	default:
740 		primary_channel_idx = RTW_SC_DONT_CARE;
741 		break;
742 	case RTW_CHANNEL_WIDTH_40:
743 		if (primary_freq > center_freq)
744 			primary_channel_idx = RTW_SC_20_UPPER;
745 		else
746 			primary_channel_idx = RTW_SC_20_LOWER;
747 		break;
748 	case RTW_CHANNEL_WIDTH_80:
749 		if (primary_freq > center_freq) {
750 			if (primary_freq - center_freq == 10)
751 				primary_channel_idx = RTW_SC_20_UPPER;
752 			else
753 				primary_channel_idx = RTW_SC_20_UPMOST;
754 
755 			/* assign the center channel used
756 			 * while 40M bw is selected
757 			 */
758 			cch_by_bw[RTW_CHANNEL_WIDTH_40] = center_channel + 4;
759 		} else {
760 			if (center_freq - primary_freq == 10)
761 				primary_channel_idx = RTW_SC_20_LOWER;
762 			else
763 				primary_channel_idx = RTW_SC_20_LOWEST;
764 
765 			/* assign the center channel used
766 			 * while 40M bw is selected
767 			 */
768 			cch_by_bw[RTW_CHANNEL_WIDTH_40] = center_channel - 4;
769 		}
770 		break;
771 	}
772 
773 	switch (center_channel) {
774 	case 1 ... 14:
775 		sar_band = RTW_SAR_BAND_0;
776 		break;
777 	case 36 ... 64:
778 		sar_band = RTW_SAR_BAND_1;
779 		break;
780 	case 100 ... 144:
781 		sar_band = RTW_SAR_BAND_3;
782 		break;
783 	case 149 ... 177:
784 		sar_band = RTW_SAR_BAND_4;
785 		break;
786 	default:
787 		WARN(1, "unknown ch(%u) to SAR band\n", center_channel);
788 		sar_band = RTW_SAR_BAND_0;
789 		break;
790 	}
791 
792 	hal->current_primary_channel_index = primary_channel_idx;
793 	hal->current_band_width = bandwidth;
794 	hal->primary_channel = primary_channel;
795 	hal->current_channel = center_channel;
796 	hal->current_band_type = band;
797 	hal->sar_band = sar_band;
798 }
799 
800 void rtw_get_channel_params(struct cfg80211_chan_def *chandef,
801 			    struct rtw_channel_params *chan_params)
802 {
803 	struct ieee80211_channel *channel = chandef->chan;
804 	enum nl80211_chan_width width = chandef->width;
805 	u32 primary_freq, center_freq;
806 	u8 center_chan;
807 	u8 bandwidth = RTW_CHANNEL_WIDTH_20;
808 
809 	center_chan = channel->hw_value;
810 	primary_freq = channel->center_freq;
811 	center_freq = chandef->center_freq1;
812 
813 	switch (width) {
814 	case NL80211_CHAN_WIDTH_20_NOHT:
815 	case NL80211_CHAN_WIDTH_20:
816 		bandwidth = RTW_CHANNEL_WIDTH_20;
817 		break;
818 	case NL80211_CHAN_WIDTH_40:
819 		bandwidth = RTW_CHANNEL_WIDTH_40;
820 		if (primary_freq > center_freq)
821 			center_chan -= 2;
822 		else
823 			center_chan += 2;
824 		break;
825 	case NL80211_CHAN_WIDTH_80:
826 		bandwidth = RTW_CHANNEL_WIDTH_80;
827 		if (primary_freq > center_freq) {
828 			if (primary_freq - center_freq == 10)
829 				center_chan -= 2;
830 			else
831 				center_chan -= 6;
832 		} else {
833 			if (center_freq - primary_freq == 10)
834 				center_chan += 2;
835 			else
836 				center_chan += 6;
837 		}
838 		break;
839 	default:
840 		center_chan = 0;
841 		break;
842 	}
843 
844 	chan_params->center_chan = center_chan;
845 	chan_params->bandwidth = bandwidth;
846 	chan_params->primary_chan = channel->hw_value;
847 }
848 
849 void rtw_set_channel(struct rtw_dev *rtwdev)
850 {
851 	const struct rtw_chip_info *chip = rtwdev->chip;
852 	struct ieee80211_hw *hw = rtwdev->hw;
853 	struct rtw_hal *hal = &rtwdev->hal;
854 	struct rtw_channel_params ch_param;
855 	u8 center_chan, primary_chan, bandwidth, band;
856 
857 	rtw_get_channel_params(&hw->conf.chandef, &ch_param);
858 	if (WARN(ch_param.center_chan == 0, "Invalid channel\n"))
859 		return;
860 
861 	center_chan = ch_param.center_chan;
862 	primary_chan = ch_param.primary_chan;
863 	bandwidth = ch_param.bandwidth;
864 	band = ch_param.center_chan > 14 ? RTW_BAND_5G : RTW_BAND_2G;
865 
866 	rtw_update_channel(rtwdev, center_chan, primary_chan, band, bandwidth);
867 
868 	if (rtwdev->scan_info.op_chan)
869 		rtw_store_op_chan(rtwdev, true);
870 
871 	chip->ops->set_channel(rtwdev, center_chan, bandwidth,
872 			       hal->current_primary_channel_index);
873 
874 	if (hal->current_band_type == RTW_BAND_5G) {
875 		rtw_coex_switchband_notify(rtwdev, COEX_SWITCH_TO_5G);
876 	} else {
877 		if (test_bit(RTW_FLAG_SCANNING, rtwdev->flags))
878 			rtw_coex_switchband_notify(rtwdev, COEX_SWITCH_TO_24G);
879 		else
880 			rtw_coex_switchband_notify(rtwdev, COEX_SWITCH_TO_24G_NOFORSCAN);
881 	}
882 
883 	rtw_phy_set_tx_power_level(rtwdev, center_chan);
884 
885 	/* if the channel isn't set for scanning, we will do RF calibration
886 	 * in ieee80211_ops::mgd_prepare_tx(). Performing the calibration
887 	 * during scanning on each channel takes too long.
888 	 */
889 	if (!test_bit(RTW_FLAG_SCANNING, rtwdev->flags))
890 		rtwdev->need_rfk = true;
891 }
892 
893 void rtw_chip_prepare_tx(struct rtw_dev *rtwdev)
894 {
895 	const struct rtw_chip_info *chip = rtwdev->chip;
896 
897 	if (rtwdev->need_rfk) {
898 		rtwdev->need_rfk = false;
899 		chip->ops->phy_calibration(rtwdev);
900 	}
901 }
902 
903 static void rtw_vif_write_addr(struct rtw_dev *rtwdev, u32 start, u8 *addr)
904 {
905 	int i;
906 
907 	for (i = 0; i < ETH_ALEN; i++)
908 		rtw_write8(rtwdev, start + i, addr[i]);
909 }
910 
911 void rtw_vif_port_config(struct rtw_dev *rtwdev,
912 			 struct rtw_vif *rtwvif,
913 			 u32 config)
914 {
915 	u32 addr, mask;
916 
917 	if (config & PORT_SET_MAC_ADDR) {
918 		addr = rtwvif->conf->mac_addr.addr;
919 		rtw_vif_write_addr(rtwdev, addr, rtwvif->mac_addr);
920 	}
921 	if (config & PORT_SET_BSSID) {
922 		addr = rtwvif->conf->bssid.addr;
923 		rtw_vif_write_addr(rtwdev, addr, rtwvif->bssid);
924 	}
925 	if (config & PORT_SET_NET_TYPE) {
926 		addr = rtwvif->conf->net_type.addr;
927 		mask = rtwvif->conf->net_type.mask;
928 		rtw_write32_mask(rtwdev, addr, mask, rtwvif->net_type);
929 	}
930 	if (config & PORT_SET_AID) {
931 		addr = rtwvif->conf->aid.addr;
932 		mask = rtwvif->conf->aid.mask;
933 		rtw_write32_mask(rtwdev, addr, mask, rtwvif->aid);
934 	}
935 	if (config & PORT_SET_BCN_CTRL) {
936 		addr = rtwvif->conf->bcn_ctrl.addr;
937 		mask = rtwvif->conf->bcn_ctrl.mask;
938 		rtw_write8_mask(rtwdev, addr, mask, rtwvif->bcn_ctrl);
939 	}
940 }
941 
942 static u8 hw_bw_cap_to_bitamp(u8 bw_cap)
943 {
944 	u8 bw = 0;
945 
946 	switch (bw_cap) {
947 	case EFUSE_HW_CAP_IGNORE:
948 	case EFUSE_HW_CAP_SUPP_BW80:
949 		bw |= BIT(RTW_CHANNEL_WIDTH_80);
950 		fallthrough;
951 	case EFUSE_HW_CAP_SUPP_BW40:
952 		bw |= BIT(RTW_CHANNEL_WIDTH_40);
953 		fallthrough;
954 	default:
955 		bw |= BIT(RTW_CHANNEL_WIDTH_20);
956 		break;
957 	}
958 
959 	return bw;
960 }
961 
962 static void rtw_hw_config_rf_ant_num(struct rtw_dev *rtwdev, u8 hw_ant_num)
963 {
964 	const struct rtw_chip_info *chip = rtwdev->chip;
965 	struct rtw_hal *hal = &rtwdev->hal;
966 
967 	if (hw_ant_num == EFUSE_HW_CAP_IGNORE ||
968 	    hw_ant_num >= hal->rf_path_num)
969 		return;
970 
971 	switch (hw_ant_num) {
972 	case 1:
973 		hal->rf_type = RF_1T1R;
974 		hal->rf_path_num = 1;
975 		if (!chip->fix_rf_phy_num)
976 			hal->rf_phy_num = hal->rf_path_num;
977 		hal->antenna_tx = BB_PATH_A;
978 		hal->antenna_rx = BB_PATH_A;
979 		break;
980 	default:
981 		WARN(1, "invalid hw configuration from efuse\n");
982 		break;
983 	}
984 }
985 
986 static u64 get_vht_ra_mask(struct ieee80211_sta *sta)
987 {
988 	u64 ra_mask = 0;
989 	u16 mcs_map = le16_to_cpu(sta->deflink.vht_cap.vht_mcs.rx_mcs_map);
990 	u8 vht_mcs_cap;
991 	int i, nss;
992 
993 	/* 4SS, every two bits for MCS7/8/9 */
994 	for (i = 0, nss = 12; i < 4; i++, mcs_map >>= 2, nss += 10) {
995 		vht_mcs_cap = mcs_map & 0x3;
996 		switch (vht_mcs_cap) {
997 		case 2: /* MCS9 */
998 			ra_mask |= 0x3ffULL << nss;
999 			break;
1000 		case 1: /* MCS8 */
1001 			ra_mask |= 0x1ffULL << nss;
1002 			break;
1003 		case 0: /* MCS7 */
1004 			ra_mask |= 0x0ffULL << nss;
1005 			break;
1006 		default:
1007 			break;
1008 		}
1009 	}
1010 
1011 	return ra_mask;
1012 }
1013 
1014 static u8 get_rate_id(u8 wireless_set, enum rtw_bandwidth bw_mode, u8 tx_num)
1015 {
1016 	u8 rate_id = 0;
1017 
1018 	switch (wireless_set) {
1019 	case WIRELESS_CCK:
1020 		rate_id = RTW_RATEID_B_20M;
1021 		break;
1022 	case WIRELESS_OFDM:
1023 		rate_id = RTW_RATEID_G;
1024 		break;
1025 	case WIRELESS_CCK | WIRELESS_OFDM:
1026 		rate_id = RTW_RATEID_BG;
1027 		break;
1028 	case WIRELESS_OFDM | WIRELESS_HT:
1029 		if (tx_num == 1)
1030 			rate_id = RTW_RATEID_GN_N1SS;
1031 		else if (tx_num == 2)
1032 			rate_id = RTW_RATEID_GN_N2SS;
1033 		else if (tx_num == 3)
1034 			rate_id = RTW_RATEID_ARFR5_N_3SS;
1035 		break;
1036 	case WIRELESS_CCK | WIRELESS_OFDM | WIRELESS_HT:
1037 		if (bw_mode == RTW_CHANNEL_WIDTH_40) {
1038 			if (tx_num == 1)
1039 				rate_id = RTW_RATEID_BGN_40M_1SS;
1040 			else if (tx_num == 2)
1041 				rate_id = RTW_RATEID_BGN_40M_2SS;
1042 			else if (tx_num == 3)
1043 				rate_id = RTW_RATEID_ARFR5_N_3SS;
1044 			else if (tx_num == 4)
1045 				rate_id = RTW_RATEID_ARFR7_N_4SS;
1046 		} else {
1047 			if (tx_num == 1)
1048 				rate_id = RTW_RATEID_BGN_20M_1SS;
1049 			else if (tx_num == 2)
1050 				rate_id = RTW_RATEID_BGN_20M_2SS;
1051 			else if (tx_num == 3)
1052 				rate_id = RTW_RATEID_ARFR5_N_3SS;
1053 			else if (tx_num == 4)
1054 				rate_id = RTW_RATEID_ARFR7_N_4SS;
1055 		}
1056 		break;
1057 	case WIRELESS_OFDM | WIRELESS_VHT:
1058 		if (tx_num == 1)
1059 			rate_id = RTW_RATEID_ARFR1_AC_1SS;
1060 		else if (tx_num == 2)
1061 			rate_id = RTW_RATEID_ARFR0_AC_2SS;
1062 		else if (tx_num == 3)
1063 			rate_id = RTW_RATEID_ARFR4_AC_3SS;
1064 		else if (tx_num == 4)
1065 			rate_id = RTW_RATEID_ARFR6_AC_4SS;
1066 		break;
1067 	case WIRELESS_CCK | WIRELESS_OFDM | WIRELESS_VHT:
1068 		if (bw_mode >= RTW_CHANNEL_WIDTH_80) {
1069 			if (tx_num == 1)
1070 				rate_id = RTW_RATEID_ARFR1_AC_1SS;
1071 			else if (tx_num == 2)
1072 				rate_id = RTW_RATEID_ARFR0_AC_2SS;
1073 			else if (tx_num == 3)
1074 				rate_id = RTW_RATEID_ARFR4_AC_3SS;
1075 			else if (tx_num == 4)
1076 				rate_id = RTW_RATEID_ARFR6_AC_4SS;
1077 		} else {
1078 			if (tx_num == 1)
1079 				rate_id = RTW_RATEID_ARFR2_AC_2G_1SS;
1080 			else if (tx_num == 2)
1081 				rate_id = RTW_RATEID_ARFR3_AC_2G_2SS;
1082 			else if (tx_num == 3)
1083 				rate_id = RTW_RATEID_ARFR4_AC_3SS;
1084 			else if (tx_num == 4)
1085 				rate_id = RTW_RATEID_ARFR6_AC_4SS;
1086 		}
1087 		break;
1088 	default:
1089 		break;
1090 	}
1091 
1092 	return rate_id;
1093 }
1094 
1095 #define RA_MASK_CCK_RATES	0x0000f
1096 #define RA_MASK_OFDM_RATES	0x00ff0
1097 #define RA_MASK_HT_RATES_1SS	(0xff000ULL << 0)
1098 #define RA_MASK_HT_RATES_2SS	(0xff000ULL << 8)
1099 #define RA_MASK_HT_RATES_3SS	(0xff000ULL << 16)
1100 #define RA_MASK_HT_RATES	(RA_MASK_HT_RATES_1SS | \
1101 				 RA_MASK_HT_RATES_2SS | \
1102 				 RA_MASK_HT_RATES_3SS)
1103 #define RA_MASK_VHT_RATES_1SS	(0x3ff000ULL << 0)
1104 #define RA_MASK_VHT_RATES_2SS	(0x3ff000ULL << 10)
1105 #define RA_MASK_VHT_RATES_3SS	(0x3ff000ULL << 20)
1106 #define RA_MASK_VHT_RATES	(RA_MASK_VHT_RATES_1SS | \
1107 				 RA_MASK_VHT_RATES_2SS | \
1108 				 RA_MASK_VHT_RATES_3SS)
1109 #define RA_MASK_CCK_IN_BG	0x00005
1110 #define RA_MASK_CCK_IN_HT	0x00005
1111 #define RA_MASK_CCK_IN_VHT	0x00005
1112 #define RA_MASK_OFDM_IN_VHT	0x00010
1113 #define RA_MASK_OFDM_IN_HT_2G	0x00010
1114 #define RA_MASK_OFDM_IN_HT_5G	0x00030
1115 
1116 static u64 rtw_rate_mask_rssi(struct rtw_sta_info *si, u8 wireless_set)
1117 {
1118 	u8 rssi_level = si->rssi_level;
1119 
1120 	if (wireless_set == WIRELESS_CCK)
1121 		return 0xffffffffffffffffULL;
1122 
1123 	if (rssi_level == 0)
1124 		return 0xffffffffffffffffULL;
1125 	else if (rssi_level == 1)
1126 		return 0xfffffffffffffff0ULL;
1127 	else if (rssi_level == 2)
1128 		return 0xffffffffffffefe0ULL;
1129 	else if (rssi_level == 3)
1130 		return 0xffffffffffffcfc0ULL;
1131 	else if (rssi_level == 4)
1132 		return 0xffffffffffff8f80ULL;
1133 	else
1134 		return 0xffffffffffff0f00ULL;
1135 }
1136 
1137 static u64 rtw_rate_mask_recover(u64 ra_mask, u64 ra_mask_bak)
1138 {
1139 	if ((ra_mask & ~(RA_MASK_CCK_RATES | RA_MASK_OFDM_RATES)) == 0)
1140 		ra_mask |= (ra_mask_bak & ~(RA_MASK_CCK_RATES | RA_MASK_OFDM_RATES));
1141 
1142 	if (ra_mask == 0)
1143 		ra_mask |= (ra_mask_bak & (RA_MASK_CCK_RATES | RA_MASK_OFDM_RATES));
1144 
1145 	return ra_mask;
1146 }
1147 
1148 static u64 rtw_rate_mask_cfg(struct rtw_dev *rtwdev, struct rtw_sta_info *si,
1149 			     u64 ra_mask, bool is_vht_enable)
1150 {
1151 	struct rtw_hal *hal = &rtwdev->hal;
1152 	const struct cfg80211_bitrate_mask *mask = si->mask;
1153 	u64 cfg_mask = GENMASK_ULL(63, 0);
1154 	u8 band;
1155 
1156 	if (!si->use_cfg_mask)
1157 		return ra_mask;
1158 
1159 	band = hal->current_band_type;
1160 	if (band == RTW_BAND_2G) {
1161 		band = NL80211_BAND_2GHZ;
1162 		cfg_mask = mask->control[band].legacy;
1163 	} else if (band == RTW_BAND_5G) {
1164 		band = NL80211_BAND_5GHZ;
1165 		cfg_mask = u64_encode_bits(mask->control[band].legacy,
1166 					   RA_MASK_OFDM_RATES);
1167 	}
1168 
1169 	if (!is_vht_enable) {
1170 		if (ra_mask & RA_MASK_HT_RATES_1SS)
1171 			cfg_mask |= u64_encode_bits(mask->control[band].ht_mcs[0],
1172 						    RA_MASK_HT_RATES_1SS);
1173 		if (ra_mask & RA_MASK_HT_RATES_2SS)
1174 			cfg_mask |= u64_encode_bits(mask->control[band].ht_mcs[1],
1175 						    RA_MASK_HT_RATES_2SS);
1176 	} else {
1177 		if (ra_mask & RA_MASK_VHT_RATES_1SS)
1178 			cfg_mask |= u64_encode_bits(mask->control[band].vht_mcs[0],
1179 						    RA_MASK_VHT_RATES_1SS);
1180 		if (ra_mask & RA_MASK_VHT_RATES_2SS)
1181 			cfg_mask |= u64_encode_bits(mask->control[band].vht_mcs[1],
1182 						    RA_MASK_VHT_RATES_2SS);
1183 	}
1184 
1185 	ra_mask &= cfg_mask;
1186 
1187 	return ra_mask;
1188 }
1189 
1190 void rtw_update_sta_info(struct rtw_dev *rtwdev, struct rtw_sta_info *si,
1191 			 bool reset_ra_mask)
1192 {
1193 	struct rtw_dm_info *dm_info = &rtwdev->dm_info;
1194 	struct ieee80211_sta *sta = si->sta;
1195 	struct rtw_efuse *efuse = &rtwdev->efuse;
1196 	struct rtw_hal *hal = &rtwdev->hal;
1197 	u8 wireless_set;
1198 	u8 bw_mode;
1199 	u8 rate_id;
1200 	u8 rf_type = RF_1T1R;
1201 	u8 stbc_en = 0;
1202 	u8 ldpc_en = 0;
1203 	u8 tx_num = 1;
1204 	u64 ra_mask = 0;
1205 	u64 ra_mask_bak = 0;
1206 	bool is_vht_enable = false;
1207 	bool is_support_sgi = false;
1208 
1209 	if (sta->deflink.vht_cap.vht_supported) {
1210 		is_vht_enable = true;
1211 		ra_mask |= get_vht_ra_mask(sta);
1212 		if (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_RXSTBC_MASK)
1213 			stbc_en = VHT_STBC_EN;
1214 		if (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_RXLDPC)
1215 			ldpc_en = VHT_LDPC_EN;
1216 	} else if (sta->deflink.ht_cap.ht_supported) {
1217 		ra_mask |= (sta->deflink.ht_cap.mcs.rx_mask[1] << 20) |
1218 			   (sta->deflink.ht_cap.mcs.rx_mask[0] << 12);
1219 		if (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_RX_STBC)
1220 			stbc_en = HT_STBC_EN;
1221 		if (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_LDPC_CODING)
1222 			ldpc_en = HT_LDPC_EN;
1223 	}
1224 
1225 	if (efuse->hw_cap.nss == 1 || rtwdev->hal.txrx_1ss)
1226 		ra_mask &= RA_MASK_VHT_RATES_1SS | RA_MASK_HT_RATES_1SS;
1227 
1228 	if (hal->current_band_type == RTW_BAND_5G) {
1229 		ra_mask |= (u64)sta->deflink.supp_rates[NL80211_BAND_5GHZ] << 4;
1230 		ra_mask_bak = ra_mask;
1231 		if (sta->deflink.vht_cap.vht_supported) {
1232 			ra_mask &= RA_MASK_VHT_RATES | RA_MASK_OFDM_IN_VHT;
1233 			wireless_set = WIRELESS_OFDM | WIRELESS_VHT;
1234 		} else if (sta->deflink.ht_cap.ht_supported) {
1235 			ra_mask &= RA_MASK_HT_RATES | RA_MASK_OFDM_IN_HT_5G;
1236 			wireless_set = WIRELESS_OFDM | WIRELESS_HT;
1237 		} else {
1238 			wireless_set = WIRELESS_OFDM;
1239 		}
1240 		dm_info->rrsr_val_init = RRSR_INIT_5G;
1241 	} else if (hal->current_band_type == RTW_BAND_2G) {
1242 		ra_mask |= sta->deflink.supp_rates[NL80211_BAND_2GHZ];
1243 		ra_mask_bak = ra_mask;
1244 		if (sta->deflink.vht_cap.vht_supported) {
1245 			ra_mask &= RA_MASK_VHT_RATES | RA_MASK_CCK_IN_VHT |
1246 				   RA_MASK_OFDM_IN_VHT;
1247 			wireless_set = WIRELESS_CCK | WIRELESS_OFDM |
1248 				       WIRELESS_HT | WIRELESS_VHT;
1249 		} else if (sta->deflink.ht_cap.ht_supported) {
1250 			ra_mask &= RA_MASK_HT_RATES | RA_MASK_CCK_IN_HT |
1251 				   RA_MASK_OFDM_IN_HT_2G;
1252 			wireless_set = WIRELESS_CCK | WIRELESS_OFDM |
1253 				       WIRELESS_HT;
1254 		} else if (sta->deflink.supp_rates[0] <= 0xf) {
1255 			wireless_set = WIRELESS_CCK;
1256 		} else {
1257 			ra_mask &= RA_MASK_OFDM_RATES | RA_MASK_CCK_IN_BG;
1258 			wireless_set = WIRELESS_CCK | WIRELESS_OFDM;
1259 		}
1260 		dm_info->rrsr_val_init = RRSR_INIT_2G;
1261 	} else {
1262 		rtw_err(rtwdev, "Unknown band type\n");
1263 		ra_mask_bak = ra_mask;
1264 		wireless_set = 0;
1265 	}
1266 
1267 	switch (sta->deflink.bandwidth) {
1268 	case IEEE80211_STA_RX_BW_80:
1269 		bw_mode = RTW_CHANNEL_WIDTH_80;
1270 		is_support_sgi = sta->deflink.vht_cap.vht_supported &&
1271 				 (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_SHORT_GI_80);
1272 		break;
1273 	case IEEE80211_STA_RX_BW_40:
1274 		bw_mode = RTW_CHANNEL_WIDTH_40;
1275 		is_support_sgi = sta->deflink.ht_cap.ht_supported &&
1276 				 (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_SGI_40);
1277 		break;
1278 	default:
1279 		bw_mode = RTW_CHANNEL_WIDTH_20;
1280 		is_support_sgi = sta->deflink.ht_cap.ht_supported &&
1281 				 (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_SGI_20);
1282 		break;
1283 	}
1284 
1285 	if (sta->deflink.vht_cap.vht_supported && ra_mask & 0xffc00000) {
1286 		tx_num = 2;
1287 		rf_type = RF_2T2R;
1288 	} else if (sta->deflink.ht_cap.ht_supported && ra_mask & 0xfff00000) {
1289 		tx_num = 2;
1290 		rf_type = RF_2T2R;
1291 	}
1292 
1293 	rate_id = get_rate_id(wireless_set, bw_mode, tx_num);
1294 
1295 	ra_mask &= rtw_rate_mask_rssi(si, wireless_set);
1296 	ra_mask = rtw_rate_mask_recover(ra_mask, ra_mask_bak);
1297 	ra_mask = rtw_rate_mask_cfg(rtwdev, si, ra_mask, is_vht_enable);
1298 
1299 	si->bw_mode = bw_mode;
1300 	si->stbc_en = stbc_en;
1301 	si->ldpc_en = ldpc_en;
1302 	si->rf_type = rf_type;
1303 	si->wireless_set = wireless_set;
1304 	si->sgi_enable = is_support_sgi;
1305 	si->vht_enable = is_vht_enable;
1306 	si->ra_mask = ra_mask;
1307 	si->rate_id = rate_id;
1308 
1309 	rtw_fw_send_ra_info(rtwdev, si, reset_ra_mask);
1310 }
1311 
1312 static int rtw_wait_firmware_completion(struct rtw_dev *rtwdev)
1313 {
1314 	const struct rtw_chip_info *chip = rtwdev->chip;
1315 	struct rtw_fw_state *fw;
1316 
1317 	fw = &rtwdev->fw;
1318 	wait_for_completion(&fw->completion);
1319 	if (!fw->firmware)
1320 		return -EINVAL;
1321 
1322 	if (chip->wow_fw_name) {
1323 		fw = &rtwdev->wow_fw;
1324 		wait_for_completion(&fw->completion);
1325 		if (!fw->firmware)
1326 			return -EINVAL;
1327 	}
1328 
1329 	return 0;
1330 }
1331 
1332 static enum rtw_lps_deep_mode rtw_update_lps_deep_mode(struct rtw_dev *rtwdev,
1333 						       struct rtw_fw_state *fw)
1334 {
1335 	const struct rtw_chip_info *chip = rtwdev->chip;
1336 
1337 	if (rtw_disable_lps_deep_mode || !chip->lps_deep_mode_supported ||
1338 	    !fw->feature)
1339 		return LPS_DEEP_MODE_NONE;
1340 
1341 	if ((chip->lps_deep_mode_supported & BIT(LPS_DEEP_MODE_PG)) &&
1342 	    rtw_fw_feature_check(fw, FW_FEATURE_PG))
1343 		return LPS_DEEP_MODE_PG;
1344 
1345 	if ((chip->lps_deep_mode_supported & BIT(LPS_DEEP_MODE_LCLK)) &&
1346 	    rtw_fw_feature_check(fw, FW_FEATURE_LCLK))
1347 		return LPS_DEEP_MODE_LCLK;
1348 
1349 	return LPS_DEEP_MODE_NONE;
1350 }
1351 
1352 static int rtw_power_on(struct rtw_dev *rtwdev)
1353 {
1354 	const struct rtw_chip_info *chip = rtwdev->chip;
1355 	struct rtw_fw_state *fw = &rtwdev->fw;
1356 	bool wifi_only;
1357 	int ret;
1358 
1359 	ret = rtw_hci_setup(rtwdev);
1360 	if (ret) {
1361 		rtw_err(rtwdev, "failed to setup hci\n");
1362 		goto err;
1363 	}
1364 
1365 	/* power on MAC before firmware downloaded */
1366 	ret = rtw_mac_power_on(rtwdev);
1367 	if (ret) {
1368 		rtw_err(rtwdev, "failed to power on mac\n");
1369 		goto err;
1370 	}
1371 
1372 	ret = rtw_wait_firmware_completion(rtwdev);
1373 	if (ret) {
1374 		rtw_err(rtwdev, "failed to wait firmware completion\n");
1375 		goto err_off;
1376 	}
1377 
1378 	ret = rtw_download_firmware(rtwdev, fw);
1379 	if (ret) {
1380 		rtw_err(rtwdev, "failed to download firmware\n");
1381 		goto err_off;
1382 	}
1383 
1384 	/* config mac after firmware downloaded */
1385 	ret = rtw_mac_init(rtwdev);
1386 	if (ret) {
1387 		rtw_err(rtwdev, "failed to configure mac\n");
1388 		goto err_off;
1389 	}
1390 
1391 	chip->ops->phy_set_param(rtwdev);
1392 
1393 	ret = rtw_hci_start(rtwdev);
1394 	if (ret) {
1395 		rtw_err(rtwdev, "failed to start hci\n");
1396 		goto err_off;
1397 	}
1398 
1399 	/* send H2C after HCI has started */
1400 	rtw_fw_send_general_info(rtwdev);
1401 	rtw_fw_send_phydm_info(rtwdev);
1402 
1403 	wifi_only = !rtwdev->efuse.btcoex;
1404 	rtw_coex_power_on_setting(rtwdev);
1405 	rtw_coex_init_hw_config(rtwdev, wifi_only);
1406 
1407 	return 0;
1408 
1409 err_off:
1410 	rtw_mac_power_off(rtwdev);
1411 
1412 err:
1413 	return ret;
1414 }
1415 
1416 void rtw_core_fw_scan_notify(struct rtw_dev *rtwdev, bool start)
1417 {
1418 	if (!rtw_fw_feature_check(&rtwdev->fw, FW_FEATURE_NOTIFY_SCAN))
1419 		return;
1420 
1421 	if (start) {
1422 		rtw_fw_scan_notify(rtwdev, true);
1423 	} else {
1424 		reinit_completion(&rtwdev->fw_scan_density);
1425 		rtw_fw_scan_notify(rtwdev, false);
1426 		if (!wait_for_completion_timeout(&rtwdev->fw_scan_density,
1427 						 SCAN_NOTIFY_TIMEOUT))
1428 			rtw_warn(rtwdev, "firmware failed to report density after scan\n");
1429 	}
1430 }
1431 
1432 void rtw_core_scan_start(struct rtw_dev *rtwdev, struct rtw_vif *rtwvif,
1433 			 const u8 *mac_addr, bool hw_scan)
1434 {
1435 	u32 config = 0;
1436 	int ret = 0;
1437 
1438 	rtw_leave_lps(rtwdev);
1439 
1440 	if (hw_scan && (rtwdev->hw->conf.flags & IEEE80211_CONF_IDLE)) {
1441 		ret = rtw_leave_ips(rtwdev);
1442 		if (ret) {
1443 			rtw_err(rtwdev, "failed to leave idle state\n");
1444 			return;
1445 		}
1446 	}
1447 
1448 	ether_addr_copy(rtwvif->mac_addr, mac_addr);
1449 	config |= PORT_SET_MAC_ADDR;
1450 	rtw_vif_port_config(rtwdev, rtwvif, config);
1451 
1452 	rtw_coex_scan_notify(rtwdev, COEX_SCAN_START);
1453 	rtw_core_fw_scan_notify(rtwdev, true);
1454 
1455 	set_bit(RTW_FLAG_DIG_DISABLE, rtwdev->flags);
1456 	set_bit(RTW_FLAG_SCANNING, rtwdev->flags);
1457 }
1458 
1459 void rtw_core_scan_complete(struct rtw_dev *rtwdev, struct ieee80211_vif *vif,
1460 			    bool hw_scan)
1461 {
1462 	struct rtw_vif *rtwvif = vif ? (struct rtw_vif *)vif->drv_priv : NULL;
1463 	u32 config = 0;
1464 
1465 	if (!rtwvif)
1466 		return;
1467 
1468 	clear_bit(RTW_FLAG_SCANNING, rtwdev->flags);
1469 	clear_bit(RTW_FLAG_DIG_DISABLE, rtwdev->flags);
1470 
1471 	rtw_core_fw_scan_notify(rtwdev, false);
1472 
1473 	ether_addr_copy(rtwvif->mac_addr, vif->addr);
1474 	config |= PORT_SET_MAC_ADDR;
1475 	rtw_vif_port_config(rtwdev, rtwvif, config);
1476 
1477 	rtw_coex_scan_notify(rtwdev, COEX_SCAN_FINISH);
1478 
1479 	if (hw_scan && (rtwdev->hw->conf.flags & IEEE80211_CONF_IDLE))
1480 		ieee80211_queue_work(rtwdev->hw, &rtwdev->ips_work);
1481 }
1482 
1483 int rtw_core_start(struct rtw_dev *rtwdev)
1484 {
1485 	int ret;
1486 
1487 	ret = rtw_power_on(rtwdev);
1488 	if (ret)
1489 		return ret;
1490 
1491 	rtw_sec_enable_sec_engine(rtwdev);
1492 
1493 	rtwdev->lps_conf.deep_mode = rtw_update_lps_deep_mode(rtwdev, &rtwdev->fw);
1494 	rtwdev->lps_conf.wow_deep_mode = rtw_update_lps_deep_mode(rtwdev, &rtwdev->wow_fw);
1495 
1496 	/* rcr reset after powered on */
1497 	rtw_write32(rtwdev, REG_RCR, rtwdev->hal.rcr);
1498 
1499 	ieee80211_queue_delayed_work(rtwdev->hw, &rtwdev->watch_dog_work,
1500 				     RTW_WATCH_DOG_DELAY_TIME);
1501 
1502 	set_bit(RTW_FLAG_RUNNING, rtwdev->flags);
1503 
1504 	return 0;
1505 }
1506 
1507 static void rtw_power_off(struct rtw_dev *rtwdev)
1508 {
1509 	rtw_hci_stop(rtwdev);
1510 	rtw_coex_power_off_setting(rtwdev);
1511 	rtw_mac_power_off(rtwdev);
1512 }
1513 
1514 void rtw_core_stop(struct rtw_dev *rtwdev)
1515 {
1516 	struct rtw_coex *coex = &rtwdev->coex;
1517 
1518 	clear_bit(RTW_FLAG_RUNNING, rtwdev->flags);
1519 	clear_bit(RTW_FLAG_FW_RUNNING, rtwdev->flags);
1520 
1521 	mutex_unlock(&rtwdev->mutex);
1522 
1523 	cancel_work_sync(&rtwdev->c2h_work);
1524 	cancel_work_sync(&rtwdev->update_beacon_work);
1525 	cancel_delayed_work_sync(&rtwdev->watch_dog_work);
1526 	cancel_delayed_work_sync(&coex->bt_relink_work);
1527 	cancel_delayed_work_sync(&coex->bt_reenable_work);
1528 	cancel_delayed_work_sync(&coex->defreeze_work);
1529 	cancel_delayed_work_sync(&coex->wl_remain_work);
1530 	cancel_delayed_work_sync(&coex->bt_remain_work);
1531 	cancel_delayed_work_sync(&coex->wl_connecting_work);
1532 	cancel_delayed_work_sync(&coex->bt_multi_link_remain_work);
1533 	cancel_delayed_work_sync(&coex->wl_ccklock_work);
1534 
1535 	mutex_lock(&rtwdev->mutex);
1536 
1537 	rtw_power_off(rtwdev);
1538 }
1539 
1540 static void rtw_init_ht_cap(struct rtw_dev *rtwdev,
1541 			    struct ieee80211_sta_ht_cap *ht_cap)
1542 {
1543 	const struct rtw_chip_info *chip = rtwdev->chip;
1544 	struct rtw_efuse *efuse = &rtwdev->efuse;
1545 
1546 	ht_cap->ht_supported = true;
1547 	ht_cap->cap = 0;
1548 	ht_cap->cap |= IEEE80211_HT_CAP_SGI_20 |
1549 			IEEE80211_HT_CAP_MAX_AMSDU |
1550 			(1 << IEEE80211_HT_CAP_RX_STBC_SHIFT);
1551 
1552 	if (rtw_chip_has_rx_ldpc(rtwdev))
1553 		ht_cap->cap |= IEEE80211_HT_CAP_LDPC_CODING;
1554 	if (rtw_chip_has_tx_stbc(rtwdev))
1555 		ht_cap->cap |= IEEE80211_HT_CAP_TX_STBC;
1556 
1557 	if (efuse->hw_cap.bw & BIT(RTW_CHANNEL_WIDTH_40))
1558 		ht_cap->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40 |
1559 				IEEE80211_HT_CAP_DSSSCCK40 |
1560 				IEEE80211_HT_CAP_SGI_40;
1561 	ht_cap->ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K;
1562 	ht_cap->ampdu_density = chip->ampdu_density;
1563 	ht_cap->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
1564 	if (efuse->hw_cap.nss > 1) {
1565 		ht_cap->mcs.rx_mask[0] = 0xFF;
1566 		ht_cap->mcs.rx_mask[1] = 0xFF;
1567 		ht_cap->mcs.rx_mask[4] = 0x01;
1568 		ht_cap->mcs.rx_highest = cpu_to_le16(300);
1569 	} else {
1570 		ht_cap->mcs.rx_mask[0] = 0xFF;
1571 		ht_cap->mcs.rx_mask[1] = 0x00;
1572 		ht_cap->mcs.rx_mask[4] = 0x01;
1573 		ht_cap->mcs.rx_highest = cpu_to_le16(150);
1574 	}
1575 }
1576 
1577 static void rtw_init_vht_cap(struct rtw_dev *rtwdev,
1578 			     struct ieee80211_sta_vht_cap *vht_cap)
1579 {
1580 	struct rtw_efuse *efuse = &rtwdev->efuse;
1581 	u16 mcs_map;
1582 	__le16 highest;
1583 
1584 	if (efuse->hw_cap.ptcl != EFUSE_HW_CAP_IGNORE &&
1585 	    efuse->hw_cap.ptcl != EFUSE_HW_CAP_PTCL_VHT)
1586 		return;
1587 
1588 	vht_cap->vht_supported = true;
1589 	vht_cap->cap = IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454 |
1590 		       IEEE80211_VHT_CAP_SHORT_GI_80 |
1591 		       IEEE80211_VHT_CAP_RXSTBC_1 |
1592 		       IEEE80211_VHT_CAP_HTC_VHT |
1593 		       IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK |
1594 		       0;
1595 	if (rtwdev->hal.rf_path_num > 1)
1596 		vht_cap->cap |= IEEE80211_VHT_CAP_TXSTBC;
1597 	vht_cap->cap |= IEEE80211_VHT_CAP_MU_BEAMFORMEE_CAPABLE |
1598 			IEEE80211_VHT_CAP_SU_BEAMFORMEE_CAPABLE;
1599 	vht_cap->cap |= (rtwdev->hal.bfee_sts_cap <<
1600 			IEEE80211_VHT_CAP_BEAMFORMEE_STS_SHIFT);
1601 
1602 	if (rtw_chip_has_rx_ldpc(rtwdev))
1603 		vht_cap->cap |= IEEE80211_VHT_CAP_RXLDPC;
1604 
1605 	mcs_map = IEEE80211_VHT_MCS_SUPPORT_0_9 << 0 |
1606 		  IEEE80211_VHT_MCS_NOT_SUPPORTED << 4 |
1607 		  IEEE80211_VHT_MCS_NOT_SUPPORTED << 6 |
1608 		  IEEE80211_VHT_MCS_NOT_SUPPORTED << 8 |
1609 		  IEEE80211_VHT_MCS_NOT_SUPPORTED << 10 |
1610 		  IEEE80211_VHT_MCS_NOT_SUPPORTED << 12 |
1611 		  IEEE80211_VHT_MCS_NOT_SUPPORTED << 14;
1612 	if (efuse->hw_cap.nss > 1) {
1613 		highest = cpu_to_le16(780);
1614 		mcs_map |= IEEE80211_VHT_MCS_SUPPORT_0_9 << 2;
1615 	} else {
1616 		highest = cpu_to_le16(390);
1617 		mcs_map |= IEEE80211_VHT_MCS_NOT_SUPPORTED << 2;
1618 	}
1619 
1620 	vht_cap->vht_mcs.rx_mcs_map = cpu_to_le16(mcs_map);
1621 	vht_cap->vht_mcs.tx_mcs_map = cpu_to_le16(mcs_map);
1622 	vht_cap->vht_mcs.rx_highest = highest;
1623 	vht_cap->vht_mcs.tx_highest = highest;
1624 }
1625 
1626 static u16 rtw_get_max_scan_ie_len(struct rtw_dev *rtwdev)
1627 {
1628 	u16 len;
1629 
1630 	len = rtwdev->chip->max_scan_ie_len;
1631 
1632 	if (!rtw_fw_feature_check(&rtwdev->fw, FW_FEATURE_SCAN_OFFLOAD) &&
1633 	    rtwdev->chip->id == RTW_CHIP_TYPE_8822C)
1634 		len = IEEE80211_MAX_DATA_LEN;
1635 	else if (rtw_fw_feature_ext_check(&rtwdev->fw, FW_FEATURE_EXT_OLD_PAGE_NUM))
1636 		len -= RTW_OLD_PROBE_PG_CNT * TX_PAGE_SIZE;
1637 
1638 	return len;
1639 }
1640 
1641 static void rtw_set_supported_band(struct ieee80211_hw *hw,
1642 				   const struct rtw_chip_info *chip)
1643 {
1644 	struct rtw_dev *rtwdev = hw->priv;
1645 	struct ieee80211_supported_band *sband;
1646 
1647 	if (chip->band & RTW_BAND_2G) {
1648 		sband = kmemdup(&rtw_band_2ghz, sizeof(*sband), GFP_KERNEL);
1649 		if (!sband)
1650 			goto err_out;
1651 		if (chip->ht_supported)
1652 			rtw_init_ht_cap(rtwdev, &sband->ht_cap);
1653 		hw->wiphy->bands[NL80211_BAND_2GHZ] = sband;
1654 	}
1655 
1656 	if (chip->band & RTW_BAND_5G) {
1657 		sband = kmemdup(&rtw_band_5ghz, sizeof(*sband), GFP_KERNEL);
1658 		if (!sband)
1659 			goto err_out;
1660 		if (chip->ht_supported)
1661 			rtw_init_ht_cap(rtwdev, &sband->ht_cap);
1662 		if (chip->vht_supported)
1663 			rtw_init_vht_cap(rtwdev, &sband->vht_cap);
1664 		hw->wiphy->bands[NL80211_BAND_5GHZ] = sband;
1665 	}
1666 
1667 	return;
1668 
1669 err_out:
1670 	rtw_err(rtwdev, "failed to set supported band\n");
1671 }
1672 
1673 static void rtw_unset_supported_band(struct ieee80211_hw *hw,
1674 				     const struct rtw_chip_info *chip)
1675 {
1676 	kfree(hw->wiphy->bands[NL80211_BAND_2GHZ]);
1677 	kfree(hw->wiphy->bands[NL80211_BAND_5GHZ]);
1678 }
1679 
1680 static void rtw_vif_smps_iter(void *data, u8 *mac,
1681 			      struct ieee80211_vif *vif)
1682 {
1683 	struct rtw_dev *rtwdev = (struct rtw_dev *)data;
1684 
1685 	if (vif->type != NL80211_IFTYPE_STATION || !vif->cfg.assoc)
1686 		return;
1687 
1688 	if (rtwdev->hal.txrx_1ss)
1689 		ieee80211_request_smps(vif, 0, IEEE80211_SMPS_STATIC);
1690 	else
1691 		ieee80211_request_smps(vif, 0, IEEE80211_SMPS_OFF);
1692 }
1693 
1694 void rtw_set_txrx_1ss(struct rtw_dev *rtwdev, bool txrx_1ss)
1695 {
1696 	const struct rtw_chip_info *chip = rtwdev->chip;
1697 	struct rtw_hal *hal = &rtwdev->hal;
1698 
1699 	if (!chip->ops->config_txrx_mode || rtwdev->hal.txrx_1ss == txrx_1ss)
1700 		return;
1701 
1702 	rtwdev->hal.txrx_1ss = txrx_1ss;
1703 	if (txrx_1ss)
1704 		chip->ops->config_txrx_mode(rtwdev, BB_PATH_A, BB_PATH_A, false);
1705 	else
1706 		chip->ops->config_txrx_mode(rtwdev, hal->antenna_tx,
1707 					    hal->antenna_rx, false);
1708 	rtw_iterate_vifs_atomic(rtwdev, rtw_vif_smps_iter, rtwdev);
1709 }
1710 
1711 static void __update_firmware_feature(struct rtw_dev *rtwdev,
1712 				      struct rtw_fw_state *fw)
1713 {
1714 	u32 feature;
1715 	const struct rtw_fw_hdr *fw_hdr =
1716 				(const struct rtw_fw_hdr *)fw->firmware->data;
1717 
1718 	feature = le32_to_cpu(fw_hdr->feature);
1719 	fw->feature = feature & FW_FEATURE_SIG ? feature : 0;
1720 
1721 	if (rtwdev->chip->id == RTW_CHIP_TYPE_8822C &&
1722 	    RTW_FW_SUIT_VER_CODE(rtwdev->fw) < RTW_FW_VER_CODE(9, 9, 13))
1723 		fw->feature_ext |= FW_FEATURE_EXT_OLD_PAGE_NUM;
1724 }
1725 
1726 static void __update_firmware_info(struct rtw_dev *rtwdev,
1727 				   struct rtw_fw_state *fw)
1728 {
1729 	const struct rtw_fw_hdr *fw_hdr =
1730 				(const struct rtw_fw_hdr *)fw->firmware->data;
1731 
1732 	fw->h2c_version = le16_to_cpu(fw_hdr->h2c_fmt_ver);
1733 	fw->version = le16_to_cpu(fw_hdr->version);
1734 	fw->sub_version = fw_hdr->subversion;
1735 	fw->sub_index = fw_hdr->subindex;
1736 
1737 	__update_firmware_feature(rtwdev, fw);
1738 }
1739 
1740 static void __update_firmware_info_legacy(struct rtw_dev *rtwdev,
1741 					  struct rtw_fw_state *fw)
1742 {
1743 	struct rtw_fw_hdr_legacy *legacy =
1744 				(struct rtw_fw_hdr_legacy *)fw->firmware->data;
1745 
1746 	fw->h2c_version = 0;
1747 	fw->version = le16_to_cpu(legacy->version);
1748 	fw->sub_version = legacy->subversion1;
1749 	fw->sub_index = legacy->subversion2;
1750 }
1751 
1752 static void update_firmware_info(struct rtw_dev *rtwdev,
1753 				 struct rtw_fw_state *fw)
1754 {
1755 	if (rtw_chip_wcpu_11n(rtwdev))
1756 		__update_firmware_info_legacy(rtwdev, fw);
1757 	else
1758 		__update_firmware_info(rtwdev, fw);
1759 }
1760 
1761 static void rtw_load_firmware_cb(const struct firmware *firmware, void *context)
1762 {
1763 	struct rtw_fw_state *fw = context;
1764 	struct rtw_dev *rtwdev = fw->rtwdev;
1765 
1766 	if (!firmware || !firmware->data) {
1767 		rtw_err(rtwdev, "failed to request firmware\n");
1768 		complete_all(&fw->completion);
1769 		return;
1770 	}
1771 
1772 	fw->firmware = firmware;
1773 	update_firmware_info(rtwdev, fw);
1774 	complete_all(&fw->completion);
1775 
1776 	rtw_info(rtwdev, "%sFirmware version %u.%u.%u, H2C version %u\n",
1777 		 fw->type == RTW_WOWLAN_FW ? "WOW " : "",
1778 		 fw->version, fw->sub_version, fw->sub_index, fw->h2c_version);
1779 }
1780 
1781 static int rtw_load_firmware(struct rtw_dev *rtwdev, enum rtw_fw_type type)
1782 {
1783 	const char *fw_name;
1784 	struct rtw_fw_state *fw;
1785 	int ret;
1786 
1787 	switch (type) {
1788 	case RTW_WOWLAN_FW:
1789 		fw = &rtwdev->wow_fw;
1790 		fw_name = rtwdev->chip->wow_fw_name;
1791 		break;
1792 
1793 	case RTW_NORMAL_FW:
1794 		fw = &rtwdev->fw;
1795 		fw_name = rtwdev->chip->fw_name;
1796 		break;
1797 
1798 	default:
1799 		rtw_warn(rtwdev, "unsupported firmware type\n");
1800 		return -ENOENT;
1801 	}
1802 
1803 	fw->type = type;
1804 	fw->rtwdev = rtwdev;
1805 	init_completion(&fw->completion);
1806 
1807 	ret = request_firmware_nowait(THIS_MODULE, true, fw_name, rtwdev->dev,
1808 				      GFP_KERNEL, fw, rtw_load_firmware_cb);
1809 	if (ret) {
1810 		rtw_err(rtwdev, "failed to async firmware request\n");
1811 		return ret;
1812 	}
1813 
1814 	return 0;
1815 }
1816 
1817 static int rtw_chip_parameter_setup(struct rtw_dev *rtwdev)
1818 {
1819 	const struct rtw_chip_info *chip = rtwdev->chip;
1820 	struct rtw_hal *hal = &rtwdev->hal;
1821 	struct rtw_efuse *efuse = &rtwdev->efuse;
1822 
1823 	switch (rtw_hci_type(rtwdev)) {
1824 	case RTW_HCI_TYPE_PCIE:
1825 		rtwdev->hci.rpwm_addr = 0x03d9;
1826 		rtwdev->hci.cpwm_addr = 0x03da;
1827 		break;
1828 	case RTW_HCI_TYPE_SDIO:
1829 		rtwdev->hci.rpwm_addr = REG_SDIO_HRPWM1;
1830 		rtwdev->hci.cpwm_addr = REG_SDIO_HCPWM1_V2;
1831 		break;
1832 	case RTW_HCI_TYPE_USB:
1833 		rtwdev->hci.rpwm_addr = 0xfe58;
1834 		rtwdev->hci.cpwm_addr = 0xfe57;
1835 		break;
1836 	default:
1837 		rtw_err(rtwdev, "unsupported hci type\n");
1838 		return -EINVAL;
1839 	}
1840 
1841 	hal->chip_version = rtw_read32(rtwdev, REG_SYS_CFG1);
1842 	hal->cut_version = BIT_GET_CHIP_VER(hal->chip_version);
1843 	hal->mp_chip = (hal->chip_version & BIT_RTL_ID) ? 0 : 1;
1844 	if (hal->chip_version & BIT_RF_TYPE_ID) {
1845 		hal->rf_type = RF_2T2R;
1846 		hal->rf_path_num = 2;
1847 		hal->antenna_tx = BB_PATH_AB;
1848 		hal->antenna_rx = BB_PATH_AB;
1849 	} else {
1850 		hal->rf_type = RF_1T1R;
1851 		hal->rf_path_num = 1;
1852 		hal->antenna_tx = BB_PATH_A;
1853 		hal->antenna_rx = BB_PATH_A;
1854 	}
1855 	hal->rf_phy_num = chip->fix_rf_phy_num ? chip->fix_rf_phy_num :
1856 			  hal->rf_path_num;
1857 
1858 	efuse->physical_size = chip->phy_efuse_size;
1859 	efuse->logical_size = chip->log_efuse_size;
1860 	efuse->protect_size = chip->ptct_efuse_size;
1861 
1862 	/* default use ack */
1863 	rtwdev->hal.rcr |= BIT_VHT_DACK;
1864 
1865 	hal->bfee_sts_cap = 3;
1866 
1867 	return 0;
1868 }
1869 
1870 static int rtw_chip_efuse_enable(struct rtw_dev *rtwdev)
1871 {
1872 	struct rtw_fw_state *fw = &rtwdev->fw;
1873 	int ret;
1874 
1875 	ret = rtw_hci_setup(rtwdev);
1876 	if (ret) {
1877 		rtw_err(rtwdev, "failed to setup hci\n");
1878 		goto err;
1879 	}
1880 
1881 	ret = rtw_mac_power_on(rtwdev);
1882 	if (ret) {
1883 		rtw_err(rtwdev, "failed to power on mac\n");
1884 		goto err;
1885 	}
1886 
1887 	rtw_write8(rtwdev, REG_C2HEVT, C2H_HW_FEATURE_DUMP);
1888 
1889 	wait_for_completion(&fw->completion);
1890 	if (!fw->firmware) {
1891 		ret = -EINVAL;
1892 		rtw_err(rtwdev, "failed to load firmware\n");
1893 		goto err;
1894 	}
1895 
1896 	ret = rtw_download_firmware(rtwdev, fw);
1897 	if (ret) {
1898 		rtw_err(rtwdev, "failed to download firmware\n");
1899 		goto err_off;
1900 	}
1901 
1902 	return 0;
1903 
1904 err_off:
1905 	rtw_mac_power_off(rtwdev);
1906 
1907 err:
1908 	return ret;
1909 }
1910 
1911 static int rtw_dump_hw_feature(struct rtw_dev *rtwdev)
1912 {
1913 	struct rtw_efuse *efuse = &rtwdev->efuse;
1914 	u8 hw_feature[HW_FEATURE_LEN];
1915 	u8 id;
1916 	u8 bw;
1917 	int i;
1918 
1919 	id = rtw_read8(rtwdev, REG_C2HEVT);
1920 	if (id != C2H_HW_FEATURE_REPORT) {
1921 		rtw_err(rtwdev, "failed to read hw feature report\n");
1922 		return -EBUSY;
1923 	}
1924 
1925 	for (i = 0; i < HW_FEATURE_LEN; i++)
1926 		hw_feature[i] = rtw_read8(rtwdev, REG_C2HEVT + 2 + i);
1927 
1928 	rtw_write8(rtwdev, REG_C2HEVT, 0);
1929 
1930 	bw = GET_EFUSE_HW_CAP_BW(hw_feature);
1931 	efuse->hw_cap.bw = hw_bw_cap_to_bitamp(bw);
1932 	efuse->hw_cap.hci = GET_EFUSE_HW_CAP_HCI(hw_feature);
1933 	efuse->hw_cap.nss = GET_EFUSE_HW_CAP_NSS(hw_feature);
1934 	efuse->hw_cap.ptcl = GET_EFUSE_HW_CAP_PTCL(hw_feature);
1935 	efuse->hw_cap.ant_num = GET_EFUSE_HW_CAP_ANT_NUM(hw_feature);
1936 
1937 	rtw_hw_config_rf_ant_num(rtwdev, efuse->hw_cap.ant_num);
1938 
1939 	if (efuse->hw_cap.nss == EFUSE_HW_CAP_IGNORE ||
1940 	    efuse->hw_cap.nss > rtwdev->hal.rf_path_num)
1941 		efuse->hw_cap.nss = rtwdev->hal.rf_path_num;
1942 
1943 	rtw_dbg(rtwdev, RTW_DBG_EFUSE,
1944 		"hw cap: hci=0x%02x, bw=0x%02x, ptcl=0x%02x, ant_num=%d, nss=%d\n",
1945 		efuse->hw_cap.hci, efuse->hw_cap.bw, efuse->hw_cap.ptcl,
1946 		efuse->hw_cap.ant_num, efuse->hw_cap.nss);
1947 
1948 	return 0;
1949 }
1950 
1951 static void rtw_chip_efuse_disable(struct rtw_dev *rtwdev)
1952 {
1953 	rtw_hci_stop(rtwdev);
1954 	rtw_mac_power_off(rtwdev);
1955 }
1956 
1957 static int rtw_chip_efuse_info_setup(struct rtw_dev *rtwdev)
1958 {
1959 	struct rtw_efuse *efuse = &rtwdev->efuse;
1960 	int ret;
1961 
1962 	mutex_lock(&rtwdev->mutex);
1963 
1964 	/* power on mac to read efuse */
1965 	ret = rtw_chip_efuse_enable(rtwdev);
1966 	if (ret)
1967 		goto out_unlock;
1968 
1969 	ret = rtw_parse_efuse_map(rtwdev);
1970 	if (ret)
1971 		goto out_disable;
1972 
1973 	ret = rtw_dump_hw_feature(rtwdev);
1974 	if (ret)
1975 		goto out_disable;
1976 
1977 	ret = rtw_check_supported_rfe(rtwdev);
1978 	if (ret)
1979 		goto out_disable;
1980 
1981 	if (efuse->crystal_cap == 0xff)
1982 		efuse->crystal_cap = 0;
1983 	if (efuse->pa_type_2g == 0xff)
1984 		efuse->pa_type_2g = 0;
1985 	if (efuse->pa_type_5g == 0xff)
1986 		efuse->pa_type_5g = 0;
1987 	if (efuse->lna_type_2g == 0xff)
1988 		efuse->lna_type_2g = 0;
1989 	if (efuse->lna_type_5g == 0xff)
1990 		efuse->lna_type_5g = 0;
1991 	if (efuse->channel_plan == 0xff)
1992 		efuse->channel_plan = 0x7f;
1993 	if (efuse->rf_board_option == 0xff)
1994 		efuse->rf_board_option = 0;
1995 	if (efuse->bt_setting & BIT(0))
1996 		efuse->share_ant = true;
1997 	if (efuse->regd == 0xff)
1998 		efuse->regd = 0;
1999 	if (efuse->tx_bb_swing_setting_2g == 0xff)
2000 		efuse->tx_bb_swing_setting_2g = 0;
2001 	if (efuse->tx_bb_swing_setting_5g == 0xff)
2002 		efuse->tx_bb_swing_setting_5g = 0;
2003 
2004 	efuse->btcoex = (efuse->rf_board_option & 0xe0) == 0x20;
2005 	efuse->ext_pa_2g = efuse->pa_type_2g & BIT(4) ? 1 : 0;
2006 	efuse->ext_lna_2g = efuse->lna_type_2g & BIT(3) ? 1 : 0;
2007 	efuse->ext_pa_5g = efuse->pa_type_5g & BIT(0) ? 1 : 0;
2008 	efuse->ext_lna_2g = efuse->lna_type_5g & BIT(3) ? 1 : 0;
2009 
2010 out_disable:
2011 	rtw_chip_efuse_disable(rtwdev);
2012 
2013 out_unlock:
2014 	mutex_unlock(&rtwdev->mutex);
2015 	return ret;
2016 }
2017 
2018 static int rtw_chip_board_info_setup(struct rtw_dev *rtwdev)
2019 {
2020 	struct rtw_hal *hal = &rtwdev->hal;
2021 	const struct rtw_rfe_def *rfe_def = rtw_get_rfe_def(rtwdev);
2022 
2023 	if (!rfe_def)
2024 		return -ENODEV;
2025 
2026 	rtw_phy_setup_phy_cond(rtwdev, hal->pkg_type);
2027 
2028 	rtw_phy_init_tx_power(rtwdev);
2029 	if (rfe_def->agc_btg_tbl)
2030 		rtw_load_table(rtwdev, rfe_def->agc_btg_tbl);
2031 	rtw_load_table(rtwdev, rfe_def->phy_pg_tbl);
2032 	rtw_load_table(rtwdev, rfe_def->txpwr_lmt_tbl);
2033 	rtw_phy_tx_power_by_rate_config(hal);
2034 	rtw_phy_tx_power_limit_config(hal);
2035 
2036 	return 0;
2037 }
2038 
2039 int rtw_chip_info_setup(struct rtw_dev *rtwdev)
2040 {
2041 	int ret;
2042 
2043 	ret = rtw_chip_parameter_setup(rtwdev);
2044 	if (ret) {
2045 		rtw_err(rtwdev, "failed to setup chip parameters\n");
2046 		goto err_out;
2047 	}
2048 
2049 	ret = rtw_chip_efuse_info_setup(rtwdev);
2050 	if (ret) {
2051 		rtw_err(rtwdev, "failed to setup chip efuse info\n");
2052 		goto err_out;
2053 	}
2054 
2055 	ret = rtw_chip_board_info_setup(rtwdev);
2056 	if (ret) {
2057 		rtw_err(rtwdev, "failed to setup chip board info\n");
2058 		goto err_out;
2059 	}
2060 
2061 	return 0;
2062 
2063 err_out:
2064 	return ret;
2065 }
2066 EXPORT_SYMBOL(rtw_chip_info_setup);
2067 
2068 static void rtw_stats_init(struct rtw_dev *rtwdev)
2069 {
2070 	struct rtw_traffic_stats *stats = &rtwdev->stats;
2071 	struct rtw_dm_info *dm_info = &rtwdev->dm_info;
2072 	int i;
2073 
2074 	ewma_tp_init(&stats->tx_ewma_tp);
2075 	ewma_tp_init(&stats->rx_ewma_tp);
2076 
2077 	for (i = 0; i < RTW_EVM_NUM; i++)
2078 		ewma_evm_init(&dm_info->ewma_evm[i]);
2079 	for (i = 0; i < RTW_SNR_NUM; i++)
2080 		ewma_snr_init(&dm_info->ewma_snr[i]);
2081 }
2082 
2083 int rtw_core_init(struct rtw_dev *rtwdev)
2084 {
2085 	const struct rtw_chip_info *chip = rtwdev->chip;
2086 	struct rtw_coex *coex = &rtwdev->coex;
2087 	int ret;
2088 
2089 	INIT_LIST_HEAD(&rtwdev->rsvd_page_list);
2090 	INIT_LIST_HEAD(&rtwdev->txqs);
2091 
2092 	timer_setup(&rtwdev->tx_report.purge_timer,
2093 		    rtw_tx_report_purge_timer, 0);
2094 	rtwdev->tx_wq = alloc_workqueue("rtw_tx_wq", WQ_UNBOUND | WQ_HIGHPRI, 0);
2095 	if (!rtwdev->tx_wq) {
2096 		rtw_warn(rtwdev, "alloc_workqueue rtw_tx_wq failed\n");
2097 		return -ENOMEM;
2098 	}
2099 
2100 	INIT_DELAYED_WORK(&rtwdev->watch_dog_work, rtw_watch_dog_work);
2101 	INIT_DELAYED_WORK(&coex->bt_relink_work, rtw_coex_bt_relink_work);
2102 	INIT_DELAYED_WORK(&coex->bt_reenable_work, rtw_coex_bt_reenable_work);
2103 	INIT_DELAYED_WORK(&coex->defreeze_work, rtw_coex_defreeze_work);
2104 	INIT_DELAYED_WORK(&coex->wl_remain_work, rtw_coex_wl_remain_work);
2105 	INIT_DELAYED_WORK(&coex->bt_remain_work, rtw_coex_bt_remain_work);
2106 	INIT_DELAYED_WORK(&coex->wl_connecting_work, rtw_coex_wl_connecting_work);
2107 	INIT_DELAYED_WORK(&coex->bt_multi_link_remain_work,
2108 			  rtw_coex_bt_multi_link_remain_work);
2109 	INIT_DELAYED_WORK(&coex->wl_ccklock_work, rtw_coex_wl_ccklock_work);
2110 	INIT_WORK(&rtwdev->tx_work, rtw_tx_work);
2111 	INIT_WORK(&rtwdev->c2h_work, rtw_c2h_work);
2112 	INIT_WORK(&rtwdev->ips_work, rtw_ips_work);
2113 	INIT_WORK(&rtwdev->fw_recovery_work, rtw_fw_recovery_work);
2114 	INIT_WORK(&rtwdev->update_beacon_work, rtw_fw_update_beacon_work);
2115 	INIT_WORK(&rtwdev->ba_work, rtw_txq_ba_work);
2116 	skb_queue_head_init(&rtwdev->c2h_queue);
2117 	skb_queue_head_init(&rtwdev->coex.queue);
2118 	skb_queue_head_init(&rtwdev->tx_report.queue);
2119 
2120 	spin_lock_init(&rtwdev->txq_lock);
2121 	spin_lock_init(&rtwdev->tx_report.q_lock);
2122 
2123 	mutex_init(&rtwdev->mutex);
2124 	mutex_init(&rtwdev->hal.tx_power_mutex);
2125 
2126 	init_waitqueue_head(&rtwdev->coex.wait);
2127 	init_completion(&rtwdev->lps_leave_check);
2128 	init_completion(&rtwdev->fw_scan_density);
2129 
2130 	rtwdev->sec.total_cam_num = 32;
2131 	rtwdev->hal.current_channel = 1;
2132 	rtwdev->dm_info.fix_rate = U8_MAX;
2133 	set_bit(RTW_BC_MC_MACID, rtwdev->mac_id_map);
2134 
2135 	rtw_stats_init(rtwdev);
2136 
2137 	/* default rx filter setting */
2138 	rtwdev->hal.rcr = BIT_APP_FCS | BIT_APP_MIC | BIT_APP_ICV |
2139 			  BIT_PKTCTL_DLEN | BIT_HTC_LOC_CTRL | BIT_APP_PHYSTS |
2140 			  BIT_AB | BIT_AM | BIT_APM;
2141 
2142 	ret = rtw_load_firmware(rtwdev, RTW_NORMAL_FW);
2143 	if (ret) {
2144 		rtw_warn(rtwdev, "no firmware loaded\n");
2145 		goto out;
2146 	}
2147 
2148 	if (chip->wow_fw_name) {
2149 		ret = rtw_load_firmware(rtwdev, RTW_WOWLAN_FW);
2150 		if (ret) {
2151 			rtw_warn(rtwdev, "no wow firmware loaded\n");
2152 			wait_for_completion(&rtwdev->fw.completion);
2153 			if (rtwdev->fw.firmware)
2154 				release_firmware(rtwdev->fw.firmware);
2155 			goto out;
2156 		}
2157 	}
2158 
2159 	return 0;
2160 
2161 out:
2162 	destroy_workqueue(rtwdev->tx_wq);
2163 	return ret;
2164 }
2165 EXPORT_SYMBOL(rtw_core_init);
2166 
2167 void rtw_core_deinit(struct rtw_dev *rtwdev)
2168 {
2169 	struct rtw_fw_state *fw = &rtwdev->fw;
2170 	struct rtw_fw_state *wow_fw = &rtwdev->wow_fw;
2171 	struct rtw_rsvd_page *rsvd_pkt, *tmp;
2172 	unsigned long flags;
2173 
2174 	rtw_wait_firmware_completion(rtwdev);
2175 
2176 	if (fw->firmware)
2177 		release_firmware(fw->firmware);
2178 
2179 	if (wow_fw->firmware)
2180 		release_firmware(wow_fw->firmware);
2181 
2182 	destroy_workqueue(rtwdev->tx_wq);
2183 	spin_lock_irqsave(&rtwdev->tx_report.q_lock, flags);
2184 	skb_queue_purge(&rtwdev->tx_report.queue);
2185 	skb_queue_purge(&rtwdev->coex.queue);
2186 	spin_unlock_irqrestore(&rtwdev->tx_report.q_lock, flags);
2187 
2188 	list_for_each_entry_safe(rsvd_pkt, tmp, &rtwdev->rsvd_page_list,
2189 				 build_list) {
2190 		list_del(&rsvd_pkt->build_list);
2191 		kfree(rsvd_pkt);
2192 	}
2193 
2194 	mutex_destroy(&rtwdev->mutex);
2195 	mutex_destroy(&rtwdev->hal.tx_power_mutex);
2196 }
2197 EXPORT_SYMBOL(rtw_core_deinit);
2198 
2199 int rtw_register_hw(struct rtw_dev *rtwdev, struct ieee80211_hw *hw)
2200 {
2201 	struct rtw_hal *hal = &rtwdev->hal;
2202 	int max_tx_headroom = 0;
2203 	int ret;
2204 
2205 	max_tx_headroom = rtwdev->chip->tx_pkt_desc_sz;
2206 
2207 	if (rtw_hci_type(rtwdev) == RTW_HCI_TYPE_SDIO)
2208 		max_tx_headroom += RTW_SDIO_DATA_PTR_ALIGN;
2209 
2210 	hw->extra_tx_headroom = max_tx_headroom;
2211 	hw->queues = IEEE80211_NUM_ACS;
2212 	hw->txq_data_size = sizeof(struct rtw_txq);
2213 	hw->sta_data_size = sizeof(struct rtw_sta_info);
2214 	hw->vif_data_size = sizeof(struct rtw_vif);
2215 
2216 	ieee80211_hw_set(hw, SIGNAL_DBM);
2217 	ieee80211_hw_set(hw, RX_INCLUDES_FCS);
2218 	ieee80211_hw_set(hw, AMPDU_AGGREGATION);
2219 	ieee80211_hw_set(hw, MFP_CAPABLE);
2220 	ieee80211_hw_set(hw, REPORTS_TX_ACK_STATUS);
2221 	ieee80211_hw_set(hw, SUPPORTS_PS);
2222 	ieee80211_hw_set(hw, SUPPORTS_DYNAMIC_PS);
2223 	ieee80211_hw_set(hw, SUPPORT_FAST_XMIT);
2224 	ieee80211_hw_set(hw, SUPPORTS_AMSDU_IN_AMPDU);
2225 	ieee80211_hw_set(hw, HAS_RATE_CONTROL);
2226 	ieee80211_hw_set(hw, TX_AMSDU);
2227 	ieee80211_hw_set(hw, SINGLE_SCAN_ON_ALL_BANDS);
2228 
2229 	hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION) |
2230 				     BIT(NL80211_IFTYPE_AP) |
2231 				     BIT(NL80211_IFTYPE_ADHOC) |
2232 				     BIT(NL80211_IFTYPE_MESH_POINT);
2233 	hw->wiphy->available_antennas_tx = hal->antenna_tx;
2234 	hw->wiphy->available_antennas_rx = hal->antenna_rx;
2235 
2236 	hw->wiphy->flags |= WIPHY_FLAG_SUPPORTS_TDLS |
2237 			    WIPHY_FLAG_TDLS_EXTERNAL_SETUP;
2238 
2239 	hw->wiphy->features |= NL80211_FEATURE_SCAN_RANDOM_MAC_ADDR;
2240 	hw->wiphy->max_scan_ssids = RTW_SCAN_MAX_SSIDS;
2241 	hw->wiphy->max_scan_ie_len = rtw_get_max_scan_ie_len(rtwdev);
2242 
2243 	if (rtwdev->chip->id == RTW_CHIP_TYPE_8822C) {
2244 		hw->wiphy->iface_combinations = rtw_iface_combs;
2245 		hw->wiphy->n_iface_combinations = ARRAY_SIZE(rtw_iface_combs);
2246 	}
2247 
2248 	wiphy_ext_feature_set(hw->wiphy, NL80211_EXT_FEATURE_CAN_REPLACE_PTK0);
2249 	wiphy_ext_feature_set(hw->wiphy, NL80211_EXT_FEATURE_SCAN_RANDOM_SN);
2250 	wiphy_ext_feature_set(hw->wiphy, NL80211_EXT_FEATURE_SET_SCAN_DWELL);
2251 
2252 #ifdef CONFIG_PM
2253 	hw->wiphy->wowlan = rtwdev->chip->wowlan_stub;
2254 	hw->wiphy->max_sched_scan_ssids = rtwdev->chip->max_sched_scan_ssids;
2255 #endif
2256 	rtw_set_supported_band(hw, rtwdev->chip);
2257 	SET_IEEE80211_PERM_ADDR(hw, rtwdev->efuse.addr);
2258 
2259 	hw->wiphy->sar_capa = &rtw_sar_capa;
2260 
2261 	ret = rtw_regd_init(rtwdev);
2262 	if (ret) {
2263 		rtw_err(rtwdev, "failed to init regd\n");
2264 		return ret;
2265 	}
2266 
2267 	ret = ieee80211_register_hw(hw);
2268 	if (ret) {
2269 		rtw_err(rtwdev, "failed to register hw\n");
2270 		return ret;
2271 	}
2272 
2273 	ret = rtw_regd_hint(rtwdev);
2274 	if (ret) {
2275 		rtw_err(rtwdev, "failed to hint regd\n");
2276 		return ret;
2277 	}
2278 
2279 	rtw_debugfs_init(rtwdev);
2280 
2281 	rtwdev->bf_info.bfer_mu_cnt = 0;
2282 	rtwdev->bf_info.bfer_su_cnt = 0;
2283 
2284 	return 0;
2285 }
2286 EXPORT_SYMBOL(rtw_register_hw);
2287 
2288 void rtw_unregister_hw(struct rtw_dev *rtwdev, struct ieee80211_hw *hw)
2289 {
2290 	const struct rtw_chip_info *chip = rtwdev->chip;
2291 
2292 	ieee80211_unregister_hw(hw);
2293 	rtw_unset_supported_band(hw, chip);
2294 }
2295 EXPORT_SYMBOL(rtw_unregister_hw);
2296 
2297 static
2298 void rtw_swap_reg_nbytes(struct rtw_dev *rtwdev, const struct rtw_hw_reg *reg1,
2299 			 const struct rtw_hw_reg *reg2, u8 nbytes)
2300 {
2301 	u8 i;
2302 
2303 	for (i = 0; i < nbytes; i++) {
2304 		u8 v1 = rtw_read8(rtwdev, reg1->addr + i);
2305 		u8 v2 = rtw_read8(rtwdev, reg2->addr + i);
2306 
2307 		rtw_write8(rtwdev, reg1->addr + i, v2);
2308 		rtw_write8(rtwdev, reg2->addr + i, v1);
2309 	}
2310 }
2311 
2312 static
2313 void rtw_swap_reg_mask(struct rtw_dev *rtwdev, const struct rtw_hw_reg *reg1,
2314 		       const struct rtw_hw_reg *reg2)
2315 {
2316 	u32 v1, v2;
2317 
2318 	v1 = rtw_read32_mask(rtwdev, reg1->addr, reg1->mask);
2319 	v2 = rtw_read32_mask(rtwdev, reg2->addr, reg2->mask);
2320 	rtw_write32_mask(rtwdev, reg2->addr, reg2->mask, v1);
2321 	rtw_write32_mask(rtwdev, reg1->addr, reg1->mask, v2);
2322 }
2323 
2324 struct rtw_iter_port_switch_data {
2325 	struct rtw_dev *rtwdev;
2326 	struct rtw_vif *rtwvif_ap;
2327 };
2328 
2329 static void rtw_port_switch_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
2330 {
2331 	struct rtw_iter_port_switch_data *iter_data = data;
2332 	struct rtw_dev *rtwdev = iter_data->rtwdev;
2333 	struct rtw_vif *rtwvif_target = (struct rtw_vif *)vif->drv_priv;
2334 	struct rtw_vif *rtwvif_ap = iter_data->rtwvif_ap;
2335 	const struct rtw_hw_reg *reg1, *reg2;
2336 
2337 	if (rtwvif_target->port != RTW_PORT_0)
2338 		return;
2339 
2340 	rtw_dbg(rtwdev, RTW_DBG_STATE, "AP port switch from %d -> %d\n",
2341 		rtwvif_ap->port, rtwvif_target->port);
2342 
2343 	reg1 = &rtwvif_ap->conf->net_type;
2344 	reg2 = &rtwvif_target->conf->net_type;
2345 	rtw_swap_reg_mask(rtwdev, reg1, reg2);
2346 
2347 	reg1 = &rtwvif_ap->conf->mac_addr;
2348 	reg2 = &rtwvif_target->conf->mac_addr;
2349 	rtw_swap_reg_nbytes(rtwdev, reg1, reg2, ETH_ALEN);
2350 
2351 	reg1 = &rtwvif_ap->conf->bssid;
2352 	reg2 = &rtwvif_target->conf->bssid;
2353 	rtw_swap_reg_nbytes(rtwdev, reg1, reg2, ETH_ALEN);
2354 
2355 	reg1 = &rtwvif_ap->conf->bcn_ctrl;
2356 	reg2 = &rtwvif_target->conf->bcn_ctrl;
2357 	rtw_swap_reg_nbytes(rtwdev, reg1, reg2, 1);
2358 
2359 	swap(rtwvif_target->port, rtwvif_ap->port);
2360 	swap(rtwvif_target->conf, rtwvif_ap->conf);
2361 }
2362 
2363 void rtw_core_port_switch(struct rtw_dev *rtwdev, struct ieee80211_vif *vif)
2364 {
2365 	struct rtw_vif *rtwvif = (struct rtw_vif *)vif->drv_priv;
2366 	struct rtw_iter_port_switch_data iter_data;
2367 
2368 	if (vif->type != NL80211_IFTYPE_AP || rtwvif->port == RTW_PORT_0)
2369 		return;
2370 
2371 	iter_data.rtwdev = rtwdev;
2372 	iter_data.rtwvif_ap = rtwvif;
2373 	rtw_iterate_vifs(rtwdev, rtw_port_switch_iter, &iter_data);
2374 }
2375 
2376 static void rtw_check_sta_active_iter(void *data, u8 *mac,
2377 				      struct ieee80211_vif *vif)
2378 {
2379 	struct rtw_vif *rtwvif = (struct rtw_vif *)vif->drv_priv;
2380 	bool *active = data;
2381 
2382 	if (*active)
2383 		return;
2384 
2385 	if (vif->type != NL80211_IFTYPE_STATION)
2386 		return;
2387 
2388 	if (vif->cfg.assoc || !is_zero_ether_addr(rtwvif->bssid))
2389 		*active = true;
2390 }
2391 
2392 bool rtw_core_check_sta_active(struct rtw_dev *rtwdev)
2393 {
2394 	bool sta_active = false;
2395 
2396 	rtw_iterate_vifs(rtwdev, rtw_check_sta_active_iter, &sta_active);
2397 
2398 	return rtwdev->ap_active || sta_active;
2399 }
2400 
2401 void rtw_core_enable_beacon(struct rtw_dev *rtwdev, bool enable)
2402 {
2403 	if (!rtwdev->ap_active)
2404 		return;
2405 
2406 	if (enable)
2407 		rtw_write32_set(rtwdev, REG_BCN_CTRL, BIT_EN_BCN_FUNCTION);
2408 	else
2409 		rtw_write32_clr(rtwdev, REG_BCN_CTRL, BIT_EN_BCN_FUNCTION);
2410 }
2411 
2412 MODULE_AUTHOR("Realtek Corporation");
2413 MODULE_DESCRIPTION("Realtek 802.11ac wireless core module");
2414 MODULE_LICENSE("Dual BSD/GPL");
2415