1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ 2 /* Copyright(c) 2018-2019 Realtek Corporation 3 */ 4 5 #ifndef __RTW_FW_H_ 6 #define __RTW_FW_H_ 7 8 #define H2C_PKT_SIZE 32 9 #define H2C_PKT_HDR_SIZE 8 10 11 /* FW bin information */ 12 #define FW_HDR_SIZE 64 13 #define FW_HDR_CHKSUM_SIZE 8 14 15 #define FW_NLO_INFO_CHECK_SIZE 4 16 17 #define FIFO_PAGE_SIZE_SHIFT 12 18 #define FIFO_PAGE_SIZE 4096 19 #define FIFO_DUMP_ADDR 0x8000 20 21 #define DLFW_PAGE_SIZE_SHIFT_LEGACY 12 22 #define DLFW_PAGE_SIZE_LEGACY 0x1000 23 #define DLFW_BLK_SIZE_SHIFT_LEGACY 2 24 #define DLFW_BLK_SIZE_LEGACY 4 25 #define FW_START_ADDR_LEGACY 0x1000 26 27 #define BCN_LOSS_CNT 10 28 #define BCN_FILTER_NOTIFY_SIGNAL_CHANGE 0 29 #define BCN_FILTER_CONNECTION_LOSS 1 30 #define BCN_FILTER_CONNECTED 2 31 #define BCN_FILTER_NOTIFY_BEACON_LOSS 3 32 33 #define SCAN_NOTIFY_TIMEOUT msecs_to_jiffies(10) 34 35 enum rtw_c2h_cmd_id { 36 C2H_CCX_TX_RPT = 0x03, 37 C2H_BT_INFO = 0x09, 38 C2H_BT_MP_INFO = 0x0b, 39 C2H_RA_RPT = 0x0c, 40 C2H_HW_FEATURE_REPORT = 0x19, 41 C2H_WLAN_INFO = 0x27, 42 C2H_WLAN_RFON = 0x32, 43 C2H_BCN_FILTER_NOTIFY = 0x36, 44 C2H_ADAPTIVITY = 0x37, 45 C2H_SCAN_RESULT = 0x38, 46 C2H_HW_FEATURE_DUMP = 0xfd, 47 C2H_HALMAC = 0xff, 48 }; 49 50 enum rtw_c2h_cmd_id_ext { 51 C2H_CCX_RPT = 0x0f, 52 }; 53 54 struct rtw_c2h_cmd { 55 u8 id; 56 u8 seq; 57 u8 payload[]; 58 } __packed; 59 60 struct rtw_c2h_adaptivity { 61 u8 density; 62 u8 igi; 63 u8 l2h_th_init; 64 u8 l2h; 65 u8 h2l; 66 u8 option; 67 } __packed; 68 69 enum rtw_rsvd_packet_type { 70 RSVD_BEACON, 71 RSVD_DUMMY, 72 RSVD_PS_POLL, 73 RSVD_PROBE_RESP, 74 RSVD_NULL, 75 RSVD_QOS_NULL, 76 RSVD_LPS_PG_DPK, 77 RSVD_LPS_PG_INFO, 78 RSVD_PROBE_REQ, 79 RSVD_NLO_INFO, 80 RSVD_CH_INFO, 81 }; 82 83 enum rtw_fw_rf_type { 84 FW_RF_1T2R = 0, 85 FW_RF_2T4R = 1, 86 FW_RF_2T2R = 2, 87 FW_RF_2T3R = 3, 88 FW_RF_1T1R = 4, 89 FW_RF_2T2R_GREEN = 5, 90 FW_RF_3T3R = 6, 91 FW_RF_3T4R = 7, 92 FW_RF_4T4R = 8, 93 FW_RF_MAX_TYPE = 0xF, 94 }; 95 96 enum rtw_fw_feature { 97 FW_FEATURE_SIG = BIT(0), 98 FW_FEATURE_LPS_C2H = BIT(1), 99 FW_FEATURE_LCLK = BIT(2), 100 FW_FEATURE_PG = BIT(3), 101 FW_FEATURE_BCN_FILTER = BIT(5), 102 FW_FEATURE_NOTIFY_SCAN = BIT(6), 103 FW_FEATURE_ADAPTIVITY = BIT(7), 104 FW_FEATURE_MAX = BIT(31), 105 }; 106 107 enum rtw_beacon_filter_offload_mode { 108 BCN_FILTER_OFFLOAD_MODE_0 = 0, 109 BCN_FILTER_OFFLOAD_MODE_1, 110 BCN_FILTER_OFFLOAD_MODE_2, 111 BCN_FILTER_OFFLOAD_MODE_3, 112 113 BCN_FILTER_OFFLOAD_MODE_DEFAULT = BCN_FILTER_OFFLOAD_MODE_0, 114 }; 115 116 struct rtw_coex_info_req { 117 u8 seq; 118 u8 op_code; 119 u8 para1; 120 u8 para2; 121 u8 para3; 122 }; 123 124 struct rtw_iqk_para { 125 u8 clear; 126 u8 segment_iqk; 127 }; 128 129 struct rtw_lps_pg_dpk_hdr { 130 u16 dpk_path_ok; 131 u8 dpk_txagc[2]; 132 u16 dpk_gs[2]; 133 u32 coef[2][20]; 134 u8 dpk_ch; 135 } __packed; 136 137 struct rtw_lps_pg_info_hdr { 138 u8 macid; 139 u8 mbssid; 140 u8 pattern_count; 141 u8 mu_tab_group_id; 142 u8 sec_cam_count; 143 u8 tx_bu_page_count; 144 u16 rsvd; 145 u8 sec_cam[MAX_PG_CAM_BACKUP_NUM]; 146 } __packed; 147 148 struct rtw_rsvd_page { 149 /* associated with each vif */ 150 struct list_head vif_list; 151 struct rtw_vif *rtwvif; 152 153 /* associated when build rsvd page */ 154 struct list_head build_list; 155 156 struct sk_buff *skb; 157 enum rtw_rsvd_packet_type type; 158 u8 page; 159 bool add_txdesc; 160 struct cfg80211_ssid *ssid; 161 u16 probe_req_size; 162 }; 163 164 enum rtw_keep_alive_pkt_type { 165 KEEP_ALIVE_NULL_PKT = 0, 166 KEEP_ALIVE_ARP_RSP = 1, 167 }; 168 169 struct rtw_nlo_info_hdr { 170 u8 nlo_count; 171 u8 hidden_ap_count; 172 u8 rsvd1[2]; 173 u8 pattern_check[FW_NLO_INFO_CHECK_SIZE]; 174 u8 rsvd2[8]; 175 u8 ssid_len[16]; 176 u8 chiper[16]; 177 u8 rsvd3[16]; 178 u8 location[8]; 179 } __packed; 180 181 enum rtw_packet_type { 182 RTW_PACKET_PROBE_REQ = 0x00, 183 184 RTW_PACKET_UNDEFINE = 0x7FFFFFFF, 185 }; 186 187 struct rtw_fw_wow_keep_alive_para { 188 bool adopt; 189 u8 pkt_type; 190 u8 period; /* unit: sec */ 191 }; 192 193 struct rtw_fw_wow_disconnect_para { 194 bool adopt; 195 u8 period; /* unit: sec */ 196 u8 retry_count; 197 }; 198 199 struct rtw_ch_switch_option { 200 u8 periodic_option; 201 u32 tsf_high; 202 u32 tsf_low; 203 u8 dest_ch_en; 204 u8 absolute_time_en; 205 u8 dest_ch; 206 u8 normal_period; 207 u8 normal_period_sel; 208 u8 normal_cycle; 209 u8 slow_period; 210 u8 slow_period_sel; 211 u8 nlo_en; 212 }; 213 214 struct rtw_fw_hdr { 215 __le16 signature; 216 u8 category; 217 u8 function; 218 __le16 version; /* 0x04 */ 219 u8 subversion; 220 u8 subindex; 221 __le32 rsvd; /* 0x08 */ 222 __le32 feature; /* 0x0C */ 223 u8 month; /* 0x10 */ 224 u8 day; 225 u8 hour; 226 u8 min; 227 __le16 year; /* 0x14 */ 228 __le16 rsvd3; 229 u8 mem_usage; /* 0x18 */ 230 u8 rsvd4[3]; 231 __le16 h2c_fmt_ver; /* 0x1C */ 232 __le16 rsvd5; 233 __le32 dmem_addr; /* 0x20 */ 234 __le32 dmem_size; 235 __le32 rsvd6; 236 __le32 rsvd7; 237 __le32 imem_size; /* 0x30 */ 238 __le32 emem_size; 239 __le32 emem_addr; 240 __le32 imem_addr; 241 } __packed; 242 243 struct rtw_fw_hdr_legacy { 244 __le16 signature; 245 u8 category; 246 u8 function; 247 __le16 version; /* 0x04 */ 248 u8 subversion1; 249 u8 subversion2; 250 u8 month; /* 0x08 */ 251 u8 day; 252 u8 hour; 253 u8 minute; 254 __le16 size; 255 __le16 rsvd2; 256 __le32 idx; /* 0x10 */ 257 __le32 rsvd3; 258 __le32 rsvd4; /* 0x18 */ 259 __le32 rsvd5; 260 } __packed; 261 262 /* C2H */ 263 #define GET_CCX_REPORT_SEQNUM_V0(c2h_payload) (c2h_payload[6] & 0xfc) 264 #define GET_CCX_REPORT_STATUS_V0(c2h_payload) (c2h_payload[0] & 0xc0) 265 #define GET_CCX_REPORT_SEQNUM_V1(c2h_payload) (c2h_payload[8] & 0xfc) 266 #define GET_CCX_REPORT_STATUS_V1(c2h_payload) (c2h_payload[9] & 0xc0) 267 268 #define GET_RA_REPORT_RATE(c2h_payload) (c2h_payload[0] & 0x7f) 269 #define GET_RA_REPORT_SGI(c2h_payload) ((c2h_payload[0] & 0x80) >> 7) 270 #define GET_RA_REPORT_BW(c2h_payload) (c2h_payload[6]) 271 #define GET_RA_REPORT_MACID(c2h_payload) (c2h_payload[1]) 272 273 #define GET_BCN_FILTER_NOTIFY_TYPE(c2h_payload) (c2h_payload[1] & 0xf) 274 #define GET_BCN_FILTER_NOTIFY_EVENT(c2h_payload) (c2h_payload[1] & 0x10) 275 #define GET_BCN_FILTER_NOTIFY_RSSI(c2h_payload) (c2h_payload[2] - 100) 276 277 /* PKT H2C */ 278 #define H2C_PKT_CMD_ID 0xFF 279 #define H2C_PKT_CATEGORY 0x01 280 281 #define H2C_PKT_GENERAL_INFO 0x0D 282 #define H2C_PKT_PHYDM_INFO 0x11 283 #define H2C_PKT_IQK 0x0E 284 285 #define H2C_PKT_CH_SWITCH 0x02 286 #define H2C_PKT_UPDATE_PKT 0x0C 287 288 #define H2C_PKT_CH_SWITCH_LEN 0x20 289 #define H2C_PKT_UPDATE_PKT_LEN 0x4 290 291 #define SET_PKT_H2C_CATEGORY(h2c_pkt, value) \ 292 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(6, 0)) 293 #define SET_PKT_H2C_CMD_ID(h2c_pkt, value) \ 294 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(15, 8)) 295 #define SET_PKT_H2C_SUB_CMD_ID(h2c_pkt, value) \ 296 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(31, 16)) 297 #define SET_PKT_H2C_TOTAL_LEN(h2c_pkt, value) \ 298 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(15, 0)) 299 300 static inline void rtw_h2c_pkt_set_header(u8 *h2c_pkt, u8 sub_id) 301 { 302 SET_PKT_H2C_CATEGORY(h2c_pkt, H2C_PKT_CATEGORY); 303 SET_PKT_H2C_CMD_ID(h2c_pkt, H2C_PKT_CMD_ID); 304 SET_PKT_H2C_SUB_CMD_ID(h2c_pkt, sub_id); 305 } 306 307 #define FW_OFFLOAD_H2C_SET_SEQ_NUM(h2c_pkt, value) \ 308 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(31, 16)) 309 #define GENERAL_INFO_SET_FW_TX_BOUNDARY(h2c_pkt, value) \ 310 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, GENMASK(23, 16)) 311 312 #define PHYDM_INFO_SET_REF_TYPE(h2c_pkt, value) \ 313 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, GENMASK(7, 0)) 314 #define PHYDM_INFO_SET_RF_TYPE(h2c_pkt, value) \ 315 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, GENMASK(15, 8)) 316 #define PHYDM_INFO_SET_CUT_VER(h2c_pkt, value) \ 317 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, GENMASK(23, 16)) 318 #define PHYDM_INFO_SET_RX_ANT_STATUS(h2c_pkt, value) \ 319 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, GENMASK(27, 24)) 320 #define PHYDM_INFO_SET_TX_ANT_STATUS(h2c_pkt, value) \ 321 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, GENMASK(31, 28)) 322 #define IQK_SET_CLEAR(h2c_pkt, value) \ 323 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, BIT(0)) 324 #define IQK_SET_SEGMENT_IQK(h2c_pkt, value) \ 325 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, BIT(1)) 326 327 #define CHSW_INFO_SET_CH(pkt, value) \ 328 le32p_replace_bits((__le32 *)(pkt) + 0x00, value, GENMASK(7, 0)) 329 #define CHSW_INFO_SET_PRI_CH_IDX(pkt, value) \ 330 le32p_replace_bits((__le32 *)(pkt) + 0x00, value, GENMASK(11, 8)) 331 #define CHSW_INFO_SET_BW(pkt, value) \ 332 le32p_replace_bits((__le32 *)(pkt) + 0x00, value, GENMASK(15, 12)) 333 #define CHSW_INFO_SET_TIMEOUT(pkt, value) \ 334 le32p_replace_bits((__le32 *)(pkt) + 0x00, value, GENMASK(23, 16)) 335 #define CHSW_INFO_SET_ACTION_ID(pkt, value) \ 336 le32p_replace_bits((__le32 *)(pkt) + 0x00, value, GENMASK(30, 24)) 337 338 #define UPDATE_PKT_SET_SIZE(h2c_pkt, value) \ 339 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, GENMASK(15, 0)) 340 #define UPDATE_PKT_SET_PKT_ID(h2c_pkt, value) \ 341 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, GENMASK(23, 16)) 342 #define UPDATE_PKT_SET_LOCATION(h2c_pkt, value) \ 343 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, GENMASK(31, 24)) 344 345 #define CH_SWITCH_SET_START(h2c_pkt, value) \ 346 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, BIT(0)) 347 #define CH_SWITCH_SET_DEST_CH_EN(h2c_pkt, value) \ 348 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, BIT(1)) 349 #define CH_SWITCH_SET_ABSOLUTE_TIME(h2c_pkt, value) \ 350 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, BIT(2)) 351 #define CH_SWITCH_SET_PERIODIC_OPT(h2c_pkt, value) \ 352 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, GENMASK(4, 3)) 353 #define CH_SWITCH_SET_INFO_LOC(h2c_pkt, value) \ 354 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, GENMASK(15, 8)) 355 #define CH_SWITCH_SET_CH_NUM(h2c_pkt, value) \ 356 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, GENMASK(23, 16)) 357 #define CH_SWITCH_SET_PRI_CH_IDX(h2c_pkt, value) \ 358 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, GENMASK(27, 24)) 359 #define CH_SWITCH_SET_DEST_CH(h2c_pkt, value) \ 360 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x03, value, GENMASK(7, 0)) 361 #define CH_SWITCH_SET_NORMAL_PERIOD(h2c_pkt, value) \ 362 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x03, value, GENMASK(13, 8)) 363 #define CH_SWITCH_SET_NORMAL_PERIOD_SEL(h2c_pkt, value) \ 364 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x03, value, GENMASK(15, 14)) 365 #define CH_SWITCH_SET_SLOW_PERIOD(h2c_pkt, value) \ 366 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x03, value, GENMASK(21, 16)) 367 #define CH_SWITCH_SET_SLOW_PERIOD_SEL(h2c_pkt, value) \ 368 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x03, value, GENMASK(23, 22)) 369 #define CH_SWITCH_SET_NORMAL_CYCLE(h2c_pkt, value) \ 370 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x03, value, GENMASK(31, 24)) 371 #define CH_SWITCH_SET_TSF_HIGH(h2c_pkt, value) \ 372 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x04, value, GENMASK(31, 0)) 373 #define CH_SWITCH_SET_TSF_LOW(h2c_pkt, value) \ 374 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x05, value, GENMASK(31, 0)) 375 #define CH_SWITCH_SET_INFO_SIZE(h2c_pkt, value) \ 376 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x06, value, GENMASK(15, 0)) 377 378 /* Command H2C */ 379 #define H2C_CMD_RSVD_PAGE 0x0 380 #define H2C_CMD_MEDIA_STATUS_RPT 0x01 381 #define H2C_CMD_SET_PWR_MODE 0x20 382 #define H2C_CMD_LPS_PG_INFO 0x2b 383 #define H2C_CMD_RA_INFO 0x40 384 #define H2C_CMD_RSSI_MONITOR 0x42 385 #define H2C_CMD_BCN_FILTER_OFFLOAD_P0 0x56 386 #define H2C_CMD_BCN_FILTER_OFFLOAD_P1 0x57 387 #define H2C_CMD_WL_PHY_INFO 0x58 388 #define H2C_CMD_SCAN 0x59 389 #define H2C_CMD_ADAPTIVITY 0x5A 390 391 #define H2C_CMD_COEX_TDMA_TYPE 0x60 392 #define H2C_CMD_QUERY_BT_INFO 0x61 393 #define H2C_CMD_FORCE_BT_TX_POWER 0x62 394 #define H2C_CMD_IGNORE_WLAN_ACTION 0x63 395 #define H2C_CMD_WL_CH_INFO 0x66 396 #define H2C_CMD_QUERY_BT_MP_INFO 0x67 397 #define H2C_CMD_BT_WIFI_CONTROL 0x69 398 #define H2C_CMD_WIFI_CALIBRATION 0x6d 399 400 #define H2C_CMD_KEEP_ALIVE 0x03 401 #define H2C_CMD_DISCONNECT_DECISION 0x04 402 #define H2C_CMD_WOWLAN 0x80 403 #define H2C_CMD_REMOTE_WAKE_CTRL 0x81 404 #define H2C_CMD_AOAC_GLOBAL_INFO 0x82 405 #define H2C_CMD_NLO_INFO 0x8C 406 407 #define SET_H2C_CMD_ID_CLASS(h2c_pkt, value) \ 408 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(7, 0)) 409 410 #define MEDIA_STATUS_RPT_SET_OP_MODE(h2c_pkt, value) \ 411 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(8)) 412 #define MEDIA_STATUS_RPT_SET_MACID(h2c_pkt, value) \ 413 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(23, 16)) 414 415 #define SET_WL_PHY_INFO_TX_TP(h2c_pkt, value) \ 416 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(17, 8)) 417 #define SET_WL_PHY_INFO_RX_TP(h2c_pkt, value) \ 418 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(27, 18)) 419 #define SET_WL_PHY_INFO_TX_RATE_DESC(h2c_pkt, value) \ 420 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(7, 0)) 421 #define SET_WL_PHY_INFO_RX_RATE_DESC(h2c_pkt, value) \ 422 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(15, 8)) 423 #define SET_WL_PHY_INFO_RX_EVM(h2c_pkt, value) \ 424 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(23, 16)) 425 #define SET_BCN_FILTER_OFFLOAD_P1_MACID(h2c_pkt, value) \ 426 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(15, 8)) 427 #define SET_BCN_FILTER_OFFLOAD_P1_ENABLE(h2c_pkt, value) \ 428 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(16)) 429 #define SET_BCN_FILTER_OFFLOAD_P1_HYST(h2c_pkt, value) \ 430 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(20, 17)) 431 #define SET_BCN_FILTER_OFFLOAD_P1_OFFLOAD_MODE(h2c_pkt, value) \ 432 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(23, 21)) 433 #define SET_BCN_FILTER_OFFLOAD_P1_THRESHOLD(h2c_pkt, value) \ 434 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(31, 24)) 435 #define SET_BCN_FILTER_OFFLOAD_P1_BCN_LOSS_CNT(h2c_pkt, value) \ 436 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(3, 0)) 437 #define SET_BCN_FILTER_OFFLOAD_P1_BCN_INTERVAL(h2c_pkt, value) \ 438 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(13, 4)) 439 440 #define SET_SCAN_START(h2c_pkt, value) \ 441 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(8)) 442 443 #define SET_ADAPTIVITY_MODE(h2c_pkt, value) \ 444 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(11, 8)) 445 #define SET_ADAPTIVITY_OPTION(h2c_pkt, value) \ 446 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(15, 12)) 447 #define SET_ADAPTIVITY_IGI(h2c_pkt, value) \ 448 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(23, 16)) 449 #define SET_ADAPTIVITY_L2H(h2c_pkt, value) \ 450 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(31, 24)) 451 #define SET_ADAPTIVITY_DENSITY(h2c_pkt, value) \ 452 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(7, 0)) 453 454 #define SET_PWR_MODE_SET_MODE(h2c_pkt, value) \ 455 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(14, 8)) 456 #define SET_PWR_MODE_SET_RLBM(h2c_pkt, value) \ 457 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(19, 16)) 458 #define SET_PWR_MODE_SET_SMART_PS(h2c_pkt, value) \ 459 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(23, 20)) 460 #define SET_PWR_MODE_SET_AWAKE_INTERVAL(h2c_pkt, value) \ 461 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(31, 24)) 462 #define SET_PWR_MODE_SET_PORT_ID(h2c_pkt, value) \ 463 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(7, 5)) 464 #define SET_PWR_MODE_SET_PWR_STATE(h2c_pkt, value) \ 465 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(15, 8)) 466 #define LPS_PG_INFO_LOC(h2c_pkt, value) \ 467 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(23, 16)) 468 #define LPS_PG_DPK_LOC(h2c_pkt, value) \ 469 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(31, 24)) 470 #define LPS_PG_SEC_CAM_EN(h2c_pkt, value) \ 471 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(8)) 472 #define LPS_PG_PATTERN_CAM_EN(h2c_pkt, value) \ 473 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(10)) 474 #define SET_RSSI_INFO_MACID(h2c_pkt, value) \ 475 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(15, 8)) 476 #define SET_RSSI_INFO_RSSI(h2c_pkt, value) \ 477 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(31, 24)) 478 #define SET_RSSI_INFO_STBC(h2c_pkt, value) \ 479 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, BIT(1)) 480 #define SET_RA_INFO_MACID(h2c_pkt, value) \ 481 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(15, 8)) 482 #define SET_RA_INFO_RATE_ID(h2c_pkt, value) \ 483 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(20, 16)) 484 #define SET_RA_INFO_INIT_RA_LVL(h2c_pkt, value) \ 485 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(22, 21)) 486 #define SET_RA_INFO_SGI_EN(h2c_pkt, value) \ 487 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(23)) 488 #define SET_RA_INFO_BW_MODE(h2c_pkt, value) \ 489 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(25, 24)) 490 #define SET_RA_INFO_LDPC(h2c_pkt, value) \ 491 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(26)) 492 #define SET_RA_INFO_NO_UPDATE(h2c_pkt, value) \ 493 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(27)) 494 #define SET_RA_INFO_VHT_EN(h2c_pkt, value) \ 495 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(29, 28)) 496 #define SET_RA_INFO_DIS_PT(h2c_pkt, value) \ 497 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(30)) 498 #define SET_RA_INFO_RA_MASK0(h2c_pkt, value) \ 499 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(7, 0)) 500 #define SET_RA_INFO_RA_MASK1(h2c_pkt, value) \ 501 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(15, 8)) 502 #define SET_RA_INFO_RA_MASK2(h2c_pkt, value) \ 503 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(23, 16)) 504 #define SET_RA_INFO_RA_MASK3(h2c_pkt, value) \ 505 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(31, 24)) 506 #define SET_QUERY_BT_INFO(h2c_pkt, value) \ 507 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(8)) 508 #define SET_WL_CH_INFO_LINK(h2c_pkt, value) \ 509 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(15, 8)) 510 #define SET_WL_CH_INFO_CHNL(h2c_pkt, value) \ 511 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(23, 16)) 512 #define SET_WL_CH_INFO_BW(h2c_pkt, value) \ 513 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(31, 24)) 514 #define SET_BT_MP_INFO_SEQ(h2c_pkt, value) \ 515 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(15, 12)) 516 #define SET_BT_MP_INFO_OP_CODE(h2c_pkt, value) \ 517 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(23, 16)) 518 #define SET_BT_MP_INFO_PARA1(h2c_pkt, value) \ 519 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(31, 24)) 520 #define SET_BT_MP_INFO_PARA2(h2c_pkt, value) \ 521 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(7, 0)) 522 #define SET_BT_MP_INFO_PARA3(h2c_pkt, value) \ 523 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(15, 8)) 524 #define SET_BT_TX_POWER_INDEX(h2c_pkt, value) \ 525 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(15, 8)) 526 #define SET_IGNORE_WLAN_ACTION_EN(h2c_pkt, value) \ 527 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(8)) 528 #define SET_COEX_TDMA_TYPE_PARA1(h2c_pkt, value) \ 529 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(15, 8)) 530 #define SET_COEX_TDMA_TYPE_PARA2(h2c_pkt, value) \ 531 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(23, 16)) 532 #define SET_COEX_TDMA_TYPE_PARA3(h2c_pkt, value) \ 533 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(31, 24)) 534 #define SET_COEX_TDMA_TYPE_PARA4(h2c_pkt, value) \ 535 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(7, 0)) 536 #define SET_COEX_TDMA_TYPE_PARA5(h2c_pkt, value) \ 537 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(15, 8)) 538 #define SET_BT_WIFI_CONTROL_OP_CODE(h2c_pkt, value) \ 539 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(15, 8)) 540 #define SET_BT_WIFI_CONTROL_DATA1(h2c_pkt, value) \ 541 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(23, 16)) 542 #define SET_BT_WIFI_CONTROL_DATA2(h2c_pkt, value) \ 543 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(31, 24)) 544 #define SET_BT_WIFI_CONTROL_DATA3(h2c_pkt, value) \ 545 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(7, 0)) 546 #define SET_BT_WIFI_CONTROL_DATA4(h2c_pkt, value) \ 547 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(15, 8)) 548 #define SET_BT_WIFI_CONTROL_DATA5(h2c_pkt, value) \ 549 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(23, 16)) 550 551 #define SET_KEEP_ALIVE_ENABLE(h2c_pkt, value) \ 552 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(8)) 553 #define SET_KEEP_ALIVE_ADOPT(h2c_pkt, value) \ 554 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(9)) 555 #define SET_KEEP_ALIVE_PKT_TYPE(h2c_pkt, value) \ 556 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(10)) 557 #define SET_KEEP_ALIVE_CHECK_PERIOD(h2c_pkt, value) \ 558 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(23, 16)) 559 560 #define SET_DISCONNECT_DECISION_ENABLE(h2c_pkt, value) \ 561 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(8)) 562 #define SET_DISCONNECT_DECISION_ADOPT(h2c_pkt, value) \ 563 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(9)) 564 #define SET_DISCONNECT_DECISION_CHECK_PERIOD(h2c_pkt, value) \ 565 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(23, 16)) 566 #define SET_DISCONNECT_DECISION_TRY_PKT_NUM(h2c_pkt, value) \ 567 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(31, 24)) 568 569 #define SET_WOWLAN_FUNC_ENABLE(h2c_pkt, value) \ 570 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(8)) 571 #define SET_WOWLAN_PATTERN_MATCH_ENABLE(h2c_pkt, value) \ 572 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(9)) 573 #define SET_WOWLAN_MAGIC_PKT_ENABLE(h2c_pkt, value) \ 574 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(10)) 575 #define SET_WOWLAN_UNICAST_PKT_ENABLE(h2c_pkt, value) \ 576 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(11)) 577 #define SET_WOWLAN_REKEY_WAKEUP_ENABLE(h2c_pkt, value) \ 578 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(14)) 579 #define SET_WOWLAN_DEAUTH_WAKEUP_ENABLE(h2c_pkt, value) \ 580 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(15)) 581 582 #define SET_REMOTE_WAKECTRL_ENABLE(h2c_pkt, value) \ 583 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(8)) 584 #define SET_REMOTE_WAKE_CTRL_NLO_OFFLOAD_EN(h2c_pkt, value) \ 585 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(12)) 586 587 #define SET_AOAC_GLOBAL_INFO_PAIRWISE_ENC_ALG(h2c_pkt, value) \ 588 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(15, 8)) 589 #define SET_AOAC_GLOBAL_INFO_GROUP_ENC_ALG(h2c_pkt, value) \ 590 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(23, 16)) 591 592 #define SET_NLO_FUN_EN(h2c_pkt, value) \ 593 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(8)) 594 #define SET_NLO_PS_32K(h2c_pkt, value) \ 595 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(9)) 596 #define SET_NLO_IGNORE_SECURITY(h2c_pkt, value) \ 597 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(10)) 598 #define SET_NLO_LOC_NLO_INFO(h2c_pkt, value) \ 599 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(23, 16)) 600 601 #define GET_FW_DUMP_LEN(_header) \ 602 le32_get_bits(*((__le32 *)(_header) + 0x00), GENMASK(15, 0)) 603 #define GET_FW_DUMP_SEQ(_header) \ 604 le32_get_bits(*((__le32 *)(_header) + 0x00), GENMASK(22, 16)) 605 #define GET_FW_DUMP_MORE(_header) \ 606 le32_get_bits(*((__le32 *)(_header) + 0x00), BIT(23)) 607 #define GET_FW_DUMP_VERSION(_header) \ 608 le32_get_bits(*((__le32 *)(_header) + 0x00), GENMASK(31, 24)) 609 #define GET_FW_DUMP_TLV_TYPE(_header) \ 610 le32_get_bits(*((__le32 *)(_header) + 0x01), GENMASK(15, 0)) 611 #define GET_FW_DUMP_TLV_LEN(_header) \ 612 le32_get_bits(*((__le32 *)(_header) + 0x01), GENMASK(31, 16)) 613 #define GET_FW_DUMP_TLV_VAL(_header) \ 614 le32_get_bits(*((__le32 *)(_header) + 0x02), GENMASK(31, 0)) 615 616 #define RFK_SET_INFORM_START(h2c_pkt, value) \ 617 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(8)) 618 static inline struct rtw_c2h_cmd *get_c2h_from_skb(struct sk_buff *skb) 619 { 620 u32 pkt_offset; 621 622 pkt_offset = *((u32 *)skb->cb); 623 return (struct rtw_c2h_cmd *)(skb->data + pkt_offset); 624 } 625 626 static inline bool rtw_fw_feature_check(struct rtw_fw_state *fw, 627 enum rtw_fw_feature feature) 628 { 629 return !!(fw->feature & feature); 630 } 631 632 void rtw_fw_c2h_cmd_rx_irqsafe(struct rtw_dev *rtwdev, u32 pkt_offset, 633 struct sk_buff *skb); 634 void rtw_fw_c2h_cmd_handle(struct rtw_dev *rtwdev, struct sk_buff *skb); 635 void rtw_fw_send_general_info(struct rtw_dev *rtwdev); 636 void rtw_fw_send_phydm_info(struct rtw_dev *rtwdev); 637 638 void rtw_fw_do_iqk(struct rtw_dev *rtwdev, struct rtw_iqk_para *para); 639 void rtw_fw_inform_rfk_status(struct rtw_dev *rtwdev, bool start); 640 void rtw_fw_set_pwr_mode(struct rtw_dev *rtwdev); 641 void rtw_fw_set_pg_info(struct rtw_dev *rtwdev); 642 void rtw_fw_query_bt_info(struct rtw_dev *rtwdev); 643 void rtw_fw_wl_ch_info(struct rtw_dev *rtwdev, u8 link, u8 ch, u8 bw); 644 void rtw_fw_query_bt_mp_info(struct rtw_dev *rtwdev, 645 struct rtw_coex_info_req *req); 646 void rtw_fw_force_bt_tx_power(struct rtw_dev *rtwdev, u8 bt_pwr_dec_lvl); 647 void rtw_fw_bt_ignore_wlan_action(struct rtw_dev *rtwdev, bool enable); 648 void rtw_fw_coex_tdma_type(struct rtw_dev *rtwdev, 649 u8 para1, u8 para2, u8 para3, u8 para4, u8 para5); 650 void rtw_fw_bt_wifi_control(struct rtw_dev *rtwdev, u8 op_code, u8 *data); 651 void rtw_fw_send_rssi_info(struct rtw_dev *rtwdev, struct rtw_sta_info *si); 652 void rtw_fw_send_ra_info(struct rtw_dev *rtwdev, struct rtw_sta_info *si); 653 void rtw_fw_media_status_report(struct rtw_dev *rtwdev, u8 mac_id, bool conn); 654 void rtw_fw_update_wl_phy_info(struct rtw_dev *rtwdev); 655 void rtw_fw_beacon_filter_config(struct rtw_dev *rtwdev, bool connect, 656 struct ieee80211_vif *vif); 657 int rtw_fw_write_data_rsvd_page(struct rtw_dev *rtwdev, u16 pg_addr, 658 u8 *buf, u32 size); 659 void rtw_remove_rsvd_page(struct rtw_dev *rtwdev, 660 struct rtw_vif *rtwvif); 661 void rtw_add_rsvd_page_bcn(struct rtw_dev *rtwdev, 662 struct rtw_vif *rtwvif); 663 void rtw_add_rsvd_page_pno(struct rtw_dev *rtwdev, 664 struct rtw_vif *rtwvif); 665 void rtw_add_rsvd_page_sta(struct rtw_dev *rtwdev, 666 struct rtw_vif *rtwvif); 667 int rtw_fw_download_rsvd_page(struct rtw_dev *rtwdev); 668 void rtw_send_rsvd_page_h2c(struct rtw_dev *rtwdev); 669 int rtw_dump_drv_rsvd_page(struct rtw_dev *rtwdev, 670 u32 offset, u32 size, u32 *buf); 671 void rtw_fw_set_remote_wake_ctrl_cmd(struct rtw_dev *rtwdev, bool enable); 672 void rtw_fw_set_wowlan_ctrl_cmd(struct rtw_dev *rtwdev, bool enable); 673 void rtw_fw_set_keep_alive_cmd(struct rtw_dev *rtwdev, bool enable); 674 void rtw_fw_set_disconnect_decision_cmd(struct rtw_dev *rtwdev, bool enable); 675 void rtw_fw_set_aoac_global_info_cmd(struct rtw_dev *rtwdev, 676 u8 pairwise_key_enc, 677 u8 group_key_enc); 678 679 void rtw_fw_set_nlo_info(struct rtw_dev *rtwdev, bool enable); 680 void rtw_fw_update_pkt_probe_req(struct rtw_dev *rtwdev, 681 struct cfg80211_ssid *ssid); 682 void rtw_fw_channel_switch(struct rtw_dev *rtwdev, bool enable); 683 void rtw_fw_h2c_cmd_dbg(struct rtw_dev *rtwdev, u8 *h2c); 684 void rtw_fw_c2h_cmd_isr(struct rtw_dev *rtwdev); 685 int rtw_fw_dump_fifo(struct rtw_dev *rtwdev, u8 fifo_sel, u32 addr, u32 size, 686 u32 *buffer); 687 void rtw_fw_scan_notify(struct rtw_dev *rtwdev, bool start); 688 void rtw_fw_adaptivity(struct rtw_dev *rtwdev); 689 #endif 690