1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ 2 /* Copyright(c) 2018-2019 Realtek Corporation 3 */ 4 5 #ifndef __RTW_FW_H_ 6 #define __RTW_FW_H_ 7 8 #define H2C_PKT_SIZE 32 9 #define H2C_PKT_HDR_SIZE 8 10 11 /* FW bin information */ 12 #define FW_HDR_SIZE 64 13 #define FW_HDR_CHKSUM_SIZE 8 14 15 #define FW_NLO_INFO_CHECK_SIZE 4 16 17 #define FIFO_PAGE_SIZE_SHIFT 12 18 #define FIFO_PAGE_SIZE 4096 19 #define RSVD_PAGE_START_ADDR 0x780 20 #define FIFO_DUMP_ADDR 0x8000 21 22 #define DLFW_PAGE_SIZE_SHIFT_LEGACY 12 23 #define DLFW_PAGE_SIZE_LEGACY 0x1000 24 #define DLFW_BLK_SIZE_SHIFT_LEGACY 2 25 #define DLFW_BLK_SIZE_LEGACY 4 26 #define FW_START_ADDR_LEGACY 0x1000 27 28 enum rtw_c2h_cmd_id { 29 C2H_CCX_TX_RPT = 0x03, 30 C2H_BT_INFO = 0x09, 31 C2H_BT_MP_INFO = 0x0b, 32 C2H_RA_RPT = 0x0c, 33 C2H_HW_FEATURE_REPORT = 0x19, 34 C2H_WLAN_INFO = 0x27, 35 C2H_HW_FEATURE_DUMP = 0xfd, 36 C2H_HALMAC = 0xff, 37 }; 38 39 enum rtw_c2h_cmd_id_ext { 40 C2H_CCX_RPT = 0x0f, 41 }; 42 43 struct rtw_c2h_cmd { 44 u8 id; 45 u8 seq; 46 u8 payload[]; 47 } __packed; 48 49 enum rtw_rsvd_packet_type { 50 RSVD_BEACON, 51 RSVD_DUMMY, 52 RSVD_PS_POLL, 53 RSVD_PROBE_RESP, 54 RSVD_NULL, 55 RSVD_QOS_NULL, 56 RSVD_LPS_PG_DPK, 57 RSVD_LPS_PG_INFO, 58 RSVD_PROBE_REQ, 59 RSVD_NLO_INFO, 60 RSVD_CH_INFO, 61 }; 62 63 enum rtw_fw_rf_type { 64 FW_RF_1T2R = 0, 65 FW_RF_2T4R = 1, 66 FW_RF_2T2R = 2, 67 FW_RF_2T3R = 3, 68 FW_RF_1T1R = 4, 69 FW_RF_2T2R_GREEN = 5, 70 FW_RF_3T3R = 6, 71 FW_RF_3T4R = 7, 72 FW_RF_4T4R = 8, 73 FW_RF_MAX_TYPE = 0xF, 74 }; 75 76 struct rtw_coex_info_req { 77 u8 seq; 78 u8 op_code; 79 u8 para1; 80 u8 para2; 81 u8 para3; 82 }; 83 84 struct rtw_iqk_para { 85 u8 clear; 86 u8 segment_iqk; 87 }; 88 89 struct rtw_lps_pg_dpk_hdr { 90 u16 dpk_path_ok; 91 u8 dpk_txagc[2]; 92 u16 dpk_gs[2]; 93 u32 coef[2][20]; 94 u8 dpk_ch; 95 } __packed; 96 97 struct rtw_lps_pg_info_hdr { 98 u8 macid; 99 u8 mbssid; 100 u8 pattern_count; 101 u8 mu_tab_group_id; 102 u8 sec_cam_count; 103 u8 tx_bu_page_count; 104 u16 rsvd; 105 u8 sec_cam[MAX_PG_CAM_BACKUP_NUM]; 106 } __packed; 107 108 struct rtw_rsvd_page { 109 /* associated with each vif */ 110 struct list_head vif_list; 111 struct rtw_vif *rtwvif; 112 113 /* associated when build rsvd page */ 114 struct list_head build_list; 115 116 struct sk_buff *skb; 117 enum rtw_rsvd_packet_type type; 118 u8 page; 119 bool add_txdesc; 120 struct cfg80211_ssid *ssid; 121 }; 122 123 enum rtw_keep_alive_pkt_type { 124 KEEP_ALIVE_NULL_PKT = 0, 125 KEEP_ALIVE_ARP_RSP = 1, 126 }; 127 128 struct rtw_nlo_info_hdr { 129 u8 nlo_count; 130 u8 hidden_ap_count; 131 u8 rsvd1[2]; 132 u8 pattern_check[FW_NLO_INFO_CHECK_SIZE]; 133 u8 rsvd2[8]; 134 u8 ssid_len[16]; 135 u8 chiper[16]; 136 u8 rsvd3[16]; 137 u8 location[8]; 138 } __packed; 139 140 enum rtw_packet_type { 141 RTW_PACKET_PROBE_REQ = 0x00, 142 143 RTW_PACKET_UNDEFINE = 0x7FFFFFFF, 144 }; 145 146 struct rtw_fw_wow_keep_alive_para { 147 bool adopt; 148 u8 pkt_type; 149 u8 period; /* unit: sec */ 150 }; 151 152 struct rtw_fw_wow_disconnect_para { 153 bool adopt; 154 u8 period; /* unit: sec */ 155 u8 retry_count; 156 }; 157 158 struct rtw_ch_switch_option { 159 u8 periodic_option; 160 u32 tsf_high; 161 u32 tsf_low; 162 u8 dest_ch_en; 163 u8 absolute_time_en; 164 u8 dest_ch; 165 u8 normal_period; 166 u8 normal_period_sel; 167 u8 normal_cycle; 168 u8 slow_period; 169 u8 slow_period_sel; 170 u8 nlo_en; 171 }; 172 173 struct rtw_fw_hdr { 174 __le16 signature; 175 u8 category; 176 u8 function; 177 __le16 version; /* 0x04 */ 178 u8 subversion; 179 u8 subindex; 180 __le32 rsvd; /* 0x08 */ 181 __le32 rsvd2; /* 0x0C */ 182 u8 month; /* 0x10 */ 183 u8 day; 184 u8 hour; 185 u8 min; 186 __le16 year; /* 0x14 */ 187 __le16 rsvd3; 188 u8 mem_usage; /* 0x18 */ 189 u8 rsvd4[3]; 190 __le16 h2c_fmt_ver; /* 0x1C */ 191 __le16 rsvd5; 192 __le32 dmem_addr; /* 0x20 */ 193 __le32 dmem_size; 194 __le32 rsvd6; 195 __le32 rsvd7; 196 __le32 imem_size; /* 0x30 */ 197 __le32 emem_size; 198 __le32 emem_addr; 199 __le32 imem_addr; 200 } __packed; 201 202 struct rtw_fw_hdr_legacy { 203 __le16 signature; 204 u8 category; 205 u8 function; 206 __le16 version; /* 0x04 */ 207 u8 subversion1; 208 u8 subversion2; 209 u8 month; /* 0x08 */ 210 u8 day; 211 u8 hour; 212 u8 minute; 213 __le16 size; 214 __le16 rsvd2; 215 __le32 idx; /* 0x10 */ 216 __le32 rsvd3; 217 __le32 rsvd4; /* 0x18 */ 218 __le32 rsvd5; 219 } __packed; 220 221 /* C2H */ 222 #define GET_CCX_REPORT_SEQNUM_V0(c2h_payload) (c2h_payload[6] & 0xfc) 223 #define GET_CCX_REPORT_STATUS_V0(c2h_payload) (c2h_payload[0] & 0xc0) 224 #define GET_CCX_REPORT_SEQNUM_V1(c2h_payload) (c2h_payload[8] & 0xfc) 225 #define GET_CCX_REPORT_STATUS_V1(c2h_payload) (c2h_payload[9] & 0xc0) 226 227 #define GET_RA_REPORT_RATE(c2h_payload) (c2h_payload[0] & 0x7f) 228 #define GET_RA_REPORT_SGI(c2h_payload) ((c2h_payload[0] & 0x80) >> 7) 229 #define GET_RA_REPORT_BW(c2h_payload) (c2h_payload[6]) 230 #define GET_RA_REPORT_MACID(c2h_payload) (c2h_payload[1]) 231 232 /* PKT H2C */ 233 #define H2C_PKT_CMD_ID 0xFF 234 #define H2C_PKT_CATEGORY 0x01 235 236 #define H2C_PKT_GENERAL_INFO 0x0D 237 #define H2C_PKT_PHYDM_INFO 0x11 238 #define H2C_PKT_IQK 0x0E 239 240 #define H2C_PKT_CH_SWITCH 0x02 241 #define H2C_PKT_UPDATE_PKT 0x0C 242 243 #define H2C_PKT_CH_SWITCH_LEN 0x20 244 #define H2C_PKT_UPDATE_PKT_LEN 0x4 245 246 #define SET_PKT_H2C_CATEGORY(h2c_pkt, value) \ 247 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(6, 0)) 248 #define SET_PKT_H2C_CMD_ID(h2c_pkt, value) \ 249 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(15, 8)) 250 #define SET_PKT_H2C_SUB_CMD_ID(h2c_pkt, value) \ 251 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(31, 16)) 252 #define SET_PKT_H2C_TOTAL_LEN(h2c_pkt, value) \ 253 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(15, 0)) 254 255 static inline void rtw_h2c_pkt_set_header(u8 *h2c_pkt, u8 sub_id) 256 { 257 SET_PKT_H2C_CATEGORY(h2c_pkt, H2C_PKT_CATEGORY); 258 SET_PKT_H2C_CMD_ID(h2c_pkt, H2C_PKT_CMD_ID); 259 SET_PKT_H2C_SUB_CMD_ID(h2c_pkt, sub_id); 260 } 261 262 #define FW_OFFLOAD_H2C_SET_SEQ_NUM(h2c_pkt, value) \ 263 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(31, 16)) 264 #define GENERAL_INFO_SET_FW_TX_BOUNDARY(h2c_pkt, value) \ 265 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, GENMASK(23, 16)) 266 267 #define PHYDM_INFO_SET_REF_TYPE(h2c_pkt, value) \ 268 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, GENMASK(7, 0)) 269 #define PHYDM_INFO_SET_RF_TYPE(h2c_pkt, value) \ 270 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, GENMASK(15, 8)) 271 #define PHYDM_INFO_SET_CUT_VER(h2c_pkt, value) \ 272 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, GENMASK(23, 16)) 273 #define PHYDM_INFO_SET_RX_ANT_STATUS(h2c_pkt, value) \ 274 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, GENMASK(27, 24)) 275 #define PHYDM_INFO_SET_TX_ANT_STATUS(h2c_pkt, value) \ 276 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, GENMASK(31, 28)) 277 #define IQK_SET_CLEAR(h2c_pkt, value) \ 278 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, BIT(0)) 279 #define IQK_SET_SEGMENT_IQK(h2c_pkt, value) \ 280 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, BIT(1)) 281 282 #define CHSW_INFO_SET_CH(pkt, value) \ 283 le32p_replace_bits((__le32 *)(pkt) + 0x00, value, GENMASK(7, 0)) 284 #define CHSW_INFO_SET_PRI_CH_IDX(pkt, value) \ 285 le32p_replace_bits((__le32 *)(pkt) + 0x00, value, GENMASK(11, 8)) 286 #define CHSW_INFO_SET_BW(pkt, value) \ 287 le32p_replace_bits((__le32 *)(pkt) + 0x00, value, GENMASK(15, 12)) 288 #define CHSW_INFO_SET_TIMEOUT(pkt, value) \ 289 le32p_replace_bits((__le32 *)(pkt) + 0x00, value, GENMASK(23, 16)) 290 #define CHSW_INFO_SET_ACTION_ID(pkt, value) \ 291 le32p_replace_bits((__le32 *)(pkt) + 0x00, value, GENMASK(30, 24)) 292 293 #define UPDATE_PKT_SET_SIZE(h2c_pkt, value) \ 294 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, GENMASK(15, 0)) 295 #define UPDATE_PKT_SET_PKT_ID(h2c_pkt, value) \ 296 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, GENMASK(23, 16)) 297 #define UPDATE_PKT_SET_LOCATION(h2c_pkt, value) \ 298 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, GENMASK(31, 24)) 299 300 #define CH_SWITCH_SET_START(h2c_pkt, value) \ 301 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, BIT(0)) 302 #define CH_SWITCH_SET_DEST_CH_EN(h2c_pkt, value) \ 303 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, BIT(1)) 304 #define CH_SWITCH_SET_ABSOLUTE_TIME(h2c_pkt, value) \ 305 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, BIT(2)) 306 #define CH_SWITCH_SET_PERIODIC_OPT(h2c_pkt, value) \ 307 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, GENMASK(4, 3)) 308 #define CH_SWITCH_SET_INFO_LOC(h2c_pkt, value) \ 309 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, GENMASK(15, 8)) 310 #define CH_SWITCH_SET_CH_NUM(h2c_pkt, value) \ 311 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, GENMASK(23, 16)) 312 #define CH_SWITCH_SET_PRI_CH_IDX(h2c_pkt, value) \ 313 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, GENMASK(27, 24)) 314 #define CH_SWITCH_SET_DEST_CH(h2c_pkt, value) \ 315 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x03, value, GENMASK(7, 0)) 316 #define CH_SWITCH_SET_NORMAL_PERIOD(h2c_pkt, value) \ 317 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x03, value, GENMASK(13, 8)) 318 #define CH_SWITCH_SET_NORMAL_PERIOD_SEL(h2c_pkt, value) \ 319 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x03, value, GENMASK(15, 14)) 320 #define CH_SWITCH_SET_SLOW_PERIOD(h2c_pkt, value) \ 321 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x03, value, GENMASK(21, 16)) 322 #define CH_SWITCH_SET_SLOW_PERIOD_SEL(h2c_pkt, value) \ 323 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x03, value, GENMASK(23, 22)) 324 #define CH_SWITCH_SET_NORMAL_CYCLE(h2c_pkt, value) \ 325 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x03, value, GENMASK(31, 24)) 326 #define CH_SWITCH_SET_TSF_HIGH(h2c_pkt, value) \ 327 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x04, value, GENMASK(31, 0)) 328 #define CH_SWITCH_SET_TSF_LOW(h2c_pkt, value) \ 329 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x05, value, GENMASK(31, 0)) 330 #define CH_SWITCH_SET_INFO_SIZE(h2c_pkt, value) \ 331 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x06, value, GENMASK(15, 0)) 332 333 /* Command H2C */ 334 #define H2C_CMD_RSVD_PAGE 0x0 335 #define H2C_CMD_MEDIA_STATUS_RPT 0x01 336 #define H2C_CMD_SET_PWR_MODE 0x20 337 #define H2C_CMD_LPS_PG_INFO 0x2b 338 #define H2C_CMD_RA_INFO 0x40 339 #define H2C_CMD_RSSI_MONITOR 0x42 340 341 #define H2C_CMD_COEX_TDMA_TYPE 0x60 342 #define H2C_CMD_QUERY_BT_INFO 0x61 343 #define H2C_CMD_FORCE_BT_TX_POWER 0x62 344 #define H2C_CMD_IGNORE_WLAN_ACTION 0x63 345 #define H2C_CMD_WL_CH_INFO 0x66 346 #define H2C_CMD_QUERY_BT_MP_INFO 0x67 347 #define H2C_CMD_BT_WIFI_CONTROL 0x69 348 349 #define H2C_CMD_KEEP_ALIVE 0x03 350 #define H2C_CMD_DISCONNECT_DECISION 0x04 351 #define H2C_CMD_WOWLAN 0x80 352 #define H2C_CMD_REMOTE_WAKE_CTRL 0x81 353 #define H2C_CMD_AOAC_GLOBAL_INFO 0x82 354 #define H2C_CMD_NLO_INFO 0x8C 355 356 #define SET_H2C_CMD_ID_CLASS(h2c_pkt, value) \ 357 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(7, 0)) 358 359 #define MEDIA_STATUS_RPT_SET_OP_MODE(h2c_pkt, value) \ 360 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(8)) 361 #define MEDIA_STATUS_RPT_SET_MACID(h2c_pkt, value) \ 362 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(23, 16)) 363 364 #define SET_PWR_MODE_SET_MODE(h2c_pkt, value) \ 365 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(14, 8)) 366 #define SET_PWR_MODE_SET_RLBM(h2c_pkt, value) \ 367 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(19, 16)) 368 #define SET_PWR_MODE_SET_SMART_PS(h2c_pkt, value) \ 369 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(23, 20)) 370 #define SET_PWR_MODE_SET_AWAKE_INTERVAL(h2c_pkt, value) \ 371 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(31, 24)) 372 #define SET_PWR_MODE_SET_PORT_ID(h2c_pkt, value) \ 373 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(7, 5)) 374 #define SET_PWR_MODE_SET_PWR_STATE(h2c_pkt, value) \ 375 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(15, 8)) 376 #define LPS_PG_INFO_LOC(h2c_pkt, value) \ 377 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(23, 16)) 378 #define LPS_PG_DPK_LOC(h2c_pkt, value) \ 379 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(31, 24)) 380 #define LPS_PG_SEC_CAM_EN(h2c_pkt, value) \ 381 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(8)) 382 #define LPS_PG_PATTERN_CAM_EN(h2c_pkt, value) \ 383 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(10)) 384 #define SET_RSSI_INFO_MACID(h2c_pkt, value) \ 385 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(15, 8)) 386 #define SET_RSSI_INFO_RSSI(h2c_pkt, value) \ 387 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(31, 24)) 388 #define SET_RSSI_INFO_STBC(h2c_pkt, value) \ 389 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, BIT(1)) 390 #define SET_RA_INFO_MACID(h2c_pkt, value) \ 391 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(15, 8)) 392 #define SET_RA_INFO_RATE_ID(h2c_pkt, value) \ 393 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(20, 16)) 394 #define SET_RA_INFO_INIT_RA_LVL(h2c_pkt, value) \ 395 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(22, 21)) 396 #define SET_RA_INFO_SGI_EN(h2c_pkt, value) \ 397 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(23)) 398 #define SET_RA_INFO_BW_MODE(h2c_pkt, value) \ 399 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(25, 24)) 400 #define SET_RA_INFO_LDPC(h2c_pkt, value) \ 401 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(26)) 402 #define SET_RA_INFO_NO_UPDATE(h2c_pkt, value) \ 403 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(27)) 404 #define SET_RA_INFO_VHT_EN(h2c_pkt, value) \ 405 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(29, 28)) 406 #define SET_RA_INFO_DIS_PT(h2c_pkt, value) \ 407 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(30)) 408 #define SET_RA_INFO_RA_MASK0(h2c_pkt, value) \ 409 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(7, 0)) 410 #define SET_RA_INFO_RA_MASK1(h2c_pkt, value) \ 411 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(15, 8)) 412 #define SET_RA_INFO_RA_MASK2(h2c_pkt, value) \ 413 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(23, 16)) 414 #define SET_RA_INFO_RA_MASK3(h2c_pkt, value) \ 415 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(31, 24)) 416 #define SET_QUERY_BT_INFO(h2c_pkt, value) \ 417 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(8)) 418 #define SET_WL_CH_INFO_LINK(h2c_pkt, value) \ 419 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(15, 8)) 420 #define SET_WL_CH_INFO_CHNL(h2c_pkt, value) \ 421 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(23, 16)) 422 #define SET_WL_CH_INFO_BW(h2c_pkt, value) \ 423 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(31, 24)) 424 #define SET_BT_MP_INFO_SEQ(h2c_pkt, value) \ 425 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(15, 12)) 426 #define SET_BT_MP_INFO_OP_CODE(h2c_pkt, value) \ 427 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(23, 16)) 428 #define SET_BT_MP_INFO_PARA1(h2c_pkt, value) \ 429 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(31, 24)) 430 #define SET_BT_MP_INFO_PARA2(h2c_pkt, value) \ 431 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(7, 0)) 432 #define SET_BT_MP_INFO_PARA3(h2c_pkt, value) \ 433 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(15, 8)) 434 #define SET_BT_TX_POWER_INDEX(h2c_pkt, value) \ 435 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(15, 8)) 436 #define SET_IGNORE_WLAN_ACTION_EN(h2c_pkt, value) \ 437 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(8)) 438 #define SET_COEX_TDMA_TYPE_PARA1(h2c_pkt, value) \ 439 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(15, 8)) 440 #define SET_COEX_TDMA_TYPE_PARA2(h2c_pkt, value) \ 441 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(23, 16)) 442 #define SET_COEX_TDMA_TYPE_PARA3(h2c_pkt, value) \ 443 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(31, 24)) 444 #define SET_COEX_TDMA_TYPE_PARA4(h2c_pkt, value) \ 445 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(7, 0)) 446 #define SET_COEX_TDMA_TYPE_PARA5(h2c_pkt, value) \ 447 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(15, 8)) 448 #define SET_BT_WIFI_CONTROL_OP_CODE(h2c_pkt, value) \ 449 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(15, 8)) 450 #define SET_BT_WIFI_CONTROL_DATA1(h2c_pkt, value) \ 451 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(23, 16)) 452 #define SET_BT_WIFI_CONTROL_DATA2(h2c_pkt, value) \ 453 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(31, 24)) 454 #define SET_BT_WIFI_CONTROL_DATA3(h2c_pkt, value) \ 455 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(7, 0)) 456 #define SET_BT_WIFI_CONTROL_DATA4(h2c_pkt, value) \ 457 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(15, 8)) 458 #define SET_BT_WIFI_CONTROL_DATA5(h2c_pkt, value) \ 459 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(23, 16)) 460 461 #define SET_KEEP_ALIVE_ENABLE(h2c_pkt, value) \ 462 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(8)) 463 #define SET_KEEP_ALIVE_ADOPT(h2c_pkt, value) \ 464 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(9)) 465 #define SET_KEEP_ALIVE_PKT_TYPE(h2c_pkt, value) \ 466 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(10)) 467 #define SET_KEEP_ALIVE_CHECK_PERIOD(h2c_pkt, value) \ 468 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(23, 16)) 469 470 #define SET_DISCONNECT_DECISION_ENABLE(h2c_pkt, value) \ 471 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(8)) 472 #define SET_DISCONNECT_DECISION_ADOPT(h2c_pkt, value) \ 473 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(9)) 474 #define SET_DISCONNECT_DECISION_CHECK_PERIOD(h2c_pkt, value) \ 475 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(23, 16)) 476 #define SET_DISCONNECT_DECISION_TRY_PKT_NUM(h2c_pkt, value) \ 477 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(31, 24)) 478 479 #define SET_WOWLAN_FUNC_ENABLE(h2c_pkt, value) \ 480 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(8)) 481 #define SET_WOWLAN_PATTERN_MATCH_ENABLE(h2c_pkt, value) \ 482 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(9)) 483 #define SET_WOWLAN_MAGIC_PKT_ENABLE(h2c_pkt, value) \ 484 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(10)) 485 #define SET_WOWLAN_UNICAST_PKT_ENABLE(h2c_pkt, value) \ 486 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(11)) 487 #define SET_WOWLAN_REKEY_WAKEUP_ENABLE(h2c_pkt, value) \ 488 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(14)) 489 #define SET_WOWLAN_DEAUTH_WAKEUP_ENABLE(h2c_pkt, value) \ 490 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(15)) 491 492 #define SET_REMOTE_WAKECTRL_ENABLE(h2c_pkt, value) \ 493 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(8)) 494 #define SET_REMOTE_WAKE_CTRL_NLO_OFFLOAD_EN(h2c_pkt, value) \ 495 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(12)) 496 497 #define SET_AOAC_GLOBAL_INFO_PAIRWISE_ENC_ALG(h2c_pkt, value) \ 498 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(15, 8)) 499 #define SET_AOAC_GLOBAL_INFO_GROUP_ENC_ALG(h2c_pkt, value) \ 500 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(23, 16)) 501 502 #define SET_NLO_FUN_EN(h2c_pkt, value) \ 503 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(8)) 504 #define SET_NLO_PS_32K(h2c_pkt, value) \ 505 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(9)) 506 #define SET_NLO_IGNORE_SECURITY(h2c_pkt, value) \ 507 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(10)) 508 #define SET_NLO_LOC_NLO_INFO(h2c_pkt, value) \ 509 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(23, 16)) 510 511 static inline struct rtw_c2h_cmd *get_c2h_from_skb(struct sk_buff *skb) 512 { 513 u32 pkt_offset; 514 515 pkt_offset = *((u32 *)skb->cb); 516 return (struct rtw_c2h_cmd *)(skb->data + pkt_offset); 517 } 518 519 void rtw_fw_c2h_cmd_rx_irqsafe(struct rtw_dev *rtwdev, u32 pkt_offset, 520 struct sk_buff *skb); 521 void rtw_fw_c2h_cmd_handle(struct rtw_dev *rtwdev, struct sk_buff *skb); 522 void rtw_fw_send_general_info(struct rtw_dev *rtwdev); 523 void rtw_fw_send_phydm_info(struct rtw_dev *rtwdev); 524 525 void rtw_fw_do_iqk(struct rtw_dev *rtwdev, struct rtw_iqk_para *para); 526 void rtw_fw_set_pwr_mode(struct rtw_dev *rtwdev); 527 void rtw_fw_set_pg_info(struct rtw_dev *rtwdev); 528 void rtw_fw_query_bt_info(struct rtw_dev *rtwdev); 529 void rtw_fw_wl_ch_info(struct rtw_dev *rtwdev, u8 link, u8 ch, u8 bw); 530 void rtw_fw_query_bt_mp_info(struct rtw_dev *rtwdev, 531 struct rtw_coex_info_req *req); 532 void rtw_fw_force_bt_tx_power(struct rtw_dev *rtwdev, u8 bt_pwr_dec_lvl); 533 void rtw_fw_bt_ignore_wlan_action(struct rtw_dev *rtwdev, bool enable); 534 void rtw_fw_coex_tdma_type(struct rtw_dev *rtwdev, 535 u8 para1, u8 para2, u8 para3, u8 para4, u8 para5); 536 void rtw_fw_bt_wifi_control(struct rtw_dev *rtwdev, u8 op_code, u8 *data); 537 void rtw_fw_send_rssi_info(struct rtw_dev *rtwdev, struct rtw_sta_info *si); 538 void rtw_fw_send_ra_info(struct rtw_dev *rtwdev, struct rtw_sta_info *si); 539 void rtw_fw_media_status_report(struct rtw_dev *rtwdev, u8 mac_id, bool conn); 540 int rtw_fw_write_data_rsvd_page(struct rtw_dev *rtwdev, u16 pg_addr, 541 u8 *buf, u32 size); 542 void rtw_remove_rsvd_page(struct rtw_dev *rtwdev, 543 struct rtw_vif *rtwvif); 544 void rtw_add_rsvd_page_bcn(struct rtw_dev *rtwdev, 545 struct rtw_vif *rtwvif); 546 void rtw_add_rsvd_page_pno(struct rtw_dev *rtwdev, 547 struct rtw_vif *rtwvif); 548 void rtw_add_rsvd_page_sta(struct rtw_dev *rtwdev, 549 struct rtw_vif *rtwvif); 550 int rtw_fw_download_rsvd_page(struct rtw_dev *rtwdev); 551 void rtw_send_rsvd_page_h2c(struct rtw_dev *rtwdev); 552 int rtw_dump_drv_rsvd_page(struct rtw_dev *rtwdev, 553 u32 offset, u32 size, u32 *buf); 554 void rtw_fw_set_remote_wake_ctrl_cmd(struct rtw_dev *rtwdev, bool enable); 555 void rtw_fw_set_wowlan_ctrl_cmd(struct rtw_dev *rtwdev, bool enable); 556 void rtw_fw_set_keep_alive_cmd(struct rtw_dev *rtwdev, bool enable); 557 void rtw_fw_set_disconnect_decision_cmd(struct rtw_dev *rtwdev, bool enable); 558 void rtw_fw_set_aoac_global_info_cmd(struct rtw_dev *rtwdev, 559 u8 pairwise_key_enc, 560 u8 group_key_enc); 561 562 void rtw_fw_set_nlo_info(struct rtw_dev *rtwdev, bool enable); 563 void rtw_fw_update_pkt_probe_req(struct rtw_dev *rtwdev, 564 struct cfg80211_ssid *ssid); 565 void rtw_fw_channel_switch(struct rtw_dev *rtwdev, bool enable); 566 void rtw_fw_h2c_cmd_dbg(struct rtw_dev *rtwdev, u8 *h2c); 567 568 #endif 569