1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ 2 /* Copyright(c) 2018-2019 Realtek Corporation 3 */ 4 5 #ifndef __RTW_FW_H_ 6 #define __RTW_FW_H_ 7 8 #define H2C_PKT_SIZE 32 9 #define H2C_PKT_HDR_SIZE 8 10 11 /* FW bin information */ 12 #define FW_HDR_SIZE 64 13 #define FW_HDR_CHKSUM_SIZE 8 14 15 #define FW_NLO_INFO_CHECK_SIZE 4 16 17 #define FIFO_PAGE_SIZE_SHIFT 12 18 #define FIFO_PAGE_SIZE 4096 19 #define FIFO_DUMP_ADDR 0x8000 20 21 #define DLFW_PAGE_SIZE_SHIFT_LEGACY 12 22 #define DLFW_PAGE_SIZE_LEGACY 0x1000 23 #define DLFW_BLK_SIZE_SHIFT_LEGACY 2 24 #define DLFW_BLK_SIZE_LEGACY 4 25 #define FW_START_ADDR_LEGACY 0x1000 26 27 enum rtw_c2h_cmd_id { 28 C2H_CCX_TX_RPT = 0x03, 29 C2H_BT_INFO = 0x09, 30 C2H_BT_MP_INFO = 0x0b, 31 C2H_RA_RPT = 0x0c, 32 C2H_HW_FEATURE_REPORT = 0x19, 33 C2H_WLAN_INFO = 0x27, 34 C2H_HW_FEATURE_DUMP = 0xfd, 35 C2H_HALMAC = 0xff, 36 }; 37 38 enum rtw_c2h_cmd_id_ext { 39 C2H_CCX_RPT = 0x0f, 40 }; 41 42 struct rtw_c2h_cmd { 43 u8 id; 44 u8 seq; 45 u8 payload[]; 46 } __packed; 47 48 enum rtw_rsvd_packet_type { 49 RSVD_BEACON, 50 RSVD_DUMMY, 51 RSVD_PS_POLL, 52 RSVD_PROBE_RESP, 53 RSVD_NULL, 54 RSVD_QOS_NULL, 55 RSVD_LPS_PG_DPK, 56 RSVD_LPS_PG_INFO, 57 RSVD_PROBE_REQ, 58 RSVD_NLO_INFO, 59 RSVD_CH_INFO, 60 }; 61 62 enum rtw_fw_rf_type { 63 FW_RF_1T2R = 0, 64 FW_RF_2T4R = 1, 65 FW_RF_2T2R = 2, 66 FW_RF_2T3R = 3, 67 FW_RF_1T1R = 4, 68 FW_RF_2T2R_GREEN = 5, 69 FW_RF_3T3R = 6, 70 FW_RF_3T4R = 7, 71 FW_RF_4T4R = 8, 72 FW_RF_MAX_TYPE = 0xF, 73 }; 74 75 struct rtw_coex_info_req { 76 u8 seq; 77 u8 op_code; 78 u8 para1; 79 u8 para2; 80 u8 para3; 81 }; 82 83 struct rtw_iqk_para { 84 u8 clear; 85 u8 segment_iqk; 86 }; 87 88 struct rtw_lps_pg_dpk_hdr { 89 u16 dpk_path_ok; 90 u8 dpk_txagc[2]; 91 u16 dpk_gs[2]; 92 u32 coef[2][20]; 93 u8 dpk_ch; 94 } __packed; 95 96 struct rtw_lps_pg_info_hdr { 97 u8 macid; 98 u8 mbssid; 99 u8 pattern_count; 100 u8 mu_tab_group_id; 101 u8 sec_cam_count; 102 u8 tx_bu_page_count; 103 u16 rsvd; 104 u8 sec_cam[MAX_PG_CAM_BACKUP_NUM]; 105 } __packed; 106 107 struct rtw_rsvd_page { 108 /* associated with each vif */ 109 struct list_head vif_list; 110 struct rtw_vif *rtwvif; 111 112 /* associated when build rsvd page */ 113 struct list_head build_list; 114 115 struct sk_buff *skb; 116 enum rtw_rsvd_packet_type type; 117 u8 page; 118 bool add_txdesc; 119 struct cfg80211_ssid *ssid; 120 }; 121 122 enum rtw_keep_alive_pkt_type { 123 KEEP_ALIVE_NULL_PKT = 0, 124 KEEP_ALIVE_ARP_RSP = 1, 125 }; 126 127 struct rtw_nlo_info_hdr { 128 u8 nlo_count; 129 u8 hidden_ap_count; 130 u8 rsvd1[2]; 131 u8 pattern_check[FW_NLO_INFO_CHECK_SIZE]; 132 u8 rsvd2[8]; 133 u8 ssid_len[16]; 134 u8 chiper[16]; 135 u8 rsvd3[16]; 136 u8 location[8]; 137 } __packed; 138 139 enum rtw_packet_type { 140 RTW_PACKET_PROBE_REQ = 0x00, 141 142 RTW_PACKET_UNDEFINE = 0x7FFFFFFF, 143 }; 144 145 struct rtw_fw_wow_keep_alive_para { 146 bool adopt; 147 u8 pkt_type; 148 u8 period; /* unit: sec */ 149 }; 150 151 struct rtw_fw_wow_disconnect_para { 152 bool adopt; 153 u8 period; /* unit: sec */ 154 u8 retry_count; 155 }; 156 157 struct rtw_ch_switch_option { 158 u8 periodic_option; 159 u32 tsf_high; 160 u32 tsf_low; 161 u8 dest_ch_en; 162 u8 absolute_time_en; 163 u8 dest_ch; 164 u8 normal_period; 165 u8 normal_period_sel; 166 u8 normal_cycle; 167 u8 slow_period; 168 u8 slow_period_sel; 169 u8 nlo_en; 170 }; 171 172 struct rtw_fw_hdr { 173 __le16 signature; 174 u8 category; 175 u8 function; 176 __le16 version; /* 0x04 */ 177 u8 subversion; 178 u8 subindex; 179 __le32 rsvd; /* 0x08 */ 180 __le32 rsvd2; /* 0x0C */ 181 u8 month; /* 0x10 */ 182 u8 day; 183 u8 hour; 184 u8 min; 185 __le16 year; /* 0x14 */ 186 __le16 rsvd3; 187 u8 mem_usage; /* 0x18 */ 188 u8 rsvd4[3]; 189 __le16 h2c_fmt_ver; /* 0x1C */ 190 __le16 rsvd5; 191 __le32 dmem_addr; /* 0x20 */ 192 __le32 dmem_size; 193 __le32 rsvd6; 194 __le32 rsvd7; 195 __le32 imem_size; /* 0x30 */ 196 __le32 emem_size; 197 __le32 emem_addr; 198 __le32 imem_addr; 199 } __packed; 200 201 struct rtw_fw_hdr_legacy { 202 __le16 signature; 203 u8 category; 204 u8 function; 205 __le16 version; /* 0x04 */ 206 u8 subversion1; 207 u8 subversion2; 208 u8 month; /* 0x08 */ 209 u8 day; 210 u8 hour; 211 u8 minute; 212 __le16 size; 213 __le16 rsvd2; 214 __le32 idx; /* 0x10 */ 215 __le32 rsvd3; 216 __le32 rsvd4; /* 0x18 */ 217 __le32 rsvd5; 218 } __packed; 219 220 /* C2H */ 221 #define GET_CCX_REPORT_SEQNUM_V0(c2h_payload) (c2h_payload[6] & 0xfc) 222 #define GET_CCX_REPORT_STATUS_V0(c2h_payload) (c2h_payload[0] & 0xc0) 223 #define GET_CCX_REPORT_SEQNUM_V1(c2h_payload) (c2h_payload[8] & 0xfc) 224 #define GET_CCX_REPORT_STATUS_V1(c2h_payload) (c2h_payload[9] & 0xc0) 225 226 #define GET_RA_REPORT_RATE(c2h_payload) (c2h_payload[0] & 0x7f) 227 #define GET_RA_REPORT_SGI(c2h_payload) ((c2h_payload[0] & 0x80) >> 7) 228 #define GET_RA_REPORT_BW(c2h_payload) (c2h_payload[6]) 229 #define GET_RA_REPORT_MACID(c2h_payload) (c2h_payload[1]) 230 231 /* PKT H2C */ 232 #define H2C_PKT_CMD_ID 0xFF 233 #define H2C_PKT_CATEGORY 0x01 234 235 #define H2C_PKT_GENERAL_INFO 0x0D 236 #define H2C_PKT_PHYDM_INFO 0x11 237 #define H2C_PKT_IQK 0x0E 238 239 #define H2C_PKT_CH_SWITCH 0x02 240 #define H2C_PKT_UPDATE_PKT 0x0C 241 242 #define H2C_PKT_CH_SWITCH_LEN 0x20 243 #define H2C_PKT_UPDATE_PKT_LEN 0x4 244 245 #define SET_PKT_H2C_CATEGORY(h2c_pkt, value) \ 246 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(6, 0)) 247 #define SET_PKT_H2C_CMD_ID(h2c_pkt, value) \ 248 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(15, 8)) 249 #define SET_PKT_H2C_SUB_CMD_ID(h2c_pkt, value) \ 250 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(31, 16)) 251 #define SET_PKT_H2C_TOTAL_LEN(h2c_pkt, value) \ 252 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(15, 0)) 253 254 static inline void rtw_h2c_pkt_set_header(u8 *h2c_pkt, u8 sub_id) 255 { 256 SET_PKT_H2C_CATEGORY(h2c_pkt, H2C_PKT_CATEGORY); 257 SET_PKT_H2C_CMD_ID(h2c_pkt, H2C_PKT_CMD_ID); 258 SET_PKT_H2C_SUB_CMD_ID(h2c_pkt, sub_id); 259 } 260 261 #define FW_OFFLOAD_H2C_SET_SEQ_NUM(h2c_pkt, value) \ 262 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(31, 16)) 263 #define GENERAL_INFO_SET_FW_TX_BOUNDARY(h2c_pkt, value) \ 264 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, GENMASK(23, 16)) 265 266 #define PHYDM_INFO_SET_REF_TYPE(h2c_pkt, value) \ 267 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, GENMASK(7, 0)) 268 #define PHYDM_INFO_SET_RF_TYPE(h2c_pkt, value) \ 269 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, GENMASK(15, 8)) 270 #define PHYDM_INFO_SET_CUT_VER(h2c_pkt, value) \ 271 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, GENMASK(23, 16)) 272 #define PHYDM_INFO_SET_RX_ANT_STATUS(h2c_pkt, value) \ 273 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, GENMASK(27, 24)) 274 #define PHYDM_INFO_SET_TX_ANT_STATUS(h2c_pkt, value) \ 275 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, GENMASK(31, 28)) 276 #define IQK_SET_CLEAR(h2c_pkt, value) \ 277 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, BIT(0)) 278 #define IQK_SET_SEGMENT_IQK(h2c_pkt, value) \ 279 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, BIT(1)) 280 281 #define CHSW_INFO_SET_CH(pkt, value) \ 282 le32p_replace_bits((__le32 *)(pkt) + 0x00, value, GENMASK(7, 0)) 283 #define CHSW_INFO_SET_PRI_CH_IDX(pkt, value) \ 284 le32p_replace_bits((__le32 *)(pkt) + 0x00, value, GENMASK(11, 8)) 285 #define CHSW_INFO_SET_BW(pkt, value) \ 286 le32p_replace_bits((__le32 *)(pkt) + 0x00, value, GENMASK(15, 12)) 287 #define CHSW_INFO_SET_TIMEOUT(pkt, value) \ 288 le32p_replace_bits((__le32 *)(pkt) + 0x00, value, GENMASK(23, 16)) 289 #define CHSW_INFO_SET_ACTION_ID(pkt, value) \ 290 le32p_replace_bits((__le32 *)(pkt) + 0x00, value, GENMASK(30, 24)) 291 292 #define UPDATE_PKT_SET_SIZE(h2c_pkt, value) \ 293 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, GENMASK(15, 0)) 294 #define UPDATE_PKT_SET_PKT_ID(h2c_pkt, value) \ 295 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, GENMASK(23, 16)) 296 #define UPDATE_PKT_SET_LOCATION(h2c_pkt, value) \ 297 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, GENMASK(31, 24)) 298 299 #define CH_SWITCH_SET_START(h2c_pkt, value) \ 300 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, BIT(0)) 301 #define CH_SWITCH_SET_DEST_CH_EN(h2c_pkt, value) \ 302 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, BIT(1)) 303 #define CH_SWITCH_SET_ABSOLUTE_TIME(h2c_pkt, value) \ 304 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, BIT(2)) 305 #define CH_SWITCH_SET_PERIODIC_OPT(h2c_pkt, value) \ 306 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, GENMASK(4, 3)) 307 #define CH_SWITCH_SET_INFO_LOC(h2c_pkt, value) \ 308 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, GENMASK(15, 8)) 309 #define CH_SWITCH_SET_CH_NUM(h2c_pkt, value) \ 310 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, GENMASK(23, 16)) 311 #define CH_SWITCH_SET_PRI_CH_IDX(h2c_pkt, value) \ 312 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x02, value, GENMASK(27, 24)) 313 #define CH_SWITCH_SET_DEST_CH(h2c_pkt, value) \ 314 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x03, value, GENMASK(7, 0)) 315 #define CH_SWITCH_SET_NORMAL_PERIOD(h2c_pkt, value) \ 316 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x03, value, GENMASK(13, 8)) 317 #define CH_SWITCH_SET_NORMAL_PERIOD_SEL(h2c_pkt, value) \ 318 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x03, value, GENMASK(15, 14)) 319 #define CH_SWITCH_SET_SLOW_PERIOD(h2c_pkt, value) \ 320 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x03, value, GENMASK(21, 16)) 321 #define CH_SWITCH_SET_SLOW_PERIOD_SEL(h2c_pkt, value) \ 322 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x03, value, GENMASK(23, 22)) 323 #define CH_SWITCH_SET_NORMAL_CYCLE(h2c_pkt, value) \ 324 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x03, value, GENMASK(31, 24)) 325 #define CH_SWITCH_SET_TSF_HIGH(h2c_pkt, value) \ 326 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x04, value, GENMASK(31, 0)) 327 #define CH_SWITCH_SET_TSF_LOW(h2c_pkt, value) \ 328 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x05, value, GENMASK(31, 0)) 329 #define CH_SWITCH_SET_INFO_SIZE(h2c_pkt, value) \ 330 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x06, value, GENMASK(15, 0)) 331 332 /* Command H2C */ 333 #define H2C_CMD_RSVD_PAGE 0x0 334 #define H2C_CMD_MEDIA_STATUS_RPT 0x01 335 #define H2C_CMD_SET_PWR_MODE 0x20 336 #define H2C_CMD_LPS_PG_INFO 0x2b 337 #define H2C_CMD_RA_INFO 0x40 338 #define H2C_CMD_RSSI_MONITOR 0x42 339 340 #define H2C_CMD_COEX_TDMA_TYPE 0x60 341 #define H2C_CMD_QUERY_BT_INFO 0x61 342 #define H2C_CMD_FORCE_BT_TX_POWER 0x62 343 #define H2C_CMD_IGNORE_WLAN_ACTION 0x63 344 #define H2C_CMD_WL_CH_INFO 0x66 345 #define H2C_CMD_QUERY_BT_MP_INFO 0x67 346 #define H2C_CMD_BT_WIFI_CONTROL 0x69 347 348 #define H2C_CMD_KEEP_ALIVE 0x03 349 #define H2C_CMD_DISCONNECT_DECISION 0x04 350 #define H2C_CMD_WOWLAN 0x80 351 #define H2C_CMD_REMOTE_WAKE_CTRL 0x81 352 #define H2C_CMD_AOAC_GLOBAL_INFO 0x82 353 #define H2C_CMD_NLO_INFO 0x8C 354 355 #define SET_H2C_CMD_ID_CLASS(h2c_pkt, value) \ 356 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(7, 0)) 357 358 #define MEDIA_STATUS_RPT_SET_OP_MODE(h2c_pkt, value) \ 359 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(8)) 360 #define MEDIA_STATUS_RPT_SET_MACID(h2c_pkt, value) \ 361 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(23, 16)) 362 363 #define SET_PWR_MODE_SET_MODE(h2c_pkt, value) \ 364 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(14, 8)) 365 #define SET_PWR_MODE_SET_RLBM(h2c_pkt, value) \ 366 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(19, 16)) 367 #define SET_PWR_MODE_SET_SMART_PS(h2c_pkt, value) \ 368 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(23, 20)) 369 #define SET_PWR_MODE_SET_AWAKE_INTERVAL(h2c_pkt, value) \ 370 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(31, 24)) 371 #define SET_PWR_MODE_SET_PORT_ID(h2c_pkt, value) \ 372 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(7, 5)) 373 #define SET_PWR_MODE_SET_PWR_STATE(h2c_pkt, value) \ 374 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(15, 8)) 375 #define LPS_PG_INFO_LOC(h2c_pkt, value) \ 376 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(23, 16)) 377 #define LPS_PG_DPK_LOC(h2c_pkt, value) \ 378 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(31, 24)) 379 #define LPS_PG_SEC_CAM_EN(h2c_pkt, value) \ 380 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(8)) 381 #define LPS_PG_PATTERN_CAM_EN(h2c_pkt, value) \ 382 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(10)) 383 #define SET_RSSI_INFO_MACID(h2c_pkt, value) \ 384 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(15, 8)) 385 #define SET_RSSI_INFO_RSSI(h2c_pkt, value) \ 386 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(31, 24)) 387 #define SET_RSSI_INFO_STBC(h2c_pkt, value) \ 388 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, BIT(1)) 389 #define SET_RA_INFO_MACID(h2c_pkt, value) \ 390 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(15, 8)) 391 #define SET_RA_INFO_RATE_ID(h2c_pkt, value) \ 392 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(20, 16)) 393 #define SET_RA_INFO_INIT_RA_LVL(h2c_pkt, value) \ 394 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(22, 21)) 395 #define SET_RA_INFO_SGI_EN(h2c_pkt, value) \ 396 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(23)) 397 #define SET_RA_INFO_BW_MODE(h2c_pkt, value) \ 398 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(25, 24)) 399 #define SET_RA_INFO_LDPC(h2c_pkt, value) \ 400 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(26)) 401 #define SET_RA_INFO_NO_UPDATE(h2c_pkt, value) \ 402 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(27)) 403 #define SET_RA_INFO_VHT_EN(h2c_pkt, value) \ 404 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(29, 28)) 405 #define SET_RA_INFO_DIS_PT(h2c_pkt, value) \ 406 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(30)) 407 #define SET_RA_INFO_RA_MASK0(h2c_pkt, value) \ 408 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(7, 0)) 409 #define SET_RA_INFO_RA_MASK1(h2c_pkt, value) \ 410 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(15, 8)) 411 #define SET_RA_INFO_RA_MASK2(h2c_pkt, value) \ 412 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(23, 16)) 413 #define SET_RA_INFO_RA_MASK3(h2c_pkt, value) \ 414 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(31, 24)) 415 #define SET_QUERY_BT_INFO(h2c_pkt, value) \ 416 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(8)) 417 #define SET_WL_CH_INFO_LINK(h2c_pkt, value) \ 418 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(15, 8)) 419 #define SET_WL_CH_INFO_CHNL(h2c_pkt, value) \ 420 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(23, 16)) 421 #define SET_WL_CH_INFO_BW(h2c_pkt, value) \ 422 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(31, 24)) 423 #define SET_BT_MP_INFO_SEQ(h2c_pkt, value) \ 424 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(15, 12)) 425 #define SET_BT_MP_INFO_OP_CODE(h2c_pkt, value) \ 426 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(23, 16)) 427 #define SET_BT_MP_INFO_PARA1(h2c_pkt, value) \ 428 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(31, 24)) 429 #define SET_BT_MP_INFO_PARA2(h2c_pkt, value) \ 430 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(7, 0)) 431 #define SET_BT_MP_INFO_PARA3(h2c_pkt, value) \ 432 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(15, 8)) 433 #define SET_BT_TX_POWER_INDEX(h2c_pkt, value) \ 434 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(15, 8)) 435 #define SET_IGNORE_WLAN_ACTION_EN(h2c_pkt, value) \ 436 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(8)) 437 #define SET_COEX_TDMA_TYPE_PARA1(h2c_pkt, value) \ 438 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(15, 8)) 439 #define SET_COEX_TDMA_TYPE_PARA2(h2c_pkt, value) \ 440 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(23, 16)) 441 #define SET_COEX_TDMA_TYPE_PARA3(h2c_pkt, value) \ 442 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(31, 24)) 443 #define SET_COEX_TDMA_TYPE_PARA4(h2c_pkt, value) \ 444 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(7, 0)) 445 #define SET_COEX_TDMA_TYPE_PARA5(h2c_pkt, value) \ 446 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(15, 8)) 447 #define SET_BT_WIFI_CONTROL_OP_CODE(h2c_pkt, value) \ 448 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(15, 8)) 449 #define SET_BT_WIFI_CONTROL_DATA1(h2c_pkt, value) \ 450 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(23, 16)) 451 #define SET_BT_WIFI_CONTROL_DATA2(h2c_pkt, value) \ 452 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(31, 24)) 453 #define SET_BT_WIFI_CONTROL_DATA3(h2c_pkt, value) \ 454 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(7, 0)) 455 #define SET_BT_WIFI_CONTROL_DATA4(h2c_pkt, value) \ 456 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(15, 8)) 457 #define SET_BT_WIFI_CONTROL_DATA5(h2c_pkt, value) \ 458 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(23, 16)) 459 460 #define SET_KEEP_ALIVE_ENABLE(h2c_pkt, value) \ 461 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(8)) 462 #define SET_KEEP_ALIVE_ADOPT(h2c_pkt, value) \ 463 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(9)) 464 #define SET_KEEP_ALIVE_PKT_TYPE(h2c_pkt, value) \ 465 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(10)) 466 #define SET_KEEP_ALIVE_CHECK_PERIOD(h2c_pkt, value) \ 467 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(23, 16)) 468 469 #define SET_DISCONNECT_DECISION_ENABLE(h2c_pkt, value) \ 470 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(8)) 471 #define SET_DISCONNECT_DECISION_ADOPT(h2c_pkt, value) \ 472 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(9)) 473 #define SET_DISCONNECT_DECISION_CHECK_PERIOD(h2c_pkt, value) \ 474 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(23, 16)) 475 #define SET_DISCONNECT_DECISION_TRY_PKT_NUM(h2c_pkt, value) \ 476 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(31, 24)) 477 478 #define SET_WOWLAN_FUNC_ENABLE(h2c_pkt, value) \ 479 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(8)) 480 #define SET_WOWLAN_PATTERN_MATCH_ENABLE(h2c_pkt, value) \ 481 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(9)) 482 #define SET_WOWLAN_MAGIC_PKT_ENABLE(h2c_pkt, value) \ 483 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(10)) 484 #define SET_WOWLAN_UNICAST_PKT_ENABLE(h2c_pkt, value) \ 485 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(11)) 486 #define SET_WOWLAN_REKEY_WAKEUP_ENABLE(h2c_pkt, value) \ 487 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(14)) 488 #define SET_WOWLAN_DEAUTH_WAKEUP_ENABLE(h2c_pkt, value) \ 489 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(15)) 490 491 #define SET_REMOTE_WAKECTRL_ENABLE(h2c_pkt, value) \ 492 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(8)) 493 #define SET_REMOTE_WAKE_CTRL_NLO_OFFLOAD_EN(h2c_pkt, value) \ 494 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(12)) 495 496 #define SET_AOAC_GLOBAL_INFO_PAIRWISE_ENC_ALG(h2c_pkt, value) \ 497 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(15, 8)) 498 #define SET_AOAC_GLOBAL_INFO_GROUP_ENC_ALG(h2c_pkt, value) \ 499 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(23, 16)) 500 501 #define SET_NLO_FUN_EN(h2c_pkt, value) \ 502 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(8)) 503 #define SET_NLO_PS_32K(h2c_pkt, value) \ 504 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(9)) 505 #define SET_NLO_IGNORE_SECURITY(h2c_pkt, value) \ 506 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(10)) 507 #define SET_NLO_LOC_NLO_INFO(h2c_pkt, value) \ 508 le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(23, 16)) 509 510 #define GET_FW_DUMP_LEN(_header) \ 511 le32_get_bits(*((__le32 *)(_header) + 0x00), GENMASK(15, 0)) 512 #define GET_FW_DUMP_SEQ(_header) \ 513 le32_get_bits(*((__le32 *)(_header) + 0x00), GENMASK(22, 16)) 514 #define GET_FW_DUMP_MORE(_header) \ 515 le32_get_bits(*((__le32 *)(_header) + 0x00), BIT(23)) 516 #define GET_FW_DUMP_VERSION(_header) \ 517 le32_get_bits(*((__le32 *)(_header) + 0x00), GENMASK(31, 24)) 518 #define GET_FW_DUMP_TLV_TYPE(_header) \ 519 le32_get_bits(*((__le32 *)(_header) + 0x01), GENMASK(15, 0)) 520 #define GET_FW_DUMP_TLV_LEN(_header) \ 521 le32_get_bits(*((__le32 *)(_header) + 0x01), GENMASK(31, 16)) 522 #define GET_FW_DUMP_TLV_VAL(_header) \ 523 le32_get_bits(*((__le32 *)(_header) + 0x02), GENMASK(31, 0)) 524 static inline struct rtw_c2h_cmd *get_c2h_from_skb(struct sk_buff *skb) 525 { 526 u32 pkt_offset; 527 528 pkt_offset = *((u32 *)skb->cb); 529 return (struct rtw_c2h_cmd *)(skb->data + pkt_offset); 530 } 531 532 void rtw_fw_c2h_cmd_rx_irqsafe(struct rtw_dev *rtwdev, u32 pkt_offset, 533 struct sk_buff *skb); 534 void rtw_fw_c2h_cmd_handle(struct rtw_dev *rtwdev, struct sk_buff *skb); 535 void rtw_fw_send_general_info(struct rtw_dev *rtwdev); 536 void rtw_fw_send_phydm_info(struct rtw_dev *rtwdev); 537 538 void rtw_fw_do_iqk(struct rtw_dev *rtwdev, struct rtw_iqk_para *para); 539 void rtw_fw_set_pwr_mode(struct rtw_dev *rtwdev); 540 void rtw_fw_set_pg_info(struct rtw_dev *rtwdev); 541 void rtw_fw_query_bt_info(struct rtw_dev *rtwdev); 542 void rtw_fw_wl_ch_info(struct rtw_dev *rtwdev, u8 link, u8 ch, u8 bw); 543 void rtw_fw_query_bt_mp_info(struct rtw_dev *rtwdev, 544 struct rtw_coex_info_req *req); 545 void rtw_fw_force_bt_tx_power(struct rtw_dev *rtwdev, u8 bt_pwr_dec_lvl); 546 void rtw_fw_bt_ignore_wlan_action(struct rtw_dev *rtwdev, bool enable); 547 void rtw_fw_coex_tdma_type(struct rtw_dev *rtwdev, 548 u8 para1, u8 para2, u8 para3, u8 para4, u8 para5); 549 void rtw_fw_bt_wifi_control(struct rtw_dev *rtwdev, u8 op_code, u8 *data); 550 void rtw_fw_send_rssi_info(struct rtw_dev *rtwdev, struct rtw_sta_info *si); 551 void rtw_fw_send_ra_info(struct rtw_dev *rtwdev, struct rtw_sta_info *si); 552 void rtw_fw_media_status_report(struct rtw_dev *rtwdev, u8 mac_id, bool conn); 553 int rtw_fw_write_data_rsvd_page(struct rtw_dev *rtwdev, u16 pg_addr, 554 u8 *buf, u32 size); 555 void rtw_remove_rsvd_page(struct rtw_dev *rtwdev, 556 struct rtw_vif *rtwvif); 557 void rtw_add_rsvd_page_bcn(struct rtw_dev *rtwdev, 558 struct rtw_vif *rtwvif); 559 void rtw_add_rsvd_page_pno(struct rtw_dev *rtwdev, 560 struct rtw_vif *rtwvif); 561 void rtw_add_rsvd_page_sta(struct rtw_dev *rtwdev, 562 struct rtw_vif *rtwvif); 563 int rtw_fw_download_rsvd_page(struct rtw_dev *rtwdev); 564 void rtw_send_rsvd_page_h2c(struct rtw_dev *rtwdev); 565 int rtw_dump_drv_rsvd_page(struct rtw_dev *rtwdev, 566 u32 offset, u32 size, u32 *buf); 567 void rtw_fw_set_remote_wake_ctrl_cmd(struct rtw_dev *rtwdev, bool enable); 568 void rtw_fw_set_wowlan_ctrl_cmd(struct rtw_dev *rtwdev, bool enable); 569 void rtw_fw_set_keep_alive_cmd(struct rtw_dev *rtwdev, bool enable); 570 void rtw_fw_set_disconnect_decision_cmd(struct rtw_dev *rtwdev, bool enable); 571 void rtw_fw_set_aoac_global_info_cmd(struct rtw_dev *rtwdev, 572 u8 pairwise_key_enc, 573 u8 group_key_enc); 574 575 void rtw_fw_set_nlo_info(struct rtw_dev *rtwdev, bool enable); 576 void rtw_fw_update_pkt_probe_req(struct rtw_dev *rtwdev, 577 struct cfg80211_ssid *ssid); 578 void rtw_fw_channel_switch(struct rtw_dev *rtwdev, bool enable); 579 void rtw_fw_h2c_cmd_dbg(struct rtw_dev *rtwdev, u8 *h2c); 580 void rtw_fw_c2h_cmd_isr(struct rtw_dev *rtwdev); 581 int rtw_fw_dump_fifo(struct rtw_dev *rtwdev, u8 fifo_sel, u32 addr, u32 size, 582 u32 *buffer); 583 584 #endif 585